2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
43 #include "prog_instruction.h"
44 #include "prog_parameter.h"
45 #include "prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
50 #define PEEPHOLE_OPTIMIZATIONS 1
54 /* XXX temporarily here */
61 struct gl_program
*prog
;
62 /* code-gen options */
63 GLboolean EmitHighLevelInstructions
;
64 GLboolean EmitComments
;
69 * Assembly and IR info
73 slang_ir_opcode IrOpcode
;
75 gl_inst_opcode InstOpcode
;
76 GLuint ResultSize
, NumParams
;
81 static const slang_ir_info IrInfo
[] = {
83 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
84 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
85 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
86 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
87 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
88 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
89 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
90 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
91 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
92 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
93 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
94 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
95 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
96 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
97 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
98 { IR_SLE
, "IR_SLE", OPCODE_SLE
, 4, 2 },
99 { IR_SLT
, "IR_SLT", OPCODE_SLT
, 4, 2 },
100 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
102 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
103 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
104 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
105 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
106 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
107 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
108 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
109 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
110 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
111 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
112 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
113 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
114 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
115 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
116 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
117 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
118 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
119 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
120 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
123 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
124 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
125 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
126 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
127 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
128 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
129 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
130 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
131 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
132 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
133 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
134 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
135 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
136 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
137 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
138 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 }, /* float literal */
139 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
140 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
141 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
142 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
146 static const slang_ir_info
*
147 slang_find_ir_info(slang_ir_opcode opcode
)
150 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
151 if (IrInfo
[i
].IrOpcode
== opcode
) {
159 slang_ir_name(slang_ir_opcode opcode
)
161 return slang_find_ir_info(opcode
)->IrName
;
166 * Swizzle a swizzle. That is, return swz2(swz1)
169 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
172 for (i
= 0; i
< 4; i
++) {
173 GLuint c
= GET_SWZ(swz2
, i
);
174 s
[i
] = GET_SWZ(swz1
, c
);
176 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
182 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
184 slang_ir_storage
*st
;
185 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
190 st
->Swizzle
= SWIZZLE_NOOP
;
197 swizzle_string(GLuint swizzle
)
202 for (i
= 1; i
< 5; i
++) {
203 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
210 writemask_string(GLuint writemask
)
215 for (i
= 0; i
< 4; i
++) {
216 if (writemask
& (1 << i
))
224 storage_string(const slang_ir_storage
*st
)
226 static const char *files
[] = {
244 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
246 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
247 st
->Index
+ st
->Size
- 1);
249 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
250 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
265 slang_print_ir(const slang_ir_node
*n
, int indent
)
270 if (n
->Opcode
!= IR_SEQ
)
272 printf("%3d:", indent
);
279 printf("SEQ at %p\n", (void*) n
);
281 assert(n
->Children
[0]);
282 assert(n
->Children
[1]);
283 slang_print_ir(n
->Children
[0], indent
+ IND
);
284 slang_print_ir(n
->Children
[1], indent
+ IND
);
287 printf("NEW SCOPE\n");
288 assert(!n
->Children
[1]);
289 slang_print_ir(n
->Children
[0], indent
+ 3);
292 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
293 slang_print_ir(n
->Children
[0], indent
+3);
294 slang_print_ir(n
->Children
[1], indent
+3);
297 printf("LABEL: %s\n", n
->Label
->Name
);
301 slang_print_ir(n
->Children
[0], indent
+ 3);
304 printf("JUMP %s\n", n
->Label
->Name
);
309 slang_print_ir(n
->Children
[0], indent
+3);
312 slang_print_ir(n
->Children
[1], indent
+3);
313 if (n
->Children
[2]) {
316 slang_print_ir(n
->Children
[2], indent
+3);
322 printf("BEGIN_SUB\n");
336 slang_print_ir(n
->Children
[0], indent
+3);
346 case IR_BREAK_IF_FALSE
:
347 printf("BREAK_IF_FALSE\n");
348 slang_print_ir(n
->Children
[0], indent
+3);
350 case IR_BREAK_IF_TRUE
:
351 printf("BREAK_IF_TRUE\n");
352 slang_print_ir(n
->Children
[0], indent
+3);
354 case IR_CONT_IF_FALSE
:
355 printf("CONT_IF_FALSE\n");
356 slang_print_ir(n
->Children
[0], indent
+3);
358 case IR_CONT_IF_TRUE
:
359 printf("CONT_IF_TRUE\n");
360 slang_print_ir(n
->Children
[0], indent
+3);
364 printf("VAR %s%s at %s store %p\n",
365 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
366 swizzle_string(n
->Store
->Swizzle
),
367 storage_string(n
->Store
), (void*) n
->Store
);
370 printf("VAR_DECL %s (%p) at %s store %p\n",
371 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
372 (void*) n
->Var
, storage_string(n
->Store
),
376 printf("FIELD %s of\n", n
->Field
);
377 slang_print_ir(n
->Children
[0], indent
+3);
380 printf("FLOAT %g %g %g %g\n",
381 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
384 printf("INT_TO_FLOAT\n");
385 slang_print_ir(n
->Children
[0], indent
+3);
388 printf("FLOAT_TO_INT\n");
389 slang_print_ir(n
->Children
[0], indent
+3);
392 printf("SWIZZLE %s of (store %p) \n",
393 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
394 slang_print_ir(n
->Children
[0], indent
+ 3);
397 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
398 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
399 slang_print_ir(n
->Children
[0], indent
+3);
400 slang_print_ir(n
->Children
[1], indent
+3);
406 * Allocate temporary storage for an intermediate result (such as for
407 * a multiply or add, etc.
410 alloc_temp_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
, GLint size
)
415 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
416 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
417 slang_info_log_error(emitInfo
->log
,
418 "Ran out of registers, too many temporaries");
426 * Free temporary storage, if n->Store is, in fact, temp storage.
430 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
432 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
433 if (_slang_is_temp(vt
, n
->Store
)) {
434 _slang_free_temp(vt
, n
->Store
);
435 n
->Store
->Index
= -1;
443 * Convert IR storage to an instruction dst register.
446 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
449 static const GLuint defaultWritemask
[4] = {
451 WRITEMASK_X
| WRITEMASK_Y
,
452 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
453 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
455 assert(st
->Index
>= 0);
456 dst
->File
= st
->File
;
457 dst
->Index
= st
->Index
;
458 assert(st
->File
!= PROGRAM_UNDEFINED
);
459 assert(st
->Size
>= 1);
460 assert(st
->Size
<= 4);
462 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
464 assert(writemask
& WRITEMASK_X
);
465 dst
->WriteMask
= WRITEMASK_X
<< comp
;
468 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
474 * Convert IR storage to an instruction src register.
477 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
479 static const GLuint defaultSwizzle
[4] = {
480 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
481 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
482 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
483 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
485 assert(st
->File
>= 0 && st
->File
<= 16);
486 src
->File
= st
->File
;
487 src
->Index
= st
->Index
;
488 assert(st
->File
!= PROGRAM_UNDEFINED
);
489 assert(st
->Size
>= 1);
490 assert(st
->Size
<= 4);
491 if (st
->Swizzle
!= SWIZZLE_NOOP
)
492 src
->Swizzle
= st
->Swizzle
;
494 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
496 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
497 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
498 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
499 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
505 * Add new instruction at end of given program.
506 * \param prog the program to append instruction onto
507 * \param opcode opcode for the new instruction
508 * \return pointer to the new instruction
510 static struct prog_instruction
*
511 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
513 struct gl_program
*prog
= emitInfo
->prog
;
514 struct prog_instruction
*inst
;
515 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
516 prog
->NumInstructions
,
517 prog
->NumInstructions
+ 1);
518 inst
= prog
->Instructions
+ prog
->NumInstructions
;
519 prog
->NumInstructions
++;
520 _mesa_init_instructions(inst
, 1);
521 inst
->Opcode
= opcode
;
522 inst
->BranchTarget
= -1; /* invalid */
529 * Return pointer to last instruction in program.
531 static struct prog_instruction
*
532 prev_instruction(struct gl_program
*prog
)
534 if (prog
->NumInstructions
== 0)
537 return prog
->Instructions
+ prog
->NumInstructions
- 1;
542 static struct prog_instruction
*
543 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
547 * Return an annotation string for given node's storage.
550 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
553 const slang_ir_storage
*st
= n
->Store
;
554 static char s
[100] = "";
557 return _mesa_strdup("");
560 case PROGRAM_CONSTANT
:
561 if (st
->Index
>= 0) {
562 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
563 if (st
->Swizzle
== SWIZZLE_NOOP
)
564 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
566 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
570 case PROGRAM_TEMPORARY
:
572 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
574 sprintf(s
, "t[%d]", st
->Index
);
576 case PROGRAM_STATE_VAR
:
577 case PROGRAM_UNIFORM
:
578 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
580 case PROGRAM_VARYING
:
581 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
584 sprintf(s
, "input[%d]", st
->Index
);
587 sprintf(s
, "output[%d]", st
->Index
);
592 return _mesa_strdup(s
);
600 * Return an annotation string for an instruction.
603 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
604 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
607 const char *operator;
612 len
+= strlen(dstAnnot
);
614 dstAnnot
= _mesa_strdup("");
617 len
+= strlen(srcAnnot0
);
619 srcAnnot0
= _mesa_strdup("");
622 len
+= strlen(srcAnnot1
);
624 srcAnnot1
= _mesa_strdup("");
627 len
+= strlen(srcAnnot2
);
629 srcAnnot2
= _mesa_strdup("");
660 s
= (char *) malloc(len
);
661 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
662 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
663 assert(_mesa_strlen(s
) < len
);
679 * Generate code for a simple arithmetic instruction.
680 * Either 1, 2 or 3 operands.
682 static struct prog_instruction
*
683 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
685 struct prog_instruction
*inst
;
686 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
687 char *srcAnnot
[3], *dstAnnot
;
691 assert(info
->InstOpcode
!= OPCODE_NOP
);
693 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
695 #if PEEPHOLE_OPTIMIZATIONS
696 /* Look for MAD opportunity */
697 if (info
->NumParams
== 2 &&
698 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
699 /* found pattern IR_ADD(IR_MUL(A, B), C) */
700 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
701 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
702 emit(emitInfo
, n
->Children
[1]); /* C */
703 /* generate MAD instruction */
704 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
705 /* operands: A, B, C: */
706 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
707 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
708 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
709 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
710 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
711 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
713 else if (info
->NumParams
== 2 &&
714 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
715 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
716 emit(emitInfo
, n
->Children
[0]); /* A */
717 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
718 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
719 /* generate MAD instruction */
720 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
721 /* operands: B, C, A */
722 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
723 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
724 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
725 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
726 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
727 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
734 /* gen code for children */
735 for (i
= 0; i
< info
->NumParams
; i
++)
736 emit(emitInfo
, n
->Children
[i
]);
738 /* gen this instruction and src registers */
739 inst
= new_instruction(emitInfo
, info
->InstOpcode
);
740 for (i
= 0; i
< info
->NumParams
; i
++)
741 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
744 for (i
= 0; i
< info
->NumParams
; i
++)
745 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], emitInfo
->prog
);
748 for (i
= 0; i
< info
->NumParams
; i
++)
749 free_temp_storage(emitInfo
->vt
, n
->Children
[i
]);
754 if (!alloc_temp_storage(emitInfo
, n
, info
->ResultSize
))
757 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
759 dstAnnot
= storage_annotation(n
, emitInfo
->prog
);
761 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
762 srcAnnot
[1], srcAnnot
[2]);
764 /*_mesa_print_instruction(inst);*/
770 * Generate code for an IR_CLAMP instruction.
772 static struct prog_instruction
*
773 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
775 struct prog_instruction
*inst
;
777 assert(n
->Opcode
== IR_CLAMP
);
783 inst
= emit(emitInfo
, n
->Children
[0]);
785 /* If lower limit == 0.0 and upper limit == 1.0,
786 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
788 * emit OPCODE_MIN, OPCODE_MAX sequence.
791 /* XXX this isn't quite finished yet */
792 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
793 n
->Children
[1]->Value
[0] == 0.0 &&
794 n
->Children
[1]->Value
[1] == 0.0 &&
795 n
->Children
[1]->Value
[2] == 0.0 &&
796 n
->Children
[1]->Value
[3] == 0.0 &&
797 n
->Children
[2]->Opcode
== IR_FLOAT
&&
798 n
->Children
[2]->Value
[0] == 1.0 &&
799 n
->Children
[2]->Value
[1] == 1.0 &&
800 n
->Children
[2]->Value
[2] == 1.0 &&
801 n
->Children
[2]->Value
[3] == 1.0) {
803 inst
= prev_instruction(prog
);
805 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
806 /* and prev instruction's DstReg matches n->Children[0]->Store */
807 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
808 n
->Store
= n
->Children
[0]->Store
;
815 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
818 emit(emitInfo
, n
->Children
[1]);
819 emit(emitInfo
, n
->Children
[2]);
821 /* tmp = max(ch[0], ch[1]) */
822 inst
= new_instruction(emitInfo
, OPCODE_MAX
);
823 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
824 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
825 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
827 /* tmp = min(tmp, ch[2]) */
828 inst
= new_instruction(emitInfo
, OPCODE_MIN
);
829 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
830 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
831 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
837 static struct prog_instruction
*
838 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
840 /* Implement as MOV dst, -src; */
841 /* XXX we could look at the previous instruction and in some circumstances
842 * modify it to accomplish the negation.
844 struct prog_instruction
*inst
;
846 emit(emitInfo
, n
->Children
[0]);
849 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
852 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
853 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
854 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
855 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
860 static struct prog_instruction
*
861 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
864 assert(_slang_label_get_location(n
->Label
) < 0);
865 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
871 static struct prog_instruction
*
872 emit_jump(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
874 struct prog_instruction
*inst
;
877 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
878 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
879 inst
->BranchTarget
= _slang_label_get_location(n
->Label
);
880 if (inst
->BranchTarget
< 0) {
881 _slang_label_add_reference(n
->Label
, emitInfo
->prog
->NumInstructions
- 1);
887 static struct prog_instruction
*
888 emit_kill(slang_emit_info
*emitInfo
)
890 struct prog_instruction
*inst
;
891 /* NV-KILL - discard fragment depending on condition code.
892 * Note that ARB-KILL depends on sign of vector operand.
894 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
895 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
900 static struct prog_instruction
*
901 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
903 struct prog_instruction
*inst
;
904 if (n
->Opcode
== IR_TEX
) {
905 inst
= new_instruction(emitInfo
, OPCODE_TEX
);
907 else if (n
->Opcode
== IR_TEXB
) {
908 inst
= new_instruction(emitInfo
, OPCODE_TXB
);
911 assert(n
->Opcode
== IR_TEXP
);
912 inst
= new_instruction(emitInfo
, OPCODE_TXP
);
916 if (!alloc_temp_storage(emitInfo
, n
, 4))
919 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
921 (void) emit(emitInfo
, n
->Children
[1]);
923 /* Child[1] is the coord */
924 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
926 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
927 assert(n
->Children
[0]->Store
);
928 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
930 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
931 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
932 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
933 * link time, using the sampler uniform's value.
939 static struct prog_instruction
*
940 emit_move(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
942 struct prog_instruction
*inst
;
945 assert(n
->Children
[1]);
946 inst
= emit(emitInfo
, n
->Children
[1]);
948 assert(n
->Children
[1]->Store
->Index
>= 0);
951 emit(emitInfo
, n
->Children
[0]);
954 n
->Store
= n
->Children
[0]->Store
;
956 #if PEEPHOLE_OPTIMIZATIONS
957 if (inst
&& _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
)) {
958 /* Peephole optimization:
959 * Just modify the RHS to put its result into the dest of this
960 * MOVE operation. Then, this MOVE is a no-op.
962 _slang_free_temp(emitInfo
->vt
, n
->Children
[1]->Store
);
963 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
964 /* fixup the prev (RHS) instruction */
965 assert(n
->Children
[0]->Store
->Index
>= 0);
966 assert(n
->Children
[0]->Store
->Index
< 16);
967 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
973 if (n
->Children
[0]->Store
->Size
> 4) {
974 /* move matrix/struct etc (block of registers) */
975 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
976 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
977 GLint size
= srcStore
.Size
;
978 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
979 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
983 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
984 inst
->Comment
= _mesa_strdup("IR_MOVE block");
985 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
986 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
993 /* single register move */
994 char *srcAnnot
, *dstAnnot
;
995 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
996 assert(n
->Children
[0]->Store
->Index
>= 0);
997 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
998 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
999 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1000 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1001 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1002 srcAnnot
, NULL
, NULL
);
1004 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
1010 static struct prog_instruction
*
1011 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1013 /* Conditional expression (in if/while/for stmts).
1014 * Need to update condition code register.
1015 * Next instruction is typically an IR_IF.
1017 /* last child expr instruction: */
1018 struct prog_instruction
*inst
= emit(emitInfo
, n
->Children
[0]);
1020 /* set inst's CondUpdate flag */
1021 inst
->CondUpdate
= GL_TRUE
;
1022 return inst
; /* XXX or null? */
1025 /* This'll happen for things like "if (i) ..." where no code
1026 * is normally generated for the expression "i".
1027 * Generate a move instruction just to set condition codes.
1028 * Note: must use full 4-component vector since all four
1029 * condition codes must be set identically.
1031 if (!alloc_temp_storage(emitInfo
, n
, 4))
1033 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1034 inst
->CondUpdate
= GL_TRUE
;
1035 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1036 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1037 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1038 inst
->Comment
= _mesa_strdup("COND expr");
1039 return inst
; /* XXX or null? */
1047 static struct prog_instruction
*
1048 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1051 slang_ir_storage st
;
1052 struct prog_instruction
*inst
;
1054 /* need zero constant */
1055 st
.File
= PROGRAM_CONSTANT
;
1057 st
.Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, &zero
,
1061 (void) emit(emitInfo
, n
->Children
[0]);
1062 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1065 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1068 inst
= new_instruction(emitInfo
, OPCODE_SEQ
);
1069 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1070 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1071 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1073 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
1075 inst
->Comment
= _mesa_strdup("NOT");
1080 static struct prog_instruction
*
1081 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1083 struct gl_program
*prog
= emitInfo
->prog
;
1084 struct prog_instruction
*ifInst
;
1085 GLuint ifInstLoc
, elseInstLoc
= 0;
1087 emit(emitInfo
, n
->Children
[0]); /* the condition */
1088 ifInstLoc
= prog
->NumInstructions
;
1089 if (emitInfo
->EmitHighLevelInstructions
) {
1090 ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1091 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1092 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1095 /* conditional jump to else, or endif */
1096 ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1097 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1098 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1099 ifInst
->Comment
= _mesa_strdup("if zero");
1103 emit(emitInfo
, n
->Children
[1]);
1105 if (n
->Children
[2]) {
1106 /* have else body */
1107 elseInstLoc
= prog
->NumInstructions
;
1108 if (emitInfo
->EmitHighLevelInstructions
) {
1109 (void) new_instruction(emitInfo
, OPCODE_ELSE
);
1112 /* jump to endif instruction */
1113 struct prog_instruction
*inst
;
1114 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1115 inst
->Comment
= _mesa_strdup("else");
1116 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1118 ifInst
= prog
->Instructions
+ ifInstLoc
;
1119 ifInst
->BranchTarget
= prog
->NumInstructions
;
1121 emit(emitInfo
, n
->Children
[2]);
1125 ifInst
= prog
->Instructions
+ ifInstLoc
;
1126 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1129 if (emitInfo
->EmitHighLevelInstructions
) {
1130 (void) new_instruction(emitInfo
, OPCODE_ENDIF
);
1133 if (n
->Children
[2]) {
1134 struct prog_instruction
*elseInst
;
1135 elseInst
= prog
->Instructions
+ elseInstLoc
;
1136 elseInst
->BranchTarget
= prog
->NumInstructions
;
1142 static struct prog_instruction
*
1143 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1145 struct gl_program
*prog
= emitInfo
->prog
;
1146 struct prog_instruction
*beginInst
, *endInst
;
1147 GLuint beginInstLoc
, endInstLoc
;
1150 /* emit OPCODE_BGNLOOP */
1151 beginInstLoc
= prog
->NumInstructions
;
1152 if (emitInfo
->EmitHighLevelInstructions
) {
1153 (void) new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1157 emit(emitInfo
, n
->Children
[0]);
1159 endInstLoc
= prog
->NumInstructions
;
1160 if (emitInfo
->EmitHighLevelInstructions
) {
1161 /* emit OPCODE_ENDLOOP */
1162 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1165 /* emit unconditional BRA-nch */
1166 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1167 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1169 /* end instruction's BranchTarget points to top of loop */
1170 endInst
->BranchTarget
= beginInstLoc
;
1172 if (emitInfo
->EmitHighLevelInstructions
) {
1173 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1174 beginInst
= prog
->Instructions
+ beginInstLoc
;
1175 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1178 /* Done emitting loop code. Now walk over the loop's linked list of
1179 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1180 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1182 for (ir
= n
->BranchNode
; ir
; ir
= ir
->BranchNode
) {
1183 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1184 assert(inst
->BranchTarget
< 0);
1185 if (ir
->Opcode
== IR_BREAK
||
1186 ir
->Opcode
== IR_BREAK_IF_FALSE
||
1187 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1188 assert(inst
->Opcode
== OPCODE_BRK
||
1189 inst
->Opcode
== OPCODE_BRA
);
1190 /* go to instruction after end of loop */
1191 inst
->BranchTarget
= endInstLoc
+ 1;
1194 assert(ir
->Opcode
== IR_CONT
||
1195 ir
->Opcode
== IR_CONT_IF_FALSE
||
1196 ir
->Opcode
== IR_CONT_IF_TRUE
);
1197 assert(inst
->Opcode
== OPCODE_CONT
||
1198 inst
->Opcode
== OPCODE_BRA
);
1199 /* to go instruction at top of loop */
1200 inst
->BranchTarget
= beginInstLoc
;
1208 * "Continue" or "break" statement.
1209 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1211 static struct prog_instruction
*
1212 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1214 gl_inst_opcode opcode
;
1215 struct prog_instruction
*inst
;
1216 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1217 if (emitInfo
->EmitHighLevelInstructions
) {
1218 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1221 opcode
= OPCODE_BRA
;
1223 inst
= new_instruction(emitInfo
, opcode
);
1224 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1230 * Conditional "continue" or "break" statement.
1231 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1233 static struct prog_instruction
*
1234 emit_cont_break_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
1235 GLboolean breakTrue
)
1237 gl_inst_opcode opcode
;
1238 struct prog_instruction
*inst
;
1240 /* evaluate condition expr, setting cond codes */
1241 inst
= emit(emitInfo
, n
->Children
[0]);
1243 inst
->CondUpdate
= GL_TRUE
;
1245 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1246 if (emitInfo
->EmitHighLevelInstructions
) {
1247 if (n
->Opcode
== IR_CONT_IF_TRUE
||
1248 n
->Opcode
== IR_CONT_IF_FALSE
)
1249 opcode
= OPCODE_CONT
;
1251 opcode
= OPCODE_BRK
;
1254 opcode
= OPCODE_BRA
;
1256 inst
= new_instruction(emitInfo
, opcode
);
1257 inst
->DstReg
.CondMask
= breakTrue
? COND_NE
: COND_EQ
;
1264 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1265 * Ex: fix_swizzle("zyNN") -> "zyyy"
1268 fix_swizzle(GLuint swizzle
)
1271 for (i
= 0; i
< 4; i
++) {
1272 swz
[i
] = GET_SWZ(swizzle
, i
);
1273 if (swz
[i
] == SWIZZLE_NIL
) {
1274 swz
[i
] = swz
[i
- 1];
1277 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1281 static struct prog_instruction
*
1282 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1286 /* swizzled storage access */
1287 (void) emit(emitInfo
, n
->Children
[0]);
1289 /* "pull-up" the child's storage info, applying our swizzle info */
1290 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1291 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1292 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1293 /*n->Var = n->Children[0]->Var; XXX for debug */
1294 assert(n
->Store
->Index
>= 0);
1296 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1299 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1300 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1301 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1302 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1303 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1307 /* apply this swizzle to child's swizzle to get composed swizzle */
1308 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1315 * Dereference array element. Just resolve storage for the array
1316 * element represented by this node.
1318 static struct prog_instruction
*
1319 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1322 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1323 assert(n
->Store
->Size
> 0);
1325 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1326 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1331 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1332 /* Constant index */
1333 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1334 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1335 n
->Store
->Index
= arrayAddr
+ index
;
1338 /* Variable index - PROBLEM */
1339 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1340 const GLint index
= 0;
1341 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1342 n
->Store
->Index
= arrayAddr
+ index
;
1344 return NULL
; /* no instruction */
1349 * Resolve storage for accessing a structure field.
1351 static struct prog_instruction
*
1352 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1354 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1355 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1358 _mesa_problem(NULL
, "structs/fields not supported yet");
1360 return NULL
; /* no instruction */
1364 static struct prog_instruction
*
1365 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1367 struct prog_instruction
*inst
;
1371 switch (n
->Opcode
) {
1373 /* sequence of two sub-trees */
1374 assert(n
->Children
[0]);
1375 assert(n
->Children
[1]);
1376 emit(emitInfo
, n
->Children
[0]);
1377 inst
= emit(emitInfo
, n
->Children
[1]);
1379 n
->Store
= n
->Children
[1]->Store
;
1383 /* new variable scope */
1384 _slang_push_var_table(emitInfo
->vt
);
1385 inst
= emit(emitInfo
, n
->Children
[0]);
1386 _slang_pop_var_table(emitInfo
->vt
);
1390 /* Variable declaration - allocate a register for it */
1392 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1393 assert(n
->Store
->Size
> 0);
1394 assert(n
->Store
->Index
< 0);
1395 if (!n
->Var
|| n
->Var
->isTemp
) {
1396 /* a nameless/temporary variable, will be freed after first use */
1397 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
1398 slang_info_log_error(emitInfo
->log
,
1399 "Ran out of registers, too many temporaries");
1404 /* a regular variable */
1405 _slang_add_variable(emitInfo
->vt
, n
->Var
);
1406 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
1407 slang_info_log_error(emitInfo
->log
,
1408 "Ran out of registers, too many variables");
1412 printf("IR_VAR_DECL %s %d store %p\n",
1413 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1415 assert(n
->Var
->aux
== n
->Store
);
1417 if (emitInfo
->EmitComments
) {
1418 /* emit NOP with comment describing the variable's storage location */
1420 sprintf(s
, "TEMP[%d]%s = %s (size %d)",
1422 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
1423 (char *) n
->Var
->a_name
,
1425 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
1426 inst
->Comment
= _mesa_strdup(s
);
1432 /* Reference to a variable
1433 * Storage should have already been resolved/allocated.
1436 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1438 if (n
->Store
->File
== PROGRAM_STATE_VAR
&&
1439 n
->Store
->Index
< 0) {
1440 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1443 if (n
->Store
->Index
< 0) {
1444 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1446 assert(n
->Store
->Index
>= 0);
1447 assert(n
->Store
->Size
> 0);
1451 return emit_array_element(emitInfo
, n
);
1453 return emit_struct_field(emitInfo
, n
);
1455 return emit_swizzle(emitInfo
, n
);
1459 emit(emitInfo
, n
->Children
[0]);
1460 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1462 if (!alloc_temp_storage(emitInfo
, n
, 1))
1465 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1466 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1467 if (emitInfo
->EmitComments
)
1468 inst
->Comment
= _mesa_strdup("int to float");
1471 /* Simple arithmetic */
1505 /* trinary operators */
1507 return emit_arith(emitInfo
, n
);
1509 return emit_clamp(emitInfo
, n
);
1513 return emit_tex(emitInfo
, n
);
1515 return emit_negation(emitInfo
, n
);
1517 /* find storage location for this float constant */
1518 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, n
->Value
,
1520 &n
->Store
->Swizzle
);
1521 if (n
->Store
->Index
< 0) {
1522 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
1528 return emit_move(emitInfo
, n
);
1531 return emit_cond(emitInfo
, n
);
1534 return emit_not(emitInfo
, n
);
1537 return emit_label(emitInfo
, n
);
1541 return emit_jump(emitInfo
, n
);
1543 return emit_kill(emitInfo
);
1546 return emit_if(emitInfo
, n
);
1549 return emit_loop(emitInfo
, n
);
1550 case IR_BREAK_IF_FALSE
:
1551 case IR_CONT_IF_FALSE
:
1552 return emit_cont_break_if(emitInfo
, n
, GL_FALSE
);
1553 case IR_BREAK_IF_TRUE
:
1554 case IR_CONT_IF_TRUE
:
1555 return emit_cont_break_if(emitInfo
, n
, GL_TRUE
);
1559 return emit_cont_break(emitInfo
, n
);
1562 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
1564 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
1566 return new_instruction(emitInfo
, OPCODE_RET
);
1572 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1580 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1581 struct gl_program
*prog
, GLboolean withEnd
,
1582 slang_info_log
*log
)
1584 GET_CURRENT_CONTEXT(ctx
);
1586 slang_emit_info emitInfo
;
1590 emitInfo
.prog
= prog
;
1592 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
1593 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
;
1595 (void) emit(&emitInfo
, n
);
1597 /* finish up by adding the END opcode to program */
1599 struct prog_instruction
*inst
;
1600 inst
= new_instruction(&emitInfo
, OPCODE_END
);
1604 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1606 _mesa_print_program(prog
);
1607 _mesa_print_program_parameters(ctx
,prog
);