src/mesa/shader/slang/slang_emit.c

   1 /*
   2  * Mesa 3-D graphics library
   3  * Version:  6.5.3
   4  *
   5  * Copyright (C) 2005-2007  Brian Paul   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file slang_emit.c
  27  * Emit program instructions (PI code) from IR trees.
  28  * \author Brian Paul
  29  */
  30
  31 /***
  32  *** NOTES
  33  ***
  34  *** To emit GPU instructions, we basically just do an in-order traversal
  35  *** of the IR tree.
  36  ***/
  37
  38
  39 #include "imports.h"
  40 #include "context.h"
  41 #include "macros.h"
  42 #include "program.h"
  43 #include "prog_instruction.h"
  44 #include "prog_parameter.h"
  45 #include "prog_print.h"
  46 #include "slang_builtin.h"
  47 #include "slang_emit.h"
  48
  49
  50 #define PEEPHOLE_OPTIMIZATIONS 1
  51 #define ANNOTATE 0
  52
  53
  54 typedef struct
  55 {
  56    slang_info_log *log;
  57    slang_var_table *vt;
  58    struct gl_program *prog;
  59    struct gl_program **Subroutines;
  60    GLuint NumSubroutines;
  61
  62    /* code-gen options */
  63    GLboolean EmitHighLevelInstructions;
  64    GLboolean EmitCondCodes;
  65    GLboolean EmitComments;
  66    GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
  67 } slang_emit_info;
  68
  69
  70
  71 static struct gl_program *
  72 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
  73 {
  74    GET_CURRENT_CONTEXT(ctx);
  75    const GLuint n = emitInfo->NumSubroutines;
  76
  77    emitInfo->Subroutines = (struct gl_program **)
  78       _mesa_realloc(emitInfo->Subroutines,
  79                     n * sizeof(struct gl_program),
  80                     (n + 1) * sizeof(struct gl_program));
  81    emitInfo->Subroutines[n] = _mesa_new_program(ctx, emitInfo->prog->Target, 0);
  82    emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
  83    emitInfo->NumSubroutines++;
  84    *id = n;
  85    return emitInfo->Subroutines[n];
  86 }
  87
  88
  89 /**
  90  * Convert a writemask to a swizzle.  Used for testing cond codes because
  91  * we only want to test the cond code component(s) that was set by the
  92  * previous instruction.
  93  */
  94 static GLuint
  95 writemask_to_swizzle(GLuint writemask)
  96 {
  97    if (writemask == WRITEMASK_X)
  98       return SWIZZLE_XXXX;
  99    if (writemask == WRITEMASK_Y)
 100       return SWIZZLE_YYYY;
 101    if (writemask == WRITEMASK_Z)
 102       return SWIZZLE_ZZZZ;
 103    if (writemask == WRITEMASK_W)
 104       return SWIZZLE_WWWW;
 105    return SWIZZLE_XYZW;  /* shouldn't be hit */
 106 }
 107
 108
 109 /**
 110  * Swizzle a swizzle.  That is, return swz2(swz1)
 111  */
 112 static GLuint
 113 swizzle_swizzle(GLuint swz1, GLuint swz2)
 114 {
 115    GLuint i, swz, s[4];
 116    for (i = 0; i < 4; i++) {
 117       GLuint c = GET_SWZ(swz2, i);
 118       s[i] = GET_SWZ(swz1, c);
 119    }
 120    swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
 121    return swz;
 122 }
 123
 124
 125 slang_ir_storage *
 126 _slang_new_ir_storage(enum register_file file, GLint index, GLint size)
 127 {
 128    slang_ir_storage *st;
 129    st = (slang_ir_storage *) _mesa_calloc(sizeof(slang_ir_storage));
 130    if (st) {
 131       st->File = file;
 132       st->Index = index;
 133       st->Size = size;
 134       st->Swizzle = SWIZZLE_NOOP;
 135    }
 136    return st;
 137 }
 138
 139
 140 /**
 141  * Allocate temporary storage for an intermediate result (such as for
 142  * a multiply or add, etc.
 143  */
 144 static GLboolean
 145 alloc_temp_storage(slang_emit_info *emitInfo, slang_ir_node *n, GLint size)
 146 {
 147    assert(!n->Var);
 148    assert(!n->Store);
 149    assert(size > 0);
 150    n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, size);
 151    if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
 152       slang_info_log_error(emitInfo->log,
 153                            "Ran out of registers, too many temporaries");
 154       return GL_FALSE;
 155    }
 156    return GL_TRUE;
 157 }
 158
 159
 160 /**
 161  * Free temporary storage, if n->Store is, in fact, temp storage.
 162  * Otherwise, no-op.
 163  */
 164 static void
 165 free_temp_storage(slang_var_table *vt, slang_ir_node *n)
 166 {
 167    if (n->Store->File == PROGRAM_TEMPORARY &&
 168        n->Store->Index >= 0 &&
 169        n->Opcode != IR_SWIZZLE) {
 170       if (_slang_is_temp(vt, n->Store)) {
 171          _slang_free_temp(vt, n->Store);
 172          n->Store->Index = -1;
 173          n->Store->Size = -1;
 174          _mesa_free(n->Store);
 175          n->Store = NULL;
 176       }
 177    }
 178 }
 179
 180
 181 /**
 182  * Convert IR storage to an instruction dst register.
 183  */
 184 static void
 185 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st,
 186                    GLuint writemask)
 187 {
 188    assert(st->Index >= 0);
 189    dst->File = st->File;
 190    dst->Index = st->Index;
 191    assert(st->File != PROGRAM_UNDEFINED);
 192    assert(st->Size >= 1);
 193    assert(st->Size <= 4);
 194    if (st->Size == 1) {
 195       GLuint comp = GET_SWZ(st->Swizzle, 0);
 196       assert(comp < 4);
 197       dst->WriteMask = WRITEMASK_X << comp;
 198    }
 199    else {
 200       dst->WriteMask = writemask;
 201    }
 202 }
 203
 204
 205 /**
 206  * Convert IR storage to an instruction src register.
 207  */
 208 static void
 209 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
 210 {
 211    static const GLuint defaultSwizzle[4] = {
 212       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
 213       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
 214       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
 215       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W)
 216    };
 217    assert(st->File >= 0);
 218    assert(st->File < PROGRAM_UNDEFINED);
 219    assert(st->Size >= 1);
 220    assert(st->Size <= 4);
 221    src->File = st->File;
 222    src->Index = st->Index;
 223    if (st->Swizzle != SWIZZLE_NOOP)
 224       src->Swizzle = st->Swizzle;
 225    else
 226       src->Swizzle = defaultSwizzle[st->Size - 1]; /*XXX really need this?*/
 227
 228    assert(GET_SWZ(src->Swizzle, 0) <= 3);
 229    assert(GET_SWZ(src->Swizzle, 1) <= 3);
 230    assert(GET_SWZ(src->Swizzle, 2) <= 3);
 231    assert(GET_SWZ(src->Swizzle, 3) <= 3);
 232 }
 233
 234
 235 /*
 236  * Setup an instrucion src register to point to a scalar constant.
 237  */
 238 static void
 239 constant_to_src_reg(struct prog_src_register *src, GLfloat val,
 240                     slang_emit_info *emitInfo)
 241 {
 242    GLuint zeroSwizzle;
 243    GLint zeroReg;
 244    GLfloat value[4];
 245
 246    value[0] = val;
 247    zeroReg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
 248                                         value, 1, &zeroSwizzle);
 249    assert(zeroReg >= 0);
 250
 251    src->File = PROGRAM_CONSTANT;
 252    src->Index = zeroReg;
 253    src->Swizzle = zeroSwizzle;
 254 }
 255
 256
 257 /**
 258  * Add new instruction at end of given program.
 259  * \param prog  the program to append instruction onto
 260  * \param opcode  opcode for the new instruction
 261  * \return pointer to the new instruction
 262  */
 263 static struct prog_instruction *
 264 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
 265 {
 266    struct gl_program *prog = emitInfo->prog;
 267    struct prog_instruction *inst;
 268
 269 #if 0
 270    /* print prev inst */
 271    if (prog->NumInstructions > 0) {
 272       _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
 273    }
 274 #endif
 275    prog->Instructions = _mesa_realloc_instructions(prog->Instructions,
 276                                                    prog->NumInstructions,
 277                                                    prog->NumInstructions + 1);
 278    inst = prog->Instructions + prog->NumInstructions;
 279    prog->NumInstructions++;
 280    _mesa_init_instructions(inst, 1);
 281    inst->Opcode = opcode;
 282    inst->BranchTarget = -1; /* invalid */
 283    /*
 284    printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
 285           _mesa_opcode_string(inst->Opcode));
 286    */
 287    return inst;
 288 }
 289
 290
 291 /**
 292  * Return pointer to last instruction in program.
 293  */
 294 static struct prog_instruction *
 295 prev_instruction(slang_emit_info *emitInfo)
 296 {
 297    struct gl_program *prog = emitInfo->prog;
 298    if (prog->NumInstructions == 0)
 299       return NULL;
 300    else
 301       return prog->Instructions + prog->NumInstructions - 1;
 302 }
 303
 304
 305 static struct prog_instruction *
 306 emit(slang_emit_info *emitInfo, slang_ir_node *n);
 307
 308
 309 /**
 310  * Return an annotation string for given node's storage.
 311  */
 312 static char *
 313 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
 314 {
 315 #if ANNOTATE
 316    const slang_ir_storage *st = n->Store;
 317    static char s[100] = "";
 318
 319    if (!st)
 320       return _mesa_strdup("");
 321
 322    switch (st->File) {
 323    case PROGRAM_CONSTANT:
 324       if (st->Index >= 0) {
 325          const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
 326          if (st->Swizzle == SWIZZLE_NOOP)
 327             sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
 328          else {
 329             sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
 330          }
 331       }
 332       break;
 333    case PROGRAM_TEMPORARY:
 334       if (n->Var)
 335          sprintf(s, "%s", (char *) n->Var->a_name);
 336       else
 337          sprintf(s, "t[%d]", st->Index);
 338       break;
 339    case PROGRAM_STATE_VAR:
 340    case PROGRAM_UNIFORM:
 341       sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
 342       break;
 343    case PROGRAM_VARYING:
 344       sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
 345       break;
 346    case PROGRAM_INPUT:
 347       sprintf(s, "input[%d]", st->Index);
 348       break;
 349    case PROGRAM_OUTPUT:
 350       sprintf(s, "output[%d]", st->Index);
 351       break;
 352    default:
 353       s[0] = 0;
 354    }
 355    return _mesa_strdup(s);
 356 #else
 357    return NULL;
 358 #endif
 359 }
 360
 361
 362 /**
 363  * Return an annotation string for an instruction.
 364  */
 365 static char *
 366 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
 367                        char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
 368 {
 369 #if ANNOTATE
 370    const char *operator;
 371    char *s;
 372    int len = 50;
 373
 374    if (dstAnnot)
 375       len += strlen(dstAnnot);
 376    else
 377       dstAnnot = _mesa_strdup("");
 378
 379    if (srcAnnot0)
 380       len += strlen(srcAnnot0);
 381    else
 382       srcAnnot0 = _mesa_strdup("");
 383
 384    if (srcAnnot1)
 385       len += strlen(srcAnnot1);
 386    else
 387       srcAnnot1 = _mesa_strdup("");
 388
 389    if (srcAnnot2)
 390       len += strlen(srcAnnot2);
 391    else
 392       srcAnnot2 = _mesa_strdup("");
 393
 394    switch (opcode) {
 395    case OPCODE_ADD:
 396       operator = "+";
 397       break;
 398    case OPCODE_SUB:
 399       operator = "-";
 400       break;
 401    case OPCODE_MUL:
 402       operator = "*";
 403       break;
 404    case OPCODE_DP3:
 405       operator = "DP3";
 406       break;
 407    case OPCODE_DP4:
 408       operator = "DP4";
 409       break;
 410    case OPCODE_XPD:
 411       operator = "XPD";
 412       break;
 413    case OPCODE_RSQ:
 414       operator = "RSQ";
 415       break;
 416    case OPCODE_SGT:
 417       operator = ">";
 418       break;
 419    default:
 420       operator = ",";
 421    }
 422
 423    s = (char *) malloc(len);
 424    sprintf(s, "%s = %s %s %s %s", dstAnnot,
 425            srcAnnot0, operator, srcAnnot1, srcAnnot2);
 426    assert(_mesa_strlen(s) < len);
 427
 428    free(dstAnnot);
 429    free(srcAnnot0);
 430    free(srcAnnot1);
 431    free(srcAnnot2);
 432
 433    return s;
 434 #else
 435    return NULL;
 436 #endif
 437 }
 438
 439
 440 /**
 441  * Emit an instruction that's just a comment.
 442  */
 443 static struct prog_instruction *
 444 emit_comment(slang_emit_info *emitInfo, const char *s)
 445 {
 446    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
 447    if (inst) {
 448       inst->Comment = _mesa_strdup(s);
 449    }
 450    return inst;
 451 }
 452
 453
 454 /**
 455  * Generate code for a simple arithmetic instruction.
 456  * Either 1, 2 or 3 operands.
 457  */
 458 static struct prog_instruction *
 459 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
 460 {
 461    struct prog_instruction *inst;
 462    const slang_ir_info *info = _slang_ir_info(n->Opcode);
 463    char *srcAnnot[3], *dstAnnot;
 464    GLuint i;
 465
 466    assert(info);
 467    assert(info->InstOpcode != OPCODE_NOP);
 468
 469    srcAnnot[0] = srcAnnot[1] = srcAnnot[2] = dstAnnot = NULL;
 470
 471 #if PEEPHOLE_OPTIMIZATIONS
 472    /* Look for MAD opportunity */
 473    if (info->NumParams == 2 &&
 474        n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
 475       /* found pattern IR_ADD(IR_MUL(A, B), C) */
 476       emit(emitInfo, n->Children[0]->Children[0]);  /* A */
 477       emit(emitInfo, n->Children[0]->Children[1]);  /* B */
 478       emit(emitInfo, n->Children[1]);  /* C */
 479       /* generate MAD instruction */
 480       inst = new_instruction(emitInfo, OPCODE_MAD);
 481       /* operands: A, B, C: */
 482       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Children[0]->Store);
 483       storage_to_src_reg(&inst->SrcReg[1], n->Children[0]->Children[1]->Store);
 484       storage_to_src_reg(&inst->SrcReg[2], n->Children[1]->Store);
 485       free_temp_storage(emitInfo->vt, n->Children[0]->Children[0]);
 486       free_temp_storage(emitInfo->vt, n->Children[0]->Children[1]);
 487       free_temp_storage(emitInfo->vt, n->Children[1]);
 488    }
 489    else if (info->NumParams == 2 &&
 490             n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
 491       /* found pattern IR_ADD(A, IR_MUL(B, C)) */
 492       emit(emitInfo, n->Children[0]);  /* A */
 493       emit(emitInfo, n->Children[1]->Children[0]);  /* B */
 494       emit(emitInfo, n->Children[1]->Children[1]);  /* C */
 495       /* generate MAD instruction */
 496       inst = new_instruction(emitInfo, OPCODE_MAD);
 497       /* operands: B, C, A */
 498       storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Children[0]->Store);
 499       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Children[1]->Store);
 500       storage_to_src_reg(&inst->SrcReg[2], n->Children[0]->Store);
 501       free_temp_storage(emitInfo->vt, n->Children[1]->Children[0]);
 502       free_temp_storage(emitInfo->vt, n->Children[1]->Children[1]);
 503       free_temp_storage(emitInfo->vt, n->Children[0]);
 504    }
 505    else
 506 #endif
 507    {
 508       /* normal case */
 509
 510       /* gen code for children */
 511       for (i = 0; i < info->NumParams; i++)
 512          emit(emitInfo, n->Children[i]);
 513
 514       /* gen this instruction and src registers */
 515       inst = new_instruction(emitInfo, info->InstOpcode);
 516       for (i = 0; i < info->NumParams; i++)
 517          storage_to_src_reg(&inst->SrcReg[i], n->Children[i]->Store);
 518
 519       /* annotation */
 520       for (i = 0; i < info->NumParams; i++)
 521          srcAnnot[i] = storage_annotation(n->Children[i], emitInfo->prog);
 522
 523       /* free temps */
 524       for (i = 0; i < info->NumParams; i++)
 525          free_temp_storage(emitInfo->vt, n->Children[i]);
 526    }
 527
 528    /* result storage */
 529    if (!n->Store) {
 530       /* XXX this size isn't correct, it depends on the operands */
 531       if (!alloc_temp_storage(emitInfo, n, info->ResultSize))
 532          return NULL;
 533    }
 534    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 535
 536    dstAnnot = storage_annotation(n, emitInfo->prog);
 537
 538    inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, srcAnnot[0],
 539                                           srcAnnot[1], srcAnnot[2]);
 540
 541    /*_mesa_print_instruction(inst);*/
 542    return inst;
 543 }
 544
 545
 546 /**
 547  * Emit code for == and != operators.  These could normally be handled
 548  * by emit_arith() except we need to be able to handle structure comparisons.
 549  */
 550 static struct prog_instruction *
 551 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
 552 {
 553    struct prog_instruction *inst;
 554    GLint size;
 555
 556    assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
 557
 558    /* gen code for children */
 559    emit(emitInfo, n->Children[0]);
 560    emit(emitInfo, n->Children[1]);
 561
 562    assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);
 563    size = n->Children[0]->Store->Size;
 564
 565    if (size == 1) {
 566       gl_inst_opcode opcode;
 567
 568       if (!n->Store) {
 569          if (!alloc_temp_storage(emitInfo, n, 1))  /* 1 bool */
 570             return NULL;
 571       }
 572
 573       opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
 574       inst = new_instruction(emitInfo, opcode);
 575       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 576       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 577       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 578    }
 579    else if (size <= 4) {
 580       GLuint swizzle;
 581       gl_inst_opcode dotOp;
 582
 583       assert(!n->Store);
 584       if (!n->Store) {
 585          if (!alloc_temp_storage(emitInfo, n, size))  /* 'size' bools */
 586             return NULL;
 587       }
 588
 589       if (size == 4) {
 590          dotOp = OPCODE_DP4;
 591          swizzle = SWIZZLE_XYZW;
 592       }
 593       else if (size == 3) {
 594          dotOp = OPCODE_DP3;
 595          swizzle = SWIZZLE_XYZW;
 596       }
 597       else {
 598          assert(size == 2);
 599          dotOp = OPCODE_DP3;
 600          swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
 601       }
 602
 603       /* Compute equality, inequality (tmp1 = (A ?= B)) */
 604       inst = new_instruction(emitInfo, OPCODE_SNE);
 605       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 606       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 607       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 608       inst->Comment = _mesa_strdup("Compare values");
 609
 610       /* Compute tmp2 = DOT(tmp1, tmp1)  (reduction) */
 611       inst = new_instruction(emitInfo, dotOp);
 612       storage_to_src_reg(&inst->SrcReg[0], n->Store);
 613       storage_to_src_reg(&inst->SrcReg[1], n->Store);
 614       inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
 615       free_temp_storage(emitInfo->vt, n); /* free tmp1 */
 616       if (!alloc_temp_storage(emitInfo, n, 1))  /* alloc tmp2 */
 617          return NULL;
 618       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 619       inst->Comment = _mesa_strdup("Reduce vec to bool");
 620
 621       if (n->Opcode == IR_EQUAL) {
 622          /* compute tmp2.x = !tmp2.x  via tmp2.x = (tmp2.x == 0) */
 623          inst = new_instruction(emitInfo, OPCODE_SEQ);
 624          storage_to_src_reg(&inst->SrcReg[0], n->Store);
 625          constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
 626          storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 627          inst->Comment = _mesa_strdup("Invert true/false");
 628       }
 629    }
 630    else {
 631       /* size > 4, struct compare */
 632 #if 0
 633       GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
 634       /*printf("BEGIN COMPARE size %d\n", num);*/
 635       for (i = 0; i < num; i++) {
 636          inst = new_instruction(emitInfo, opcode);
 637          inst->SrcReg[0].File = n->Children[0]->Store->File;
 638          inst->SrcReg[0].Index = n->Children[0]->Store->Index + i;
 639          inst->SrcReg[1].File = n->Children[1]->Store->File;
 640          inst->SrcReg[1].Index = n->Children[1]->Store->Index + i;
 641          inst->DstReg.File = n->Store->File;
 642          inst->DstReg.Index = n->Store->Index;
 643
 644          inst->CondUpdate = 1; /* update cond code */
 645          if (i > 0) {
 646             inst->DstReg.CondMask = COND_NE; /* update if !=0 */
 647          }
 648          /*_mesa_print_instruction(inst);*/
 649       }
 650       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 651 #endif
 652       _mesa_problem(NULL, "struct comparison not implemented yet");
 653       inst = NULL;
 654    }
 655
 656    /* free temps */
 657    free_temp_storage(emitInfo->vt, n->Children[0]);
 658    free_temp_storage(emitInfo->vt, n->Children[1]);
 659
 660    return inst;
 661 }
 662
 663
 664
 665 /**
 666  * Generate code for an IR_CLAMP instruction.
 667  */
 668 static struct prog_instruction *
 669 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
 670 {
 671    struct prog_instruction *inst;
 672
 673    assert(n->Opcode == IR_CLAMP);
 674    /* ch[0] = value
 675     * ch[1] = min limit
 676     * ch[2] = max limit
 677     */
 678
 679    inst = emit(emitInfo, n->Children[0]);
 680
 681    /* If lower limit == 0.0 and upper limit == 1.0,
 682     *    set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
 683     * Else,
 684     *    emit OPCODE_MIN, OPCODE_MAX sequence.
 685     */
 686 #if 0
 687    /* XXX this isn't quite finished yet */
 688    if (n->Children[1]->Opcode == IR_FLOAT &&
 689        n->Children[1]->Value[0] == 0.0 &&
 690        n->Children[1]->Value[1] == 0.0 &&
 691        n->Children[1]->Value[2] == 0.0 &&
 692        n->Children[1]->Value[3] == 0.0 &&
 693        n->Children[2]->Opcode == IR_FLOAT &&
 694        n->Children[2]->Value[0] == 1.0 &&
 695        n->Children[2]->Value[1] == 1.0 &&
 696        n->Children[2]->Value[2] == 1.0 &&
 697        n->Children[2]->Value[3] == 1.0) {
 698       if (!inst) {
 699          inst = prev_instruction(prog);
 700       }
 701       if (inst && inst->Opcode != OPCODE_NOP) {
 702          /* and prev instruction's DstReg matches n->Children[0]->Store */
 703          inst->SaturateMode = SATURATE_ZERO_ONE;
 704          n->Store = n->Children[0]->Store;
 705          return inst;
 706       }
 707    }
 708 #endif
 709
 710    if (!n->Store)
 711       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
 712          return NULL;
 713
 714    emit(emitInfo, n->Children[1]);
 715    emit(emitInfo, n->Children[2]);
 716
 717    /* tmp = max(ch[0], ch[1]) */
 718    inst = new_instruction(emitInfo, OPCODE_MAX);
 719    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 720    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 721    storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 722
 723    /* tmp = min(tmp, ch[2]) */
 724    inst = new_instruction(emitInfo, OPCODE_MIN);
 725    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 726    storage_to_src_reg(&inst->SrcReg[0], n->Store);
 727    storage_to_src_reg(&inst->SrcReg[1], n->Children[2]->Store);
 728
 729    return inst;
 730 }
 731
 732
 733 static struct prog_instruction *
 734 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
 735 {
 736    /* Implement as MOV dst, -src; */
 737    /* XXX we could look at the previous instruction and in some circumstances
 738     * modify it to accomplish the negation.
 739     */
 740    struct prog_instruction *inst;
 741
 742    emit(emitInfo, n->Children[0]);
 743
 744    if (!n->Store)
 745       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
 746          return NULL;
 747
 748    inst = new_instruction(emitInfo, OPCODE_MOV);
 749    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 750    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 751    inst->SrcReg[0].NegateBase = NEGATE_XYZW;
 752    return inst;
 753 }
 754
 755
 756 static struct prog_instruction *
 757 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
 758 {
 759    assert(n->Label);
 760 #if 0
 761    /* XXX this fails in loop tail code - investigate someday */
 762    assert(_slang_label_get_location(n->Label) < 0);
 763    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 764                              emitInfo->prog);
 765 #else
 766    if (_slang_label_get_location(n->Label) < 0)
 767       _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 768                                 emitInfo->prog);
 769 #endif
 770    return NULL;
 771 }
 772
 773
 774 /**
 775  * Emit code for an inlined function call (subroutine).
 776  */
 777 static struct prog_instruction *
 778 emit_func(slang_emit_info *emitInfo, slang_ir_node *n)
 779 {
 780    struct gl_program *progSave;
 781    struct prog_instruction *inst;
 782    GLuint subroutineId;
 783
 784    assert(n->Opcode == IR_FUNC);
 785    assert(n->Label);
 786
 787    /* save/push cur program */
 788    progSave = emitInfo->prog;
 789    emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
 790
 791    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 792                              emitInfo->prog);
 793
 794    if (emitInfo->EmitBeginEndSub) {
 795       /* BGNSUB isn't a real instruction.
 796        * We require a label (i.e. "foobar:") though, if we're going to
 797        * print the program in the NV format.  The BNGSUB instruction is
 798        * really just a NOP to attach the label to.
 799        */
 800       inst = new_instruction(emitInfo, OPCODE_BGNSUB);
 801       inst->Comment = _mesa_strdup(n->Label->Name);
 802    }
 803
 804    /* body of function: */
 805    emit(emitInfo, n->Children[0]);
 806    n->Store = n->Children[0]->Store;
 807
 808    /* add RET instruction now, if needed */
 809    inst = prev_instruction(emitInfo);
 810    if (inst && inst->Opcode != OPCODE_RET) {
 811       inst = new_instruction(emitInfo, OPCODE_RET);
 812    }
 813
 814    if (emitInfo->EmitBeginEndSub) {
 815       inst = new_instruction(emitInfo, OPCODE_ENDSUB);
 816       inst->Comment = _mesa_strdup(n->Label->Name);
 817    }
 818
 819    /* pop/restore cur program */
 820    emitInfo->prog = progSave;
 821
 822    /* emit the function call */
 823    inst = new_instruction(emitInfo, OPCODE_CAL);
 824    /* The branch target is just the subroutine number (changed later) */
 825    inst->BranchTarget = subroutineId;
 826    inst->Comment = _mesa_strdup(n->Label->Name);
 827    assert(inst->BranchTarget >= 0);
 828
 829    return inst;
 830 }
 831
 832
 833 /**
 834  * Emit code for a 'return' statement.
 835  */
 836 static struct prog_instruction *
 837 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
 838 {
 839    struct prog_instruction *inst;
 840    assert(n);
 841    assert(n->Opcode == IR_RETURN);
 842    assert(n->Label);
 843    inst = new_instruction(emitInfo, OPCODE_RET);
 844    inst->DstReg.CondMask = COND_TR;  /* always return */
 845    return inst;
 846 }
 847
 848
 849 static struct prog_instruction *
 850 emit_kill(slang_emit_info *emitInfo)
 851 {
 852    struct prog_instruction *inst;
 853    /* NV-KILL - discard fragment depending on condition code.
 854     * Note that ARB-KILL depends on sign of vector operand.
 855     */
 856    inst = new_instruction(emitInfo, OPCODE_KIL_NV);
 857    inst->DstReg.CondMask = COND_TR;  /* always branch */
 858    return inst;
 859 }
 860
 861
 862 static struct prog_instruction *
 863 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
 864 {
 865    struct prog_instruction *inst;
 866
 867    (void) emit(emitInfo, n->Children[1]);
 868
 869    if (n->Opcode == IR_TEX) {
 870       inst = new_instruction(emitInfo, OPCODE_TEX);
 871    }
 872    else if (n->Opcode == IR_TEXB) {
 873       inst = new_instruction(emitInfo, OPCODE_TXB);
 874    }
 875    else {
 876       assert(n->Opcode == IR_TEXP);
 877       inst = new_instruction(emitInfo, OPCODE_TXP);
 878    }
 879
 880    if (!n->Store)
 881       if (!alloc_temp_storage(emitInfo, n, 4))
 882          return NULL;
 883
 884    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 885
 886    /* Child[1] is the coord */
 887    assert(n->Children[1]->Store->File != PROGRAM_UNDEFINED);
 888    assert(n->Children[1]->Store->Index >= 0);
 889    storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
 890
 891    /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
 892    assert(n->Children[0]->Store);
 893    assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
 894
 895    inst->Sampler = n->Children[0]->Store->Index; /* i.e. uniform's index */
 896    inst->TexSrcTarget = n->Children[0]->Store->Size;
 897    inst->TexSrcUnit = 27; /* Dummy value; the TexSrcUnit will be computed at
 898                            * link time, using the sampler uniform's value.
 899                            */
 900    return inst;
 901 }
 902
 903
 904 static struct prog_instruction *
 905 emit_move(slang_emit_info *emitInfo, slang_ir_node *n)
 906 {
 907    struct prog_instruction *inst;
 908
 909    /* lhs */
 910    emit(emitInfo, n->Children[0]);
 911
 912    /* rhs */
 913    assert(n->Children[1]);
 914    inst = emit(emitInfo, n->Children[1]);
 915
 916    if (!n->Children[1]->Store) {
 917       slang_info_log_error(emitInfo->log, "invalid assignment");
 918       return NULL;
 919    }
 920    assert(n->Children[1]->Store->Index >= 0);
 921
 922    n->Store = n->Children[0]->Store;
 923
 924 #if PEEPHOLE_OPTIMIZATIONS
 925    if (inst &&
 926        _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
 927        (inst->DstReg.File == n->Children[1]->Store->File) &&
 928        (inst->DstReg.Index == n->Children[1]->Store->Index)) {
 929       /* Peephole optimization:
 930        * The Right-Hand-Side has its results in a temporary place.
 931        * Modify the RHS (and the prev instruction) to store its results
 932        * in the destination specified by n->Children[0].
 933        * Then, this MOVE is a no-op.
 934        */
 935       if (n->Children[1]->Opcode != IR_SWIZZLE)
 936          _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
 937       *n->Children[1]->Store = *n->Children[0]->Store;
 938       /* fixup the previous instruction (which stored the RHS result) */
 939       assert(n->Children[0]->Store->Index >= 0);
 940       storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
 941       return inst;
 942    }
 943    else
 944 #endif
 945    {
 946       if (n->Children[0]->Store->Size > 4) {
 947          /* move matrix/struct etc (block of registers) */
 948          slang_ir_storage dstStore = *n->Children[0]->Store;
 949          slang_ir_storage srcStore = *n->Children[1]->Store;
 950          GLint size = srcStore.Size;
 951          ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW);
 952          ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
 953          dstStore.Size = 4;
 954          srcStore.Size = 4;
 955          while (size >= 4) {
 956             inst = new_instruction(emitInfo, OPCODE_MOV);
 957             inst->Comment = _mesa_strdup("IR_MOVE block");
 958             storage_to_dst_reg(&inst->DstReg, &dstStore, n->Writemask);
 959             storage_to_src_reg(&inst->SrcReg[0], &srcStore);
 960             srcStore.Index++;
 961             dstStore.Index++;
 962             size -= 4;
 963          }
 964       }
 965       else {
 966          /* single register move */
 967          char *srcAnnot, *dstAnnot;
 968          inst = new_instruction(emitInfo, OPCODE_MOV);
 969          assert(n->Children[0]->Store->Index >= 0);
 970          storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
 971          storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
 972          dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
 973          srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
 974          inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
 975                                                 srcAnnot, NULL, NULL);
 976       }
 977       free_temp_storage(emitInfo->vt, n->Children[1]);
 978       return inst;
 979    }
 980 }
 981
 982
 983 /**
 984  * An IR_COND node wraps a boolean expression which is used by an
 985  * IF or WHILE test.  This is where we'll set condition codes, if needed.
 986  */
 987 static struct prog_instruction *
 988 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
 989 {
 990    struct prog_instruction *inst;
 991
 992    assert(n->Opcode == IR_COND);
 993
 994    if (!n->Children[0])
 995       return NULL;
 996
 997    /* emit code for the expression */
 998    inst = emit(emitInfo, n->Children[0]);
 999
1000    assert(n->Children[0]->Store);
1001    /*assert(n->Children[0]->Store->Size == 1);*/
1002
1003    if (emitInfo->EmitCondCodes) {
1004       if (inst &&
1005           n->Children[0]->Store &&
1006           inst->DstReg.File == n->Children[0]->Store->File &&
1007           inst->DstReg.Index == n->Children[0]->Store->Index) {
1008          /* The previous instruction wrote to the register who's value
1009           * we're testing.  Just fix that instruction so that the
1010           * condition codes are computed.
1011           */
1012          inst->CondUpdate = GL_TRUE;
1013          n->Store = n->Children[0]->Store;
1014          return inst;
1015       }
1016       else {
1017          /* This'll happen for things like "if (i) ..." where no code
1018           * is normally generated for the expression "i".
1019           * Generate a move instruction just to set condition codes.
1020           */
1021          if (!alloc_temp_storage(emitInfo, n, 1))
1022             return NULL;
1023          inst = new_instruction(emitInfo, OPCODE_MOV);
1024          inst->CondUpdate = GL_TRUE;
1025          storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1026          storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1027          _slang_free_temp(emitInfo->vt, n->Store);
1028          inst->Comment = _mesa_strdup("COND expr");
1029          return inst;
1030       }
1031    }
1032    else {
1033       /* No-op: the boolean result of the expression is in a regular reg */
1034       n->Store = n->Children[0]->Store;
1035       return inst;
1036    }
1037 }
1038
1039
1040 /**
1041  * Logical-NOT
1042  */
1043 static struct prog_instruction *
1044 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1045 {
1046    struct prog_instruction *inst;
1047
1048    /* child expr */
1049    (void) emit(emitInfo, n->Children[0]);
1050    /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1051
1052    if (!n->Store)
1053       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
1054          return NULL;
1055
1056    inst = new_instruction(emitInfo, OPCODE_SEQ);
1057    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1058    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1059    constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
1060    free_temp_storage(emitInfo->vt, n->Children[0]);
1061
1062    inst->Comment = _mesa_strdup("NOT");
1063    return inst;
1064 }
1065
1066
1067 static struct prog_instruction *
1068 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1069 {
1070    struct gl_program *prog = emitInfo->prog;
1071    struct prog_instruction *ifInst, *inst;
1072    GLuint ifInstLoc, elseInstLoc = 0;
1073    GLuint condWritemask = 0;
1074
1075    inst = emit(emitInfo, n->Children[0]);  /* the condition */
1076    if (emitInfo->EmitCondCodes) {
1077       assert(inst);
1078       condWritemask = inst->DstReg.WriteMask;
1079    }
1080
1081 #if 0
1082    assert(n->Children[0]->Store->Size == 1); /* a bool! */
1083 #endif
1084
1085    ifInstLoc = prog->NumInstructions;
1086    if (emitInfo->EmitHighLevelInstructions) {
1087       ifInst = new_instruction(emitInfo, OPCODE_IF);
1088       if (emitInfo->EmitCondCodes) {
1089          ifInst->DstReg.CondMask = COND_NE;  /* if cond is non-zero */
1090          /* only test the cond code (1 of 4) that was updated by the
1091           * previous instruction.
1092           */
1093          ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1094       }
1095       else {
1096          /* test reg.x */
1097          storage_to_src_reg(&ifInst->SrcReg[0], n->Children[0]->Store);
1098       }
1099    }
1100    else {
1101       /* conditional jump to else, or endif */
1102       ifInst = new_instruction(emitInfo, OPCODE_BRA);
1103       ifInst->DstReg.CondMask = COND_EQ;  /* BRA if cond is zero */
1104       ifInst->Comment = _mesa_strdup("if zero");
1105       ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1106    }
1107
1108    /* if body */
1109    emit(emitInfo, n->Children[1]);
1110
1111    if (n->Children[2]) {
1112       /* have else body */
1113       elseInstLoc = prog->NumInstructions;
1114       if (emitInfo->EmitHighLevelInstructions) {
1115          (void) new_instruction(emitInfo, OPCODE_ELSE);
1116       }
1117       else {
1118          /* jump to endif instruction */
1119          struct prog_instruction *inst;
1120          inst = new_instruction(emitInfo, OPCODE_BRA);
1121          inst->Comment = _mesa_strdup("else");
1122          inst->DstReg.CondMask = COND_TR;  /* always branch */
1123       }
1124       ifInst = prog->Instructions + ifInstLoc;
1125       ifInst->BranchTarget = prog->NumInstructions;
1126
1127       emit(emitInfo, n->Children[2]);
1128    }
1129    else {
1130       /* no else body */
1131       ifInst = prog->Instructions + ifInstLoc;
1132       ifInst->BranchTarget = prog->NumInstructions /*+ 1*/;
1133    }
1134
1135    if (emitInfo->EmitHighLevelInstructions) {
1136       (void) new_instruction(emitInfo, OPCODE_ENDIF);
1137    }
1138
1139    if (n->Children[2]) {
1140       struct prog_instruction *elseInst;
1141       elseInst = prog->Instructions + elseInstLoc;
1142       elseInst->BranchTarget = prog->NumInstructions;
1143    }
1144    return NULL;
1145 }
1146
1147
1148 static struct prog_instruction *
1149 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1150 {
1151    struct gl_program *prog = emitInfo->prog;
1152    struct prog_instruction *beginInst, *endInst;
1153    GLuint beginInstLoc, tailInstLoc, endInstLoc;
1154    slang_ir_node *ir;
1155
1156    /* emit OPCODE_BGNLOOP */
1157    beginInstLoc = prog->NumInstructions;
1158    if (emitInfo->EmitHighLevelInstructions) {
1159       (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1160    }
1161
1162    /* body */
1163    emit(emitInfo, n->Children[0]);
1164
1165    /* tail */
1166    tailInstLoc = prog->NumInstructions;
1167    if (n->Children[1]) {
1168       if (emitInfo->EmitComments)
1169          emit_comment(emitInfo, "Loop tail code:");
1170       emit(emitInfo, n->Children[1]);
1171    }
1172
1173    endInstLoc = prog->NumInstructions;
1174    if (emitInfo->EmitHighLevelInstructions) {
1175       /* emit OPCODE_ENDLOOP */
1176       endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1177    }
1178    else {
1179       /* emit unconditional BRA-nch */
1180       endInst = new_instruction(emitInfo, OPCODE_BRA);
1181       endInst->DstReg.CondMask = COND_TR;  /* always true */
1182    }
1183    /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1184    endInst->BranchTarget = beginInstLoc;
1185
1186    if (emitInfo->EmitHighLevelInstructions) {
1187       /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1188       beginInst = prog->Instructions + beginInstLoc;
1189       beginInst->BranchTarget = prog->NumInstructions - 1;
1190    }
1191
1192    /* Done emitting loop code.  Now walk over the loop's linked list of
1193     * BREAK and CONT nodes, filling in their BranchTarget fields (which
1194     * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1195     */
1196    for (ir = n->List; ir; ir = ir->List) {
1197       struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1198       assert(inst->BranchTarget < 0);
1199       if (ir->Opcode == IR_BREAK ||
1200           ir->Opcode == IR_BREAK_IF_FALSE ||
1201           ir->Opcode == IR_BREAK_IF_TRUE) {
1202          assert(inst->Opcode == OPCODE_BRK ||
1203                 inst->Opcode == OPCODE_BRK0 ||
1204                 inst->Opcode == OPCODE_BRK1 ||
1205                 inst->Opcode == OPCODE_BRA);
1206          /* go to instruction after end of loop */
1207          inst->BranchTarget = endInstLoc + 1;
1208       }
1209       else {
1210          assert(ir->Opcode == IR_CONT ||
1211                 ir->Opcode == IR_CONT_IF_FALSE ||
1212                 ir->Opcode == IR_CONT_IF_TRUE);
1213          assert(inst->Opcode == OPCODE_CONT ||
1214                 inst->Opcode == OPCODE_CONT0 ||
1215                 inst->Opcode == OPCODE_CONT1 ||
1216                 inst->Opcode == OPCODE_BRA);
1217          /* go to instruction at tail of loop */
1218          inst->BranchTarget = endInstLoc;
1219       }
1220    }
1221    return NULL;
1222 }
1223
1224
1225 /**
1226  * Unconditional "continue" or "break" statement.
1227  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1228  */
1229 static struct prog_instruction *
1230 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1231 {
1232    gl_inst_opcode opcode;
1233    struct prog_instruction *inst;
1234
1235    if (n->Opcode == IR_CONT) {
1236       /* we need to execute the loop's tail code before doing CONT */
1237       assert(n->Parent);
1238       assert(n->Parent->Opcode == IR_LOOP);
1239       if (n->Parent->Children[1]) {
1240          /* emit tail code */
1241          if (emitInfo->EmitComments) {
1242             emit_comment(emitInfo, "continue - tail code:");
1243          }
1244          emit(emitInfo, n->Parent->Children[1]);
1245       }
1246    }
1247
1248    /* opcode selection */
1249    if (emitInfo->EmitHighLevelInstructions) {
1250       opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1251    }
1252    else {
1253       opcode = OPCODE_BRA;
1254    }
1255    n->InstLocation = emitInfo->prog->NumInstructions;
1256    inst = new_instruction(emitInfo, opcode);
1257    inst->DstReg.CondMask = COND_TR;  /* always true */
1258    return inst;
1259 }
1260
1261
1262 /**
1263  * Conditional "continue" or "break" statement.
1264  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1265  */
1266 static struct prog_instruction *
1267 emit_cont_break_if(slang_emit_info *emitInfo, slang_ir_node *n,
1268                    GLboolean breakTrue)
1269 {
1270    gl_inst_opcode opcode;
1271    struct prog_instruction *inst;
1272
1273    assert(n->Opcode == IR_CONT_IF_TRUE ||
1274           n->Opcode == IR_CONT_IF_FALSE ||
1275           n->Opcode == IR_BREAK_IF_TRUE ||
1276           n->Opcode == IR_BREAK_IF_FALSE);
1277
1278    /* evaluate condition expr, setting cond codes */
1279    inst = emit(emitInfo, n->Children[0]);
1280    if (emitInfo->EmitCondCodes) {
1281       assert(inst);
1282       inst->CondUpdate = GL_TRUE;
1283    }
1284
1285    n->InstLocation = emitInfo->prog->NumInstructions;
1286
1287    /* opcode selection */
1288    if (emitInfo->EmitHighLevelInstructions) {
1289       if (emitInfo->EmitCondCodes) {
1290          if (n->Opcode == IR_CONT_IF_TRUE ||
1291              n->Opcode == IR_CONT_IF_FALSE)
1292             opcode = OPCODE_CONT;
1293          else
1294             opcode = OPCODE_BRK;
1295       }
1296       else {
1297          if (n->Opcode == IR_CONT_IF_TRUE)
1298             opcode = OPCODE_CONT1;
1299          else if (n->Opcode == IR_CONT_IF_FALSE)
1300             opcode = OPCODE_CONT0;
1301          else if (n->Opcode == IR_BREAK_IF_TRUE)
1302             opcode = OPCODE_BRK1;
1303          else if (n->Opcode == IR_BREAK_IF_FALSE)
1304             opcode = OPCODE_BRK0;
1305       }
1306    }
1307    else {
1308       opcode = OPCODE_BRA;
1309    }
1310
1311    inst = new_instruction(emitInfo, opcode);
1312    if (emitInfo->EmitCondCodes) {
1313       inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
1314    }
1315    else {
1316       /* BRK0, BRK1, CONT0, CONT1 uses SrcReg[0] as the condition */
1317       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1318    }
1319    return inst;
1320 }
1321
1322
1323
1324 /**
1325  * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1326  * Ex: fix_swizzle("zyNN") -> "zyyy"
1327  */
1328 static GLuint
1329 fix_swizzle(GLuint swizzle)
1330 {
1331    GLuint swz[4], i;
1332    for (i = 0; i < 4; i++) {
1333       swz[i] = GET_SWZ(swizzle, i);
1334       if (swz[i] == SWIZZLE_NIL) {
1335          swz[i] = swz[i - 1];
1336       }
1337    }
1338    return MAKE_SWIZZLE4(swz[0], swz[1], swz[2], swz[3]);
1339 }
1340
1341
1342 /**
1343  * Return the number of components actually named by the swizzle.
1344  * Recall that swizzles may have undefined/don't-care values.
1345  */
1346 static GLuint
1347 swizzle_size(GLuint swizzle)
1348 {
1349    GLuint size = 0, i;
1350    for (i = 0; i < 4; i++) {
1351       GLuint swz = GET_SWZ(swizzle, i);
1352       size += (swz >= 0 && swz <= 3);
1353    }
1354    return size;
1355 }
1356
1357
1358 static struct prog_instruction *
1359 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1360 {
1361    GLuint swizzle;
1362    struct prog_instruction *inst;
1363
1364    inst = emit(emitInfo, n->Children[0]);
1365
1366 #ifdef DEBUG
1367    {
1368       GLuint s = n->Children[0]->Store->Swizzle;
1369       assert(GET_SWZ(s, 0) != SWIZZLE_NIL);
1370       assert(GET_SWZ(s, 1) != SWIZZLE_NIL);
1371       assert(GET_SWZ(s, 2) != SWIZZLE_NIL);
1372       assert(GET_SWZ(s, 3) != SWIZZLE_NIL);
1373    }
1374 #endif
1375    /* For debug: n->Var = n->Children[0]->Var; */
1376
1377    /* "pull-up" the child's storage info, applying our swizzle info */
1378    n->Store->File  = n->Children[0]->Store->File;
1379    n->Store->Index = n->Children[0]->Store->Index;
1380    n->Store->Size = swizzle_size(n->Store->Swizzle);
1381 #if 0
1382    printf("Emit Swizzle %s  reg %d  chSize %d  mySize %d\n",
1383           _mesa_swizzle_string(n->Store->Swizzle, 0, 0),
1384           n->Store->Index, n->Children[0]->Store->Size,
1385           n->Store->Size);
1386 #endif
1387
1388    /* apply this swizzle to child's swizzle to get composed swizzle */
1389    swizzle = fix_swizzle(n->Store->Swizzle); /* remove the don't care terms */
1390    n->Store->Swizzle = swizzle_swizzle(n->Children[0]->Store->Swizzle,
1391                                        swizzle);
1392
1393    return inst;
1394 }
1395
1396
1397 /**
1398  * Dereference array element.  Just resolve storage for the array
1399  * element represented by this node.
1400  */
1401 static struct prog_instruction *
1402 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1403 {
1404    assert(n->Store);
1405    assert(n->Store->File != PROGRAM_UNDEFINED);
1406    assert(n->Store->Size > 0);
1407
1408    if (n->Store->File == PROGRAM_STATE_VAR) {
1409       n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1410       return NULL;
1411    }
1412
1413    if (n->Children[1]->Opcode == IR_FLOAT) {
1414       /* Constant index */
1415       const GLint arrayAddr = n->Children[0]->Store->Index;
1416       const GLint index = (GLint) n->Children[1]->Value[0];
1417       n->Store->Index = arrayAddr + index;
1418    }
1419    else {
1420       /* Variable index - PROBLEM */
1421       const GLint arrayAddr = n->Children[0]->Store->Index;
1422       const GLint index = 0;
1423       _mesa_problem(NULL, "variable array indexes not supported yet!");
1424       n->Store->Index = arrayAddr + index;
1425    }
1426    return NULL; /* no instruction */
1427 }
1428
1429
1430 /**
1431  * Resolve storage for accessing a structure field.
1432  */
1433 static struct prog_instruction *
1434 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1435 {
1436    if (n->Store->File == PROGRAM_STATE_VAR) {
1437       n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1438    }
1439    else {
1440       GLint offset = n->FieldOffset / 4;
1441       assert(n->Children[0]->Store->Index >= 0);
1442       n->Store->Index = n->Children[0]->Store->Index + offset;
1443       if (n->Store->Size == 1) {
1444          GLint swz = n->FieldOffset % 4;
1445          n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
1446       }
1447       else {
1448          n->Store->Swizzle = SWIZZLE_XYZW;
1449       }
1450    }
1451    return NULL; /* no instruction */
1452 }
1453
1454
1455 static struct prog_instruction *
1456 emit(slang_emit_info *emitInfo, slang_ir_node *n)
1457 {
1458    struct prog_instruction *inst;
1459    if (!n)
1460       return NULL;
1461
1462    switch (n->Opcode) {
1463    case IR_SEQ:
1464       /* sequence of two sub-trees */
1465       assert(n->Children[0]);
1466       assert(n->Children[1]);
1467       emit(emitInfo, n->Children[0]);
1468       inst = emit(emitInfo, n->Children[1]);
1469 #if 0
1470       assert(!n->Store);
1471 #endif
1472       n->Store = n->Children[1]->Store;
1473       return inst;
1474
1475    case IR_SCOPE:
1476       /* new variable scope */
1477       _slang_push_var_table(emitInfo->vt);
1478       inst = emit(emitInfo, n->Children[0]);
1479       _slang_pop_var_table(emitInfo->vt);
1480       return inst;
1481
1482    case IR_VAR_DECL:
1483       /* Variable declaration - allocate a register for it */
1484       assert(n->Store);
1485       assert(n->Store->File != PROGRAM_UNDEFINED);
1486       assert(n->Store->Size > 0);
1487       /*assert(n->Store->Index < 0);*/
1488       if (!n->Var || n->Var->isTemp) {
1489          /* a nameless/temporary variable, will be freed after first use */
1490          /*NEW*/
1491          if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
1492             slang_info_log_error(emitInfo->log,
1493                                  "Ran out of registers, too many temporaries");
1494             return NULL;
1495          }
1496       }
1497       else {
1498          /* a regular variable */
1499          _slang_add_variable(emitInfo->vt, n->Var);
1500          if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
1501             slang_info_log_error(emitInfo->log,
1502                                  "Ran out of registers, too many variables");
1503             return NULL;
1504          }
1505          /*
1506          printf("IR_VAR_DECL %s %d store %p\n",
1507                 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1508          */
1509          assert(n->Var->aux == n->Store);
1510       }
1511       if (emitInfo->EmitComments) {
1512          /* emit NOP with comment describing the variable's storage location */
1513          char s[1000];
1514          sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
1515                  n->Store->Index,
1516                  _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
1517                  (n->Var ? (char *) n->Var->a_name : "anonymous"),
1518                  n->Store->Size);
1519          inst = emit_comment(emitInfo, s);
1520          return inst;
1521       }
1522       return NULL;
1523
1524    case IR_VAR:
1525       /* Reference to a variable
1526        * Storage should have already been resolved/allocated.
1527        */
1528       assert(n->Store);
1529       assert(n->Store->File != PROGRAM_UNDEFINED);
1530
1531       if (n->Store->File == PROGRAM_STATE_VAR &&
1532           n->Store->Index < 0) {
1533          n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1534       }
1535
1536       if (n->Store->Index < 0) {
1537          printf("#### VAR %s not allocated!\n", (char*)n->Var->a_name);
1538       }
1539       assert(n->Store->Index >= 0);
1540       assert(n->Store->Size > 0);
1541       break;
1542
1543    case IR_ELEMENT:
1544       return emit_array_element(emitInfo, n);
1545    case IR_FIELD:
1546       return emit_struct_field(emitInfo, n);
1547    case IR_SWIZZLE:
1548       return emit_swizzle(emitInfo, n);
1549
1550    case IR_I_TO_F:
1551       /* just move */
1552       emit(emitInfo, n->Children[0]);
1553       inst = new_instruction(emitInfo, OPCODE_MOV);
1554       if (!n->Store) {
1555          if (!alloc_temp_storage(emitInfo, n, 1))
1556             return NULL;
1557       }
1558       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1559       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1560       if (emitInfo->EmitComments)
1561          inst->Comment = _mesa_strdup("int to float");
1562       return NULL;
1563
1564    /* Simple arithmetic */
1565    /* unary */
1566    case IR_RSQ:
1567    case IR_RCP:
1568    case IR_FLOOR:
1569    case IR_FRAC:
1570    case IR_F_TO_I:
1571    case IR_ABS:
1572    case IR_SIN:
1573    case IR_COS:
1574    case IR_DDX:
1575    case IR_DDY:
1576    case IR_NOISE1:
1577    case IR_NOISE2:
1578    case IR_NOISE3:
1579    case IR_NOISE4:
1580    /* binary */
1581    case IR_ADD:
1582    case IR_SUB:
1583    case IR_MUL:
1584    case IR_DOT4:
1585    case IR_DOT3:
1586    case IR_CROSS:
1587    case IR_MIN:
1588    case IR_MAX:
1589    case IR_SEQUAL:
1590    case IR_SNEQUAL:
1591    case IR_SGE:
1592    case IR_SGT:
1593    case IR_SLE:
1594    case IR_SLT:
1595    case IR_POW:
1596    case IR_EXP:
1597    case IR_EXP2:
1598    /* trinary operators */
1599    case IR_LRP:
1600       return emit_arith(emitInfo, n);
1601
1602    case IR_EQUAL:
1603    case IR_NOTEQUAL:
1604       return emit_compare(emitInfo, n);
1605
1606    case IR_CLAMP:
1607       return emit_clamp(emitInfo, n);
1608    case IR_TEX:
1609    case IR_TEXB:
1610    case IR_TEXP:
1611       return emit_tex(emitInfo, n);
1612    case IR_NEG:
1613       return emit_negation(emitInfo, n);
1614    case IR_FLOAT:
1615       /* find storage location for this float constant */
1616       n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
1617                                                    n->Value,
1618                                                    n->Store->Size,
1619                                                    &n->Store->Swizzle);
1620       if (n->Store->Index < 0) {
1621          slang_info_log_error(emitInfo->log, "Ran out of space for constants");
1622          return NULL;
1623       }
1624       return NULL;
1625
1626    case IR_MOVE:
1627       return emit_move(emitInfo, n);
1628
1629    case IR_COND:
1630       return emit_cond(emitInfo, n);
1631
1632    case IR_NOT:
1633       return emit_not(emitInfo, n);
1634
1635    case IR_LABEL:
1636       return emit_label(emitInfo, n);
1637
1638    case IR_KILL:
1639       return emit_kill(emitInfo);
1640
1641    case IR_FUNC:
1642       /* new variable scope for subroutines/function calls*/
1643       _slang_push_var_table(emitInfo->vt);
1644       inst = emit_func(emitInfo, n);
1645       _slang_pop_var_table(emitInfo->vt);
1646       return inst;
1647
1648    case IR_IF:
1649       return emit_if(emitInfo, n);
1650
1651    case IR_LOOP:
1652       return emit_loop(emitInfo, n);
1653    case IR_BREAK_IF_FALSE:
1654    case IR_CONT_IF_FALSE:
1655       return emit_cont_break_if(emitInfo, n, GL_FALSE);
1656    case IR_BREAK_IF_TRUE:
1657    case IR_CONT_IF_TRUE:
1658       return emit_cont_break_if(emitInfo, n, GL_TRUE);
1659    case IR_BREAK:
1660       /* fall-through */
1661    case IR_CONT:
1662       return emit_cont_break(emitInfo, n);
1663
1664    case IR_BEGIN_SUB:
1665       return new_instruction(emitInfo, OPCODE_BGNSUB);
1666    case IR_END_SUB:
1667       return new_instruction(emitInfo, OPCODE_ENDSUB);
1668    case IR_RETURN:
1669       return emit_return(emitInfo, n);
1670
1671    case IR_NOP:
1672       return NULL;
1673
1674    default:
1675       _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
1676    }
1677    return NULL;
1678 }
1679
1680
1681 /**
1682  * After code generation, any subroutines will be in separate program
1683  * objects.  This function appends all the subroutines onto the main
1684  * program and resolves the linking of all the branch/call instructions.
1685  * XXX this logic should really be part of the linking process...
1686  */
1687 static void
1688 _slang_resolve_subroutines(slang_emit_info *emitInfo)
1689 {
1690    GET_CURRENT_CONTEXT(ctx);
1691    struct gl_program *mainP = emitInfo->prog;
1692    GLuint *subroutineLoc, i, total;
1693
1694    subroutineLoc
1695       = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
1696
1697    /* total number of instructions */
1698    total = mainP->NumInstructions;
1699    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1700       subroutineLoc[i] = total;
1701       total += emitInfo->Subroutines[i]->NumInstructions;
1702    }
1703
1704    /* adjust BrancTargets within the functions */
1705    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1706       struct gl_program *sub = emitInfo->Subroutines[i];
1707       GLuint j;
1708       for (j = 0; j < sub->NumInstructions; j++) {
1709          struct prog_instruction *inst = sub->Instructions + j;
1710          if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
1711             inst->BranchTarget += subroutineLoc[i];
1712          }
1713       }
1714    }
1715
1716    /* append subroutines' instructions after main's instructions */
1717    mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
1718                                                     mainP->NumInstructions,
1719                                                     total);
1720    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1721       struct gl_program *sub = emitInfo->Subroutines[i];
1722       _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
1723                               sub->Instructions,
1724                               sub->NumInstructions);
1725       /* delete subroutine code */
1726       sub->Parameters = NULL; /* prevent double-free */
1727       _mesa_delete_program(ctx, sub);
1728    }
1729    mainP->NumInstructions = total;
1730
1731    /* Examine CAL instructions.
1732     * At this point, the BranchTarget field of the CAL instructions is
1733     * the number/id of the subroutine to call (an index into the
1734     * emitInfo->Subroutines list).
1735     * Translate that into an actual instruction location now.
1736     */
1737    for (i = 0; i < mainP->NumInstructions; i++) {
1738       struct prog_instruction *inst = mainP->Instructions + i;
1739       if (inst->Opcode == OPCODE_CAL) {
1740          const GLuint f = inst->BranchTarget;
1741          inst->BranchTarget = subroutineLoc[f];
1742       }
1743    }
1744
1745    _mesa_free(subroutineLoc);
1746 }
1747
1748
1749
1750
1751 GLboolean
1752 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
1753                  struct gl_program *prog, GLboolean withEnd,
1754                  slang_info_log *log)
1755 {
1756    GET_CURRENT_CONTEXT(ctx);
1757    GLboolean success;
1758    slang_emit_info emitInfo;
1759
1760    emitInfo.log = log;
1761    emitInfo.vt = vt;
1762    emitInfo.prog = prog;
1763    emitInfo.Subroutines = NULL;
1764    emitInfo.NumSubroutines = 0;
1765
1766    emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
1767    emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
1768    emitInfo.EmitComments = ctx->Shader.EmitComments;
1769    emitInfo.EmitBeginEndSub = 0;  /* XXX for compiler debug only */
1770
1771    if (!emitInfo.EmitCondCodes) {
1772       emitInfo.EmitHighLevelInstructions = GL_TRUE;
1773    }
1774
1775    (void) emit(&emitInfo, n);
1776
1777    /* finish up by adding the END opcode to program */
1778    if (withEnd) {
1779       struct prog_instruction *inst;
1780       inst = new_instruction(&emitInfo, OPCODE_END);
1781    }
1782
1783    _slang_resolve_subroutines(&emitInfo);
1784
1785    success = GL_TRUE;
1786
1787 #if 0
1788    printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
1789    _mesa_print_program(prog);
1790    _mesa_print_program_parameters(ctx,prog);
1791 #endif
1792
1793    return success;
1794 }