2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
35 #include "prog_instruction.h"
36 #include "prog_parameter.h"
37 #include "prog_print.h"
38 #include "slang_emit.h"
39 #include "slang_error.h"
42 #define PEEPHOLE_OPTIMIZATIONS 1
46 static GLboolean EmitHighLevelInstructions
= GL_TRUE
;
50 * Assembly and IR info
54 slang_ir_opcode IrOpcode
;
56 gl_inst_opcode InstOpcode
;
57 GLuint ResultSize
, NumParams
;
62 static const slang_ir_info IrInfo
[] = {
64 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
65 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
66 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
67 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
68 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
69 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
70 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
71 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
72 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
73 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
74 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
75 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
76 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
77 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
78 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
79 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
81 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
82 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
83 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
84 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
85 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
86 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
87 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
88 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
89 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
90 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
91 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
92 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
93 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
94 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
95 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
96 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
97 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
98 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
99 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
102 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
103 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
104 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
105 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
106 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
107 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
108 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
109 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
110 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
111 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
112 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
113 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
114 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
115 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
116 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
117 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
118 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
119 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 },
120 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
121 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
122 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
123 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
127 static const slang_ir_info
*
128 slang_find_ir_info(slang_ir_opcode opcode
)
131 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
132 if (IrInfo
[i
].IrOpcode
== opcode
) {
140 slang_ir_name(slang_ir_opcode opcode
)
142 return slang_find_ir_info(opcode
)->IrName
;
147 * Swizzle a swizzle. That is, return swz2(swz1)
150 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
153 for (i
= 0; i
< 4; i
++) {
154 GLuint c
= GET_SWZ(swz2
, i
);
155 s
[i
] = GET_SWZ(swz1
, c
);
157 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
163 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
165 slang_ir_storage
*st
;
166 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
171 st
->Swizzle
= SWIZZLE_NOOP
;
178 swizzle_string(GLuint swizzle
)
183 for (i
= 1; i
< 5; i
++) {
184 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
191 writemask_string(GLuint writemask
)
196 for (i
= 0; i
< 4; i
++) {
197 if (writemask
& (1 << i
))
205 storage_string(const slang_ir_storage
*st
)
207 static const char *files
[] = {
225 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
227 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
228 st
->Index
+ st
->Size
- 1);
230 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
231 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
246 slang_print_ir(const slang_ir_node
*n
, int indent
)
251 if (n
->Opcode
!= IR_SEQ
)
253 printf("%3d:", indent
);
260 printf("SEQ at %p\n", (void*) n
);
262 assert(n
->Children
[0]);
263 assert(n
->Children
[1]);
264 slang_print_ir(n
->Children
[0], indent
+ IND
);
265 slang_print_ir(n
->Children
[1], indent
+ IND
);
268 printf("NEW SCOPE\n");
269 assert(!n
->Children
[1]);
270 slang_print_ir(n
->Children
[0], indent
+ 3);
273 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
274 slang_print_ir(n
->Children
[0], indent
+3);
275 slang_print_ir(n
->Children
[1], indent
+3);
278 printf("LABEL: %s\n", n
->Target
);
282 slang_print_ir(n
->Children
[0], indent
+ 3);
285 printf("JUMP %s\n", n
->Target
);
288 printf("CJUMP0 %s\n", n
->Target
);
289 slang_print_ir(n
->Children
[0], indent
+3);
292 printf("CJUMP1 %s\n", n
->Target
);
293 slang_print_ir(n
->Children
[0], indent
+3);
298 slang_print_ir(n
->Children
[0], indent
+3);
301 slang_print_ir(n
->Children
[1], indent
+3);
302 if (n
->Children
[2]) {
305 slang_print_ir(n
->Children
[2], indent
+3);
311 printf("BEGIN_SUB\n");
325 slang_print_ir(n
->Children
[0], indent
+3);
335 case IR_BREAK_IF_FALSE
:
336 printf("BREAK_IF_FALSE\n");
337 slang_print_ir(n
->Children
[0], indent
+3);
339 case IR_BREAK_IF_TRUE
:
340 printf("BREAK_IF_TRUE\n");
341 slang_print_ir(n
->Children
[0], indent
+3);
345 printf("VAR %s%s at %s store %p\n",
346 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
347 swizzle_string(n
->Store
->Swizzle
),
348 storage_string(n
->Store
), (void*) n
->Store
);
351 printf("VAR_DECL %s (%p) at %s store %p\n",
352 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
353 (void*) n
->Var
, storage_string(n
->Store
),
357 printf("FIELD %s of\n", n
->Target
);
358 slang_print_ir(n
->Children
[0], indent
+3);
361 printf("FLOAT %f %f %f %f\n",
362 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
365 printf("INT_TO_FLOAT %d\n", (int) n
->Value
[0]);
368 printf("SWIZZLE %s of (store %p) \n",
369 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
370 slang_print_ir(n
->Children
[0], indent
+ 3);
373 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
374 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
375 slang_print_ir(n
->Children
[0], indent
+3);
376 slang_print_ir(n
->Children
[1], indent
+3);
382 * Allocate temporary storage for an intermediate result (such as for
383 * a multiply or add, etc.
386 alloc_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
, GLint size
)
391 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
392 if (!_slang_alloc_temp(vt
, n
->Store
)) {
393 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
400 * Free temporary storage, if n->Store is, in fact, temp storage.
404 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
406 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
407 if (_slang_is_temp(vt
, n
->Store
)) {
408 _slang_free_temp(vt
, n
->Store
);
409 n
->Store
->Index
= -1;
417 * Convert IR storage to an instruction dst register.
420 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
423 static const GLuint defaultWritemask
[4] = {
425 WRITEMASK_X
| WRITEMASK_Y
,
426 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
427 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
429 assert(st
->Index
>= 0 && st
->Index
<= 16);
430 dst
->File
= st
->File
;
431 dst
->Index
= st
->Index
;
432 assert(st
->File
!= PROGRAM_UNDEFINED
);
433 assert(st
->Size
>= 1);
434 assert(st
->Size
<= 4);
436 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
438 assert(writemask
& WRITEMASK_X
);
439 dst
->WriteMask
= WRITEMASK_X
<< comp
;
442 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
448 * Convert IR storage to an instruction src register.
451 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
453 static const GLuint defaultSwizzle
[4] = {
454 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
455 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
456 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
457 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
459 assert(st
->File
>= 0 && st
->File
<= 16);
460 src
->File
= st
->File
;
461 src
->Index
= st
->Index
;
462 assert(st
->File
!= PROGRAM_UNDEFINED
);
463 assert(st
->Size
>= 1);
464 assert(st
->Size
<= 4);
465 if (st
->Swizzle
!= SWIZZLE_NOOP
)
466 src
->Swizzle
= st
->Swizzle
;
468 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
470 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
471 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
472 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
473 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
479 * Add new instruction at end of given program.
480 * \param prog the program to append instruction onto
481 * \param opcode opcode for the new instruction
482 * \return pointer to the new instruction
484 static struct prog_instruction
*
485 new_instruction(struct gl_program
*prog
, gl_inst_opcode opcode
)
487 struct prog_instruction
*inst
;
488 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
489 prog
->NumInstructions
,
490 prog
->NumInstructions
+ 1);
491 inst
= prog
->Instructions
+ prog
->NumInstructions
;
492 prog
->NumInstructions
++;
493 _mesa_init_instructions(inst
, 1);
494 inst
->Opcode
= opcode
;
495 inst
->BranchTarget
= -1; /* invalid */
501 * Return pointer to last instruction in program.
503 static struct prog_instruction
*
504 prev_instruction(struct gl_program
*prog
)
506 if (prog
->NumInstructions
== 0)
509 return prog
->Instructions
+ prog
->NumInstructions
- 1;
513 static struct prog_instruction
*
514 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
);
518 * Return an annotation string for given node's storage.
521 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
524 const slang_ir_storage
*st
= n
->Store
;
525 static char s
[100] = "";
528 return _mesa_strdup("");
531 case PROGRAM_CONSTANT
:
532 if (st
->Index
>= 0) {
533 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
534 if (st
->Swizzle
== SWIZZLE_NOOP
)
535 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
537 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
541 case PROGRAM_TEMPORARY
:
543 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
545 sprintf(s
, "t[%d]", st
->Index
);
547 case PROGRAM_STATE_VAR
:
548 case PROGRAM_UNIFORM
:
549 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
551 case PROGRAM_VARYING
:
552 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
555 sprintf(s
, "input[%d]", st
->Index
);
558 sprintf(s
, "output[%d]", st
->Index
);
563 return _mesa_strdup(s
);
571 * Return an annotation string for an instruction.
574 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
575 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
578 const char *operator;
583 len
+= strlen(dstAnnot
);
585 dstAnnot
= _mesa_strdup("");
588 len
+= strlen(srcAnnot0
);
590 srcAnnot0
= _mesa_strdup("");
593 len
+= strlen(srcAnnot1
);
595 srcAnnot1
= _mesa_strdup("");
598 len
+= strlen(srcAnnot2
);
600 srcAnnot2
= _mesa_strdup("");
631 s
= (char *) malloc(len
);
632 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
633 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
634 assert(_mesa_strlen(s
) < len
);
650 * Generate code for a simple arithmetic instruction.
651 * Either 1, 2 or 3 operands.
653 static struct prog_instruction
*
654 emit_arith(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
656 struct prog_instruction
*inst
;
657 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
658 char *srcAnnot
[3], *dstAnnot
;
662 assert(info
->InstOpcode
!= OPCODE_NOP
);
664 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
666 #if PEEPHOLE_OPTIMIZATIONS
667 /* Look for MAD opportunity */
668 if (info
->NumParams
== 2 &&
669 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
670 /* found pattern IR_ADD(IR_MUL(A, B), C) */
671 emit(vt
, n
->Children
[0]->Children
[0], prog
); /* A */
672 emit(vt
, n
->Children
[0]->Children
[1], prog
); /* B */
673 emit(vt
, n
->Children
[1], prog
); /* C */
674 /* generate MAD instruction */
675 inst
= new_instruction(prog
, OPCODE_MAD
);
676 /* operands: A, B, C: */
677 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
678 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
679 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
680 free_temp_storage(vt
, n
->Children
[0]->Children
[0]);
681 free_temp_storage(vt
, n
->Children
[0]->Children
[1]);
682 free_temp_storage(vt
, n
->Children
[1]);
684 else if (info
->NumParams
== 2 &&
685 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
686 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
687 emit(vt
, n
->Children
[0], prog
); /* A */
688 emit(vt
, n
->Children
[1]->Children
[0], prog
); /* B */
689 emit(vt
, n
->Children
[1]->Children
[1], prog
); /* C */
690 /* generate MAD instruction */
691 inst
= new_instruction(prog
, OPCODE_MAD
);
692 /* operands: B, C, A */
693 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
694 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
695 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
696 free_temp_storage(vt
, n
->Children
[1]->Children
[0]);
697 free_temp_storage(vt
, n
->Children
[1]->Children
[1]);
698 free_temp_storage(vt
, n
->Children
[0]);
705 /* gen code for children */
706 for (i
= 0; i
< info
->NumParams
; i
++)
707 emit(vt
, n
->Children
[i
], prog
);
709 /* gen this instruction and src registers */
710 inst
= new_instruction(prog
, info
->InstOpcode
);
711 for (i
= 0; i
< info
->NumParams
; i
++)
712 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
715 for (i
= 0; i
< info
->NumParams
; i
++)
716 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], prog
);
719 for (i
= 0; i
< info
->NumParams
; i
++)
720 free_temp_storage(vt
, n
->Children
[i
]);
725 if (!alloc_temp_storage(vt
, n
, info
->ResultSize
))
728 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
730 dstAnnot
= storage_annotation(n
, prog
);
732 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
733 srcAnnot
[1], srcAnnot
[2]);
735 /*_mesa_print_instruction(inst);*/
741 * Generate code for an IR_CLAMP instruction.
743 static struct prog_instruction
*
744 emit_clamp(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
746 struct prog_instruction
*inst
;
748 assert(n
->Opcode
== IR_CLAMP
);
754 inst
= emit(vt
, n
->Children
[0], prog
);
756 /* If lower limit == 0.0 and upper limit == 1.0,
757 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
759 * emit OPCODE_MIN, OPCODE_MAX sequence.
762 /* XXX this isn't quite finished yet */
763 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
764 n
->Children
[1]->Value
[0] == 0.0 &&
765 n
->Children
[1]->Value
[1] == 0.0 &&
766 n
->Children
[1]->Value
[2] == 0.0 &&
767 n
->Children
[1]->Value
[3] == 0.0 &&
768 n
->Children
[2]->Opcode
== IR_FLOAT
&&
769 n
->Children
[2]->Value
[0] == 1.0 &&
770 n
->Children
[2]->Value
[1] == 1.0 &&
771 n
->Children
[2]->Value
[2] == 1.0 &&
772 n
->Children
[2]->Value
[3] == 1.0) {
774 inst
= prev_instruction(prog
);
776 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
777 /* and prev instruction's DstReg matches n->Children[0]->Store */
778 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
779 n
->Store
= n
->Children
[0]->Store
;
786 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
789 emit(vt
, n
->Children
[1], prog
);
790 emit(vt
, n
->Children
[2], prog
);
792 /* tmp = max(ch[0], ch[1]) */
793 inst
= new_instruction(prog
, OPCODE_MAX
);
794 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
795 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
796 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
798 /* tmp = min(tmp, ch[2]) */
799 inst
= new_instruction(prog
, OPCODE_MIN
);
800 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
801 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
802 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
808 static struct prog_instruction
*
809 emit_negation(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
811 /* Implement as MOV dst, -src; */
812 /* XXX we could look at the previous instruction and in some circumstances
813 * modify it to accomplish the negation.
815 struct prog_instruction
*inst
;
817 emit(vt
, n
->Children
[0], prog
);
820 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
823 inst
= new_instruction(prog
, OPCODE_MOV
);
824 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
825 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
826 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
827 inst
->Comment
= n
->Comment
;
832 static struct prog_instruction
*
833 emit_label(const char *target
, struct gl_program
*prog
)
835 struct prog_instruction
*inst
;
836 inst
= new_instruction(prog
, OPCODE_NOP
);
837 inst
->Comment
= _mesa_strdup(target
);
842 static struct prog_instruction
*
843 emit_cjump(const char *target
, struct gl_program
*prog
, GLuint zeroOrOne
)
845 struct prog_instruction
*inst
;
846 inst
= new_instruction(prog
, OPCODE_BRA
);
848 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
850 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
851 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
852 inst
->Comment
= _mesa_strdup(target
);
857 static struct prog_instruction
*
858 emit_jump(const char *target
, struct gl_program
*prog
)
860 struct prog_instruction
*inst
;
861 inst
= new_instruction(prog
, OPCODE_BRA
);
862 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
863 /*inst->DstReg.CondSwizzle = SWIZZLE_X;*/
864 inst
->Comment
= _mesa_strdup(target
);
869 static struct prog_instruction
*
870 emit_kill(struct gl_program
*prog
)
872 struct prog_instruction
*inst
;
873 /* NV-KILL - discard fragment depending on condition code.
874 * Note that ARB-KILL depends on sign of vector operand.
876 inst
= new_instruction(prog
, OPCODE_KIL_NV
);
877 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
882 static struct prog_instruction
*
883 emit_tex(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
885 struct prog_instruction
*inst
;
886 if (n
->Opcode
== IR_TEX
) {
887 inst
= new_instruction(prog
, OPCODE_TEX
);
889 else if (n
->Opcode
== IR_TEXB
) {
890 inst
= new_instruction(prog
, OPCODE_TXB
);
893 assert(n
->Opcode
== IR_TEXP
);
894 inst
= new_instruction(prog
, OPCODE_TXP
);
898 if (!alloc_temp_storage(vt
, n
, 4))
901 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
903 (void) emit(vt
, n
->Children
[1], prog
);
905 /* Child[1] is the coord */
906 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
908 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
909 assert(n
->Children
[0]->Store
);
910 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
912 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
913 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
914 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
915 * link time, using the sampler uniform's value.
921 static struct prog_instruction
*
922 emit_move(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
924 struct prog_instruction
*inst
;
927 assert(n
->Children
[1]);
928 inst
= emit(vt
, n
->Children
[1], prog
);
930 assert(n
->Children
[1]->Store
->Index
>= 0);
933 emit(vt
, n
->Children
[0], prog
);
936 n
->Store
= n
->Children
[0]->Store
;
938 #if PEEPHOLE_OPTIMIZATIONS
939 if (inst
&& _slang_is_temp(vt
, n
->Children
[1]->Store
)) {
940 /* Peephole optimization:
941 * Just modify the RHS to put its result into the dest of this
942 * MOVE operation. Then, this MOVE is a no-op.
944 _slang_free_temp(vt
, n
->Children
[1]->Store
);
945 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
946 /* fixup the prev (RHS) instruction */
947 assert(n
->Children
[0]->Store
->Index
>= 0);
948 assert(n
->Children
[0]->Store
->Index
< 16);
949 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
955 if (n
->Children
[0]->Store
->Size
> 4) {
956 /* move matrix/struct etc (block of registers) */
957 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
958 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
959 GLint size
= srcStore
.Size
;
960 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
961 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
965 inst
= new_instruction(prog
, OPCODE_MOV
);
966 inst
->Comment
= _mesa_strdup("IR_MOVE block");
967 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
968 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
975 /* single register move */
976 char *srcAnnot
, *dstAnnot
;
977 inst
= new_instruction(prog
, OPCODE_MOV
);
978 assert(n
->Children
[0]->Store
->Index
>= 0);
979 assert(n
->Children
[0]->Store
->Index
< 16);
980 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
981 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
982 dstAnnot
= storage_annotation(n
->Children
[0], prog
);
983 srcAnnot
= storage_annotation(n
->Children
[1], prog
);
984 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
985 srcAnnot
, NULL
, NULL
);
987 free_temp_storage(vt
, n
->Children
[1]);
993 static struct prog_instruction
*
994 emit_cond(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
996 /* Conditional expression (in if/while/for stmts).
997 * Need to update condition code register.
998 * Next instruction is typically an IR_CJUMP0/1.
1000 /* last child expr instruction: */
1001 struct prog_instruction
*inst
= emit(vt
, n
->Children
[0], prog
);
1003 /* set inst's CondUpdate flag */
1004 inst
->CondUpdate
= GL_TRUE
;
1005 return inst
; /* XXX or null? */
1008 /* This'll happen for things like "if (i) ..." where no code
1009 * is normally generated for the expression "i".
1010 * Generate a move instruction just to set condition codes.
1011 * Note: must use full 4-component vector since all four
1012 * condition codes must be set identically.
1014 if (!alloc_temp_storage(vt
, n
, 4))
1016 inst
= new_instruction(prog
, OPCODE_MOV
);
1017 inst
->CondUpdate
= GL_TRUE
;
1018 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1019 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1020 _slang_free_temp(vt
, n
->Store
);
1021 inst
->Comment
= _mesa_strdup("COND expr");
1022 return inst
; /* XXX or null? */
1030 static struct prog_instruction
*
1031 emit_not(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1034 slang_ir_storage st
;
1035 struct prog_instruction
*inst
;
1037 /* need zero constant */
1038 st
.File
= PROGRAM_CONSTANT
;
1040 st
.Index
= _mesa_add_unnamed_constant(prog
->Parameters
, &zero
,
1044 (void) emit(vt
, n
->Children
[0], prog
);
1045 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1048 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
1051 inst
= new_instruction(prog
, OPCODE_SEQ
);
1052 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1053 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1054 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1056 free_temp_storage(vt
, n
->Children
[0]);
1058 inst
->Comment
= _mesa_strdup("NOT");
1063 static struct prog_instruction
*
1064 emit_if(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1066 struct prog_instruction
*ifInst
;
1067 GLuint ifInstLoc
, elseInstLoc
;
1069 emit(vt
, n
->Children
[0], prog
); /* the condition */
1070 ifInstLoc
= prog
->NumInstructions
;
1071 if (EmitHighLevelInstructions
) {
1072 ifInst
= new_instruction(prog
, OPCODE_IF
);
1073 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1074 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1077 /* conditional jump to else, or endif */
1078 ifInst
= new_instruction(prog
, OPCODE_BRA
);
1079 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1080 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1081 ifInst
->Comment
= _mesa_strdup("if zero");
1085 emit(vt
, n
->Children
[1], prog
);
1087 if (n
->Children
[2]) {
1088 /* have else body */
1089 elseInstLoc
= prog
->NumInstructions
;
1090 if (EmitHighLevelInstructions
) {
1091 (void) new_instruction(prog
, OPCODE_ELSE
);
1094 /* jump to endif instruction */
1095 struct prog_instruction
*inst
;
1096 inst
= new_instruction(prog
, OPCODE_BRA
);
1097 inst
->Comment
= _mesa_strdup("else");
1098 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1100 ifInst
= prog
->Instructions
+ ifInstLoc
;
1101 ifInst
->BranchTarget
= prog
->NumInstructions
;
1103 emit(vt
, n
->Children
[2], prog
);
1107 ifInst
= prog
->Instructions
+ ifInstLoc
;
1108 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1111 if (EmitHighLevelInstructions
) {
1112 (void) new_instruction(prog
, OPCODE_ENDIF
);
1115 if (n
->Children
[2]) {
1116 struct prog_instruction
*elseInst
;
1117 elseInst
= prog
->Instructions
+ elseInstLoc
;
1118 elseInst
->BranchTarget
= prog
->NumInstructions
;
1124 static struct prog_instruction
*
1125 emit_loop(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1127 struct prog_instruction
*beginInst
, *endInst
;
1128 GLuint beginInstLoc
, endInstLoc
;
1131 /* emit OPCODE_BGNLOOP */
1132 beginInstLoc
= prog
->NumInstructions
;
1133 if (EmitHighLevelInstructions
) {
1134 (void) new_instruction(prog
, OPCODE_BGNLOOP
);
1138 emit(vt
, n
->Children
[0], prog
);
1140 endInstLoc
= prog
->NumInstructions
;
1141 if (EmitHighLevelInstructions
) {
1142 /* emit OPCODE_ENDLOOP */
1143 endInst
= new_instruction(prog
, OPCODE_ENDLOOP
);
1146 /* emit unconditional BRA-nch */
1147 endInst
= new_instruction(prog
, OPCODE_BRA
);
1148 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1150 /* end instruction's BranchTarget points to top of loop */
1151 endInst
->BranchTarget
= beginInstLoc
;
1153 if (EmitHighLevelInstructions
) {
1154 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1155 beginInst
= prog
->Instructions
+ beginInstLoc
;
1156 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1159 /* Done emitting loop code. Now walk over the loop's linked list of
1160 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1161 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1163 for (ir
= n
->BranchNode
; ir
; ir
= ir
->BranchNode
) {
1164 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1165 assert(inst
->BranchTarget
< 0);
1166 if (ir
->Opcode
== IR_BREAK
||
1167 ir
->Opcode
== IR_BREAK_IF_FALSE
||
1168 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1169 assert(inst
->Opcode
== OPCODE_BRK
||
1170 inst
->Opcode
== OPCODE_BRA
);
1171 /* go to instruction after end of loop */
1172 inst
->BranchTarget
= endInstLoc
+ 1;
1175 assert(ir
->Opcode
== IR_CONT
||
1176 ir
->Opcode
== IR_CONT_IF_FALSE
||
1177 ir
->Opcode
== IR_CONT_IF_TRUE
);
1178 assert(inst
->Opcode
== OPCODE_CONT
||
1179 inst
->Opcode
== OPCODE_BRA
);
1180 /* to go instruction at top of loop */
1181 inst
->BranchTarget
= beginInstLoc
;
1189 * "Continue" or "break" statement.
1190 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1192 static struct prog_instruction
*
1193 emit_cont_break(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1195 gl_inst_opcode opcode
;
1196 struct prog_instruction
*inst
;
1197 n
->InstLocation
= prog
->NumInstructions
;
1198 if (EmitHighLevelInstructions
) {
1199 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1202 opcode
= OPCODE_BRA
;
1204 inst
= new_instruction(prog
, opcode
);
1205 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1211 * Conditional "continue" or "break" statement.
1212 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1214 static struct prog_instruction
*
1215 emit_cont_break_if(slang_var_table
*vt
, slang_ir_node
*n
,
1216 struct gl_program
*prog
, GLboolean breakTrue
)
1218 gl_inst_opcode opcode
;
1219 struct prog_instruction
*inst
;
1221 /* evaluate condition expr, setting cond codes */
1222 inst
= emit(vt
, n
->Children
[0], prog
);
1224 inst
->CondUpdate
= GL_TRUE
;
1226 n
->InstLocation
= prog
->NumInstructions
;
1227 if (EmitHighLevelInstructions
) {
1228 if (n
->Opcode
== IR_CONT_IF_TRUE
||
1229 n
->Opcode
== IR_CONT_IF_FALSE
)
1230 opcode
= OPCODE_CONT
;
1232 opcode
= OPCODE_BRK
;
1235 opcode
= OPCODE_BRA
;
1237 inst
= new_instruction(prog
, opcode
);
1238 inst
->DstReg
.CondMask
= breakTrue
? COND_NE
: COND_EQ
;
1245 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1246 * Ex: fix_swizzle("zyNN") -> "zyyy"
1249 fix_swizzle(GLuint swizzle
)
1252 for (i
= 0; i
< 4; i
++) {
1253 swz
[i
] = GET_SWZ(swizzle
, i
);
1254 if (swz
[i
] == SWIZZLE_NIL
) {
1255 swz
[i
] = swz
[i
- 1];
1258 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1262 static struct prog_instruction
*
1263 emit_swizzle(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1267 /* swizzled storage access */
1268 (void) emit(vt
, n
->Children
[0], prog
);
1270 /* "pull-up" the child's storage info, applying our swizzle info */
1271 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1272 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1273 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1274 /*n->Var = n->Children[0]->Var; XXX for debug */
1275 assert(n
->Store
->Index
>= 0);
1277 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1280 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1281 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1282 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1283 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1284 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1288 /* apply this swizzle to child's swizzle to get composed swizzle */
1289 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1295 static struct prog_instruction
*
1296 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1298 struct prog_instruction
*inst
;
1302 switch (n
->Opcode
) {
1304 /* sequence of two sub-trees */
1305 assert(n
->Children
[0]);
1306 assert(n
->Children
[1]);
1307 emit(vt
, n
->Children
[0], prog
);
1308 inst
= emit(vt
, n
->Children
[1], prog
);
1310 n
->Store
= n
->Children
[1]->Store
;
1314 /* new variable scope */
1315 _slang_push_var_table(vt
);
1316 inst
= emit(vt
, n
->Children
[0], prog
);
1317 _slang_pop_var_table(vt
);
1321 /* Variable declaration - allocate a register for it */
1323 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1324 assert(n
->Store
->Size
> 0);
1325 assert(n
->Store
->Index
< 0);
1326 if (!n
->Var
|| n
->Var
->isTemp
) {
1327 /* a nameless/temporary variable, will be freed after first use */
1328 if (!_slang_alloc_temp(vt
, n
->Store
))
1329 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
1332 /* a regular variable */
1333 _slang_add_variable(vt
, n
->Var
);
1334 if (!_slang_alloc_var(vt
, n
->Store
))
1335 RETURN_ERROR("Ran out of registers, too many variables", 0);
1337 printf("IR_VAR_DECL %s %d store %p\n",
1338 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1340 assert(n
->Var
->aux
== n
->Store
);
1345 /* Reference to a variable
1346 * Storage should have already been resolved/allocated.
1349 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1350 if (n
->Store
->Index
< 0) {
1351 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1353 assert(n
->Store
->Index
>= 0);
1354 assert(n
->Store
->Size
> 0);
1358 /* Dereference array element. Just resolve storage for the array
1359 * element represented by this node.
1362 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1363 assert(n
->Store
->Size
> 0);
1364 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1365 /* OK, constant index */
1366 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1367 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1368 n
->Store
->Index
= arrayAddr
+ index
;
1371 /* Problem: variable index */
1372 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1373 const GLint index
= 0;
1374 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1375 n
->Store
->Index
= arrayAddr
+ index
;
1377 return NULL
; /* no instruction */
1380 return emit_swizzle(vt
, n
, prog
);
1382 /* Simple arithmetic */
1414 /* trinary operators */
1416 return emit_arith(vt
, n
, prog
);
1418 return emit_clamp(vt
, n
, prog
);
1422 return emit_tex(vt
, n
, prog
);
1424 return emit_negation(vt
, n
, prog
);
1426 /* find storage location for this float constant */
1427 n
->Store
->Index
= _mesa_add_unnamed_constant(prog
->Parameters
, n
->Value
,
1429 &n
->Store
->Swizzle
);
1430 if (n
->Store
->Index
< 0) {
1431 RETURN_ERROR("Ran out of space for constants.", 0);
1436 return emit_move(vt
, n
, prog
);
1439 return emit_cond(vt
, n
, prog
);
1442 return emit_not(vt
, n
, prog
);
1445 return emit_label(n
->Target
, prog
);
1447 return emit_jump(n
->Target
, prog
);
1449 return emit_cjump(n
->Target
, prog
, 0);
1451 return emit_cjump(n
->Target
, prog
, 1);
1453 return emit_kill(prog
);
1456 return emit_if(vt
, n
, prog
);
1459 return emit_loop(vt
, n
, prog
);
1460 case IR_BREAK_IF_FALSE
:
1461 case IR_CONT_IF_FALSE
:
1462 return emit_cont_break_if(vt
, n
, prog
, GL_FALSE
);
1463 case IR_BREAK_IF_TRUE
:
1464 case IR_CONT_IF_TRUE
:
1465 return emit_cont_break_if(vt
, n
, prog
, GL_TRUE
);
1469 return emit_cont_break(vt
, n
, prog
);
1472 return new_instruction(prog
, OPCODE_BGNSUB
);
1474 return new_instruction(prog
, OPCODE_ENDSUB
);
1476 return new_instruction(prog
, OPCODE_RET
);
1482 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1490 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1491 struct gl_program
*prog
, GLboolean withEnd
)
1495 if (emit(vt
, n
, prog
)) {
1496 /* finish up by adding the END opcode to program */
1498 struct prog_instruction
*inst
;
1499 inst
= new_instruction(prog
, OPCODE_END
);
1504 /* record an error? */
1508 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1510 _mesa_print_program(prog
);
1511 _mesa_print_program_parameters(ctx
,prog
);