src/mesa/shader/slang/slang_emit.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2005-2008  Brian Paul   All Rights Reserved.
   5  * Copyright (C) 2008 VMware, Inc.   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file slang_emit.c
  27  * Emit program instructions (PI code) from IR trees.
  28  * \author Brian Paul
  29  */
  30
  31 /***
  32  *** NOTES
  33  ***
  34  *** To emit GPU instructions, we basically just do an in-order traversal
  35  *** of the IR tree.
  36  ***/
  37
  38
  39 #include "main/imports.h"
  40 #include "main/context.h"
  41 #include "main/macros.h"
  42 #include "shader/program.h"
  43 #include "shader/prog_instruction.h"
  44 #include "shader/prog_parameter.h"
  45 #include "shader/prog_print.h"
  46 #include "slang_builtin.h"
  47 #include "slang_emit.h"
  48 #include "slang_mem.h"
  49
  50
  51 #define PEEPHOLE_OPTIMIZATIONS 1
  52 #define ANNOTATE 0
  53
  54
  55 typedef struct
  56 {
  57    slang_info_log *log;
  58    slang_var_table *vt;
  59    struct gl_program *prog;
  60    struct gl_program **Subroutines;
  61    GLuint NumSubroutines;
  62
  63    GLuint MaxInstructions;  /**< size of prog->Instructions[] buffer */
  64
  65    /* code-gen options */
  66    GLboolean EmitHighLevelInstructions;
  67    GLboolean EmitCondCodes;
  68    GLboolean EmitComments;
  69    GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
  70 } slang_emit_info;
  71
  72
  73
  74 static struct gl_program *
  75 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
  76 {
  77    GET_CURRENT_CONTEXT(ctx);
  78    const GLuint n = emitInfo->NumSubroutines;
  79
  80    emitInfo->Subroutines = (struct gl_program **)
  81       _mesa_realloc(emitInfo->Subroutines,
  82                     n * sizeof(struct gl_program),
  83                     (n + 1) * sizeof(struct gl_program));
  84    emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0);
  85    emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
  86    emitInfo->NumSubroutines++;
  87    *id = n;
  88    return emitInfo->Subroutines[n];
  89 }
  90
  91
  92 /**
  93  * Convert a writemask to a swizzle.  Used for testing cond codes because
  94  * we only want to test the cond code component(s) that was set by the
  95  * previous instruction.
  96  */
  97 static GLuint
  98 writemask_to_swizzle(GLuint writemask)
  99 {
 100    if (writemask == WRITEMASK_X)
 101       return SWIZZLE_XXXX;
 102    if (writemask == WRITEMASK_Y)
 103       return SWIZZLE_YYYY;
 104    if (writemask == WRITEMASK_Z)
 105       return SWIZZLE_ZZZZ;
 106    if (writemask == WRITEMASK_W)
 107       return SWIZZLE_WWWW;
 108    return SWIZZLE_XYZW;  /* shouldn't be hit */
 109 }
 110
 111
 112 /**
 113  * Convert a swizzle mask to a writemask.
 114  * Note that the slang_ir_storage->Swizzle field can represent either a
 115  * swizzle mask or a writemask, depending on how it's used.  For example,
 116  * when we parse "direction.yz" alone, we don't know whether .yz is a
 117  * writemask or a swizzle.  In this case, we encode ".yz" in store->Swizzle
 118  * as a swizzle mask (.yz?? actually).  Later, if direction.yz is used as
 119  * an R-value, we use store->Swizzle as-is.  Otherwise, if direction.yz is
 120  * used as an L-value, we convert it to a writemask.
 121  */
 122 static GLuint
 123 swizzle_to_writemask(GLuint swizzle)
 124 {
 125    GLuint i, writemask = 0x0;
 126    for (i = 0; i < 4; i++) {
 127       GLuint swz = GET_SWZ(swizzle, i);
 128       if (swz <= SWIZZLE_W) {
 129          writemask |= (1 << swz);
 130       }
 131    }
 132    return writemask;
 133 }
 134
 135
 136 /**
 137  * Swizzle a swizzle (function composition).
 138  * That is, return swz2(swz1), or said another way: swz1.szw2
 139  * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
 140  */
 141 GLuint
 142 _slang_swizzle_swizzle(GLuint swz1, GLuint swz2)
 143 {
 144    GLuint i, swz, s[4];
 145    for (i = 0; i < 4; i++) {
 146       GLuint c = GET_SWZ(swz2, i);
 147       if (c <= SWIZZLE_W)
 148          s[i] = GET_SWZ(swz1, c);
 149       else
 150          s[i] = c;
 151    }
 152    swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
 153    return swz;
 154 }
 155
 156
 157 /**
 158  * Return the default swizzle mask for accessing a variable of the
 159  * given size (in floats).  If size = 1, comp is used to identify
 160  * which component [0..3] of the register holds the variable.
 161  */
 162 GLuint
 163 _slang_var_swizzle(GLint size, GLint comp)
 164 {
 165    switch (size) {
 166    case 1:
 167       return MAKE_SWIZZLE4(comp, comp, comp, comp);
 168    case 2:
 169       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_NIL, SWIZZLE_NIL);
 170    case 3:
 171       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_NIL);
 172    default:
 173       return SWIZZLE_XYZW;
 174    }
 175 }
 176
 177
 178
 179 /**
 180  * Allocate storage for the given node (if it hasn't already been allocated).
 181  *
 182  * Typically this is temporary storage for an intermediate result (such as
 183  * for a multiply or add, etc).
 184  *
 185  * If n->Store does not exist it will be created and will be of the size
 186  * specified by defaultSize.
 187  */
 188 static GLboolean
 189 alloc_node_storage(slang_emit_info *emitInfo, slang_ir_node *n,
 190                    GLint defaultSize)
 191 {
 192    assert(!n->Var);
 193    if (!n->Store) {
 194       assert(defaultSize > 0);
 195       n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, defaultSize);
 196    }
 197
 198    /* now allocate actual register(s).  I.e. set n->Store->Index >= 0 */
 199    if (n->Store->Index < 0) {
 200       if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
 201          slang_info_log_error(emitInfo->log,
 202                               "Ran out of registers, too many temporaries");
 203          _slang_free(n->Store);
 204          n->Store = NULL;
 205          return GL_FALSE;
 206       }
 207    }
 208    return GL_TRUE;
 209 }
 210
 211
 212 /**
 213  * Free temporary storage, if n->Store is, in fact, temp storage.
 214  * Otherwise, no-op.
 215  */
 216 static void
 217 free_node_storage(slang_var_table *vt, slang_ir_node *n)
 218 {
 219    if (n->Store->File == PROGRAM_TEMPORARY &&
 220        n->Store->Index >= 0 &&
 221        n->Opcode != IR_SWIZZLE) {
 222       if (_slang_is_temp(vt, n->Store)) {
 223          _slang_free_temp(vt, n->Store);
 224          n->Store->Index = -1;
 225          n->Store = NULL; /* XXX this may not be needed */
 226       }
 227    }
 228 }
 229
 230
 231 /**
 232  * Helper function to allocate a short-term temporary.
 233  * Free it with _slang_free_temp().
 234  */
 235 static GLboolean
 236 alloc_local_temp(slang_emit_info *emitInfo, slang_ir_storage *temp, GLint size)
 237 {
 238    assert(size >= 1);
 239    assert(size <= 4);
 240    _mesa_bzero(temp, sizeof(*temp));
 241    temp->Size = size;
 242    temp->File = PROGRAM_TEMPORARY;
 243    temp->Index = -1;
 244    return _slang_alloc_temp(emitInfo->vt, temp);
 245 }
 246
 247
 248 /**
 249  * Remove any SWIZZLE_NIL terms from given swizzle mask.
 250  * For a swizzle like .z??? generate .zzzz (replicate single component).
 251  * Else, for .wx?? generate .wxzw (insert default component for the position).
 252  */
 253 static GLuint
 254 fix_swizzle(GLuint swizzle)
 255 {
 256    GLuint c0 = GET_SWZ(swizzle, 0),
 257       c1 = GET_SWZ(swizzle, 1),
 258       c2 = GET_SWZ(swizzle, 2),
 259       c3 = GET_SWZ(swizzle, 3);
 260    if (c1 == SWIZZLE_NIL && c2 == SWIZZLE_NIL && c3 == SWIZZLE_NIL) {
 261       /* smear first component across all positions */
 262       c1 = c2 = c3 = c0;
 263    }
 264    else {
 265       /* insert default swizzle components */
 266       if (c0 == SWIZZLE_NIL)
 267          c0 = SWIZZLE_X;
 268       if (c1 == SWIZZLE_NIL)
 269          c1 = SWIZZLE_Y;
 270       if (c2 == SWIZZLE_NIL)
 271          c2 = SWIZZLE_Z;
 272       if (c3 == SWIZZLE_NIL)
 273          c3 = SWIZZLE_W;
 274    }
 275    return MAKE_SWIZZLE4(c0, c1, c2, c3);
 276 }
 277
 278
 279
 280 /**
 281  * Convert IR storage to an instruction dst register.
 282  */
 283 static void
 284 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st)
 285 {
 286    const GLboolean relAddr = st->RelAddr;
 287    const GLint size = st->Size;
 288    GLint index = st->Index;
 289    GLuint swizzle = st->Swizzle;
 290
 291    assert(index >= 0);
 292    /* if this is storage relative to some parent storage, walk up the tree */
 293    while (st->Parent) {
 294       st = st->Parent;
 295       assert(st->Index >= 0);
 296       index += st->Index;
 297       swizzle = _slang_swizzle_swizzle(st->Swizzle, swizzle);
 298    }
 299
 300    assert(st->File != PROGRAM_UNDEFINED);
 301    dst->File = st->File;
 302
 303    assert(index >= 0);
 304    dst->Index = index;
 305
 306    assert(size >= 1);
 307    assert(size <= 4);
 308
 309    if (swizzle != SWIZZLE_XYZW) {
 310       dst->WriteMask = swizzle_to_writemask(swizzle);
 311    }
 312    else {
 313       GLuint writemask;
 314       switch (size) {
 315       case 1:
 316          writemask = WRITEMASK_X << GET_SWZ(st->Swizzle, 0);
 317          break;
 318       case 2:
 319          writemask = WRITEMASK_XY;
 320          break;
 321       case 3:
 322          writemask = WRITEMASK_XYZ;
 323          break;
 324       case 4:
 325          writemask = WRITEMASK_XYZW;
 326          break;
 327       default:
 328          ; /* error would have been caught above */
 329       }
 330       dst->WriteMask = writemask;
 331    }
 332
 333    dst->RelAddr = relAddr;
 334 }
 335
 336
 337 /**
 338  * Convert IR storage to an instruction src register.
 339  */
 340 static void
 341 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
 342 {
 343    const GLboolean relAddr = st->RelAddr;
 344    GLint index = st->Index;
 345    GLuint swizzle = st->Swizzle;
 346
 347    /* if this is storage relative to some parent storage, walk up the tree */
 348    assert(index >= 0);
 349    while (st->Parent) {
 350       st = st->Parent;
 351       assert(st->Index >= 0);
 352       index += st->Index;
 353       swizzle = _slang_swizzle_swizzle(fix_swizzle(st->Swizzle), swizzle);
 354    }
 355
 356    assert(st->File >= 0);
 357 #if 1 /* XXX temporary */
 358    if (st->File == PROGRAM_UNDEFINED) {
 359       slang_ir_storage *st0 = (slang_ir_storage *) st;
 360       st0->File = PROGRAM_TEMPORARY;
 361    }
 362 #endif
 363    assert(st->File < PROGRAM_UNDEFINED);
 364    src->File = st->File;
 365
 366    assert(index >= 0);
 367    src->Index = index;
 368
 369    swizzle = fix_swizzle(swizzle);
 370    assert(GET_SWZ(swizzle, 0) <= SWIZZLE_W);
 371    assert(GET_SWZ(swizzle, 1) <= SWIZZLE_W);
 372    assert(GET_SWZ(swizzle, 2) <= SWIZZLE_W);
 373    assert(GET_SWZ(swizzle, 3) <= SWIZZLE_W);
 374    src->Swizzle = swizzle;
 375
 376    src->RelAddr = relAddr;
 377 }
 378
 379
 380 /*
 381  * Setup storage pointing to a scalar constant/literal.
 382  */
 383 static void
 384 constant_to_storage(slang_emit_info *emitInfo,
 385                     GLfloat val,
 386                     slang_ir_storage *store)
 387 {
 388    GLuint swizzle;
 389    GLint reg;
 390    GLfloat value[4];
 391
 392    value[0] = val;
 393    reg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
 394                                         value, 1, &swizzle);
 395
 396    memset(store, 0, sizeof(*store));
 397    store->File = PROGRAM_CONSTANT;
 398    store->Index = reg;
 399    store->Swizzle = swizzle;
 400 }
 401
 402
 403 /**
 404  * Add new instruction at end of given program.
 405  * \param prog  the program to append instruction onto
 406  * \param opcode  opcode for the new instruction
 407  * \return pointer to the new instruction
 408  */
 409 static struct prog_instruction *
 410 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
 411 {
 412    struct gl_program *prog = emitInfo->prog;
 413    struct prog_instruction *inst;
 414
 415 #if 0
 416    /* print prev inst */
 417    if (prog->NumInstructions > 0) {
 418       _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
 419    }
 420 #endif
 421    assert(prog->NumInstructions <= emitInfo->MaxInstructions);
 422
 423    if (prog->NumInstructions == emitInfo->MaxInstructions) {
 424       /* grow the instruction buffer */
 425       emitInfo->MaxInstructions += 20;
 426       prog->Instructions =
 427          _mesa_realloc_instructions(prog->Instructions,
 428                                     prog->NumInstructions,
 429                                     emitInfo->MaxInstructions);
 430    }
 431
 432    inst = prog->Instructions + prog->NumInstructions;
 433    prog->NumInstructions++;
 434    _mesa_init_instructions(inst, 1);
 435    inst->Opcode = opcode;
 436    inst->BranchTarget = -1; /* invalid */
 437    /*
 438    printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
 439           _mesa_opcode_string(inst->Opcode));
 440    */
 441    return inst;
 442 }
 443
 444
 445 static struct prog_instruction *
 446 emit_arl_load(slang_emit_info *emitInfo,
 447               enum register_file file, GLint index, GLuint swizzle)
 448 {
 449    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ARL);
 450    inst->SrcReg[0].File = file;
 451    inst->SrcReg[0].Index = index;
 452    inst->SrcReg[0].Swizzle = swizzle;
 453    inst->DstReg.File = PROGRAM_ADDRESS;
 454    inst->DstReg.Index = 0;
 455    inst->DstReg.WriteMask = WRITEMASK_X;
 456    return inst;
 457 }
 458
 459
 460 /**
 461  * Emit a new instruction with given opcode, operands.
 462  * At this point the instruction may have multiple indirect register
 463  * loads/stores.  We convert those into ARL loads and address-relative
 464  * operands.  See comments inside.
 465  * At some point in the future we could directly emit indirectly addressed
 466  * registers in Mesa GPU instructions.
 467  */
 468 static struct prog_instruction *
 469 emit_instruction(slang_emit_info *emitInfo,
 470                  gl_inst_opcode opcode,
 471                  const slang_ir_storage *dst,
 472                  const slang_ir_storage *src0,
 473                  const slang_ir_storage *src1,
 474                  const slang_ir_storage *src2)
 475 {
 476    struct prog_instruction *inst;
 477    GLuint numIndirect = 0;
 478    const slang_ir_storage *src[3];
 479    slang_ir_storage newSrc[3], newDst;
 480    GLuint i;
 481    GLboolean isTemp[3];
 482
 483    isTemp[0] = isTemp[1] = isTemp[2] = GL_FALSE;
 484
 485    src[0] = src0;
 486    src[1] = src1;
 487    src[2] = src2;
 488
 489    /* count up how many operands are indirect loads */
 490    for (i = 0; i < 3; i++) {
 491       if (src[i] && src[i]->IsIndirect)
 492          numIndirect++;
 493    }
 494    if (dst && dst->IsIndirect)
 495       numIndirect++;
 496
 497    /* Take special steps for indirect register loads.
 498     * If we had multiple address registers this would be simpler.
 499     * For example, this GLSL code:
 500     *    x[i] = y[j] + z[k];
 501     * would translate into something like:
 502     *    ARL ADDR.x, i;
 503     *    ARL ADDR.y, j;
 504     *    ARL ADDR.z, k;
 505     *    ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
 506     * But since we currently only have one address register we have to do this:
 507     *    ARL ADDR.x, i;
 508     *    MOV t1, TEMP[ADDR.x+9];
 509     *    ARL ADDR.x, j;
 510     *    MOV t2, TEMP[ADDR.x+4];
 511     *    ARL ADDR.x, k;
 512     *    ADD TEMP[ADDR.x+5], t1, t2;
 513     * The code here figures this out...
 514     */
 515    if (numIndirect > 0) {
 516       for (i = 0; i < 3; i++) {
 517          if (src[i] && src[i]->IsIndirect) {
 518             /* load the ARL register with the indirect register */
 519             emit_arl_load(emitInfo,
 520                           src[i]->IndirectFile,
 521                           src[i]->IndirectIndex,
 522                           src[i]->IndirectSwizzle);
 523
 524             if (numIndirect > 1) {
 525                /* Need to load src[i] into a temporary register */
 526                slang_ir_storage srcRelAddr;
 527                alloc_local_temp(emitInfo, &newSrc[i], src[i]->Size);
 528                isTemp[i] = GL_TRUE;
 529
 530                /* set RelAddr flag on src register */
 531                srcRelAddr = *src[i];
 532                srcRelAddr.RelAddr = GL_TRUE;
 533                srcRelAddr.IsIndirect = GL_FALSE; /* not really needed */
 534
 535                /* MOV newSrc, srcRelAddr; */
 536                inst = emit_instruction(emitInfo,
 537                                        OPCODE_MOV,
 538                                        &newSrc[i],
 539                                        &srcRelAddr,
 540                                        NULL,
 541                                        NULL);
 542
 543                src[i] = &newSrc[i];
 544             }
 545             else {
 546                /* just rewrite the src[i] storage to be ARL-relative */
 547                newSrc[i] = *src[i];
 548                newSrc[i].RelAddr = GL_TRUE;
 549                newSrc[i].IsIndirect = GL_FALSE; /* not really needed */
 550                src[i] = &newSrc[i];
 551             }
 552          }
 553       }
 554    }
 555
 556    /* Take special steps for indirect dest register write */
 557    if (dst && dst->IsIndirect) {
 558       /* load the ARL register with the indirect register */
 559       emit_arl_load(emitInfo,
 560                     dst->IndirectFile,
 561                     dst->IndirectIndex,
 562                     dst->IndirectSwizzle);
 563       newDst = *dst;
 564       newDst.RelAddr = GL_TRUE;
 565       newDst.IsIndirect = GL_FALSE;
 566       dst = &newDst;
 567    }
 568
 569    /* OK, emit the instruction and its dst, src regs */
 570    inst = new_instruction(emitInfo, opcode);
 571    if (!inst)
 572       return NULL;
 573
 574    if (dst)
 575       storage_to_dst_reg(&inst->DstReg, dst);
 576
 577    for (i = 0; i < 3; i++) {
 578       if (src[i])
 579          storage_to_src_reg(&inst->SrcReg[i], src[i]);
 580    }
 581
 582    /* Free any temp registers that we allocated above */
 583    for (i = 0; i < 3; i++) {
 584       if (isTemp[i])
 585          _slang_free_temp(emitInfo->vt, &newSrc[i]);
 586    }
 587
 588    return inst;
 589 }
 590
 591
 592
 593 /**
 594  * Put a comment on the given instruction.
 595  */
 596 static void
 597 inst_comment(struct prog_instruction *inst, const char *comment)
 598 {
 599    if (inst)
 600       inst->Comment = _mesa_strdup(comment);
 601 }
 602
 603
 604
 605 /**
 606  * Return pointer to last instruction in program.
 607  */
 608 static struct prog_instruction *
 609 prev_instruction(slang_emit_info *emitInfo)
 610 {
 611    struct gl_program *prog = emitInfo->prog;
 612    if (prog->NumInstructions == 0)
 613       return NULL;
 614    else
 615       return prog->Instructions + prog->NumInstructions - 1;
 616 }
 617
 618
 619 static struct prog_instruction *
 620 emit(slang_emit_info *emitInfo, slang_ir_node *n);
 621
 622
 623 /**
 624  * Return an annotation string for given node's storage.
 625  */
 626 static char *
 627 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
 628 {
 629 #if ANNOTATE
 630    const slang_ir_storage *st = n->Store;
 631    static char s[100] = "";
 632
 633    if (!st)
 634       return _mesa_strdup("");
 635
 636    switch (st->File) {
 637    case PROGRAM_CONSTANT:
 638       if (st->Index >= 0) {
 639          const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
 640          if (st->Swizzle == SWIZZLE_NOOP)
 641             sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
 642          else {
 643             sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
 644          }
 645       }
 646       break;
 647    case PROGRAM_TEMPORARY:
 648       if (n->Var)
 649          sprintf(s, "%s", (char *) n->Var->a_name);
 650       else
 651          sprintf(s, "t[%d]", st->Index);
 652       break;
 653    case PROGRAM_STATE_VAR:
 654    case PROGRAM_UNIFORM:
 655       sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
 656       break;
 657    case PROGRAM_VARYING:
 658       sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
 659       break;
 660    case PROGRAM_INPUT:
 661       sprintf(s, "input[%d]", st->Index);
 662       break;
 663    case PROGRAM_OUTPUT:
 664       sprintf(s, "output[%d]", st->Index);
 665       break;
 666    default:
 667       s[0] = 0;
 668    }
 669    return _mesa_strdup(s);
 670 #else
 671    return NULL;
 672 #endif
 673 }
 674
 675
 676 /**
 677  * Return an annotation string for an instruction.
 678  */
 679 static char *
 680 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
 681                        char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
 682 {
 683 #if ANNOTATE
 684    const char *operator;
 685    char *s;
 686    int len = 50;
 687
 688    if (dstAnnot)
 689       len += strlen(dstAnnot);
 690    else
 691       dstAnnot = _mesa_strdup("");
 692
 693    if (srcAnnot0)
 694       len += strlen(srcAnnot0);
 695    else
 696       srcAnnot0 = _mesa_strdup("");
 697
 698    if (srcAnnot1)
 699       len += strlen(srcAnnot1);
 700    else
 701       srcAnnot1 = _mesa_strdup("");
 702
 703    if (srcAnnot2)
 704       len += strlen(srcAnnot2);
 705    else
 706       srcAnnot2 = _mesa_strdup("");
 707
 708    switch (opcode) {
 709    case OPCODE_ADD:
 710       operator = "+";
 711       break;
 712    case OPCODE_SUB:
 713       operator = "-";
 714       break;
 715    case OPCODE_MUL:
 716       operator = "*";
 717       break;
 718    case OPCODE_DP3:
 719       operator = "DP3";
 720       break;
 721    case OPCODE_DP4:
 722       operator = "DP4";
 723       break;
 724    case OPCODE_XPD:
 725       operator = "XPD";
 726       break;
 727    case OPCODE_RSQ:
 728       operator = "RSQ";
 729       break;
 730    case OPCODE_SGT:
 731       operator = ">";
 732       break;
 733    default:
 734       operator = ",";
 735    }
 736
 737    s = (char *) malloc(len);
 738    sprintf(s, "%s = %s %s %s %s", dstAnnot,
 739            srcAnnot0, operator, srcAnnot1, srcAnnot2);
 740    assert(_mesa_strlen(s) < len);
 741
 742    free(dstAnnot);
 743    free(srcAnnot0);
 744    free(srcAnnot1);
 745    free(srcAnnot2);
 746
 747    return s;
 748 #else
 749    return NULL;
 750 #endif
 751 }
 752
 753
 754 /**
 755  * Emit an instruction that's just a comment.
 756  */
 757 static struct prog_instruction *
 758 emit_comment(slang_emit_info *emitInfo, const char *comment)
 759 {
 760    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
 761    inst_comment(inst, comment);
 762    return inst;
 763 }
 764
 765
 766 /**
 767  * Generate code for a simple arithmetic instruction.
 768  * Either 1, 2 or 3 operands.
 769  */
 770 static struct prog_instruction *
 771 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
 772 {
 773    const slang_ir_info *info = _slang_ir_info(n->Opcode);
 774    struct prog_instruction *inst;
 775    GLuint i;
 776
 777    assert(info);
 778    assert(info->InstOpcode != OPCODE_NOP);
 779
 780 #if PEEPHOLE_OPTIMIZATIONS
 781    /* Look for MAD opportunity */
 782    if (info->NumParams == 2 &&
 783        n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
 784       /* found pattern IR_ADD(IR_MUL(A, B), C) */
 785       emit(emitInfo, n->Children[0]->Children[0]);  /* A */
 786       emit(emitInfo, n->Children[0]->Children[1]);  /* B */
 787       emit(emitInfo, n->Children[1]);  /* C */
 788       alloc_node_storage(emitInfo, n, -1);  /* dest */
 789
 790       inst = emit_instruction(emitInfo,
 791                               OPCODE_MAD,
 792                               n->Store,
 793                               n->Children[0]->Children[0]->Store,
 794                               n->Children[0]->Children[1]->Store,
 795                               n->Children[1]->Store);
 796
 797       free_node_storage(emitInfo->vt, n->Children[0]->Children[0]);
 798       free_node_storage(emitInfo->vt, n->Children[0]->Children[1]);
 799       free_node_storage(emitInfo->vt, n->Children[1]);
 800       return inst;
 801    }
 802
 803    if (info->NumParams == 2 &&
 804        n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
 805       /* found pattern IR_ADD(A, IR_MUL(B, C)) */
 806       emit(emitInfo, n->Children[0]);  /* A */
 807       emit(emitInfo, n->Children[1]->Children[0]);  /* B */
 808       emit(emitInfo, n->Children[1]->Children[1]);  /* C */
 809       alloc_node_storage(emitInfo, n, -1);  /* dest */
 810
 811       inst = emit_instruction(emitInfo,
 812                               OPCODE_MAD,
 813                               n->Store,
 814                               n->Children[1]->Children[0]->Store,
 815                               n->Children[1]->Children[1]->Store,
 816                               n->Children[0]->Store);
 817
 818       free_node_storage(emitInfo->vt, n->Children[1]->Children[0]);
 819       free_node_storage(emitInfo->vt, n->Children[1]->Children[1]);
 820       free_node_storage(emitInfo->vt, n->Children[0]);
 821       return inst;
 822    }
 823 #endif
 824
 825    /* gen code for children, may involve temp allocation */
 826    for (i = 0; i < info->NumParams; i++) {
 827       emit(emitInfo, n->Children[i]);
 828       if (!n->Children[i] || !n->Children[i]->Store) {
 829          /* error recovery */
 830          return NULL;
 831       }
 832    }
 833
 834    /* result storage */
 835    alloc_node_storage(emitInfo, n, -1);
 836
 837    inst = emit_instruction(emitInfo,
 838                            info->InstOpcode,
 839                            n->Store,  /* dest */
 840                            (info->NumParams > 0 ? n->Children[0]->Store : NULL),
 841                            (info->NumParams > 1 ? n->Children[1]->Store : NULL),
 842                            (info->NumParams > 2 ? n->Children[2]->Store : NULL)
 843                            );
 844
 845    /* free temps */
 846    for (i = 0; i < info->NumParams; i++)
 847       free_node_storage(emitInfo->vt, n->Children[i]);
 848
 849    return inst;
 850 }
 851
 852
 853 /**
 854  * Emit code for == and != operators.  These could normally be handled
 855  * by emit_arith() except we need to be able to handle structure comparisons.
 856  */
 857 static struct prog_instruction *
 858 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
 859 {
 860    struct prog_instruction *inst = NULL;
 861    GLint size;
 862
 863    assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
 864
 865    /* gen code for children */
 866    emit(emitInfo, n->Children[0]);
 867    emit(emitInfo, n->Children[1]);
 868
 869    if (n->Children[0]->Store->Size != n->Children[1]->Store->Size) {
 870       slang_info_log_error(emitInfo->log, "invalid operands to == or !=");
 871       return NULL;
 872    }
 873
 874    /* final result is 1 bool */
 875    if (!alloc_node_storage(emitInfo, n, 1))
 876       return NULL;
 877
 878    size = n->Children[0]->Store->Size;
 879
 880    if (size == 1) {
 881       gl_inst_opcode opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
 882       inst =  emit_instruction(emitInfo,
 883                                opcode,
 884                                n->Store, /* dest */
 885                                n->Children[0]->Store,
 886                                n->Children[1]->Store,
 887                                NULL);
 888    }
 889    else if (size <= 4) {
 890       /* compare two vectors.
 891        * Unfortunately, there's no instruction to compare vectors and
 892        * return a scalar result.  Do it with some compare and dot product
 893        * instructions...
 894        */
 895       GLuint swizzle;
 896       gl_inst_opcode dotOp;
 897       slang_ir_storage tempStore;
 898
 899       if (!alloc_local_temp(emitInfo, &tempStore, 4)) {
 900          return NULL;
 901          /* out of temps */
 902       }
 903
 904       if (size == 4) {
 905          dotOp = OPCODE_DP4;
 906          swizzle = SWIZZLE_XYZW;
 907       }
 908       else if (size == 3) {
 909          dotOp = OPCODE_DP3;
 910          swizzle = SWIZZLE_XYZW;
 911       }
 912       else {
 913          assert(size == 2);
 914          dotOp = OPCODE_DP3;
 915          swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
 916       }
 917
 918       /* Compute inequality (temp = (A != B)) */
 919       inst = emit_instruction(emitInfo,
 920                               OPCODE_SNE,
 921                               &tempStore,
 922                               n->Children[0]->Store,
 923                               n->Children[1]->Store,
 924                               NULL);
 925       inst_comment(inst, "Compare values");
 926
 927       /* Compute val = DOT(temp, temp)  (reduction) */
 928       inst = emit_instruction(emitInfo,
 929                               dotOp,
 930                               n->Store,
 931                               &tempStore,
 932                               &tempStore,
 933                               NULL);
 934       inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
 935       inst_comment(inst, "Reduce vec to bool");
 936
 937       _slang_free_temp(emitInfo->vt, &tempStore); /* free temp */
 938
 939       if (n->Opcode == IR_EQUAL) {
 940          /* compute val = !val.x  with SEQ val, val, 0; */
 941          slang_ir_storage zero;
 942          constant_to_storage(emitInfo, 0.0, &zero);
 943          inst = emit_instruction(emitInfo,
 944                                  OPCODE_SEQ,
 945                                  n->Store, /* dest */
 946                                  n->Store,
 947                                  &zero,
 948                                  NULL);
 949          inst_comment(inst, "Invert true/false");
 950       }
 951    }
 952    else {
 953       /* size > 4, struct or array compare.
 954        * XXX this won't work reliably for structs with padding!!
 955        */
 956       GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
 957       slang_ir_storage accTemp, sneTemp;
 958
 959       if (!alloc_local_temp(emitInfo, &accTemp, 4))
 960          return NULL;
 961
 962       if (!alloc_local_temp(emitInfo, &sneTemp, 4))
 963          return NULL;
 964
 965       for (i = 0; i < num; i++) {
 966          slang_ir_storage srcStore0 = *n->Children[0]->Store;
 967          slang_ir_storage srcStore1 = *n->Children[1]->Store;
 968          srcStore0.Index += i;
 969          srcStore1.Index += i;
 970
 971          if (i == 0) {
 972             /* SNE accTemp, left[i], right[i] */
 973             inst = emit_instruction(emitInfo, OPCODE_SNE,
 974                                     &accTemp, /* dest */
 975                                     &srcStore0,
 976                                     &srcStore1,
 977                                     NULL);
 978             inst_comment(inst, "Begin struct/array comparison");
 979          }
 980          else {
 981             /* SNE sneTemp, left[i], right[i] */
 982             inst = emit_instruction(emitInfo, OPCODE_SNE,
 983                                     &sneTemp, /* dest */
 984                                     &srcStore0,
 985                                     &srcStore1,
 986                                     NULL);
 987             /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
 988             inst = emit_instruction(emitInfo, OPCODE_ADD,
 989                                     &accTemp, /* dest */
 990                                     &accTemp,
 991                                     &sneTemp,
 992                                     NULL);
 993          }
 994       }
 995
 996       /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
 997       inst = emit_instruction(emitInfo, OPCODE_DP4,
 998                               n->Store,
 999                               &accTemp,
1000                               &accTemp,
1001                               NULL);
1002       inst_comment(inst, "End struct/array comparison");
1003
1004       if (n->Opcode == IR_EQUAL) {
1005          /* compute tmp.x = !tmp.x  via tmp.x = (tmp.x == 0) */
1006          slang_ir_storage zero;
1007          constant_to_storage(emitInfo, 0.0, &zero);
1008          inst = emit_instruction(emitInfo, OPCODE_SEQ,
1009                                  n->Store, /* dest */
1010                                  n->Store,
1011                                  &zero,
1012                                  NULL);
1013          inst_comment(inst, "Invert true/false");
1014       }
1015
1016       _slang_free_temp(emitInfo->vt, &accTemp);
1017       _slang_free_temp(emitInfo->vt, &sneTemp);
1018    }
1019
1020    /* free temps */
1021    free_node_storage(emitInfo->vt, n->Children[0]);
1022    free_node_storage(emitInfo->vt, n->Children[1]);
1023
1024    return inst;
1025 }
1026
1027
1028
1029 /**
1030  * Generate code for an IR_CLAMP instruction.
1031  */
1032 static struct prog_instruction *
1033 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
1034 {
1035    struct prog_instruction *inst;
1036    slang_ir_node tmpNode;
1037
1038    assert(n->Opcode == IR_CLAMP);
1039    /* ch[0] = value
1040     * ch[1] = min limit
1041     * ch[2] = max limit
1042     */
1043
1044    inst = emit(emitInfo, n->Children[0]);
1045
1046    /* If lower limit == 0.0 and upper limit == 1.0,
1047     *    set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1048     * Else,
1049     *    emit OPCODE_MIN, OPCODE_MAX sequence.
1050     */
1051 #if 0
1052    /* XXX this isn't quite finished yet */
1053    if (n->Children[1]->Opcode == IR_FLOAT &&
1054        n->Children[1]->Value[0] == 0.0 &&
1055        n->Children[1]->Value[1] == 0.0 &&
1056        n->Children[1]->Value[2] == 0.0 &&
1057        n->Children[1]->Value[3] == 0.0 &&
1058        n->Children[2]->Opcode == IR_FLOAT &&
1059        n->Children[2]->Value[0] == 1.0 &&
1060        n->Children[2]->Value[1] == 1.0 &&
1061        n->Children[2]->Value[2] == 1.0 &&
1062        n->Children[2]->Value[3] == 1.0) {
1063       if (!inst) {
1064          inst = prev_instruction(prog);
1065       }
1066       if (inst && inst->Opcode != OPCODE_NOP) {
1067          /* and prev instruction's DstReg matches n->Children[0]->Store */
1068          inst->SaturateMode = SATURATE_ZERO_ONE;
1069          n->Store = n->Children[0]->Store;
1070          return inst;
1071       }
1072    }
1073 #endif
1074
1075    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1076       return NULL;
1077
1078    emit(emitInfo, n->Children[1]);
1079    emit(emitInfo, n->Children[2]);
1080
1081    /* Some GPUs don't allow reading from output registers.  So if the
1082     * dest for this clamp() is an output reg, we can't use that reg for
1083     * the intermediate result.  Use a temp register instead.
1084     */
1085    _mesa_bzero(&tmpNode, sizeof(tmpNode));
1086    alloc_node_storage(emitInfo, &tmpNode, n->Store->Size);
1087
1088    /* tmp = max(ch[0], ch[1]) */
1089    inst = emit_instruction(emitInfo, OPCODE_MAX,
1090                            tmpNode.Store, /* dest */
1091                            n->Children[0]->Store,
1092                            n->Children[1]->Store,
1093                            NULL);
1094
1095    /* n->dest = min(tmp, ch[2]) */
1096    inst = emit_instruction(emitInfo, OPCODE_MIN,
1097                            n->Store, /* dest */
1098                            tmpNode.Store,
1099                            n->Children[2]->Store,
1100                            NULL);
1101
1102    free_node_storage(emitInfo->vt, &tmpNode);
1103
1104    return inst;
1105 }
1106
1107
1108 static struct prog_instruction *
1109 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
1110 {
1111    /* Implement as MOV dst, -src; */
1112    /* XXX we could look at the previous instruction and in some circumstances
1113     * modify it to accomplish the negation.
1114     */
1115    struct prog_instruction *inst;
1116
1117    emit(emitInfo, n->Children[0]);
1118
1119    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1120       return NULL;
1121
1122    inst = emit_instruction(emitInfo,
1123                            OPCODE_MOV,
1124                            n->Store, /* dest */
1125                            n->Children[0]->Store,
1126                            NULL,
1127                            NULL);
1128    inst->SrcReg[0].NegateBase = NEGATE_XYZW;
1129    return inst;
1130 }
1131
1132
1133 static struct prog_instruction *
1134 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
1135 {
1136    assert(n->Label);
1137 #if 0
1138    /* XXX this fails in loop tail code - investigate someday */
1139    assert(_slang_label_get_location(n->Label) < 0);
1140    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1141                              emitInfo->prog);
1142 #else
1143    if (_slang_label_get_location(n->Label) < 0)
1144       _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1145                                 emitInfo->prog);
1146 #endif
1147    return NULL;
1148 }
1149
1150
1151 /**
1152  * Emit code for a function call.
1153  * Note that for each time a function is called, we emit the function's
1154  * body code again because the set of available registers may be different.
1155  */
1156 static struct prog_instruction *
1157 emit_fcall(slang_emit_info *emitInfo, slang_ir_node *n)
1158 {
1159    struct gl_program *progSave;
1160    struct prog_instruction *inst;
1161    GLuint subroutineId;
1162    GLuint maxInstSave;
1163
1164    assert(n->Opcode == IR_CALL);
1165    assert(n->Label);
1166
1167    /* save/push cur program */
1168    maxInstSave = emitInfo->MaxInstructions;
1169    progSave = emitInfo->prog;
1170
1171    emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
1172    emitInfo->MaxInstructions = emitInfo->prog->NumInstructions;
1173
1174    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1175                              emitInfo->prog);
1176
1177    if (emitInfo->EmitBeginEndSub) {
1178       /* BGNSUB isn't a real instruction.
1179        * We require a label (i.e. "foobar:") though, if we're going to
1180        * print the program in the NV format.  The BNGSUB instruction is
1181        * really just a NOP to attach the label to.
1182        */
1183       inst = new_instruction(emitInfo, OPCODE_BGNSUB);
1184       inst_comment(inst, n->Label->Name);
1185    }
1186
1187    /* body of function: */
1188    emit(emitInfo, n->Children[0]);
1189    n->Store = n->Children[0]->Store;
1190
1191    /* add RET instruction now, if needed */
1192    inst = prev_instruction(emitInfo);
1193    if (inst && inst->Opcode != OPCODE_RET) {
1194       inst = new_instruction(emitInfo, OPCODE_RET);
1195    }
1196
1197    if (emitInfo->EmitBeginEndSub) {
1198       inst = new_instruction(emitInfo, OPCODE_ENDSUB);
1199       inst_comment(inst, n->Label->Name);
1200    }
1201
1202    /* pop/restore cur program */
1203    emitInfo->prog = progSave;
1204    emitInfo->MaxInstructions = maxInstSave;
1205
1206    /* emit the function call */
1207    inst = new_instruction(emitInfo, OPCODE_CAL);
1208    /* The branch target is just the subroutine number (changed later) */
1209    inst->BranchTarget = subroutineId;
1210    inst_comment(inst, n->Label->Name);
1211    assert(inst->BranchTarget >= 0);
1212
1213    return inst;
1214 }
1215
1216
1217 /**
1218  * Emit code for a 'return' statement.
1219  */
1220 static struct prog_instruction *
1221 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
1222 {
1223    struct prog_instruction *inst;
1224    assert(n);
1225    assert(n->Opcode == IR_RETURN);
1226    assert(n->Label);
1227    inst = new_instruction(emitInfo, OPCODE_RET);
1228    inst->DstReg.CondMask = COND_TR;  /* always return */
1229    return inst;
1230 }
1231
1232
1233 static struct prog_instruction *
1234 emit_kill(slang_emit_info *emitInfo)
1235 {
1236    struct gl_fragment_program *fp;
1237    struct prog_instruction *inst;
1238    /* NV-KILL - discard fragment depending on condition code.
1239     * Note that ARB-KILL depends on sign of vector operand.
1240     */
1241    inst = new_instruction(emitInfo, OPCODE_KIL_NV);
1242    inst->DstReg.CondMask = COND_TR;  /* always kill */
1243
1244    assert(emitInfo->prog->Target == GL_FRAGMENT_PROGRAM_ARB);
1245    fp = (struct gl_fragment_program *) emitInfo->prog;
1246    fp->UsesKill = GL_TRUE;
1247
1248    return inst;
1249 }
1250
1251
1252 static struct prog_instruction *
1253 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
1254 {
1255    struct prog_instruction *inst;
1256    gl_inst_opcode opcode;
1257
1258    if (n->Opcode == IR_TEX) {
1259       opcode = OPCODE_TEX;
1260    }
1261    else if (n->Opcode == IR_TEXB) {
1262       opcode = OPCODE_TXB;
1263    }
1264    else {
1265       assert(n->Opcode == IR_TEXP);
1266       opcode = OPCODE_TXP;
1267    }
1268
1269    /* emit code for the texcoord operand */
1270    (void) emit(emitInfo, n->Children[1]);
1271
1272    /* alloc storage for result of texture fetch */
1273    if (!alloc_node_storage(emitInfo, n, 4))
1274       return NULL;
1275
1276    /* emit TEX instruction;  Child[1] is the texcoord */
1277    inst = emit_instruction(emitInfo,
1278                            opcode,
1279                            n->Store,
1280                            n->Children[1]->Store,
1281                            NULL,
1282                            NULL);
1283
1284    /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
1285    assert(n->Children[0]->Store);
1286    /* Store->Index is the sampler index */
1287    assert(n->Children[0]->Store->Index >= 0);
1288    /* Store->Size is the texture target */
1289    assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
1290    assert(n->Children[0]->Store->Size <= TEXTURE_RECT_INDEX);
1291
1292    inst->TexSrcTarget = n->Children[0]->Store->Size;
1293    inst->TexSrcUnit = n->Children[0]->Store->Index; /* i.e. uniform's index */
1294
1295    return inst;
1296 }
1297
1298
1299 /**
1300  * Assignment/copy
1301  */
1302 static struct prog_instruction *
1303 emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
1304 {
1305    struct prog_instruction *inst;
1306
1307    assert(n->Opcode == IR_COPY);
1308
1309    /* lhs */
1310    emit(emitInfo, n->Children[0]);
1311    if (!n->Children[0]->Store || n->Children[0]->Store->Index < 0) {
1312       /* an error should have been already recorded */
1313       return NULL;
1314    }
1315
1316    /* rhs */
1317    assert(n->Children[1]);
1318    inst = emit(emitInfo, n->Children[1]);
1319
1320    if (!n->Children[1]->Store || n->Children[1]->Store->Index < 0) {
1321       if (!emitInfo->log->text) {
1322          slang_info_log_error(emitInfo->log, "invalid assignment");
1323       }
1324       return NULL;
1325    }
1326
1327    assert(n->Children[1]->Store->Index >= 0);
1328
1329    /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1330
1331    n->Store = n->Children[0]->Store;
1332
1333    if (n->Store->File == PROGRAM_SAMPLER) {
1334       /* no code generated for sampler assignments,
1335        * just copy the sampler index at compile time.
1336        */
1337       n->Store->Index = n->Children[1]->Store->Index;
1338       return NULL;
1339    }
1340
1341 #if PEEPHOLE_OPTIMIZATIONS
1342    if (inst &&
1343        _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
1344        (inst->DstReg.File == n->Children[1]->Store->File) &&
1345        (inst->DstReg.Index == n->Children[1]->Store->Index) &&
1346        !n->Children[0]->Store->IsIndirect &&
1347        n->Children[0]->Store->Size <= 4) {
1348       /* Peephole optimization:
1349        * The Right-Hand-Side has its results in a temporary place.
1350        * Modify the RHS (and the prev instruction) to store its results
1351        * in the destination specified by n->Children[0].
1352        * Then, this MOVE is a no-op.
1353        * Ex:
1354        *   MUL tmp, x, y;
1355        *   MOV a, tmp;
1356        * becomes:
1357        *   MUL a, x, y;
1358        */
1359       if (n->Children[1]->Opcode != IR_SWIZZLE)
1360          _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
1361       *n->Children[1]->Store = *n->Children[0]->Store;
1362
1363       /* fixup the previous instruction (which stored the RHS result) */
1364       assert(n->Children[0]->Store->Index >= 0);
1365
1366       storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store);
1367       return inst;
1368    }
1369    else
1370 #endif
1371    {
1372       if (n->Children[0]->Store->Size > 4) {
1373          /* move matrix/struct etc (block of registers) */
1374          slang_ir_storage dstStore = *n->Children[0]->Store;
1375          slang_ir_storage srcStore = *n->Children[1]->Store;
1376          GLint size = srcStore.Size;
1377          ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
1378          dstStore.Size = 4;
1379          srcStore.Size = 4;
1380          while (size >= 4) {
1381             inst = emit_instruction(emitInfo, OPCODE_MOV,
1382                                     &dstStore,
1383                                     &srcStore,
1384                                     NULL,
1385                                     NULL);
1386             inst_comment(inst, "IR_COPY block");
1387             srcStore.Index++;
1388             dstStore.Index++;
1389             size -= 4;
1390          }
1391       }
1392       else {
1393          /* single register move */
1394          char *srcAnnot, *dstAnnot;
1395          assert(n->Children[0]->Store->Index >= 0);
1396          inst = emit_instruction(emitInfo, OPCODE_MOV,
1397                                  n->Children[0]->Store, /* dest */
1398                                  n->Children[1]->Store,
1399                                  NULL,
1400                                  NULL);
1401          dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
1402          srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
1403          inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
1404                                                 srcAnnot, NULL, NULL);
1405       }
1406       free_node_storage(emitInfo->vt, n->Children[1]);
1407       return inst;
1408    }
1409 }
1410
1411
1412 /**
1413  * An IR_COND node wraps a boolean expression which is used by an
1414  * IF or WHILE test.  This is where we'll set condition codes, if needed.
1415  */
1416 static struct prog_instruction *
1417 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
1418 {
1419    struct prog_instruction *inst;
1420
1421    assert(n->Opcode == IR_COND);
1422
1423    if (!n->Children[0])
1424       return NULL;
1425
1426    /* emit code for the expression */
1427    inst = emit(emitInfo, n->Children[0]);
1428
1429    if (!n->Children[0]->Store) {
1430       /* error recovery */
1431       return NULL;
1432    }
1433
1434    assert(n->Children[0]->Store);
1435    /*assert(n->Children[0]->Store->Size == 1);*/
1436
1437    if (emitInfo->EmitCondCodes) {
1438       if (inst &&
1439           n->Children[0]->Store &&
1440           inst->DstReg.File == n->Children[0]->Store->File &&
1441           inst->DstReg.Index == n->Children[0]->Store->Index) {
1442          /* The previous instruction wrote to the register who's value
1443           * we're testing.  Just fix that instruction so that the
1444           * condition codes are computed.
1445           */
1446          inst->CondUpdate = GL_TRUE;
1447          n->Store = n->Children[0]->Store;
1448          return inst;
1449       }
1450       else {
1451          /* This'll happen for things like "if (i) ..." where no code
1452           * is normally generated for the expression "i".
1453           * Generate a move instruction just to set condition codes.
1454           */
1455          if (!alloc_node_storage(emitInfo, n, 1))
1456             return NULL;
1457          inst = emit_instruction(emitInfo, OPCODE_MOV,
1458                                  n->Store, /* dest */
1459                                  n->Children[0]->Store,
1460                                  NULL,
1461                                  NULL);
1462          inst->CondUpdate = GL_TRUE;
1463          inst_comment(inst, "COND expr");
1464          _slang_free_temp(emitInfo->vt, n->Store);
1465          return inst;
1466       }
1467    }
1468    else {
1469       /* No-op: the boolean result of the expression is in a regular reg */
1470       n->Store = n->Children[0]->Store;
1471       return inst;
1472    }
1473 }
1474
1475
1476 /**
1477  * Logical-NOT
1478  */
1479 static struct prog_instruction *
1480 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1481 {
1482    static const struct {
1483       gl_inst_opcode op, opNot;
1484    } operators[] = {
1485       { OPCODE_SLT, OPCODE_SGE },
1486       { OPCODE_SLE, OPCODE_SGT },
1487       { OPCODE_SGT, OPCODE_SLE },
1488       { OPCODE_SGE, OPCODE_SLT },
1489       { OPCODE_SEQ, OPCODE_SNE },
1490       { OPCODE_SNE, OPCODE_SEQ },
1491       { 0, 0 }
1492    };
1493    struct prog_instruction *inst;
1494    slang_ir_storage zero;
1495    GLuint i;
1496
1497    /* child expr */
1498    inst = emit(emitInfo, n->Children[0]);
1499
1500 #if PEEPHOLE_OPTIMIZATIONS
1501    if (inst) {
1502       /* if the prev instruction was a comparison instruction, invert it */
1503       for (i = 0; operators[i].op; i++) {
1504          if (inst->Opcode == operators[i].op) {
1505             inst->Opcode = operators[i].opNot;
1506             n->Store = n->Children[0]->Store;
1507             return inst;
1508          }
1509       }
1510    }
1511 #endif
1512
1513    /* else, invert using SEQ (v = v == 0) */
1514    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1515       return NULL;
1516
1517    constant_to_storage(emitInfo, 0.0, &zero);
1518    inst = emit_instruction(emitInfo,
1519                            OPCODE_SEQ,
1520                            n->Store,
1521                            n->Children[0]->Store,
1522                            &zero,
1523                            NULL);
1524    inst_comment(inst, "NOT");
1525
1526    free_node_storage(emitInfo->vt, n->Children[0]);
1527
1528    return inst;
1529 }
1530
1531
1532 static struct prog_instruction *
1533 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1534 {
1535    struct gl_program *prog = emitInfo->prog;
1536    GLuint ifInstLoc, elseInstLoc = 0;
1537    GLuint condWritemask = 0;
1538
1539    /* emit condition expression code */
1540    {
1541       struct prog_instruction *inst;
1542       inst = emit(emitInfo, n->Children[0]);
1543       if (emitInfo->EmitCondCodes) {
1544          if (!inst) {
1545             /* error recovery */
1546             return NULL;
1547          }
1548          condWritemask = inst->DstReg.WriteMask;
1549       }
1550    }
1551
1552    if (!n->Children[0]->Store)
1553       return NULL;
1554
1555 #if 0
1556    assert(n->Children[0]->Store->Size == 1); /* a bool! */
1557 #endif
1558
1559    ifInstLoc = prog->NumInstructions;
1560    if (emitInfo->EmitHighLevelInstructions) {
1561       if (emitInfo->EmitCondCodes) {
1562          /* IF condcode THEN ... */
1563          struct prog_instruction *ifInst;
1564          ifInst = new_instruction(emitInfo, OPCODE_IF);
1565          ifInst->DstReg.CondMask = COND_NE;  /* if cond is non-zero */
1566          /* only test the cond code (1 of 4) that was updated by the
1567           * previous instruction.
1568           */
1569          ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1570       }
1571       else {
1572          /* IF src[0] THEN ... */
1573          emit_instruction(emitInfo, OPCODE_IF,
1574                           NULL, /* dst */
1575                           n->Children[0]->Store, /* op0 */
1576                           NULL,
1577                           NULL);
1578       }
1579    }
1580    else {
1581       /* conditional jump to else, or endif */
1582       struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
1583       ifInst->DstReg.CondMask = COND_EQ;  /* BRA if cond is zero */
1584       inst_comment(ifInst, "if zero");
1585       ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1586    }
1587
1588    /* if body */
1589    emit(emitInfo, n->Children[1]);
1590
1591    if (n->Children[2]) {
1592       /* have else body */
1593       elseInstLoc = prog->NumInstructions;
1594       if (emitInfo->EmitHighLevelInstructions) {
1595          (void) new_instruction(emitInfo, OPCODE_ELSE);
1596       }
1597       else {
1598          /* jump to endif instruction */
1599          struct prog_instruction *inst;
1600          inst = new_instruction(emitInfo, OPCODE_BRA);
1601          inst_comment(inst, "else");
1602          inst->DstReg.CondMask = COND_TR;  /* always branch */
1603       }
1604       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1605       emit(emitInfo, n->Children[2]);
1606    }
1607    else {
1608       /* no else body */
1609       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1610    }
1611
1612    if (emitInfo->EmitHighLevelInstructions) {
1613       (void) new_instruction(emitInfo, OPCODE_ENDIF);
1614    }
1615
1616    if (n->Children[2]) {
1617       prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
1618    }
1619    return NULL;
1620 }
1621
1622
1623 static struct prog_instruction *
1624 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1625 {
1626    struct gl_program *prog = emitInfo->prog;
1627    struct prog_instruction *endInst;
1628    GLuint beginInstLoc, tailInstLoc, endInstLoc;
1629    slang_ir_node *ir;
1630
1631    /* emit OPCODE_BGNLOOP */
1632    beginInstLoc = prog->NumInstructions;
1633    if (emitInfo->EmitHighLevelInstructions) {
1634       (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1635    }
1636
1637    /* body */
1638    emit(emitInfo, n->Children[0]);
1639
1640    /* tail */
1641    tailInstLoc = prog->NumInstructions;
1642    if (n->Children[1]) {
1643       if (emitInfo->EmitComments)
1644          emit_comment(emitInfo, "Loop tail code:");
1645       emit(emitInfo, n->Children[1]);
1646    }
1647
1648    endInstLoc = prog->NumInstructions;
1649    if (emitInfo->EmitHighLevelInstructions) {
1650       /* emit OPCODE_ENDLOOP */
1651       endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1652    }
1653    else {
1654       /* emit unconditional BRA-nch */
1655       endInst = new_instruction(emitInfo, OPCODE_BRA);
1656       endInst->DstReg.CondMask = COND_TR;  /* always true */
1657    }
1658    /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1659    endInst->BranchTarget = beginInstLoc;
1660
1661    if (emitInfo->EmitHighLevelInstructions) {
1662       /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1663       prog->Instructions[beginInstLoc].BranchTarget = prog->NumInstructions -1;
1664    }
1665
1666    /* Done emitting loop code.  Now walk over the loop's linked list of
1667     * BREAK and CONT nodes, filling in their BranchTarget fields (which
1668     * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1669     */
1670    for (ir = n->List; ir; ir = ir->List) {
1671       struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1672       assert(inst->BranchTarget < 0);
1673       if (ir->Opcode == IR_BREAK ||
1674           ir->Opcode == IR_BREAK_IF_TRUE) {
1675          assert(inst->Opcode == OPCODE_BRK ||
1676                 inst->Opcode == OPCODE_BRA);
1677          /* go to instruction after end of loop */
1678          inst->BranchTarget = endInstLoc + 1;
1679       }
1680       else {
1681          assert(ir->Opcode == IR_CONT ||
1682                 ir->Opcode == IR_CONT_IF_TRUE);
1683          assert(inst->Opcode == OPCODE_CONT ||
1684                 inst->Opcode == OPCODE_BRA);
1685          /* go to instruction at tail of loop */
1686          inst->BranchTarget = endInstLoc;
1687       }
1688    }
1689    return NULL;
1690 }
1691
1692
1693 /**
1694  * Unconditional "continue" or "break" statement.
1695  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1696  */
1697 static struct prog_instruction *
1698 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1699 {
1700    gl_inst_opcode opcode;
1701    struct prog_instruction *inst;
1702
1703    if (n->Opcode == IR_CONT) {
1704       /* we need to execute the loop's tail code before doing CONT */
1705       assert(n->Parent);
1706       assert(n->Parent->Opcode == IR_LOOP);
1707       if (n->Parent->Children[1]) {
1708          /* emit tail code */
1709          if (emitInfo->EmitComments) {
1710             emit_comment(emitInfo, "continue - tail code:");
1711          }
1712          emit(emitInfo, n->Parent->Children[1]);
1713       }
1714    }
1715
1716    /* opcode selection */
1717    if (emitInfo->EmitHighLevelInstructions) {
1718       opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1719    }
1720    else {
1721       opcode = OPCODE_BRA;
1722    }
1723    n->InstLocation = emitInfo->prog->NumInstructions;
1724    inst = new_instruction(emitInfo, opcode);
1725    inst->DstReg.CondMask = COND_TR;  /* always true */
1726    return inst;
1727 }
1728
1729
1730 /**
1731  * Conditional "continue" or "break" statement.
1732  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1733  */
1734 static struct prog_instruction *
1735 emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n)
1736 {
1737    struct prog_instruction *inst;
1738
1739    assert(n->Opcode == IR_CONT_IF_TRUE ||
1740           n->Opcode == IR_BREAK_IF_TRUE);
1741
1742    /* evaluate condition expr, setting cond codes */
1743    inst = emit(emitInfo, n->Children[0]);
1744    if (emitInfo->EmitCondCodes) {
1745       assert(inst);
1746       inst->CondUpdate = GL_TRUE;
1747    }
1748
1749    n->InstLocation = emitInfo->prog->NumInstructions;
1750
1751    /* opcode selection */
1752    if (emitInfo->EmitHighLevelInstructions) {
1753       const gl_inst_opcode opcode
1754          = (n->Opcode == IR_CONT_IF_TRUE) ? OPCODE_CONT : OPCODE_BRK;
1755       if (emitInfo->EmitCondCodes) {
1756          /* Get the writemask from the previous instruction which set
1757           * the condcodes.  Use that writemask as the CondSwizzle.
1758           */
1759          const GLuint condWritemask = inst->DstReg.WriteMask;
1760          inst = new_instruction(emitInfo, opcode);
1761          inst->DstReg.CondMask = COND_NE;
1762          inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1763          return inst;
1764       }
1765       else {
1766          /* IF reg
1767           *    BRK/CONT;
1768           * ENDIF
1769           */
1770          GLint ifInstLoc;
1771          ifInstLoc = emitInfo->prog->NumInstructions;
1772          inst = emit_instruction(emitInfo, OPCODE_IF,
1773                                  NULL, /* dest */
1774                                  n->Children[0]->Store,
1775                                  NULL,
1776                                  NULL);
1777          n->InstLocation = emitInfo->prog->NumInstructions;
1778
1779          inst = new_instruction(emitInfo, opcode);
1780          inst = new_instruction(emitInfo, OPCODE_ENDIF);
1781
1782          emitInfo->prog->Instructions[ifInstLoc].BranchTarget
1783             = emitInfo->prog->NumInstructions;
1784          return inst;
1785       }
1786    }
1787    else {
1788       const GLuint condWritemask = inst->DstReg.WriteMask;
1789       assert(emitInfo->EmitCondCodes);
1790       inst = new_instruction(emitInfo, OPCODE_BRA);
1791       inst->DstReg.CondMask = COND_NE;
1792       inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1793       return inst;
1794    }
1795 }
1796
1797
1798 static struct prog_instruction *
1799 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1800 {
1801    struct prog_instruction *inst;
1802
1803    inst = emit(emitInfo, n->Children[0]);
1804
1805 #if 0
1806    assert(n->Store->Parent);
1807    /* Apply this node's swizzle to parent's storage */
1808    GLuint swizzle = n->Store->Swizzle;
1809    _slang_copy_ir_storage(n->Store, n->Store->Parent);
1810    n->Store->Swizzle = _slang_swizzle_swizzle(n->Store->Swizzle, swizzle);
1811    assert(!n->Store->Parent);
1812 #endif
1813    return inst;
1814 }
1815
1816
1817 /**
1818  * Dereference array element:  element == array[index]
1819  * This basically involves emitting code for computing the array index
1820  * and updating the node/element's storage info.
1821  */
1822 static struct prog_instruction *
1823 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1824 {
1825    slang_ir_storage *arrayStore, *indexStore;
1826    const int elemSize = n->Store->Size;           /* number of floats */
1827    const GLint elemSizeVec = (elemSize + 3) / 4;  /* number of vec4 */
1828    struct prog_instruction *inst;
1829
1830    assert(n->Opcode == IR_ELEMENT);
1831    assert(elemSize > 0);
1832
1833    /* special case for built-in state variables, like light state */
1834    {
1835       slang_ir_storage *root = n->Store;
1836       assert(!root->Parent);
1837       while (root->Parent)
1838          root = root->Parent;
1839
1840       if (root->File == PROGRAM_STATE_VAR) {
1841          GLint index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1842          assert(n->Store->Index == index);
1843          return NULL;
1844       }
1845    }
1846
1847    /* do codegen for array itself */
1848    emit(emitInfo, n->Children[0]);
1849    arrayStore = n->Children[0]->Store;
1850
1851    /* The initial array element storage is the array's storage,
1852     * then modified below.
1853     */
1854    _slang_copy_ir_storage(n->Store, arrayStore);
1855
1856
1857    if (n->Children[1]->Opcode == IR_FLOAT) {
1858       /* Constant array index */
1859       const GLint element = (GLint) n->Children[1]->Value[0];
1860
1861       /* this element's storage is the array's storage, plus constant offset */
1862       n->Store->Index += elemSizeVec * element;
1863    }
1864    else {
1865       /* Variable array index */
1866
1867       /* do codegen for array index expression */
1868       emit(emitInfo, n->Children[1]);
1869       indexStore = n->Children[1]->Store;
1870
1871       if (indexStore->IsIndirect) {
1872          /* need to put the array index into a temporary since we can't
1873           * directly support a[b[i]] constructs.
1874           */
1875
1876
1877          /*indexStore = tempstore();*/
1878       }
1879
1880
1881       if (elemSize > 4) {
1882          /* need to multiply array index by array element size */
1883          struct prog_instruction *inst;
1884          slang_ir_storage *indexTemp;
1885          slang_ir_storage elemSizeStore;
1886
1887          /* allocate 1 float indexTemp */
1888          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1889          _slang_alloc_temp(emitInfo->vt, indexTemp);
1890
1891          /* allocate a constant containing the element size */
1892          constant_to_storage(emitInfo, (float) elemSizeVec, &elemSizeStore);
1893
1894          /* multiply array index by element size */
1895          inst = emit_instruction(emitInfo,
1896                                  OPCODE_MUL,
1897                                  indexTemp, /* dest */
1898                                  indexStore, /* the index */
1899                                  &elemSizeStore,
1900                                  NULL);
1901
1902          indexStore = indexTemp;
1903       }
1904
1905       if (arrayStore->IsIndirect) {
1906          /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
1907          /* Need to add indexStore to arrayStore->Indirect store */
1908          slang_ir_storage indirectArray;
1909          slang_ir_storage *indexTemp;
1910
1911          _slang_init_ir_storage(&indirectArray,
1912                                 arrayStore->IndirectFile,
1913                                 arrayStore->IndirectIndex,
1914                                 1,
1915                                 arrayStore->IndirectSwizzle);
1916
1917          /* allocate 1 float indexTemp */
1918          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1919          _slang_alloc_temp(emitInfo->vt, indexTemp);
1920
1921          inst = emit_instruction(emitInfo,
1922                                  OPCODE_ADD,
1923                                  indexTemp,      /* dest */
1924                                  indexStore,     /* the index */
1925                                  &indirectArray, /* indirect array base */
1926                                  NULL);
1927
1928          indexStore = indexTemp;
1929       }
1930
1931       /* update the array element storage info */
1932       n->Store->IsIndirect = GL_TRUE;
1933       n->Store->IndirectFile = indexStore->File;
1934       n->Store->IndirectIndex = indexStore->Index;
1935       n->Store->IndirectSwizzle = indexStore->Swizzle;
1936    }
1937
1938    n->Store->Size = elemSize;
1939    n->Store->Swizzle = _slang_var_swizzle(elemSize, 0);
1940
1941    return NULL; /* no instruction */
1942 }
1943
1944
1945 /**
1946  * Resolve storage for accessing a structure field.
1947  */
1948 static struct prog_instruction *
1949 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1950 {
1951    slang_ir_storage *root = n->Store;
1952    GLint fieldOffset, fieldSize;
1953
1954    assert(n->Opcode == IR_FIELD);
1955
1956    assert(!root->Parent);
1957    while (root->Parent)
1958       root = root->Parent;
1959
1960    /* If this is the field of a state var, allocate constant/uniform
1961     * storage for it now if we haven't already.
1962     * Note that we allocate storage (uniform/constant slots) for state
1963     * variables here rather than at declaration time so we only allocate
1964     * space for the ones that we actually use!
1965     */
1966    if (root->File == PROGRAM_STATE_VAR) {
1967       root->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1968       if (root->Index < 0) {
1969          slang_info_log_error(emitInfo->log, "Error parsing state variable");
1970          return NULL;
1971       }
1972       return NULL;
1973    }
1974    else {
1975       /* do codegen for struct */
1976       emit(emitInfo, n->Children[0]);
1977       assert(n->Children[0]->Store->Index >= 0);
1978    }
1979
1980    fieldOffset = n->Store->Index;
1981    fieldSize = n->Store->Size;
1982
1983    _slang_copy_ir_storage(n->Store, n->Children[0]->Store);
1984
1985    n->Store->Index = n->Children[0]->Store->Index + fieldOffset / 4;
1986    /* XXX test this:
1987    n->Store->Index += fieldOffset / 4;
1988    */
1989
1990    switch (fieldSize) {
1991    case 1:
1992       {
1993          GLint swz = fieldOffset % 4;
1994          n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
1995       }
1996       break;
1997    case 2:
1998       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
1999                                         SWIZZLE_NIL, SWIZZLE_NIL);
2000       break;
2001    case 3:
2002       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
2003                                         SWIZZLE_Z, SWIZZLE_NIL);
2004       break;
2005    default:
2006       n->Store->Swizzle = SWIZZLE_XYZW;
2007    }
2008
2009    assert(n->Store->Index >= 0);
2010
2011    return NULL; /* no instruction */
2012 }
2013
2014
2015 /**
2016  * Emit code for a variable declaration.
2017  * This usually doesn't result in any code generation, but just
2018  * memory allocation.
2019  */
2020 static struct prog_instruction *
2021 emit_var_decl(slang_emit_info *emitInfo, slang_ir_node *n)
2022 {
2023    assert(n->Store);
2024    assert(n->Store->File != PROGRAM_UNDEFINED);
2025    assert(n->Store->Size > 0);
2026    /*assert(n->Store->Index < 0);*/
2027
2028    if (!n->Var || n->Var->isTemp) {
2029       /* a nameless/temporary variable, will be freed after first use */
2030       /*NEW*/
2031       if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
2032          slang_info_log_error(emitInfo->log,
2033                               "Ran out of registers, too many temporaries");
2034          return NULL;
2035       }
2036    }
2037    else {
2038       /* a regular variable */
2039       _slang_add_variable(emitInfo->vt, n->Var);
2040       if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
2041          slang_info_log_error(emitInfo->log,
2042                               "Ran out of registers, too many variables");
2043          return NULL;
2044       }
2045       /*
2046         printf("IR_VAR_DECL %s %d store %p\n",
2047         (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2048       */
2049       assert(n->Var->store == n->Store);
2050    }
2051    if (emitInfo->EmitComments) {
2052       /* emit NOP with comment describing the variable's storage location */
2053       char s[1000];
2054       sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
2055               n->Store->Index,
2056               _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
2057               (n->Var ? (char *) n->Var->a_name : "anonymous"),
2058               n->Store->Size);
2059       emit_comment(emitInfo, s);
2060    }
2061    return NULL;
2062 }
2063
2064
2065 /**
2066  * Emit code for a reference to a variable.
2067  * Actually, no code is generated but we may do some memory allocation.
2068  * In particular, state vars (uniforms) are allocated on an as-needed basis.
2069  */
2070 static struct prog_instruction *
2071 emit_var_ref(slang_emit_info *emitInfo, slang_ir_node *n)
2072 {
2073    assert(n->Store);
2074    assert(n->Store->File != PROGRAM_UNDEFINED);
2075
2076    if (n->Store->File == PROGRAM_STATE_VAR && n->Store->Index < 0) {
2077       n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
2078    }
2079    else if (n->Store->File == PROGRAM_UNIFORM) {
2080       /* mark var as used */
2081       _mesa_use_uniform(emitInfo->prog->Parameters, (char *) n->Var->a_name);
2082    }
2083
2084    if (n->Store->Index < 0) {
2085       /* probably ran out of registers */
2086       return NULL;
2087    }
2088    assert(n->Store->Size > 0);
2089
2090    return NULL;
2091 }
2092
2093
2094 static struct prog_instruction *
2095 emit(slang_emit_info *emitInfo, slang_ir_node *n)
2096 {
2097    struct prog_instruction *inst;
2098    if (!n)
2099       return NULL;
2100
2101    if (emitInfo->log->error_flag) {
2102       return NULL;
2103    }
2104
2105    switch (n->Opcode) {
2106    case IR_SEQ:
2107       /* sequence of two sub-trees */
2108       assert(n->Children[0]);
2109       assert(n->Children[1]);
2110       emit(emitInfo, n->Children[0]);
2111       if (emitInfo->log->error_flag)
2112          return NULL;
2113       inst = emit(emitInfo, n->Children[1]);
2114 #if 0
2115       assert(!n->Store);
2116 #endif
2117       n->Store = n->Children[1]->Store;
2118       return inst;
2119
2120    case IR_SCOPE:
2121       /* new variable scope */
2122       _slang_push_var_table(emitInfo->vt);
2123       inst = emit(emitInfo, n->Children[0]);
2124       _slang_pop_var_table(emitInfo->vt);
2125       return inst;
2126
2127    case IR_VAR_DECL:
2128       /* Variable declaration - allocate a register for it */
2129       inst = emit_var_decl(emitInfo, n);
2130       return inst;
2131
2132    case IR_VAR:
2133       /* Reference to a variable
2134        * Storage should have already been resolved/allocated.
2135        */
2136       return emit_var_ref(emitInfo, n);
2137
2138    case IR_ELEMENT:
2139       return emit_array_element(emitInfo, n);
2140    case IR_FIELD:
2141       return emit_struct_field(emitInfo, n);
2142    case IR_SWIZZLE:
2143       return emit_swizzle(emitInfo, n);
2144
2145    /* Simple arithmetic */
2146    /* unary */
2147    case IR_MOVE:
2148    case IR_RSQ:
2149    case IR_RCP:
2150    case IR_FLOOR:
2151    case IR_FRAC:
2152    case IR_F_TO_I:
2153    case IR_I_TO_F:
2154    case IR_ABS:
2155    case IR_SIN:
2156    case IR_COS:
2157    case IR_DDX:
2158    case IR_DDY:
2159    case IR_EXP:
2160    case IR_EXP2:
2161    case IR_LOG2:
2162    case IR_NOISE1:
2163    case IR_NOISE2:
2164    case IR_NOISE3:
2165    case IR_NOISE4:
2166    /* binary */
2167    case IR_ADD:
2168    case IR_SUB:
2169    case IR_MUL:
2170    case IR_DOT4:
2171    case IR_DOT3:
2172    case IR_CROSS:
2173    case IR_MIN:
2174    case IR_MAX:
2175    case IR_SEQUAL:
2176    case IR_SNEQUAL:
2177    case IR_SGE:
2178    case IR_SGT:
2179    case IR_SLE:
2180    case IR_SLT:
2181    case IR_POW:
2182    /* trinary operators */
2183    case IR_LRP:
2184       return emit_arith(emitInfo, n);
2185
2186    case IR_EQUAL:
2187    case IR_NOTEQUAL:
2188       return emit_compare(emitInfo, n);
2189
2190    case IR_CLAMP:
2191       return emit_clamp(emitInfo, n);
2192    case IR_TEX:
2193    case IR_TEXB:
2194    case IR_TEXP:
2195       return emit_tex(emitInfo, n);
2196    case IR_NEG:
2197       return emit_negation(emitInfo, n);
2198    case IR_FLOAT:
2199       /* find storage location for this float constant */
2200       n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
2201                                                    n->Value,
2202                                                    n->Store->Size,
2203                                                    &n->Store->Swizzle);
2204       if (n->Store->Index < 0) {
2205          slang_info_log_error(emitInfo->log, "Ran out of space for constants");
2206          return NULL;
2207       }
2208       return NULL;
2209
2210    case IR_COPY:
2211       return emit_copy(emitInfo, n);
2212
2213    case IR_COND:
2214       return emit_cond(emitInfo, n);
2215
2216    case IR_NOT:
2217       return emit_not(emitInfo, n);
2218
2219    case IR_LABEL:
2220       return emit_label(emitInfo, n);
2221
2222    case IR_KILL:
2223       return emit_kill(emitInfo);
2224
2225    case IR_CALL:
2226       /* new variable scope for subroutines/function calls */
2227       _slang_push_var_table(emitInfo->vt);
2228       inst = emit_fcall(emitInfo, n);
2229       _slang_pop_var_table(emitInfo->vt);
2230       return inst;
2231
2232    case IR_IF:
2233       return emit_if(emitInfo, n);
2234
2235    case IR_LOOP:
2236       return emit_loop(emitInfo, n);
2237    case IR_BREAK_IF_TRUE:
2238    case IR_CONT_IF_TRUE:
2239       return emit_cont_break_if_true(emitInfo, n);
2240    case IR_BREAK:
2241       /* fall-through */
2242    case IR_CONT:
2243       return emit_cont_break(emitInfo, n);
2244
2245    case IR_BEGIN_SUB:
2246       return new_instruction(emitInfo, OPCODE_BGNSUB);
2247    case IR_END_SUB:
2248       return new_instruction(emitInfo, OPCODE_ENDSUB);
2249    case IR_RETURN:
2250       return emit_return(emitInfo, n);
2251
2252    case IR_NOP:
2253       return NULL;
2254
2255    default:
2256       _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
2257    }
2258    return NULL;
2259 }
2260
2261
2262 /**
2263  * After code generation, any subroutines will be in separate program
2264  * objects.  This function appends all the subroutines onto the main
2265  * program and resolves the linking of all the branch/call instructions.
2266  * XXX this logic should really be part of the linking process...
2267  */
2268 static void
2269 _slang_resolve_subroutines(slang_emit_info *emitInfo)
2270 {
2271    GET_CURRENT_CONTEXT(ctx);
2272    struct gl_program *mainP = emitInfo->prog;
2273    GLuint *subroutineLoc, i, total;
2274
2275    subroutineLoc
2276       = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
2277
2278    /* total number of instructions */
2279    total = mainP->NumInstructions;
2280    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2281       subroutineLoc[i] = total;
2282       total += emitInfo->Subroutines[i]->NumInstructions;
2283    }
2284
2285    /* adjust BranchTargets within the functions */
2286    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2287       struct gl_program *sub = emitInfo->Subroutines[i];
2288       GLuint j;
2289       for (j = 0; j < sub->NumInstructions; j++) {
2290          struct prog_instruction *inst = sub->Instructions + j;
2291          if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
2292             inst->BranchTarget += subroutineLoc[i];
2293          }
2294       }
2295    }
2296
2297    /* append subroutines' instructions after main's instructions */
2298    mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
2299                                                     mainP->NumInstructions,
2300                                                     total);
2301    mainP->NumInstructions = total;
2302    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2303       struct gl_program *sub = emitInfo->Subroutines[i];
2304       _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
2305                               sub->Instructions,
2306                               sub->NumInstructions);
2307       /* delete subroutine code */
2308       sub->Parameters = NULL; /* prevent double-free */
2309       _mesa_reference_program(ctx, &emitInfo->Subroutines[i], NULL);
2310    }
2311
2312    /* free subroutine list */
2313    if (emitInfo->Subroutines) {
2314       _mesa_free(emitInfo->Subroutines);
2315       emitInfo->Subroutines = NULL;
2316    }
2317    emitInfo->NumSubroutines = 0;
2318
2319    /* Examine CAL instructions.
2320     * At this point, the BranchTarget field of the CAL instruction is
2321     * the number/id of the subroutine to call (an index into the
2322     * emitInfo->Subroutines list).
2323     * Translate that into an actual instruction location now.
2324     */
2325    for (i = 0; i < mainP->NumInstructions; i++) {
2326       struct prog_instruction *inst = mainP->Instructions + i;
2327       if (inst->Opcode == OPCODE_CAL) {
2328          const GLuint f = inst->BranchTarget;
2329          inst->BranchTarget = subroutineLoc[f];
2330       }
2331    }
2332
2333    _mesa_free(subroutineLoc);
2334 }
2335
2336
2337
2338
2339 GLboolean
2340 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
2341                  struct gl_program *prog, GLboolean withEnd,
2342                  slang_info_log *log)
2343 {
2344    GET_CURRENT_CONTEXT(ctx);
2345    GLboolean success;
2346    slang_emit_info emitInfo;
2347    GLuint maxUniforms;
2348
2349    emitInfo.log = log;
2350    emitInfo.vt = vt;
2351    emitInfo.prog = prog;
2352    emitInfo.Subroutines = NULL;
2353    emitInfo.NumSubroutines = 0;
2354    emitInfo.MaxInstructions = prog->NumInstructions;
2355
2356    emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
2357    emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
2358    emitInfo.EmitComments = ctx->Shader.EmitComments;
2359    emitInfo.EmitBeginEndSub = GL_TRUE;
2360
2361    if (!emitInfo.EmitCondCodes) {
2362       emitInfo.EmitHighLevelInstructions = GL_TRUE;
2363    }
2364
2365    /* Check uniform/constant limits */
2366    if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
2367       maxUniforms = ctx->Const.FragmentProgram.MaxUniformComponents / 4;
2368    }
2369    else {
2370       assert(prog->Target == GL_VERTEX_PROGRAM_ARB);
2371       maxUniforms = ctx->Const.VertexProgram.MaxUniformComponents / 4;
2372    }
2373    if (prog->Parameters->NumParameters > maxUniforms) {
2374       slang_info_log_error(log, "Constant/uniform register limit exceeded");
2375       return GL_FALSE;
2376    }
2377
2378    (void) emit(&emitInfo, n);
2379
2380    /* finish up by adding the END opcode to program */
2381    if (withEnd) {
2382       struct prog_instruction *inst;
2383       inst = new_instruction(&emitInfo, OPCODE_END);
2384    }
2385
2386    _slang_resolve_subroutines(&emitInfo);
2387
2388    success = GL_TRUE;
2389
2390 #if 0
2391    printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
2392    _mesa_print_program(prog);
2393    _mesa_print_program_parameters(ctx,prog);
2394 #endif
2395
2396    return success;
2397 }