2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
35 #include "prog_instruction.h"
36 #include "prog_parameter.h"
37 #include "prog_print.h"
38 #include "slang_builtin.h"
39 #include "slang_emit.h"
40 #include "slang_error.h"
43 #define PEEPHOLE_OPTIMIZATIONS 1
47 /* XXX temporarily here */
48 static GLboolean EmitHighLevelInstructions
= GL_TRUE
;
53 * Assembly and IR info
57 slang_ir_opcode IrOpcode
;
59 gl_inst_opcode InstOpcode
;
60 GLuint ResultSize
, NumParams
;
65 static const slang_ir_info IrInfo
[] = {
67 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
68 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
69 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
70 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
71 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
72 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
73 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
74 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
75 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
76 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
77 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
78 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
79 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
80 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
81 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
82 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
84 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
85 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
86 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
87 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
88 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
89 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
90 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
91 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
92 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
93 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
94 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
95 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
96 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
97 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
98 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
99 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
100 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
101 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
102 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
105 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
106 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
107 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
108 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
109 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
110 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
111 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
112 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
113 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
114 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
115 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
116 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
117 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
118 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
119 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
120 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
121 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
122 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 }, /* float literal */
123 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
124 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
125 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
126 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
130 static const slang_ir_info
*
131 slang_find_ir_info(slang_ir_opcode opcode
)
134 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
135 if (IrInfo
[i
].IrOpcode
== opcode
) {
143 slang_ir_name(slang_ir_opcode opcode
)
145 return slang_find_ir_info(opcode
)->IrName
;
150 * Swizzle a swizzle. That is, return swz2(swz1)
153 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
156 for (i
= 0; i
< 4; i
++) {
157 GLuint c
= GET_SWZ(swz2
, i
);
158 s
[i
] = GET_SWZ(swz1
, c
);
160 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
166 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
168 slang_ir_storage
*st
;
169 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
174 st
->Swizzle
= SWIZZLE_NOOP
;
181 swizzle_string(GLuint swizzle
)
186 for (i
= 1; i
< 5; i
++) {
187 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
194 writemask_string(GLuint writemask
)
199 for (i
= 0; i
< 4; i
++) {
200 if (writemask
& (1 << i
))
208 storage_string(const slang_ir_storage
*st
)
210 static const char *files
[] = {
228 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
230 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
231 st
->Index
+ st
->Size
- 1);
233 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
234 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
249 slang_print_ir(const slang_ir_node
*n
, int indent
)
254 if (n
->Opcode
!= IR_SEQ
)
256 printf("%3d:", indent
);
263 printf("SEQ at %p\n", (void*) n
);
265 assert(n
->Children
[0]);
266 assert(n
->Children
[1]);
267 slang_print_ir(n
->Children
[0], indent
+ IND
);
268 slang_print_ir(n
->Children
[1], indent
+ IND
);
271 printf("NEW SCOPE\n");
272 assert(!n
->Children
[1]);
273 slang_print_ir(n
->Children
[0], indent
+ 3);
276 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
277 slang_print_ir(n
->Children
[0], indent
+3);
278 slang_print_ir(n
->Children
[1], indent
+3);
281 printf("LABEL: %s\n", n
->Target
);
285 slang_print_ir(n
->Children
[0], indent
+ 3);
288 printf("JUMP %s\n", n
->Target
);
291 printf("CJUMP0 %s\n", n
->Target
);
292 slang_print_ir(n
->Children
[0], indent
+3);
295 printf("CJUMP1 %s\n", n
->Target
);
296 slang_print_ir(n
->Children
[0], indent
+3);
301 slang_print_ir(n
->Children
[0], indent
+3);
304 slang_print_ir(n
->Children
[1], indent
+3);
305 if (n
->Children
[2]) {
308 slang_print_ir(n
->Children
[2], indent
+3);
314 printf("BEGIN_SUB\n");
328 slang_print_ir(n
->Children
[0], indent
+3);
338 case IR_BREAK_IF_FALSE
:
339 printf("BREAK_IF_FALSE\n");
340 slang_print_ir(n
->Children
[0], indent
+3);
342 case IR_BREAK_IF_TRUE
:
343 printf("BREAK_IF_TRUE\n");
344 slang_print_ir(n
->Children
[0], indent
+3);
346 case IR_CONT_IF_FALSE
:
347 printf("CONT_IF_FALSE\n");
348 slang_print_ir(n
->Children
[0], indent
+3);
350 case IR_CONT_IF_TRUE
:
351 printf("CONT_IF_TRUE\n");
352 slang_print_ir(n
->Children
[0], indent
+3);
356 printf("VAR %s%s at %s store %p\n",
357 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
358 swizzle_string(n
->Store
->Swizzle
),
359 storage_string(n
->Store
), (void*) n
->Store
);
362 printf("VAR_DECL %s (%p) at %s store %p\n",
363 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
364 (void*) n
->Var
, storage_string(n
->Store
),
368 printf("FIELD %s of\n", n
->Target
);
369 slang_print_ir(n
->Children
[0], indent
+3);
372 printf("FLOAT %g %g %g %g\n",
373 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
376 printf("INT_TO_FLOAT\n");
377 slang_print_ir(n
->Children
[0], indent
+3);
380 printf("FLOAT_TO_INT\n");
381 slang_print_ir(n
->Children
[0], indent
+3);
384 printf("SWIZZLE %s of (store %p) \n",
385 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
386 slang_print_ir(n
->Children
[0], indent
+ 3);
389 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
390 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
391 slang_print_ir(n
->Children
[0], indent
+3);
392 slang_print_ir(n
->Children
[1], indent
+3);
398 * Allocate temporary storage for an intermediate result (such as for
399 * a multiply or add, etc.
402 alloc_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
, GLint size
)
407 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
408 if (!_slang_alloc_temp(vt
, n
->Store
)) {
409 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
416 * Free temporary storage, if n->Store is, in fact, temp storage.
420 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
422 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
423 if (_slang_is_temp(vt
, n
->Store
)) {
424 _slang_free_temp(vt
, n
->Store
);
425 n
->Store
->Index
= -1;
433 * Convert IR storage to an instruction dst register.
436 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
439 static const GLuint defaultWritemask
[4] = {
441 WRITEMASK_X
| WRITEMASK_Y
,
442 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
443 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
445 assert(st
->Index
>= 0 && st
->Index
<= 16);
446 dst
->File
= st
->File
;
447 dst
->Index
= st
->Index
;
448 assert(st
->File
!= PROGRAM_UNDEFINED
);
449 assert(st
->Size
>= 1);
450 assert(st
->Size
<= 4);
452 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
454 assert(writemask
& WRITEMASK_X
);
455 dst
->WriteMask
= WRITEMASK_X
<< comp
;
458 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
464 * Convert IR storage to an instruction src register.
467 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
469 static const GLuint defaultSwizzle
[4] = {
470 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
471 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
472 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
473 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
475 assert(st
->File
>= 0 && st
->File
<= 16);
476 src
->File
= st
->File
;
477 src
->Index
= st
->Index
;
478 assert(st
->File
!= PROGRAM_UNDEFINED
);
479 assert(st
->Size
>= 1);
480 assert(st
->Size
<= 4);
481 if (st
->Swizzle
!= SWIZZLE_NOOP
)
482 src
->Swizzle
= st
->Swizzle
;
484 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
486 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
487 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
488 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
489 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
495 * Add new instruction at end of given program.
496 * \param prog the program to append instruction onto
497 * \param opcode opcode for the new instruction
498 * \return pointer to the new instruction
500 static struct prog_instruction
*
501 new_instruction(struct gl_program
*prog
, gl_inst_opcode opcode
)
503 struct prog_instruction
*inst
;
504 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
505 prog
->NumInstructions
,
506 prog
->NumInstructions
+ 1);
507 inst
= prog
->Instructions
+ prog
->NumInstructions
;
508 prog
->NumInstructions
++;
509 _mesa_init_instructions(inst
, 1);
510 inst
->Opcode
= opcode
;
511 inst
->BranchTarget
= -1; /* invalid */
517 * Return pointer to last instruction in program.
519 static struct prog_instruction
*
520 prev_instruction(struct gl_program
*prog
)
522 if (prog
->NumInstructions
== 0)
525 return prog
->Instructions
+ prog
->NumInstructions
- 1;
529 static struct prog_instruction
*
530 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
);
534 * Return an annotation string for given node's storage.
537 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
540 const slang_ir_storage
*st
= n
->Store
;
541 static char s
[100] = "";
544 return _mesa_strdup("");
547 case PROGRAM_CONSTANT
:
548 if (st
->Index
>= 0) {
549 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
550 if (st
->Swizzle
== SWIZZLE_NOOP
)
551 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
553 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
557 case PROGRAM_TEMPORARY
:
559 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
561 sprintf(s
, "t[%d]", st
->Index
);
563 case PROGRAM_STATE_VAR
:
564 case PROGRAM_UNIFORM
:
565 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
567 case PROGRAM_VARYING
:
568 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
571 sprintf(s
, "input[%d]", st
->Index
);
574 sprintf(s
, "output[%d]", st
->Index
);
579 return _mesa_strdup(s
);
587 * Return an annotation string for an instruction.
590 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
591 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
594 const char *operator;
599 len
+= strlen(dstAnnot
);
601 dstAnnot
= _mesa_strdup("");
604 len
+= strlen(srcAnnot0
);
606 srcAnnot0
= _mesa_strdup("");
609 len
+= strlen(srcAnnot1
);
611 srcAnnot1
= _mesa_strdup("");
614 len
+= strlen(srcAnnot2
);
616 srcAnnot2
= _mesa_strdup("");
647 s
= (char *) malloc(len
);
648 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
649 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
650 assert(_mesa_strlen(s
) < len
);
666 * Generate code for a simple arithmetic instruction.
667 * Either 1, 2 or 3 operands.
669 static struct prog_instruction
*
670 emit_arith(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
672 struct prog_instruction
*inst
;
673 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
674 char *srcAnnot
[3], *dstAnnot
;
678 assert(info
->InstOpcode
!= OPCODE_NOP
);
680 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
682 #if PEEPHOLE_OPTIMIZATIONS
683 /* Look for MAD opportunity */
684 if (info
->NumParams
== 2 &&
685 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
686 /* found pattern IR_ADD(IR_MUL(A, B), C) */
687 emit(vt
, n
->Children
[0]->Children
[0], prog
); /* A */
688 emit(vt
, n
->Children
[0]->Children
[1], prog
); /* B */
689 emit(vt
, n
->Children
[1], prog
); /* C */
690 /* generate MAD instruction */
691 inst
= new_instruction(prog
, OPCODE_MAD
);
692 /* operands: A, B, C: */
693 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
694 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
695 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
696 free_temp_storage(vt
, n
->Children
[0]->Children
[0]);
697 free_temp_storage(vt
, n
->Children
[0]->Children
[1]);
698 free_temp_storage(vt
, n
->Children
[1]);
700 else if (info
->NumParams
== 2 &&
701 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
702 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
703 emit(vt
, n
->Children
[0], prog
); /* A */
704 emit(vt
, n
->Children
[1]->Children
[0], prog
); /* B */
705 emit(vt
, n
->Children
[1]->Children
[1], prog
); /* C */
706 /* generate MAD instruction */
707 inst
= new_instruction(prog
, OPCODE_MAD
);
708 /* operands: B, C, A */
709 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
710 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
711 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
712 free_temp_storage(vt
, n
->Children
[1]->Children
[0]);
713 free_temp_storage(vt
, n
->Children
[1]->Children
[1]);
714 free_temp_storage(vt
, n
->Children
[0]);
721 /* gen code for children */
722 for (i
= 0; i
< info
->NumParams
; i
++)
723 emit(vt
, n
->Children
[i
], prog
);
725 /* gen this instruction and src registers */
726 inst
= new_instruction(prog
, info
->InstOpcode
);
727 for (i
= 0; i
< info
->NumParams
; i
++)
728 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
731 for (i
= 0; i
< info
->NumParams
; i
++)
732 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], prog
);
735 for (i
= 0; i
< info
->NumParams
; i
++)
736 free_temp_storage(vt
, n
->Children
[i
]);
741 if (!alloc_temp_storage(vt
, n
, info
->ResultSize
))
744 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
746 dstAnnot
= storage_annotation(n
, prog
);
748 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
749 srcAnnot
[1], srcAnnot
[2]);
751 /*_mesa_print_instruction(inst);*/
757 * Generate code for an IR_CLAMP instruction.
759 static struct prog_instruction
*
760 emit_clamp(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
762 struct prog_instruction
*inst
;
764 assert(n
->Opcode
== IR_CLAMP
);
770 inst
= emit(vt
, n
->Children
[0], prog
);
772 /* If lower limit == 0.0 and upper limit == 1.0,
773 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
775 * emit OPCODE_MIN, OPCODE_MAX sequence.
778 /* XXX this isn't quite finished yet */
779 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
780 n
->Children
[1]->Value
[0] == 0.0 &&
781 n
->Children
[1]->Value
[1] == 0.0 &&
782 n
->Children
[1]->Value
[2] == 0.0 &&
783 n
->Children
[1]->Value
[3] == 0.0 &&
784 n
->Children
[2]->Opcode
== IR_FLOAT
&&
785 n
->Children
[2]->Value
[0] == 1.0 &&
786 n
->Children
[2]->Value
[1] == 1.0 &&
787 n
->Children
[2]->Value
[2] == 1.0 &&
788 n
->Children
[2]->Value
[3] == 1.0) {
790 inst
= prev_instruction(prog
);
792 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
793 /* and prev instruction's DstReg matches n->Children[0]->Store */
794 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
795 n
->Store
= n
->Children
[0]->Store
;
802 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
805 emit(vt
, n
->Children
[1], prog
);
806 emit(vt
, n
->Children
[2], prog
);
808 /* tmp = max(ch[0], ch[1]) */
809 inst
= new_instruction(prog
, OPCODE_MAX
);
810 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
811 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
812 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
814 /* tmp = min(tmp, ch[2]) */
815 inst
= new_instruction(prog
, OPCODE_MIN
);
816 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
817 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
818 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
824 static struct prog_instruction
*
825 emit_negation(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
827 /* Implement as MOV dst, -src; */
828 /* XXX we could look at the previous instruction and in some circumstances
829 * modify it to accomplish the negation.
831 struct prog_instruction
*inst
;
833 emit(vt
, n
->Children
[0], prog
);
836 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
839 inst
= new_instruction(prog
, OPCODE_MOV
);
840 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
841 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
842 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
843 inst
->Comment
= n
->Comment
;
848 static struct prog_instruction
*
849 emit_label(const char *target
, struct gl_program
*prog
)
851 struct prog_instruction
*inst
;
852 inst
= new_instruction(prog
, OPCODE_NOP
);
853 inst
->Comment
= _mesa_strdup(target
);
858 static struct prog_instruction
*
859 emit_cjump(const char *target
, struct gl_program
*prog
, GLuint zeroOrOne
)
861 struct prog_instruction
*inst
;
862 inst
= new_instruction(prog
, OPCODE_BRA
);
864 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
866 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
867 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
868 inst
->Comment
= _mesa_strdup(target
);
873 static struct prog_instruction
*
874 emit_jump(const char *target
, struct gl_program
*prog
)
876 struct prog_instruction
*inst
;
877 inst
= new_instruction(prog
, OPCODE_BRA
);
878 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
879 /*inst->DstReg.CondSwizzle = SWIZZLE_X;*/
880 inst
->Comment
= _mesa_strdup(target
);
885 static struct prog_instruction
*
886 emit_kill(struct gl_program
*prog
)
888 struct prog_instruction
*inst
;
889 /* NV-KILL - discard fragment depending on condition code.
890 * Note that ARB-KILL depends on sign of vector operand.
892 inst
= new_instruction(prog
, OPCODE_KIL_NV
);
893 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
898 static struct prog_instruction
*
899 emit_tex(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
901 struct prog_instruction
*inst
;
902 if (n
->Opcode
== IR_TEX
) {
903 inst
= new_instruction(prog
, OPCODE_TEX
);
905 else if (n
->Opcode
== IR_TEXB
) {
906 inst
= new_instruction(prog
, OPCODE_TXB
);
909 assert(n
->Opcode
== IR_TEXP
);
910 inst
= new_instruction(prog
, OPCODE_TXP
);
914 if (!alloc_temp_storage(vt
, n
, 4))
917 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
919 (void) emit(vt
, n
->Children
[1], prog
);
921 /* Child[1] is the coord */
922 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
924 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
925 assert(n
->Children
[0]->Store
);
926 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
928 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
929 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
930 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
931 * link time, using the sampler uniform's value.
937 static struct prog_instruction
*
938 emit_move(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
940 struct prog_instruction
*inst
;
943 assert(n
->Children
[1]);
944 inst
= emit(vt
, n
->Children
[1], prog
);
946 assert(n
->Children
[1]->Store
->Index
>= 0);
949 emit(vt
, n
->Children
[0], prog
);
952 n
->Store
= n
->Children
[0]->Store
;
954 #if PEEPHOLE_OPTIMIZATIONS
955 if (inst
&& _slang_is_temp(vt
, n
->Children
[1]->Store
)) {
956 /* Peephole optimization:
957 * Just modify the RHS to put its result into the dest of this
958 * MOVE operation. Then, this MOVE is a no-op.
960 _slang_free_temp(vt
, n
->Children
[1]->Store
);
961 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
962 /* fixup the prev (RHS) instruction */
963 assert(n
->Children
[0]->Store
->Index
>= 0);
964 assert(n
->Children
[0]->Store
->Index
< 16);
965 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
971 if (n
->Children
[0]->Store
->Size
> 4) {
972 /* move matrix/struct etc (block of registers) */
973 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
974 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
975 GLint size
= srcStore
.Size
;
976 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
977 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
981 inst
= new_instruction(prog
, OPCODE_MOV
);
982 inst
->Comment
= _mesa_strdup("IR_MOVE block");
983 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
984 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
991 /* single register move */
992 char *srcAnnot
, *dstAnnot
;
993 inst
= new_instruction(prog
, OPCODE_MOV
);
994 assert(n
->Children
[0]->Store
->Index
>= 0);
995 assert(n
->Children
[0]->Store
->Index
< 16);
996 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
997 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
998 dstAnnot
= storage_annotation(n
->Children
[0], prog
);
999 srcAnnot
= storage_annotation(n
->Children
[1], prog
);
1000 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1001 srcAnnot
, NULL
, NULL
);
1003 free_temp_storage(vt
, n
->Children
[1]);
1009 static struct prog_instruction
*
1010 emit_cond(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1012 /* Conditional expression (in if/while/for stmts).
1013 * Need to update condition code register.
1014 * Next instruction is typically an IR_CJUMP0/1.
1016 /* last child expr instruction: */
1017 struct prog_instruction
*inst
= emit(vt
, n
->Children
[0], prog
);
1019 /* set inst's CondUpdate flag */
1020 inst
->CondUpdate
= GL_TRUE
;
1021 return inst
; /* XXX or null? */
1024 /* This'll happen for things like "if (i) ..." where no code
1025 * is normally generated for the expression "i".
1026 * Generate a move instruction just to set condition codes.
1027 * Note: must use full 4-component vector since all four
1028 * condition codes must be set identically.
1030 if (!alloc_temp_storage(vt
, n
, 4))
1032 inst
= new_instruction(prog
, OPCODE_MOV
);
1033 inst
->CondUpdate
= GL_TRUE
;
1034 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1035 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1036 _slang_free_temp(vt
, n
->Store
);
1037 inst
->Comment
= _mesa_strdup("COND expr");
1038 return inst
; /* XXX or null? */
1046 static struct prog_instruction
*
1047 emit_not(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1050 slang_ir_storage st
;
1051 struct prog_instruction
*inst
;
1053 /* need zero constant */
1054 st
.File
= PROGRAM_CONSTANT
;
1056 st
.Index
= _mesa_add_unnamed_constant(prog
->Parameters
, &zero
,
1060 (void) emit(vt
, n
->Children
[0], prog
);
1061 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1064 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
1067 inst
= new_instruction(prog
, OPCODE_SEQ
);
1068 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1069 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1070 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1072 free_temp_storage(vt
, n
->Children
[0]);
1074 inst
->Comment
= _mesa_strdup("NOT");
1079 static struct prog_instruction
*
1080 emit_if(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1082 struct prog_instruction
*ifInst
;
1083 GLuint ifInstLoc
, elseInstLoc
;
1085 emit(vt
, n
->Children
[0], prog
); /* the condition */
1086 ifInstLoc
= prog
->NumInstructions
;
1087 if (EmitHighLevelInstructions
) {
1088 ifInst
= new_instruction(prog
, OPCODE_IF
);
1089 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1090 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1093 /* conditional jump to else, or endif */
1094 ifInst
= new_instruction(prog
, OPCODE_BRA
);
1095 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1096 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1097 ifInst
->Comment
= _mesa_strdup("if zero");
1101 emit(vt
, n
->Children
[1], prog
);
1103 if (n
->Children
[2]) {
1104 /* have else body */
1105 elseInstLoc
= prog
->NumInstructions
;
1106 if (EmitHighLevelInstructions
) {
1107 (void) new_instruction(prog
, OPCODE_ELSE
);
1110 /* jump to endif instruction */
1111 struct prog_instruction
*inst
;
1112 inst
= new_instruction(prog
, OPCODE_BRA
);
1113 inst
->Comment
= _mesa_strdup("else");
1114 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1116 ifInst
= prog
->Instructions
+ ifInstLoc
;
1117 ifInst
->BranchTarget
= prog
->NumInstructions
;
1119 emit(vt
, n
->Children
[2], prog
);
1123 ifInst
= prog
->Instructions
+ ifInstLoc
;
1124 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1127 if (EmitHighLevelInstructions
) {
1128 (void) new_instruction(prog
, OPCODE_ENDIF
);
1131 if (n
->Children
[2]) {
1132 struct prog_instruction
*elseInst
;
1133 elseInst
= prog
->Instructions
+ elseInstLoc
;
1134 elseInst
->BranchTarget
= prog
->NumInstructions
;
1140 static struct prog_instruction
*
1141 emit_loop(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1143 struct prog_instruction
*beginInst
, *endInst
;
1144 GLuint beginInstLoc
, endInstLoc
;
1147 /* emit OPCODE_BGNLOOP */
1148 beginInstLoc
= prog
->NumInstructions
;
1149 if (EmitHighLevelInstructions
) {
1150 (void) new_instruction(prog
, OPCODE_BGNLOOP
);
1154 emit(vt
, n
->Children
[0], prog
);
1156 endInstLoc
= prog
->NumInstructions
;
1157 if (EmitHighLevelInstructions
) {
1158 /* emit OPCODE_ENDLOOP */
1159 endInst
= new_instruction(prog
, OPCODE_ENDLOOP
);
1162 /* emit unconditional BRA-nch */
1163 endInst
= new_instruction(prog
, OPCODE_BRA
);
1164 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1166 /* end instruction's BranchTarget points to top of loop */
1167 endInst
->BranchTarget
= beginInstLoc
;
1169 if (EmitHighLevelInstructions
) {
1170 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1171 beginInst
= prog
->Instructions
+ beginInstLoc
;
1172 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1175 /* Done emitting loop code. Now walk over the loop's linked list of
1176 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1177 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1179 for (ir
= n
->BranchNode
; ir
; ir
= ir
->BranchNode
) {
1180 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1181 assert(inst
->BranchTarget
< 0);
1182 if (ir
->Opcode
== IR_BREAK
||
1183 ir
->Opcode
== IR_BREAK_IF_FALSE
||
1184 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1185 assert(inst
->Opcode
== OPCODE_BRK
||
1186 inst
->Opcode
== OPCODE_BRA
);
1187 /* go to instruction after end of loop */
1188 inst
->BranchTarget
= endInstLoc
+ 1;
1191 assert(ir
->Opcode
== IR_CONT
||
1192 ir
->Opcode
== IR_CONT_IF_FALSE
||
1193 ir
->Opcode
== IR_CONT_IF_TRUE
);
1194 assert(inst
->Opcode
== OPCODE_CONT
||
1195 inst
->Opcode
== OPCODE_BRA
);
1196 /* to go instruction at top of loop */
1197 inst
->BranchTarget
= beginInstLoc
;
1205 * "Continue" or "break" statement.
1206 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1208 static struct prog_instruction
*
1209 emit_cont_break(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1211 gl_inst_opcode opcode
;
1212 struct prog_instruction
*inst
;
1213 n
->InstLocation
= prog
->NumInstructions
;
1214 if (EmitHighLevelInstructions
) {
1215 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1218 opcode
= OPCODE_BRA
;
1220 inst
= new_instruction(prog
, opcode
);
1221 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1227 * Conditional "continue" or "break" statement.
1228 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1230 static struct prog_instruction
*
1231 emit_cont_break_if(slang_var_table
*vt
, slang_ir_node
*n
,
1232 struct gl_program
*prog
, GLboolean breakTrue
)
1234 gl_inst_opcode opcode
;
1235 struct prog_instruction
*inst
;
1237 /* evaluate condition expr, setting cond codes */
1238 inst
= emit(vt
, n
->Children
[0], prog
);
1240 inst
->CondUpdate
= GL_TRUE
;
1242 n
->InstLocation
= prog
->NumInstructions
;
1243 if (EmitHighLevelInstructions
) {
1244 if (n
->Opcode
== IR_CONT_IF_TRUE
||
1245 n
->Opcode
== IR_CONT_IF_FALSE
)
1246 opcode
= OPCODE_CONT
;
1248 opcode
= OPCODE_BRK
;
1251 opcode
= OPCODE_BRA
;
1253 inst
= new_instruction(prog
, opcode
);
1254 inst
->DstReg
.CondMask
= breakTrue
? COND_NE
: COND_EQ
;
1261 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1262 * Ex: fix_swizzle("zyNN") -> "zyyy"
1265 fix_swizzle(GLuint swizzle
)
1268 for (i
= 0; i
< 4; i
++) {
1269 swz
[i
] = GET_SWZ(swizzle
, i
);
1270 if (swz
[i
] == SWIZZLE_NIL
) {
1271 swz
[i
] = swz
[i
- 1];
1274 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1278 static struct prog_instruction
*
1279 emit_swizzle(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1283 /* swizzled storage access */
1284 (void) emit(vt
, n
->Children
[0], prog
);
1286 /* "pull-up" the child's storage info, applying our swizzle info */
1287 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1288 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1289 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1290 /*n->Var = n->Children[0]->Var; XXX for debug */
1291 assert(n
->Store
->Index
>= 0);
1293 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1296 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1297 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1298 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1299 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1300 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1304 /* apply this swizzle to child's swizzle to get composed swizzle */
1305 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1312 * Dereference array element. Just resolve storage for the array
1313 * element represented by this node.
1315 static struct prog_instruction
*
1316 emit_array_element(slang_var_table
*vt
, slang_ir_node
*n
,
1317 struct gl_program
*prog
)
1320 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1321 assert(n
->Store
->Size
> 0);
1323 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1324 n
->Store
->Index
= _slang_alloc_statevar(n
, prog
->Parameters
);
1329 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1330 /* Constant index */
1331 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1332 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1333 n
->Store
->Index
= arrayAddr
+ index
;
1336 /* Variable index - PROBLEM */
1337 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1338 const GLint index
= 0;
1339 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1340 n
->Store
->Index
= arrayAddr
+ index
;
1342 return NULL
; /* no instruction */
1347 * Resolve storage for accessing a structure field.
1349 static struct prog_instruction
*
1350 emit_struct_field(slang_var_table
*vt
, slang_ir_node
*n
,
1351 struct gl_program
*prog
)
1353 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1354 n
->Store
->Index
= _slang_alloc_statevar(n
, prog
->Parameters
);
1358 if (n
->Children
[0]->Store
->File
== PROGRAM_STATE_VAR
) {
1359 /* state variable sub-field */
1362 assert(n
->Children
[0]->Opcode
== IR_VAR
);
1363 pos
= _slang_lookup_statevar_field((char *) n
->Children
[0]->Var
->a_name
,
1365 prog
->Parameters
, &swizzle
);
1367 RETURN_ERROR2("Undefined structure member", n
->Target
, 0);
1370 assert(n
->Store
->File
== PROGRAM_STATE_VAR
);
1371 n
->Store
->Index
= pos
;
1372 n
->Store
->Swizzle
= swizzle
;
1375 _mesa_problem(NULL
, "structs/fields not supported yet");
1377 return NULL
; /* no instruction */
1381 static struct prog_instruction
*
1382 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1384 struct prog_instruction
*inst
;
1388 switch (n
->Opcode
) {
1390 /* sequence of two sub-trees */
1391 assert(n
->Children
[0]);
1392 assert(n
->Children
[1]);
1393 emit(vt
, n
->Children
[0], prog
);
1394 inst
= emit(vt
, n
->Children
[1], prog
);
1396 n
->Store
= n
->Children
[1]->Store
;
1400 /* new variable scope */
1401 _slang_push_var_table(vt
);
1402 inst
= emit(vt
, n
->Children
[0], prog
);
1403 _slang_pop_var_table(vt
);
1407 /* Variable declaration - allocate a register for it */
1409 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1410 assert(n
->Store
->Size
> 0);
1411 assert(n
->Store
->Index
< 0);
1412 if (!n
->Var
|| n
->Var
->isTemp
) {
1413 /* a nameless/temporary variable, will be freed after first use */
1414 if (!_slang_alloc_temp(vt
, n
->Store
))
1415 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
1418 /* a regular variable */
1419 _slang_add_variable(vt
, n
->Var
);
1420 if (!_slang_alloc_var(vt
, n
->Store
))
1421 RETURN_ERROR("Ran out of registers, too many variables", 0);
1423 printf("IR_VAR_DECL %s %d store %p\n",
1424 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1426 assert(n
->Var
->aux
== n
->Store
);
1431 /* Reference to a variable
1432 * Storage should have already been resolved/allocated.
1435 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1437 if (n
->Store
->File
== PROGRAM_STATE_VAR
&&
1438 n
->Store
->Index
< 0) {
1439 n
->Store
->Index
= _slang_alloc_statevar(n
, prog
->Parameters
);
1442 if (n
->Store
->Index
< 0) {
1443 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1445 assert(n
->Store
->Index
>= 0);
1446 assert(n
->Store
->Size
> 0);
1450 return emit_array_element(vt
, n
, prog
);
1452 return emit_struct_field(vt
, n
, prog
);
1454 return emit_swizzle(vt
, n
, prog
);
1458 n
->Store
= n
->Children
[0]->Store
;
1462 /* Simple arithmetic */
1494 /* trinary operators */
1496 return emit_arith(vt
, n
, prog
);
1498 return emit_clamp(vt
, n
, prog
);
1502 return emit_tex(vt
, n
, prog
);
1504 return emit_negation(vt
, n
, prog
);
1506 /* find storage location for this float constant */
1507 n
->Store
->Index
= _mesa_add_unnamed_constant(prog
->Parameters
, n
->Value
,
1509 &n
->Store
->Swizzle
);
1510 if (n
->Store
->Index
< 0) {
1511 RETURN_ERROR("Ran out of space for constants.", 0);
1516 return emit_move(vt
, n
, prog
);
1519 return emit_cond(vt
, n
, prog
);
1522 return emit_not(vt
, n
, prog
);
1525 return emit_label(n
->Target
, prog
);
1527 return emit_jump(n
->Target
, prog
);
1529 return emit_cjump(n
->Target
, prog
, 0);
1531 return emit_cjump(n
->Target
, prog
, 1);
1533 return emit_kill(prog
);
1536 return emit_if(vt
, n
, prog
);
1539 return emit_loop(vt
, n
, prog
);
1540 case IR_BREAK_IF_FALSE
:
1541 case IR_CONT_IF_FALSE
:
1542 return emit_cont_break_if(vt
, n
, prog
, GL_FALSE
);
1543 case IR_BREAK_IF_TRUE
:
1544 case IR_CONT_IF_TRUE
:
1545 return emit_cont_break_if(vt
, n
, prog
, GL_TRUE
);
1549 return emit_cont_break(vt
, n
, prog
);
1552 return new_instruction(prog
, OPCODE_BGNSUB
);
1554 return new_instruction(prog
, OPCODE_ENDSUB
);
1556 return new_instruction(prog
, OPCODE_RET
);
1562 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1570 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1571 struct gl_program
*prog
, GLboolean withEnd
)
1575 if (emit(vt
, n
, prog
)) {
1576 /* finish up by adding the END opcode to program */
1578 struct prog_instruction
*inst
;
1579 inst
= new_instruction(prog
, OPCODE_END
);
1584 /* record an error? */
1588 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1590 _mesa_print_program(prog
);
1591 _mesa_print_program_parameters(ctx
,prog
);