2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
35 #include "prog_instruction.h"
36 #include "prog_parameter.h"
37 #include "prog_print.h"
38 #include "slang_emit.h"
39 #include "slang_error.h"
42 #define PEEPHOLE_OPTIMIZATIONS 1
47 * Assembly and IR info
51 slang_ir_opcode IrOpcode
;
53 gl_inst_opcode InstOpcode
;
54 GLuint ResultSize
, NumParams
;
59 static slang_ir_info IrInfo
[] = {
61 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
62 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
63 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
64 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
65 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
66 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
67 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
68 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
69 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
70 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
71 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
72 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
73 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
74 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
75 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
76 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
78 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
79 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
80 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
81 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
82 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
83 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
84 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
85 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
86 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
87 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
88 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
89 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
90 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
91 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
92 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
93 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
94 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
95 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
96 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
99 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
100 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
101 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
102 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
103 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
104 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
105 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
106 { IR_ELSE
, "IR_ELSE", OPCODE_NOP
, 0, 0 },
107 { IR_ENDIF
, "IR_ENDIF", OPCODE_NOP
, 0, 0 },
108 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
109 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
110 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
111 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
112 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
113 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
114 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
115 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
116 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
117 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
118 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 },
119 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
120 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
121 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
122 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
126 static slang_ir_info
*
127 slang_find_ir_info(slang_ir_opcode opcode
)
130 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
131 if (IrInfo
[i
].IrOpcode
== opcode
) {
139 slang_ir_name(slang_ir_opcode opcode
)
141 return slang_find_ir_info(opcode
)->IrName
;
146 * Swizzle a swizzle. That is, return swz2(swz1)
149 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
152 for (i
= 0; i
< 4; i
++) {
153 GLuint c
= GET_SWZ(swz2
, i
);
154 s
[i
] = GET_SWZ(swz1
, c
);
156 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
162 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
164 slang_ir_storage
*st
;
165 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
170 st
->Swizzle
= SWIZZLE_NOOP
;
177 swizzle_string(GLuint swizzle
)
182 for (i
= 1; i
< 5; i
++) {
183 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
190 writemask_string(GLuint writemask
)
195 for (i
= 0; i
< 4; i
++) {
196 if (writemask
& (1 << i
))
204 storage_string(const slang_ir_storage
*st
)
206 static const char *files
[] = {
224 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
226 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
227 st
->Index
+ st
->Size
- 1);
229 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
230 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
237 slang_print_ir(const slang_ir_node
*n
, int indent
)
243 if (n
->Opcode
!= IR_SEQ
)
245 printf("%3d:", indent
);
247 for (i
= 0; i
< indent
; i
++)
253 printf("SEQ at %p\n", (void*) n
);
255 assert(n
->Children
[0]);
256 assert(n
->Children
[1]);
257 slang_print_ir(n
->Children
[0], indent
+ IND
);
258 slang_print_ir(n
->Children
[1], indent
+ IND
);
261 printf("NEW SCOPE\n");
262 assert(!n
->Children
[1]);
263 slang_print_ir(n
->Children
[0], indent
+ 3);
266 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
267 slang_print_ir(n
->Children
[0], indent
+3);
268 slang_print_ir(n
->Children
[1], indent
+3);
271 printf("LABEL: %s\n", n
->Target
);
275 slang_print_ir(n
->Children
[0], indent
+ 3);
278 printf("JUMP %s\n", n
->Target
);
281 printf("CJUMP0 %s\n", n
->Target
);
282 slang_print_ir(n
->Children
[0], indent
+3);
285 printf("CJUMP1 %s\n", n
->Target
);
286 slang_print_ir(n
->Children
[0], indent
+3);
291 slang_print_ir(n
->Children
[0], indent
+3);
301 printf("BEGIN_SUB\n");
314 printf("BEGIN_LOOP\n");
317 printf("END_LOOP\n");
327 printf("VAR %s%s at %s store %p\n",
328 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
329 swizzle_string(n
->Store
->Swizzle
),
330 storage_string(n
->Store
), (void*) n
->Store
);
333 printf("VAR_DECL %s (%p) at %s store %p\n",
334 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
335 (void*) n
->Var
, storage_string(n
->Store
),
339 printf("FIELD %s of\n", n
->Target
);
340 slang_print_ir(n
->Children
[0], indent
+3);
343 printf("FLOAT %f %f %f %f\n",
344 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
347 printf("INT_TO_FLOAT %d\n", (int) n
->Value
[0]);
350 printf("SWIZZLE %s of (store %p) \n",
351 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
352 slang_print_ir(n
->Children
[0], indent
+ 3);
355 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
356 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
357 slang_print_ir(n
->Children
[0], indent
+3);
358 slang_print_ir(n
->Children
[1], indent
+3);
364 * Allocate temporary storage for an intermediate result (such as for
365 * a multiply or add, etc.
368 alloc_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
, GLint size
)
373 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
374 if (!_slang_alloc_temp(vt
, n
->Store
)) {
375 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
382 * Free temporary storage, if n->Store is, in fact, temp storage.
386 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
388 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
389 if (_slang_is_temp(vt
, n
->Store
)) {
390 _slang_free_temp(vt
, n
->Store
);
391 n
->Store
->Index
= -1;
399 * Convert IR storage to an instruction dst register.
402 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
405 static const GLuint defaultWritemask
[4] = {
407 WRITEMASK_X
| WRITEMASK_Y
,
408 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
409 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
411 assert(st
->Index
>= 0 && st
->Index
<= 16);
412 dst
->File
= st
->File
;
413 dst
->Index
= st
->Index
;
414 assert(st
->File
!= PROGRAM_UNDEFINED
);
415 assert(st
->Size
>= 1);
416 assert(st
->Size
<= 4);
418 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
420 assert(writemask
& WRITEMASK_X
);
421 dst
->WriteMask
= WRITEMASK_X
<< comp
;
424 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
430 * Convert IR storage to an instruction src register.
433 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
435 static const GLuint defaultSwizzle
[4] = {
436 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
437 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
438 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
439 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
441 assert(st
->File
>= 0 && st
->File
<= 16);
442 src
->File
= st
->File
;
443 src
->Index
= st
->Index
;
444 assert(st
->File
!= PROGRAM_UNDEFINED
);
445 assert(st
->Size
>= 1);
446 assert(st
->Size
<= 4);
447 if (st
->Swizzle
!= SWIZZLE_NOOP
)
448 src
->Swizzle
= st
->Swizzle
;
450 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
452 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
453 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
454 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
455 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
461 * Add new instruction at end of given program.
462 * \param prog the program to append instruction onto
463 * \param opcode opcode for the new instruction
464 * \return pointer to the new instruction
466 static struct prog_instruction
*
467 new_instruction(struct gl_program
*prog
, gl_inst_opcode opcode
)
469 struct prog_instruction
*inst
;
470 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
471 prog
->NumInstructions
,
472 prog
->NumInstructions
+ 1);
473 inst
= prog
->Instructions
+ prog
->NumInstructions
;
474 prog
->NumInstructions
++;
475 _mesa_init_instructions(inst
, 1);
476 inst
->Opcode
= opcode
;
482 * Return pointer to last instruction in program.
484 static struct prog_instruction
*
485 prev_instruction(struct gl_program
*prog
)
487 if (prog
->NumInstructions
== 0)
490 return prog
->Instructions
+ prog
->NumInstructions
- 1;
494 static struct prog_instruction
*
495 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
);
499 * Return an annotation string for given node's storage.
502 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
505 const slang_ir_storage
*st
= n
->Store
;
506 static char s
[100] = "";
509 return _mesa_strdup("");
512 case PROGRAM_CONSTANT
:
513 if (st
->Index
>= 0) {
514 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
515 if (st
->Swizzle
== SWIZZLE_NOOP
)
516 sprintf(s
, "{%f, %f, %f, %f}", val
[0], val
[1], val
[2], val
[3]);
518 sprintf(s
, "%f", val
[GET_SWZ(st
->Swizzle
, 0)]);
522 case PROGRAM_TEMPORARY
:
524 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
526 sprintf(s
, "t[%d]", st
->Index
);
528 case PROGRAM_STATE_VAR
:
529 case PROGRAM_UNIFORM
:
530 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
532 case PROGRAM_VARYING
:
533 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
536 sprintf(s
, "input[%d]", st
->Index
);
539 sprintf(s
, "output[%d]", st
->Index
);
544 return _mesa_strdup(s
);
552 * Return an annotation string for an instruction.
555 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
556 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
559 const char *operator;
564 len
+= strlen(dstAnnot
);
566 dstAnnot
= _mesa_strdup("");
569 len
+= strlen(srcAnnot0
);
571 srcAnnot0
= _mesa_strdup("");
574 len
+= strlen(srcAnnot1
);
576 srcAnnot1
= _mesa_strdup("");
579 len
+= strlen(srcAnnot2
);
581 srcAnnot2
= _mesa_strdup("");
612 s
= (char *) malloc(len
);
613 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
614 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
615 assert(_mesa_strlen(s
) < len
);
631 * Generate code for a simple arithmetic instruction.
632 * Either 1, 2 or 3 operands.
634 static struct prog_instruction
*
635 emit_arith(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
637 struct prog_instruction
*inst
;
638 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
639 char *srcAnnot
[3], *dstAnnot
;
643 assert(info
->InstOpcode
!= OPCODE_NOP
);
645 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
647 #if PEEPHOLE_OPTIMIZATIONS
648 /* Look for MAD opportunity */
649 if (info
->NumParams
== 2 &&
650 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
651 /* found pattern IR_ADD(IR_MUL(A, B), C) */
652 emit(vt
, n
->Children
[0]->Children
[0], prog
); /* A */
653 emit(vt
, n
->Children
[0]->Children
[1], prog
); /* B */
654 emit(vt
, n
->Children
[1], prog
); /* C */
655 /* generate MAD instruction */
656 inst
= new_instruction(prog
, OPCODE_MAD
);
657 /* operands: A, B, C: */
658 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
659 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
660 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
661 free_temp_storage(vt
, n
->Children
[0]->Children
[0]);
662 free_temp_storage(vt
, n
->Children
[0]->Children
[1]);
663 free_temp_storage(vt
, n
->Children
[1]);
665 else if (info
->NumParams
== 2 &&
666 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
667 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
668 emit(vt
, n
->Children
[0], prog
); /* A */
669 emit(vt
, n
->Children
[1]->Children
[0], prog
); /* B */
670 emit(vt
, n
->Children
[1]->Children
[1], prog
); /* C */
671 /* generate MAD instruction */
672 inst
= new_instruction(prog
, OPCODE_MAD
);
673 /* operands: B, C, A */
674 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
675 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
676 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
677 free_temp_storage(vt
, n
->Children
[1]->Children
[0]);
678 free_temp_storage(vt
, n
->Children
[1]->Children
[1]);
679 free_temp_storage(vt
, n
->Children
[0]);
686 /* gen code for children */
687 for (i
= 0; i
< info
->NumParams
; i
++)
688 emit(vt
, n
->Children
[i
], prog
);
690 /* gen this instruction and src registers */
691 inst
= new_instruction(prog
, info
->InstOpcode
);
692 for (i
= 0; i
< info
->NumParams
; i
++)
693 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
696 for (i
= 0; i
< info
->NumParams
; i
++)
697 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], prog
);
700 for (i
= 0; i
< info
->NumParams
; i
++)
701 free_temp_storage(vt
, n
->Children
[i
]);
706 if (!alloc_temp_storage(vt
, n
, info
->ResultSize
))
709 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
711 dstAnnot
= storage_annotation(n
, prog
);
713 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
714 srcAnnot
[1], srcAnnot
[2]);
716 /*_mesa_print_instruction(inst);*/
722 * Generate code for an IR_CLAMP instruction.
724 static struct prog_instruction
*
725 emit_clamp(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
727 struct prog_instruction
*inst
;
729 assert(n
->Opcode
== IR_CLAMP
);
735 inst
= emit(vt
, n
->Children
[0], prog
);
737 /* If lower limit == 0.0 and upper limit == 1.0,
738 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
740 * emit OPCODE_MIN, OPCODE_MAX sequence.
743 /* XXX this isn't quite finished yet */
744 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
745 n
->Children
[1]->Value
[0] == 0.0 &&
746 n
->Children
[1]->Value
[1] == 0.0 &&
747 n
->Children
[1]->Value
[2] == 0.0 &&
748 n
->Children
[1]->Value
[3] == 0.0 &&
749 n
->Children
[2]->Opcode
== IR_FLOAT
&&
750 n
->Children
[2]->Value
[0] == 1.0 &&
751 n
->Children
[2]->Value
[1] == 1.0 &&
752 n
->Children
[2]->Value
[2] == 1.0 &&
753 n
->Children
[2]->Value
[3] == 1.0) {
755 inst
= prev_instruction(prog
);
757 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
758 /* and prev instruction's DstReg matches n->Children[0]->Store */
759 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
760 n
->Store
= n
->Children
[0]->Store
;
767 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
770 emit(vt
, n
->Children
[1], prog
);
771 emit(vt
, n
->Children
[2], prog
);
773 /* tmp = max(ch[0], ch[1]) */
774 inst
= new_instruction(prog
, OPCODE_MAX
);
775 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
776 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
777 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
779 /* tmp = min(tmp, ch[2]) */
780 inst
= new_instruction(prog
, OPCODE_MIN
);
781 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
782 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
783 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
789 static struct prog_instruction
*
790 emit_negation(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
792 /* Implement as MOV dst, -src; */
793 /* XXX we could look at the previous instruction and in some circumstances
794 * modify it to accomplish the negation.
796 struct prog_instruction
*inst
;
798 emit(vt
, n
->Children
[0], prog
);
801 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
804 inst
= new_instruction(prog
, OPCODE_MOV
);
805 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
806 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
807 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
808 inst
->Comment
= n
->Comment
;
813 static struct prog_instruction
*
814 emit_label(const char *target
, struct gl_program
*prog
)
816 struct prog_instruction
*inst
;
817 inst
= new_instruction(prog
, OPCODE_NOP
);
818 inst
->Comment
= _mesa_strdup(target
);
823 static struct prog_instruction
*
824 emit_cjump(const char *target
, struct gl_program
*prog
, GLuint zeroOrOne
)
826 struct prog_instruction
*inst
;
827 inst
= new_instruction(prog
, OPCODE_BRA
);
829 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
831 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
832 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
833 inst
->Comment
= _mesa_strdup(target
);
838 static struct prog_instruction
*
839 emit_jump(const char *target
, struct gl_program
*prog
)
841 struct prog_instruction
*inst
;
842 inst
= new_instruction(prog
, OPCODE_BRA
);
843 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
844 /*inst->DstReg.CondSwizzle = SWIZZLE_X;*/
845 inst
->Comment
= _mesa_strdup(target
);
850 static struct prog_instruction
*
851 emit_kill(struct gl_program
*prog
)
853 struct prog_instruction
*inst
;
854 /* NV-KILL - discard fragment depending on condition code.
855 * Note that ARB-KILL depends on sign of vector operand.
857 inst
= new_instruction(prog
, OPCODE_KIL_NV
);
858 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
863 static struct prog_instruction
*
864 emit_tex(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
866 struct prog_instruction
*inst
;
867 if (n
->Opcode
== IR_TEX
) {
868 inst
= new_instruction(prog
, OPCODE_TEX
);
870 else if (n
->Opcode
== IR_TEXB
) {
871 inst
= new_instruction(prog
, OPCODE_TXB
);
874 assert(n
->Opcode
== IR_TEXP
);
875 inst
= new_instruction(prog
, OPCODE_TXP
);
879 if (!alloc_temp_storage(vt
, n
, 4))
882 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
884 (void) emit(vt
, n
->Children
[1], prog
);
886 /* Child[1] is the coord */
887 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
889 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
890 assert(n
->Children
[0]->Store
);
891 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
893 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
894 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
895 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
896 * link time, using the sampler uniform's value.
902 static struct prog_instruction
*
903 emit_move(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
905 struct prog_instruction
*inst
;
908 assert(n
->Children
[1]);
909 inst
= emit(vt
, n
->Children
[1], prog
);
911 assert(n
->Children
[1]->Store
->Index
>= 0);
914 emit(vt
, n
->Children
[0], prog
);
917 n
->Store
= n
->Children
[0]->Store
;
919 #if PEEPHOLE_OPTIMIZATIONS
920 if (inst
&& _slang_is_temp(vt
, n
->Children
[1]->Store
)) {
921 /* Peephole optimization:
922 * Just modify the RHS to put its result into the dest of this
923 * MOVE operation. Then, this MOVE is a no-op.
925 _slang_free_temp(vt
, n
->Children
[1]->Store
);
926 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
927 /* fixup the prev (RHS) instruction */
928 assert(n
->Children
[0]->Store
->Index
>= 0);
929 assert(n
->Children
[0]->Store
->Index
< 16);
930 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
936 if (n
->Children
[0]->Store
->Size
> 4) {
937 /* move matrix/struct etc (block of registers) */
938 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
939 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
940 GLint size
= srcStore
.Size
;
941 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
942 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
946 inst
= new_instruction(prog
, OPCODE_MOV
);
947 inst
->Comment
= _mesa_strdup("IR_MOVE block");
948 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
949 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
956 /* single register move */
957 char *srcAnnot
, *dstAnnot
;
958 inst
= new_instruction(prog
, OPCODE_MOV
);
959 assert(n
->Children
[0]->Store
->Index
>= 0);
960 assert(n
->Children
[0]->Store
->Index
< 16);
961 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
962 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
963 dstAnnot
= storage_annotation(n
->Children
[0], prog
);
964 srcAnnot
= storage_annotation(n
->Children
[1], prog
);
965 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
966 srcAnnot
, NULL
, NULL
);
968 free_temp_storage(vt
, n
->Children
[1]);
974 static struct prog_instruction
*
975 emit_cond(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
977 /* Conditional expression (in if/while/for stmts).
978 * Need to update condition code register.
979 * Next instruction is typically an IR_CJUMP0/1.
981 /* last child expr instruction: */
982 struct prog_instruction
*inst
= emit(vt
, n
->Children
[0], prog
);
984 /* set inst's CondUpdate flag */
985 inst
->CondUpdate
= GL_TRUE
;
986 return inst
; /* XXX or null? */
989 /* This'll happen for things like "if (i) ..." where no code
990 * is normally generated for the expression "i".
991 * Generate a move instruction just to set condition codes.
992 * Note: must use full 4-component vector since all four
993 * condition codes must be set identically.
995 if (!alloc_temp_storage(vt
, n
, 4))
997 inst
= new_instruction(prog
, OPCODE_MOV
);
998 inst
->CondUpdate
= GL_TRUE
;
999 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1000 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1001 _slang_free_temp(vt
, n
->Store
);
1002 inst
->Comment
= _mesa_strdup("COND expr");
1003 return inst
; /* XXX or null? */
1011 static struct prog_instruction
*
1012 emit_not(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1015 slang_ir_storage st
;
1016 struct prog_instruction
*inst
;
1018 /* need zero constant */
1019 st
.File
= PROGRAM_CONSTANT
;
1021 st
.Index
= _mesa_add_unnamed_constant(prog
->Parameters
, &zero
,
1025 (void) emit(vt
, n
->Children
[0], prog
);
1026 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1029 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
1032 inst
= new_instruction(prog
, OPCODE_SEQ
);
1033 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1034 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1035 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1037 free_temp_storage(vt
, n
->Children
[0]);
1045 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1046 * Ex: fix_swizzle("zyNN") -> "zyyy"
1049 fix_swizzle(GLuint swizzle
)
1052 for (i
= 0; i
< 4; i
++) {
1053 swz
[i
] = GET_SWZ(swizzle
, i
);
1054 if (swz
[i
] == SWIZZLE_NIL
) {
1055 swz
[i
] = swz
[i
- 1];
1058 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1062 static struct prog_instruction
*
1063 emit_swizzle(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1067 /* swizzled storage access */
1068 (void) emit(vt
, n
->Children
[0], prog
);
1070 /* "pull-up" the child's storage info, applying our swizzle info */
1071 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1072 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1073 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1074 /*n->Var = n->Children[0]->Var; XXX for debug */
1075 assert(n
->Store
->Index
>= 0);
1077 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1080 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1081 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1082 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1083 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1084 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1088 /* apply this swizzle to child's swizzle to get composed swizzle */
1089 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1095 static struct prog_instruction
*
1096 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1098 struct prog_instruction
*inst
;
1102 switch (n
->Opcode
) {
1104 /* sequence of two sub-trees */
1105 assert(n
->Children
[0]);
1106 assert(n
->Children
[1]);
1107 emit(vt
, n
->Children
[0], prog
);
1108 inst
= emit(vt
, n
->Children
[1], prog
);
1110 n
->Store
= n
->Children
[1]->Store
;
1114 /* new variable scope */
1115 _slang_push_var_table(vt
);
1116 inst
= emit(vt
, n
->Children
[0], prog
);
1117 _slang_pop_var_table(vt
);
1121 /* Variable declaration - allocate a register for it */
1123 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1124 assert(n
->Store
->Size
> 0);
1125 assert(n
->Store
->Index
< 0);
1126 if (!n
->Var
|| n
->Var
->isTemp
) {
1127 /* a nameless/temporary variable, will be freed after first use */
1128 if (!_slang_alloc_temp(vt
, n
->Store
))
1129 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
1132 /* a regular variable */
1133 _slang_add_variable(vt
, n
->Var
);
1134 if (!_slang_alloc_var(vt
, n
->Store
))
1135 RETURN_ERROR("Ran out of registers, too many variables", 0);
1137 printf("IR_VAR_DECL %s %d store %p\n",
1138 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1140 assert(n
->Var
->aux
== n
->Store
);
1145 /* Reference to a variable
1146 * Storage should have already been resolved/allocated.
1149 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1150 if (n
->Store
->Index
< 0) {
1151 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1153 assert(n
->Store
->Index
>= 0);
1154 assert(n
->Store
->Size
> 0);
1158 /* Dereference array element. Just resolve storage for the array
1159 * element represented by this node.
1162 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1163 assert(n
->Store
->Size
> 0);
1164 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1165 /* OK, constant index */
1166 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1167 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1168 n
->Store
->Index
= arrayAddr
+ index
;
1171 /* Problem: variable index */
1172 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1173 const GLint index
= 0;
1174 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1175 n
->Store
->Index
= arrayAddr
+ index
;
1177 return NULL
; /* no instruction */
1180 return emit_swizzle(vt
, n
, prog
);
1182 /* Simple arithmetic */
1214 /* trinary operators */
1216 return emit_arith(vt
, n
, prog
);
1218 return emit_clamp(vt
, n
, prog
);
1222 return emit_tex(vt
, n
, prog
);
1224 return emit_negation(vt
, n
, prog
);
1226 /* find storage location for this float constant */
1227 n
->Store
->Index
= _mesa_add_unnamed_constant(prog
->Parameters
, n
->Value
,
1229 &n
->Store
->Swizzle
);
1230 if (n
->Store
->Index
< 0) {
1231 RETURN_ERROR("Ran out of space for constants.", 0);
1236 return emit_move(vt
, n
, prog
);
1239 return emit_cond(vt
, n
, prog
);
1242 return emit_not(vt
, n
, prog
);
1245 return emit_label(n
->Target
, prog
);
1247 return emit_jump(n
->Target
, prog
);
1249 return emit_cjump(n
->Target
, prog
, 0);
1251 return emit_cjump(n
->Target
, prog
, 1);
1253 return emit_kill(prog
);
1257 struct prog_instruction
*inst
;
1258 emit(vt
, n
->Children
[0], prog
); /* the condition */
1259 inst
= new_instruction(prog
, OPCODE_IF
);
1260 inst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1261 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1266 struct prog_instruction
*inst
;
1267 inst
= new_instruction(prog
, OPCODE_ELSE
);
1272 struct prog_instruction
*inst
;
1273 inst
= new_instruction(prog
, OPCODE_ENDIF
);
1279 /* save location of this instruction, used by OPCODE_ENDLOOP */
1280 n
->InstLocation
= prog
->NumInstructions
;
1281 (void) new_instruction(prog
, OPCODE_BGNLOOP
);
1286 struct prog_instruction
*inst
;
1287 inst
= new_instruction(prog
, OPCODE_ENDLOOP
);
1288 assert(n
->BranchNode
);
1289 assert(n
->BranchNode
->InstLocation
>= 0);
1290 /* The instruction BranchTarget points to top of loop */
1291 inst
->BranchTarget
= n
->BranchNode
->InstLocation
;
1295 return new_instruction(prog
, OPCODE_CONT
);
1298 struct prog_instruction
*inst
;
1299 inst
= new_instruction(prog
, OPCODE_BRK
);
1300 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1304 return new_instruction(prog
, OPCODE_BGNSUB
);
1306 return new_instruction(prog
, OPCODE_ENDSUB
);
1308 return new_instruction(prog
, OPCODE_RET
);
1311 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1319 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1320 struct gl_program
*prog
, GLboolean withEnd
)
1324 if (emit(vt
, n
, prog
)) {
1325 /* finish up by adding the END opcode to program */
1327 struct prog_instruction
*inst
;
1328 inst
= new_instruction(prog
, OPCODE_END
);
1333 /* record an error? */
1337 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1339 _mesa_print_program(prog
);
1340 _mesa_print_program_parameters(ctx
,prog
);