2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
35 #include "prog_instruction.h"
36 #include "prog_parameter.h"
37 #include "prog_print.h"
38 #include "slang_emit.h"
39 #include "slang_error.h"
42 #define PEEPHOLE_OPTIMIZATIONS 1
47 * Assembly and IR info
51 slang_ir_opcode IrOpcode
;
53 gl_inst_opcode InstOpcode
;
54 GLuint ResultSize
, NumParams
;
59 static slang_ir_info IrInfo
[] = {
61 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
62 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
63 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
64 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
65 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
66 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
67 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
68 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
69 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
70 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
71 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
72 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
73 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
74 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
75 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
76 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
78 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
79 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
80 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
81 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
82 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
83 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
84 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
85 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
86 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
87 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
88 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
89 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
90 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
91 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
92 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
93 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
94 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
95 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
96 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
99 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
100 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
101 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
102 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
103 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
104 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
105 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
106 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
107 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
108 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
109 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
110 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
111 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
112 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
113 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
114 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
115 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
116 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 },
117 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
118 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
119 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
120 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
124 static slang_ir_info
*
125 slang_find_ir_info(slang_ir_opcode opcode
)
128 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
129 if (IrInfo
[i
].IrOpcode
== opcode
) {
137 slang_ir_name(slang_ir_opcode opcode
)
139 return slang_find_ir_info(opcode
)->IrName
;
144 * Swizzle a swizzle. That is, return swz2(swz1)
147 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
150 for (i
= 0; i
< 4; i
++) {
151 GLuint c
= GET_SWZ(swz2
, i
);
152 s
[i
] = GET_SWZ(swz1
, c
);
154 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
160 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
162 slang_ir_storage
*st
;
163 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
168 st
->Swizzle
= SWIZZLE_NOOP
;
175 swizzle_string(GLuint swizzle
)
180 for (i
= 1; i
< 5; i
++) {
181 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
188 writemask_string(GLuint writemask
)
193 for (i
= 0; i
< 4; i
++) {
194 if (writemask
& (1 << i
))
202 storage_string(const slang_ir_storage
*st
)
204 static const char *files
[] = {
222 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
224 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
225 st
->Index
+ st
->Size
- 1);
227 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
228 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
243 slang_print_ir(const slang_ir_node
*n
, int indent
)
248 if (n
->Opcode
!= IR_SEQ
)
250 printf("%3d:", indent
);
257 printf("SEQ at %p\n", (void*) n
);
259 assert(n
->Children
[0]);
260 assert(n
->Children
[1]);
261 slang_print_ir(n
->Children
[0], indent
+ IND
);
262 slang_print_ir(n
->Children
[1], indent
+ IND
);
265 printf("NEW SCOPE\n");
266 assert(!n
->Children
[1]);
267 slang_print_ir(n
->Children
[0], indent
+ 3);
270 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
271 slang_print_ir(n
->Children
[0], indent
+3);
272 slang_print_ir(n
->Children
[1], indent
+3);
275 printf("LABEL: %s\n", n
->Target
);
279 slang_print_ir(n
->Children
[0], indent
+ 3);
282 printf("JUMP %s\n", n
->Target
);
285 printf("CJUMP0 %s\n", n
->Target
);
286 slang_print_ir(n
->Children
[0], indent
+3);
289 printf("CJUMP1 %s\n", n
->Target
);
290 slang_print_ir(n
->Children
[0], indent
+3);
295 slang_print_ir(n
->Children
[0], indent
+3);
298 slang_print_ir(n
->Children
[1], indent
+3);
299 if (n
->Children
[2]) {
302 slang_print_ir(n
->Children
[2], indent
+3);
308 printf("BEGIN_SUB\n");
322 slang_print_ir(n
->Children
[0], indent
+3);
334 printf("VAR %s%s at %s store %p\n",
335 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
336 swizzle_string(n
->Store
->Swizzle
),
337 storage_string(n
->Store
), (void*) n
->Store
);
340 printf("VAR_DECL %s (%p) at %s store %p\n",
341 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
342 (void*) n
->Var
, storage_string(n
->Store
),
346 printf("FIELD %s of\n", n
->Target
);
347 slang_print_ir(n
->Children
[0], indent
+3);
350 printf("FLOAT %f %f %f %f\n",
351 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
354 printf("INT_TO_FLOAT %d\n", (int) n
->Value
[0]);
357 printf("SWIZZLE %s of (store %p) \n",
358 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
359 slang_print_ir(n
->Children
[0], indent
+ 3);
362 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
363 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
364 slang_print_ir(n
->Children
[0], indent
+3);
365 slang_print_ir(n
->Children
[1], indent
+3);
371 * Allocate temporary storage for an intermediate result (such as for
372 * a multiply or add, etc.
375 alloc_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
, GLint size
)
380 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
381 if (!_slang_alloc_temp(vt
, n
->Store
)) {
382 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
389 * Free temporary storage, if n->Store is, in fact, temp storage.
393 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
395 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
396 if (_slang_is_temp(vt
, n
->Store
)) {
397 _slang_free_temp(vt
, n
->Store
);
398 n
->Store
->Index
= -1;
406 * Convert IR storage to an instruction dst register.
409 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
412 static const GLuint defaultWritemask
[4] = {
414 WRITEMASK_X
| WRITEMASK_Y
,
415 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
416 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
418 assert(st
->Index
>= 0 && st
->Index
<= 16);
419 dst
->File
= st
->File
;
420 dst
->Index
= st
->Index
;
421 assert(st
->File
!= PROGRAM_UNDEFINED
);
422 assert(st
->Size
>= 1);
423 assert(st
->Size
<= 4);
425 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
427 assert(writemask
& WRITEMASK_X
);
428 dst
->WriteMask
= WRITEMASK_X
<< comp
;
431 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
437 * Convert IR storage to an instruction src register.
440 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
442 static const GLuint defaultSwizzle
[4] = {
443 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
444 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
445 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
446 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
448 assert(st
->File
>= 0 && st
->File
<= 16);
449 src
->File
= st
->File
;
450 src
->Index
= st
->Index
;
451 assert(st
->File
!= PROGRAM_UNDEFINED
);
452 assert(st
->Size
>= 1);
453 assert(st
->Size
<= 4);
454 if (st
->Swizzle
!= SWIZZLE_NOOP
)
455 src
->Swizzle
= st
->Swizzle
;
457 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
459 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
460 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
461 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
462 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
468 * Add new instruction at end of given program.
469 * \param prog the program to append instruction onto
470 * \param opcode opcode for the new instruction
471 * \return pointer to the new instruction
473 static struct prog_instruction
*
474 new_instruction(struct gl_program
*prog
, gl_inst_opcode opcode
)
476 struct prog_instruction
*inst
;
477 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
478 prog
->NumInstructions
,
479 prog
->NumInstructions
+ 1);
480 inst
= prog
->Instructions
+ prog
->NumInstructions
;
481 prog
->NumInstructions
++;
482 _mesa_init_instructions(inst
, 1);
483 inst
->Opcode
= opcode
;
489 * Return pointer to last instruction in program.
491 static struct prog_instruction
*
492 prev_instruction(struct gl_program
*prog
)
494 if (prog
->NumInstructions
== 0)
497 return prog
->Instructions
+ prog
->NumInstructions
- 1;
501 static struct prog_instruction
*
502 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
);
506 * Return an annotation string for given node's storage.
509 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
512 const slang_ir_storage
*st
= n
->Store
;
513 static char s
[100] = "";
516 return _mesa_strdup("");
519 case PROGRAM_CONSTANT
:
520 if (st
->Index
>= 0) {
521 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
522 if (st
->Swizzle
== SWIZZLE_NOOP
)
523 sprintf(s
, "{%f, %f, %f, %f}", val
[0], val
[1], val
[2], val
[3]);
525 sprintf(s
, "%f", val
[GET_SWZ(st
->Swizzle
, 0)]);
529 case PROGRAM_TEMPORARY
:
531 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
533 sprintf(s
, "t[%d]", st
->Index
);
535 case PROGRAM_STATE_VAR
:
536 case PROGRAM_UNIFORM
:
537 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
539 case PROGRAM_VARYING
:
540 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
543 sprintf(s
, "input[%d]", st
->Index
);
546 sprintf(s
, "output[%d]", st
->Index
);
551 return _mesa_strdup(s
);
559 * Return an annotation string for an instruction.
562 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
563 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
566 const char *operator;
571 len
+= strlen(dstAnnot
);
573 dstAnnot
= _mesa_strdup("");
576 len
+= strlen(srcAnnot0
);
578 srcAnnot0
= _mesa_strdup("");
581 len
+= strlen(srcAnnot1
);
583 srcAnnot1
= _mesa_strdup("");
586 len
+= strlen(srcAnnot2
);
588 srcAnnot2
= _mesa_strdup("");
619 s
= (char *) malloc(len
);
620 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
621 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
622 assert(_mesa_strlen(s
) < len
);
638 * Generate code for a simple arithmetic instruction.
639 * Either 1, 2 or 3 operands.
641 static struct prog_instruction
*
642 emit_arith(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
644 struct prog_instruction
*inst
;
645 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
646 char *srcAnnot
[3], *dstAnnot
;
650 assert(info
->InstOpcode
!= OPCODE_NOP
);
652 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
654 #if PEEPHOLE_OPTIMIZATIONS
655 /* Look for MAD opportunity */
656 if (info
->NumParams
== 2 &&
657 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
658 /* found pattern IR_ADD(IR_MUL(A, B), C) */
659 emit(vt
, n
->Children
[0]->Children
[0], prog
); /* A */
660 emit(vt
, n
->Children
[0]->Children
[1], prog
); /* B */
661 emit(vt
, n
->Children
[1], prog
); /* C */
662 /* generate MAD instruction */
663 inst
= new_instruction(prog
, OPCODE_MAD
);
664 /* operands: A, B, C: */
665 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
666 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
667 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
668 free_temp_storage(vt
, n
->Children
[0]->Children
[0]);
669 free_temp_storage(vt
, n
->Children
[0]->Children
[1]);
670 free_temp_storage(vt
, n
->Children
[1]);
672 else if (info
->NumParams
== 2 &&
673 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
674 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
675 emit(vt
, n
->Children
[0], prog
); /* A */
676 emit(vt
, n
->Children
[1]->Children
[0], prog
); /* B */
677 emit(vt
, n
->Children
[1]->Children
[1], prog
); /* C */
678 /* generate MAD instruction */
679 inst
= new_instruction(prog
, OPCODE_MAD
);
680 /* operands: B, C, A */
681 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
682 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
683 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
684 free_temp_storage(vt
, n
->Children
[1]->Children
[0]);
685 free_temp_storage(vt
, n
->Children
[1]->Children
[1]);
686 free_temp_storage(vt
, n
->Children
[0]);
693 /* gen code for children */
694 for (i
= 0; i
< info
->NumParams
; i
++)
695 emit(vt
, n
->Children
[i
], prog
);
697 /* gen this instruction and src registers */
698 inst
= new_instruction(prog
, info
->InstOpcode
);
699 for (i
= 0; i
< info
->NumParams
; i
++)
700 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
703 for (i
= 0; i
< info
->NumParams
; i
++)
704 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], prog
);
707 for (i
= 0; i
< info
->NumParams
; i
++)
708 free_temp_storage(vt
, n
->Children
[i
]);
713 if (!alloc_temp_storage(vt
, n
, info
->ResultSize
))
716 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
718 dstAnnot
= storage_annotation(n
, prog
);
720 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
721 srcAnnot
[1], srcAnnot
[2]);
723 /*_mesa_print_instruction(inst);*/
729 * Generate code for an IR_CLAMP instruction.
731 static struct prog_instruction
*
732 emit_clamp(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
734 struct prog_instruction
*inst
;
736 assert(n
->Opcode
== IR_CLAMP
);
742 inst
= emit(vt
, n
->Children
[0], prog
);
744 /* If lower limit == 0.0 and upper limit == 1.0,
745 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
747 * emit OPCODE_MIN, OPCODE_MAX sequence.
750 /* XXX this isn't quite finished yet */
751 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
752 n
->Children
[1]->Value
[0] == 0.0 &&
753 n
->Children
[1]->Value
[1] == 0.0 &&
754 n
->Children
[1]->Value
[2] == 0.0 &&
755 n
->Children
[1]->Value
[3] == 0.0 &&
756 n
->Children
[2]->Opcode
== IR_FLOAT
&&
757 n
->Children
[2]->Value
[0] == 1.0 &&
758 n
->Children
[2]->Value
[1] == 1.0 &&
759 n
->Children
[2]->Value
[2] == 1.0 &&
760 n
->Children
[2]->Value
[3] == 1.0) {
762 inst
= prev_instruction(prog
);
764 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
765 /* and prev instruction's DstReg matches n->Children[0]->Store */
766 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
767 n
->Store
= n
->Children
[0]->Store
;
774 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
777 emit(vt
, n
->Children
[1], prog
);
778 emit(vt
, n
->Children
[2], prog
);
780 /* tmp = max(ch[0], ch[1]) */
781 inst
= new_instruction(prog
, OPCODE_MAX
);
782 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
783 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
784 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
786 /* tmp = min(tmp, ch[2]) */
787 inst
= new_instruction(prog
, OPCODE_MIN
);
788 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
789 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
790 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
796 static struct prog_instruction
*
797 emit_negation(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
799 /* Implement as MOV dst, -src; */
800 /* XXX we could look at the previous instruction and in some circumstances
801 * modify it to accomplish the negation.
803 struct prog_instruction
*inst
;
805 emit(vt
, n
->Children
[0], prog
);
808 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
811 inst
= new_instruction(prog
, OPCODE_MOV
);
812 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
813 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
814 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
815 inst
->Comment
= n
->Comment
;
820 static struct prog_instruction
*
821 emit_label(const char *target
, struct gl_program
*prog
)
823 struct prog_instruction
*inst
;
824 inst
= new_instruction(prog
, OPCODE_NOP
);
825 inst
->Comment
= _mesa_strdup(target
);
830 static struct prog_instruction
*
831 emit_cjump(const char *target
, struct gl_program
*prog
, GLuint zeroOrOne
)
833 struct prog_instruction
*inst
;
834 inst
= new_instruction(prog
, OPCODE_BRA
);
836 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
838 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
839 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
840 inst
->Comment
= _mesa_strdup(target
);
845 static struct prog_instruction
*
846 emit_jump(const char *target
, struct gl_program
*prog
)
848 struct prog_instruction
*inst
;
849 inst
= new_instruction(prog
, OPCODE_BRA
);
850 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
851 /*inst->DstReg.CondSwizzle = SWIZZLE_X;*/
852 inst
->Comment
= _mesa_strdup(target
);
857 static struct prog_instruction
*
858 emit_kill(struct gl_program
*prog
)
860 struct prog_instruction
*inst
;
861 /* NV-KILL - discard fragment depending on condition code.
862 * Note that ARB-KILL depends on sign of vector operand.
864 inst
= new_instruction(prog
, OPCODE_KIL_NV
);
865 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
870 static struct prog_instruction
*
871 emit_tex(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
873 struct prog_instruction
*inst
;
874 if (n
->Opcode
== IR_TEX
) {
875 inst
= new_instruction(prog
, OPCODE_TEX
);
877 else if (n
->Opcode
== IR_TEXB
) {
878 inst
= new_instruction(prog
, OPCODE_TXB
);
881 assert(n
->Opcode
== IR_TEXP
);
882 inst
= new_instruction(prog
, OPCODE_TXP
);
886 if (!alloc_temp_storage(vt
, n
, 4))
889 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
891 (void) emit(vt
, n
->Children
[1], prog
);
893 /* Child[1] is the coord */
894 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
896 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
897 assert(n
->Children
[0]->Store
);
898 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
900 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
901 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
902 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
903 * link time, using the sampler uniform's value.
909 static struct prog_instruction
*
910 emit_move(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
912 struct prog_instruction
*inst
;
915 assert(n
->Children
[1]);
916 inst
= emit(vt
, n
->Children
[1], prog
);
918 assert(n
->Children
[1]->Store
->Index
>= 0);
921 emit(vt
, n
->Children
[0], prog
);
924 n
->Store
= n
->Children
[0]->Store
;
926 #if PEEPHOLE_OPTIMIZATIONS
927 if (inst
&& _slang_is_temp(vt
, n
->Children
[1]->Store
)) {
928 /* Peephole optimization:
929 * Just modify the RHS to put its result into the dest of this
930 * MOVE operation. Then, this MOVE is a no-op.
932 _slang_free_temp(vt
, n
->Children
[1]->Store
);
933 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
934 /* fixup the prev (RHS) instruction */
935 assert(n
->Children
[0]->Store
->Index
>= 0);
936 assert(n
->Children
[0]->Store
->Index
< 16);
937 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
943 if (n
->Children
[0]->Store
->Size
> 4) {
944 /* move matrix/struct etc (block of registers) */
945 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
946 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
947 GLint size
= srcStore
.Size
;
948 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
949 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
953 inst
= new_instruction(prog
, OPCODE_MOV
);
954 inst
->Comment
= _mesa_strdup("IR_MOVE block");
955 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
956 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
963 /* single register move */
964 char *srcAnnot
, *dstAnnot
;
965 inst
= new_instruction(prog
, OPCODE_MOV
);
966 assert(n
->Children
[0]->Store
->Index
>= 0);
967 assert(n
->Children
[0]->Store
->Index
< 16);
968 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
969 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
970 dstAnnot
= storage_annotation(n
->Children
[0], prog
);
971 srcAnnot
= storage_annotation(n
->Children
[1], prog
);
972 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
973 srcAnnot
, NULL
, NULL
);
975 free_temp_storage(vt
, n
->Children
[1]);
981 static struct prog_instruction
*
982 emit_cond(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
984 /* Conditional expression (in if/while/for stmts).
985 * Need to update condition code register.
986 * Next instruction is typically an IR_CJUMP0/1.
988 /* last child expr instruction: */
989 struct prog_instruction
*inst
= emit(vt
, n
->Children
[0], prog
);
991 /* set inst's CondUpdate flag */
992 inst
->CondUpdate
= GL_TRUE
;
993 return inst
; /* XXX or null? */
996 /* This'll happen for things like "if (i) ..." where no code
997 * is normally generated for the expression "i".
998 * Generate a move instruction just to set condition codes.
999 * Note: must use full 4-component vector since all four
1000 * condition codes must be set identically.
1002 if (!alloc_temp_storage(vt
, n
, 4))
1004 inst
= new_instruction(prog
, OPCODE_MOV
);
1005 inst
->CondUpdate
= GL_TRUE
;
1006 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1007 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1008 _slang_free_temp(vt
, n
->Store
);
1009 inst
->Comment
= _mesa_strdup("COND expr");
1010 return inst
; /* XXX or null? */
1018 static struct prog_instruction
*
1019 emit_not(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1022 slang_ir_storage st
;
1023 struct prog_instruction
*inst
;
1025 /* need zero constant */
1026 st
.File
= PROGRAM_CONSTANT
;
1028 st
.Index
= _mesa_add_unnamed_constant(prog
->Parameters
, &zero
,
1032 (void) emit(vt
, n
->Children
[0], prog
);
1033 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1036 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
1039 inst
= new_instruction(prog
, OPCODE_SEQ
);
1040 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1041 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1042 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1044 free_temp_storage(vt
, n
->Children
[0]);
1046 inst
->Comment
= _mesa_strdup("NOT");
1051 static struct prog_instruction
*
1052 emit_if(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1054 struct prog_instruction
*ifInst
;
1055 GLuint ifInstLoc
, elseInstLoc
;
1057 emit(vt
, n
->Children
[0], prog
); /* the condition */
1058 ifInstLoc
= prog
->NumInstructions
;
1059 ifInst
= new_instruction(prog
, OPCODE_IF
);
1060 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1061 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1064 emit(vt
, n
->Children
[1], prog
);
1066 if (n
->Children
[2]) {
1068 elseInstLoc
= prog
->NumInstructions
;
1069 (void) new_instruction(prog
, OPCODE_ELSE
);
1070 ifInst
= prog
->Instructions
+ ifInstLoc
;
1071 ifInst
->BranchTarget
= prog
->NumInstructions
;
1073 emit(vt
, n
->Children
[2], prog
);
1076 ifInst
= prog
->Instructions
+ ifInstLoc
;
1077 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1080 (void) new_instruction(prog
, OPCODE_ENDIF
);
1081 if (n
->Children
[2]) {
1082 struct prog_instruction
*elseInst
;
1083 elseInst
= prog
->Instructions
+ elseInstLoc
;
1084 elseInst
->BranchTarget
= prog
->NumInstructions
;
1091 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1092 * Ex: fix_swizzle("zyNN") -> "zyyy"
1095 fix_swizzle(GLuint swizzle
)
1098 for (i
= 0; i
< 4; i
++) {
1099 swz
[i
] = GET_SWZ(swizzle
, i
);
1100 if (swz
[i
] == SWIZZLE_NIL
) {
1101 swz
[i
] = swz
[i
- 1];
1104 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1108 static struct prog_instruction
*
1109 emit_swizzle(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1113 /* swizzled storage access */
1114 (void) emit(vt
, n
->Children
[0], prog
);
1116 /* "pull-up" the child's storage info, applying our swizzle info */
1117 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1118 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1119 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1120 /*n->Var = n->Children[0]->Var; XXX for debug */
1121 assert(n
->Store
->Index
>= 0);
1123 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1126 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1127 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1128 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1129 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1130 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1134 /* apply this swizzle to child's swizzle to get composed swizzle */
1135 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1141 static struct prog_instruction
*
1142 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
1144 struct prog_instruction
*inst
;
1148 switch (n
->Opcode
) {
1150 /* sequence of two sub-trees */
1151 assert(n
->Children
[0]);
1152 assert(n
->Children
[1]);
1153 emit(vt
, n
->Children
[0], prog
);
1154 inst
= emit(vt
, n
->Children
[1], prog
);
1156 n
->Store
= n
->Children
[1]->Store
;
1160 /* new variable scope */
1161 _slang_push_var_table(vt
);
1162 inst
= emit(vt
, n
->Children
[0], prog
);
1163 _slang_pop_var_table(vt
);
1167 /* Variable declaration - allocate a register for it */
1169 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1170 assert(n
->Store
->Size
> 0);
1171 assert(n
->Store
->Index
< 0);
1172 if (!n
->Var
|| n
->Var
->isTemp
) {
1173 /* a nameless/temporary variable, will be freed after first use */
1174 if (!_slang_alloc_temp(vt
, n
->Store
))
1175 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
1178 /* a regular variable */
1179 _slang_add_variable(vt
, n
->Var
);
1180 if (!_slang_alloc_var(vt
, n
->Store
))
1181 RETURN_ERROR("Ran out of registers, too many variables", 0);
1183 printf("IR_VAR_DECL %s %d store %p\n",
1184 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1186 assert(n
->Var
->aux
== n
->Store
);
1191 /* Reference to a variable
1192 * Storage should have already been resolved/allocated.
1195 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1196 if (n
->Store
->Index
< 0) {
1197 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1199 assert(n
->Store
->Index
>= 0);
1200 assert(n
->Store
->Size
> 0);
1204 /* Dereference array element. Just resolve storage for the array
1205 * element represented by this node.
1208 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1209 assert(n
->Store
->Size
> 0);
1210 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1211 /* OK, constant index */
1212 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1213 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1214 n
->Store
->Index
= arrayAddr
+ index
;
1217 /* Problem: variable index */
1218 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1219 const GLint index
= 0;
1220 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1221 n
->Store
->Index
= arrayAddr
+ index
;
1223 return NULL
; /* no instruction */
1226 return emit_swizzle(vt
, n
, prog
);
1228 /* Simple arithmetic */
1260 /* trinary operators */
1262 return emit_arith(vt
, n
, prog
);
1264 return emit_clamp(vt
, n
, prog
);
1268 return emit_tex(vt
, n
, prog
);
1270 return emit_negation(vt
, n
, prog
);
1272 /* find storage location for this float constant */
1273 n
->Store
->Index
= _mesa_add_unnamed_constant(prog
->Parameters
, n
->Value
,
1275 &n
->Store
->Swizzle
);
1276 if (n
->Store
->Index
< 0) {
1277 RETURN_ERROR("Ran out of space for constants.", 0);
1282 return emit_move(vt
, n
, prog
);
1285 return emit_cond(vt
, n
, prog
);
1288 return emit_not(vt
, n
, prog
);
1291 return emit_label(n
->Target
, prog
);
1293 return emit_jump(n
->Target
, prog
);
1295 return emit_cjump(n
->Target
, prog
, 0);
1297 return emit_cjump(n
->Target
, prog
, 1);
1299 return emit_kill(prog
);
1302 return emit_if(vt
, n
, prog
);
1306 struct prog_instruction
*beginInst
, *endInst
;
1310 /* save location of this instruction, used by OPCODE_ENDLOOP */
1311 n
->InstLocation
= prog
->NumInstructions
;
1312 (void) new_instruction(prog
, OPCODE_BGNLOOP
);
1315 emit(vt
, n
->Children
[0], prog
);
1317 endInstLoc
= prog
->NumInstructions
;
1318 endInst
= new_instruction(prog
, OPCODE_ENDLOOP
);
1319 /* The ENDLOOP's BranchTarget points to top of loop */
1320 endInst
->BranchTarget
= n
->InstLocation
;
1321 /* Update BGNLOOP's BranchTarget to point to this instruction */
1322 beginInst
= prog
->Instructions
+ n
->InstLocation
;
1323 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1325 /* Done emitting loop code. Now walk over the loop's linked list
1326 * of BREAK and CONT nodes, filling in their BranchTarget fields.
1328 for (p
= n
->BranchNode
; p
; p
= p
->BranchNode
) {
1329 if (p
->Opcode
== IR_BREAK
) {
1330 struct prog_instruction
*brkInst
1331 = prog
->Instructions
+ p
->InstLocation
;
1332 assert(brkInst
->Opcode
== OPCODE_BRK
);
1333 brkInst
->BranchTarget
= endInstLoc
+ 1;
1336 assert(p
->Opcode
== IR_CONT
);
1337 struct prog_instruction
*contInst
1338 = prog
->Instructions
+ p
->InstLocation
;
1339 assert(contInst
->Opcode
== OPCODE_CONT
);
1340 contInst
->BranchTarget
= endInstLoc
;
1347 struct prog_instruction
*inst
;
1348 n
->InstLocation
= prog
->NumInstructions
;
1349 inst
= new_instruction(prog
, OPCODE_CONT
);
1350 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1355 struct prog_instruction
*inst
;
1356 n
->InstLocation
= prog
->NumInstructions
;
1357 inst
= new_instruction(prog
, OPCODE_BRK
);
1358 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1363 return new_instruction(prog
, OPCODE_BGNSUB
);
1365 return new_instruction(prog
, OPCODE_ENDSUB
);
1367 return new_instruction(prog
, OPCODE_RET
);
1373 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1381 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1382 struct gl_program
*prog
, GLboolean withEnd
)
1386 if (emit(vt
, n
, prog
)) {
1387 /* finish up by adding the END opcode to program */
1389 struct prog_instruction
*inst
;
1390 inst
= new_instruction(prog
, OPCODE_END
);
1395 /* record an error? */
1399 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1401 _mesa_print_program(prog
);
1402 _mesa_print_program_parameters(ctx
,prog
);