2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
43 #include "prog_instruction.h"
44 #include "prog_parameter.h"
45 #include "prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
50 #define PEEPHOLE_OPTIMIZATIONS 1
54 /* XXX temporarily here */
61 struct gl_program
*prog
;
62 /* code-gen options */
63 GLboolean EmitHighLevelInstructions
;
64 GLboolean EmitComments
;
69 * Assembly and IR info
73 slang_ir_opcode IrOpcode
;
75 gl_inst_opcode InstOpcode
;
76 GLuint ResultSize
, NumParams
;
81 static const slang_ir_info IrInfo
[] = {
83 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
84 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
85 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
86 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
87 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
88 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
89 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
90 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
91 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
92 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
93 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
94 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
95 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
96 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
97 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
98 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
100 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
101 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
102 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
103 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
104 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
105 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
106 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
107 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
108 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
109 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
110 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
111 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
112 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
113 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
114 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
115 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
116 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
117 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
118 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
121 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
122 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
123 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
124 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
125 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
126 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
127 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
128 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
129 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
130 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
131 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
132 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
133 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
134 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
135 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
136 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
137 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
138 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 }, /* float literal */
139 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
140 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
141 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
142 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
146 static const slang_ir_info
*
147 slang_find_ir_info(slang_ir_opcode opcode
)
150 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
151 if (IrInfo
[i
].IrOpcode
== opcode
) {
159 slang_ir_name(slang_ir_opcode opcode
)
161 return slang_find_ir_info(opcode
)->IrName
;
166 * Swizzle a swizzle. That is, return swz2(swz1)
169 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
172 for (i
= 0; i
< 4; i
++) {
173 GLuint c
= GET_SWZ(swz2
, i
);
174 s
[i
] = GET_SWZ(swz1
, c
);
176 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
182 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
184 slang_ir_storage
*st
;
185 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
190 st
->Swizzle
= SWIZZLE_NOOP
;
197 swizzle_string(GLuint swizzle
)
202 for (i
= 1; i
< 5; i
++) {
203 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
210 writemask_string(GLuint writemask
)
215 for (i
= 0; i
< 4; i
++) {
216 if (writemask
& (1 << i
))
224 storage_string(const slang_ir_storage
*st
)
226 static const char *files
[] = {
244 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
246 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
247 st
->Index
+ st
->Size
- 1);
249 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
250 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
265 slang_print_ir(const slang_ir_node
*n
, int indent
)
270 if (n
->Opcode
!= IR_SEQ
)
272 printf("%3d:", indent
);
279 printf("SEQ at %p\n", (void*) n
);
281 assert(n
->Children
[0]);
282 assert(n
->Children
[1]);
283 slang_print_ir(n
->Children
[0], indent
+ IND
);
284 slang_print_ir(n
->Children
[1], indent
+ IND
);
287 printf("NEW SCOPE\n");
288 assert(!n
->Children
[1]);
289 slang_print_ir(n
->Children
[0], indent
+ 3);
292 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
293 slang_print_ir(n
->Children
[0], indent
+3);
294 slang_print_ir(n
->Children
[1], indent
+3);
297 printf("LABEL: %s\n", n
->Label
->Name
);
301 slang_print_ir(n
->Children
[0], indent
+ 3);
304 printf("JUMP %s\n", n
->Label
->Name
);
307 printf("CJUMP0 %s\n", n
->Label
->Name
);
308 slang_print_ir(n
->Children
[0], indent
+3);
311 printf("CJUMP1 %s\n", n
->Label
->Name
);
312 slang_print_ir(n
->Children
[0], indent
+3);
317 slang_print_ir(n
->Children
[0], indent
+3);
320 slang_print_ir(n
->Children
[1], indent
+3);
321 if (n
->Children
[2]) {
324 slang_print_ir(n
->Children
[2], indent
+3);
330 printf("BEGIN_SUB\n");
344 slang_print_ir(n
->Children
[0], indent
+3);
354 case IR_BREAK_IF_FALSE
:
355 printf("BREAK_IF_FALSE\n");
356 slang_print_ir(n
->Children
[0], indent
+3);
358 case IR_BREAK_IF_TRUE
:
359 printf("BREAK_IF_TRUE\n");
360 slang_print_ir(n
->Children
[0], indent
+3);
362 case IR_CONT_IF_FALSE
:
363 printf("CONT_IF_FALSE\n");
364 slang_print_ir(n
->Children
[0], indent
+3);
366 case IR_CONT_IF_TRUE
:
367 printf("CONT_IF_TRUE\n");
368 slang_print_ir(n
->Children
[0], indent
+3);
372 printf("VAR %s%s at %s store %p\n",
373 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
374 swizzle_string(n
->Store
->Swizzle
),
375 storage_string(n
->Store
), (void*) n
->Store
);
378 printf("VAR_DECL %s (%p) at %s store %p\n",
379 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
380 (void*) n
->Var
, storage_string(n
->Store
),
384 printf("FIELD %s of\n", n
->Field
);
385 slang_print_ir(n
->Children
[0], indent
+3);
388 printf("FLOAT %g %g %g %g\n",
389 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
392 printf("INT_TO_FLOAT\n");
393 slang_print_ir(n
->Children
[0], indent
+3);
396 printf("FLOAT_TO_INT\n");
397 slang_print_ir(n
->Children
[0], indent
+3);
400 printf("SWIZZLE %s of (store %p) \n",
401 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
402 slang_print_ir(n
->Children
[0], indent
+ 3);
405 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
406 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
407 slang_print_ir(n
->Children
[0], indent
+3);
408 slang_print_ir(n
->Children
[1], indent
+3);
414 * Allocate temporary storage for an intermediate result (such as for
415 * a multiply or add, etc.
418 alloc_temp_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
, GLint size
)
423 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
424 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
425 slang_info_log_error(emitInfo
->log
,
426 "Ran out of registers, too many temporaries");
434 * Free temporary storage, if n->Store is, in fact, temp storage.
438 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
440 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
441 if (_slang_is_temp(vt
, n
->Store
)) {
442 _slang_free_temp(vt
, n
->Store
);
443 n
->Store
->Index
= -1;
451 * Convert IR storage to an instruction dst register.
454 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
457 static const GLuint defaultWritemask
[4] = {
459 WRITEMASK_X
| WRITEMASK_Y
,
460 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
461 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
463 assert(st
->Index
>= 0 && st
->Index
<= 16);
464 dst
->File
= st
->File
;
465 dst
->Index
= st
->Index
;
466 assert(st
->File
!= PROGRAM_UNDEFINED
);
467 assert(st
->Size
>= 1);
468 assert(st
->Size
<= 4);
470 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
472 assert(writemask
& WRITEMASK_X
);
473 dst
->WriteMask
= WRITEMASK_X
<< comp
;
476 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
482 * Convert IR storage to an instruction src register.
485 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
487 static const GLuint defaultSwizzle
[4] = {
488 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
489 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
490 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
491 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
493 assert(st
->File
>= 0 && st
->File
<= 16);
494 src
->File
= st
->File
;
495 src
->Index
= st
->Index
;
496 assert(st
->File
!= PROGRAM_UNDEFINED
);
497 assert(st
->Size
>= 1);
498 assert(st
->Size
<= 4);
499 if (st
->Swizzle
!= SWIZZLE_NOOP
)
500 src
->Swizzle
= st
->Swizzle
;
502 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
504 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
505 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
506 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
507 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
513 * Add new instruction at end of given program.
514 * \param prog the program to append instruction onto
515 * \param opcode opcode for the new instruction
516 * \return pointer to the new instruction
518 static struct prog_instruction
*
519 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
521 struct gl_program
*prog
= emitInfo
->prog
;
522 struct prog_instruction
*inst
;
523 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
524 prog
->NumInstructions
,
525 prog
->NumInstructions
+ 1);
526 inst
= prog
->Instructions
+ prog
->NumInstructions
;
527 prog
->NumInstructions
++;
528 _mesa_init_instructions(inst
, 1);
529 inst
->Opcode
= opcode
;
530 inst
->BranchTarget
= -1; /* invalid */
537 * Return pointer to last instruction in program.
539 static struct prog_instruction
*
540 prev_instruction(struct gl_program
*prog
)
542 if (prog
->NumInstructions
== 0)
545 return prog
->Instructions
+ prog
->NumInstructions
- 1;
550 static struct prog_instruction
*
551 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
555 * Return an annotation string for given node's storage.
558 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
561 const slang_ir_storage
*st
= n
->Store
;
562 static char s
[100] = "";
565 return _mesa_strdup("");
568 case PROGRAM_CONSTANT
:
569 if (st
->Index
>= 0) {
570 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
571 if (st
->Swizzle
== SWIZZLE_NOOP
)
572 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
574 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
578 case PROGRAM_TEMPORARY
:
580 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
582 sprintf(s
, "t[%d]", st
->Index
);
584 case PROGRAM_STATE_VAR
:
585 case PROGRAM_UNIFORM
:
586 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
588 case PROGRAM_VARYING
:
589 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
592 sprintf(s
, "input[%d]", st
->Index
);
595 sprintf(s
, "output[%d]", st
->Index
);
600 return _mesa_strdup(s
);
608 * Return an annotation string for an instruction.
611 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
612 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
615 const char *operator;
620 len
+= strlen(dstAnnot
);
622 dstAnnot
= _mesa_strdup("");
625 len
+= strlen(srcAnnot0
);
627 srcAnnot0
= _mesa_strdup("");
630 len
+= strlen(srcAnnot1
);
632 srcAnnot1
= _mesa_strdup("");
635 len
+= strlen(srcAnnot2
);
637 srcAnnot2
= _mesa_strdup("");
668 s
= (char *) malloc(len
);
669 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
670 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
671 assert(_mesa_strlen(s
) < len
);
687 * Generate code for a simple arithmetic instruction.
688 * Either 1, 2 or 3 operands.
690 static struct prog_instruction
*
691 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
693 struct prog_instruction
*inst
;
694 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
695 char *srcAnnot
[3], *dstAnnot
;
699 assert(info
->InstOpcode
!= OPCODE_NOP
);
701 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
703 #if PEEPHOLE_OPTIMIZATIONS
704 /* Look for MAD opportunity */
705 if (info
->NumParams
== 2 &&
706 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
707 /* found pattern IR_ADD(IR_MUL(A, B), C) */
708 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
709 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
710 emit(emitInfo
, n
->Children
[1]); /* C */
711 /* generate MAD instruction */
712 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
713 /* operands: A, B, C: */
714 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
715 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
716 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
717 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
718 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
719 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
721 else if (info
->NumParams
== 2 &&
722 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
723 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
724 emit(emitInfo
, n
->Children
[0]); /* A */
725 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
726 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
727 /* generate MAD instruction */
728 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
729 /* operands: B, C, A */
730 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
731 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
732 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
733 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
734 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
735 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
742 /* gen code for children */
743 for (i
= 0; i
< info
->NumParams
; i
++)
744 emit(emitInfo
, n
->Children
[i
]);
746 /* gen this instruction and src registers */
747 inst
= new_instruction(emitInfo
, info
->InstOpcode
);
748 for (i
= 0; i
< info
->NumParams
; i
++)
749 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
752 for (i
= 0; i
< info
->NumParams
; i
++)
753 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], emitInfo
->prog
);
756 for (i
= 0; i
< info
->NumParams
; i
++)
757 free_temp_storage(emitInfo
->vt
, n
->Children
[i
]);
762 if (!alloc_temp_storage(emitInfo
, n
, info
->ResultSize
))
765 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
767 dstAnnot
= storage_annotation(n
, emitInfo
->prog
);
769 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
770 srcAnnot
[1], srcAnnot
[2]);
772 /*_mesa_print_instruction(inst);*/
778 * Generate code for an IR_CLAMP instruction.
780 static struct prog_instruction
*
781 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
783 struct prog_instruction
*inst
;
785 assert(n
->Opcode
== IR_CLAMP
);
791 inst
= emit(emitInfo
, n
->Children
[0]);
793 /* If lower limit == 0.0 and upper limit == 1.0,
794 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
796 * emit OPCODE_MIN, OPCODE_MAX sequence.
799 /* XXX this isn't quite finished yet */
800 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
801 n
->Children
[1]->Value
[0] == 0.0 &&
802 n
->Children
[1]->Value
[1] == 0.0 &&
803 n
->Children
[1]->Value
[2] == 0.0 &&
804 n
->Children
[1]->Value
[3] == 0.0 &&
805 n
->Children
[2]->Opcode
== IR_FLOAT
&&
806 n
->Children
[2]->Value
[0] == 1.0 &&
807 n
->Children
[2]->Value
[1] == 1.0 &&
808 n
->Children
[2]->Value
[2] == 1.0 &&
809 n
->Children
[2]->Value
[3] == 1.0) {
811 inst
= prev_instruction(prog
);
813 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
814 /* and prev instruction's DstReg matches n->Children[0]->Store */
815 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
816 n
->Store
= n
->Children
[0]->Store
;
823 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
826 emit(emitInfo
, n
->Children
[1]);
827 emit(emitInfo
, n
->Children
[2]);
829 /* tmp = max(ch[0], ch[1]) */
830 inst
= new_instruction(emitInfo
, OPCODE_MAX
);
831 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
832 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
833 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
835 /* tmp = min(tmp, ch[2]) */
836 inst
= new_instruction(emitInfo
, OPCODE_MIN
);
837 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
838 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
839 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
845 static struct prog_instruction
*
846 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
848 /* Implement as MOV dst, -src; */
849 /* XXX we could look at the previous instruction and in some circumstances
850 * modify it to accomplish the negation.
852 struct prog_instruction
*inst
;
854 emit(emitInfo
, n
->Children
[0]);
857 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
860 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
861 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
862 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
863 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
868 static struct prog_instruction
*
869 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
872 assert(_slang_label_get_location(n
->Label
) < 0);
873 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
879 static struct prog_instruction
*
880 emit_cjump(slang_emit_info
*emitInfo
, slang_ir_node
*n
, GLuint zeroOrOne
)
882 struct prog_instruction
*inst
;
883 assert(n
->Opcode
== IR_CJUMP0
|| n
->Opcode
== IR_CJUMP1
);
884 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
886 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
888 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
889 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
890 inst
->BranchTarget
= _slang_label_get_location(n
->Label
);
891 if (inst
->BranchTarget
< 0) {
892 _slang_label_add_reference(n
->Label
, emitInfo
->prog
->NumInstructions
- 1);
898 static struct prog_instruction
*
899 emit_jump(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
901 struct prog_instruction
*inst
;
902 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
903 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
904 inst
->BranchTarget
= _slang_label_get_location(n
->Label
);
905 if (inst
->BranchTarget
< 0) {
906 _slang_label_add_reference(n
->Label
, emitInfo
->prog
->NumInstructions
- 1);
912 static struct prog_instruction
*
913 emit_kill(slang_emit_info
*emitInfo
)
915 struct prog_instruction
*inst
;
916 /* NV-KILL - discard fragment depending on condition code.
917 * Note that ARB-KILL depends on sign of vector operand.
919 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
920 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
925 static struct prog_instruction
*
926 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
928 struct prog_instruction
*inst
;
929 if (n
->Opcode
== IR_TEX
) {
930 inst
= new_instruction(emitInfo
, OPCODE_TEX
);
932 else if (n
->Opcode
== IR_TEXB
) {
933 inst
= new_instruction(emitInfo
, OPCODE_TXB
);
936 assert(n
->Opcode
== IR_TEXP
);
937 inst
= new_instruction(emitInfo
, OPCODE_TXP
);
941 if (!alloc_temp_storage(emitInfo
, n
, 4))
944 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
946 (void) emit(emitInfo
, n
->Children
[1]);
948 /* Child[1] is the coord */
949 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
951 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
952 assert(n
->Children
[0]->Store
);
953 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
955 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
956 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
957 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
958 * link time, using the sampler uniform's value.
964 static struct prog_instruction
*
965 emit_move(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
967 struct prog_instruction
*inst
;
970 assert(n
->Children
[1]);
971 inst
= emit(emitInfo
, n
->Children
[1]);
973 assert(n
->Children
[1]->Store
->Index
>= 0);
976 emit(emitInfo
, n
->Children
[0]);
979 n
->Store
= n
->Children
[0]->Store
;
981 #if PEEPHOLE_OPTIMIZATIONS
982 if (inst
&& _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
)) {
983 /* Peephole optimization:
984 * Just modify the RHS to put its result into the dest of this
985 * MOVE operation. Then, this MOVE is a no-op.
987 _slang_free_temp(emitInfo
->vt
, n
->Children
[1]->Store
);
988 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
989 /* fixup the prev (RHS) instruction */
990 assert(n
->Children
[0]->Store
->Index
>= 0);
991 assert(n
->Children
[0]->Store
->Index
< 16);
992 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
998 if (n
->Children
[0]->Store
->Size
> 4) {
999 /* move matrix/struct etc (block of registers) */
1000 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1001 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1002 GLint size
= srcStore
.Size
;
1003 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
1004 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1008 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1009 inst
->Comment
= _mesa_strdup("IR_MOVE block");
1010 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
1011 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
1018 /* single register move */
1019 char *srcAnnot
, *dstAnnot
;
1020 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1021 assert(n
->Children
[0]->Store
->Index
>= 0);
1022 assert(n
->Children
[0]->Store
->Index
< 16);
1023 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
1024 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
1025 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1026 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1027 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1028 srcAnnot
, NULL
, NULL
);
1030 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
1036 static struct prog_instruction
*
1037 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1039 /* Conditional expression (in if/while/for stmts).
1040 * Need to update condition code register.
1041 * Next instruction is typically an IR_CJUMP0/1.
1043 /* last child expr instruction: */
1044 struct prog_instruction
*inst
= emit(emitInfo
, n
->Children
[0]);
1046 /* set inst's CondUpdate flag */
1047 inst
->CondUpdate
= GL_TRUE
;
1048 return inst
; /* XXX or null? */
1051 /* This'll happen for things like "if (i) ..." where no code
1052 * is normally generated for the expression "i".
1053 * Generate a move instruction just to set condition codes.
1054 * Note: must use full 4-component vector since all four
1055 * condition codes must be set identically.
1057 if (!alloc_temp_storage(emitInfo
, n
, 4))
1059 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1060 inst
->CondUpdate
= GL_TRUE
;
1061 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1062 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1063 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1064 inst
->Comment
= _mesa_strdup("COND expr");
1065 return inst
; /* XXX or null? */
1073 static struct prog_instruction
*
1074 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1077 slang_ir_storage st
;
1078 struct prog_instruction
*inst
;
1080 /* need zero constant */
1081 st
.File
= PROGRAM_CONSTANT
;
1083 st
.Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, &zero
,
1087 (void) emit(emitInfo
, n
->Children
[0]);
1088 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1091 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1094 inst
= new_instruction(emitInfo
, OPCODE_SEQ
);
1095 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1096 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1097 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1099 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
1101 inst
->Comment
= _mesa_strdup("NOT");
1106 static struct prog_instruction
*
1107 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1109 struct gl_program
*prog
= emitInfo
->prog
;
1110 struct prog_instruction
*ifInst
;
1111 GLuint ifInstLoc
, elseInstLoc
= 0;
1113 emit(emitInfo
, n
->Children
[0]); /* the condition */
1114 ifInstLoc
= prog
->NumInstructions
;
1115 if (emitInfo
->EmitHighLevelInstructions
) {
1116 ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1117 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1118 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1121 /* conditional jump to else, or endif */
1122 ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1123 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1124 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1125 ifInst
->Comment
= _mesa_strdup("if zero");
1129 emit(emitInfo
, n
->Children
[1]);
1131 if (n
->Children
[2]) {
1132 /* have else body */
1133 elseInstLoc
= prog
->NumInstructions
;
1134 if (emitInfo
->EmitHighLevelInstructions
) {
1135 (void) new_instruction(emitInfo
, OPCODE_ELSE
);
1138 /* jump to endif instruction */
1139 struct prog_instruction
*inst
;
1140 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1141 inst
->Comment
= _mesa_strdup("else");
1142 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1144 ifInst
= prog
->Instructions
+ ifInstLoc
;
1145 ifInst
->BranchTarget
= prog
->NumInstructions
;
1147 emit(emitInfo
, n
->Children
[2]);
1151 ifInst
= prog
->Instructions
+ ifInstLoc
;
1152 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1155 if (emitInfo
->EmitHighLevelInstructions
) {
1156 (void) new_instruction(emitInfo
, OPCODE_ENDIF
);
1159 if (n
->Children
[2]) {
1160 struct prog_instruction
*elseInst
;
1161 elseInst
= prog
->Instructions
+ elseInstLoc
;
1162 elseInst
->BranchTarget
= prog
->NumInstructions
;
1168 static struct prog_instruction
*
1169 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1171 struct gl_program
*prog
= emitInfo
->prog
;
1172 struct prog_instruction
*beginInst
, *endInst
;
1173 GLuint beginInstLoc
, endInstLoc
;
1176 /* emit OPCODE_BGNLOOP */
1177 beginInstLoc
= prog
->NumInstructions
;
1178 if (emitInfo
->EmitHighLevelInstructions
) {
1179 (void) new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1183 emit(emitInfo
, n
->Children
[0]);
1185 endInstLoc
= prog
->NumInstructions
;
1186 if (emitInfo
->EmitHighLevelInstructions
) {
1187 /* emit OPCODE_ENDLOOP */
1188 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1191 /* emit unconditional BRA-nch */
1192 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1193 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1195 /* end instruction's BranchTarget points to top of loop */
1196 endInst
->BranchTarget
= beginInstLoc
;
1198 if (emitInfo
->EmitHighLevelInstructions
) {
1199 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1200 beginInst
= prog
->Instructions
+ beginInstLoc
;
1201 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1204 /* Done emitting loop code. Now walk over the loop's linked list of
1205 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1206 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1208 for (ir
= n
->BranchNode
; ir
; ir
= ir
->BranchNode
) {
1209 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1210 assert(inst
->BranchTarget
< 0);
1211 if (ir
->Opcode
== IR_BREAK
||
1212 ir
->Opcode
== IR_BREAK_IF_FALSE
||
1213 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1214 assert(inst
->Opcode
== OPCODE_BRK
||
1215 inst
->Opcode
== OPCODE_BRA
);
1216 /* go to instruction after end of loop */
1217 inst
->BranchTarget
= endInstLoc
+ 1;
1220 assert(ir
->Opcode
== IR_CONT
||
1221 ir
->Opcode
== IR_CONT_IF_FALSE
||
1222 ir
->Opcode
== IR_CONT_IF_TRUE
);
1223 assert(inst
->Opcode
== OPCODE_CONT
||
1224 inst
->Opcode
== OPCODE_BRA
);
1225 /* to go instruction at top of loop */
1226 inst
->BranchTarget
= beginInstLoc
;
1234 * "Continue" or "break" statement.
1235 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1237 static struct prog_instruction
*
1238 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1240 gl_inst_opcode opcode
;
1241 struct prog_instruction
*inst
;
1242 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1243 if (emitInfo
->EmitHighLevelInstructions
) {
1244 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1247 opcode
= OPCODE_BRA
;
1249 inst
= new_instruction(emitInfo
, opcode
);
1250 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1256 * Conditional "continue" or "break" statement.
1257 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1259 static struct prog_instruction
*
1260 emit_cont_break_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
1261 GLboolean breakTrue
)
1263 gl_inst_opcode opcode
;
1264 struct prog_instruction
*inst
;
1266 /* evaluate condition expr, setting cond codes */
1267 inst
= emit(emitInfo
, n
->Children
[0]);
1269 inst
->CondUpdate
= GL_TRUE
;
1271 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1272 if (emitInfo
->EmitHighLevelInstructions
) {
1273 if (n
->Opcode
== IR_CONT_IF_TRUE
||
1274 n
->Opcode
== IR_CONT_IF_FALSE
)
1275 opcode
= OPCODE_CONT
;
1277 opcode
= OPCODE_BRK
;
1280 opcode
= OPCODE_BRA
;
1282 inst
= new_instruction(emitInfo
, opcode
);
1283 inst
->DstReg
.CondMask
= breakTrue
? COND_NE
: COND_EQ
;
1290 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1291 * Ex: fix_swizzle("zyNN") -> "zyyy"
1294 fix_swizzle(GLuint swizzle
)
1297 for (i
= 0; i
< 4; i
++) {
1298 swz
[i
] = GET_SWZ(swizzle
, i
);
1299 if (swz
[i
] == SWIZZLE_NIL
) {
1300 swz
[i
] = swz
[i
- 1];
1303 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1307 static struct prog_instruction
*
1308 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1312 /* swizzled storage access */
1313 (void) emit(emitInfo
, n
->Children
[0]);
1315 /* "pull-up" the child's storage info, applying our swizzle info */
1316 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1317 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1318 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1319 /*n->Var = n->Children[0]->Var; XXX for debug */
1320 assert(n
->Store
->Index
>= 0);
1322 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1325 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1326 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1327 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1328 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1329 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1333 /* apply this swizzle to child's swizzle to get composed swizzle */
1334 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1341 * Dereference array element. Just resolve storage for the array
1342 * element represented by this node.
1344 static struct prog_instruction
*
1345 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1348 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1349 assert(n
->Store
->Size
> 0);
1351 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1352 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1357 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1358 /* Constant index */
1359 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1360 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1361 n
->Store
->Index
= arrayAddr
+ index
;
1364 /* Variable index - PROBLEM */
1365 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1366 const GLint index
= 0;
1367 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1368 n
->Store
->Index
= arrayAddr
+ index
;
1370 return NULL
; /* no instruction */
1375 * Resolve storage for accessing a structure field.
1377 static struct prog_instruction
*
1378 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1380 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1381 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1385 _mesa_problem(NULL
, "structs/fields not supported yet");
1387 return NULL
; /* no instruction */
1391 static struct prog_instruction
*
1392 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1394 struct prog_instruction
*inst
;
1398 switch (n
->Opcode
) {
1400 /* sequence of two sub-trees */
1401 assert(n
->Children
[0]);
1402 assert(n
->Children
[1]);
1403 emit(emitInfo
, n
->Children
[0]);
1404 inst
= emit(emitInfo
, n
->Children
[1]);
1406 n
->Store
= n
->Children
[1]->Store
;
1410 /* new variable scope */
1411 _slang_push_var_table(emitInfo
->vt
);
1412 inst
= emit(emitInfo
, n
->Children
[0]);
1413 _slang_pop_var_table(emitInfo
->vt
);
1417 /* Variable declaration - allocate a register for it */
1419 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1420 assert(n
->Store
->Size
> 0);
1421 assert(n
->Store
->Index
< 0);
1422 if (!n
->Var
|| n
->Var
->isTemp
) {
1423 /* a nameless/temporary variable, will be freed after first use */
1424 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
1425 slang_info_log_error(emitInfo
->log
,
1426 "Ran out of registers, too many temporaries");
1431 /* a regular variable */
1432 _slang_add_variable(emitInfo
->vt
, n
->Var
);
1433 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
1434 slang_info_log_error(emitInfo
->log
,
1435 "Ran out of registers, too many variables");
1439 printf("IR_VAR_DECL %s %d store %p\n",
1440 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1442 assert(n
->Var
->aux
== n
->Store
);
1444 if (emitInfo
->EmitComments
) {
1445 /* emit NOP with comment describing the variable's storage location */
1447 sprintf(s
, "TEMP[%d]%s = %s (size %d)",
1449 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
1450 (char *) n
->Var
->a_name
,
1452 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
1453 inst
->Comment
= _mesa_strdup(s
);
1459 /* Reference to a variable
1460 * Storage should have already been resolved/allocated.
1463 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1465 if (n
->Store
->File
== PROGRAM_STATE_VAR
&&
1466 n
->Store
->Index
< 0) {
1467 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1470 if (n
->Store
->Index
< 0) {
1471 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1473 assert(n
->Store
->Index
>= 0);
1474 assert(n
->Store
->Size
> 0);
1478 return emit_array_element(emitInfo
, n
);
1480 return emit_struct_field(emitInfo
, n
);
1482 return emit_swizzle(emitInfo
, n
);
1486 n
->Store
= n
->Children
[0]->Store
;
1490 /* Simple arithmetic */
1522 /* trinary operators */
1524 return emit_arith(emitInfo
, n
);
1526 return emit_clamp(emitInfo
, n
);
1530 return emit_tex(emitInfo
, n
);
1532 return emit_negation(emitInfo
, n
);
1534 /* find storage location for this float constant */
1535 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, n
->Value
,
1537 &n
->Store
->Swizzle
);
1538 if (n
->Store
->Index
< 0) {
1539 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
1545 return emit_move(emitInfo
, n
);
1548 return emit_cond(emitInfo
, n
);
1551 return emit_not(emitInfo
, n
);
1554 return emit_label(emitInfo
, n
);
1556 return emit_jump(emitInfo
, n
);
1558 return emit_cjump(emitInfo
, n
, 0);
1560 return emit_cjump(emitInfo
, n
, 1);
1562 return emit_kill(emitInfo
);
1565 return emit_if(emitInfo
, n
);
1568 return emit_loop(emitInfo
, n
);
1569 case IR_BREAK_IF_FALSE
:
1570 case IR_CONT_IF_FALSE
:
1571 return emit_cont_break_if(emitInfo
, n
, GL_FALSE
);
1572 case IR_BREAK_IF_TRUE
:
1573 case IR_CONT_IF_TRUE
:
1574 return emit_cont_break_if(emitInfo
, n
, GL_TRUE
);
1578 return emit_cont_break(emitInfo
, n
);
1581 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
1583 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
1585 return new_instruction(emitInfo
, OPCODE_RET
);
1591 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1599 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1600 struct gl_program
*prog
, GLboolean withEnd
,
1601 slang_info_log
*log
)
1603 GET_CURRENT_CONTEXT(ctx
);
1605 slang_emit_info emitInfo
;
1609 emitInfo
.prog
= prog
;
1611 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
1612 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
;
1614 (void) emit(&emitInfo
, n
);
1616 /* finish up by adding the END opcode to program */
1618 struct prog_instruction
*inst
;
1619 inst
= new_instruction(&emitInfo
, OPCODE_END
);
1623 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1625 _mesa_print_program(prog
);
1626 _mesa_print_program_parameters(ctx
,prog
);