2 * Mesa 3-D graphics library
4 * Copyright (C) 2005-2008 Brian Paul All Rights Reserved.
5 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "program/program.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "program/prog_print.h"
45 #include "slang_builtin.h"
46 #include "slang_emit.h"
47 #include "slang_mem.h"
50 #define PEEPHOLE_OPTIMIZATIONS 1
58 struct gl_program
*prog
;
59 struct gl_program
**Subroutines
;
60 GLuint NumSubroutines
;
62 GLuint MaxInstructions
; /**< size of prog->Instructions[] buffer */
64 GLboolean UnresolvedFunctions
;
66 /* code-gen options */
67 GLboolean EmitHighLevelInstructions
;
68 GLboolean EmitCondCodes
;
69 GLboolean EmitComments
;
70 GLboolean EmitBeginEndSub
; /* XXX TEMPORARY */
75 static struct gl_program
*
76 new_subroutine(slang_emit_info
*emitInfo
, GLuint
*id
)
78 GET_CURRENT_CONTEXT(ctx
);
79 const GLuint n
= emitInfo
->NumSubroutines
;
81 emitInfo
->Subroutines
= (struct gl_program
**)
82 _mesa_realloc(emitInfo
->Subroutines
,
83 n
* sizeof(struct gl_program
*),
84 (n
+ 1) * sizeof(struct gl_program
*));
85 emitInfo
->Subroutines
[n
] = ctx
->Driver
.NewProgram(ctx
, emitInfo
->prog
->Target
, 0);
86 emitInfo
->Subroutines
[n
]->Parameters
= emitInfo
->prog
->Parameters
;
87 emitInfo
->NumSubroutines
++;
89 return emitInfo
->Subroutines
[n
];
94 * Convert a writemask to a swizzle. Used for testing cond codes because
95 * we only want to test the cond code component(s) that was set by the
96 * previous instruction.
99 writemask_to_swizzle(GLuint writemask
)
101 if (writemask
== WRITEMASK_X
)
103 if (writemask
== WRITEMASK_Y
)
105 if (writemask
== WRITEMASK_Z
)
107 if (writemask
== WRITEMASK_W
)
109 return SWIZZLE_XYZW
; /* shouldn't be hit */
114 * Convert a swizzle mask to a writemask.
115 * Note that the slang_ir_storage->Swizzle field can represent either a
116 * swizzle mask or a writemask, depending on how it's used. For example,
117 * when we parse "direction.yz" alone, we don't know whether .yz is a
118 * writemask or a swizzle. In this case, we encode ".yz" in store->Swizzle
119 * as a swizzle mask (.yz?? actually). Later, if direction.yz is used as
120 * an R-value, we use store->Swizzle as-is. Otherwise, if direction.yz is
121 * used as an L-value, we convert it to a writemask.
124 swizzle_to_writemask(GLuint swizzle
)
126 GLuint i
, writemask
= 0x0;
127 for (i
= 0; i
< 4; i
++) {
128 GLuint swz
= GET_SWZ(swizzle
, i
);
129 if (swz
<= SWIZZLE_W
) {
130 writemask
|= (1 << swz
);
138 * Swizzle a swizzle (function composition).
139 * That is, return swz2(swz1), or said another way: swz1.szw2
140 * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
143 _slang_swizzle_swizzle(GLuint swz1
, GLuint swz2
)
146 for (i
= 0; i
< 4; i
++) {
147 GLuint c
= GET_SWZ(swz2
, i
);
149 s
[i
] = GET_SWZ(swz1
, c
);
153 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
159 * Return the default swizzle mask for accessing a variable of the
160 * given size (in floats). If size = 1, comp is used to identify
161 * which component [0..3] of the register holds the variable.
164 _slang_var_swizzle(GLint size
, GLint comp
)
168 return MAKE_SWIZZLE4(comp
, SWIZZLE_NIL
, SWIZZLE_NIL
, SWIZZLE_NIL
);
170 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_NIL
, SWIZZLE_NIL
);
172 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_NIL
);
181 * Allocate storage for the given node (if it hasn't already been allocated).
183 * Typically this is temporary storage for an intermediate result (such as
184 * for a multiply or add, etc).
186 * If n->Store does not exist it will be created and will be of the size
187 * specified by defaultSize.
190 alloc_node_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
195 assert(defaultSize
> 0);
196 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, defaultSize
);
202 /* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
203 if (n
->Store
->Index
< 0) {
204 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
205 slang_info_log_error(emitInfo
->log
,
206 "Ran out of registers, too many temporaries");
207 _slang_free(n
->Store
);
217 * Free temporary storage, if n->Store is, in fact, temp storage.
221 free_node_storage(slang_var_table
*vt
, slang_ir_node
*n
)
223 if (n
->Store
->File
== PROGRAM_TEMPORARY
&&
224 n
->Store
->Index
>= 0 &&
225 n
->Opcode
!= IR_SWIZZLE
) {
226 if (_slang_is_temp(vt
, n
->Store
)) {
227 _slang_free_temp(vt
, n
->Store
);
228 n
->Store
->Index
= -1;
229 n
->Store
= NULL
; /* XXX this may not be needed */
236 * Helper function to allocate a short-term temporary.
237 * Free it with _slang_free_temp().
240 alloc_local_temp(slang_emit_info
*emitInfo
, slang_ir_storage
*temp
, GLint size
)
244 memset(temp
, 0, sizeof(*temp
));
246 temp
->File
= PROGRAM_TEMPORARY
;
248 return _slang_alloc_temp(emitInfo
->vt
, temp
);
253 * Remove any SWIZZLE_NIL terms from given swizzle mask.
254 * For a swizzle like .z??? generate .zzzz (replicate single component).
255 * Else, for .wx?? generate .wxzw (insert default component for the position).
258 fix_swizzle(GLuint swizzle
)
260 GLuint c0
= GET_SWZ(swizzle
, 0),
261 c1
= GET_SWZ(swizzle
, 1),
262 c2
= GET_SWZ(swizzle
, 2),
263 c3
= GET_SWZ(swizzle
, 3);
264 if (c1
== SWIZZLE_NIL
&& c2
== SWIZZLE_NIL
&& c3
== SWIZZLE_NIL
) {
265 /* smear first component across all positions */
269 /* insert default swizzle components */
270 if (c0
== SWIZZLE_NIL
)
272 if (c1
== SWIZZLE_NIL
)
274 if (c2
== SWIZZLE_NIL
)
276 if (c3
== SWIZZLE_NIL
)
279 return MAKE_SWIZZLE4(c0
, c1
, c2
, c3
);
285 * Convert IR storage to an instruction dst register.
288 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
)
290 const GLboolean relAddr
= st
->RelAddr
;
291 const GLint size
= st
->Size
;
292 GLint index
= st
->Index
;
293 GLuint swizzle
= st
->Swizzle
;
296 /* if this is storage relative to some parent storage, walk up the tree */
299 assert(st
->Index
>= 0);
301 swizzle
= _slang_swizzle_swizzle(st
->Swizzle
, swizzle
);
304 assert(st
->File
!= PROGRAM_UNDEFINED
);
305 dst
->File
= st
->File
;
313 if (swizzle
!= SWIZZLE_XYZW
) {
314 dst
->WriteMask
= swizzle_to_writemask(swizzle
);
319 dst
->WriteMask
= WRITEMASK_X
<< GET_SWZ(st
->Swizzle
, 0);
322 dst
->WriteMask
= WRITEMASK_XY
;
325 dst
->WriteMask
= WRITEMASK_XYZ
;
328 dst
->WriteMask
= WRITEMASK_XYZW
;
331 ; /* error would have been caught above */
335 dst
->RelAddr
= relAddr
;
340 * Convert IR storage to an instruction src register.
343 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
345 const GLboolean relAddr
= st
->RelAddr
;
346 GLint index
= st
->Index
;
347 GLuint swizzle
= st
->Swizzle
;
349 /* if this is storage relative to some parent storage, walk up the tree */
354 /* an error should have been reported already */
357 assert(st
->Index
>= 0);
359 swizzle
= _slang_swizzle_swizzle(fix_swizzle(st
->Swizzle
), swizzle
);
362 assert(st
->File
>= 0);
363 #if 1 /* XXX temporary */
364 if (st
->File
== PROGRAM_UNDEFINED
) {
365 slang_ir_storage
*st0
= (slang_ir_storage
*) st
;
366 st0
->File
= PROGRAM_TEMPORARY
;
369 assert(st
->File
< PROGRAM_FILE_MAX
);
370 src
->File
= st
->File
;
375 swizzle
= fix_swizzle(swizzle
);
376 assert(GET_SWZ(swizzle
, 0) <= SWIZZLE_W
);
377 assert(GET_SWZ(swizzle
, 1) <= SWIZZLE_W
);
378 assert(GET_SWZ(swizzle
, 2) <= SWIZZLE_W
);
379 assert(GET_SWZ(swizzle
, 3) <= SWIZZLE_W
);
380 src
->Swizzle
= swizzle
;
382 src
->RelAddr
= relAddr
;
387 * Setup storage pointing to a scalar constant/literal.
390 constant_to_storage(slang_emit_info
*emitInfo
,
392 slang_ir_storage
*store
)
399 reg
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
402 memset(store
, 0, sizeof(*store
));
403 store
->File
= PROGRAM_CONSTANT
;
405 store
->Swizzle
= swizzle
;
410 * Add new instruction at end of given program.
411 * \param prog the program to append instruction onto
412 * \param opcode opcode for the new instruction
413 * \return pointer to the new instruction
415 static struct prog_instruction
*
416 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
418 struct gl_program
*prog
= emitInfo
->prog
;
419 struct prog_instruction
*inst
;
422 /* print prev inst */
423 if (prog
->NumInstructions
> 0) {
424 _mesa_print_instruction(prog
->Instructions
+ prog
->NumInstructions
- 1);
427 assert(prog
->NumInstructions
<= emitInfo
->MaxInstructions
);
429 if (prog
->NumInstructions
== emitInfo
->MaxInstructions
) {
430 /* grow the instruction buffer */
431 emitInfo
->MaxInstructions
+= 20;
433 _mesa_realloc_instructions(prog
->Instructions
,
434 prog
->NumInstructions
,
435 emitInfo
->MaxInstructions
);
436 if (!prog
->Instructions
) {
441 inst
= prog
->Instructions
+ prog
->NumInstructions
;
442 prog
->NumInstructions
++;
443 _mesa_init_instructions(inst
, 1);
444 inst
->Opcode
= opcode
;
445 inst
->BranchTarget
= -1; /* invalid */
447 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
448 _mesa_opcode_string(inst->Opcode));
454 static struct prog_instruction
*
455 emit_arl_load(slang_emit_info
*emitInfo
,
456 gl_register_file file
, GLint index
, GLuint swizzle
)
458 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ARL
);
460 inst
->SrcReg
[0].File
= file
;
461 inst
->SrcReg
[0].Index
= index
;
462 inst
->SrcReg
[0].Swizzle
= fix_swizzle(swizzle
);
463 inst
->DstReg
.File
= PROGRAM_ADDRESS
;
464 inst
->DstReg
.Index
= 0;
465 inst
->DstReg
.WriteMask
= WRITEMASK_X
;
472 * Emit a new instruction with given opcode, operands.
473 * At this point the instruction may have multiple indirect register
474 * loads/stores. We convert those into ARL loads and address-relative
475 * operands. See comments inside.
476 * At some point in the future we could directly emit indirectly addressed
477 * registers in Mesa GPU instructions.
479 static struct prog_instruction
*
480 emit_instruction(slang_emit_info
*emitInfo
,
481 gl_inst_opcode opcode
,
482 const slang_ir_storage
*dst
,
483 const slang_ir_storage
*src0
,
484 const slang_ir_storage
*src1
,
485 const slang_ir_storage
*src2
)
487 struct prog_instruction
*inst
;
488 GLuint numIndirect
= 0;
489 const slang_ir_storage
*src
[3];
490 slang_ir_storage newSrc
[3], newDst
;
494 isTemp
[0] = isTemp
[1] = isTemp
[2] = GL_FALSE
;
500 /* count up how many operands are indirect loads */
501 for (i
= 0; i
< 3; i
++) {
502 if (src
[i
] && src
[i
]->IsIndirect
)
505 if (dst
&& dst
->IsIndirect
)
508 /* Take special steps for indirect register loads.
509 * If we had multiple address registers this would be simpler.
510 * For example, this GLSL code:
511 * x[i] = y[j] + z[k];
512 * would translate into something like:
516 * ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
517 * But since we currently only have one address register we have to do this:
519 * MOV t1, TEMP[ADDR.x+9];
521 * MOV t2, TEMP[ADDR.x+4];
523 * ADD TEMP[ADDR.x+5], t1, t2;
524 * The code here figures this out...
526 if (numIndirect
> 0) {
527 for (i
= 0; i
< 3; i
++) {
528 if (src
[i
] && src
[i
]->IsIndirect
) {
529 /* load the ARL register with the indirect register */
530 emit_arl_load(emitInfo
,
531 src
[i
]->IndirectFile
,
532 src
[i
]->IndirectIndex
,
533 src
[i
]->IndirectSwizzle
);
535 if (numIndirect
> 1) {
536 /* Need to load src[i] into a temporary register */
537 slang_ir_storage srcRelAddr
;
538 alloc_local_temp(emitInfo
, &newSrc
[i
], src
[i
]->Size
);
541 /* set RelAddr flag on src register */
542 srcRelAddr
= *src
[i
];
543 srcRelAddr
.RelAddr
= GL_TRUE
;
544 srcRelAddr
.IsIndirect
= GL_FALSE
; /* not really needed */
546 /* MOV newSrc, srcRelAddr; */
547 inst
= emit_instruction(emitInfo
,
560 /* just rewrite the src[i] storage to be ARL-relative */
562 newSrc
[i
].RelAddr
= GL_TRUE
;
563 newSrc
[i
].IsIndirect
= GL_FALSE
; /* not really needed */
570 /* Take special steps for indirect dest register write */
571 if (dst
&& dst
->IsIndirect
) {
572 /* load the ARL register with the indirect register */
573 emit_arl_load(emitInfo
,
576 dst
->IndirectSwizzle
);
578 newDst
.RelAddr
= GL_TRUE
;
579 newDst
.IsIndirect
= GL_FALSE
;
583 /* OK, emit the instruction and its dst, src regs */
584 inst
= new_instruction(emitInfo
, opcode
);
589 storage_to_dst_reg(&inst
->DstReg
, dst
);
591 for (i
= 0; i
< 3; i
++) {
593 storage_to_src_reg(&inst
->SrcReg
[i
], src
[i
]);
596 /* Free any temp registers that we allocated above */
597 for (i
= 0; i
< 3; i
++) {
599 _slang_free_temp(emitInfo
->vt
, &newSrc
[i
]);
608 * Put a comment on the given instruction.
611 inst_comment(struct prog_instruction
*inst
, const char *comment
)
614 inst
->Comment
= _mesa_strdup(comment
);
620 * Return pointer to last instruction in program.
622 static struct prog_instruction
*
623 prev_instruction(slang_emit_info
*emitInfo
)
625 struct gl_program
*prog
= emitInfo
->prog
;
626 if (prog
->NumInstructions
== 0)
629 return prog
->Instructions
+ prog
->NumInstructions
- 1;
633 static struct prog_instruction
*
634 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
638 * Return an annotation string for given node's storage.
641 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
644 const slang_ir_storage
*st
= n
->Store
;
645 static char s
[100] = "";
648 return _mesa_strdup("");
651 case PROGRAM_CONSTANT
:
652 if (st
->Index
>= 0) {
653 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
654 if (st
->Swizzle
== SWIZZLE_NOOP
)
655 _mesa_snprintf(s
, sizeof(s
), "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
657 _mesa_snprintf(s
, sizeof(s
), "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
661 case PROGRAM_TEMPORARY
:
663 _mesa_snprintf(s
, sizeof(s
), "%s", (char *) n
->Var
->a_name
);
665 _mesa_snprintf(s
, sizeof(s
), "t[%d]", st
->Index
);
667 case PROGRAM_STATE_VAR
:
668 case PROGRAM_UNIFORM
:
669 _mesa_snprintf(s
, sizeof(s
), "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
671 case PROGRAM_VARYING
:
672 _mesa_snprintf(s
, sizeof(s
), "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
675 _mesa_snprintf(s
, sizeof(s
), "input[%d]", st
->Index
);
678 _mesa_snprintf(s
, sizeof(s
), "output[%d]", st
->Index
);
683 return _mesa_strdup(s
);
691 * Return an annotation string for an instruction.
694 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
695 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
698 const char *operator;
703 len
+= strlen(dstAnnot
);
705 dstAnnot
= _mesa_strdup("");
708 len
+= strlen(srcAnnot0
);
710 srcAnnot0
= _mesa_strdup("");
713 len
+= strlen(srcAnnot1
);
715 srcAnnot1
= _mesa_strdup("");
718 len
+= strlen(srcAnnot2
);
720 srcAnnot2
= _mesa_strdup("");
754 s
= (char *) malloc(len
);
755 _mesa_snprintf(s
, len
, "%s = %s %s %s %s", dstAnnot
,
756 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
771 * Emit an instruction that's just a comment.
773 static struct prog_instruction
*
774 emit_comment(slang_emit_info
*emitInfo
, const char *comment
)
776 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_NOP
);
778 inst_comment(inst
, comment
);
785 * Generate code for a simple arithmetic instruction.
786 * Either 1, 2 or 3 operands.
788 static struct prog_instruction
*
789 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
791 const slang_ir_info
*info
= _slang_ir_info(n
->Opcode
);
792 struct prog_instruction
*inst
;
796 assert(info
->InstOpcode
!= OPCODE_NOP
);
798 #if PEEPHOLE_OPTIMIZATIONS
799 /* Look for MAD opportunity */
800 if (info
->NumParams
== 2 &&
801 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
802 /* found pattern IR_ADD(IR_MUL(A, B), C) */
803 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
804 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
805 emit(emitInfo
, n
->Children
[1]); /* C */
806 if (!alloc_node_storage(emitInfo
, n
, -1)) { /* dest */
810 inst
= emit_instruction(emitInfo
,
813 n
->Children
[0]->Children
[0]->Store
,
814 n
->Children
[0]->Children
[1]->Store
,
815 n
->Children
[1]->Store
);
817 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
818 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
819 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
823 if (info
->NumParams
== 2 &&
824 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
825 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
826 emit(emitInfo
, n
->Children
[0]); /* A */
827 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
828 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
829 if (!alloc_node_storage(emitInfo
, n
, -1)) { /* dest */
833 inst
= emit_instruction(emitInfo
,
836 n
->Children
[1]->Children
[0]->Store
,
837 n
->Children
[1]->Children
[1]->Store
,
838 n
->Children
[0]->Store
);
840 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
841 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
842 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
847 /* gen code for children, may involve temp allocation */
848 for (i
= 0; i
< info
->NumParams
; i
++) {
849 emit(emitInfo
, n
->Children
[i
]);
850 if (!n
->Children
[i
] || !n
->Children
[i
]->Store
) {
857 if (!alloc_node_storage(emitInfo
, n
, -1)) {
861 inst
= emit_instruction(emitInfo
,
864 (info
->NumParams
> 0 ? n
->Children
[0]->Store
: NULL
),
865 (info
->NumParams
> 1 ? n
->Children
[1]->Store
: NULL
),
866 (info
->NumParams
> 2 ? n
->Children
[2]->Store
: NULL
)
870 for (i
= 0; i
< info
->NumParams
; i
++)
871 free_node_storage(emitInfo
->vt
, n
->Children
[i
]);
878 * Emit code for == and != operators. These could normally be handled
879 * by emit_arith() except we need to be able to handle structure comparisons.
881 static struct prog_instruction
*
882 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
884 struct prog_instruction
*inst
= NULL
;
887 assert(n
->Opcode
== IR_EQUAL
|| n
->Opcode
== IR_NOTEQUAL
);
889 /* gen code for children */
890 emit(emitInfo
, n
->Children
[0]);
891 emit(emitInfo
, n
->Children
[1]);
893 if (n
->Children
[0]->Store
->Size
!= n
->Children
[1]->Store
->Size
) {
894 /* XXX this error should have been caught in slang_codegen.c */
895 slang_info_log_error(emitInfo
->log
, "invalid operands to == or !=");
900 /* final result is 1 bool */
901 if (!alloc_node_storage(emitInfo
, n
, 1))
904 size
= n
->Children
[0]->Store
->Size
;
907 gl_inst_opcode opcode
= n
->Opcode
== IR_EQUAL
? OPCODE_SEQ
: OPCODE_SNE
;
908 inst
= emit_instruction(emitInfo
,
911 n
->Children
[0]->Store
,
912 n
->Children
[1]->Store
,
915 else if (size
<= 4) {
916 /* compare two vectors.
917 * Unfortunately, there's no instruction to compare vectors and
918 * return a scalar result. Do it with some compare and dot product
922 gl_inst_opcode dotOp
;
923 slang_ir_storage tempStore
;
925 if (!alloc_local_temp(emitInfo
, &tempStore
, 4)) {
933 swizzle
= SWIZZLE_XYZW
;
935 else if (size
== 3) {
937 swizzle
= SWIZZLE_XYZW
;
941 dotOp
= OPCODE_DP3
; /* XXX use OPCODE_DP2 eventually */
942 swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
);
945 /* Compute inequality (temp = (A != B)) */
946 inst
= emit_instruction(emitInfo
,
949 n
->Children
[0]->Store
,
950 n
->Children
[1]->Store
,
955 inst_comment(inst
, "Compare values");
957 /* Compute val = DOT(temp, temp) (reduction) */
958 inst
= emit_instruction(emitInfo
,
967 inst
->SrcReg
[0].Swizzle
= inst
->SrcReg
[1].Swizzle
= swizzle
; /*override*/
968 inst_comment(inst
, "Reduce vec to bool");
970 _slang_free_temp(emitInfo
->vt
, &tempStore
); /* free temp */
972 if (n
->Opcode
== IR_EQUAL
) {
973 /* compute val = !val.x with SEQ val, val, 0; */
974 slang_ir_storage zero
;
975 constant_to_storage(emitInfo
, 0.0, &zero
);
976 inst
= emit_instruction(emitInfo
,
985 inst_comment(inst
, "Invert true/false");
989 /* size > 4, struct or array compare.
990 * XXX this won't work reliably for structs with padding!!
992 GLint i
, num
= (n
->Children
[0]->Store
->Size
+ 3) / 4;
993 slang_ir_storage accTemp
, sneTemp
;
995 if (!alloc_local_temp(emitInfo
, &accTemp
, 4))
998 if (!alloc_local_temp(emitInfo
, &sneTemp
, 4))
1001 for (i
= 0; i
< num
; i
++) {
1002 slang_ir_storage srcStore0
= *n
->Children
[0]->Store
;
1003 slang_ir_storage srcStore1
= *n
->Children
[1]->Store
;
1004 srcStore0
.Index
+= i
;
1005 srcStore1
.Index
+= i
;
1008 /* SNE accTemp, left[i], right[i] */
1009 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
1010 &accTemp
, /* dest */
1017 inst_comment(inst
, "Begin struct/array comparison");
1020 /* SNE sneTemp, left[i], right[i] */
1021 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
1022 &sneTemp
, /* dest */
1029 /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
1030 inst
= emit_instruction(emitInfo
, OPCODE_ADD
,
1031 &accTemp
, /* dest */
1041 /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
1042 inst
= emit_instruction(emitInfo
, OPCODE_DP4
,
1050 inst_comment(inst
, "End struct/array comparison");
1052 if (n
->Opcode
== IR_EQUAL
) {
1053 /* compute tmp.x = !tmp.x via tmp.x = (tmp.x == 0) */
1054 slang_ir_storage zero
;
1055 constant_to_storage(emitInfo
, 0.0, &zero
);
1056 inst
= emit_instruction(emitInfo
, OPCODE_SEQ
,
1057 n
->Store
, /* dest */
1064 inst_comment(inst
, "Invert true/false");
1067 _slang_free_temp(emitInfo
->vt
, &accTemp
);
1068 _slang_free_temp(emitInfo
->vt
, &sneTemp
);
1072 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1073 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1081 * Generate code for an IR_CLAMP instruction.
1083 static struct prog_instruction
*
1084 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1086 struct prog_instruction
*inst
;
1087 slang_ir_node tmpNode
;
1089 assert(n
->Opcode
== IR_CLAMP
);
1095 inst
= emit(emitInfo
, n
->Children
[0]);
1097 /* If lower limit == 0.0 and upper limit == 1.0,
1098 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1100 * emit OPCODE_MIN, OPCODE_MAX sequence.
1103 /* XXX this isn't quite finished yet */
1104 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
1105 n
->Children
[1]->Value
[0] == 0.0 &&
1106 n
->Children
[1]->Value
[1] == 0.0 &&
1107 n
->Children
[1]->Value
[2] == 0.0 &&
1108 n
->Children
[1]->Value
[3] == 0.0 &&
1109 n
->Children
[2]->Opcode
== IR_FLOAT
&&
1110 n
->Children
[2]->Value
[0] == 1.0 &&
1111 n
->Children
[2]->Value
[1] == 1.0 &&
1112 n
->Children
[2]->Value
[2] == 1.0 &&
1113 n
->Children
[2]->Value
[3] == 1.0) {
1115 inst
= prev_instruction(prog
);
1117 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
1118 /* and prev instruction's DstReg matches n->Children[0]->Store */
1119 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
1120 n
->Store
= n
->Children
[0]->Store
;
1128 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1131 emit(emitInfo
, n
->Children
[1]);
1132 emit(emitInfo
, n
->Children
[2]);
1134 /* Some GPUs don't allow reading from output registers. So if the
1135 * dest for this clamp() is an output reg, we can't use that reg for
1136 * the intermediate result. Use a temp register instead.
1138 memset(&tmpNode
, 0, sizeof(tmpNode
));
1139 if (!alloc_node_storage(emitInfo
, &tmpNode
, n
->Store
->Size
)) {
1143 /* tmp = max(ch[0], ch[1]) */
1144 inst
= emit_instruction(emitInfo
, OPCODE_MAX
,
1145 tmpNode
.Store
, /* dest */
1146 n
->Children
[0]->Store
,
1147 n
->Children
[1]->Store
,
1153 /* n->dest = min(tmp, ch[2]) */
1154 inst
= emit_instruction(emitInfo
, OPCODE_MIN
,
1155 n
->Store
, /* dest */
1157 n
->Children
[2]->Store
,
1160 free_node_storage(emitInfo
->vt
, &tmpNode
);
1166 static struct prog_instruction
*
1167 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1169 /* Implement as MOV dst, -src; */
1170 /* XXX we could look at the previous instruction and in some circumstances
1171 * modify it to accomplish the negation.
1173 struct prog_instruction
*inst
;
1175 emit(emitInfo
, n
->Children
[0]);
1177 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1180 inst
= emit_instruction(emitInfo
,
1182 n
->Store
, /* dest */
1183 n
->Children
[0]->Store
,
1187 inst
->SrcReg
[0].Negate
= NEGATE_XYZW
;
1193 static struct prog_instruction
*
1194 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
1198 /* XXX this fails in loop tail code - investigate someday */
1199 assert(_slang_label_get_location(n
->Label
) < 0);
1200 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1203 if (_slang_label_get_location(n
->Label
) < 0)
1204 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1212 * Emit code for a function call.
1213 * Note that for each time a function is called, we emit the function's
1214 * body code again because the set of available registers may be different.
1216 static struct prog_instruction
*
1217 emit_fcall(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1219 struct gl_program
*progSave
;
1220 struct prog_instruction
*inst
;
1221 GLuint subroutineId
;
1224 assert(n
->Opcode
== IR_CALL
);
1227 /* save/push cur program */
1228 maxInstSave
= emitInfo
->MaxInstructions
;
1229 progSave
= emitInfo
->prog
;
1231 emitInfo
->prog
= new_subroutine(emitInfo
, &subroutineId
);
1232 emitInfo
->MaxInstructions
= emitInfo
->prog
->NumInstructions
;
1234 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1237 if (emitInfo
->EmitBeginEndSub
) {
1238 /* BGNSUB isn't a real instruction.
1239 * We require a label (i.e. "foobar:") though, if we're going to
1240 * print the program in the NV format. The BNGSUB instruction is
1241 * really just a NOP to attach the label to.
1243 inst
= new_instruction(emitInfo
, OPCODE_BGNSUB
);
1247 inst_comment(inst
, n
->Label
->Name
);
1250 /* body of function: */
1251 emit(emitInfo
, n
->Children
[0]);
1252 n
->Store
= n
->Children
[0]->Store
;
1254 /* add RET instruction now, if needed */
1255 inst
= prev_instruction(emitInfo
);
1256 if (inst
&& inst
->Opcode
!= OPCODE_RET
) {
1257 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1263 if (emitInfo
->EmitBeginEndSub
) {
1264 inst
= new_instruction(emitInfo
, OPCODE_ENDSUB
);
1268 inst_comment(inst
, n
->Label
->Name
);
1271 /* pop/restore cur program */
1272 emitInfo
->prog
= progSave
;
1273 emitInfo
->MaxInstructions
= maxInstSave
;
1275 /* emit the function call */
1276 inst
= new_instruction(emitInfo
, OPCODE_CAL
);
1280 /* The branch target is just the subroutine number (changed later) */
1281 inst
->BranchTarget
= subroutineId
;
1282 inst_comment(inst
, n
->Label
->Name
);
1283 assert(inst
->BranchTarget
>= 0);
1290 * Emit code for a 'return' statement.
1292 static struct prog_instruction
*
1293 emit_return(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1295 struct prog_instruction
*inst
;
1297 assert(n
->Opcode
== IR_RETURN
);
1299 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1301 inst
->DstReg
.CondMask
= COND_TR
; /* always return */
1307 static struct prog_instruction
*
1308 emit_kill(slang_emit_info
*emitInfo
)
1310 struct gl_fragment_program
*fp
;
1311 struct prog_instruction
*inst
;
1312 /* NV-KILL - discard fragment depending on condition code.
1313 * Note that ARB-KILL depends on sign of vector operand.
1315 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
1319 inst
->DstReg
.CondMask
= COND_TR
; /* always kill */
1321 assert(emitInfo
->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
);
1322 fp
= (struct gl_fragment_program
*) emitInfo
->prog
;
1323 fp
->UsesKill
= GL_TRUE
;
1329 static struct prog_instruction
*
1330 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1332 struct prog_instruction
*inst
;
1333 gl_inst_opcode opcode
;
1334 GLboolean shadow
= GL_FALSE
;
1336 switch (n
->Opcode
) {
1338 opcode
= OPCODE_TEX
;
1341 opcode
= OPCODE_TEX
;
1345 opcode
= OPCODE_TXB
;
1348 opcode
= OPCODE_TXB
;
1352 opcode
= OPCODE_TXP
;
1355 opcode
= OPCODE_TXP
;
1359 _mesa_problem(NULL
, "Bad IR TEX code");
1363 if (n
->Children
[0]->Opcode
== IR_ELEMENT
) {
1364 /* array is the sampler (a uniform which'll indicate the texture unit) */
1365 assert(n
->Children
[0]->Children
[0]->Store
);
1366 assert(n
->Children
[0]->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1368 emit(emitInfo
, n
->Children
[0]);
1370 n
->Children
[0]->Var
= n
->Children
[0]->Children
[0]->Var
;
1372 /* this is the sampler (a uniform which'll indicate the texture unit) */
1373 assert(n
->Children
[0]->Store
);
1374 assert(n
->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1377 /* emit code for the texcoord operand */
1378 (void) emit(emitInfo
, n
->Children
[1]);
1380 /* alloc storage for result of texture fetch */
1381 if (!alloc_node_storage(emitInfo
, n
, 4))
1384 /* emit TEX instruction; Child[1] is the texcoord */
1385 inst
= emit_instruction(emitInfo
,
1388 n
->Children
[1]->Store
,
1395 inst
->TexShadow
= shadow
;
1397 /* Store->Index is the uniform/sampler index */
1398 assert(n
->Children
[0]->Store
->Index
>= 0);
1399 inst
->TexSrcUnit
= n
->Children
[0]->Store
->Index
;
1400 inst
->TexSrcTarget
= n
->Children
[0]->Store
->TexTarget
;
1402 /* mark the sampler as being used */
1403 _mesa_use_uniform(emitInfo
->prog
->Parameters
,
1404 (char *) n
->Children
[0]->Var
->a_name
);
1413 static struct prog_instruction
*
1414 emit_copy(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1416 struct prog_instruction
*inst
;
1418 assert(n
->Opcode
== IR_COPY
);
1421 emit(emitInfo
, n
->Children
[0]);
1422 if (!n
->Children
[0]->Store
|| n
->Children
[0]->Store
->Index
< 0) {
1423 /* an error should have been already recorded */
1428 assert(n
->Children
[1]);
1429 inst
= emit(emitInfo
, n
->Children
[1]);
1431 if (!n
->Children
[1]->Store
|| n
->Children
[1]->Store
->Index
< 0) {
1432 if (!emitInfo
->log
->text
&& !emitInfo
->UnresolvedFunctions
) {
1433 /* XXX this error should have been caught in slang_codegen.c */
1434 slang_info_log_error(emitInfo
->log
, "invalid assignment");
1439 assert(n
->Children
[1]->Store
->Index
>= 0);
1441 /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1443 n
->Store
= n
->Children
[0]->Store
;
1445 if (n
->Store
->File
== PROGRAM_SAMPLER
) {
1446 /* no code generated for sampler assignments,
1447 * just copy the sampler index/target at compile time.
1449 n
->Store
->Index
= n
->Children
[1]->Store
->Index
;
1450 n
->Store
->TexTarget
= n
->Children
[1]->Store
->TexTarget
;
1454 #if PEEPHOLE_OPTIMIZATIONS
1456 (n
->Children
[1]->Opcode
!= IR_SWIZZLE
) &&
1457 _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
) &&
1458 (inst
->DstReg
.File
== n
->Children
[1]->Store
->File
) &&
1459 (inst
->DstReg
.Index
== n
->Children
[1]->Store
->Index
) &&
1460 !n
->Children
[0]->Store
->IsIndirect
&&
1461 n
->Children
[0]->Store
->Size
<= 4) {
1462 /* Peephole optimization:
1463 * The Right-Hand-Side has its results in a temporary place.
1464 * Modify the RHS (and the prev instruction) to store its results
1465 * in the destination specified by n->Children[0].
1466 * Then, this MOVE is a no-op.
1474 /* fixup the previous instruction (which stored the RHS result) */
1475 assert(n
->Children
[0]->Store
->Index
>= 0);
1476 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
);
1482 if (n
->Children
[0]->Store
->Size
> 4) {
1483 /* move matrix/struct etc (block of registers) */
1484 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1485 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1486 GLint size
= srcStore
.Size
;
1487 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1491 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1499 inst_comment(inst
, "IR_COPY block");
1506 /* single register move */
1507 char *srcAnnot
, *dstAnnot
;
1508 assert(n
->Children
[0]->Store
->Index
>= 0);
1509 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1510 n
->Children
[0]->Store
, /* dest */
1511 n
->Children
[1]->Store
,
1517 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1518 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1519 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1520 srcAnnot
, NULL
, NULL
);
1522 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1529 * An IR_COND node wraps a boolean expression which is used by an
1530 * IF or WHILE test. This is where we'll set condition codes, if needed.
1532 static struct prog_instruction
*
1533 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1535 struct prog_instruction
*inst
;
1537 assert(n
->Opcode
== IR_COND
);
1539 if (!n
->Children
[0])
1542 /* emit code for the expression */
1543 inst
= emit(emitInfo
, n
->Children
[0]);
1545 if (!n
->Children
[0]->Store
) {
1546 /* error recovery */
1550 assert(n
->Children
[0]->Store
);
1551 /*assert(n->Children[0]->Store->Size == 1);*/
1553 if (emitInfo
->EmitCondCodes
) {
1555 n
->Children
[0]->Store
&&
1556 inst
->DstReg
.File
== n
->Children
[0]->Store
->File
&&
1557 inst
->DstReg
.Index
== n
->Children
[0]->Store
->Index
) {
1558 /* The previous instruction wrote to the register who's value
1559 * we're testing. Just fix that instruction so that the
1560 * condition codes are computed.
1562 inst
->CondUpdate
= GL_TRUE
;
1563 n
->Store
= n
->Children
[0]->Store
;
1567 /* This'll happen for things like "if (i) ..." where no code
1568 * is normally generated for the expression "i".
1569 * Generate a move instruction just to set condition codes.
1571 if (!alloc_node_storage(emitInfo
, n
, 1))
1573 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1574 n
->Store
, /* dest */
1575 n
->Children
[0]->Store
,
1581 inst
->CondUpdate
= GL_TRUE
;
1582 inst_comment(inst
, "COND expr");
1583 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1588 /* No-op: the boolean result of the expression is in a regular reg */
1589 n
->Store
= n
->Children
[0]->Store
;
1598 static struct prog_instruction
*
1599 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1601 static const struct {
1602 gl_inst_opcode op
, opNot
;
1604 { OPCODE_SLT
, OPCODE_SGE
},
1605 { OPCODE_SLE
, OPCODE_SGT
},
1606 { OPCODE_SGT
, OPCODE_SLE
},
1607 { OPCODE_SGE
, OPCODE_SLT
},
1608 { OPCODE_SEQ
, OPCODE_SNE
},
1609 { OPCODE_SNE
, OPCODE_SEQ
},
1612 struct prog_instruction
*inst
;
1613 slang_ir_storage zero
;
1617 inst
= emit(emitInfo
, n
->Children
[0]);
1619 #if PEEPHOLE_OPTIMIZATIONS
1621 /* if the prev instruction was a comparison instruction, invert it */
1622 for (i
= 0; operators
[i
].op
; i
++) {
1623 if (inst
->Opcode
== operators
[i
].op
) {
1624 inst
->Opcode
= operators
[i
].opNot
;
1625 n
->Store
= n
->Children
[0]->Store
;
1632 /* else, invert using SEQ (v = v == 0) */
1633 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1636 constant_to_storage(emitInfo
, 0.0, &zero
);
1637 inst
= emit_instruction(emitInfo
,
1640 n
->Children
[0]->Store
,
1646 inst_comment(inst
, "NOT");
1648 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1654 static struct prog_instruction
*
1655 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1657 struct gl_program
*prog
= emitInfo
->prog
;
1658 GLuint ifInstLoc
, elseInstLoc
= 0;
1659 GLuint condWritemask
= 0;
1661 /* emit condition expression code */
1663 struct prog_instruction
*inst
;
1664 inst
= emit(emitInfo
, n
->Children
[0]);
1665 if (emitInfo
->EmitCondCodes
) {
1667 /* error recovery */
1670 condWritemask
= inst
->DstReg
.WriteMask
;
1674 if (!n
->Children
[0]->Store
)
1678 assert(n
->Children
[0]->Store
->Size
== 1); /* a bool! */
1681 ifInstLoc
= prog
->NumInstructions
;
1682 if (emitInfo
->EmitHighLevelInstructions
) {
1683 if (emitInfo
->EmitCondCodes
) {
1684 /* IF condcode THEN ... */
1685 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1689 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1690 /* only test the cond code (1 of 4) that was updated by the
1691 * previous instruction.
1693 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1696 struct prog_instruction
*inst
;
1698 /* IF src[0] THEN ... */
1699 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1701 n
->Children
[0]->Store
, /* op0 */
1710 /* conditional jump to else, or endif */
1711 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1715 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1716 inst_comment(ifInst
, "if zero");
1717 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1721 emit(emitInfo
, n
->Children
[1]);
1723 if (n
->Children
[2]) {
1724 /* have else body */
1725 elseInstLoc
= prog
->NumInstructions
;
1726 if (emitInfo
->EmitHighLevelInstructions
) {
1727 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ELSE
);
1731 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
- 1;
1734 /* jump to endif instruction */
1735 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1739 inst_comment(inst
, "else");
1740 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1741 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1743 emit(emitInfo
, n
->Children
[2]);
1747 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1750 if (emitInfo
->EmitHighLevelInstructions
) {
1751 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1758 /* point ELSE instruction BranchTarget at ENDIF */
1759 if (emitInfo
->EmitHighLevelInstructions
) {
1760 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
- 1;
1763 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
;
1770 static struct prog_instruction
*
1771 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1773 struct gl_program
*prog
= emitInfo
->prog
;
1774 struct prog_instruction
*endInst
;
1775 GLuint beginInstLoc
, tailInstLoc
, endInstLoc
;
1778 /* emit OPCODE_BGNLOOP */
1779 beginInstLoc
= prog
->NumInstructions
;
1780 if (emitInfo
->EmitHighLevelInstructions
) {
1781 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1788 emit(emitInfo
, n
->Children
[0]);
1791 tailInstLoc
= prog
->NumInstructions
;
1792 if (n
->Children
[1]) {
1793 if (emitInfo
->EmitComments
)
1794 emit_comment(emitInfo
, "Loop tail code:");
1795 emit(emitInfo
, n
->Children
[1]);
1798 endInstLoc
= prog
->NumInstructions
;
1799 if (emitInfo
->EmitHighLevelInstructions
) {
1800 /* emit OPCODE_ENDLOOP */
1801 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1807 /* emit unconditional BRA-nch */
1808 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1812 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1814 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1815 endInst
->BranchTarget
= beginInstLoc
;
1817 if (emitInfo
->EmitHighLevelInstructions
) {
1818 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1819 prog
->Instructions
[beginInstLoc
].BranchTarget
= prog
->NumInstructions
-1;
1822 /* Done emitting loop code. Now walk over the loop's linked list of
1823 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1824 * will point to the corresponding ENDLOOP instruction.
1826 for (ir
= n
->List
; ir
; ir
= ir
->List
) {
1827 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1828 assert(inst
->BranchTarget
< 0);
1829 if (ir
->Opcode
== IR_BREAK
||
1830 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1831 assert(inst
->Opcode
== OPCODE_BRK
||
1832 inst
->Opcode
== OPCODE_BRA
);
1833 /* go to instruction at end of loop */
1834 if (emitInfo
->EmitHighLevelInstructions
) {
1835 inst
->BranchTarget
= endInstLoc
;
1838 inst
->BranchTarget
= endInstLoc
+ 1;
1842 assert(ir
->Opcode
== IR_CONT
||
1843 ir
->Opcode
== IR_CONT_IF_TRUE
);
1844 assert(inst
->Opcode
== OPCODE_CONT
||
1845 inst
->Opcode
== OPCODE_BRA
);
1846 /* go to instruction at tail of loop */
1847 inst
->BranchTarget
= endInstLoc
;
1855 * Unconditional "continue" or "break" statement.
1856 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1858 static struct prog_instruction
*
1859 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1861 gl_inst_opcode opcode
;
1862 struct prog_instruction
*inst
;
1864 if (n
->Opcode
== IR_CONT
) {
1865 /* we need to execute the loop's tail code before doing CONT */
1867 assert(n
->Parent
->Opcode
== IR_LOOP
);
1868 if (n
->Parent
->Children
[1]) {
1869 /* emit tail code */
1870 if (emitInfo
->EmitComments
) {
1871 emit_comment(emitInfo
, "continue - tail code:");
1873 emit(emitInfo
, n
->Parent
->Children
[1]);
1877 /* opcode selection */
1878 if (emitInfo
->EmitHighLevelInstructions
) {
1879 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1882 opcode
= OPCODE_BRA
;
1884 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1885 inst
= new_instruction(emitInfo
, opcode
);
1887 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1894 * Conditional "continue" or "break" statement.
1895 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1897 static struct prog_instruction
*
1898 emit_cont_break_if_true(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1900 struct prog_instruction
*inst
;
1902 assert(n
->Opcode
== IR_CONT_IF_TRUE
||
1903 n
->Opcode
== IR_BREAK_IF_TRUE
);
1905 /* evaluate condition expr, setting cond codes */
1906 inst
= emit(emitInfo
, n
->Children
[0]);
1907 if (emitInfo
->EmitCondCodes
) {
1909 inst
->CondUpdate
= GL_TRUE
;
1912 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1914 /* opcode selection */
1915 if (emitInfo
->EmitHighLevelInstructions
) {
1916 const gl_inst_opcode opcode
1917 = (n
->Opcode
== IR_CONT_IF_TRUE
) ? OPCODE_CONT
: OPCODE_BRK
;
1918 if (emitInfo
->EmitCondCodes
) {
1919 /* Get the writemask from the previous instruction which set
1920 * the condcodes. Use that writemask as the CondSwizzle.
1922 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1923 inst
= new_instruction(emitInfo
, opcode
);
1925 inst
->DstReg
.CondMask
= COND_NE
;
1926 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1936 ifInstLoc
= emitInfo
->prog
->NumInstructions
;
1937 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1939 n
->Children
[0]->Store
,
1945 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1947 inst
= new_instruction(emitInfo
, opcode
);
1951 inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1956 emitInfo
->prog
->Instructions
[ifInstLoc
].BranchTarget
1957 = emitInfo
->prog
->NumInstructions
- 1;
1962 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1963 assert(emitInfo
->EmitCondCodes
);
1964 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1966 inst
->DstReg
.CondMask
= COND_NE
;
1967 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1975 * Return the size of a swizzle mask given that some swizzle components
1976 * may be NIL/undefined. For example:
1977 * swizzle_size(".zzxx") = 4
1978 * swizzle_size(".xy??") = 2
1979 * swizzle_size(".w???") = 1
1982 swizzle_size(GLuint swizzle
)
1985 for (i
= 0; i
< 4; i
++) {
1986 if (GET_SWZ(swizzle
, i
) == SWIZZLE_NIL
)
1993 static struct prog_instruction
*
1994 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1996 struct prog_instruction
*inst
;
1998 inst
= emit(emitInfo
, n
->Children
[0]);
2000 if (!n
->Store
->Parent
) {
2001 /* this covers a case such as "(b ? p : q).x" */
2002 n
->Store
->Parent
= n
->Children
[0]->Store
;
2003 assert(n
->Store
->Parent
);
2007 const GLuint swizzle
= n
->Store
->Swizzle
;
2008 /* new storage is parent storage with updated Swizzle + Size fields */
2009 _slang_copy_ir_storage(n
->Store
, n
->Store
->Parent
);
2010 /* Apply this node's swizzle to parent's storage */
2011 n
->Store
->Swizzle
= _slang_swizzle_swizzle(n
->Store
->Swizzle
, swizzle
);
2013 n
->Store
->Size
= swizzle_size(n
->Store
->Swizzle
);
2016 assert(!n
->Store
->Parent
);
2017 assert(n
->Store
->Index
>= 0);
2024 * Dereference array element: element == array[index]
2025 * This basically involves emitting code for computing the array index
2026 * and updating the node/element's storage info.
2028 static struct prog_instruction
*
2029 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2031 slang_ir_storage
*arrayStore
, *indexStore
;
2032 const int elemSize
= n
->Store
->Size
; /* number of floats */
2033 const GLint elemSizeVec
= (elemSize
+ 3) / 4; /* number of vec4 */
2034 struct prog_instruction
*inst
;
2036 assert(n
->Opcode
== IR_ELEMENT
);
2037 assert(elemSize
> 0);
2039 /* special case for built-in state variables, like light state */
2041 slang_ir_storage
*root
= n
->Store
;
2042 assert(!root
->Parent
);
2043 while (root
->Parent
)
2044 root
= root
->Parent
;
2046 if (root
->File
== PROGRAM_STATE_VAR
) {
2049 _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2055 n
->Store
->Index
= index
;
2056 return NULL
; /* all done */
2061 /* do codegen for array itself */
2062 emit(emitInfo
, n
->Children
[0]);
2063 arrayStore
= n
->Children
[0]->Store
;
2065 /* The initial array element storage is the array's storage,
2066 * then modified below.
2068 _slang_copy_ir_storage(n
->Store
, arrayStore
);
2071 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
2072 /* Constant array index */
2073 const GLint element
= (GLint
) n
->Children
[1]->Value
[0];
2075 /* this element's storage is the array's storage, plus constant offset */
2076 n
->Store
->Index
+= elemSizeVec
* element
;
2079 /* Variable array index */
2081 /* do codegen for array index expression */
2082 emit(emitInfo
, n
->Children
[1]);
2083 indexStore
= n
->Children
[1]->Store
;
2085 if (indexStore
->IsIndirect
) {
2086 /* need to put the array index into a temporary since we can't
2087 * directly support a[b[i]] constructs.
2091 /*indexStore = tempstore();*/
2096 /* need to multiply array index by array element size */
2097 struct prog_instruction
*inst
;
2098 slang_ir_storage
*indexTemp
;
2099 slang_ir_storage elemSizeStore
;
2101 /* allocate 1 float indexTemp */
2102 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2103 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2105 /* allocate a constant containing the element size */
2106 constant_to_storage(emitInfo
, (float) elemSizeVec
, &elemSizeStore
);
2108 /* multiply array index by element size */
2109 inst
= emit_instruction(emitInfo
,
2111 indexTemp
, /* dest */
2112 indexStore
, /* the index */
2119 indexStore
= indexTemp
;
2122 if (arrayStore
->IsIndirect
) {
2123 /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
2124 /* Need to add indexStore to arrayStore->Indirect store */
2125 slang_ir_storage indirectArray
;
2126 slang_ir_storage
*indexTemp
;
2128 _slang_init_ir_storage(&indirectArray
,
2129 arrayStore
->IndirectFile
,
2130 arrayStore
->IndirectIndex
,
2132 arrayStore
->IndirectSwizzle
);
2134 /* allocate 1 float indexTemp */
2135 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2136 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2138 inst
= emit_instruction(emitInfo
,
2140 indexTemp
, /* dest */
2141 indexStore
, /* the index */
2142 &indirectArray
, /* indirect array base */
2148 indexStore
= indexTemp
;
2151 /* update the array element storage info */
2152 n
->Store
->IsIndirect
= GL_TRUE
;
2153 n
->Store
->IndirectFile
= indexStore
->File
;
2154 n
->Store
->IndirectIndex
= indexStore
->Index
;
2155 n
->Store
->IndirectSwizzle
= indexStore
->Swizzle
;
2158 n
->Store
->Size
= elemSize
;
2159 n
->Store
->Swizzle
= _slang_var_swizzle(elemSize
, 0);
2161 return NULL
; /* no instruction */
2166 * Resolve storage for accessing a structure field.
2168 static struct prog_instruction
*
2169 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2171 slang_ir_storage
*root
= n
->Store
;
2172 GLint fieldOffset
, fieldSize
;
2174 assert(n
->Opcode
== IR_FIELD
);
2176 assert(!root
->Parent
);
2177 while (root
->Parent
)
2178 root
= root
->Parent
;
2180 /* If this is the field of a state var, allocate constant/uniform
2181 * storage for it now if we haven't already.
2182 * Note that we allocate storage (uniform/constant slots) for state
2183 * variables here rather than at declaration time so we only allocate
2184 * space for the ones that we actually use!
2186 if (root
->File
== PROGRAM_STATE_VAR
) {
2188 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2190 slang_info_log_error(emitInfo
->log
, "Error parsing state variable");
2194 root
->Index
= index
;
2195 return NULL
; /* all done */
2199 /* do codegen for struct */
2200 emit(emitInfo
, n
->Children
[0]);
2201 assert(n
->Children
[0]->Store
->Index
>= 0);
2204 fieldOffset
= n
->Store
->Index
;
2205 fieldSize
= n
->Store
->Size
;
2207 _slang_copy_ir_storage(n
->Store
, n
->Children
[0]->Store
);
2209 n
->Store
->Index
= n
->Children
[0]->Store
->Index
+ fieldOffset
/ 4;
2210 n
->Store
->Size
= fieldSize
;
2212 switch (fieldSize
) {
2215 GLint swz
= fieldOffset
% 4;
2216 n
->Store
->Swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
2220 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2221 SWIZZLE_NIL
, SWIZZLE_NIL
);
2224 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2225 SWIZZLE_Z
, SWIZZLE_NIL
);
2228 n
->Store
->Swizzle
= SWIZZLE_XYZW
;
2231 assert(n
->Store
->Index
>= 0);
2233 return NULL
; /* no instruction */
2238 * Emit code for a variable declaration.
2239 * This usually doesn't result in any code generation, but just
2240 * memory allocation.
2242 static struct prog_instruction
*
2243 emit_var_decl(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2246 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2247 assert(n
->Store
->Size
> 0);
2248 /*assert(n->Store->Index < 0);*/
2250 if (!n
->Var
|| n
->Var
->isTemp
) {
2251 /* a nameless/temporary variable, will be freed after first use */
2253 if (n
->Store
->Index
< 0 && !_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
2254 slang_info_log_error(emitInfo
->log
,
2255 "Ran out of registers, too many temporaries");
2260 /* a regular variable */
2261 _slang_add_variable(emitInfo
->vt
, n
->Var
);
2262 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
2263 slang_info_log_error(emitInfo
->log
,
2264 "Ran out of registers, too many variables");
2268 printf("IR_VAR_DECL %s %d store %p\n",
2269 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2271 assert(n
->Var
->store
== n
->Store
);
2273 if (emitInfo
->EmitComments
) {
2274 /* emit NOP with comment describing the variable's storage location */
2276 _mesa_snprintf(s
, sizeof(s
), "TEMP[%d]%s = variable %s (size %d)",
2278 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
2279 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
2281 emit_comment(emitInfo
, s
);
2288 * Emit code for a reference to a variable.
2289 * Actually, no code is generated but we may do some memory allocation.
2290 * In particular, state vars (uniforms) are allocated on an as-needed basis.
2292 static struct prog_instruction
*
2293 emit_var_ref(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2296 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2298 if (n
->Store
->File
== PROGRAM_STATE_VAR
&& n
->Store
->Index
< 0) {
2300 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2304 /* XXX isn't this really an out of memory/resources error? */
2305 _mesa_snprintf(s
, sizeof(s
), "Undefined variable '%s'",
2306 (char *) n
->Var
->a_name
);
2307 slang_info_log_error(emitInfo
->log
, s
);
2311 n
->Store
->Index
= index
;
2313 else if (n
->Store
->File
== PROGRAM_UNIFORM
||
2314 n
->Store
->File
== PROGRAM_SAMPLER
) {
2315 /* mark var as used */
2316 _mesa_use_uniform(emitInfo
->prog
->Parameters
, (char *) n
->Var
->a_name
);
2318 else if (n
->Store
->File
== PROGRAM_INPUT
) {
2319 assert(n
->Store
->Index
>= 0);
2320 emitInfo
->prog
->InputsRead
|= (1 << n
->Store
->Index
);
2323 if (n
->Store
->Index
< 0) {
2324 /* probably ran out of registers */
2327 assert(n
->Store
->Size
> 0);
2333 static struct prog_instruction
*
2334 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2336 struct prog_instruction
*inst
;
2340 if (emitInfo
->log
->error_flag
) {
2345 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
2347 inst
->Comment
= _mesa_strdup(n
->Comment
);
2352 switch (n
->Opcode
) {
2354 /* sequence of two sub-trees */
2355 assert(n
->Children
[0]);
2356 assert(n
->Children
[1]);
2357 emit(emitInfo
, n
->Children
[0]);
2358 if (emitInfo
->log
->error_flag
)
2360 inst
= emit(emitInfo
, n
->Children
[1]);
2364 if (n
->Children
[1]->Store
)
2365 n
->Store
= n
->Children
[1]->Store
;
2367 n
->Store
= n
->Children
[0]->Store
;
2371 /* new variable scope */
2372 _slang_push_var_table(emitInfo
->vt
);
2373 inst
= emit(emitInfo
, n
->Children
[0]);
2374 _slang_pop_var_table(emitInfo
->vt
);
2375 n
->Store
= n
->Children
[0]->Store
;
2379 /* Variable declaration - allocate a register for it */
2380 inst
= emit_var_decl(emitInfo
, n
);
2384 /* Reference to a variable
2385 * Storage should have already been resolved/allocated.
2387 return emit_var_ref(emitInfo
, n
);
2390 return emit_array_element(emitInfo
, n
);
2392 return emit_struct_field(emitInfo
, n
);
2394 return emit_swizzle(emitInfo
, n
);
2396 /* Simple arithmetic */
2436 /* trinary operators */
2439 return emit_arith(emitInfo
, n
);
2443 return emit_compare(emitInfo
, n
);
2446 return emit_clamp(emitInfo
, n
);
2453 return emit_tex(emitInfo
, n
);
2455 return emit_negation(emitInfo
, n
);
2457 /* find storage location for this float constant */
2458 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
2461 &n
->Store
->Swizzle
);
2462 if (n
->Store
->Index
< 0) {
2463 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
2469 return emit_copy(emitInfo
, n
);
2472 return emit_cond(emitInfo
, n
);
2475 return emit_not(emitInfo
, n
);
2478 return emit_label(emitInfo
, n
);
2481 return emit_kill(emitInfo
);
2484 /* new variable scope for subroutines/function calls */
2485 _slang_push_var_table(emitInfo
->vt
);
2486 inst
= emit_fcall(emitInfo
, n
);
2487 _slang_pop_var_table(emitInfo
->vt
);
2491 return emit_if(emitInfo
, n
);
2494 return emit_loop(emitInfo
, n
);
2495 case IR_BREAK_IF_TRUE
:
2496 case IR_CONT_IF_TRUE
:
2497 return emit_cont_break_if_true(emitInfo
, n
);
2501 return emit_cont_break(emitInfo
, n
);
2504 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
2506 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
2508 return emit_return(emitInfo
, n
);
2513 case IR_EMIT_VERTEX
:
2514 return new_instruction(emitInfo
, OPCODE_EMIT_VERTEX
);
2515 case IR_END_PRIMITIVE
:
2516 return new_instruction(emitInfo
, OPCODE_END_PRIMITIVE
);
2519 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
2526 * After code generation, any subroutines will be in separate program
2527 * objects. This function appends all the subroutines onto the main
2528 * program and resolves the linking of all the branch/call instructions.
2529 * XXX this logic should really be part of the linking process...
2532 _slang_resolve_subroutines(slang_emit_info
*emitInfo
)
2534 GET_CURRENT_CONTEXT(ctx
);
2535 struct gl_program
*mainP
= emitInfo
->prog
;
2536 GLuint
*subroutineLoc
, i
, total
;
2539 = (GLuint
*) malloc(emitInfo
->NumSubroutines
* sizeof(GLuint
));
2541 /* total number of instructions */
2542 total
= mainP
->NumInstructions
;
2543 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2544 subroutineLoc
[i
] = total
;
2545 total
+= emitInfo
->Subroutines
[i
]->NumInstructions
;
2548 /* adjust BranchTargets within the functions */
2549 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2550 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2552 for (j
= 0; j
< sub
->NumInstructions
; j
++) {
2553 struct prog_instruction
*inst
= sub
->Instructions
+ j
;
2554 if (inst
->Opcode
!= OPCODE_CAL
&& inst
->BranchTarget
>= 0) {
2555 inst
->BranchTarget
+= subroutineLoc
[i
];
2560 /* append subroutines' instructions after main's instructions */
2561 mainP
->Instructions
= _mesa_realloc_instructions(mainP
->Instructions
,
2562 mainP
->NumInstructions
,
2564 mainP
->NumInstructions
= total
;
2565 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2566 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2567 _mesa_copy_instructions(mainP
->Instructions
+ subroutineLoc
[i
],
2569 sub
->NumInstructions
);
2570 /* delete subroutine code */
2571 sub
->Parameters
= NULL
; /* prevent double-free */
2572 _mesa_reference_program(ctx
, &emitInfo
->Subroutines
[i
], NULL
);
2575 /* free subroutine list */
2576 if (emitInfo
->Subroutines
) {
2577 free(emitInfo
->Subroutines
);
2578 emitInfo
->Subroutines
= NULL
;
2580 emitInfo
->NumSubroutines
= 0;
2582 /* Examine CAL instructions.
2583 * At this point, the BranchTarget field of the CAL instruction is
2584 * the number/id of the subroutine to call (an index into the
2585 * emitInfo->Subroutines list).
2586 * Translate that into an actual instruction location now.
2588 for (i
= 0; i
< mainP
->NumInstructions
; i
++) {
2589 struct prog_instruction
*inst
= mainP
->Instructions
+ i
;
2590 if (inst
->Opcode
== OPCODE_CAL
) {
2591 const GLuint f
= inst
->BranchTarget
;
2592 inst
->BranchTarget
= subroutineLoc
[f
];
2596 free(subroutineLoc
);
2602 * Convert the IR tree into GPU instructions.
2603 * \param n root of IR tree
2604 * \param vt variable table
2605 * \param prog program to put GPU instructions into
2606 * \param pragmas controls codegen options
2607 * \param withEnd if true, emit END opcode at end
2608 * \param log log for emitting errors/warnings/info
2611 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
2612 struct gl_program
*prog
,
2613 const struct gl_sl_pragmas
*pragmas
,
2615 slang_info_log
*log
)
2617 GET_CURRENT_CONTEXT(ctx
);
2619 slang_emit_info emitInfo
;
2624 emitInfo
.prog
= prog
;
2625 emitInfo
.Subroutines
= NULL
;
2626 emitInfo
.NumSubroutines
= 0;
2627 emitInfo
.MaxInstructions
= prog
->NumInstructions
;
2629 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
2630 emitInfo
.EmitCondCodes
= ctx
->Shader
.EmitCondCodes
;
2631 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
|| pragmas
->Debug
;
2632 emitInfo
.EmitBeginEndSub
= GL_TRUE
;
2634 if (!emitInfo
.EmitCondCodes
) {
2635 emitInfo
.EmitHighLevelInstructions
= GL_TRUE
;
2638 /* Check uniform/constant limits */
2639 if (prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
2640 maxUniforms
= ctx
->Const
.FragmentProgram
.MaxUniformComponents
/ 4;
2642 else if (prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
2643 maxUniforms
= ctx
->Const
.VertexProgram
.MaxUniformComponents
/ 4;
2645 assert(prog
->Target
== MESA_GEOMETRY_PROGRAM
);
2646 maxUniforms
= ctx
->Const
.GeometryProgram
.MaxUniformComponents
/ 4;
2648 if (prog
->Parameters
->NumParameters
> maxUniforms
) {
2649 slang_info_log_error(log
, "Constant/uniform register limit exceeded "
2650 "(max=%u vec4)", maxUniforms
);
2655 (void) emit(&emitInfo
, n
);
2657 /* finish up by adding the END opcode to program */
2659 struct prog_instruction
*inst
;
2660 inst
= new_instruction(&emitInfo
, OPCODE_END
);
2666 _slang_resolve_subroutines(&emitInfo
);
2671 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
2672 _mesa_print_program(prog
);
2673 _mesa_print_program_parameters(ctx
,prog
);