2 * Mesa 3-D graphics library
4 * Copyright (C) 2005-2008 Brian Paul All Rights Reserved.
5 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "program/program.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "program/prog_print.h"
45 #include "slang_builtin.h"
46 #include "slang_emit.h"
47 #include "slang_mem.h"
50 #define PEEPHOLE_OPTIMIZATIONS 1
58 struct gl_program
*prog
;
59 struct gl_program
**Subroutines
;
60 GLuint NumSubroutines
;
62 GLuint MaxInstructions
; /**< size of prog->Instructions[] buffer */
64 GLboolean UnresolvedFunctions
;
66 /* code-gen options */
67 GLboolean EmitHighLevelInstructions
;
68 GLboolean EmitCondCodes
;
69 GLboolean EmitComments
;
70 GLboolean EmitBeginEndSub
; /* XXX TEMPORARY */
75 static struct gl_program
*
76 new_subroutine(slang_emit_info
*emitInfo
, GLuint
*id
)
78 GET_CURRENT_CONTEXT(ctx
);
79 const GLuint n
= emitInfo
->NumSubroutines
;
81 emitInfo
->Subroutines
= (struct gl_program
**)
82 _mesa_realloc(emitInfo
->Subroutines
,
83 n
* sizeof(struct gl_program
*),
84 (n
+ 1) * sizeof(struct gl_program
*));
85 emitInfo
->Subroutines
[n
] = ctx
->Driver
.NewProgram(ctx
, emitInfo
->prog
->Target
, 0);
86 emitInfo
->Subroutines
[n
]->Parameters
= emitInfo
->prog
->Parameters
;
87 emitInfo
->NumSubroutines
++;
89 return emitInfo
->Subroutines
[n
];
94 * Convert a writemask to a swizzle. Used for testing cond codes because
95 * we only want to test the cond code component(s) that was set by the
96 * previous instruction.
99 writemask_to_swizzle(GLuint writemask
)
101 if (writemask
== WRITEMASK_X
)
103 if (writemask
== WRITEMASK_Y
)
105 if (writemask
== WRITEMASK_Z
)
107 if (writemask
== WRITEMASK_W
)
109 return SWIZZLE_XYZW
; /* shouldn't be hit */
114 * Convert a swizzle mask to a writemask.
115 * Note that the slang_ir_storage->Swizzle field can represent either a
116 * swizzle mask or a writemask, depending on how it's used. For example,
117 * when we parse "direction.yz" alone, we don't know whether .yz is a
118 * writemask or a swizzle. In this case, we encode ".yz" in store->Swizzle
119 * as a swizzle mask (.yz?? actually). Later, if direction.yz is used as
120 * an R-value, we use store->Swizzle as-is. Otherwise, if direction.yz is
121 * used as an L-value, we convert it to a writemask.
124 swizzle_to_writemask(GLuint swizzle
)
126 GLuint i
, writemask
= 0x0;
127 for (i
= 0; i
< 4; i
++) {
128 GLuint swz
= GET_SWZ(swizzle
, i
);
129 if (swz
<= SWIZZLE_W
) {
130 writemask
|= (1 << swz
);
138 * Swizzle a swizzle (function composition).
139 * That is, return swz2(swz1), or said another way: swz1.szw2
140 * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
143 _slang_swizzle_swizzle(GLuint swz1
, GLuint swz2
)
146 for (i
= 0; i
< 4; i
++) {
147 GLuint c
= GET_SWZ(swz2
, i
);
149 s
[i
] = GET_SWZ(swz1
, c
);
153 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
159 * Return the default swizzle mask for accessing a variable of the
160 * given size (in floats). If size = 1, comp is used to identify
161 * which component [0..3] of the register holds the variable.
164 _slang_var_swizzle(GLint size
, GLint comp
)
168 return MAKE_SWIZZLE4(comp
, SWIZZLE_NIL
, SWIZZLE_NIL
, SWIZZLE_NIL
);
170 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_NIL
, SWIZZLE_NIL
);
172 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_NIL
);
181 * Allocate storage for the given node (if it hasn't already been allocated).
183 * Typically this is temporary storage for an intermediate result (such as
184 * for a multiply or add, etc).
186 * If n->Store does not exist it will be created and will be of the size
187 * specified by defaultSize.
190 alloc_node_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
195 assert(defaultSize
> 0);
196 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, defaultSize
);
202 /* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
203 if (n
->Store
->Index
< 0) {
204 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
205 slang_info_log_error(emitInfo
->log
,
206 "Ran out of registers, too many temporaries");
207 _slang_free(n
->Store
);
217 * Free temporary storage, if n->Store is, in fact, temp storage.
221 free_node_storage(slang_var_table
*vt
, slang_ir_node
*n
)
223 if (n
->Store
->File
== PROGRAM_TEMPORARY
&&
224 n
->Store
->Index
>= 0 &&
225 n
->Opcode
!= IR_SWIZZLE
) {
226 if (_slang_is_temp(vt
, n
->Store
)) {
227 _slang_free_temp(vt
, n
->Store
);
228 n
->Store
->Index
= -1;
229 n
->Store
= NULL
; /* XXX this may not be needed */
236 * Helper function to allocate a short-term temporary.
237 * Free it with _slang_free_temp().
240 alloc_local_temp(slang_emit_info
*emitInfo
, slang_ir_storage
*temp
, GLint size
)
244 memset(temp
, 0, sizeof(*temp
));
246 temp
->File
= PROGRAM_TEMPORARY
;
248 return _slang_alloc_temp(emitInfo
->vt
, temp
);
253 * Remove any SWIZZLE_NIL terms from given swizzle mask.
254 * For a swizzle like .z??? generate .zzzz (replicate single component).
255 * Else, for .wx?? generate .wxzw (insert default component for the position).
258 fix_swizzle(GLuint swizzle
)
260 GLuint c0
= GET_SWZ(swizzle
, 0),
261 c1
= GET_SWZ(swizzle
, 1),
262 c2
= GET_SWZ(swizzle
, 2),
263 c3
= GET_SWZ(swizzle
, 3);
264 if (c1
== SWIZZLE_NIL
&& c2
== SWIZZLE_NIL
&& c3
== SWIZZLE_NIL
) {
265 /* smear first component across all positions */
269 /* insert default swizzle components */
270 if (c0
== SWIZZLE_NIL
)
272 if (c1
== SWIZZLE_NIL
)
274 if (c2
== SWIZZLE_NIL
)
276 if (c3
== SWIZZLE_NIL
)
279 return MAKE_SWIZZLE4(c0
, c1
, c2
, c3
);
285 * Convert IR storage to an instruction dst register.
288 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
)
290 const GLboolean relAddr
= st
->RelAddr
;
291 const GLint size
= st
->Size
;
292 GLint index
= st
->Index
;
293 GLuint swizzle
= st
->Swizzle
;
296 /* if this is storage relative to some parent storage, walk up the tree */
299 assert(st
->Index
>= 0);
301 swizzle
= _slang_swizzle_swizzle(st
->Swizzle
, swizzle
);
304 assert(st
->File
!= PROGRAM_UNDEFINED
);
305 dst
->File
= st
->File
;
313 if (swizzle
!= SWIZZLE_XYZW
) {
314 dst
->WriteMask
= swizzle_to_writemask(swizzle
);
319 dst
->WriteMask
= WRITEMASK_X
<< GET_SWZ(st
->Swizzle
, 0);
322 dst
->WriteMask
= WRITEMASK_XY
;
325 dst
->WriteMask
= WRITEMASK_XYZ
;
328 dst
->WriteMask
= WRITEMASK_XYZW
;
331 ; /* error would have been caught above */
335 dst
->RelAddr
= relAddr
;
340 * Convert IR storage to an instruction src register.
343 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
345 const GLboolean relAddr
= st
->RelAddr
;
346 GLint index
= st
->Index
;
347 GLuint swizzle
= st
->Swizzle
;
349 /* if this is storage relative to some parent storage, walk up the tree */
354 /* an error should have been reported already */
357 assert(st
->Index
>= 0);
359 swizzle
= _slang_swizzle_swizzle(fix_swizzle(st
->Swizzle
), swizzle
);
362 assert(st
->File
>= 0);
363 #if 1 /* XXX temporary */
364 if (st
->File
== PROGRAM_UNDEFINED
) {
365 slang_ir_storage
*st0
= (slang_ir_storage
*) st
;
366 st0
->File
= PROGRAM_TEMPORARY
;
369 assert(st
->File
< PROGRAM_FILE_MAX
);
370 src
->File
= st
->File
;
375 swizzle
= fix_swizzle(swizzle
);
376 assert(GET_SWZ(swizzle
, 0) <= SWIZZLE_W
);
377 assert(GET_SWZ(swizzle
, 1) <= SWIZZLE_W
);
378 assert(GET_SWZ(swizzle
, 2) <= SWIZZLE_W
);
379 assert(GET_SWZ(swizzle
, 3) <= SWIZZLE_W
);
380 src
->Swizzle
= swizzle
;
382 src
->HasIndex2D
= st
->Is2D
;
383 src
->Index2D
= st
->Index2D
;
385 src
->RelAddr
= relAddr
;
390 * Setup storage pointing to a scalar constant/literal.
393 constant_to_storage(slang_emit_info
*emitInfo
,
395 slang_ir_storage
*store
)
402 reg
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
405 memset(store
, 0, sizeof(*store
));
406 store
->File
= PROGRAM_CONSTANT
;
408 store
->Swizzle
= swizzle
;
413 * Add new instruction at end of given program.
414 * \param prog the program to append instruction onto
415 * \param opcode opcode for the new instruction
416 * \return pointer to the new instruction
418 static struct prog_instruction
*
419 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
421 struct gl_program
*prog
= emitInfo
->prog
;
422 struct prog_instruction
*inst
;
425 /* print prev inst */
426 if (prog
->NumInstructions
> 0) {
427 _mesa_print_instruction(prog
->Instructions
+ prog
->NumInstructions
- 1);
430 assert(prog
->NumInstructions
<= emitInfo
->MaxInstructions
);
432 if (prog
->NumInstructions
== emitInfo
->MaxInstructions
) {
433 /* grow the instruction buffer */
434 emitInfo
->MaxInstructions
+= 20;
436 _mesa_realloc_instructions(prog
->Instructions
,
437 prog
->NumInstructions
,
438 emitInfo
->MaxInstructions
);
439 if (!prog
->Instructions
) {
444 inst
= prog
->Instructions
+ prog
->NumInstructions
;
445 prog
->NumInstructions
++;
446 _mesa_init_instructions(inst
, 1);
447 inst
->Opcode
= opcode
;
448 inst
->BranchTarget
= -1; /* invalid */
450 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
451 _mesa_opcode_string(inst->Opcode));
457 static struct prog_instruction
*
458 emit_arl_load(slang_emit_info
*emitInfo
,
459 gl_register_file file
, GLint index
, GLuint swizzle
)
461 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ARL
);
463 inst
->SrcReg
[0].File
= file
;
464 inst
->SrcReg
[0].Index
= index
;
465 inst
->SrcReg
[0].Swizzle
= fix_swizzle(swizzle
);
466 inst
->DstReg
.File
= PROGRAM_ADDRESS
;
467 inst
->DstReg
.Index
= 0;
468 inst
->DstReg
.WriteMask
= WRITEMASK_X
;
475 * Emit a new instruction with given opcode, operands.
476 * At this point the instruction may have multiple indirect register
477 * loads/stores. We convert those into ARL loads and address-relative
478 * operands. See comments inside.
479 * At some point in the future we could directly emit indirectly addressed
480 * registers in Mesa GPU instructions.
482 static struct prog_instruction
*
483 emit_instruction(slang_emit_info
*emitInfo
,
484 gl_inst_opcode opcode
,
485 const slang_ir_storage
*dst
,
486 const slang_ir_storage
*src0
,
487 const slang_ir_storage
*src1
,
488 const slang_ir_storage
*src2
)
490 struct prog_instruction
*inst
;
491 GLuint numIndirect
= 0;
492 const slang_ir_storage
*src
[3];
493 slang_ir_storage newSrc
[3], newDst
;
497 isTemp
[0] = isTemp
[1] = isTemp
[2] = GL_FALSE
;
503 /* count up how many operands are indirect loads */
504 for (i
= 0; i
< 3; i
++) {
505 if (src
[i
] && src
[i
]->IsIndirect
)
508 if (dst
&& dst
->IsIndirect
)
511 /* Take special steps for indirect register loads.
512 * If we had multiple address registers this would be simpler.
513 * For example, this GLSL code:
514 * x[i] = y[j] + z[k];
515 * would translate into something like:
519 * ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
520 * But since we currently only have one address register we have to do this:
522 * MOV t1, TEMP[ADDR.x+9];
524 * MOV t2, TEMP[ADDR.x+4];
526 * ADD TEMP[ADDR.x+5], t1, t2;
527 * The code here figures this out...
529 if (numIndirect
> 0) {
530 for (i
= 0; i
< 3; i
++) {
531 if (src
[i
] && src
[i
]->IsIndirect
) {
532 /* load the ARL register with the indirect register */
533 emit_arl_load(emitInfo
,
534 src
[i
]->IndirectFile
,
535 src
[i
]->IndirectIndex
,
536 src
[i
]->IndirectSwizzle
);
538 if (numIndirect
> 1) {
539 /* Need to load src[i] into a temporary register */
540 slang_ir_storage srcRelAddr
;
541 alloc_local_temp(emitInfo
, &newSrc
[i
], src
[i
]->Size
);
544 /* set RelAddr flag on src register */
545 srcRelAddr
= *src
[i
];
546 srcRelAddr
.RelAddr
= GL_TRUE
;
547 srcRelAddr
.IsIndirect
= GL_FALSE
; /* not really needed */
549 /* MOV newSrc, srcRelAddr; */
550 inst
= emit_instruction(emitInfo
,
563 /* just rewrite the src[i] storage to be ARL-relative */
565 newSrc
[i
].RelAddr
= GL_TRUE
;
566 newSrc
[i
].IsIndirect
= GL_FALSE
; /* not really needed */
573 /* Take special steps for indirect dest register write */
574 if (dst
&& dst
->IsIndirect
) {
575 /* load the ARL register with the indirect register */
576 emit_arl_load(emitInfo
,
579 dst
->IndirectSwizzle
);
581 newDst
.RelAddr
= GL_TRUE
;
582 newDst
.IsIndirect
= GL_FALSE
;
586 /* OK, emit the instruction and its dst, src regs */
587 inst
= new_instruction(emitInfo
, opcode
);
592 storage_to_dst_reg(&inst
->DstReg
, dst
);
594 for (i
= 0; i
< 3; i
++) {
596 storage_to_src_reg(&inst
->SrcReg
[i
], src
[i
]);
599 /* Free any temp registers that we allocated above */
600 for (i
= 0; i
< 3; i
++) {
602 _slang_free_temp(emitInfo
->vt
, &newSrc
[i
]);
611 * Put a comment on the given instruction.
614 inst_comment(struct prog_instruction
*inst
, const char *comment
)
617 inst
->Comment
= _mesa_strdup(comment
);
623 * Return pointer to last instruction in program.
625 static struct prog_instruction
*
626 prev_instruction(slang_emit_info
*emitInfo
)
628 struct gl_program
*prog
= emitInfo
->prog
;
629 if (prog
->NumInstructions
== 0)
632 return prog
->Instructions
+ prog
->NumInstructions
- 1;
636 static struct prog_instruction
*
637 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
641 * Return an annotation string for given node's storage.
644 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
647 const slang_ir_storage
*st
= n
->Store
;
648 static char s
[100] = "";
651 return _mesa_strdup("");
654 case PROGRAM_CONSTANT
:
655 if (st
->Index
>= 0) {
656 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
657 if (st
->Swizzle
== SWIZZLE_NOOP
)
658 _mesa_snprintf(s
, sizeof(s
), "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
660 _mesa_snprintf(s
, sizeof(s
), "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
664 case PROGRAM_TEMPORARY
:
666 _mesa_snprintf(s
, sizeof(s
), "%s", (char *) n
->Var
->a_name
);
668 _mesa_snprintf(s
, sizeof(s
), "t[%d]", st
->Index
);
670 case PROGRAM_STATE_VAR
:
671 case PROGRAM_UNIFORM
:
672 _mesa_snprintf(s
, sizeof(s
), "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
674 case PROGRAM_VARYING
:
675 _mesa_snprintf(s
, sizeof(s
), "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
678 _mesa_snprintf(s
, sizeof(s
), "input[%d]", st
->Index
);
681 _mesa_snprintf(s
, sizeof(s
), "output[%d]", st
->Index
);
686 return _mesa_strdup(s
);
694 * Return an annotation string for an instruction.
697 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
698 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
701 const char *operator;
706 len
+= strlen(dstAnnot
);
708 dstAnnot
= _mesa_strdup("");
711 len
+= strlen(srcAnnot0
);
713 srcAnnot0
= _mesa_strdup("");
716 len
+= strlen(srcAnnot1
);
718 srcAnnot1
= _mesa_strdup("");
721 len
+= strlen(srcAnnot2
);
723 srcAnnot2
= _mesa_strdup("");
757 s
= (char *) malloc(len
);
758 _mesa_snprintf(s
, len
, "%s = %s %s %s %s", dstAnnot
,
759 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
774 * Emit an instruction that's just a comment.
776 static struct prog_instruction
*
777 emit_comment(slang_emit_info
*emitInfo
, const char *comment
)
779 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_NOP
);
781 inst_comment(inst
, comment
);
788 * Generate code for a simple arithmetic instruction.
789 * Either 1, 2 or 3 operands.
791 static struct prog_instruction
*
792 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
794 const slang_ir_info
*info
= _slang_ir_info(n
->Opcode
);
795 struct prog_instruction
*inst
;
799 assert(info
->InstOpcode
!= OPCODE_NOP
);
801 #if PEEPHOLE_OPTIMIZATIONS
802 /* Look for MAD opportunity */
803 if (info
->NumParams
== 2 &&
804 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
805 /* found pattern IR_ADD(IR_MUL(A, B), C) */
806 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
807 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
808 emit(emitInfo
, n
->Children
[1]); /* C */
809 if (!alloc_node_storage(emitInfo
, n
, -1)) { /* dest */
813 inst
= emit_instruction(emitInfo
,
816 n
->Children
[0]->Children
[0]->Store
,
817 n
->Children
[0]->Children
[1]->Store
,
818 n
->Children
[1]->Store
);
820 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
821 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
822 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
826 if (info
->NumParams
== 2 &&
827 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
828 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
829 emit(emitInfo
, n
->Children
[0]); /* A */
830 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
831 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
832 if (!alloc_node_storage(emitInfo
, n
, -1)) { /* dest */
836 inst
= emit_instruction(emitInfo
,
839 n
->Children
[1]->Children
[0]->Store
,
840 n
->Children
[1]->Children
[1]->Store
,
841 n
->Children
[0]->Store
);
843 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
844 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
845 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
850 /* gen code for children, may involve temp allocation */
851 for (i
= 0; i
< info
->NumParams
; i
++) {
852 emit(emitInfo
, n
->Children
[i
]);
853 if (!n
->Children
[i
] || !n
->Children
[i
]->Store
) {
860 if (!alloc_node_storage(emitInfo
, n
, -1)) {
864 inst
= emit_instruction(emitInfo
,
867 (info
->NumParams
> 0 ? n
->Children
[0]->Store
: NULL
),
868 (info
->NumParams
> 1 ? n
->Children
[1]->Store
: NULL
),
869 (info
->NumParams
> 2 ? n
->Children
[2]->Store
: NULL
)
873 for (i
= 0; i
< info
->NumParams
; i
++)
874 free_node_storage(emitInfo
->vt
, n
->Children
[i
]);
881 * Emit code for == and != operators. These could normally be handled
882 * by emit_arith() except we need to be able to handle structure comparisons.
884 static struct prog_instruction
*
885 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
887 struct prog_instruction
*inst
= NULL
;
890 assert(n
->Opcode
== IR_EQUAL
|| n
->Opcode
== IR_NOTEQUAL
);
892 /* gen code for children */
893 emit(emitInfo
, n
->Children
[0]);
894 emit(emitInfo
, n
->Children
[1]);
896 if (n
->Children
[0]->Store
->Size
!= n
->Children
[1]->Store
->Size
) {
897 /* XXX this error should have been caught in slang_codegen.c */
898 slang_info_log_error(emitInfo
->log
, "invalid operands to == or !=");
903 /* final result is 1 bool */
904 if (!alloc_node_storage(emitInfo
, n
, 1))
907 size
= n
->Children
[0]->Store
->Size
;
910 gl_inst_opcode opcode
= n
->Opcode
== IR_EQUAL
? OPCODE_SEQ
: OPCODE_SNE
;
911 inst
= emit_instruction(emitInfo
,
914 n
->Children
[0]->Store
,
915 n
->Children
[1]->Store
,
918 else if (size
<= 4) {
919 /* compare two vectors.
920 * Unfortunately, there's no instruction to compare vectors and
921 * return a scalar result. Do it with some compare and dot product
925 gl_inst_opcode dotOp
;
926 slang_ir_storage tempStore
;
928 if (!alloc_local_temp(emitInfo
, &tempStore
, 4)) {
936 swizzle
= SWIZZLE_XYZW
;
938 else if (size
== 3) {
940 swizzle
= SWIZZLE_XYZW
;
944 dotOp
= OPCODE_DP3
; /* XXX use OPCODE_DP2 eventually */
945 swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
);
948 /* Compute inequality (temp = (A != B)) */
949 inst
= emit_instruction(emitInfo
,
952 n
->Children
[0]->Store
,
953 n
->Children
[1]->Store
,
958 inst_comment(inst
, "Compare values");
960 /* Compute val = DOT(temp, temp) (reduction) */
961 inst
= emit_instruction(emitInfo
,
970 inst
->SrcReg
[0].Swizzle
= inst
->SrcReg
[1].Swizzle
= swizzle
; /*override*/
971 inst_comment(inst
, "Reduce vec to bool");
973 _slang_free_temp(emitInfo
->vt
, &tempStore
); /* free temp */
975 if (n
->Opcode
== IR_EQUAL
) {
976 /* compute val = !val.x with SEQ val, val, 0; */
977 slang_ir_storage zero
;
978 constant_to_storage(emitInfo
, 0.0, &zero
);
979 inst
= emit_instruction(emitInfo
,
988 inst_comment(inst
, "Invert true/false");
992 /* size > 4, struct or array compare.
993 * XXX this won't work reliably for structs with padding!!
995 GLint i
, num
= (n
->Children
[0]->Store
->Size
+ 3) / 4;
996 slang_ir_storage accTemp
, sneTemp
;
998 if (!alloc_local_temp(emitInfo
, &accTemp
, 4))
1001 if (!alloc_local_temp(emitInfo
, &sneTemp
, 4))
1004 for (i
= 0; i
< num
; i
++) {
1005 slang_ir_storage srcStore0
= *n
->Children
[0]->Store
;
1006 slang_ir_storage srcStore1
= *n
->Children
[1]->Store
;
1007 srcStore0
.Index
+= i
;
1008 srcStore1
.Index
+= i
;
1011 /* SNE accTemp, left[i], right[i] */
1012 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
1013 &accTemp
, /* dest */
1020 inst_comment(inst
, "Begin struct/array comparison");
1023 /* SNE sneTemp, left[i], right[i] */
1024 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
1025 &sneTemp
, /* dest */
1032 /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
1033 inst
= emit_instruction(emitInfo
, OPCODE_ADD
,
1034 &accTemp
, /* dest */
1044 /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
1045 inst
= emit_instruction(emitInfo
, OPCODE_DP4
,
1053 inst_comment(inst
, "End struct/array comparison");
1055 if (n
->Opcode
== IR_EQUAL
) {
1056 /* compute tmp.x = !tmp.x via tmp.x = (tmp.x == 0) */
1057 slang_ir_storage zero
;
1058 constant_to_storage(emitInfo
, 0.0, &zero
);
1059 inst
= emit_instruction(emitInfo
, OPCODE_SEQ
,
1060 n
->Store
, /* dest */
1067 inst_comment(inst
, "Invert true/false");
1070 _slang_free_temp(emitInfo
->vt
, &accTemp
);
1071 _slang_free_temp(emitInfo
->vt
, &sneTemp
);
1075 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1076 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1084 * Generate code for an IR_CLAMP instruction.
1086 static struct prog_instruction
*
1087 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1089 struct prog_instruction
*inst
;
1090 slang_ir_node tmpNode
;
1092 assert(n
->Opcode
== IR_CLAMP
);
1098 inst
= emit(emitInfo
, n
->Children
[0]);
1100 /* If lower limit == 0.0 and upper limit == 1.0,
1101 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1103 * emit OPCODE_MIN, OPCODE_MAX sequence.
1106 /* XXX this isn't quite finished yet */
1107 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
1108 n
->Children
[1]->Value
[0] == 0.0 &&
1109 n
->Children
[1]->Value
[1] == 0.0 &&
1110 n
->Children
[1]->Value
[2] == 0.0 &&
1111 n
->Children
[1]->Value
[3] == 0.0 &&
1112 n
->Children
[2]->Opcode
== IR_FLOAT
&&
1113 n
->Children
[2]->Value
[0] == 1.0 &&
1114 n
->Children
[2]->Value
[1] == 1.0 &&
1115 n
->Children
[2]->Value
[2] == 1.0 &&
1116 n
->Children
[2]->Value
[3] == 1.0) {
1118 inst
= prev_instruction(prog
);
1120 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
1121 /* and prev instruction's DstReg matches n->Children[0]->Store */
1122 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
1123 n
->Store
= n
->Children
[0]->Store
;
1131 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1134 emit(emitInfo
, n
->Children
[1]);
1135 emit(emitInfo
, n
->Children
[2]);
1137 /* Some GPUs don't allow reading from output registers. So if the
1138 * dest for this clamp() is an output reg, we can't use that reg for
1139 * the intermediate result. Use a temp register instead.
1141 memset(&tmpNode
, 0, sizeof(tmpNode
));
1142 if (!alloc_node_storage(emitInfo
, &tmpNode
, n
->Store
->Size
)) {
1146 /* tmp = max(ch[0], ch[1]) */
1147 inst
= emit_instruction(emitInfo
, OPCODE_MAX
,
1148 tmpNode
.Store
, /* dest */
1149 n
->Children
[0]->Store
,
1150 n
->Children
[1]->Store
,
1156 /* n->dest = min(tmp, ch[2]) */
1157 inst
= emit_instruction(emitInfo
, OPCODE_MIN
,
1158 n
->Store
, /* dest */
1160 n
->Children
[2]->Store
,
1163 free_node_storage(emitInfo
->vt
, &tmpNode
);
1169 static struct prog_instruction
*
1170 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1172 /* Implement as MOV dst, -src; */
1173 /* XXX we could look at the previous instruction and in some circumstances
1174 * modify it to accomplish the negation.
1176 struct prog_instruction
*inst
;
1178 emit(emitInfo
, n
->Children
[0]);
1180 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1183 inst
= emit_instruction(emitInfo
,
1185 n
->Store
, /* dest */
1186 n
->Children
[0]->Store
,
1190 inst
->SrcReg
[0].Negate
= NEGATE_XYZW
;
1196 static struct prog_instruction
*
1197 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
1201 /* XXX this fails in loop tail code - investigate someday */
1202 assert(_slang_label_get_location(n
->Label
) < 0);
1203 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1206 if (_slang_label_get_location(n
->Label
) < 0)
1207 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1215 * Emit code for a function call.
1216 * Note that for each time a function is called, we emit the function's
1217 * body code again because the set of available registers may be different.
1219 static struct prog_instruction
*
1220 emit_fcall(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1222 struct gl_program
*progSave
;
1223 struct prog_instruction
*inst
;
1224 GLuint subroutineId
;
1227 assert(n
->Opcode
== IR_CALL
);
1230 /* save/push cur program */
1231 maxInstSave
= emitInfo
->MaxInstructions
;
1232 progSave
= emitInfo
->prog
;
1234 emitInfo
->prog
= new_subroutine(emitInfo
, &subroutineId
);
1235 emitInfo
->MaxInstructions
= emitInfo
->prog
->NumInstructions
;
1237 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1240 if (emitInfo
->EmitBeginEndSub
) {
1241 /* BGNSUB isn't a real instruction.
1242 * We require a label (i.e. "foobar:") though, if we're going to
1243 * print the program in the NV format. The BNGSUB instruction is
1244 * really just a NOP to attach the label to.
1246 inst
= new_instruction(emitInfo
, OPCODE_BGNSUB
);
1250 inst_comment(inst
, n
->Label
->Name
);
1253 /* body of function: */
1254 emit(emitInfo
, n
->Children
[0]);
1255 n
->Store
= n
->Children
[0]->Store
;
1257 /* add RET instruction now, if needed */
1258 inst
= prev_instruction(emitInfo
);
1259 if (inst
&& inst
->Opcode
!= OPCODE_RET
) {
1260 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1266 if (emitInfo
->EmitBeginEndSub
) {
1267 inst
= new_instruction(emitInfo
, OPCODE_ENDSUB
);
1271 inst_comment(inst
, n
->Label
->Name
);
1274 /* pop/restore cur program */
1275 emitInfo
->prog
= progSave
;
1276 emitInfo
->MaxInstructions
= maxInstSave
;
1278 /* emit the function call */
1279 inst
= new_instruction(emitInfo
, OPCODE_CAL
);
1283 /* The branch target is just the subroutine number (changed later) */
1284 inst
->BranchTarget
= subroutineId
;
1285 inst_comment(inst
, n
->Label
->Name
);
1286 assert(inst
->BranchTarget
>= 0);
1293 * Emit code for a 'return' statement.
1295 static struct prog_instruction
*
1296 emit_return(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1298 struct prog_instruction
*inst
;
1300 assert(n
->Opcode
== IR_RETURN
);
1302 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1304 inst
->DstReg
.CondMask
= COND_TR
; /* always return */
1310 static struct prog_instruction
*
1311 emit_kill(slang_emit_info
*emitInfo
)
1313 struct gl_fragment_program
*fp
;
1314 struct prog_instruction
*inst
;
1315 /* NV-KILL - discard fragment depending on condition code.
1316 * Note that ARB-KILL depends on sign of vector operand.
1318 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
1322 inst
->DstReg
.CondMask
= COND_TR
; /* always kill */
1324 assert(emitInfo
->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
);
1325 fp
= (struct gl_fragment_program
*) emitInfo
->prog
;
1326 fp
->UsesKill
= GL_TRUE
;
1332 static struct prog_instruction
*
1333 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1335 struct prog_instruction
*inst
;
1336 gl_inst_opcode opcode
;
1337 GLboolean shadow
= GL_FALSE
;
1339 switch (n
->Opcode
) {
1341 opcode
= OPCODE_TEX
;
1344 opcode
= OPCODE_TEX
;
1348 opcode
= OPCODE_TXB
;
1351 opcode
= OPCODE_TXB
;
1355 opcode
= OPCODE_TXP
;
1358 opcode
= OPCODE_TXP
;
1362 _mesa_problem(NULL
, "Bad IR TEX code");
1366 if (n
->Children
[0]->Opcode
== IR_ELEMENT
) {
1367 /* array is the sampler (a uniform which'll indicate the texture unit) */
1368 assert(n
->Children
[0]->Children
[0]->Store
);
1369 assert(n
->Children
[0]->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1371 emit(emitInfo
, n
->Children
[0]);
1373 n
->Children
[0]->Var
= n
->Children
[0]->Children
[0]->Var
;
1375 /* this is the sampler (a uniform which'll indicate the texture unit) */
1376 assert(n
->Children
[0]->Store
);
1377 assert(n
->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1380 /* emit code for the texcoord operand */
1381 (void) emit(emitInfo
, n
->Children
[1]);
1383 /* alloc storage for result of texture fetch */
1384 if (!alloc_node_storage(emitInfo
, n
, 4))
1387 /* emit TEX instruction; Child[1] is the texcoord */
1388 inst
= emit_instruction(emitInfo
,
1391 n
->Children
[1]->Store
,
1398 inst
->TexShadow
= shadow
;
1400 /* Store->Index is the uniform/sampler index */
1401 assert(n
->Children
[0]->Store
->Index
>= 0);
1402 inst
->TexSrcUnit
= n
->Children
[0]->Store
->Index
;
1403 inst
->TexSrcTarget
= n
->Children
[0]->Store
->TexTarget
;
1405 /* mark the sampler as being used */
1406 _mesa_use_uniform(emitInfo
->prog
->Parameters
,
1407 (char *) n
->Children
[0]->Var
->a_name
);
1416 static struct prog_instruction
*
1417 emit_copy(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1419 struct prog_instruction
*inst
;
1421 assert(n
->Opcode
== IR_COPY
);
1424 emit(emitInfo
, n
->Children
[0]);
1425 if (!n
->Children
[0]->Store
|| n
->Children
[0]->Store
->Index
< 0) {
1426 /* an error should have been already recorded */
1431 assert(n
->Children
[1]);
1432 inst
= emit(emitInfo
, n
->Children
[1]);
1434 if (!n
->Children
[1]->Store
|| n
->Children
[1]->Store
->Index
< 0) {
1435 if (!emitInfo
->log
->text
&& !emitInfo
->UnresolvedFunctions
) {
1436 /* XXX this error should have been caught in slang_codegen.c */
1437 slang_info_log_error(emitInfo
->log
, "invalid assignment");
1442 assert(n
->Children
[1]->Store
->Index
>= 0);
1444 /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1446 n
->Store
= n
->Children
[0]->Store
;
1448 if (n
->Store
->File
== PROGRAM_SAMPLER
) {
1449 /* no code generated for sampler assignments,
1450 * just copy the sampler index/target at compile time.
1452 n
->Store
->Index
= n
->Children
[1]->Store
->Index
;
1453 n
->Store
->TexTarget
= n
->Children
[1]->Store
->TexTarget
;
1457 #if PEEPHOLE_OPTIMIZATIONS
1459 (n
->Children
[1]->Opcode
!= IR_SWIZZLE
) &&
1460 _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
) &&
1461 (inst
->DstReg
.File
== n
->Children
[1]->Store
->File
) &&
1462 (inst
->DstReg
.Index
== n
->Children
[1]->Store
->Index
) &&
1463 !n
->Children
[0]->Store
->IsIndirect
&&
1464 n
->Children
[0]->Store
->Size
<= 4) {
1465 /* Peephole optimization:
1466 * The Right-Hand-Side has its results in a temporary place.
1467 * Modify the RHS (and the prev instruction) to store its results
1468 * in the destination specified by n->Children[0].
1469 * Then, this MOVE is a no-op.
1477 /* fixup the previous instruction (which stored the RHS result) */
1478 assert(n
->Children
[0]->Store
->Index
>= 0);
1479 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
);
1485 if (n
->Children
[0]->Store
->Size
> 4) {
1486 /* move matrix/struct etc (block of registers) */
1487 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1488 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1489 GLint size
= srcStore
.Size
;
1490 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1494 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1502 inst_comment(inst
, "IR_COPY block");
1509 /* single register move */
1510 char *srcAnnot
, *dstAnnot
;
1511 assert(n
->Children
[0]->Store
->Index
>= 0);
1512 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1513 n
->Children
[0]->Store
, /* dest */
1514 n
->Children
[1]->Store
,
1520 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1521 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1522 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1523 srcAnnot
, NULL
, NULL
);
1525 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1532 * An IR_COND node wraps a boolean expression which is used by an
1533 * IF or WHILE test. This is where we'll set condition codes, if needed.
1535 static struct prog_instruction
*
1536 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1538 struct prog_instruction
*inst
;
1540 assert(n
->Opcode
== IR_COND
);
1542 if (!n
->Children
[0])
1545 /* emit code for the expression */
1546 inst
= emit(emitInfo
, n
->Children
[0]);
1548 if (!n
->Children
[0]->Store
) {
1549 /* error recovery */
1553 assert(n
->Children
[0]->Store
);
1554 /*assert(n->Children[0]->Store->Size == 1);*/
1556 if (emitInfo
->EmitCondCodes
) {
1558 n
->Children
[0]->Store
&&
1559 inst
->DstReg
.File
== n
->Children
[0]->Store
->File
&&
1560 inst
->DstReg
.Index
== n
->Children
[0]->Store
->Index
) {
1561 /* The previous instruction wrote to the register who's value
1562 * we're testing. Just fix that instruction so that the
1563 * condition codes are computed.
1565 inst
->CondUpdate
= GL_TRUE
;
1566 n
->Store
= n
->Children
[0]->Store
;
1570 /* This'll happen for things like "if (i) ..." where no code
1571 * is normally generated for the expression "i".
1572 * Generate a move instruction just to set condition codes.
1574 if (!alloc_node_storage(emitInfo
, n
, 1))
1576 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1577 n
->Store
, /* dest */
1578 n
->Children
[0]->Store
,
1584 inst
->CondUpdate
= GL_TRUE
;
1585 inst_comment(inst
, "COND expr");
1586 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1591 /* No-op: the boolean result of the expression is in a regular reg */
1592 n
->Store
= n
->Children
[0]->Store
;
1601 static struct prog_instruction
*
1602 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1604 static const struct {
1605 gl_inst_opcode op
, opNot
;
1607 { OPCODE_SLT
, OPCODE_SGE
},
1608 { OPCODE_SLE
, OPCODE_SGT
},
1609 { OPCODE_SGT
, OPCODE_SLE
},
1610 { OPCODE_SGE
, OPCODE_SLT
},
1611 { OPCODE_SEQ
, OPCODE_SNE
},
1612 { OPCODE_SNE
, OPCODE_SEQ
},
1615 struct prog_instruction
*inst
;
1616 slang_ir_storage zero
;
1620 inst
= emit(emitInfo
, n
->Children
[0]);
1622 #if PEEPHOLE_OPTIMIZATIONS
1624 /* if the prev instruction was a comparison instruction, invert it */
1625 for (i
= 0; operators
[i
].op
; i
++) {
1626 if (inst
->Opcode
== operators
[i
].op
) {
1627 inst
->Opcode
= operators
[i
].opNot
;
1628 n
->Store
= n
->Children
[0]->Store
;
1635 /* else, invert using SEQ (v = v == 0) */
1636 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1639 constant_to_storage(emitInfo
, 0.0, &zero
);
1640 inst
= emit_instruction(emitInfo
,
1643 n
->Children
[0]->Store
,
1649 inst_comment(inst
, "NOT");
1651 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1657 static struct prog_instruction
*
1658 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1660 struct gl_program
*prog
= emitInfo
->prog
;
1661 GLuint ifInstLoc
, elseInstLoc
= 0;
1662 GLuint condWritemask
= 0;
1664 /* emit condition expression code */
1666 struct prog_instruction
*inst
;
1667 inst
= emit(emitInfo
, n
->Children
[0]);
1668 if (emitInfo
->EmitCondCodes
) {
1670 /* error recovery */
1673 condWritemask
= inst
->DstReg
.WriteMask
;
1677 if (!n
->Children
[0]->Store
)
1681 assert(n
->Children
[0]->Store
->Size
== 1); /* a bool! */
1684 ifInstLoc
= prog
->NumInstructions
;
1685 if (emitInfo
->EmitHighLevelInstructions
) {
1686 if (emitInfo
->EmitCondCodes
) {
1687 /* IF condcode THEN ... */
1688 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1692 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1693 /* only test the cond code (1 of 4) that was updated by the
1694 * previous instruction.
1696 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1699 struct prog_instruction
*inst
;
1701 /* IF src[0] THEN ... */
1702 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1704 n
->Children
[0]->Store
, /* op0 */
1713 /* conditional jump to else, or endif */
1714 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1718 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1719 inst_comment(ifInst
, "if zero");
1720 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1724 emit(emitInfo
, n
->Children
[1]);
1726 if (n
->Children
[2]) {
1727 /* have else body */
1728 elseInstLoc
= prog
->NumInstructions
;
1729 if (emitInfo
->EmitHighLevelInstructions
) {
1730 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ELSE
);
1734 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
- 1;
1737 /* jump to endif instruction */
1738 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1742 inst_comment(inst
, "else");
1743 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1744 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1746 emit(emitInfo
, n
->Children
[2]);
1750 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1753 if (emitInfo
->EmitHighLevelInstructions
) {
1754 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1761 /* point ELSE instruction BranchTarget at ENDIF */
1762 if (emitInfo
->EmitHighLevelInstructions
) {
1763 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
- 1;
1766 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
;
1773 static struct prog_instruction
*
1774 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1776 struct gl_program
*prog
= emitInfo
->prog
;
1777 struct prog_instruction
*endInst
;
1778 GLuint beginInstLoc
, tailInstLoc
, endInstLoc
;
1781 /* emit OPCODE_BGNLOOP */
1782 beginInstLoc
= prog
->NumInstructions
;
1783 if (emitInfo
->EmitHighLevelInstructions
) {
1784 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1791 emit(emitInfo
, n
->Children
[0]);
1794 tailInstLoc
= prog
->NumInstructions
;
1795 if (n
->Children
[1]) {
1796 if (emitInfo
->EmitComments
)
1797 emit_comment(emitInfo
, "Loop tail code:");
1798 emit(emitInfo
, n
->Children
[1]);
1801 endInstLoc
= prog
->NumInstructions
;
1802 if (emitInfo
->EmitHighLevelInstructions
) {
1803 /* emit OPCODE_ENDLOOP */
1804 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1810 /* emit unconditional BRA-nch */
1811 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1815 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1817 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1818 endInst
->BranchTarget
= beginInstLoc
;
1820 if (emitInfo
->EmitHighLevelInstructions
) {
1821 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1822 prog
->Instructions
[beginInstLoc
].BranchTarget
= prog
->NumInstructions
-1;
1825 /* Done emitting loop code. Now walk over the loop's linked list of
1826 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1827 * will point to the corresponding ENDLOOP instruction.
1829 for (ir
= n
->List
; ir
; ir
= ir
->List
) {
1830 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1831 assert(inst
->BranchTarget
< 0);
1832 if (ir
->Opcode
== IR_BREAK
||
1833 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1834 assert(inst
->Opcode
== OPCODE_BRK
||
1835 inst
->Opcode
== OPCODE_BRA
);
1836 /* go to instruction at end of loop */
1837 if (emitInfo
->EmitHighLevelInstructions
) {
1838 inst
->BranchTarget
= endInstLoc
;
1841 inst
->BranchTarget
= endInstLoc
+ 1;
1845 assert(ir
->Opcode
== IR_CONT
||
1846 ir
->Opcode
== IR_CONT_IF_TRUE
);
1847 assert(inst
->Opcode
== OPCODE_CONT
||
1848 inst
->Opcode
== OPCODE_BRA
);
1849 /* go to instruction at tail of loop */
1850 inst
->BranchTarget
= endInstLoc
;
1858 * Unconditional "continue" or "break" statement.
1859 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1861 static struct prog_instruction
*
1862 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1864 gl_inst_opcode opcode
;
1865 struct prog_instruction
*inst
;
1867 if (n
->Opcode
== IR_CONT
) {
1868 /* we need to execute the loop's tail code before doing CONT */
1870 assert(n
->Parent
->Opcode
== IR_LOOP
);
1871 if (n
->Parent
->Children
[1]) {
1872 /* emit tail code */
1873 if (emitInfo
->EmitComments
) {
1874 emit_comment(emitInfo
, "continue - tail code:");
1876 emit(emitInfo
, n
->Parent
->Children
[1]);
1880 /* opcode selection */
1881 if (emitInfo
->EmitHighLevelInstructions
) {
1882 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1885 opcode
= OPCODE_BRA
;
1887 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1888 inst
= new_instruction(emitInfo
, opcode
);
1890 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1897 * Conditional "continue" or "break" statement.
1898 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1900 static struct prog_instruction
*
1901 emit_cont_break_if_true(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1903 struct prog_instruction
*inst
;
1905 assert(n
->Opcode
== IR_CONT_IF_TRUE
||
1906 n
->Opcode
== IR_BREAK_IF_TRUE
);
1908 /* evaluate condition expr, setting cond codes */
1909 inst
= emit(emitInfo
, n
->Children
[0]);
1910 if (emitInfo
->EmitCondCodes
) {
1912 inst
->CondUpdate
= GL_TRUE
;
1915 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1917 /* opcode selection */
1918 if (emitInfo
->EmitHighLevelInstructions
) {
1919 const gl_inst_opcode opcode
1920 = (n
->Opcode
== IR_CONT_IF_TRUE
) ? OPCODE_CONT
: OPCODE_BRK
;
1921 if (emitInfo
->EmitCondCodes
) {
1922 /* Get the writemask from the previous instruction which set
1923 * the condcodes. Use that writemask as the CondSwizzle.
1925 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1926 inst
= new_instruction(emitInfo
, opcode
);
1928 inst
->DstReg
.CondMask
= COND_NE
;
1929 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1939 ifInstLoc
= emitInfo
->prog
->NumInstructions
;
1940 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1942 n
->Children
[0]->Store
,
1948 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1950 inst
= new_instruction(emitInfo
, opcode
);
1954 inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1959 emitInfo
->prog
->Instructions
[ifInstLoc
].BranchTarget
1960 = emitInfo
->prog
->NumInstructions
- 1;
1965 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1966 assert(emitInfo
->EmitCondCodes
);
1967 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1969 inst
->DstReg
.CondMask
= COND_NE
;
1970 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1978 * Return the size of a swizzle mask given that some swizzle components
1979 * may be NIL/undefined. For example:
1980 * swizzle_size(".zzxx") = 4
1981 * swizzle_size(".xy??") = 2
1982 * swizzle_size(".w???") = 1
1985 swizzle_size(GLuint swizzle
)
1988 for (i
= 0; i
< 4; i
++) {
1989 if (GET_SWZ(swizzle
, i
) == SWIZZLE_NIL
)
1996 static struct prog_instruction
*
1997 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1999 struct prog_instruction
*inst
;
2001 inst
= emit(emitInfo
, n
->Children
[0]);
2003 if (!n
->Store
->Parent
) {
2004 /* this covers a case such as "(b ? p : q).x" */
2005 n
->Store
->Parent
= n
->Children
[0]->Store
;
2006 assert(n
->Store
->Parent
);
2010 const GLuint swizzle
= n
->Store
->Swizzle
;
2011 /* new storage is parent storage with updated Swizzle + Size fields */
2012 _slang_copy_ir_storage(n
->Store
, n
->Store
->Parent
);
2013 /* Apply this node's swizzle to parent's storage */
2014 n
->Store
->Swizzle
= _slang_swizzle_swizzle(n
->Store
->Swizzle
, swizzle
);
2016 n
->Store
->Size
= swizzle_size(n
->Store
->Swizzle
);
2019 assert(!n
->Store
->Parent
);
2020 assert(n
->Store
->Index
>= 0);
2027 * Dereference array element: element == array[index]
2028 * This basically involves emitting code for computing the array index
2029 * and updating the node/element's storage info.
2031 static struct prog_instruction
*
2032 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2034 slang_ir_storage
*arrayStore
, *indexStore
;
2035 const int elemSize
= n
->Store
->Size
; /* number of floats */
2036 const GLint elemSizeVec
= (elemSize
+ 3) / 4; /* number of vec4 */
2037 struct prog_instruction
*inst
;
2039 assert(n
->Opcode
== IR_ELEMENT
);
2040 assert(elemSize
> 0);
2042 /* special case for built-in state variables, like light state */
2044 slang_ir_storage
*root
= n
->Store
;
2045 assert(!root
->Parent
);
2046 while (root
->Parent
)
2047 root
= root
->Parent
;
2049 if (root
->File
== PROGRAM_STATE_VAR
) {
2052 _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2058 n
->Store
->Index
= index
;
2059 return NULL
; /* all done */
2064 /* do codegen for array itself */
2065 emit(emitInfo
, n
->Children
[0]);
2066 arrayStore
= n
->Children
[0]->Store
;
2068 /* The initial array element storage is the array's storage,
2069 * then modified below.
2071 _slang_copy_ir_storage(n
->Store
, arrayStore
);
2074 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
2075 /* Constant array index */
2076 const GLint element
= (GLint
) n
->Children
[1]->Value
[0];
2078 /* this element's storage is the array's storage, plus constant offset */
2079 n
->Store
->Index
+= elemSizeVec
* element
;
2082 /* Variable array index */
2084 /* do codegen for array index expression */
2085 emit(emitInfo
, n
->Children
[1]);
2086 indexStore
= n
->Children
[1]->Store
;
2088 if (indexStore
->IsIndirect
) {
2089 /* need to put the array index into a temporary since we can't
2090 * directly support a[b[i]] constructs.
2094 /*indexStore = tempstore();*/
2099 /* need to multiply array index by array element size */
2100 struct prog_instruction
*inst
;
2101 slang_ir_storage
*indexTemp
;
2102 slang_ir_storage elemSizeStore
;
2104 /* allocate 1 float indexTemp */
2105 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2106 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2108 /* allocate a constant containing the element size */
2109 constant_to_storage(emitInfo
, (float) elemSizeVec
, &elemSizeStore
);
2111 /* multiply array index by element size */
2112 inst
= emit_instruction(emitInfo
,
2114 indexTemp
, /* dest */
2115 indexStore
, /* the index */
2122 indexStore
= indexTemp
;
2125 if (arrayStore
->IsIndirect
) {
2126 /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
2127 /* Need to add indexStore to arrayStore->Indirect store */
2128 slang_ir_storage indirectArray
;
2129 slang_ir_storage
*indexTemp
;
2131 _slang_init_ir_storage(&indirectArray
,
2132 arrayStore
->IndirectFile
,
2133 arrayStore
->IndirectIndex
,
2135 arrayStore
->IndirectSwizzle
);
2137 /* allocate 1 float indexTemp */
2138 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2139 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2141 inst
= emit_instruction(emitInfo
,
2143 indexTemp
, /* dest */
2144 indexStore
, /* the index */
2145 &indirectArray
, /* indirect array base */
2151 indexStore
= indexTemp
;
2154 /* update the array element storage info */
2155 n
->Store
->IsIndirect
= GL_TRUE
;
2156 n
->Store
->IndirectFile
= indexStore
->File
;
2157 n
->Store
->IndirectIndex
= indexStore
->Index
;
2158 n
->Store
->IndirectSwizzle
= indexStore
->Swizzle
;
2161 n
->Store
->Size
= elemSize
;
2162 n
->Store
->Swizzle
= _slang_var_swizzle(elemSize
, 0);
2164 return NULL
; /* no instruction */
2169 * Resolve storage for accessing a structure field.
2171 static struct prog_instruction
*
2172 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2174 slang_ir_storage
*root
= n
->Store
;
2175 GLint fieldOffset
, fieldSize
;
2177 assert(n
->Opcode
== IR_FIELD
);
2179 assert(!root
->Parent
);
2180 while (root
->Parent
)
2181 root
= root
->Parent
;
2183 /* If this is the field of a state var, allocate constant/uniform
2184 * storage for it now if we haven't already.
2185 * Note that we allocate storage (uniform/constant slots) for state
2186 * variables here rather than at declaration time so we only allocate
2187 * space for the ones that we actually use!
2189 if (root
->File
== PROGRAM_STATE_VAR
) {
2191 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2193 slang_info_log_error(emitInfo
->log
, "Error parsing state variable");
2197 root
->Index
= index
;
2198 return NULL
; /* all done */
2202 /* do codegen for struct */
2203 emit(emitInfo
, n
->Children
[0]);
2204 assert(n
->Children
[0]->Store
->Index
>= 0);
2207 fieldOffset
= n
->Store
->Index
;
2208 fieldSize
= n
->Store
->Size
;
2210 _slang_copy_ir_storage(n
->Store
, n
->Children
[0]->Store
);
2212 n
->Store
->Index
= n
->Children
[0]->Store
->Index
+ fieldOffset
/ 4;
2213 n
->Store
->Size
= fieldSize
;
2215 switch (fieldSize
) {
2218 GLint swz
= fieldOffset
% 4;
2219 n
->Store
->Swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
2223 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2224 SWIZZLE_NIL
, SWIZZLE_NIL
);
2227 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2228 SWIZZLE_Z
, SWIZZLE_NIL
);
2231 n
->Store
->Swizzle
= SWIZZLE_XYZW
;
2234 assert(n
->Store
->Index
>= 0);
2236 return NULL
; /* no instruction */
2241 * Emit code for a variable declaration.
2242 * This usually doesn't result in any code generation, but just
2243 * memory allocation.
2245 static struct prog_instruction
*
2246 emit_var_decl(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2249 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2250 assert(n
->Store
->Size
> 0);
2251 /*assert(n->Store->Index < 0);*/
2253 if (!n
->Var
|| n
->Var
->isTemp
) {
2254 /* a nameless/temporary variable, will be freed after first use */
2256 if (n
->Store
->Index
< 0 && !_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
2257 slang_info_log_error(emitInfo
->log
,
2258 "Ran out of registers, too many temporaries");
2263 /* a regular variable */
2264 _slang_add_variable(emitInfo
->vt
, n
->Var
);
2265 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
2266 slang_info_log_error(emitInfo
->log
,
2267 "Ran out of registers, too many variables");
2271 printf("IR_VAR_DECL %s %d store %p\n",
2272 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2274 assert(n
->Var
->store
== n
->Store
);
2276 if (emitInfo
->EmitComments
) {
2277 /* emit NOP with comment describing the variable's storage location */
2279 _mesa_snprintf(s
, sizeof(s
), "TEMP[%d]%s = variable %s (size %d)",
2281 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
2282 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
2284 emit_comment(emitInfo
, s
);
2291 * Emit code for a reference to a variable.
2292 * Actually, no code is generated but we may do some memory allocation.
2293 * In particular, state vars (uniforms) are allocated on an as-needed basis.
2295 static struct prog_instruction
*
2296 emit_var_ref(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2299 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2301 if (n
->Store
->File
== PROGRAM_STATE_VAR
&& n
->Store
->Index
< 0) {
2303 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2307 /* XXX isn't this really an out of memory/resources error? */
2308 _mesa_snprintf(s
, sizeof(s
), "Undefined variable '%s'",
2309 (char *) n
->Var
->a_name
);
2310 slang_info_log_error(emitInfo
->log
, s
);
2314 n
->Store
->Index
= index
;
2316 else if (n
->Store
->File
== PROGRAM_UNIFORM
||
2317 n
->Store
->File
== PROGRAM_SAMPLER
) {
2318 /* mark var as used */
2319 _mesa_use_uniform(emitInfo
->prog
->Parameters
, (char *) n
->Var
->a_name
);
2321 else if (n
->Store
->File
== PROGRAM_INPUT
) {
2322 assert(n
->Store
->Index
>= 0);
2323 /* geometry shaders have the input index in the second
2325 if (emitInfo
->prog
->Target
== MESA_GEOMETRY_PROGRAM
&&
2327 emitInfo
->prog
->InputsRead
|= (1 << n
->Store
->Index2D
);
2329 emitInfo
->prog
->InputsRead
|= (1 << n
->Store
->Index
);
2332 if (n
->Store
->Index
< 0) {
2333 /* probably ran out of registers */
2336 assert(n
->Store
->Size
> 0);
2342 static struct prog_instruction
*
2343 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2345 struct prog_instruction
*inst
;
2349 if (emitInfo
->log
->error_flag
) {
2354 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
2356 inst
->Comment
= _mesa_strdup(n
->Comment
);
2361 switch (n
->Opcode
) {
2363 /* sequence of two sub-trees */
2364 assert(n
->Children
[0]);
2365 assert(n
->Children
[1]);
2366 emit(emitInfo
, n
->Children
[0]);
2367 if (emitInfo
->log
->error_flag
)
2369 inst
= emit(emitInfo
, n
->Children
[1]);
2373 if (n
->Children
[1]->Store
)
2374 n
->Store
= n
->Children
[1]->Store
;
2376 n
->Store
= n
->Children
[0]->Store
;
2380 /* new variable scope */
2381 _slang_push_var_table(emitInfo
->vt
);
2382 inst
= emit(emitInfo
, n
->Children
[0]);
2383 _slang_pop_var_table(emitInfo
->vt
);
2384 n
->Store
= n
->Children
[0]->Store
;
2388 /* Variable declaration - allocate a register for it */
2389 inst
= emit_var_decl(emitInfo
, n
);
2393 /* Reference to a variable
2394 * Storage should have already been resolved/allocated.
2396 return emit_var_ref(emitInfo
, n
);
2399 return emit_array_element(emitInfo
, n
);
2401 return emit_struct_field(emitInfo
, n
);
2403 return emit_swizzle(emitInfo
, n
);
2405 /* Simple arithmetic */
2445 /* trinary operators */
2448 return emit_arith(emitInfo
, n
);
2452 return emit_compare(emitInfo
, n
);
2455 return emit_clamp(emitInfo
, n
);
2462 return emit_tex(emitInfo
, n
);
2464 return emit_negation(emitInfo
, n
);
2466 /* find storage location for this float constant */
2467 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
2470 &n
->Store
->Swizzle
);
2471 if (n
->Store
->Index
< 0) {
2472 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
2478 return emit_copy(emitInfo
, n
);
2481 return emit_cond(emitInfo
, n
);
2484 return emit_not(emitInfo
, n
);
2487 return emit_label(emitInfo
, n
);
2490 return emit_kill(emitInfo
);
2493 /* new variable scope for subroutines/function calls */
2494 _slang_push_var_table(emitInfo
->vt
);
2495 inst
= emit_fcall(emitInfo
, n
);
2496 _slang_pop_var_table(emitInfo
->vt
);
2500 return emit_if(emitInfo
, n
);
2503 return emit_loop(emitInfo
, n
);
2504 case IR_BREAK_IF_TRUE
:
2505 case IR_CONT_IF_TRUE
:
2506 return emit_cont_break_if_true(emitInfo
, n
);
2510 return emit_cont_break(emitInfo
, n
);
2513 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
2515 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
2517 return emit_return(emitInfo
, n
);
2522 case IR_EMIT_VERTEX
:
2523 return new_instruction(emitInfo
, OPCODE_EMIT_VERTEX
);
2524 case IR_END_PRIMITIVE
:
2525 return new_instruction(emitInfo
, OPCODE_END_PRIMITIVE
);
2528 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
2535 * After code generation, any subroutines will be in separate program
2536 * objects. This function appends all the subroutines onto the main
2537 * program and resolves the linking of all the branch/call instructions.
2538 * XXX this logic should really be part of the linking process...
2541 _slang_resolve_subroutines(slang_emit_info
*emitInfo
)
2543 GET_CURRENT_CONTEXT(ctx
);
2544 struct gl_program
*mainP
= emitInfo
->prog
;
2545 GLuint
*subroutineLoc
, i
, total
;
2548 = (GLuint
*) malloc(emitInfo
->NumSubroutines
* sizeof(GLuint
));
2550 /* total number of instructions */
2551 total
= mainP
->NumInstructions
;
2552 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2553 subroutineLoc
[i
] = total
;
2554 total
+= emitInfo
->Subroutines
[i
]->NumInstructions
;
2557 /* adjust BranchTargets within the functions */
2558 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2559 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2561 for (j
= 0; j
< sub
->NumInstructions
; j
++) {
2562 struct prog_instruction
*inst
= sub
->Instructions
+ j
;
2563 if (inst
->Opcode
!= OPCODE_CAL
&& inst
->BranchTarget
>= 0) {
2564 inst
->BranchTarget
+= subroutineLoc
[i
];
2569 /* append subroutines' instructions after main's instructions */
2570 mainP
->Instructions
= _mesa_realloc_instructions(mainP
->Instructions
,
2571 mainP
->NumInstructions
,
2573 mainP
->NumInstructions
= total
;
2574 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2575 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2576 _mesa_copy_instructions(mainP
->Instructions
+ subroutineLoc
[i
],
2578 sub
->NumInstructions
);
2579 /* delete subroutine code */
2580 sub
->Parameters
= NULL
; /* prevent double-free */
2581 _mesa_reference_program(ctx
, &emitInfo
->Subroutines
[i
], NULL
);
2584 /* free subroutine list */
2585 if (emitInfo
->Subroutines
) {
2586 free(emitInfo
->Subroutines
);
2587 emitInfo
->Subroutines
= NULL
;
2589 emitInfo
->NumSubroutines
= 0;
2591 /* Examine CAL instructions.
2592 * At this point, the BranchTarget field of the CAL instruction is
2593 * the number/id of the subroutine to call (an index into the
2594 * emitInfo->Subroutines list).
2595 * Translate that into an actual instruction location now.
2597 for (i
= 0; i
< mainP
->NumInstructions
; i
++) {
2598 struct prog_instruction
*inst
= mainP
->Instructions
+ i
;
2599 if (inst
->Opcode
== OPCODE_CAL
) {
2600 const GLuint f
= inst
->BranchTarget
;
2601 inst
->BranchTarget
= subroutineLoc
[f
];
2605 free(subroutineLoc
);
2611 * Convert the IR tree into GPU instructions.
2612 * \param n root of IR tree
2613 * \param vt variable table
2614 * \param prog program to put GPU instructions into
2615 * \param pragmas controls codegen options
2616 * \param withEnd if true, emit END opcode at end
2617 * \param log log for emitting errors/warnings/info
2620 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
2621 struct gl_program
*prog
,
2622 const struct gl_sl_pragmas
*pragmas
,
2624 slang_info_log
*log
)
2626 GET_CURRENT_CONTEXT(ctx
);
2628 slang_emit_info emitInfo
;
2633 emitInfo
.prog
= prog
;
2634 emitInfo
.Subroutines
= NULL
;
2635 emitInfo
.NumSubroutines
= 0;
2636 emitInfo
.MaxInstructions
= prog
->NumInstructions
;
2638 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
2639 emitInfo
.EmitCondCodes
= ctx
->Shader
.EmitCondCodes
;
2640 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
|| pragmas
->Debug
;
2641 emitInfo
.EmitBeginEndSub
= GL_TRUE
;
2643 if (!emitInfo
.EmitCondCodes
) {
2644 emitInfo
.EmitHighLevelInstructions
= GL_TRUE
;
2647 /* Check uniform/constant limits */
2648 if (prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
2649 maxUniforms
= ctx
->Const
.FragmentProgram
.MaxUniformComponents
/ 4;
2651 else if (prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
2652 maxUniforms
= ctx
->Const
.VertexProgram
.MaxUniformComponents
/ 4;
2654 assert(prog
->Target
== MESA_GEOMETRY_PROGRAM
);
2655 maxUniforms
= ctx
->Const
.GeometryProgram
.MaxUniformComponents
/ 4;
2657 if (prog
->Parameters
->NumParameters
> maxUniforms
) {
2658 slang_info_log_error(log
, "Constant/uniform register limit exceeded "
2659 "(max=%u vec4)", maxUniforms
);
2664 (void) emit(&emitInfo
, n
);
2666 /* finish up by adding the END opcode to program */
2668 struct prog_instruction
*inst
;
2669 inst
= new_instruction(&emitInfo
, OPCODE_END
);
2675 _slang_resolve_subroutines(&emitInfo
);
2680 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
2681 _mesa_print_program(prog
);
2682 _mesa_print_program_parameters(ctx
,prog
);