st/mesa: Pull nir_lower_wpos_ytransform work into a helper function.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "st_context.h"
40 #include "st_glsl_types.h"
41 #include "st_program.h"
42
43 #include "compiler/nir/nir.h"
44 #include "compiler/glsl_types.h"
45 #include "compiler/glsl/glsl_to_nir.h"
46 #include "compiler/glsl/gl_nir.h"
47 #include "compiler/glsl/ir.h"
48 #include "compiler/glsl/ir_optimization.h"
49 #include "compiler/glsl/string_to_uint_map.h"
50
51
52 static int
53 type_size(const struct glsl_type *type)
54 {
55 return type->count_attribute_slots(false);
56 }
57
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
61 */
62 static void
63 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
64 {
65 if (st->needs_texcoord_semantic)
66 return;
67
68 nir_foreach_variable(var, var_list) {
69 if (var->data.location >= VARYING_SLOT_VAR0) {
70 var->data.location += 9;
71 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
72 (var->data.location <= VARYING_SLOT_TEX7)) {
73 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
74 }
75 }
76 }
77
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
82 */
83 static void
84 st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
85 {
86 nir->num_inputs = 0;
87 nir_foreach_variable_safe(var, &nir->inputs) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
90 */
91 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var->data.driver_location = util_bitcount64(nir->info.inputs_read);
94 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
95 var->data.driver_location =
96 util_bitcount64(nir->info.inputs_read &
97 BITFIELD64_MASK(var->data.location));
98 nir->num_inputs++;
99 } else {
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
103 * set.
104 */
105 exec_node_remove(&var->node);
106 var->data.mode = nir_var_global;
107 exec_list_push_tail(&nir->globals, &var->node);
108 }
109 }
110 }
111
112 static void
113 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
114 gl_shader_stage stage)
115 {
116 unsigned location = 0;
117 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
118 uint64_t processed_locs[2] = {0};
119
120 const int base = stage == MESA_SHADER_FRAGMENT ?
121 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
122
123 int UNUSED last_loc = 0;
124 nir_foreach_variable(var, var_list) {
125
126 const struct glsl_type *type = var->type;
127 if (nir_is_per_vertex_io(var, stage)) {
128 assert(glsl_type_is_array(type));
129 type = glsl_get_array_element(type);
130 }
131
132 unsigned var_size = type_size(type);
133
134 /* Builtins don't allow component packing so we only need to worry about
135 * user defined varyings sharing the same location.
136 */
137 bool processed = false;
138 if (var->data.location >= base) {
139 unsigned glsl_location = var->data.location - base;
140
141 for (unsigned i = 0; i < var_size; i++) {
142 if (processed_locs[var->data.index] &
143 ((uint64_t)1 << (glsl_location + i)))
144 processed = true;
145 else
146 processed_locs[var->data.index] |=
147 ((uint64_t)1 << (glsl_location + i));
148 }
149 }
150
151 /* Because component packing allows varyings to share the same location
152 * we may have already have processed this location.
153 */
154 if (processed) {
155 unsigned driver_location = assigned_locations[var->data.location];
156 var->data.driver_location = driver_location;
157 *size += type_size(type);
158
159 /* An array may be packed such that is crosses multiple other arrays
160 * or variables, we need to make sure we have allocated the elements
161 * consecutively if the previously proccessed var was shorter than
162 * the current array we are processing.
163 *
164 * NOTE: The code below assumes the var list is ordered in ascending
165 * location order.
166 */
167 assert(last_loc <= var->data.location);
168 last_loc = var->data.location;
169 unsigned last_slot_location = driver_location + var_size;
170 if (last_slot_location > location) {
171 unsigned num_unallocated_slots = last_slot_location - location;
172 unsigned first_unallocated_slot = var_size - num_unallocated_slots;
173 for (unsigned i = first_unallocated_slot; i < num_unallocated_slots; i++) {
174 assigned_locations[var->data.location + i] = location;
175 location++;
176 }
177 }
178 continue;
179 }
180
181 for (unsigned i = 0; i < var_size; i++) {
182 assigned_locations[var->data.location + i] = location + i;
183 }
184
185 var->data.driver_location = location;
186 location += var_size;
187 }
188
189 *size += location;
190 }
191
192 static int
193 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
194 const char *name)
195 {
196 int loc = _mesa_lookup_parameter_index(params, name);
197
198 /* is there a better way to do this? If we have something like:
199 *
200 * struct S {
201 * float f;
202 * vec4 v;
203 * };
204 * uniform S color;
205 *
206 * Then what we get in prog->Parameters looks like:
207 *
208 * 0: Name=color.f, Type=6, DataType=1406, Size=1
209 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
210 *
211 * So the name doesn't match up and _mesa_lookup_parameter_index()
212 * fails. In this case just find the first matching "color.*"..
213 *
214 * Note for arrays you could end up w/ color[n].f, for example.
215 *
216 * glsl_to_tgsi works slightly differently in this regard. It is
217 * emitting something more low level, so it just translates the
218 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
219 * it just calculates the additional offset of struct field members
220 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
221 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
222 * needs to work backwards to get base var loc from the param-list
223 * which already has them separated out.
224 */
225 if (loc < 0) {
226 int namelen = strlen(name);
227 for (unsigned i = 0; i < params->NumParameters; i++) {
228 struct gl_program_parameter *p = &params->Parameters[i];
229 if ((strncmp(p->Name, name, namelen) == 0) &&
230 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
231 loc = i;
232 break;
233 }
234 }
235 }
236
237 return loc;
238 }
239
240 static void
241 st_nir_assign_uniform_locations(struct gl_context *ctx,
242 struct gl_program *prog,
243 struct gl_shader_program *shader_program,
244 struct exec_list *uniform_list, unsigned *size)
245 {
246 int max = 0;
247 int shaderidx = 0;
248 int imageidx = 0;
249
250 nir_foreach_variable(uniform, uniform_list) {
251 int loc;
252
253 /*
254 * UBO's have their own address spaces, so don't count them towards the
255 * number of global uniforms
256 */
257 if ((uniform->data.mode == nir_var_uniform || uniform->data.mode == nir_var_shader_storage) &&
258 uniform->interface_type != NULL)
259 continue;
260
261 const struct glsl_type *type = glsl_without_array(uniform->type);
262 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
263 if (type->is_sampler()) {
264 loc = shaderidx;
265 shaderidx += type_size(uniform->type);
266 } else {
267 loc = imageidx;
268 imageidx += type_size(uniform->type);
269 }
270 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
271 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
272 /* This state reference has already been setup by ir_to_mesa, but we'll
273 * get the same index back here.
274 */
275
276 unsigned comps;
277 if (glsl_type_is_struct(type)) {
278 comps = 4;
279 } else {
280 comps = glsl_get_vector_elements(type);
281 }
282
283 if (ctx->Const.PackedDriverUniformStorage) {
284 loc = _mesa_add_sized_state_reference(prog->Parameters,
285 stateTokens, comps, false);
286 loc = prog->Parameters->ParameterValueOffset[loc];
287 } else {
288 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
289 }
290 } else {
291 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
292
293 if (ctx->Const.PackedDriverUniformStorage) {
294 loc = prog->Parameters->ParameterValueOffset[loc];
295 }
296 }
297
298 uniform->data.driver_location = loc;
299
300 max = MAX2(max, loc + type_size(uniform->type));
301 }
302 *size = max;
303 }
304
305 void
306 st_nir_opts(nir_shader *nir, bool scalar)
307 {
308 bool progress;
309 do {
310 progress = false;
311
312 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
313
314 if (scalar) {
315 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
316 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
317 }
318
319 NIR_PASS_V(nir, nir_lower_alu);
320 NIR_PASS_V(nir, nir_lower_pack);
321 NIR_PASS(progress, nir, nir_copy_prop);
322 NIR_PASS(progress, nir, nir_opt_remove_phis);
323 NIR_PASS(progress, nir, nir_opt_dce);
324 if (nir_opt_trivial_continues(nir)) {
325 progress = true;
326 NIR_PASS(progress, nir, nir_copy_prop);
327 NIR_PASS(progress, nir, nir_opt_dce);
328 }
329 NIR_PASS(progress, nir, nir_opt_if);
330 NIR_PASS(progress, nir, nir_opt_dead_cf);
331 NIR_PASS(progress, nir, nir_opt_cse);
332 NIR_PASS(progress, nir, nir_opt_peephole_select, 8);
333
334 NIR_PASS(progress, nir, nir_opt_algebraic);
335 NIR_PASS(progress, nir, nir_opt_constant_folding);
336
337 NIR_PASS(progress, nir, nir_opt_undef);
338 NIR_PASS(progress, nir, nir_opt_conditional_discard);
339 if (nir->options->max_unroll_iterations) {
340 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
341 }
342 } while (progress);
343 }
344
345 /* First third of converting glsl_to_nir.. this leaves things in a pre-
346 * nir_lower_io state, so that shader variants can more easily insert/
347 * replace variables, etc.
348 */
349 static nir_shader *
350 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
351 struct gl_shader_program *shader_program,
352 gl_shader_stage stage)
353 {
354 const nir_shader_compiler_options *options =
355 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
356 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
357 struct pipe_screen *screen = st->pipe->screen;
358 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
359 assert(options);
360
361 if (prog->nir)
362 return prog->nir;
363
364 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
365
366 /* Set the next shader stage hint for VS and TES. */
367 if (!nir->info.separate_shader &&
368 (nir->info.stage == MESA_SHADER_VERTEX ||
369 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
370
371 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
372 unsigned stages_mask =
373 ~prev_stages & shader_program->data->linked_stages;
374
375 nir->info.next_stage = stages_mask ?
376 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
377 } else {
378 nir->info.next_stage = MESA_SHADER_FRAGMENT;
379 }
380
381 nir_variable_mode mask =
382 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
383 nir_remove_dead_variables(nir, mask);
384
385 if (options->lower_all_io_to_temps ||
386 nir->info.stage == MESA_SHADER_VERTEX ||
387 nir->info.stage == MESA_SHADER_GEOMETRY) {
388 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
389 nir_shader_get_entrypoint(nir),
390 true, true);
391 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
392 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
393 nir_shader_get_entrypoint(nir),
394 true, false);
395 }
396
397 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
398 NIR_PASS_V(nir, nir_split_var_copies);
399 NIR_PASS_V(nir, nir_lower_var_copies);
400
401 st_nir_opts(nir, is_scalar);
402
403 return nir;
404 }
405
406 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
407 * info on varyings, etc after NIR link time opts have been applied.
408 */
409 static void
410 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
411 struct gl_shader_program *shader_program)
412 {
413 nir_shader *nir = prog->nir;
414
415 /* Make a pass over the IR to add state references for any built-in
416 * uniforms that are used. This has to be done now (during linking).
417 * Code generation doesn't happen until the first time this shader is
418 * used for rendering. Waiting until then to generate the parameters is
419 * too late. At that point, the values for the built-in uniforms won't
420 * get sent to the shader.
421 */
422 nir_foreach_variable(var, &nir->uniforms) {
423 if (strncmp(var->name, "gl_", 3) == 0) {
424 const nir_state_slot *const slots = var->state_slots;
425 assert(var->state_slots != NULL);
426
427 const struct glsl_type *type = glsl_without_array(var->type);
428 for (unsigned int i = 0; i < var->num_state_slots; i++) {
429 unsigned comps;
430 if (glsl_type_is_struct(type)) {
431 /* Builtin struct require specical handling for now we just
432 * make all members vec4. See st_nir_lower_builtin.
433 */
434 comps = 4;
435 } else {
436 comps = glsl_get_vector_elements(type);
437 }
438
439 if (st->ctx->Const.PackedDriverUniformStorage) {
440 _mesa_add_sized_state_reference(prog->Parameters,
441 slots[i].tokens,
442 comps, false);
443 } else {
444 _mesa_add_state_reference(prog->Parameters,
445 slots[i].tokens);
446 }
447 }
448 }
449 }
450
451 /* Avoid reallocation of the program parameter list, because the uniform
452 * storage is only associated with the original parameter list.
453 * This should be enough for Bitmap and DrawPixels constants.
454 */
455 _mesa_reserve_parameter_storage(prog->Parameters, 8);
456
457 /* This has to be done last. Any operation the can cause
458 * prog->ParameterValues to get reallocated (e.g., anything that adds a
459 * program constant) has to happen before creating this linkage.
460 */
461 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
462
463 st_set_prog_affected_state_flags(prog);
464
465 NIR_PASS_V(nir, st_nir_lower_builtin);
466 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
467
468 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
469 _mesa_log("\n");
470 _mesa_log("NIR IR for linked %s program %d:\n",
471 _mesa_shader_stage_to_string(prog->info.stage),
472 shader_program->Name);
473 nir_print_shader(nir, _mesa_get_log_file());
474 _mesa_log("\n\n");
475 }
476 }
477
478 /* TODO any better helper somewhere to sort a list? */
479
480 static void
481 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
482 {
483 nir_foreach_variable(var, var_list) {
484 if (var->data.location > new_var->data.location) {
485 exec_node_insert_node_before(&var->node, &new_var->node);
486 return;
487 }
488 }
489 exec_list_push_tail(var_list, &new_var->node);
490 }
491
492 static void
493 sort_varyings(struct exec_list *var_list)
494 {
495 struct exec_list new_list;
496 exec_list_make_empty(&new_list);
497 nir_foreach_variable_safe(var, var_list) {
498 exec_node_remove(&var->node);
499 insert_sorted(&new_list, var);
500 }
501 exec_list_move_nodes_to(&new_list, var_list);
502 }
503
504 static void
505 set_st_program(struct gl_program *prog,
506 struct gl_shader_program *shader_program,
507 nir_shader *nir)
508 {
509 struct st_vertex_program *stvp;
510 struct st_common_program *stp;
511 struct st_fragment_program *stfp;
512 struct st_compute_program *stcp;
513
514 switch (prog->info.stage) {
515 case MESA_SHADER_VERTEX:
516 stvp = (struct st_vertex_program *)prog;
517 stvp->shader_program = shader_program;
518 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
519 stvp->tgsi.ir.nir = nir;
520 break;
521 case MESA_SHADER_GEOMETRY:
522 case MESA_SHADER_TESS_CTRL:
523 case MESA_SHADER_TESS_EVAL:
524 stp = (struct st_common_program *)prog;
525 stp->shader_program = shader_program;
526 stp->tgsi.type = PIPE_SHADER_IR_NIR;
527 stp->tgsi.ir.nir = nir;
528 break;
529 case MESA_SHADER_FRAGMENT:
530 stfp = (struct st_fragment_program *)prog;
531 stfp->shader_program = shader_program;
532 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
533 stfp->tgsi.ir.nir = nir;
534 break;
535 case MESA_SHADER_COMPUTE:
536 stcp = (struct st_compute_program *)prog;
537 stcp->shader_program = shader_program;
538 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
539 stcp->tgsi.prog = nir;
540 break;
541 default:
542 unreachable("unknown shader stage");
543 }
544 }
545
546 static void
547 st_nir_get_mesa_program(struct gl_context *ctx,
548 struct gl_shader_program *shader_program,
549 struct gl_linked_shader *shader)
550 {
551 struct st_context *st = st_context(ctx);
552 struct pipe_screen *pscreen = ctx->st->pipe->screen;
553 struct gl_program *prog;
554
555 validate_ir_tree(shader->ir);
556
557 prog = shader->Program;
558
559 prog->Parameters = _mesa_new_parameter_list();
560
561 _mesa_copy_linked_program_data(shader_program, shader);
562 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
563 prog->Parameters);
564
565 /* Remove reads from output registers. */
566 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
567 lower_output_reads(shader->Stage, shader->ir);
568
569 if (ctx->_Shader->Flags & GLSL_DUMP) {
570 _mesa_log("\n");
571 _mesa_log("GLSL IR for linked %s program %d:\n",
572 _mesa_shader_stage_to_string(shader->Stage),
573 shader_program->Name);
574 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
575 _mesa_log("\n\n");
576 }
577
578 prog->ExternalSamplersUsed = gl_external_samplers(prog);
579 _mesa_update_shader_textures_used(shader_program, prog);
580
581 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
582
583 set_st_program(prog, shader_program, nir);
584 prog->nir = nir;
585 }
586
587 static void
588 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
589 {
590 nir_lower_io_arrays_to_elements(*producer, *consumer);
591
592 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
593 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
594
595 if (nir_remove_unused_varyings(*producer, *consumer)) {
596 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
597 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
598
599 /* The backend might not be able to handle indirects on
600 * temporaries so we need to lower indirects on any of the
601 * varyings we have demoted here.
602 *
603 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
604 * currently smart enough to handle indirects without causing excess
605 * spilling causing the gpu to hang.
606 *
607 * See the following thread for more details of the problem:
608 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
609 */
610 nir_variable_mode indirect_mask = nir_var_local;
611
612 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
613 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
614
615 st_nir_opts(*producer, scalar);
616 st_nir_opts(*consumer, scalar);
617 }
618 }
619
620 extern "C" {
621
622 void
623 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
624 struct gl_program *prog,
625 struct pipe_screen *pscreen)
626 {
627 if (nir->info.stage != MESA_SHADER_FRAGMENT)
628 return;
629
630 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
631 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
632 };
633 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
634
635 memcpy(wpos_options.state_tokens, wposTransformState,
636 sizeof(wpos_options.state_tokens));
637 wpos_options.fs_coord_origin_upper_left =
638 pscreen->get_param(pscreen,
639 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
640 wpos_options.fs_coord_origin_lower_left =
641 pscreen->get_param(pscreen,
642 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
643 wpos_options.fs_coord_pixel_center_integer =
644 pscreen->get_param(pscreen,
645 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
646 wpos_options.fs_coord_pixel_center_half_integer =
647 pscreen->get_param(pscreen,
648 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
649
650 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
651 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
652 _mesa_add_state_reference(prog->Parameters, wposTransformState);
653 }
654 }
655
656 bool
657 st_link_nir(struct gl_context *ctx,
658 struct gl_shader_program *shader_program)
659 {
660 struct st_context *st = st_context(ctx);
661 struct pipe_screen *screen = st->pipe->screen;
662 bool is_scalar[MESA_SHADER_STAGES];
663
664 /* Determine scalar property of each shader stage */
665 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
666 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
667 enum pipe_shader_type type;
668
669 if (shader == NULL)
670 continue;
671
672 type = pipe_shader_type_from_mesa(shader->Stage);
673 is_scalar[i] = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
674 }
675
676 /* Determine first and last stage. */
677 unsigned first = MESA_SHADER_STAGES;
678 unsigned last = 0;
679 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
680 if (!shader_program->_LinkedShaders[i])
681 continue;
682 if (first == MESA_SHADER_STAGES)
683 first = i;
684 last = i;
685 }
686
687 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
688 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
689 if (shader == NULL)
690 continue;
691
692 st_nir_get_mesa_program(ctx, shader_program, shader);
693
694 nir_variable_mode mask = (nir_variable_mode) 0;
695 if (i != first)
696 mask = (nir_variable_mode)(mask | nir_var_shader_in);
697
698 if (i != last)
699 mask = (nir_variable_mode)(mask | nir_var_shader_out);
700
701 nir_shader *nir = shader->Program->nir;
702
703 if (is_scalar[i])
704 NIR_PASS_V(nir, nir_lower_io_to_scalar_early, mask);
705
706 st_nir_opts(nir, is_scalar[i]);
707 }
708
709 /* Linking the stages in the opposite order (from fragment to vertex)
710 * ensures that inter-shader outputs written to in an earlier stage
711 * are eliminated if they are (transitively) not used in a later
712 * stage.
713 */
714 int next = last;
715 for (int i = next - 1; i >= 0; i--) {
716 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
717 if (shader == NULL)
718 continue;
719
720 st_nir_link_shaders(&shader->Program->nir,
721 &shader_program->_LinkedShaders[next]->Program->nir,
722 is_scalar[i]);
723 next = i;
724 }
725
726 int prev = -1;
727 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
728 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
729 if (shader == NULL)
730 continue;
731
732 nir_shader *nir = shader->Program->nir;
733
734 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
735 st->pipe->screen);
736
737 NIR_PASS_V(nir, nir_lower_system_values);
738
739 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
740 shader->Program->info = nir->info;
741 if (i == MESA_SHADER_VERTEX) {
742 /* NIR expands dual-slot inputs out to two locations. We need to
743 * compact things back down GL-style single-slot inputs to avoid
744 * confusing the state tracker.
745 */
746 shader->Program->info.inputs_read =
747 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
748 shader->Program->DualSlotInputs);
749 }
750
751 if (prev != -1) {
752 struct gl_program *prev_shader =
753 shader_program->_LinkedShaders[prev]->Program;
754
755 /* We can't use nir_compact_varyings with transform feedback, since
756 * the pipe_stream_output->output_register field is based on the
757 * pre-compacted driver_locations.
758 */
759 if (!prev_shader->sh.LinkedTransformFeedback)
760 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
761 nir, ctx->API != API_OPENGL_COMPAT);
762 }
763 prev = i;
764 }
765
766 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
767 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
768 if (shader == NULL)
769 continue;
770
771 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
772
773 assert(shader->Program);
774 if (!ctx->Driver.ProgramStringNotify(ctx,
775 _mesa_shader_stage_to_program(i),
776 shader->Program)) {
777 _mesa_reference_program(ctx, &shader->Program, NULL);
778 return false;
779 }
780
781 nir_sweep(shader->Program->nir);
782 }
783
784 return true;
785 }
786
787 /* Last third of preparing nir from glsl, which happens after shader
788 * variant lowering.
789 */
790 void
791 st_finalize_nir(struct st_context *st, struct gl_program *prog,
792 struct gl_shader_program *shader_program, nir_shader *nir)
793 {
794 struct pipe_screen *screen = st->pipe->screen;
795 const nir_shader_compiler_options *options =
796 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
797
798 NIR_PASS_V(nir, nir_split_var_copies);
799 NIR_PASS_V(nir, nir_lower_var_copies);
800 if (options->lower_all_io_to_temps ||
801 nir->info.stage == MESA_SHADER_VERTEX ||
802 nir->info.stage == MESA_SHADER_GEOMETRY) {
803 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
804 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
805 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
806 }
807
808 if (nir->info.stage == MESA_SHADER_VERTEX) {
809 /* Needs special handling so drvloc matches the vbo state: */
810 st_nir_assign_vs_in_locations(prog, nir);
811 /* Re-lower global vars, to deal with any dead VS inputs. */
812 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
813
814 sort_varyings(&nir->outputs);
815 st_nir_assign_var_locations(&nir->outputs,
816 &nir->num_outputs,
817 nir->info.stage);
818 st_nir_fixup_varying_slots(st, &nir->outputs);
819 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
820 nir->info.stage == MESA_SHADER_TESS_CTRL ||
821 nir->info.stage == MESA_SHADER_TESS_EVAL) {
822 sort_varyings(&nir->inputs);
823 st_nir_assign_var_locations(&nir->inputs,
824 &nir->num_inputs,
825 nir->info.stage);
826 st_nir_fixup_varying_slots(st, &nir->inputs);
827
828 sort_varyings(&nir->outputs);
829 st_nir_assign_var_locations(&nir->outputs,
830 &nir->num_outputs,
831 nir->info.stage);
832 st_nir_fixup_varying_slots(st, &nir->outputs);
833 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
834 sort_varyings(&nir->inputs);
835 st_nir_assign_var_locations(&nir->inputs,
836 &nir->num_inputs,
837 nir->info.stage);
838 st_nir_fixup_varying_slots(st, &nir->inputs);
839 st_nir_assign_var_locations(&nir->outputs,
840 &nir->num_outputs,
841 nir->info.stage);
842 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
843 /* TODO? */
844 } else {
845 unreachable("invalid shader type for tgsi bypass\n");
846 }
847
848 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
849 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
850
851 st_nir_assign_uniform_locations(st->ctx, prog, shader_program,
852 &nir->uniforms, &nir->num_uniforms);
853
854 if (st->ctx->Const.PackedDriverUniformStorage) {
855 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
856 (nir_lower_io_options)0);
857 NIR_PASS_V(nir, st_nir_lower_uniforms_to_ubo);
858 }
859
860 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
861 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
862 else
863 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
864 }
865
866 } /* extern "C" */