nir: Move nir_lower_uniforms_to_ubo to compiler/nir.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "main/shaderobj.h"
40 #include "st_context.h"
41 #include "st_glsl_types.h"
42 #include "st_program.h"
43
44 #include "compiler/nir/nir.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/glsl_to_nir.h"
47 #include "compiler/glsl/gl_nir.h"
48 #include "compiler/glsl/ir.h"
49 #include "compiler/glsl/ir_optimization.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51 #include "compiler/glsl/float64_glsl.h"
52
53 static int
54 type_size(const struct glsl_type *type)
55 {
56 return type->count_attribute_slots(false);
57 }
58
59 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
60 * may need to fix up varying slots so the glsl->nir path is aligned
61 * with the anything->tgsi->nir path.
62 */
63 static void
64 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
65 {
66 if (st->needs_texcoord_semantic)
67 return;
68
69 nir_foreach_variable(var, var_list) {
70 if (var->data.location >= VARYING_SLOT_VAR0) {
71 var->data.location += 9;
72 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
73 (var->data.location <= VARYING_SLOT_TEX7)) {
74 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
75 }
76 }
77 }
78
79 /* input location assignment for VS inputs must be handled specially, so
80 * that it is aligned w/ st's vbo state.
81 * (This isn't the case with, for ex, FS inputs, which only need to agree
82 * on varying-slot w/ the VS outputs)
83 */
84 static void
85 st_nir_assign_vs_in_locations(nir_shader *nir)
86 {
87 nir->num_inputs = 0;
88 nir_foreach_variable_safe(var, &nir->inputs) {
89 /* NIR already assigns dual-slot inputs to two locations so all we have
90 * to do is compact everything down.
91 */
92 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
93 /* bit of a hack, mirroring st_translate_vertex_program */
94 var->data.driver_location = util_bitcount64(nir->info.inputs_read);
95 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
96 var->data.driver_location =
97 util_bitcount64(nir->info.inputs_read &
98 BITFIELD64_MASK(var->data.location));
99 nir->num_inputs++;
100 } else {
101 /* Move unused input variables to the globals list (with no
102 * initialization), to avoid confusing drivers looking through the
103 * inputs array and expecting to find inputs with a driver_location
104 * set.
105 */
106 exec_node_remove(&var->node);
107 var->data.mode = nir_var_shader_temp;
108 exec_list_push_tail(&nir->globals, &var->node);
109 }
110 }
111 }
112
113 static void
114 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
115 gl_shader_stage stage)
116 {
117 unsigned location = 0;
118 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
119 uint64_t processed_locs[2] = {0};
120
121 const int base = stage == MESA_SHADER_FRAGMENT ?
122 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
123
124 int UNUSED last_loc = 0;
125 nir_foreach_variable(var, var_list) {
126
127 const struct glsl_type *type = var->type;
128 if (nir_is_per_vertex_io(var, stage)) {
129 assert(glsl_type_is_array(type));
130 type = glsl_get_array_element(type);
131 }
132
133 unsigned var_size = type_size(type);
134
135 /* Builtins don't allow component packing so we only need to worry about
136 * user defined varyings sharing the same location.
137 */
138 bool processed = false;
139 if (var->data.location >= base) {
140 unsigned glsl_location = var->data.location - base;
141
142 for (unsigned i = 0; i < var_size; i++) {
143 if (processed_locs[var->data.index] &
144 ((uint64_t)1 << (glsl_location + i)))
145 processed = true;
146 else
147 processed_locs[var->data.index] |=
148 ((uint64_t)1 << (glsl_location + i));
149 }
150 }
151
152 /* Because component packing allows varyings to share the same location
153 * we may have already have processed this location.
154 */
155 if (processed) {
156 unsigned driver_location = assigned_locations[var->data.location];
157 var->data.driver_location = driver_location;
158 *size += type_size(type);
159
160 /* An array may be packed such that is crosses multiple other arrays
161 * or variables, we need to make sure we have allocated the elements
162 * consecutively if the previously proccessed var was shorter than
163 * the current array we are processing.
164 *
165 * NOTE: The code below assumes the var list is ordered in ascending
166 * location order.
167 */
168 assert(last_loc <= var->data.location);
169 last_loc = var->data.location;
170 unsigned last_slot_location = driver_location + var_size;
171 if (last_slot_location > location) {
172 unsigned num_unallocated_slots = last_slot_location - location;
173 unsigned first_unallocated_slot = var_size - num_unallocated_slots;
174 for (unsigned i = first_unallocated_slot; i < num_unallocated_slots; i++) {
175 assigned_locations[var->data.location + i] = location;
176 location++;
177 }
178 }
179 continue;
180 }
181
182 for (unsigned i = 0; i < var_size; i++) {
183 assigned_locations[var->data.location + i] = location + i;
184 }
185
186 var->data.driver_location = location;
187 location += var_size;
188 }
189
190 *size += location;
191 }
192
193 static int
194 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
195 const char *name)
196 {
197 int loc = _mesa_lookup_parameter_index(params, name);
198
199 /* is there a better way to do this? If we have something like:
200 *
201 * struct S {
202 * float f;
203 * vec4 v;
204 * };
205 * uniform S color;
206 *
207 * Then what we get in prog->Parameters looks like:
208 *
209 * 0: Name=color.f, Type=6, DataType=1406, Size=1
210 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
211 *
212 * So the name doesn't match up and _mesa_lookup_parameter_index()
213 * fails. In this case just find the first matching "color.*"..
214 *
215 * Note for arrays you could end up w/ color[n].f, for example.
216 *
217 * glsl_to_tgsi works slightly differently in this regard. It is
218 * emitting something more low level, so it just translates the
219 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
220 * it just calculates the additional offset of struct field members
221 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
222 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
223 * needs to work backwards to get base var loc from the param-list
224 * which already has them separated out.
225 */
226 if (loc < 0) {
227 int namelen = strlen(name);
228 for (unsigned i = 0; i < params->NumParameters; i++) {
229 struct gl_program_parameter *p = &params->Parameters[i];
230 if ((strncmp(p->Name, name, namelen) == 0) &&
231 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
232 loc = i;
233 break;
234 }
235 }
236 }
237
238 return loc;
239 }
240
241 static void
242 st_nir_assign_uniform_locations(struct gl_context *ctx,
243 struct gl_program *prog,
244 struct exec_list *uniform_list, unsigned *size)
245 {
246 int max = 0;
247 int shaderidx = 0;
248 int imageidx = 0;
249
250 nir_foreach_variable(uniform, uniform_list) {
251 int loc;
252
253 /*
254 * UBO's have their own address spaces, so don't count them towards the
255 * number of global uniforms
256 */
257 if (uniform->data.mode == nir_var_mem_ubo || uniform->data.mode == nir_var_mem_ssbo)
258 continue;
259
260 const struct glsl_type *type = glsl_without_array(uniform->type);
261 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
262 if (type->is_sampler()) {
263 loc = shaderidx;
264 shaderidx += type_size(uniform->type);
265 } else {
266 loc = imageidx;
267 imageidx += type_size(uniform->type);
268 }
269 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
270 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
271 /* This state reference has already been setup by ir_to_mesa, but we'll
272 * get the same index back here.
273 */
274
275 unsigned comps;
276 if (glsl_type_is_struct(type)) {
277 comps = 4;
278 } else {
279 comps = glsl_get_vector_elements(type);
280 }
281
282 if (ctx->Const.PackedDriverUniformStorage) {
283 loc = _mesa_add_sized_state_reference(prog->Parameters,
284 stateTokens, comps, false);
285 loc = prog->Parameters->ParameterValueOffset[loc];
286 } else {
287 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
288 }
289 } else {
290 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
291
292 if (ctx->Const.PackedDriverUniformStorage) {
293 loc = prog->Parameters->ParameterValueOffset[loc];
294 }
295 }
296
297 uniform->data.driver_location = loc;
298
299 max = MAX2(max, loc + type_size(uniform->type));
300 }
301 *size = max;
302 }
303
304 void
305 st_nir_opts(nir_shader *nir, bool scalar)
306 {
307 bool progress;
308 do {
309 progress = false;
310
311 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
312
313 if (scalar) {
314 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
315 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
316 }
317
318 NIR_PASS_V(nir, nir_lower_alu);
319 NIR_PASS_V(nir, nir_lower_pack);
320 NIR_PASS(progress, nir, nir_copy_prop);
321 NIR_PASS(progress, nir, nir_opt_remove_phis);
322 NIR_PASS(progress, nir, nir_opt_dce);
323 if (nir_opt_trivial_continues(nir)) {
324 progress = true;
325 NIR_PASS(progress, nir, nir_copy_prop);
326 NIR_PASS(progress, nir, nir_opt_dce);
327 }
328 NIR_PASS(progress, nir, nir_opt_if);
329 NIR_PASS(progress, nir, nir_opt_dead_cf);
330 NIR_PASS(progress, nir, nir_opt_cse);
331 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
332
333 NIR_PASS(progress, nir, nir_opt_algebraic);
334 NIR_PASS(progress, nir, nir_opt_constant_folding);
335
336 NIR_PASS(progress, nir, nir_opt_undef);
337 NIR_PASS(progress, nir, nir_opt_conditional_discard);
338 if (nir->options->max_unroll_iterations) {
339 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
340 }
341 } while (progress);
342 }
343
344 static nir_shader *
345 compile_fp64_funcs(struct gl_context *ctx,
346 const nir_shader_compiler_options *options,
347 void *mem_ctx,
348 gl_shader_stage stage)
349 {
350 const GLuint name = ~0;
351 struct gl_shader *sh;
352
353 sh = _mesa_new_shader(name, stage);
354
355 sh->Source = float64_source;
356 sh->CompileStatus = COMPILE_FAILURE;
357 _mesa_compile_shader(ctx, sh);
358
359 if (!sh->CompileStatus) {
360 if (sh->InfoLog) {
361 _mesa_problem(ctx,
362 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
363 sh->InfoLog, float64_source);
364 }
365 }
366
367 struct gl_shader_program *sh_prog;
368 sh_prog = _mesa_new_shader_program(name);
369 sh_prog->Label = NULL;
370 sh_prog->NumShaders = 1;
371 sh_prog->Shaders = (struct gl_shader **)malloc(sizeof(struct gl_shader *));
372 sh_prog->Shaders[0] = sh;
373
374 struct gl_linked_shader *linked = rzalloc(NULL, struct gl_linked_shader);
375 linked->Stage = stage;
376 linked->Program =
377 ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
378 name, false);
379
380 linked->ir = sh->ir;
381 sh_prog->_LinkedShaders[stage] = linked;
382
383 nir_shader *nir = glsl_to_nir(sh_prog, stage, options);
384
385 return nir_shader_clone(mem_ctx, nir);
386 }
387
388 /* First third of converting glsl_to_nir.. this leaves things in a pre-
389 * nir_lower_io state, so that shader variants can more easily insert/
390 * replace variables, etc.
391 */
392 static nir_shader *
393 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
394 struct gl_shader_program *shader_program,
395 gl_shader_stage stage)
396 {
397 const nir_shader_compiler_options *options =
398 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
399 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
400 struct pipe_screen *screen = st->pipe->screen;
401 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
402 assert(options);
403 bool lower_64bit =
404 options->lower_int64_options || options->lower_doubles_options;
405
406 if (prog->nir)
407 return prog->nir;
408
409 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
410
411 /* Set the next shader stage hint for VS and TES. */
412 if (!nir->info.separate_shader &&
413 (nir->info.stage == MESA_SHADER_VERTEX ||
414 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
415
416 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
417 unsigned stages_mask =
418 ~prev_stages & shader_program->data->linked_stages;
419
420 nir->info.next_stage = stages_mask ?
421 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
422 } else {
423 nir->info.next_stage = MESA_SHADER_FRAGMENT;
424 }
425
426 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
427 if (nir->info.uses_64bit &&
428 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
429 nir_shader *fp64 =
430 compile_fp64_funcs(st->ctx, options, ralloc_parent(nir),
431 nir->info.stage);
432 nir_validate_shader(fp64, "fp64");
433 exec_list_append(&nir->functions, &fp64->functions);
434 }
435
436 nir_variable_mode mask =
437 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
438 nir_remove_dead_variables(nir, mask);
439
440 if (options->lower_all_io_to_temps ||
441 nir->info.stage == MESA_SHADER_VERTEX ||
442 nir->info.stage == MESA_SHADER_GEOMETRY) {
443 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
444 nir_shader_get_entrypoint(nir),
445 true, true);
446 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
447 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
448 nir_shader_get_entrypoint(nir),
449 true, false);
450 }
451
452 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
453 NIR_PASS_V(nir, nir_split_var_copies);
454 NIR_PASS_V(nir, nir_lower_var_copies);
455
456 if (is_scalar) {
457 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
458 }
459
460 if (lower_64bit) {
461 bool lowered_64bit_ops = false;
462 bool progress = false;
463
464 NIR_PASS_V(nir, nir_opt_algebraic);
465
466 do {
467 progress = false;
468 if (options->lower_int64_options) {
469 NIR_PASS(progress, nir, nir_lower_int64,
470 options->lower_int64_options);
471 }
472 if (options->lower_doubles_options) {
473 NIR_PASS(progress, nir, nir_lower_doubles,
474 options->lower_doubles_options);
475 }
476 NIR_PASS(progress, nir, nir_opt_algebraic);
477 lowered_64bit_ops |= progress;
478 } while (progress);
479
480 if (lowered_64bit_ops) {
481 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
482 NIR_PASS_V(nir, nir_lower_returns);
483 NIR_PASS_V(nir, nir_inline_functions);
484 NIR_PASS_V(nir, nir_opt_deref);
485 }
486
487 const nir_function *entry_point = nir_shader_get_entrypoint(nir)->function;
488 foreach_list_typed_safe(nir_function, func, node, &nir->functions) {
489 if (func != entry_point) {
490 exec_node_remove(&func->node);
491 }
492 }
493 assert(exec_list_length(&nir->functions) == 1);
494 }
495
496 st_nir_opts(nir, is_scalar);
497
498 return nir;
499 }
500
501 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
502 * info on varyings, etc after NIR link time opts have been applied.
503 */
504 static void
505 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
506 struct gl_shader_program *shader_program)
507 {
508 nir_shader *nir = prog->nir;
509
510 /* Make a pass over the IR to add state references for any built-in
511 * uniforms that are used. This has to be done now (during linking).
512 * Code generation doesn't happen until the first time this shader is
513 * used for rendering. Waiting until then to generate the parameters is
514 * too late. At that point, the values for the built-in uniforms won't
515 * get sent to the shader.
516 */
517 nir_foreach_variable(var, &nir->uniforms) {
518 if (strncmp(var->name, "gl_", 3) == 0) {
519 const nir_state_slot *const slots = var->state_slots;
520 assert(var->state_slots != NULL);
521
522 const struct glsl_type *type = glsl_without_array(var->type);
523 for (unsigned int i = 0; i < var->num_state_slots; i++) {
524 unsigned comps;
525 if (glsl_type_is_struct(type)) {
526 /* Builtin struct require specical handling for now we just
527 * make all members vec4. See st_nir_lower_builtin.
528 */
529 comps = 4;
530 } else {
531 comps = glsl_get_vector_elements(type);
532 }
533
534 if (st->ctx->Const.PackedDriverUniformStorage) {
535 _mesa_add_sized_state_reference(prog->Parameters,
536 slots[i].tokens,
537 comps, false);
538 } else {
539 _mesa_add_state_reference(prog->Parameters,
540 slots[i].tokens);
541 }
542 }
543 }
544 }
545
546 /* Avoid reallocation of the program parameter list, because the uniform
547 * storage is only associated with the original parameter list.
548 * This should be enough for Bitmap and DrawPixels constants.
549 */
550 _mesa_reserve_parameter_storage(prog->Parameters, 8);
551
552 /* This has to be done last. Any operation the can cause
553 * prog->ParameterValues to get reallocated (e.g., anything that adds a
554 * program constant) has to happen before creating this linkage.
555 */
556 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
557
558 st_set_prog_affected_state_flags(prog);
559
560 NIR_PASS_V(nir, st_nir_lower_builtin);
561 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
562
563 nir_variable_mode mask = nir_var_function_temp;
564 nir_remove_dead_variables(nir, mask);
565
566 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
567 _mesa_log("\n");
568 _mesa_log("NIR IR for linked %s program %d:\n",
569 _mesa_shader_stage_to_string(prog->info.stage),
570 shader_program->Name);
571 nir_print_shader(nir, _mesa_get_log_file());
572 _mesa_log("\n\n");
573 }
574 }
575
576 /* TODO any better helper somewhere to sort a list? */
577
578 static void
579 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
580 {
581 nir_foreach_variable(var, var_list) {
582 if (var->data.location > new_var->data.location) {
583 exec_node_insert_node_before(&var->node, &new_var->node);
584 return;
585 }
586 }
587 exec_list_push_tail(var_list, &new_var->node);
588 }
589
590 static void
591 sort_varyings(struct exec_list *var_list)
592 {
593 struct exec_list new_list;
594 exec_list_make_empty(&new_list);
595 nir_foreach_variable_safe(var, var_list) {
596 exec_node_remove(&var->node);
597 insert_sorted(&new_list, var);
598 }
599 exec_list_move_nodes_to(&new_list, var_list);
600 }
601
602 static void
603 set_st_program(struct gl_program *prog,
604 struct gl_shader_program *shader_program,
605 nir_shader *nir)
606 {
607 struct st_vertex_program *stvp;
608 struct st_common_program *stp;
609 struct st_fragment_program *stfp;
610 struct st_compute_program *stcp;
611
612 switch (prog->info.stage) {
613 case MESA_SHADER_VERTEX:
614 stvp = (struct st_vertex_program *)prog;
615 stvp->shader_program = shader_program;
616 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
617 stvp->tgsi.ir.nir = nir;
618 break;
619 case MESA_SHADER_GEOMETRY:
620 case MESA_SHADER_TESS_CTRL:
621 case MESA_SHADER_TESS_EVAL:
622 stp = (struct st_common_program *)prog;
623 stp->shader_program = shader_program;
624 stp->tgsi.type = PIPE_SHADER_IR_NIR;
625 stp->tgsi.ir.nir = nir;
626 break;
627 case MESA_SHADER_FRAGMENT:
628 stfp = (struct st_fragment_program *)prog;
629 stfp->shader_program = shader_program;
630 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
631 stfp->tgsi.ir.nir = nir;
632 break;
633 case MESA_SHADER_COMPUTE:
634 stcp = (struct st_compute_program *)prog;
635 stcp->shader_program = shader_program;
636 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
637 stcp->tgsi.prog = nir;
638 break;
639 default:
640 unreachable("unknown shader stage");
641 }
642 }
643
644 static void
645 st_nir_get_mesa_program(struct gl_context *ctx,
646 struct gl_shader_program *shader_program,
647 struct gl_linked_shader *shader)
648 {
649 struct st_context *st = st_context(ctx);
650 struct pipe_screen *pscreen = ctx->st->pipe->screen;
651 struct gl_program *prog;
652
653 validate_ir_tree(shader->ir);
654
655 prog = shader->Program;
656
657 prog->Parameters = _mesa_new_parameter_list();
658
659 _mesa_copy_linked_program_data(shader_program, shader);
660 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
661 prog->Parameters);
662
663 /* Remove reads from output registers. */
664 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
665 lower_output_reads(shader->Stage, shader->ir);
666
667 if (ctx->_Shader->Flags & GLSL_DUMP) {
668 _mesa_log("\n");
669 _mesa_log("GLSL IR for linked %s program %d:\n",
670 _mesa_shader_stage_to_string(shader->Stage),
671 shader_program->Name);
672 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
673 _mesa_log("\n\n");
674 }
675
676 prog->ExternalSamplersUsed = gl_external_samplers(prog);
677 _mesa_update_shader_textures_used(shader_program, prog);
678
679 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
680
681 set_st_program(prog, shader_program, nir);
682 prog->nir = nir;
683 }
684
685 static void
686 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
687 {
688 if (scalar) {
689 NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
690 NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
691 }
692
693 nir_lower_io_arrays_to_elements(*producer, *consumer);
694
695 st_nir_opts(*producer, scalar);
696 st_nir_opts(*consumer, scalar);
697
698 if (nir_link_opt_varyings(*producer, *consumer))
699 st_nir_opts(*consumer, scalar);
700
701 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
702 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
703
704 if (nir_remove_unused_varyings(*producer, *consumer)) {
705 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
706 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
707
708 /* The backend might not be able to handle indirects on
709 * temporaries so we need to lower indirects on any of the
710 * varyings we have demoted here.
711 *
712 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
713 * currently smart enough to handle indirects without causing excess
714 * spilling causing the gpu to hang.
715 *
716 * See the following thread for more details of the problem:
717 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
718 */
719 nir_variable_mode indirect_mask = nir_var_function_temp;
720
721 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
722 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
723
724 st_nir_opts(*producer, scalar);
725 st_nir_opts(*consumer, scalar);
726
727 /* Lowering indirects can cause varying to become unused.
728 * nir_compact_varyings() depends on all dead varyings being removed so
729 * we need to call nir_remove_dead_variables() again here.
730 */
731 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
732 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
733 }
734 }
735
736 static void
737 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
738 {
739 struct gl_linked_shader *linked_tcs =
740 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
741 struct gl_linked_shader *linked_tes =
742 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
743
744 /* If we have a TCS and TES linked together, lower TES patch vertices. */
745 if (linked_tcs && linked_tes) {
746 nir_shader *tcs_nir = linked_tcs->Program->nir;
747 nir_shader *tes_nir = linked_tes->Program->nir;
748
749 /* The TES input vertex count is the TCS output vertex count,
750 * lower TES gl_PatchVerticesIn to a constant.
751 */
752 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
753 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
754 }
755 }
756
757 extern "C" {
758
759 void
760 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
761 struct gl_program *prog,
762 struct pipe_screen *pscreen)
763 {
764 if (nir->info.stage != MESA_SHADER_FRAGMENT)
765 return;
766
767 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
768 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
769 };
770 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
771
772 memcpy(wpos_options.state_tokens, wposTransformState,
773 sizeof(wpos_options.state_tokens));
774 wpos_options.fs_coord_origin_upper_left =
775 pscreen->get_param(pscreen,
776 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
777 wpos_options.fs_coord_origin_lower_left =
778 pscreen->get_param(pscreen,
779 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
780 wpos_options.fs_coord_pixel_center_integer =
781 pscreen->get_param(pscreen,
782 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
783 wpos_options.fs_coord_pixel_center_half_integer =
784 pscreen->get_param(pscreen,
785 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
786
787 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
788 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
789 _mesa_add_state_reference(prog->Parameters, wposTransformState);
790 }
791 }
792
793 bool
794 st_link_nir(struct gl_context *ctx,
795 struct gl_shader_program *shader_program)
796 {
797 struct st_context *st = st_context(ctx);
798 struct pipe_screen *screen = st->pipe->screen;
799 bool is_scalar[MESA_SHADER_STAGES];
800
801 unsigned last_stage = 0;
802 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
803 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
804 if (shader == NULL)
805 continue;
806
807 /* Determine scalar property of each shader stage */
808 enum pipe_shader_type type = pipe_shader_type_from_mesa(shader->Stage);
809 is_scalar[i] = screen->get_shader_param(screen, type,
810 PIPE_SHADER_CAP_SCALAR_ISA);
811
812 st_nir_get_mesa_program(ctx, shader_program, shader);
813 last_stage = i;
814
815 if (is_scalar[i]) {
816 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
817 }
818 }
819
820 /* Linking the stages in the opposite order (from fragment to vertex)
821 * ensures that inter-shader outputs written to in an earlier stage
822 * are eliminated if they are (transitively) not used in a later
823 * stage.
824 */
825 int next = last_stage;
826 for (int i = next - 1; i >= 0; i--) {
827 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
828 if (shader == NULL)
829 continue;
830
831 st_nir_link_shaders(&shader->Program->nir,
832 &shader_program->_LinkedShaders[next]->Program->nir,
833 is_scalar[i]);
834 next = i;
835 }
836
837 int prev = -1;
838 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
839 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
840 if (shader == NULL)
841 continue;
842
843 nir_shader *nir = shader->Program->nir;
844
845 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
846 st->pipe->screen);
847
848 NIR_PASS_V(nir, nir_lower_system_values);
849 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
850
851 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
852 shader->Program->info = nir->info;
853 if (i == MESA_SHADER_VERTEX) {
854 /* NIR expands dual-slot inputs out to two locations. We need to
855 * compact things back down GL-style single-slot inputs to avoid
856 * confusing the state tracker.
857 */
858 shader->Program->info.inputs_read =
859 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
860 shader->Program->DualSlotInputs);
861 }
862
863 if (prev != -1) {
864 struct gl_program *prev_shader =
865 shader_program->_LinkedShaders[prev]->Program;
866
867 /* We can't use nir_compact_varyings with transform feedback, since
868 * the pipe_stream_output->output_register field is based on the
869 * pre-compacted driver_locations.
870 */
871 if (!(prev_shader->sh.LinkedTransformFeedback &&
872 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
873 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
874 nir, ctx->API != API_OPENGL_COMPAT);
875 }
876 prev = i;
877 }
878
879 st_lower_patch_vertices_in(shader_program);
880
881 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
882 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
883 if (shader == NULL)
884 continue;
885
886 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
887
888 assert(shader->Program);
889 if (!ctx->Driver.ProgramStringNotify(ctx,
890 _mesa_shader_stage_to_program(i),
891 shader->Program)) {
892 _mesa_reference_program(ctx, &shader->Program, NULL);
893 return false;
894 }
895
896 nir_sweep(shader->Program->nir);
897 }
898
899 return true;
900 }
901
902 void
903 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
904 {
905 if (nir->info.stage == MESA_SHADER_VERTEX) {
906 /* Needs special handling so drvloc matches the vbo state: */
907 st_nir_assign_vs_in_locations(nir);
908 /* Re-lower global vars, to deal with any dead VS inputs. */
909 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
910
911 sort_varyings(&nir->outputs);
912 st_nir_assign_var_locations(&nir->outputs,
913 &nir->num_outputs,
914 nir->info.stage);
915 st_nir_fixup_varying_slots(st, &nir->outputs);
916 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
917 nir->info.stage == MESA_SHADER_TESS_CTRL ||
918 nir->info.stage == MESA_SHADER_TESS_EVAL) {
919 sort_varyings(&nir->inputs);
920 st_nir_assign_var_locations(&nir->inputs,
921 &nir->num_inputs,
922 nir->info.stage);
923 st_nir_fixup_varying_slots(st, &nir->inputs);
924
925 sort_varyings(&nir->outputs);
926 st_nir_assign_var_locations(&nir->outputs,
927 &nir->num_outputs,
928 nir->info.stage);
929 st_nir_fixup_varying_slots(st, &nir->outputs);
930 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
931 sort_varyings(&nir->inputs);
932 st_nir_assign_var_locations(&nir->inputs,
933 &nir->num_inputs,
934 nir->info.stage);
935 st_nir_fixup_varying_slots(st, &nir->inputs);
936 st_nir_assign_var_locations(&nir->outputs,
937 &nir->num_outputs,
938 nir->info.stage);
939 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
940 /* TODO? */
941 } else {
942 unreachable("invalid shader type");
943 }
944 }
945
946 void
947 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
948 struct gl_shader_program *shader_program,
949 struct gl_program *prog)
950 {
951 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
952 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
953 else
954 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
955
956 if (prog) {
957 prog->info.textures_used = nir->info.textures_used;
958 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
959 }
960 }
961
962 /* Last third of preparing nir from glsl, which happens after shader
963 * variant lowering.
964 */
965 void
966 st_finalize_nir(struct st_context *st, struct gl_program *prog,
967 struct gl_shader_program *shader_program, nir_shader *nir)
968 {
969 struct pipe_screen *screen = st->pipe->screen;
970 const nir_shader_compiler_options *options =
971 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
972
973 NIR_PASS_V(nir, nir_split_var_copies);
974 NIR_PASS_V(nir, nir_lower_var_copies);
975 if (options->lower_all_io_to_temps ||
976 nir->info.stage == MESA_SHADER_VERTEX ||
977 nir->info.stage == MESA_SHADER_GEOMETRY) {
978 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
979 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
980 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
981 }
982
983 st_nir_assign_varying_locations(st, nir);
984
985 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
986 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
987
988 st_nir_assign_uniform_locations(st->ctx, prog,
989 &nir->uniforms, &nir->num_uniforms);
990
991 if (st->ctx->Const.PackedDriverUniformStorage) {
992 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
993 (nir_lower_io_options)0);
994 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo);
995 }
996
997 st_nir_lower_samplers(screen, nir, shader_program, prog);
998 }
999
1000 } /* extern "C" */