nir: Distinguish between normal uniforms and UBOs
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "st_context.h"
40 #include "st_glsl_types.h"
41 #include "st_program.h"
42
43 #include "compiler/nir/nir.h"
44 #include "compiler/glsl_types.h"
45 #include "compiler/glsl/glsl_to_nir.h"
46 #include "compiler/glsl/gl_nir.h"
47 #include "compiler/glsl/ir.h"
48 #include "compiler/glsl/ir_optimization.h"
49 #include "compiler/glsl/string_to_uint_map.h"
50
51
52 static int
53 type_size(const struct glsl_type *type)
54 {
55 return type->count_attribute_slots(false);
56 }
57
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
61 */
62 static void
63 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
64 {
65 if (st->needs_texcoord_semantic)
66 return;
67
68 nir_foreach_variable(var, var_list) {
69 if (var->data.location >= VARYING_SLOT_VAR0) {
70 var->data.location += 9;
71 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
72 (var->data.location <= VARYING_SLOT_TEX7)) {
73 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
74 }
75 }
76 }
77
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
82 */
83 static void
84 st_nir_assign_vs_in_locations(nir_shader *nir)
85 {
86 nir->num_inputs = 0;
87 nir_foreach_variable_safe(var, &nir->inputs) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
90 */
91 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var->data.driver_location = util_bitcount64(nir->info.inputs_read);
94 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
95 var->data.driver_location =
96 util_bitcount64(nir->info.inputs_read &
97 BITFIELD64_MASK(var->data.location));
98 nir->num_inputs++;
99 } else {
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
103 * set.
104 */
105 exec_node_remove(&var->node);
106 var->data.mode = nir_var_global;
107 exec_list_push_tail(&nir->globals, &var->node);
108 }
109 }
110 }
111
112 static void
113 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
114 gl_shader_stage stage)
115 {
116 unsigned location = 0;
117 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
118 uint64_t processed_locs[2] = {0};
119
120 const int base = stage == MESA_SHADER_FRAGMENT ?
121 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
122
123 int UNUSED last_loc = 0;
124 nir_foreach_variable(var, var_list) {
125
126 const struct glsl_type *type = var->type;
127 if (nir_is_per_vertex_io(var, stage)) {
128 assert(glsl_type_is_array(type));
129 type = glsl_get_array_element(type);
130 }
131
132 unsigned var_size = type_size(type);
133
134 /* Builtins don't allow component packing so we only need to worry about
135 * user defined varyings sharing the same location.
136 */
137 bool processed = false;
138 if (var->data.location >= base) {
139 unsigned glsl_location = var->data.location - base;
140
141 for (unsigned i = 0; i < var_size; i++) {
142 if (processed_locs[var->data.index] &
143 ((uint64_t)1 << (glsl_location + i)))
144 processed = true;
145 else
146 processed_locs[var->data.index] |=
147 ((uint64_t)1 << (glsl_location + i));
148 }
149 }
150
151 /* Because component packing allows varyings to share the same location
152 * we may have already have processed this location.
153 */
154 if (processed) {
155 unsigned driver_location = assigned_locations[var->data.location];
156 var->data.driver_location = driver_location;
157 *size += type_size(type);
158
159 /* An array may be packed such that is crosses multiple other arrays
160 * or variables, we need to make sure we have allocated the elements
161 * consecutively if the previously proccessed var was shorter than
162 * the current array we are processing.
163 *
164 * NOTE: The code below assumes the var list is ordered in ascending
165 * location order.
166 */
167 assert(last_loc <= var->data.location);
168 last_loc = var->data.location;
169 unsigned last_slot_location = driver_location + var_size;
170 if (last_slot_location > location) {
171 unsigned num_unallocated_slots = last_slot_location - location;
172 unsigned first_unallocated_slot = var_size - num_unallocated_slots;
173 for (unsigned i = first_unallocated_slot; i < num_unallocated_slots; i++) {
174 assigned_locations[var->data.location + i] = location;
175 location++;
176 }
177 }
178 continue;
179 }
180
181 for (unsigned i = 0; i < var_size; i++) {
182 assigned_locations[var->data.location + i] = location + i;
183 }
184
185 var->data.driver_location = location;
186 location += var_size;
187 }
188
189 *size += location;
190 }
191
192 static int
193 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
194 const char *name)
195 {
196 int loc = _mesa_lookup_parameter_index(params, name);
197
198 /* is there a better way to do this? If we have something like:
199 *
200 * struct S {
201 * float f;
202 * vec4 v;
203 * };
204 * uniform S color;
205 *
206 * Then what we get in prog->Parameters looks like:
207 *
208 * 0: Name=color.f, Type=6, DataType=1406, Size=1
209 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
210 *
211 * So the name doesn't match up and _mesa_lookup_parameter_index()
212 * fails. In this case just find the first matching "color.*"..
213 *
214 * Note for arrays you could end up w/ color[n].f, for example.
215 *
216 * glsl_to_tgsi works slightly differently in this regard. It is
217 * emitting something more low level, so it just translates the
218 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
219 * it just calculates the additional offset of struct field members
220 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
221 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
222 * needs to work backwards to get base var loc from the param-list
223 * which already has them separated out.
224 */
225 if (loc < 0) {
226 int namelen = strlen(name);
227 for (unsigned i = 0; i < params->NumParameters; i++) {
228 struct gl_program_parameter *p = &params->Parameters[i];
229 if ((strncmp(p->Name, name, namelen) == 0) &&
230 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
231 loc = i;
232 break;
233 }
234 }
235 }
236
237 return loc;
238 }
239
240 static void
241 st_nir_assign_uniform_locations(struct gl_context *ctx,
242 struct gl_program *prog,
243 struct exec_list *uniform_list, unsigned *size)
244 {
245 int max = 0;
246 int shaderidx = 0;
247 int imageidx = 0;
248
249 nir_foreach_variable(uniform, uniform_list) {
250 int loc;
251
252 /*
253 * UBO's have their own address spaces, so don't count them towards the
254 * number of global uniforms
255 */
256 if (uniform->data.mode == nir_var_ubo || uniform->data.mode == nir_var_ssbo)
257 continue;
258
259 const struct glsl_type *type = glsl_without_array(uniform->type);
260 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
261 if (type->is_sampler()) {
262 loc = shaderidx;
263 shaderidx += type_size(uniform->type);
264 } else {
265 loc = imageidx;
266 imageidx += type_size(uniform->type);
267 }
268 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
269 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
270 /* This state reference has already been setup by ir_to_mesa, but we'll
271 * get the same index back here.
272 */
273
274 unsigned comps;
275 if (glsl_type_is_struct(type)) {
276 comps = 4;
277 } else {
278 comps = glsl_get_vector_elements(type);
279 }
280
281 if (ctx->Const.PackedDriverUniformStorage) {
282 loc = _mesa_add_sized_state_reference(prog->Parameters,
283 stateTokens, comps, false);
284 loc = prog->Parameters->ParameterValueOffset[loc];
285 } else {
286 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
287 }
288 } else {
289 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
290
291 if (ctx->Const.PackedDriverUniformStorage) {
292 loc = prog->Parameters->ParameterValueOffset[loc];
293 }
294 }
295
296 uniform->data.driver_location = loc;
297
298 max = MAX2(max, loc + type_size(uniform->type));
299 }
300 *size = max;
301 }
302
303 void
304 st_nir_opts(nir_shader *nir, bool scalar)
305 {
306 bool progress;
307 do {
308 progress = false;
309
310 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
311
312 if (scalar) {
313 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
314 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
315 }
316
317 NIR_PASS_V(nir, nir_lower_alu);
318 NIR_PASS_V(nir, nir_lower_pack);
319 NIR_PASS(progress, nir, nir_copy_prop);
320 NIR_PASS(progress, nir, nir_opt_remove_phis);
321 NIR_PASS(progress, nir, nir_opt_dce);
322 if (nir_opt_trivial_continues(nir)) {
323 progress = true;
324 NIR_PASS(progress, nir, nir_copy_prop);
325 NIR_PASS(progress, nir, nir_opt_dce);
326 }
327 NIR_PASS(progress, nir, nir_opt_if);
328 NIR_PASS(progress, nir, nir_opt_dead_cf);
329 NIR_PASS(progress, nir, nir_opt_cse);
330 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
331
332 NIR_PASS(progress, nir, nir_opt_algebraic);
333 NIR_PASS(progress, nir, nir_opt_constant_folding);
334
335 NIR_PASS(progress, nir, nir_opt_undef);
336 NIR_PASS(progress, nir, nir_opt_conditional_discard);
337 if (nir->options->max_unroll_iterations) {
338 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
339 }
340 } while (progress);
341 }
342
343 /* First third of converting glsl_to_nir.. this leaves things in a pre-
344 * nir_lower_io state, so that shader variants can more easily insert/
345 * replace variables, etc.
346 */
347 static nir_shader *
348 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
349 struct gl_shader_program *shader_program,
350 gl_shader_stage stage)
351 {
352 const nir_shader_compiler_options *options =
353 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
354 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
355 struct pipe_screen *screen = st->pipe->screen;
356 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
357 assert(options);
358
359 if (prog->nir)
360 return prog->nir;
361
362 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
363
364 /* Set the next shader stage hint for VS and TES. */
365 if (!nir->info.separate_shader &&
366 (nir->info.stage == MESA_SHADER_VERTEX ||
367 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
368
369 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
370 unsigned stages_mask =
371 ~prev_stages & shader_program->data->linked_stages;
372
373 nir->info.next_stage = stages_mask ?
374 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
375 } else {
376 nir->info.next_stage = MESA_SHADER_FRAGMENT;
377 }
378
379 nir_variable_mode mask =
380 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
381 nir_remove_dead_variables(nir, mask);
382
383 if (options->lower_all_io_to_temps ||
384 nir->info.stage == MESA_SHADER_VERTEX ||
385 nir->info.stage == MESA_SHADER_GEOMETRY) {
386 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
387 nir_shader_get_entrypoint(nir),
388 true, true);
389 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
390 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
391 nir_shader_get_entrypoint(nir),
392 true, false);
393 }
394
395 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
396 NIR_PASS_V(nir, nir_split_var_copies);
397 NIR_PASS_V(nir, nir_lower_var_copies);
398
399 st_nir_opts(nir, is_scalar);
400
401 return nir;
402 }
403
404 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
405 * info on varyings, etc after NIR link time opts have been applied.
406 */
407 static void
408 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
409 struct gl_shader_program *shader_program)
410 {
411 nir_shader *nir = prog->nir;
412
413 /* Make a pass over the IR to add state references for any built-in
414 * uniforms that are used. This has to be done now (during linking).
415 * Code generation doesn't happen until the first time this shader is
416 * used for rendering. Waiting until then to generate the parameters is
417 * too late. At that point, the values for the built-in uniforms won't
418 * get sent to the shader.
419 */
420 nir_foreach_variable(var, &nir->uniforms) {
421 if (strncmp(var->name, "gl_", 3) == 0) {
422 const nir_state_slot *const slots = var->state_slots;
423 assert(var->state_slots != NULL);
424
425 const struct glsl_type *type = glsl_without_array(var->type);
426 for (unsigned int i = 0; i < var->num_state_slots; i++) {
427 unsigned comps;
428 if (glsl_type_is_struct(type)) {
429 /* Builtin struct require specical handling for now we just
430 * make all members vec4. See st_nir_lower_builtin.
431 */
432 comps = 4;
433 } else {
434 comps = glsl_get_vector_elements(type);
435 }
436
437 if (st->ctx->Const.PackedDriverUniformStorage) {
438 _mesa_add_sized_state_reference(prog->Parameters,
439 slots[i].tokens,
440 comps, false);
441 } else {
442 _mesa_add_state_reference(prog->Parameters,
443 slots[i].tokens);
444 }
445 }
446 }
447 }
448
449 /* Avoid reallocation of the program parameter list, because the uniform
450 * storage is only associated with the original parameter list.
451 * This should be enough for Bitmap and DrawPixels constants.
452 */
453 _mesa_reserve_parameter_storage(prog->Parameters, 8);
454
455 /* This has to be done last. Any operation the can cause
456 * prog->ParameterValues to get reallocated (e.g., anything that adds a
457 * program constant) has to happen before creating this linkage.
458 */
459 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
460
461 st_set_prog_affected_state_flags(prog);
462
463 NIR_PASS_V(nir, st_nir_lower_builtin);
464 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
465
466 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
467 _mesa_log("\n");
468 _mesa_log("NIR IR for linked %s program %d:\n",
469 _mesa_shader_stage_to_string(prog->info.stage),
470 shader_program->Name);
471 nir_print_shader(nir, _mesa_get_log_file());
472 _mesa_log("\n\n");
473 }
474 }
475
476 /* TODO any better helper somewhere to sort a list? */
477
478 static void
479 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
480 {
481 nir_foreach_variable(var, var_list) {
482 if (var->data.location > new_var->data.location) {
483 exec_node_insert_node_before(&var->node, &new_var->node);
484 return;
485 }
486 }
487 exec_list_push_tail(var_list, &new_var->node);
488 }
489
490 static void
491 sort_varyings(struct exec_list *var_list)
492 {
493 struct exec_list new_list;
494 exec_list_make_empty(&new_list);
495 nir_foreach_variable_safe(var, var_list) {
496 exec_node_remove(&var->node);
497 insert_sorted(&new_list, var);
498 }
499 exec_list_move_nodes_to(&new_list, var_list);
500 }
501
502 static void
503 set_st_program(struct gl_program *prog,
504 struct gl_shader_program *shader_program,
505 nir_shader *nir)
506 {
507 struct st_vertex_program *stvp;
508 struct st_common_program *stp;
509 struct st_fragment_program *stfp;
510 struct st_compute_program *stcp;
511
512 switch (prog->info.stage) {
513 case MESA_SHADER_VERTEX:
514 stvp = (struct st_vertex_program *)prog;
515 stvp->shader_program = shader_program;
516 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
517 stvp->tgsi.ir.nir = nir;
518 break;
519 case MESA_SHADER_GEOMETRY:
520 case MESA_SHADER_TESS_CTRL:
521 case MESA_SHADER_TESS_EVAL:
522 stp = (struct st_common_program *)prog;
523 stp->shader_program = shader_program;
524 stp->tgsi.type = PIPE_SHADER_IR_NIR;
525 stp->tgsi.ir.nir = nir;
526 break;
527 case MESA_SHADER_FRAGMENT:
528 stfp = (struct st_fragment_program *)prog;
529 stfp->shader_program = shader_program;
530 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
531 stfp->tgsi.ir.nir = nir;
532 break;
533 case MESA_SHADER_COMPUTE:
534 stcp = (struct st_compute_program *)prog;
535 stcp->shader_program = shader_program;
536 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
537 stcp->tgsi.prog = nir;
538 break;
539 default:
540 unreachable("unknown shader stage");
541 }
542 }
543
544 static void
545 st_nir_get_mesa_program(struct gl_context *ctx,
546 struct gl_shader_program *shader_program,
547 struct gl_linked_shader *shader)
548 {
549 struct st_context *st = st_context(ctx);
550 struct pipe_screen *pscreen = ctx->st->pipe->screen;
551 struct gl_program *prog;
552
553 validate_ir_tree(shader->ir);
554
555 prog = shader->Program;
556
557 prog->Parameters = _mesa_new_parameter_list();
558
559 _mesa_copy_linked_program_data(shader_program, shader);
560 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
561 prog->Parameters);
562
563 /* Remove reads from output registers. */
564 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
565 lower_output_reads(shader->Stage, shader->ir);
566
567 if (ctx->_Shader->Flags & GLSL_DUMP) {
568 _mesa_log("\n");
569 _mesa_log("GLSL IR for linked %s program %d:\n",
570 _mesa_shader_stage_to_string(shader->Stage),
571 shader_program->Name);
572 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
573 _mesa_log("\n\n");
574 }
575
576 prog->ExternalSamplersUsed = gl_external_samplers(prog);
577 _mesa_update_shader_textures_used(shader_program, prog);
578
579 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
580
581 set_st_program(prog, shader_program, nir);
582 prog->nir = nir;
583 }
584
585 static void
586 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
587 {
588 if (scalar) {
589 NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
590 NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
591 }
592
593 nir_lower_io_arrays_to_elements(*producer, *consumer);
594
595 st_nir_opts(*producer, scalar);
596 st_nir_opts(*consumer, scalar);
597
598 if (nir_link_opt_varyings(*producer, *consumer))
599 st_nir_opts(*consumer, scalar);
600
601 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
602 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
603
604 if (nir_remove_unused_varyings(*producer, *consumer)) {
605 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
606 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
607
608 /* The backend might not be able to handle indirects on
609 * temporaries so we need to lower indirects on any of the
610 * varyings we have demoted here.
611 *
612 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
613 * currently smart enough to handle indirects without causing excess
614 * spilling causing the gpu to hang.
615 *
616 * See the following thread for more details of the problem:
617 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
618 */
619 nir_variable_mode indirect_mask = nir_var_local;
620
621 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
622 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
623
624 st_nir_opts(*producer, scalar);
625 st_nir_opts(*consumer, scalar);
626 }
627 }
628
629 extern "C" {
630
631 void
632 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
633 struct gl_program *prog,
634 struct pipe_screen *pscreen)
635 {
636 if (nir->info.stage != MESA_SHADER_FRAGMENT)
637 return;
638
639 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
640 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
641 };
642 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
643
644 memcpy(wpos_options.state_tokens, wposTransformState,
645 sizeof(wpos_options.state_tokens));
646 wpos_options.fs_coord_origin_upper_left =
647 pscreen->get_param(pscreen,
648 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
649 wpos_options.fs_coord_origin_lower_left =
650 pscreen->get_param(pscreen,
651 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
652 wpos_options.fs_coord_pixel_center_integer =
653 pscreen->get_param(pscreen,
654 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
655 wpos_options.fs_coord_pixel_center_half_integer =
656 pscreen->get_param(pscreen,
657 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
658
659 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
660 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
661 _mesa_add_state_reference(prog->Parameters, wposTransformState);
662 }
663 }
664
665 bool
666 st_link_nir(struct gl_context *ctx,
667 struct gl_shader_program *shader_program)
668 {
669 struct st_context *st = st_context(ctx);
670 struct pipe_screen *screen = st->pipe->screen;
671 bool is_scalar[MESA_SHADER_STAGES];
672
673 unsigned last_stage = 0;
674 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
675 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
676 if (shader == NULL)
677 continue;
678
679 /* Determine scalar property of each shader stage */
680 enum pipe_shader_type type = pipe_shader_type_from_mesa(shader->Stage);
681 is_scalar[i] = screen->get_shader_param(screen, type,
682 PIPE_SHADER_CAP_SCALAR_ISA);
683
684 st_nir_get_mesa_program(ctx, shader_program, shader);
685 last_stage = i;
686
687 if (is_scalar[i]) {
688 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
689 }
690 }
691
692 /* Linking the stages in the opposite order (from fragment to vertex)
693 * ensures that inter-shader outputs written to in an earlier stage
694 * are eliminated if they are (transitively) not used in a later
695 * stage.
696 */
697 int next = last_stage;
698 for (int i = next - 1; i >= 0; i--) {
699 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
700 if (shader == NULL)
701 continue;
702
703 st_nir_link_shaders(&shader->Program->nir,
704 &shader_program->_LinkedShaders[next]->Program->nir,
705 is_scalar[i]);
706 next = i;
707 }
708
709 int prev = -1;
710 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
711 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
712 if (shader == NULL)
713 continue;
714
715 nir_shader *nir = shader->Program->nir;
716
717 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
718 st->pipe->screen);
719
720 NIR_PASS_V(nir, nir_lower_system_values);
721
722 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
723 shader->Program->info = nir->info;
724 if (i == MESA_SHADER_VERTEX) {
725 /* NIR expands dual-slot inputs out to two locations. We need to
726 * compact things back down GL-style single-slot inputs to avoid
727 * confusing the state tracker.
728 */
729 shader->Program->info.inputs_read =
730 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
731 shader->Program->DualSlotInputs);
732 }
733
734 if (prev != -1) {
735 struct gl_program *prev_shader =
736 shader_program->_LinkedShaders[prev]->Program;
737
738 /* We can't use nir_compact_varyings with transform feedback, since
739 * the pipe_stream_output->output_register field is based on the
740 * pre-compacted driver_locations.
741 */
742 if (!(prev_shader->sh.LinkedTransformFeedback &&
743 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
744 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
745 nir, ctx->API != API_OPENGL_COMPAT);
746 }
747 prev = i;
748 }
749
750 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
751 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
752 if (shader == NULL)
753 continue;
754
755 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
756
757 assert(shader->Program);
758 if (!ctx->Driver.ProgramStringNotify(ctx,
759 _mesa_shader_stage_to_program(i),
760 shader->Program)) {
761 _mesa_reference_program(ctx, &shader->Program, NULL);
762 return false;
763 }
764
765 nir_sweep(shader->Program->nir);
766 }
767
768 return true;
769 }
770
771 /* Last third of preparing nir from glsl, which happens after shader
772 * variant lowering.
773 */
774 void
775 st_finalize_nir(struct st_context *st, struct gl_program *prog,
776 struct gl_shader_program *shader_program, nir_shader *nir)
777 {
778 struct pipe_screen *screen = st->pipe->screen;
779 const nir_shader_compiler_options *options =
780 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
781
782 NIR_PASS_V(nir, nir_split_var_copies);
783 NIR_PASS_V(nir, nir_lower_var_copies);
784 if (options->lower_all_io_to_temps ||
785 nir->info.stage == MESA_SHADER_VERTEX ||
786 nir->info.stage == MESA_SHADER_GEOMETRY) {
787 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
788 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
789 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
790 }
791
792 if (nir->info.stage == MESA_SHADER_VERTEX) {
793 /* Needs special handling so drvloc matches the vbo state: */
794 st_nir_assign_vs_in_locations(nir);
795 /* Re-lower global vars, to deal with any dead VS inputs. */
796 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
797
798 sort_varyings(&nir->outputs);
799 st_nir_assign_var_locations(&nir->outputs,
800 &nir->num_outputs,
801 nir->info.stage);
802 st_nir_fixup_varying_slots(st, &nir->outputs);
803 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
804 nir->info.stage == MESA_SHADER_TESS_CTRL ||
805 nir->info.stage == MESA_SHADER_TESS_EVAL) {
806 sort_varyings(&nir->inputs);
807 st_nir_assign_var_locations(&nir->inputs,
808 &nir->num_inputs,
809 nir->info.stage);
810 st_nir_fixup_varying_slots(st, &nir->inputs);
811
812 sort_varyings(&nir->outputs);
813 st_nir_assign_var_locations(&nir->outputs,
814 &nir->num_outputs,
815 nir->info.stage);
816 st_nir_fixup_varying_slots(st, &nir->outputs);
817 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
818 sort_varyings(&nir->inputs);
819 st_nir_assign_var_locations(&nir->inputs,
820 &nir->num_inputs,
821 nir->info.stage);
822 st_nir_fixup_varying_slots(st, &nir->inputs);
823 st_nir_assign_var_locations(&nir->outputs,
824 &nir->num_outputs,
825 nir->info.stage);
826 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
827 /* TODO? */
828 } else {
829 unreachable("invalid shader type for tgsi bypass\n");
830 }
831
832 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
833 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
834
835 st_nir_assign_uniform_locations(st->ctx, prog,
836 &nir->uniforms, &nir->num_uniforms);
837
838 if (st->ctx->Const.PackedDriverUniformStorage) {
839 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
840 (nir_lower_io_options)0);
841 NIR_PASS_V(nir, st_nir_lower_uniforms_to_ubo);
842 }
843
844 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
845 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
846 else
847 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
848 }
849
850 } /* extern "C" */