2 * Copyright © 2015 Red Hat
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
39 #include "main/shaderobj.h"
40 #include "st_context.h"
41 #include "st_glsl_types.h"
42 #include "st_program.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/glsl_to_nir.h"
47 #include "compiler/glsl/gl_nir.h"
48 #include "compiler/glsl/ir.h"
49 #include "compiler/glsl/ir_optimization.h"
50 #include "compiler/glsl/string_to_uint_map.h"
53 type_size(const struct glsl_type
*type
)
55 return type
->count_attribute_slots(false);
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
63 st_nir_fixup_varying_slots(struct st_context
*st
, struct exec_list
*var_list
)
65 if (st
->needs_texcoord_semantic
)
68 nir_foreach_variable(var
, var_list
) {
69 if (var
->data
.location
>= VARYING_SLOT_VAR0
) {
70 var
->data
.location
+= 9;
71 } else if ((var
->data
.location
>= VARYING_SLOT_TEX0
) &&
72 (var
->data
.location
<= VARYING_SLOT_TEX7
)) {
73 var
->data
.location
+= VARYING_SLOT_VAR0
- VARYING_SLOT_TEX0
;
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
84 st_nir_assign_vs_in_locations(nir_shader
*nir
)
87 nir_foreach_variable_safe(var
, &nir
->inputs
) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
91 if (var
->data
.location
== VERT_ATTRIB_EDGEFLAG
) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var
->data
.driver_location
= util_bitcount64(nir
->info
.inputs_read
);
94 } else if (nir
->info
.inputs_read
& BITFIELD64_BIT(var
->data
.location
)) {
95 var
->data
.driver_location
=
96 util_bitcount64(nir
->info
.inputs_read
&
97 BITFIELD64_MASK(var
->data
.location
));
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
105 exec_node_remove(&var
->node
);
106 var
->data
.mode
= nir_var_shader_temp
;
107 exec_list_push_tail(&nir
->globals
, &var
->node
);
113 st_nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
114 gl_shader_stage stage
)
116 unsigned location
= 0;
117 unsigned assigned_locations
[VARYING_SLOT_TESS_MAX
];
118 uint64_t processed_locs
[2] = {0};
120 const int base
= stage
== MESA_SHADER_FRAGMENT
?
121 (int) FRAG_RESULT_DATA0
: (int) VARYING_SLOT_VAR0
;
123 int UNUSED last_loc
= 0;
124 nir_foreach_variable(var
, var_list
) {
126 const struct glsl_type
*type
= var
->type
;
127 if (nir_is_per_vertex_io(var
, stage
)) {
128 assert(glsl_type_is_array(type
));
129 type
= glsl_get_array_element(type
);
132 unsigned var_size
= type_size(type
);
134 /* Builtins don't allow component packing so we only need to worry about
135 * user defined varyings sharing the same location.
137 bool processed
= false;
138 if (var
->data
.location
>= base
) {
139 unsigned glsl_location
= var
->data
.location
- base
;
141 for (unsigned i
= 0; i
< var_size
; i
++) {
142 if (processed_locs
[var
->data
.index
] &
143 ((uint64_t)1 << (glsl_location
+ i
)))
146 processed_locs
[var
->data
.index
] |=
147 ((uint64_t)1 << (glsl_location
+ i
));
151 /* Because component packing allows varyings to share the same location
152 * we may have already have processed this location.
155 unsigned driver_location
= assigned_locations
[var
->data
.location
];
156 var
->data
.driver_location
= driver_location
;
157 *size
+= type_size(type
);
159 /* An array may be packed such that is crosses multiple other arrays
160 * or variables, we need to make sure we have allocated the elements
161 * consecutively if the previously proccessed var was shorter than
162 * the current array we are processing.
164 * NOTE: The code below assumes the var list is ordered in ascending
167 assert(last_loc
<= var
->data
.location
);
168 last_loc
= var
->data
.location
;
169 unsigned last_slot_location
= driver_location
+ var_size
;
170 if (last_slot_location
> location
) {
171 unsigned num_unallocated_slots
= last_slot_location
- location
;
172 unsigned first_unallocated_slot
= var_size
- num_unallocated_slots
;
173 for (unsigned i
= first_unallocated_slot
; i
< num_unallocated_slots
; i
++) {
174 assigned_locations
[var
->data
.location
+ i
] = location
;
181 for (unsigned i
= 0; i
< var_size
; i
++) {
182 assigned_locations
[var
->data
.location
+ i
] = location
+ i
;
185 var
->data
.driver_location
= location
;
186 location
+= var_size
;
193 st_nir_lookup_parameter_index(const struct gl_program_parameter_list
*params
,
196 int loc
= _mesa_lookup_parameter_index(params
, name
);
198 /* is there a better way to do this? If we have something like:
206 * Then what we get in prog->Parameters looks like:
208 * 0: Name=color.f, Type=6, DataType=1406, Size=1
209 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
211 * So the name doesn't match up and _mesa_lookup_parameter_index()
212 * fails. In this case just find the first matching "color.*"..
214 * Note for arrays you could end up w/ color[n].f, for example.
216 * glsl_to_tgsi works slightly differently in this regard. It is
217 * emitting something more low level, so it just translates the
218 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
219 * it just calculates the additional offset of struct field members
220 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
221 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
222 * needs to work backwards to get base var loc from the param-list
223 * which already has them separated out.
226 int namelen
= strlen(name
);
227 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
228 struct gl_program_parameter
*p
= ¶ms
->Parameters
[i
];
229 if ((strncmp(p
->Name
, name
, namelen
) == 0) &&
230 ((p
->Name
[namelen
] == '.') || (p
->Name
[namelen
] == '['))) {
241 st_nir_assign_uniform_locations(struct gl_context
*ctx
,
242 struct gl_program
*prog
,
243 struct exec_list
*uniform_list
)
248 nir_foreach_variable(uniform
, uniform_list
) {
252 * UBO's have their own address spaces, so don't count them towards the
253 * number of global uniforms
255 if (uniform
->data
.mode
== nir_var_mem_ubo
|| uniform
->data
.mode
== nir_var_mem_ssbo
)
258 const struct glsl_type
*type
= glsl_without_array(uniform
->type
);
259 if (!uniform
->data
.bindless
&& (type
->is_sampler() || type
->is_image())) {
260 if (type
->is_sampler()) {
262 shaderidx
+= type_size(uniform
->type
);
265 imageidx
+= type_size(uniform
->type
);
267 } else if (strncmp(uniform
->name
, "gl_", 3) == 0) {
268 const gl_state_index16
*const stateTokens
= uniform
->state_slots
[0].tokens
;
269 /* This state reference has already been setup by ir_to_mesa, but we'll
270 * get the same index back here.
274 if (glsl_type_is_struct_or_ifc(type
)) {
277 comps
= glsl_get_vector_elements(type
);
280 if (ctx
->Const
.PackedDriverUniformStorage
) {
281 loc
= _mesa_add_sized_state_reference(prog
->Parameters
,
282 stateTokens
, comps
, false);
283 loc
= prog
->Parameters
->ParameterValueOffset
[loc
];
285 loc
= _mesa_add_state_reference(prog
->Parameters
, stateTokens
);
288 loc
= st_nir_lookup_parameter_index(prog
->Parameters
, uniform
->name
);
290 /* We need to check that loc is not -1 here before accessing the
291 * array. It can be negative for example when we have a struct that
292 * only contains opaque types.
294 if (loc
>= 0 && ctx
->Const
.PackedDriverUniformStorage
) {
295 loc
= prog
->Parameters
->ParameterValueOffset
[loc
];
299 uniform
->data
.driver_location
= loc
;
304 st_nir_opts(nir_shader
*nir
, bool scalar
)
307 unsigned lower_flrp
=
308 (nir
->options
->lower_flrp16
? 16 : 0) |
309 (nir
->options
->lower_flrp32
? 32 : 0) |
310 (nir
->options
->lower_flrp64
? 64 : 0);
315 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
318 NIR_PASS_V(nir
, nir_lower_alu_to_scalar
, NULL
);
319 NIR_PASS_V(nir
, nir_lower_phis_to_scalar
);
322 NIR_PASS_V(nir
, nir_lower_alu
);
323 NIR_PASS_V(nir
, nir_lower_pack
);
324 NIR_PASS(progress
, nir
, nir_copy_prop
);
325 NIR_PASS(progress
, nir
, nir_opt_remove_phis
);
326 NIR_PASS(progress
, nir
, nir_opt_dce
);
327 if (nir_opt_trivial_continues(nir
)) {
329 NIR_PASS(progress
, nir
, nir_copy_prop
);
330 NIR_PASS(progress
, nir
, nir_opt_dce
);
332 NIR_PASS(progress
, nir
, nir_opt_if
, false);
333 NIR_PASS(progress
, nir
, nir_opt_dead_cf
);
334 NIR_PASS(progress
, nir
, nir_opt_cse
);
335 NIR_PASS(progress
, nir
, nir_opt_peephole_select
, 8, true, true);
337 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
338 NIR_PASS(progress
, nir
, nir_opt_constant_folding
);
340 if (lower_flrp
!= 0) {
341 bool lower_flrp_progress
= false;
343 NIR_PASS(lower_flrp_progress
, nir
, nir_lower_flrp
,
345 false /* always_precise */,
346 nir
->options
->lower_ffma
);
347 if (lower_flrp_progress
) {
348 NIR_PASS(progress
, nir
,
349 nir_opt_constant_folding
);
353 /* Nothing should rematerialize any flrps, so we only need to do this
359 NIR_PASS(progress
, nir
, nir_opt_undef
);
360 NIR_PASS(progress
, nir
, nir_opt_conditional_discard
);
361 if (nir
->options
->max_unroll_iterations
) {
362 NIR_PASS(progress
, nir
, nir_opt_loop_unroll
, (nir_variable_mode
)0);
367 /* First third of converting glsl_to_nir.. this leaves things in a pre-
368 * nir_lower_io state, so that shader variants can more easily insert/
369 * replace variables, etc.
372 st_glsl_to_nir(struct st_context
*st
, struct gl_program
*prog
,
373 struct gl_shader_program
*shader_program
,
374 gl_shader_stage stage
)
376 const nir_shader_compiler_options
*options
=
377 st
->ctx
->Const
.ShaderCompilerOptions
[prog
->info
.stage
].NirOptions
;
378 enum pipe_shader_type type
= pipe_shader_type_from_mesa(stage
);
379 struct pipe_screen
*screen
= st
->pipe
->screen
;
380 bool is_scalar
= screen
->get_shader_param(screen
, type
, PIPE_SHADER_CAP_SCALAR_ISA
);
383 options
->lower_int64_options
|| options
->lower_doubles_options
;
388 nir_shader
*nir
= glsl_to_nir(st
->ctx
, shader_program
, stage
, options
);
390 /* Set the next shader stage hint for VS and TES. */
391 if (!nir
->info
.separate_shader
&&
392 (nir
->info
.stage
== MESA_SHADER_VERTEX
||
393 nir
->info
.stage
== MESA_SHADER_TESS_EVAL
)) {
395 unsigned prev_stages
= (1 << (prog
->info
.stage
+ 1)) - 1;
396 unsigned stages_mask
=
397 ~prev_stages
& shader_program
->data
->linked_stages
;
399 nir
->info
.next_stage
= stages_mask
?
400 (gl_shader_stage
) u_bit_scan(&stages_mask
) : MESA_SHADER_FRAGMENT
;
402 nir
->info
.next_stage
= MESA_SHADER_FRAGMENT
;
405 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
406 nir_shader
*softfp64
= NULL
;
407 if (nir
->info
.uses_64bit
&&
408 (options
->lower_doubles_options
& nir_lower_fp64_full_software
) != 0) {
409 softfp64
= glsl_float64_funcs_to_nir(st
->ctx
, options
);
410 ralloc_steal(ralloc_parent(nir
), softfp64
);
413 nir_variable_mode mask
=
414 (nir_variable_mode
) (nir_var_shader_in
| nir_var_shader_out
);
415 nir_remove_dead_variables(nir
, mask
);
417 if (options
->lower_all_io_to_temps
||
418 nir
->info
.stage
== MESA_SHADER_VERTEX
||
419 nir
->info
.stage
== MESA_SHADER_GEOMETRY
) {
420 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
421 nir_shader_get_entrypoint(nir
),
423 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
424 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
425 nir_shader_get_entrypoint(nir
),
429 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
430 NIR_PASS_V(nir
, nir_split_var_copies
);
431 NIR_PASS_V(nir
, nir_lower_var_copies
);
434 NIR_PASS_V(nir
, nir_lower_alu_to_scalar
, NULL
);
437 /* before buffers and vars_to_ssa */
438 NIR_PASS_V(nir
, gl_nir_lower_bindless_images
);
439 st_nir_opts(nir
, is_scalar
);
441 NIR_PASS_V(nir
, gl_nir_lower_buffers
, shader_program
);
442 /* Do a round of constant folding to clean up address calculations */
443 NIR_PASS_V(nir
, nir_opt_constant_folding
);
446 bool lowered_64bit_ops
= false;
447 bool progress
= false;
449 NIR_PASS_V(nir
, nir_opt_algebraic
);
453 if (options
->lower_int64_options
) {
454 NIR_PASS(progress
, nir
, nir_lower_int64
,
455 options
->lower_int64_options
);
457 if (options
->lower_doubles_options
) {
458 NIR_PASS(progress
, nir
, nir_lower_doubles
,
459 softfp64
, options
->lower_doubles_options
);
461 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
462 lowered_64bit_ops
|= progress
;
465 if (lowered_64bit_ops
)
466 st_nir_opts(nir
, is_scalar
);
472 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
473 * info on varyings, etc after NIR link time opts have been applied.
476 st_glsl_to_nir_post_opts(struct st_context
*st
, struct gl_program
*prog
,
477 struct gl_shader_program
*shader_program
)
479 nir_shader
*nir
= prog
->nir
;
481 /* Make a pass over the IR to add state references for any built-in
482 * uniforms that are used. This has to be done now (during linking).
483 * Code generation doesn't happen until the first time this shader is
484 * used for rendering. Waiting until then to generate the parameters is
485 * too late. At that point, the values for the built-in uniforms won't
486 * get sent to the shader.
488 nir_foreach_variable(var
, &nir
->uniforms
) {
489 if (strncmp(var
->name
, "gl_", 3) == 0) {
490 const nir_state_slot
*const slots
= var
->state_slots
;
491 assert(var
->state_slots
!= NULL
);
493 const struct glsl_type
*type
= glsl_without_array(var
->type
);
494 for (unsigned int i
= 0; i
< var
->num_state_slots
; i
++) {
496 if (glsl_type_is_struct_or_ifc(type
)) {
497 /* Builtin struct require specical handling for now we just
498 * make all members vec4. See st_nir_lower_builtin.
502 comps
= glsl_get_vector_elements(type
);
505 if (st
->ctx
->Const
.PackedDriverUniformStorage
) {
506 _mesa_add_sized_state_reference(prog
->Parameters
,
510 _mesa_add_state_reference(prog
->Parameters
,
517 /* Avoid reallocation of the program parameter list, because the uniform
518 * storage is only associated with the original parameter list.
519 * This should be enough for Bitmap and DrawPixels constants.
521 _mesa_reserve_parameter_storage(prog
->Parameters
, 8);
523 /* This has to be done last. Any operation the can cause
524 * prog->ParameterValues to get reallocated (e.g., anything that adds a
525 * program constant) has to happen before creating this linkage.
527 _mesa_associate_uniform_storage(st
->ctx
, shader_program
, prog
, true);
529 st_set_prog_affected_state_flags(prog
);
531 NIR_PASS_V(nir
, st_nir_lower_builtin
);
532 NIR_PASS_V(nir
, gl_nir_lower_atomics
, shader_program
, true);
533 NIR_PASS_V(nir
, nir_opt_intrinsics
);
535 nir_variable_mode mask
= nir_var_function_temp
;
536 nir_remove_dead_variables(nir
, mask
);
538 if (st
->ctx
->_Shader
->Flags
& GLSL_DUMP
) {
540 _mesa_log("NIR IR for linked %s program %d:\n",
541 _mesa_shader_stage_to_string(prog
->info
.stage
),
542 shader_program
->Name
);
543 nir_print_shader(nir
, _mesa_get_log_file());
548 /* TODO any better helper somewhere to sort a list? */
551 insert_sorted(struct exec_list
*var_list
, nir_variable
*new_var
)
553 nir_foreach_variable(var
, var_list
) {
554 if (var
->data
.location
> new_var
->data
.location
) {
555 exec_node_insert_node_before(&var
->node
, &new_var
->node
);
559 exec_list_push_tail(var_list
, &new_var
->node
);
563 sort_varyings(struct exec_list
*var_list
)
565 struct exec_list new_list
;
566 exec_list_make_empty(&new_list
);
567 nir_foreach_variable_safe(var
, var_list
) {
568 exec_node_remove(&var
->node
);
569 insert_sorted(&new_list
, var
);
571 exec_list_move_nodes_to(&new_list
, var_list
);
575 set_st_program(struct gl_program
*prog
,
576 struct gl_shader_program
*shader_program
,
579 struct st_vertex_program
*stvp
;
580 struct st_common_program
*stp
;
581 struct st_fragment_program
*stfp
;
582 struct st_compute_program
*stcp
;
584 switch (prog
->info
.stage
) {
585 case MESA_SHADER_VERTEX
:
586 stvp
= (struct st_vertex_program
*)prog
;
587 stvp
->shader_program
= shader_program
;
588 stvp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
589 stvp
->tgsi
.ir
.nir
= nir
;
591 case MESA_SHADER_GEOMETRY
:
592 case MESA_SHADER_TESS_CTRL
:
593 case MESA_SHADER_TESS_EVAL
:
594 stp
= (struct st_common_program
*)prog
;
595 stp
->shader_program
= shader_program
;
596 stp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
597 stp
->tgsi
.ir
.nir
= nir
;
599 case MESA_SHADER_FRAGMENT
:
600 stfp
= (struct st_fragment_program
*)prog
;
601 stfp
->shader_program
= shader_program
;
602 stfp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
603 stfp
->tgsi
.ir
.nir
= nir
;
605 case MESA_SHADER_COMPUTE
:
606 stcp
= (struct st_compute_program
*)prog
;
607 stcp
->shader_program
= shader_program
;
608 stcp
->tgsi
.ir_type
= PIPE_SHADER_IR_NIR
;
609 stcp
->tgsi
.prog
= nir
;
612 unreachable("unknown shader stage");
617 st_nir_get_mesa_program(struct gl_context
*ctx
,
618 struct gl_shader_program
*shader_program
,
619 struct gl_linked_shader
*shader
)
621 struct st_context
*st
= st_context(ctx
);
622 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
623 struct gl_program
*prog
;
625 validate_ir_tree(shader
->ir
);
627 prog
= shader
->Program
;
629 prog
->Parameters
= _mesa_new_parameter_list();
631 _mesa_copy_linked_program_data(shader_program
, shader
);
632 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
635 /* Remove reads from output registers. */
636 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_CAN_READ_OUTPUTS
))
637 lower_output_reads(shader
->Stage
, shader
->ir
);
639 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
641 _mesa_log("GLSL IR for linked %s program %d:\n",
642 _mesa_shader_stage_to_string(shader
->Stage
),
643 shader_program
->Name
);
644 _mesa_print_ir(_mesa_get_log_file(), shader
->ir
, NULL
);
648 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
649 _mesa_update_shader_textures_used(shader_program
, prog
);
651 nir_shader
*nir
= st_glsl_to_nir(st
, prog
, shader_program
, shader
->Stage
);
653 set_st_program(prog
, shader_program
, nir
);
658 st_nir_vectorize_io(nir_shader
*producer
, nir_shader
*consumer
)
660 NIR_PASS_V(producer
, nir_lower_io_to_vector
, nir_var_shader_out
);
661 NIR_PASS_V(producer
, nir_opt_combine_stores
, nir_var_shader_out
);
662 NIR_PASS_V(consumer
, nir_lower_io_to_vector
, nir_var_shader_in
);
664 if ((producer
)->info
.stage
!= MESA_SHADER_TESS_CTRL
) {
665 /* Calling lower_io_to_vector creates output variable writes with
666 * write-masks. We only support these for TCS outputs, so for other
667 * stages, we need to call nir_lower_io_to_temporaries to get rid of
668 * them. This, in turn, creates temporary variables and extra
669 * copy_deref intrinsics that we need to clean up.
671 NIR_PASS_V(producer
, nir_lower_io_to_temporaries
,
672 nir_shader_get_entrypoint(producer
), true, false);
673 NIR_PASS_V(producer
, nir_lower_global_vars_to_local
);
674 NIR_PASS_V(producer
, nir_split_var_copies
);
675 NIR_PASS_V(producer
, nir_lower_var_copies
);
680 st_nir_link_shaders(nir_shader
**producer
, nir_shader
**consumer
, bool scalar
)
683 NIR_PASS_V(*producer
, nir_lower_io_to_scalar_early
, nir_var_shader_out
);
684 NIR_PASS_V(*consumer
, nir_lower_io_to_scalar_early
, nir_var_shader_in
);
687 nir_lower_io_arrays_to_elements(*producer
, *consumer
);
689 st_nir_opts(*producer
, scalar
);
690 st_nir_opts(*consumer
, scalar
);
692 if (nir_link_opt_varyings(*producer
, *consumer
))
693 st_nir_opts(*consumer
, scalar
);
695 NIR_PASS_V(*producer
, nir_remove_dead_variables
, nir_var_shader_out
);
696 NIR_PASS_V(*consumer
, nir_remove_dead_variables
, nir_var_shader_in
);
698 if (nir_remove_unused_varyings(*producer
, *consumer
)) {
699 NIR_PASS_V(*producer
, nir_lower_global_vars_to_local
);
700 NIR_PASS_V(*consumer
, nir_lower_global_vars_to_local
);
702 /* The backend might not be able to handle indirects on
703 * temporaries so we need to lower indirects on any of the
704 * varyings we have demoted here.
706 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
707 * currently smart enough to handle indirects without causing excess
708 * spilling causing the gpu to hang.
710 * See the following thread for more details of the problem:
711 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
713 nir_variable_mode indirect_mask
= nir_var_function_temp
;
715 NIR_PASS_V(*producer
, nir_lower_indirect_derefs
, indirect_mask
);
716 NIR_PASS_V(*consumer
, nir_lower_indirect_derefs
, indirect_mask
);
718 st_nir_opts(*producer
, scalar
);
719 st_nir_opts(*consumer
, scalar
);
721 /* Lowering indirects can cause varying to become unused.
722 * nir_compact_varyings() depends on all dead varyings being removed so
723 * we need to call nir_remove_dead_variables() again here.
725 NIR_PASS_V(*producer
, nir_remove_dead_variables
, nir_var_shader_out
);
726 NIR_PASS_V(*consumer
, nir_remove_dead_variables
, nir_var_shader_in
);
731 st_lower_patch_vertices_in(struct gl_shader_program
*shader_prog
)
733 struct gl_linked_shader
*linked_tcs
=
734 shader_prog
->_LinkedShaders
[MESA_SHADER_TESS_CTRL
];
735 struct gl_linked_shader
*linked_tes
=
736 shader_prog
->_LinkedShaders
[MESA_SHADER_TESS_EVAL
];
738 /* If we have a TCS and TES linked together, lower TES patch vertices. */
739 if (linked_tcs
&& linked_tes
) {
740 nir_shader
*tcs_nir
= linked_tcs
->Program
->nir
;
741 nir_shader
*tes_nir
= linked_tes
->Program
->nir
;
743 /* The TES input vertex count is the TCS output vertex count,
744 * lower TES gl_PatchVerticesIn to a constant.
746 uint32_t tes_patch_verts
= tcs_nir
->info
.tess
.tcs_vertices_out
;
747 NIR_PASS_V(tes_nir
, nir_lower_patch_vertices
, tes_patch_verts
, NULL
);
754 st_nir_lower_wpos_ytransform(struct nir_shader
*nir
,
755 struct gl_program
*prog
,
756 struct pipe_screen
*pscreen
)
758 if (nir
->info
.stage
!= MESA_SHADER_FRAGMENT
)
761 static const gl_state_index16 wposTransformState
[STATE_LENGTH
] = {
762 STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
764 nir_lower_wpos_ytransform_options wpos_options
= { { 0 } };
766 memcpy(wpos_options
.state_tokens
, wposTransformState
,
767 sizeof(wpos_options
.state_tokens
));
768 wpos_options
.fs_coord_origin_upper_left
=
769 pscreen
->get_param(pscreen
,
770 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
);
771 wpos_options
.fs_coord_origin_lower_left
=
772 pscreen
->get_param(pscreen
,
773 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
774 wpos_options
.fs_coord_pixel_center_integer
=
775 pscreen
->get_param(pscreen
,
776 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
777 wpos_options
.fs_coord_pixel_center_half_integer
=
778 pscreen
->get_param(pscreen
,
779 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
);
781 if (nir_lower_wpos_ytransform(nir
, &wpos_options
)) {
782 nir_validate_shader(nir
, "after nir_lower_wpos_ytransform");
783 _mesa_add_state_reference(prog
->Parameters
, wposTransformState
);
788 st_link_nir(struct gl_context
*ctx
,
789 struct gl_shader_program
*shader_program
)
791 struct st_context
*st
= st_context(ctx
);
792 struct pipe_screen
*screen
= st
->pipe
->screen
;
793 bool is_scalar
[MESA_SHADER_STAGES
];
795 unsigned last_stage
= 0;
796 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
797 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
801 /* Determine scalar property of each shader stage */
802 enum pipe_shader_type type
= pipe_shader_type_from_mesa(shader
->Stage
);
803 is_scalar
[i
] = screen
->get_shader_param(screen
, type
,
804 PIPE_SHADER_CAP_SCALAR_ISA
);
806 st_nir_get_mesa_program(ctx
, shader_program
, shader
);
810 NIR_PASS_V(shader
->Program
->nir
, nir_lower_load_const_to_scalar
);
814 /* Linking the stages in the opposite order (from fragment to vertex)
815 * ensures that inter-shader outputs written to in an earlier stage
816 * are eliminated if they are (transitively) not used in a later
819 int next
= last_stage
;
820 for (int i
= next
- 1; i
>= 0; i
--) {
821 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
825 st_nir_link_shaders(&shader
->Program
->nir
,
826 &shader_program
->_LinkedShaders
[next
]->Program
->nir
,
832 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
833 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
837 nir_shader
*nir
= shader
->Program
->nir
;
839 NIR_PASS_V(nir
, st_nir_lower_wpos_ytransform
, shader
->Program
,
842 NIR_PASS_V(nir
, nir_lower_system_values
);
843 NIR_PASS_V(nir
, nir_lower_clip_cull_distance_arrays
);
845 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
846 shader
->Program
->info
= nir
->info
;
847 if (i
== MESA_SHADER_VERTEX
) {
848 /* NIR expands dual-slot inputs out to two locations. We need to
849 * compact things back down GL-style single-slot inputs to avoid
850 * confusing the state tracker.
852 shader
->Program
->info
.inputs_read
=
853 nir_get_single_slot_attribs_mask(nir
->info
.inputs_read
,
854 shader
->Program
->DualSlotInputs
);
858 struct gl_program
*prev_shader
=
859 shader_program
->_LinkedShaders
[prev
]->Program
;
861 /* We can't use nir_compact_varyings with transform feedback, since
862 * the pipe_stream_output->output_register field is based on the
863 * pre-compacted driver_locations.
865 if (!(prev_shader
->sh
.LinkedTransformFeedback
&&
866 prev_shader
->sh
.LinkedTransformFeedback
->NumVarying
> 0))
867 nir_compact_varyings(shader_program
->_LinkedShaders
[prev
]->Program
->nir
,
868 nir
, ctx
->API
!= API_OPENGL_COMPAT
);
870 if (ctx
->Const
.ShaderCompilerOptions
[i
].NirOptions
->vectorize_io
)
871 st_nir_vectorize_io(prev_shader
->nir
, nir
);
876 st_lower_patch_vertices_in(shader_program
);
878 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
879 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
883 st_glsl_to_nir_post_opts(st
, shader
->Program
, shader_program
);
885 assert(shader
->Program
);
886 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
887 _mesa_shader_stage_to_program(i
),
889 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
893 nir_sweep(shader
->Program
->nir
);
895 /* The GLSL IR won't be needed anymore. */
896 ralloc_free(shader
->ir
);
904 st_nir_assign_varying_locations(struct st_context
*st
, nir_shader
*nir
)
906 if (nir
->info
.stage
== MESA_SHADER_VERTEX
) {
907 /* Needs special handling so drvloc matches the vbo state: */
908 st_nir_assign_vs_in_locations(nir
);
909 /* Re-lower global vars, to deal with any dead VS inputs. */
910 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
912 sort_varyings(&nir
->outputs
);
913 st_nir_assign_var_locations(&nir
->outputs
,
916 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
917 } else if (nir
->info
.stage
== MESA_SHADER_GEOMETRY
||
918 nir
->info
.stage
== MESA_SHADER_TESS_CTRL
||
919 nir
->info
.stage
== MESA_SHADER_TESS_EVAL
) {
920 sort_varyings(&nir
->inputs
);
921 st_nir_assign_var_locations(&nir
->inputs
,
924 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
926 sort_varyings(&nir
->outputs
);
927 st_nir_assign_var_locations(&nir
->outputs
,
930 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
931 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
932 sort_varyings(&nir
->inputs
);
933 st_nir_assign_var_locations(&nir
->inputs
,
936 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
937 st_nir_assign_var_locations(&nir
->outputs
,
940 } else if (nir
->info
.stage
== MESA_SHADER_COMPUTE
) {
943 unreachable("invalid shader type");
948 st_nir_lower_samplers(struct pipe_screen
*screen
, nir_shader
*nir
,
949 struct gl_shader_program
*shader_program
,
950 struct gl_program
*prog
)
952 if (screen
->get_param(screen
, PIPE_CAP_NIR_SAMPLERS_AS_DEREF
))
953 NIR_PASS_V(nir
, gl_nir_lower_samplers_as_deref
, shader_program
);
955 NIR_PASS_V(nir
, gl_nir_lower_samplers
, shader_program
);
958 prog
->info
.textures_used
= nir
->info
.textures_used
;
959 prog
->info
.textures_used_by_txf
= nir
->info
.textures_used_by_txf
;
963 /* Last third of preparing nir from glsl, which happens after shader
967 st_finalize_nir(struct st_context
*st
, struct gl_program
*prog
,
968 struct gl_shader_program
*shader_program
, nir_shader
*nir
)
970 struct pipe_screen
*screen
= st
->pipe
->screen
;
971 const nir_shader_compiler_options
*options
=
972 st
->ctx
->Const
.ShaderCompilerOptions
[prog
->info
.stage
].NirOptions
;
974 NIR_PASS_V(nir
, nir_split_var_copies
);
975 NIR_PASS_V(nir
, nir_lower_var_copies
);
976 if (options
->lower_all_io_to_temps
||
977 options
->lower_all_io_to_elements
||
978 nir
->info
.stage
== MESA_SHADER_VERTEX
||
979 nir
->info
.stage
== MESA_SHADER_GEOMETRY
) {
980 NIR_PASS_V(nir
, nir_lower_io_arrays_to_elements_no_indirects
, false);
981 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
982 NIR_PASS_V(nir
, nir_lower_io_arrays_to_elements_no_indirects
, true);
985 st_nir_assign_varying_locations(st
, nir
);
987 NIR_PASS_V(nir
, nir_lower_atomics_to_ssbo
,
988 st
->ctx
->Const
.Program
[nir
->info
.stage
].MaxAtomicBuffers
);
990 st_nir_assign_uniform_locations(st
->ctx
, prog
,
993 /* Set num_uniforms in number of attribute slots (vec4s) */
994 nir
->num_uniforms
= DIV_ROUND_UP(prog
->Parameters
->NumParameterValues
, 4);
996 if (st
->ctx
->Const
.PackedDriverUniformStorage
) {
997 NIR_PASS_V(nir
, nir_lower_io
, nir_var_uniform
, st_glsl_type_dword_size
,
998 (nir_lower_io_options
)0);
999 NIR_PASS_V(nir
, nir_lower_uniforms_to_ubo
, 4);
1001 NIR_PASS_V(nir
, nir_lower_io
, nir_var_uniform
, st_glsl_uniforms_type_size
,
1002 (nir_lower_io_options
)0);
1005 st_nir_lower_samplers(screen
, nir
, shader_program
, prog
);