39251afdce385fea190a955c3d0804e9bc106b6d
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include "st_glsl_to_tgsi.h"
34
35 #include "glsl_parser_extras.h"
36 #include "ir_optimization.h"
37
38 #include "main/errors.h"
39 #include "main/shaderobj.h"
40 #include "main/uniforms.h"
41 #include "main/shaderapi.h"
42 #include "program/prog_instruction.h"
43 #include "program/sampler.h"
44
45 #include "pipe/p_context.h"
46 #include "pipe/p_screen.h"
47 #include "tgsi/tgsi_ureg.h"
48 #include "tgsi/tgsi_info.h"
49 #include "util/u_math.h"
50 #include "util/u_memory.h"
51 #include "st_program.h"
52 #include "st_mesa_to_tgsi.h"
53
54
55 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
56 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
57 (1 << PROGRAM_CONSTANT) | \
58 (1 << PROGRAM_UNIFORM))
59
60 #define MAX_GLSL_TEXTURE_OFFSET 4
61
62 class st_src_reg;
63 class st_dst_reg;
64
65 static int swizzle_for_size(int size);
66
67 /**
68 * This struct is a corresponding struct to TGSI ureg_src.
69 */
70 class st_src_reg {
71 public:
72 st_src_reg(gl_register_file file, int index, const glsl_type *type)
73 {
74 this->file = file;
75 this->index = index;
76 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
77 this->swizzle = swizzle_for_size(type->vector_elements);
78 else
79 this->swizzle = SWIZZLE_XYZW;
80 this->negate = 0;
81 this->index2D = 0;
82 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
83 this->reladdr = NULL;
84 this->reladdr2 = NULL;
85 this->has_index2 = false;
86 this->double_reg2 = false;
87 }
88
89 st_src_reg(gl_register_file file, int index, int type)
90 {
91 this->type = type;
92 this->file = file;
93 this->index = index;
94 this->index2D = 0;
95 this->swizzle = SWIZZLE_XYZW;
96 this->negate = 0;
97 this->reladdr = NULL;
98 this->reladdr2 = NULL;
99 this->has_index2 = false;
100 this->double_reg2 = false;
101 }
102
103 st_src_reg(gl_register_file file, int index, int type, int index2D)
104 {
105 this->type = type;
106 this->file = file;
107 this->index = index;
108 this->index2D = index2D;
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->reladdr = NULL;
112 this->reladdr2 = NULL;
113 this->has_index2 = false;
114 this->double_reg2 = false;
115 }
116
117 st_src_reg()
118 {
119 this->type = GLSL_TYPE_ERROR;
120 this->file = PROGRAM_UNDEFINED;
121 this->index = 0;
122 this->index2D = 0;
123 this->swizzle = 0;
124 this->negate = 0;
125 this->reladdr = NULL;
126 this->reladdr2 = NULL;
127 this->has_index2 = false;
128 this->double_reg2 = false;
129 }
130
131 explicit st_src_reg(st_dst_reg reg);
132
133 gl_register_file file; /**< PROGRAM_* from Mesa */
134 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
135 int index2D;
136 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
137 int negate; /**< NEGATE_XYZW mask from mesa */
138 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
139 /** Register index should be offset by the integer in this reg. */
140 st_src_reg *reladdr;
141 st_src_reg *reladdr2;
142 bool has_index2;
143 /*
144 * Is this the second half of a double register pair?
145 * currently used for input mapping only.
146 */
147 bool double_reg2;
148 };
149
150 class st_dst_reg {
151 public:
152 st_dst_reg(gl_register_file file, int writemask, int type, int index)
153 {
154 this->file = file;
155 this->index = index;
156 this->writemask = writemask;
157 this->cond_mask = COND_TR;
158 this->reladdr = NULL;
159 this->type = type;
160 }
161
162 st_dst_reg(gl_register_file file, int writemask, int type)
163 {
164 this->file = file;
165 this->index = 0;
166 this->writemask = writemask;
167 this->cond_mask = COND_TR;
168 this->reladdr = NULL;
169 this->type = type;
170 }
171
172 st_dst_reg()
173 {
174 this->type = GLSL_TYPE_ERROR;
175 this->file = PROGRAM_UNDEFINED;
176 this->index = 0;
177 this->writemask = 0;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 }
181
182 explicit st_dst_reg(st_src_reg reg);
183
184 gl_register_file file; /**< PROGRAM_* from Mesa */
185 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
186 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
187 GLuint cond_mask:4;
188 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
189 /** Register index should be offset by the integer in this reg. */
190 st_src_reg *reladdr;
191 };
192
193 st_src_reg::st_src_reg(st_dst_reg reg)
194 {
195 this->type = reg.type;
196 this->file = reg.file;
197 this->index = reg.index;
198 this->swizzle = SWIZZLE_XYZW;
199 this->negate = 0;
200 this->reladdr = reg.reladdr;
201 this->index2D = 0;
202 this->reladdr2 = NULL;
203 this->has_index2 = false;
204 this->double_reg2 = false;
205 }
206
207 st_dst_reg::st_dst_reg(st_src_reg reg)
208 {
209 this->type = reg.type;
210 this->file = reg.file;
211 this->index = reg.index;
212 this->writemask = WRITEMASK_XYZW;
213 this->cond_mask = COND_TR;
214 this->reladdr = reg.reladdr;
215 }
216
217 class glsl_to_tgsi_instruction : public exec_node {
218 public:
219 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
220
221 unsigned op;
222 st_dst_reg dst[2];
223 st_src_reg src[4];
224 /** Pointer to the ir source this tree came from for debugging */
225 ir_instruction *ir;
226 GLboolean cond_update;
227 bool saturate;
228 st_src_reg sampler; /**< sampler register */
229 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
230 int tex_target; /**< One of TEXTURE_*_INDEX */
231 GLboolean tex_shadow;
232
233 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
234 unsigned tex_offset_num_offset;
235 int dead_mask; /**< Used in dead code elimination */
236
237 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
238 };
239
240 class variable_storage : public exec_node {
241 public:
242 variable_storage(ir_variable *var, gl_register_file file, int index)
243 : file(file), index(index), var(var)
244 {
245 /* empty */
246 }
247
248 gl_register_file file;
249 int index;
250 ir_variable *var; /* variable that maps to this, if any */
251 };
252
253 class immediate_storage : public exec_node {
254 public:
255 immediate_storage(gl_constant_value *values, int size32, int type)
256 {
257 memcpy(this->values, values, size32 * sizeof(gl_constant_value));
258 this->size32 = size32;
259 this->type = type;
260 }
261
262 /* doubles are stored across 2 gl_constant_values */
263 gl_constant_value values[4];
264 int size32; /**< Number of 32-bit components (1-4) */
265 int type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
266 };
267
268 class function_entry : public exec_node {
269 public:
270 ir_function_signature *sig;
271
272 /**
273 * identifier of this function signature used by the program.
274 *
275 * At the point that TGSI instructions for function calls are
276 * generated, we don't know the address of the first instruction of
277 * the function body. So we make the BranchTarget that is called a
278 * small integer and rewrite them during set_branchtargets().
279 */
280 int sig_id;
281
282 /**
283 * Pointer to first instruction of the function body.
284 *
285 * Set during function body emits after main() is processed.
286 */
287 glsl_to_tgsi_instruction *bgn_inst;
288
289 /**
290 * Index of the first instruction of the function body in actual TGSI.
291 *
292 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
293 */
294 int inst;
295
296 /** Storage for the return value. */
297 st_src_reg return_reg;
298 };
299
300 struct glsl_to_tgsi_visitor : public ir_visitor {
301 public:
302 glsl_to_tgsi_visitor();
303 ~glsl_to_tgsi_visitor();
304
305 function_entry *current_function;
306
307 struct gl_context *ctx;
308 struct gl_program *prog;
309 struct gl_shader_program *shader_program;
310 struct gl_shader *shader;
311 struct gl_shader_compiler_options *options;
312
313 int next_temp;
314
315 unsigned *array_sizes;
316 unsigned max_num_arrays;
317 unsigned next_array;
318
319 int num_address_regs;
320 int samplers_used;
321 bool indirect_addr_consts;
322 int wpos_transform_const;
323
324 int glsl_version;
325 bool native_integers;
326 bool have_sqrt;
327 bool have_fma;
328
329 variable_storage *find_variable_storage(ir_variable *var);
330
331 int add_constant(gl_register_file file, gl_constant_value values[8],
332 int size, int datatype, GLuint *swizzle_out);
333
334 function_entry *get_function_signature(ir_function_signature *sig);
335
336 st_src_reg get_temp(const glsl_type *type);
337 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
338
339 st_src_reg st_src_reg_for_double(double val);
340 st_src_reg st_src_reg_for_float(float val);
341 st_src_reg st_src_reg_for_int(int val);
342 st_src_reg st_src_reg_for_type(int type, int val);
343
344 /**
345 * \name Visit methods
346 *
347 * As typical for the visitor pattern, there must be one \c visit method for
348 * each concrete subclass of \c ir_instruction. Virtual base classes within
349 * the hierarchy should not have \c visit methods.
350 */
351 /*@{*/
352 virtual void visit(ir_variable *);
353 virtual void visit(ir_loop *);
354 virtual void visit(ir_loop_jump *);
355 virtual void visit(ir_function_signature *);
356 virtual void visit(ir_function *);
357 virtual void visit(ir_expression *);
358 virtual void visit(ir_swizzle *);
359 virtual void visit(ir_dereference_variable *);
360 virtual void visit(ir_dereference_array *);
361 virtual void visit(ir_dereference_record *);
362 virtual void visit(ir_assignment *);
363 virtual void visit(ir_constant *);
364 virtual void visit(ir_call *);
365 virtual void visit(ir_return *);
366 virtual void visit(ir_discard *);
367 virtual void visit(ir_texture *);
368 virtual void visit(ir_if *);
369 virtual void visit(ir_emit_vertex *);
370 virtual void visit(ir_end_primitive *);
371 /*@}*/
372
373 st_src_reg result;
374
375 /** List of variable_storage */
376 exec_list variables;
377
378 /** List of immediate_storage */
379 exec_list immediates;
380 unsigned num_immediates;
381
382 /** List of function_entry */
383 exec_list function_signatures;
384 int next_signature_id;
385
386 /** List of glsl_to_tgsi_instruction */
387 exec_list instructions;
388
389 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
390
391 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
392 st_dst_reg dst, st_src_reg src0);
393
394 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
395 st_dst_reg dst, st_dst_reg dst1,
396 st_src_reg src0);
397
398 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
399 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
400
401 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
402 st_dst_reg dst,
403 st_src_reg src0, st_src_reg src1, st_src_reg src2);
404
405 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
406 st_dst_reg dst,
407 st_src_reg src0, st_src_reg src1,
408 st_src_reg src2, st_src_reg src3);
409
410 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
411 st_dst_reg dst, st_dst_reg dst1,
412 st_src_reg src0, st_src_reg src1,
413 st_src_reg src2, st_src_reg src3);
414
415 unsigned get_opcode(ir_instruction *ir, unsigned op,
416 st_dst_reg dst,
417 st_src_reg src0, st_src_reg src1);
418
419 /**
420 * Emit the correct dot-product instruction for the type of arguments
421 */
422 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
423 st_dst_reg dst,
424 st_src_reg src0,
425 st_src_reg src1,
426 unsigned elements);
427
428 void emit_scalar(ir_instruction *ir, unsigned op,
429 st_dst_reg dst, st_src_reg src0);
430
431 void emit_scalar(ir_instruction *ir, unsigned op,
432 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
433
434 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
435
436 bool try_emit_mad(ir_expression *ir,
437 int mul_operand);
438 bool try_emit_mad_for_and_not(ir_expression *ir,
439 int mul_operand);
440
441 void emit_swz(ir_expression *ir);
442
443 bool process_move_condition(ir_rvalue *ir);
444
445 void simplify_cmp(void);
446
447 void rename_temp_register(int index, int new_index);
448 int get_first_temp_read(int index);
449 int get_first_temp_write(int index);
450 int get_last_temp_read(int index);
451 int get_last_temp_write(int index);
452
453 void copy_propagate(void);
454 int eliminate_dead_code(void);
455
456 void merge_two_dsts(void);
457 void merge_registers(void);
458 void renumber_registers(void);
459
460 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
461 st_dst_reg *l, st_src_reg *r,
462 st_src_reg *cond, bool cond_swap);
463
464 void *mem_ctx;
465 };
466
467 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
468
469 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
470
471 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
472 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
473 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
474
475 static void
476 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
477
478 static void
479 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
480 {
481 va_list args;
482 va_start(args, fmt);
483 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
484 va_end(args);
485
486 prog->LinkStatus = GL_FALSE;
487 }
488
489 static int
490 swizzle_for_size(int size)
491 {
492 static const int size_swizzles[4] = {
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
495 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
496 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
497 };
498
499 assert((size >= 1) && (size <= 4));
500 return size_swizzles[size - 1];
501 }
502
503 static bool
504 is_tex_instruction(unsigned opcode)
505 {
506 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
507 return info->is_tex;
508 }
509
510 static unsigned
511 num_inst_dst_regs(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->num_dst;
515 }
516
517 static unsigned
518 num_inst_src_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->is_tex ? info->num_src - 1 : info->num_src;
522 }
523
524 glsl_to_tgsi_instruction *
525 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
526 st_dst_reg dst, st_dst_reg dst1,
527 st_src_reg src0, st_src_reg src1,
528 st_src_reg src2, st_src_reg src3)
529 {
530 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
531 int num_reladdr = 0, i, j;
532
533 op = get_opcode(ir, op, dst, src0, src1);
534
535 /* If we have to do relative addressing, we want to load the ARL
536 * reg directly for one of the regs, and preload the other reladdr
537 * sources into temps.
538 */
539 num_reladdr += dst.reladdr != NULL;
540 num_reladdr += dst1.reladdr != NULL;
541 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
542 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
543 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
544 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
545
546 reladdr_to_temp(ir, &src3, &num_reladdr);
547 reladdr_to_temp(ir, &src2, &num_reladdr);
548 reladdr_to_temp(ir, &src1, &num_reladdr);
549 reladdr_to_temp(ir, &src0, &num_reladdr);
550
551 if (dst.reladdr) {
552 emit_arl(ir, address_reg, *dst.reladdr);
553 num_reladdr--;
554 }
555 if (dst1.reladdr) {
556 emit_arl(ir, address_reg, *dst1.reladdr);
557 num_reladdr--;
558 }
559 assert(num_reladdr == 0);
560
561 inst->op = op;
562 inst->dst[0] = dst;
563 inst->dst[1] = dst1;
564 inst->src[0] = src0;
565 inst->src[1] = src1;
566 inst->src[2] = src2;
567 inst->src[3] = src3;
568 inst->ir = ir;
569 inst->dead_mask = 0;
570
571 inst->function = NULL;
572
573 /* Update indirect addressing status used by TGSI */
574 if (dst.reladdr) {
575 switch(dst.file) {
576 case PROGRAM_STATE_VAR:
577 case PROGRAM_CONSTANT:
578 case PROGRAM_UNIFORM:
579 this->indirect_addr_consts = true;
580 break;
581 case PROGRAM_IMMEDIATE:
582 assert(!"immediates should not have indirect addressing");
583 break;
584 default:
585 break;
586 }
587 }
588 else {
589 for (i = 0; i < 4; i++) {
590 if(inst->src[i].reladdr) {
591 switch(inst->src[i].file) {
592 case PROGRAM_STATE_VAR:
593 case PROGRAM_CONSTANT:
594 case PROGRAM_UNIFORM:
595 this->indirect_addr_consts = true;
596 break;
597 case PROGRAM_IMMEDIATE:
598 assert(!"immediates should not have indirect addressing");
599 break;
600 default:
601 break;
602 }
603 }
604 }
605 }
606
607 this->instructions.push_tail(inst);
608
609 /*
610 * This section contains the double processing.
611 * GLSL just represents doubles as single channel values,
612 * however most HW and TGSI represent doubles as pairs of register channels.
613 *
614 * so we have to fixup destination writemask/index and src swizzle/indexes.
615 * dest writemasks need to translate from single channel write mask
616 * to a dual-channel writemask, but also need to modify the index,
617 * if we are touching the Z,W fields in the pre-translated writemask.
618 *
619 * src channels have similiar index modifications along with swizzle
620 * changes to we pick the XY, ZW pairs from the correct index.
621 *
622 * GLSL [0].x -> TGSI [0].xy
623 * GLSL [0].y -> TGSI [0].zw
624 * GLSL [0].z -> TGSI [1].xy
625 * GLSL [0].w -> TGSI [1].zw
626 */
627 if (inst->dst[0].type == GLSL_TYPE_DOUBLE || inst->dst[1].type == GLSL_TYPE_DOUBLE ||
628 inst->src[0].type == GLSL_TYPE_DOUBLE) {
629 glsl_to_tgsi_instruction *dinst = NULL;
630 int initial_src_swz[4], initial_src_idx[4];
631 int initial_dst_idx[2], initial_dst_writemask[2];
632 /* select the writemask for dst0 or dst1 */
633 unsigned writemask = inst->dst[0].file == PROGRAM_UNDEFINED ? inst->dst[1].writemask : inst->dst[0].writemask;
634
635 /* copy out the writemask, index and swizzles for all src/dsts. */
636 for (j = 0; j < 2; j++) {
637 initial_dst_writemask[j] = inst->dst[j].writemask;
638 initial_dst_idx[j] = inst->dst[j].index;
639 }
640
641 for (j = 0; j < 4; j++) {
642 initial_src_swz[j] = inst->src[j].swizzle;
643 initial_src_idx[j] = inst->src[j].index;
644 }
645
646 /*
647 * scan all the components in the dst writemask
648 * generate an instruction for each of them if required.
649 */
650 while (writemask) {
651
652 int i = u_bit_scan(&writemask);
653
654 /* first time use previous instruction */
655 if (dinst == NULL) {
656 dinst = inst;
657 } else {
658 /* create a new instructions for subsequent attempts */
659 dinst = new(mem_ctx) glsl_to_tgsi_instruction();
660 *dinst = *inst;
661 dinst->next = NULL;
662 dinst->prev = NULL;
663 this->instructions.push_tail(dinst);
664 }
665
666 /* modify the destination if we are splitting */
667 for (j = 0; j < 2; j++) {
668 if (dinst->dst[j].type == GLSL_TYPE_DOUBLE) {
669 dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY;
670 dinst->dst[j].index = initial_dst_idx[j];
671 if (i > 1)
672 dinst->dst[j].index++;
673 } else {
674 /* if we aren't writing to a double, just get the bit of the initial writemask
675 for this channel */
676 dinst->dst[j].writemask = initial_dst_writemask[j] & (1 << i);
677 }
678 }
679
680 /* modify the src registers */
681 for (j = 0; j < 4; j++) {
682 int swz = GET_SWZ(initial_src_swz[j], i);
683
684 if (dinst->src[j].type == GLSL_TYPE_DOUBLE) {
685 dinst->src[j].index = initial_src_idx[j];
686 if (swz > 1) {
687 dinst->src[j].double_reg2 = true;
688 dinst->src[j].index++;
689 }
690
691 if (swz & 1)
692 dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
693 else
694 dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y);
695
696 } else {
697 /* some opcodes are special case in what they use as sources
698 - F2D is a float src0, DLDEXP is integer src1 */
699 if (op == TGSI_OPCODE_F2D ||
700 op == TGSI_OPCODE_DLDEXP ||
701 (op == TGSI_OPCODE_UCMP && dinst->dst[0].type == GLSL_TYPE_DOUBLE)) {
702 dinst->src[j].swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
703 }
704 }
705 }
706 }
707 inst = dinst;
708 }
709
710
711 return inst;
712 }
713
714 glsl_to_tgsi_instruction *
715 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
716 st_dst_reg dst,
717 st_src_reg src0, st_src_reg src1,
718 st_src_reg src2, st_src_reg src3)
719 {
720 return emit(ir, op, dst, undef_dst, src0, src1, src2, src3);
721 }
722
723 glsl_to_tgsi_instruction *
724 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
725 st_dst_reg dst, st_src_reg src0,
726 st_src_reg src1, st_src_reg src2)
727 {
728 return emit(ir, op, dst, undef_dst, src0, src1, src2, undef_src);
729 }
730
731 glsl_to_tgsi_instruction *
732 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
733 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
734 {
735 return emit(ir, op, dst, undef_dst, src0, src1, undef_src, undef_src);
736 }
737
738 glsl_to_tgsi_instruction *
739 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
740 st_dst_reg dst, st_src_reg src0)
741 {
742 assert(dst.writemask != 0);
743 return emit(ir, op, dst, undef_dst, src0, undef_src, undef_src, undef_src);
744 }
745
746 glsl_to_tgsi_instruction *
747 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
748 st_dst_reg dst, st_dst_reg dst1, st_src_reg src0)
749 {
750 return emit(ir, op, dst, dst1, src0, undef_src, undef_src, undef_src);
751 }
752
753 glsl_to_tgsi_instruction *
754 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
755 {
756 return emit(ir, op, undef_dst, undef_dst, undef_src, undef_src, undef_src, undef_src);
757 }
758
759 /**
760 * Determines whether to use an integer, unsigned integer, or float opcode
761 * based on the operands and input opcode, then emits the result.
762 */
763 unsigned
764 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
765 st_dst_reg dst,
766 st_src_reg src0, st_src_reg src1)
767 {
768 int type = GLSL_TYPE_FLOAT;
769
770 if (op == TGSI_OPCODE_MOV)
771 return op;
772
773 assert(src0.type != GLSL_TYPE_ARRAY);
774 assert(src0.type != GLSL_TYPE_STRUCT);
775 assert(src1.type != GLSL_TYPE_ARRAY);
776 assert(src1.type != GLSL_TYPE_STRUCT);
777
778 if (src0.type == GLSL_TYPE_DOUBLE || src1.type == GLSL_TYPE_DOUBLE)
779 type = GLSL_TYPE_DOUBLE;
780 else if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
781 type = GLSL_TYPE_FLOAT;
782 else if (native_integers)
783 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
784
785 #define case5(c, f, i, u, d) \
786 case TGSI_OPCODE_##c: \
787 if (type == GLSL_TYPE_DOUBLE) \
788 op = TGSI_OPCODE_##d; \
789 else if (type == GLSL_TYPE_INT) \
790 op = TGSI_OPCODE_##i; \
791 else if (type == GLSL_TYPE_UINT) \
792 op = TGSI_OPCODE_##u; \
793 else \
794 op = TGSI_OPCODE_##f; \
795 break;
796
797 #define case4(c, f, i, u) \
798 case TGSI_OPCODE_##c: \
799 if (type == GLSL_TYPE_INT) \
800 op = TGSI_OPCODE_##i; \
801 else if (type == GLSL_TYPE_UINT) \
802 op = TGSI_OPCODE_##u; \
803 else \
804 op = TGSI_OPCODE_##f; \
805 break;
806
807 #define case3(f, i, u) case4(f, f, i, u)
808 #define case4d(f, i, u, d) case5(f, f, i, u, d)
809 #define case3fid(f, i, d) case5(f, f, i, i, d)
810 #define case2fi(f, i) case4(f, f, i, i)
811 #define case2iu(i, u) case4(i, LAST, i, u)
812
813 #define casecomp(c, f, i, u, d) \
814 case TGSI_OPCODE_##c: \
815 if (type == GLSL_TYPE_DOUBLE) \
816 op = TGSI_OPCODE_##d; \
817 else if (type == GLSL_TYPE_INT) \
818 op = TGSI_OPCODE_##i; \
819 else if (type == GLSL_TYPE_UINT) \
820 op = TGSI_OPCODE_##u; \
821 else if (native_integers) \
822 op = TGSI_OPCODE_##f; \
823 else \
824 op = TGSI_OPCODE_##c; \
825 break;
826
827 switch(op) {
828 case3fid(ADD, UADD, DADD);
829 case3fid(MUL, UMUL, DMUL);
830 case3fid(MAD, UMAD, DMAD);
831 case3fid(FMA, UMAD, DFMA);
832 case3(DIV, IDIV, UDIV);
833 case4d(MAX, IMAX, UMAX, DMAX);
834 case4d(MIN, IMIN, UMIN, DMIN);
835 case2iu(MOD, UMOD);
836
837 casecomp(SEQ, FSEQ, USEQ, USEQ, DSEQ);
838 casecomp(SNE, FSNE, USNE, USNE, DSNE);
839 casecomp(SGE, FSGE, ISGE, USGE, DSGE);
840 casecomp(SLT, FSLT, ISLT, USLT, DSLT);
841
842 case2iu(ISHR, USHR);
843
844 case3fid(SSG, ISSG, DSSG);
845 case3fid(ABS, IABS, DABS);
846
847 case2iu(IBFE, UBFE);
848 case2iu(IMSB, UMSB);
849 case2iu(IMUL_HI, UMUL_HI);
850
851 case3fid(SQRT, SQRT, DSQRT);
852
853 case3fid(RCP, RCP, DRCP);
854 case3fid(RSQ, RSQ, DRSQ);
855
856 case3fid(FRC, FRC, DFRAC);
857 case3fid(TRUNC, TRUNC, DTRUNC);
858 case3fid(CEIL, CEIL, DCEIL);
859 case3fid(FLR, FLR, DFLR);
860 case3fid(ROUND, ROUND, DROUND);
861
862 default: break;
863 }
864
865 assert(op != TGSI_OPCODE_LAST);
866 return op;
867 }
868
869 glsl_to_tgsi_instruction *
870 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
871 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
872 unsigned elements)
873 {
874 static const unsigned dot_opcodes[] = {
875 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
876 };
877
878 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
879 }
880
881 /**
882 * Emits TGSI scalar opcodes to produce unique answers across channels.
883 *
884 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
885 * channel determines the result across all channels. So to do a vec4
886 * of this operation, we want to emit a scalar per source channel used
887 * to produce dest channels.
888 */
889 void
890 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
891 st_dst_reg dst,
892 st_src_reg orig_src0, st_src_reg orig_src1)
893 {
894 int i, j;
895 int done_mask = ~dst.writemask;
896
897 /* TGSI RCP is a scalar operation splatting results to all channels,
898 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
899 * dst channels.
900 */
901 for (i = 0; i < 4; i++) {
902 GLuint this_mask = (1 << i);
903 st_src_reg src0 = orig_src0;
904 st_src_reg src1 = orig_src1;
905
906 if (done_mask & this_mask)
907 continue;
908
909 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
910 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
911 for (j = i + 1; j < 4; j++) {
912 /* If there is another enabled component in the destination that is
913 * derived from the same inputs, generate its value on this pass as
914 * well.
915 */
916 if (!(done_mask & (1 << j)) &&
917 GET_SWZ(src0.swizzle, j) == src0_swiz &&
918 GET_SWZ(src1.swizzle, j) == src1_swiz) {
919 this_mask |= (1 << j);
920 }
921 }
922 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
923 src0_swiz, src0_swiz);
924 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
925 src1_swiz, src1_swiz);
926
927 dst.writemask = this_mask;
928 emit(ir, op, dst, src0, src1);
929 done_mask |= this_mask;
930 }
931 }
932
933 void
934 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
935 st_dst_reg dst, st_src_reg src0)
936 {
937 st_src_reg undef = undef_src;
938
939 undef.swizzle = SWIZZLE_XXXX;
940
941 emit_scalar(ir, op, dst, src0, undef);
942 }
943
944 void
945 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
946 st_dst_reg dst, st_src_reg src0)
947 {
948 int op = TGSI_OPCODE_ARL;
949
950 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
951 op = TGSI_OPCODE_UARL;
952
953 assert(dst.file == PROGRAM_ADDRESS);
954 if (dst.index >= this->num_address_regs)
955 this->num_address_regs = dst.index + 1;
956
957 emit(NULL, op, dst, src0);
958 }
959
960 int
961 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
962 gl_constant_value values[8], int size, int datatype,
963 GLuint *swizzle_out)
964 {
965 if (file == PROGRAM_CONSTANT) {
966 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
967 size, datatype, swizzle_out);
968 }
969
970 assert(file == PROGRAM_IMMEDIATE);
971
972 int index = 0;
973 immediate_storage *entry;
974 int size32 = size * (datatype == GL_DOUBLE ? 2 : 1);
975 int i;
976
977 /* Search immediate storage to see if we already have an identical
978 * immediate that we can use instead of adding a duplicate entry.
979 */
980 foreach_in_list(immediate_storage, entry, &this->immediates) {
981 immediate_storage *tmp = entry;
982
983 for (i = 0; i * 4 < size32; i++) {
984 int slot_size = MIN2(size32 - (i * 4), 4);
985 if (tmp->type != datatype || tmp->size32 != slot_size)
986 break;
987 if (memcmp(tmp->values, &values[i * 4],
988 slot_size * sizeof(gl_constant_value)))
989 break;
990
991 /* Everything matches, keep going until the full size is matched */
992 tmp = (immediate_storage *)tmp->next;
993 }
994
995 /* The full value matched */
996 if (i * 4 >= size32)
997 return index;
998
999 index++;
1000 }
1001
1002 for (i = 0; i * 4 < size32; i++) {
1003 int slot_size = MIN2(size32 - (i * 4), 4);
1004 /* Add this immediate to the list. */
1005 entry = new(mem_ctx) immediate_storage(&values[i * 4], slot_size, datatype);
1006 this->immediates.push_tail(entry);
1007 this->num_immediates++;
1008 }
1009 return index;
1010 }
1011
1012 st_src_reg
1013 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
1014 {
1015 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
1016 union gl_constant_value uval;
1017
1018 uval.f = val;
1019 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
1020
1021 return src;
1022 }
1023
1024 st_src_reg
1025 glsl_to_tgsi_visitor::st_src_reg_for_double(double val)
1026 {
1027 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_DOUBLE);
1028 union gl_constant_value uval[2];
1029
1030 uval[0].u = *(uint32_t *)&val;
1031 uval[1].u = *(((uint32_t *)&val) + 1);
1032 src.index = add_constant(src.file, uval, 1, GL_DOUBLE, &src.swizzle);
1033
1034 return src;
1035 }
1036
1037 st_src_reg
1038 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
1039 {
1040 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
1041 union gl_constant_value uval;
1042
1043 assert(native_integers);
1044
1045 uval.i = val;
1046 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
1047
1048 return src;
1049 }
1050
1051 st_src_reg
1052 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
1053 {
1054 if (native_integers)
1055 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
1056 st_src_reg_for_int(val);
1057 else
1058 return st_src_reg_for_float(val);
1059 }
1060
1061 static int
1062 type_size(const struct glsl_type *type)
1063 {
1064 unsigned int i;
1065 int size;
1066
1067 switch (type->base_type) {
1068 case GLSL_TYPE_UINT:
1069 case GLSL_TYPE_INT:
1070 case GLSL_TYPE_FLOAT:
1071 case GLSL_TYPE_BOOL:
1072 if (type->is_matrix()) {
1073 return type->matrix_columns;
1074 } else {
1075 /* Regardless of size of vector, it gets a vec4. This is bad
1076 * packing for things like floats, but otherwise arrays become a
1077 * mess. Hopefully a later pass over the code can pack scalars
1078 * down if appropriate.
1079 */
1080 return 1;
1081 }
1082 break;
1083 case GLSL_TYPE_DOUBLE:
1084 if (type->is_matrix()) {
1085 if (type->vector_elements <= 2)
1086 return type->matrix_columns;
1087 else
1088 return type->matrix_columns * 2;
1089 } else {
1090 /* For doubles if we have a double or dvec2 they fit in one
1091 * vec4, else they need 2 vec4s.
1092 */
1093 if (type->vector_elements <= 2)
1094 return 1;
1095 else
1096 return 2;
1097 }
1098 break;
1099 case GLSL_TYPE_ARRAY:
1100 assert(type->length > 0);
1101 return type_size(type->fields.array) * type->length;
1102 case GLSL_TYPE_STRUCT:
1103 size = 0;
1104 for (i = 0; i < type->length; i++) {
1105 size += type_size(type->fields.structure[i].type);
1106 }
1107 return size;
1108 case GLSL_TYPE_SAMPLER:
1109 case GLSL_TYPE_IMAGE:
1110 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1111 * at link time.
1112 */
1113 return 1;
1114 case GLSL_TYPE_ATOMIC_UINT:
1115 case GLSL_TYPE_INTERFACE:
1116 case GLSL_TYPE_VOID:
1117 case GLSL_TYPE_ERROR:
1118 assert(!"Invalid type in type_size");
1119 break;
1120 }
1121 return 0;
1122 }
1123
1124 /**
1125 * In the initial pass of codegen, we assign temporary numbers to
1126 * intermediate results. (not SSA -- variable assignments will reuse
1127 * storage).
1128 */
1129 st_src_reg
1130 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1131 {
1132 st_src_reg src;
1133
1134 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1135 src.reladdr = NULL;
1136 src.negate = 0;
1137
1138 if (!options->EmitNoIndirectTemp &&
1139 (type->is_array() || type->is_matrix())) {
1140
1141 if (next_array >= max_num_arrays) {
1142 max_num_arrays += 32;
1143 array_sizes = (unsigned*)
1144 realloc(array_sizes, sizeof(array_sizes[0]) * max_num_arrays);
1145 }
1146
1147 src.file = PROGRAM_ARRAY;
1148 src.index = next_array << 16 | 0x8000;
1149 array_sizes[next_array] = type_size(type);
1150 ++next_array;
1151
1152 } else {
1153 src.file = PROGRAM_TEMPORARY;
1154 src.index = next_temp;
1155 next_temp += type_size(type);
1156 }
1157
1158 if (type->is_array() || type->is_record()) {
1159 src.swizzle = SWIZZLE_NOOP;
1160 } else {
1161 src.swizzle = swizzle_for_size(type->vector_elements);
1162 }
1163
1164 return src;
1165 }
1166
1167 variable_storage *
1168 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1169 {
1170
1171 foreach_in_list(variable_storage, entry, &this->variables) {
1172 if (entry->var == var)
1173 return entry;
1174 }
1175
1176 return NULL;
1177 }
1178
1179 void
1180 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1181 {
1182 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1183 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1184
1185 fp->OriginUpperLeft = ir->data.origin_upper_left;
1186 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1187 }
1188
1189 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1190 unsigned int i;
1191 const ir_state_slot *const slots = ir->get_state_slots();
1192 assert(slots != NULL);
1193
1194 /* Check if this statevar's setup in the STATE file exactly
1195 * matches how we'll want to reference it as a
1196 * struct/array/whatever. If not, then we need to move it into
1197 * temporary storage and hope that it'll get copy-propagated
1198 * out.
1199 */
1200 for (i = 0; i < ir->get_num_state_slots(); i++) {
1201 if (slots[i].swizzle != SWIZZLE_XYZW) {
1202 break;
1203 }
1204 }
1205
1206 variable_storage *storage;
1207 st_dst_reg dst;
1208 if (i == ir->get_num_state_slots()) {
1209 /* We'll set the index later. */
1210 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1211 this->variables.push_tail(storage);
1212
1213 dst = undef_dst;
1214 } else {
1215 /* The variable_storage constructor allocates slots based on the size
1216 * of the type. However, this had better match the number of state
1217 * elements that we're going to copy into the new temporary.
1218 */
1219 assert((int) ir->get_num_state_slots() == type_size(ir->type));
1220
1221 dst = st_dst_reg(get_temp(ir->type));
1222
1223 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1224
1225 this->variables.push_tail(storage);
1226 }
1227
1228
1229 for (unsigned int i = 0; i < ir->get_num_state_slots(); i++) {
1230 int index = _mesa_add_state_reference(this->prog->Parameters,
1231 (gl_state_index *)slots[i].tokens);
1232
1233 if (storage->file == PROGRAM_STATE_VAR) {
1234 if (storage->index == -1) {
1235 storage->index = index;
1236 } else {
1237 assert(index == storage->index + (int)i);
1238 }
1239 } else {
1240 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1241 * the data being moved since MOV does not care about the type of
1242 * data it is moving, and we don't want to declare registers with
1243 * array or struct types.
1244 */
1245 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1246 src.swizzle = slots[i].swizzle;
1247 emit(ir, TGSI_OPCODE_MOV, dst, src);
1248 /* even a float takes up a whole vec4 reg in a struct/array. */
1249 dst.index++;
1250 }
1251 }
1252
1253 if (storage->file == PROGRAM_TEMPORARY &&
1254 dst.index != storage->index + (int) ir->get_num_state_slots()) {
1255 fail_link(this->shader_program,
1256 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1257 ir->name, dst.index - storage->index,
1258 type_size(ir->type));
1259 }
1260 }
1261 }
1262
1263 void
1264 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1265 {
1266 emit(NULL, TGSI_OPCODE_BGNLOOP);
1267
1268 visit_exec_list(&ir->body_instructions, this);
1269
1270 emit(NULL, TGSI_OPCODE_ENDLOOP);
1271 }
1272
1273 void
1274 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1275 {
1276 switch (ir->mode) {
1277 case ir_loop_jump::jump_break:
1278 emit(NULL, TGSI_OPCODE_BRK);
1279 break;
1280 case ir_loop_jump::jump_continue:
1281 emit(NULL, TGSI_OPCODE_CONT);
1282 break;
1283 }
1284 }
1285
1286
1287 void
1288 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1289 {
1290 assert(0);
1291 (void)ir;
1292 }
1293
1294 void
1295 glsl_to_tgsi_visitor::visit(ir_function *ir)
1296 {
1297 /* Ignore function bodies other than main() -- we shouldn't see calls to
1298 * them since they should all be inlined before we get to glsl_to_tgsi.
1299 */
1300 if (strcmp(ir->name, "main") == 0) {
1301 const ir_function_signature *sig;
1302 exec_list empty;
1303
1304 sig = ir->matching_signature(NULL, &empty, false);
1305
1306 assert(sig);
1307
1308 foreach_in_list(ir_instruction, ir, &sig->body) {
1309 ir->accept(this);
1310 }
1311 }
1312 }
1313
1314 bool
1315 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1316 {
1317 int nonmul_operand = 1 - mul_operand;
1318 st_src_reg a, b, c;
1319 st_dst_reg result_dst;
1320
1321 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1322 if (!expr || expr->operation != ir_binop_mul)
1323 return false;
1324
1325 expr->operands[0]->accept(this);
1326 a = this->result;
1327 expr->operands[1]->accept(this);
1328 b = this->result;
1329 ir->operands[nonmul_operand]->accept(this);
1330 c = this->result;
1331
1332 this->result = get_temp(ir->type);
1333 result_dst = st_dst_reg(this->result);
1334 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1335 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1336
1337 return true;
1338 }
1339
1340 /**
1341 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1342 *
1343 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1344 * implemented using multiplication, and logical-or is implemented using
1345 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1346 * As result, the logical expression (a & !b) can be rewritten as:
1347 *
1348 * - a * !b
1349 * - a * (1 - b)
1350 * - (a * 1) - (a * b)
1351 * - a + -(a * b)
1352 * - a + (a * -b)
1353 *
1354 * This final expression can be implemented as a single MAD(a, -b, a)
1355 * instruction.
1356 */
1357 bool
1358 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1359 {
1360 const int other_operand = 1 - try_operand;
1361 st_src_reg a, b;
1362
1363 ir_expression *expr = ir->operands[try_operand]->as_expression();
1364 if (!expr || expr->operation != ir_unop_logic_not)
1365 return false;
1366
1367 ir->operands[other_operand]->accept(this);
1368 a = this->result;
1369 expr->operands[0]->accept(this);
1370 b = this->result;
1371
1372 b.negate = ~b.negate;
1373
1374 this->result = get_temp(ir->type);
1375 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1376
1377 return true;
1378 }
1379
1380 void
1381 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1382 st_src_reg *reg, int *num_reladdr)
1383 {
1384 if (!reg->reladdr && !reg->reladdr2)
1385 return;
1386
1387 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1388 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1389
1390 if (*num_reladdr != 1) {
1391 st_src_reg temp = get_temp(glsl_type::vec4_type);
1392
1393 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1394 *reg = temp;
1395 }
1396
1397 (*num_reladdr)--;
1398 }
1399
1400 void
1401 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1402 {
1403 unsigned int operand;
1404 st_src_reg op[ARRAY_SIZE(ir->operands)];
1405 st_src_reg result_src;
1406 st_dst_reg result_dst;
1407
1408 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1409 */
1410 if (ir->operation == ir_binop_add) {
1411 if (try_emit_mad(ir, 1))
1412 return;
1413 if (try_emit_mad(ir, 0))
1414 return;
1415 }
1416
1417 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1418 */
1419 if (!native_integers && ir->operation == ir_binop_logic_and) {
1420 if (try_emit_mad_for_and_not(ir, 1))
1421 return;
1422 if (try_emit_mad_for_and_not(ir, 0))
1423 return;
1424 }
1425
1426 if (ir->operation == ir_quadop_vector)
1427 assert(!"ir_quadop_vector should have been lowered");
1428
1429 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1430 this->result.file = PROGRAM_UNDEFINED;
1431 ir->operands[operand]->accept(this);
1432 if (this->result.file == PROGRAM_UNDEFINED) {
1433 printf("Failed to get tree for expression operand:\n");
1434 ir->operands[operand]->print();
1435 printf("\n");
1436 exit(1);
1437 }
1438 op[operand] = this->result;
1439
1440 /* Matrix expression operands should have been broken down to vector
1441 * operations already.
1442 */
1443 assert(!ir->operands[operand]->type->is_matrix());
1444 }
1445
1446 int vector_elements = ir->operands[0]->type->vector_elements;
1447 if (ir->operands[1]) {
1448 vector_elements = MAX2(vector_elements,
1449 ir->operands[1]->type->vector_elements);
1450 }
1451
1452 this->result.file = PROGRAM_UNDEFINED;
1453
1454 /* Storage for our result. Ideally for an assignment we'd be using
1455 * the actual storage for the result here, instead.
1456 */
1457 result_src = get_temp(ir->type);
1458 /* convenience for the emit functions below. */
1459 result_dst = st_dst_reg(result_src);
1460 /* Limit writes to the channels that will be used by result_src later.
1461 * This does limit this temp's use as a temporary for multi-instruction
1462 * sequences.
1463 */
1464 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1465
1466 switch (ir->operation) {
1467 case ir_unop_logic_not:
1468 if (result_dst.type != GLSL_TYPE_FLOAT)
1469 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1470 else {
1471 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1472 * older GPUs implement SEQ using multiple instructions (i915 uses two
1473 * SGE instructions and a MUL instruction). Since our logic values are
1474 * 0.0 and 1.0, 1-x also implements !x.
1475 */
1476 op[0].negate = ~op[0].negate;
1477 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1478 }
1479 break;
1480 case ir_unop_neg:
1481 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1482 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1483 else if (result_dst.type == GLSL_TYPE_DOUBLE)
1484 emit(ir, TGSI_OPCODE_DNEG, result_dst, op[0]);
1485 else {
1486 op[0].negate = ~op[0].negate;
1487 result_src = op[0];
1488 }
1489 break;
1490 case ir_unop_abs:
1491 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1492 break;
1493 case ir_unop_sign:
1494 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1495 break;
1496 case ir_unop_rcp:
1497 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1498 break;
1499
1500 case ir_unop_exp2:
1501 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1502 break;
1503 case ir_unop_exp:
1504 case ir_unop_log:
1505 assert(!"not reached: should be handled by ir_explog_to_explog2");
1506 break;
1507 case ir_unop_log2:
1508 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1509 break;
1510 case ir_unop_sin:
1511 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1512 break;
1513 case ir_unop_cos:
1514 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1515 break;
1516 case ir_unop_saturate: {
1517 glsl_to_tgsi_instruction *inst;
1518 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
1519 inst->saturate = true;
1520 break;
1521 }
1522
1523 case ir_unop_dFdx:
1524 case ir_unop_dFdx_coarse:
1525 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1526 break;
1527 case ir_unop_dFdx_fine:
1528 emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]);
1529 break;
1530 case ir_unop_dFdy:
1531 case ir_unop_dFdy_coarse:
1532 case ir_unop_dFdy_fine:
1533 {
1534 /* The X component contains 1 or -1 depending on whether the framebuffer
1535 * is a FBO or the window system buffer, respectively.
1536 * It is then multiplied with the source operand of DDY.
1537 */
1538 static const gl_state_index transform_y_state[STATE_LENGTH]
1539 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1540
1541 unsigned transform_y_index =
1542 _mesa_add_state_reference(this->prog->Parameters,
1543 transform_y_state);
1544
1545 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1546 transform_y_index,
1547 glsl_type::vec4_type);
1548 transform_y.swizzle = SWIZZLE_XXXX;
1549
1550 st_src_reg temp = get_temp(glsl_type::vec4_type);
1551
1552 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1553 emit(ir, ir->operation == ir_unop_dFdy_fine ?
1554 TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp);
1555 break;
1556 }
1557
1558 case ir_unop_frexp_sig:
1559 emit(ir, TGSI_OPCODE_DFRACEXP, result_dst, undef_dst, op[0]);
1560 break;
1561
1562 case ir_unop_frexp_exp:
1563 emit(ir, TGSI_OPCODE_DFRACEXP, undef_dst, result_dst, op[0]);
1564 break;
1565
1566 case ir_unop_noise: {
1567 /* At some point, a motivated person could add a better
1568 * implementation of noise. Currently not even the nvidia
1569 * binary drivers do anything more than this. In any case, the
1570 * place to do this is in the GL state tracker, not the poor
1571 * driver.
1572 */
1573 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1574 break;
1575 }
1576
1577 case ir_binop_add:
1578 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1579 break;
1580 case ir_binop_sub:
1581 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1582 break;
1583
1584 case ir_binop_mul:
1585 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1586 break;
1587 case ir_binop_div:
1588 if (result_dst.type == GLSL_TYPE_FLOAT || result_dst.type == GLSL_TYPE_DOUBLE)
1589 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1590 else
1591 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1592 break;
1593 case ir_binop_mod:
1594 if (result_dst.type == GLSL_TYPE_FLOAT)
1595 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1596 else
1597 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1598 break;
1599
1600 case ir_binop_less:
1601 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1602 break;
1603 case ir_binop_greater:
1604 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1605 break;
1606 case ir_binop_lequal:
1607 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1608 break;
1609 case ir_binop_gequal:
1610 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1611 break;
1612 case ir_binop_equal:
1613 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1614 break;
1615 case ir_binop_nequal:
1616 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1617 break;
1618 case ir_binop_all_equal:
1619 /* "==" operator producing a scalar boolean. */
1620 if (ir->operands[0]->type->is_vector() ||
1621 ir->operands[1]->type->is_vector()) {
1622 st_src_reg temp = get_temp(native_integers ?
1623 glsl_type::uvec4_type :
1624 glsl_type::vec4_type);
1625
1626 if (native_integers) {
1627 st_dst_reg temp_dst = st_dst_reg(temp);
1628 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1629
1630 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1631
1632 /* Emit 1-3 AND operations to combine the SEQ results. */
1633 switch (ir->operands[0]->type->vector_elements) {
1634 case 2:
1635 break;
1636 case 3:
1637 temp_dst.writemask = WRITEMASK_Y;
1638 temp1.swizzle = SWIZZLE_YYYY;
1639 temp2.swizzle = SWIZZLE_ZZZZ;
1640 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1641 break;
1642 case 4:
1643 temp_dst.writemask = WRITEMASK_X;
1644 temp1.swizzle = SWIZZLE_XXXX;
1645 temp2.swizzle = SWIZZLE_YYYY;
1646 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1647 temp_dst.writemask = WRITEMASK_Y;
1648 temp1.swizzle = SWIZZLE_ZZZZ;
1649 temp2.swizzle = SWIZZLE_WWWW;
1650 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1651 }
1652
1653 temp1.swizzle = SWIZZLE_XXXX;
1654 temp2.swizzle = SWIZZLE_YYYY;
1655 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1656 } else {
1657 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1658
1659 /* After the dot-product, the value will be an integer on the
1660 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1661 */
1662 emit_dp(ir, result_dst, temp, temp, vector_elements);
1663
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1666 * This is achieved using SGE.
1667 */
1668 st_src_reg sge_src = result_src;
1669 sge_src.negate = ~sge_src.negate;
1670 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1671 }
1672 } else {
1673 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1674 }
1675 break;
1676 case ir_binop_any_nequal:
1677 /* "!=" operator producing a scalar boolean. */
1678 if (ir->operands[0]->type->is_vector() ||
1679 ir->operands[1]->type->is_vector()) {
1680 st_src_reg temp = get_temp(native_integers ?
1681 glsl_type::uvec4_type :
1682 glsl_type::vec4_type);
1683 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1684
1685 if (native_integers) {
1686 st_dst_reg temp_dst = st_dst_reg(temp);
1687 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1688
1689 /* Emit 1-3 OR operations to combine the SNE results. */
1690 switch (ir->operands[0]->type->vector_elements) {
1691 case 2:
1692 break;
1693 case 3:
1694 temp_dst.writemask = WRITEMASK_Y;
1695 temp1.swizzle = SWIZZLE_YYYY;
1696 temp2.swizzle = SWIZZLE_ZZZZ;
1697 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1698 break;
1699 case 4:
1700 temp_dst.writemask = WRITEMASK_X;
1701 temp1.swizzle = SWIZZLE_XXXX;
1702 temp2.swizzle = SWIZZLE_YYYY;
1703 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1704 temp_dst.writemask = WRITEMASK_Y;
1705 temp1.swizzle = SWIZZLE_ZZZZ;
1706 temp2.swizzle = SWIZZLE_WWWW;
1707 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1708 }
1709
1710 temp1.swizzle = SWIZZLE_XXXX;
1711 temp2.swizzle = SWIZZLE_YYYY;
1712 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1713 } else {
1714 /* After the dot-product, the value will be an integer on the
1715 * range [0,4]. Zero stays zero, and positive values become 1.0.
1716 */
1717 glsl_to_tgsi_instruction *const dp =
1718 emit_dp(ir, result_dst, temp, temp, vector_elements);
1719 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1720 /* The clamping to [0,1] can be done for free in the fragment
1721 * shader with a saturate.
1722 */
1723 dp->saturate = true;
1724 } else {
1725 /* Negating the result of the dot-product gives values on the range
1726 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1727 * achieved using SLT.
1728 */
1729 st_src_reg slt_src = result_src;
1730 slt_src.negate = ~slt_src.negate;
1731 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1732 }
1733 }
1734 } else {
1735 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1736 }
1737 break;
1738
1739 case ir_unop_any: {
1740 assert(ir->operands[0]->type->is_vector());
1741
1742 if (native_integers) {
1743 int dst_swizzle = 0, op0_swizzle, i;
1744 st_src_reg accum = op[0];
1745
1746 op0_swizzle = op[0].swizzle;
1747 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1748 GET_SWZ(op0_swizzle, 0),
1749 GET_SWZ(op0_swizzle, 0),
1750 GET_SWZ(op0_swizzle, 0));
1751 for (i = 0; i < 4; i++) {
1752 if (result_dst.writemask & (1 << i)) {
1753 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1754 break;
1755 }
1756 }
1757 assert(i != 4);
1758 assert(ir->operands[0]->type->is_boolean());
1759
1760 /* OR all the components together, since they should be either 0 or ~0
1761 */
1762 switch (ir->operands[0]->type->vector_elements) {
1763 case 4:
1764 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1765 GET_SWZ(op0_swizzle, 3),
1766 GET_SWZ(op0_swizzle, 3),
1767 GET_SWZ(op0_swizzle, 3));
1768 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1769 accum = st_src_reg(result_dst);
1770 accum.swizzle = dst_swizzle;
1771 /* fallthrough */
1772 case 3:
1773 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1774 GET_SWZ(op0_swizzle, 2),
1775 GET_SWZ(op0_swizzle, 2),
1776 GET_SWZ(op0_swizzle, 2));
1777 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1778 accum = st_src_reg(result_dst);
1779 accum.swizzle = dst_swizzle;
1780 /* fallthrough */
1781 case 2:
1782 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1783 GET_SWZ(op0_swizzle, 1),
1784 GET_SWZ(op0_swizzle, 1),
1785 GET_SWZ(op0_swizzle, 1));
1786 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1787 break;
1788 default:
1789 assert(!"Unexpected vector size");
1790 break;
1791 }
1792 } else {
1793 /* After the dot-product, the value will be an integer on the
1794 * range [0,4]. Zero stays zero, and positive values become 1.0.
1795 */
1796 glsl_to_tgsi_instruction *const dp =
1797 emit_dp(ir, result_dst, op[0], op[0],
1798 ir->operands[0]->type->vector_elements);
1799 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1800 result_dst.type == GLSL_TYPE_FLOAT) {
1801 /* The clamping to [0,1] can be done for free in the fragment
1802 * shader with a saturate.
1803 */
1804 dp->saturate = true;
1805 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1806 /* Negating the result of the dot-product gives values on the range
1807 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1808 * is achieved using SLT.
1809 */
1810 st_src_reg slt_src = result_src;
1811 slt_src.negate = ~slt_src.negate;
1812 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1813 }
1814 else {
1815 /* Use SNE 0 if integers are being used as boolean values. */
1816 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1817 }
1818 }
1819 break;
1820 }
1821
1822 case ir_binop_logic_xor:
1823 if (native_integers)
1824 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1825 else
1826 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1827 break;
1828
1829 case ir_binop_logic_or: {
1830 if (native_integers) {
1831 /* If integers are used as booleans, we can use an actual "or"
1832 * instruction.
1833 */
1834 assert(native_integers);
1835 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1836 } else {
1837 /* After the addition, the value will be an integer on the
1838 * range [0,2]. Zero stays zero, and positive values become 1.0.
1839 */
1840 glsl_to_tgsi_instruction *add =
1841 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1842 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1843 /* The clamping to [0,1] can be done for free in the fragment
1844 * shader with a saturate if floats are being used as boolean values.
1845 */
1846 add->saturate = true;
1847 } else {
1848 /* Negating the result of the addition gives values on the range
1849 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1850 * is achieved using SLT.
1851 */
1852 st_src_reg slt_src = result_src;
1853 slt_src.negate = ~slt_src.negate;
1854 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1855 }
1856 }
1857 break;
1858 }
1859
1860 case ir_binop_logic_and:
1861 /* If native integers are disabled, the bool args are stored as float 0.0
1862 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1863 * actual AND opcode.
1864 */
1865 if (native_integers)
1866 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1867 else
1868 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1869 break;
1870
1871 case ir_binop_dot:
1872 assert(ir->operands[0]->type->is_vector());
1873 assert(ir->operands[0]->type == ir->operands[1]->type);
1874 emit_dp(ir, result_dst, op[0], op[1],
1875 ir->operands[0]->type->vector_elements);
1876 break;
1877
1878 case ir_unop_sqrt:
1879 if (have_sqrt) {
1880 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1881 } else {
1882 /* sqrt(x) = x * rsq(x). */
1883 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1884 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1885 /* For incoming channels <= 0, set the result to 0. */
1886 op[0].negate = ~op[0].negate;
1887 emit(ir, TGSI_OPCODE_CMP, result_dst,
1888 op[0], result_src, st_src_reg_for_float(0.0));
1889 }
1890 break;
1891 case ir_unop_rsq:
1892 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1893 break;
1894 case ir_unop_i2f:
1895 if (native_integers) {
1896 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1897 break;
1898 }
1899 /* fallthrough to next case otherwise */
1900 case ir_unop_b2f:
1901 if (native_integers) {
1902 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1903 break;
1904 }
1905 /* fallthrough to next case otherwise */
1906 case ir_unop_i2u:
1907 case ir_unop_u2i:
1908 /* Converting between signed and unsigned integers is a no-op. */
1909 result_src = op[0];
1910 break;
1911 case ir_unop_b2i:
1912 if (native_integers) {
1913 /* Booleans are stored as integers using ~0 for true and 0 for false.
1914 * GLSL requires that int(bool) return 1 for true and 0 for false.
1915 * This conversion is done with AND, but it could be done with NEG.
1916 */
1917 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1918 } else {
1919 /* Booleans and integers are both stored as floats when native
1920 * integers are disabled.
1921 */
1922 result_src = op[0];
1923 }
1924 break;
1925 case ir_unop_f2i:
1926 if (native_integers)
1927 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1928 else
1929 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1930 break;
1931 case ir_unop_f2u:
1932 if (native_integers)
1933 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1934 else
1935 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1936 break;
1937 case ir_unop_bitcast_f2i:
1938 result_src = op[0];
1939 result_src.type = GLSL_TYPE_INT;
1940 break;
1941 case ir_unop_bitcast_f2u:
1942 result_src = op[0];
1943 result_src.type = GLSL_TYPE_UINT;
1944 break;
1945 case ir_unop_bitcast_i2f:
1946 case ir_unop_bitcast_u2f:
1947 result_src = op[0];
1948 result_src.type = GLSL_TYPE_FLOAT;
1949 break;
1950 case ir_unop_f2b:
1951 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1952 break;
1953 case ir_unop_d2b:
1954 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_double(0.0));
1955 break;
1956 case ir_unop_i2b:
1957 if (native_integers)
1958 emit(ir, TGSI_OPCODE_USNE, result_dst, op[0], st_src_reg_for_int(0));
1959 else
1960 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1961 break;
1962 case ir_unop_trunc:
1963 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1964 break;
1965 case ir_unop_ceil:
1966 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1967 break;
1968 case ir_unop_floor:
1969 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1970 break;
1971 case ir_unop_round_even:
1972 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1973 break;
1974 case ir_unop_fract:
1975 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1976 break;
1977
1978 case ir_binop_min:
1979 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1980 break;
1981 case ir_binop_max:
1982 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1983 break;
1984 case ir_binop_pow:
1985 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1986 break;
1987
1988 case ir_unop_bit_not:
1989 if (native_integers) {
1990 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1991 break;
1992 }
1993 case ir_unop_u2f:
1994 if (native_integers) {
1995 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1996 break;
1997 }
1998 case ir_binop_lshift:
1999 if (native_integers) {
2000 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
2001 break;
2002 }
2003 case ir_binop_rshift:
2004 if (native_integers) {
2005 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
2006 break;
2007 }
2008 case ir_binop_bit_and:
2009 if (native_integers) {
2010 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
2011 break;
2012 }
2013 case ir_binop_bit_xor:
2014 if (native_integers) {
2015 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
2016 break;
2017 }
2018 case ir_binop_bit_or:
2019 if (native_integers) {
2020 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
2021 break;
2022 }
2023
2024 assert(!"GLSL 1.30 features unsupported");
2025 break;
2026
2027 case ir_binop_ubo_load: {
2028 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
2029 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
2030 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
2031 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
2032 st_src_reg index_reg = get_temp(glsl_type::uint_type);
2033 st_src_reg cbuf;
2034
2035 cbuf.type = ir->type->base_type;
2036 cbuf.file = PROGRAM_CONSTANT;
2037 cbuf.index = 0;
2038 cbuf.reladdr = NULL;
2039 cbuf.negate = 0;
2040
2041 assert(ir->type->is_vector() || ir->type->is_scalar());
2042
2043 if (const_offset_ir) {
2044 /* Constant index into constant buffer */
2045 cbuf.reladdr = NULL;
2046 cbuf.index = const_offset / 16;
2047 }
2048 else {
2049 /* Relative/variable index into constant buffer */
2050 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
2051 st_src_reg_for_int(4));
2052 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
2053 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
2054 }
2055
2056 if (const_uniform_block) {
2057 /* Constant constant buffer */
2058 cbuf.reladdr2 = NULL;
2059 cbuf.index2D = const_block;
2060 cbuf.has_index2 = true;
2061 }
2062 else {
2063 /* Relative/variable constant buffer */
2064 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
2065 cbuf.index2D = 1;
2066 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
2067 cbuf.has_index2 = true;
2068 }
2069
2070 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
2071 if (cbuf.type == GLSL_TYPE_DOUBLE)
2072 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 8,
2073 const_offset % 16 / 8,
2074 const_offset % 16 / 8,
2075 const_offset % 16 / 8);
2076 else
2077 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
2078 const_offset % 16 / 4,
2079 const_offset % 16 / 4,
2080 const_offset % 16 / 4);
2081
2082 if (ir->type->base_type == GLSL_TYPE_BOOL) {
2083 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
2084 } else {
2085 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
2086 }
2087 break;
2088 }
2089 case ir_triop_lrp:
2090 /* note: we have to reorder the three args here */
2091 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
2092 break;
2093 case ir_triop_csel:
2094 if (this->ctx->Const.NativeIntegers)
2095 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
2096 else {
2097 op[0].negate = ~op[0].negate;
2098 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
2099 }
2100 break;
2101 case ir_triop_bitfield_extract:
2102 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
2103 break;
2104 case ir_quadop_bitfield_insert:
2105 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
2106 break;
2107 case ir_unop_bitfield_reverse:
2108 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
2109 break;
2110 case ir_unop_bit_count:
2111 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
2112 break;
2113 case ir_unop_find_msb:
2114 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
2115 break;
2116 case ir_unop_find_lsb:
2117 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
2118 break;
2119 case ir_binop_imul_high:
2120 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
2121 break;
2122 case ir_triop_fma:
2123 /* In theory, MAD is incorrect here. */
2124 if (have_fma)
2125 emit(ir, TGSI_OPCODE_FMA, result_dst, op[0], op[1], op[2]);
2126 else
2127 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
2128 break;
2129 case ir_unop_interpolate_at_centroid:
2130 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2131 break;
2132 case ir_binop_interpolate_at_offset:
2133 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2134 break;
2135 case ir_binop_interpolate_at_sample:
2136 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2137 break;
2138
2139 case ir_unop_d2f:
2140 emit(ir, TGSI_OPCODE_D2F, result_dst, op[0]);
2141 break;
2142 case ir_unop_f2d:
2143 emit(ir, TGSI_OPCODE_F2D, result_dst, op[0]);
2144 break;
2145 case ir_unop_d2i:
2146 emit(ir, TGSI_OPCODE_D2I, result_dst, op[0]);
2147 break;
2148 case ir_unop_i2d:
2149 emit(ir, TGSI_OPCODE_I2D, result_dst, op[0]);
2150 break;
2151 case ir_unop_d2u:
2152 emit(ir, TGSI_OPCODE_D2U, result_dst, op[0]);
2153 break;
2154 case ir_unop_u2d:
2155 emit(ir, TGSI_OPCODE_U2D, result_dst, op[0]);
2156 break;
2157 case ir_unop_unpack_double_2x32:
2158 case ir_unop_pack_double_2x32:
2159 emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
2160 break;
2161
2162 case ir_binop_ldexp:
2163 if (ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE) {
2164 emit(ir, TGSI_OPCODE_DLDEXP, result_dst, op[0], op[1]);
2165 } else {
2166 assert(!"Invalid ldexp for non-double opcode in glsl_to_tgsi_visitor::visit()");
2167 }
2168 break;
2169
2170 case ir_unop_pack_snorm_2x16:
2171 case ir_unop_pack_unorm_2x16:
2172 case ir_unop_pack_half_2x16:
2173 case ir_unop_pack_snorm_4x8:
2174 case ir_unop_pack_unorm_4x8:
2175
2176 case ir_unop_unpack_snorm_2x16:
2177 case ir_unop_unpack_unorm_2x16:
2178 case ir_unop_unpack_half_2x16:
2179 case ir_unop_unpack_half_2x16_split_x:
2180 case ir_unop_unpack_half_2x16_split_y:
2181 case ir_unop_unpack_snorm_4x8:
2182 case ir_unop_unpack_unorm_4x8:
2183
2184 case ir_binop_pack_half_2x16_split:
2185 case ir_binop_bfm:
2186 case ir_triop_bfi:
2187 case ir_quadop_vector:
2188 case ir_binop_vector_extract:
2189 case ir_triop_vector_insert:
2190 case ir_binop_carry:
2191 case ir_binop_borrow:
2192 /* This operation is not supported, or should have already been handled.
2193 */
2194 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2195 break;
2196 }
2197
2198 this->result = result_src;
2199 }
2200
2201
2202 void
2203 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2204 {
2205 st_src_reg src;
2206 int i;
2207 int swizzle[4];
2208
2209 /* Note that this is only swizzles in expressions, not those on the left
2210 * hand side of an assignment, which do write masking. See ir_assignment
2211 * for that.
2212 */
2213
2214 ir->val->accept(this);
2215 src = this->result;
2216 assert(src.file != PROGRAM_UNDEFINED);
2217 assert(ir->type->vector_elements > 0);
2218
2219 for (i = 0; i < 4; i++) {
2220 if (i < ir->type->vector_elements) {
2221 switch (i) {
2222 case 0:
2223 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2224 break;
2225 case 1:
2226 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2227 break;
2228 case 2:
2229 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2230 break;
2231 case 3:
2232 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2233 break;
2234 }
2235 } else {
2236 /* If the type is smaller than a vec4, replicate the last
2237 * channel out.
2238 */
2239 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2240 }
2241 }
2242
2243 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2244
2245 this->result = src;
2246 }
2247
2248 void
2249 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2250 {
2251 variable_storage *entry = find_variable_storage(ir->var);
2252 ir_variable *var = ir->var;
2253
2254 if (!entry) {
2255 switch (var->data.mode) {
2256 case ir_var_uniform:
2257 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2258 var->data.location);
2259 this->variables.push_tail(entry);
2260 break;
2261 case ir_var_shader_in:
2262 /* The linker assigns locations for varyings and attributes,
2263 * including deprecated builtins (like gl_Color), user-assign
2264 * generic attributes (glBindVertexLocation), and
2265 * user-defined varyings.
2266 */
2267 assert(var->data.location != -1);
2268 entry = new(mem_ctx) variable_storage(var,
2269 PROGRAM_INPUT,
2270 var->data.location);
2271 break;
2272 case ir_var_shader_out:
2273 assert(var->data.location != -1);
2274 entry = new(mem_ctx) variable_storage(var,
2275 PROGRAM_OUTPUT,
2276 var->data.location
2277 + var->data.index);
2278 break;
2279 case ir_var_system_value:
2280 entry = new(mem_ctx) variable_storage(var,
2281 PROGRAM_SYSTEM_VALUE,
2282 var->data.location);
2283 break;
2284 case ir_var_auto:
2285 case ir_var_temporary:
2286 st_src_reg src = get_temp(var->type);
2287
2288 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2289 this->variables.push_tail(entry);
2290
2291 break;
2292 }
2293
2294 if (!entry) {
2295 printf("Failed to make storage for %s\n", var->name);
2296 exit(1);
2297 }
2298 }
2299
2300 this->result = st_src_reg(entry->file, entry->index, var->type);
2301 if (!native_integers)
2302 this->result.type = GLSL_TYPE_FLOAT;
2303 }
2304
2305 void
2306 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2307 {
2308 ir_constant *index;
2309 st_src_reg src;
2310 int element_size = type_size(ir->type);
2311 bool is_2D_input;
2312
2313 index = ir->array_index->constant_expression_value();
2314
2315 ir->array->accept(this);
2316 src = this->result;
2317
2318 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2319 src.file == PROGRAM_INPUT &&
2320 ir->array->ir_type != ir_type_dereference_array;
2321
2322 if (is_2D_input)
2323 element_size = 1;
2324
2325 if (index) {
2326 if (is_2D_input) {
2327 src.index2D = index->value.i[0];
2328 src.has_index2 = true;
2329 } else
2330 src.index += index->value.i[0] * element_size;
2331 } else {
2332 /* Variable index array dereference. It eats the "vec4" of the
2333 * base of the array and an index that offsets the TGSI register
2334 * index.
2335 */
2336 ir->array_index->accept(this);
2337
2338 st_src_reg index_reg;
2339
2340 if (element_size == 1) {
2341 index_reg = this->result;
2342 } else {
2343 index_reg = get_temp(native_integers ?
2344 glsl_type::int_type : glsl_type::float_type);
2345
2346 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2347 this->result, st_src_reg_for_type(index_reg.type, element_size));
2348 }
2349
2350 /* If there was already a relative address register involved, add the
2351 * new and the old together to get the new offset.
2352 */
2353 if (!is_2D_input && src.reladdr != NULL) {
2354 st_src_reg accum_reg = get_temp(native_integers ?
2355 glsl_type::int_type : glsl_type::float_type);
2356
2357 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2358 index_reg, *src.reladdr);
2359
2360 index_reg = accum_reg;
2361 }
2362
2363 if (is_2D_input) {
2364 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2365 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2366 src.index2D = 0;
2367 src.has_index2 = true;
2368 } else {
2369 src.reladdr = ralloc(mem_ctx, st_src_reg);
2370 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2371 }
2372 }
2373
2374 /* If the type is smaller than a vec4, replicate the last channel out. */
2375 if (ir->type->is_scalar() || ir->type->is_vector())
2376 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2377 else
2378 src.swizzle = SWIZZLE_NOOP;
2379
2380 /* Change the register type to the element type of the array. */
2381 src.type = ir->type->base_type;
2382
2383 this->result = src;
2384 }
2385
2386 void
2387 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2388 {
2389 unsigned int i;
2390 const glsl_type *struct_type = ir->record->type;
2391 int offset = 0;
2392
2393 ir->record->accept(this);
2394
2395 for (i = 0; i < struct_type->length; i++) {
2396 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2397 break;
2398 offset += type_size(struct_type->fields.structure[i].type);
2399 }
2400
2401 /* If the type is smaller than a vec4, replicate the last channel out. */
2402 if (ir->type->is_scalar() || ir->type->is_vector())
2403 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2404 else
2405 this->result.swizzle = SWIZZLE_NOOP;
2406
2407 this->result.index += offset;
2408 this->result.type = ir->type->base_type;
2409 }
2410
2411 /**
2412 * We want to be careful in assignment setup to hit the actual storage
2413 * instead of potentially using a temporary like we might with the
2414 * ir_dereference handler.
2415 */
2416 static st_dst_reg
2417 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2418 {
2419 /* The LHS must be a dereference. If the LHS is a variable indexed array
2420 * access of a vector, it must be separated into a series conditional moves
2421 * before reaching this point (see ir_vec_index_to_cond_assign).
2422 */
2423 assert(ir->as_dereference());
2424 ir_dereference_array *deref_array = ir->as_dereference_array();
2425 if (deref_array) {
2426 assert(!deref_array->array->type->is_vector());
2427 }
2428
2429 /* Use the rvalue deref handler for the most part. We'll ignore
2430 * swizzles in it and write swizzles using writemask, though.
2431 */
2432 ir->accept(v);
2433 return st_dst_reg(v->result);
2434 }
2435
2436 /**
2437 * Process the condition of a conditional assignment
2438 *
2439 * Examines the condition of a conditional assignment to generate the optimal
2440 * first operand of a \c CMP instruction. If the condition is a relational
2441 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2442 * used as the source for the \c CMP instruction. Otherwise the comparison
2443 * is processed to a boolean result, and the boolean result is used as the
2444 * operand to the CMP instruction.
2445 */
2446 bool
2447 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2448 {
2449 ir_rvalue *src_ir = ir;
2450 bool negate = true;
2451 bool switch_order = false;
2452
2453 ir_expression *const expr = ir->as_expression();
2454
2455 if (native_integers) {
2456 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2457 enum glsl_base_type type = expr->operands[0]->type->base_type;
2458 if (type == GLSL_TYPE_INT || type == GLSL_TYPE_UINT ||
2459 type == GLSL_TYPE_BOOL) {
2460 if (expr->operation == ir_binop_equal) {
2461 if (expr->operands[0]->is_zero()) {
2462 src_ir = expr->operands[1];
2463 switch_order = true;
2464 }
2465 else if (expr->operands[1]->is_zero()) {
2466 src_ir = expr->operands[0];
2467 switch_order = true;
2468 }
2469 }
2470 else if (expr->operation == ir_binop_nequal) {
2471 if (expr->operands[0]->is_zero()) {
2472 src_ir = expr->operands[1];
2473 }
2474 else if (expr->operands[1]->is_zero()) {
2475 src_ir = expr->operands[0];
2476 }
2477 }
2478 }
2479 }
2480
2481 src_ir->accept(this);
2482 return switch_order;
2483 }
2484
2485 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2486 bool zero_on_left = false;
2487
2488 if (expr->operands[0]->is_zero()) {
2489 src_ir = expr->operands[1];
2490 zero_on_left = true;
2491 } else if (expr->operands[1]->is_zero()) {
2492 src_ir = expr->operands[0];
2493 zero_on_left = false;
2494 }
2495
2496 /* a is - 0 + - 0 +
2497 * (a < 0) T F F ( a < 0) T F F
2498 * (0 < a) F F T (-a < 0) F F T
2499 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2500 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2501 * (a > 0) F F T (-a < 0) F F T
2502 * (0 > a) T F F ( a < 0) T F F
2503 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2504 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2505 *
2506 * Note that exchanging the order of 0 and 'a' in the comparison simply
2507 * means that the value of 'a' should be negated.
2508 */
2509 if (src_ir != ir) {
2510 switch (expr->operation) {
2511 case ir_binop_less:
2512 switch_order = false;
2513 negate = zero_on_left;
2514 break;
2515
2516 case ir_binop_greater:
2517 switch_order = false;
2518 negate = !zero_on_left;
2519 break;
2520
2521 case ir_binop_lequal:
2522 switch_order = true;
2523 negate = !zero_on_left;
2524 break;
2525
2526 case ir_binop_gequal:
2527 switch_order = true;
2528 negate = zero_on_left;
2529 break;
2530
2531 default:
2532 /* This isn't the right kind of comparison afterall, so make sure
2533 * the whole condition is visited.
2534 */
2535 src_ir = ir;
2536 break;
2537 }
2538 }
2539 }
2540
2541 src_ir->accept(this);
2542
2543 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2544 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2545 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2546 * computing the condition.
2547 */
2548 if (negate)
2549 this->result.negate = ~this->result.negate;
2550
2551 return switch_order;
2552 }
2553
2554 void
2555 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2556 st_dst_reg *l, st_src_reg *r,
2557 st_src_reg *cond, bool cond_swap)
2558 {
2559 if (type->base_type == GLSL_TYPE_STRUCT) {
2560 for (unsigned int i = 0; i < type->length; i++) {
2561 emit_block_mov(ir, type->fields.structure[i].type, l, r,
2562 cond, cond_swap);
2563 }
2564 return;
2565 }
2566
2567 if (type->is_array()) {
2568 for (unsigned int i = 0; i < type->length; i++) {
2569 emit_block_mov(ir, type->fields.array, l, r, cond, cond_swap);
2570 }
2571 return;
2572 }
2573
2574 if (type->is_matrix()) {
2575 const struct glsl_type *vec_type;
2576
2577 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2578 type->vector_elements, 1);
2579
2580 for (int i = 0; i < type->matrix_columns; i++) {
2581 emit_block_mov(ir, vec_type, l, r, cond, cond_swap);
2582 }
2583 return;
2584 }
2585
2586 assert(type->is_scalar() || type->is_vector());
2587
2588 r->type = type->base_type;
2589 if (cond) {
2590 st_src_reg l_src = st_src_reg(*l);
2591 l_src.swizzle = swizzle_for_size(type->vector_elements);
2592
2593 if (native_integers) {
2594 emit(ir, TGSI_OPCODE_UCMP, *l, *cond,
2595 cond_swap ? l_src : *r,
2596 cond_swap ? *r : l_src);
2597 } else {
2598 emit(ir, TGSI_OPCODE_CMP, *l, *cond,
2599 cond_swap ? l_src : *r,
2600 cond_swap ? *r : l_src);
2601 }
2602 } else {
2603 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2604 }
2605 l->index++;
2606 r->index++;
2607 }
2608
2609 void
2610 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2611 {
2612 st_dst_reg l;
2613 st_src_reg r;
2614
2615 ir->rhs->accept(this);
2616 r = this->result;
2617
2618 l = get_assignment_lhs(ir->lhs, this);
2619
2620 /* FINISHME: This should really set to the correct maximal writemask for each
2621 * FINISHME: component written (in the loops below). This case can only
2622 * FINISHME: occur for matrices, arrays, and structures.
2623 */
2624 if (ir->write_mask == 0) {
2625 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2626 l.writemask = WRITEMASK_XYZW;
2627 } else if (ir->lhs->type->is_scalar() &&
2628 !ir->lhs->type->is_double() &&
2629 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2630 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2631 * FINISHME: W component of fragment shader output zero, work correctly.
2632 */
2633 l.writemask = WRITEMASK_XYZW;
2634 } else {
2635 int swizzles[4];
2636 int first_enabled_chan = 0;
2637 int rhs_chan = 0;
2638
2639 l.writemask = ir->write_mask;
2640
2641 for (int i = 0; i < 4; i++) {
2642 if (l.writemask & (1 << i)) {
2643 first_enabled_chan = GET_SWZ(r.swizzle, i);
2644 break;
2645 }
2646 }
2647
2648 /* Swizzle a small RHS vector into the channels being written.
2649 *
2650 * glsl ir treats write_mask as dictating how many channels are
2651 * present on the RHS while TGSI treats write_mask as just
2652 * showing which channels of the vec4 RHS get written.
2653 */
2654 for (int i = 0; i < 4; i++) {
2655 if (l.writemask & (1 << i))
2656 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2657 else
2658 swizzles[i] = first_enabled_chan;
2659 }
2660 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2661 swizzles[2], swizzles[3]);
2662 }
2663
2664 assert(l.file != PROGRAM_UNDEFINED);
2665 assert(r.file != PROGRAM_UNDEFINED);
2666
2667 if (ir->condition) {
2668 const bool switch_order = this->process_move_condition(ir->condition);
2669 st_src_reg condition = this->result;
2670
2671 emit_block_mov(ir, ir->lhs->type, &l, &r, &condition, switch_order);
2672 } else if (ir->rhs->as_expression() &&
2673 this->instructions.get_tail() &&
2674 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2675 type_size(ir->lhs->type) == 1 &&
2676 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst[0].writemask) {
2677 /* To avoid emitting an extra MOV when assigning an expression to a
2678 * variable, emit the last instruction of the expression again, but
2679 * replace the destination register with the target of the assignment.
2680 * Dead code elimination will remove the original instruction.
2681 */
2682 glsl_to_tgsi_instruction *inst, *new_inst;
2683 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2684 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2685 new_inst->saturate = inst->saturate;
2686 inst->dead_mask = inst->dst[0].writemask;
2687 } else {
2688 emit_block_mov(ir, ir->rhs->type, &l, &r, NULL, false);
2689 }
2690 }
2691
2692
2693 void
2694 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2695 {
2696 st_src_reg src;
2697 GLdouble stack_vals[4] = { 0 };
2698 gl_constant_value *values = (gl_constant_value *) stack_vals;
2699 GLenum gl_type = GL_NONE;
2700 unsigned int i;
2701 static int in_array = 0;
2702 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2703
2704 /* Unfortunately, 4 floats is all we can get into
2705 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2706 * aggregate constant and move each constant value into it. If we
2707 * get lucky, copy propagation will eliminate the extra moves.
2708 */
2709 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2710 st_src_reg temp_base = get_temp(ir->type);
2711 st_dst_reg temp = st_dst_reg(temp_base);
2712
2713 foreach_in_list(ir_constant, field_value, &ir->components) {
2714 int size = type_size(field_value->type);
2715
2716 assert(size > 0);
2717
2718 field_value->accept(this);
2719 src = this->result;
2720
2721 for (i = 0; i < (unsigned int)size; i++) {
2722 emit(ir, TGSI_OPCODE_MOV, temp, src);
2723
2724 src.index++;
2725 temp.index++;
2726 }
2727 }
2728 this->result = temp_base;
2729 return;
2730 }
2731
2732 if (ir->type->is_array()) {
2733 st_src_reg temp_base = get_temp(ir->type);
2734 st_dst_reg temp = st_dst_reg(temp_base);
2735 int size = type_size(ir->type->fields.array);
2736
2737 assert(size > 0);
2738 in_array++;
2739
2740 for (i = 0; i < ir->type->length; i++) {
2741 ir->array_elements[i]->accept(this);
2742 src = this->result;
2743 for (int j = 0; j < size; j++) {
2744 emit(ir, TGSI_OPCODE_MOV, temp, src);
2745
2746 src.index++;
2747 temp.index++;
2748 }
2749 }
2750 this->result = temp_base;
2751 in_array--;
2752 return;
2753 }
2754
2755 if (ir->type->is_matrix()) {
2756 st_src_reg mat = get_temp(ir->type);
2757 st_dst_reg mat_column = st_dst_reg(mat);
2758
2759 for (i = 0; i < ir->type->matrix_columns; i++) {
2760 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2761 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2762
2763 src = st_src_reg(file, -1, ir->type->base_type);
2764 src.index = add_constant(file,
2765 values,
2766 ir->type->vector_elements,
2767 GL_FLOAT,
2768 &src.swizzle);
2769 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2770
2771 mat_column.index++;
2772 }
2773
2774 this->result = mat;
2775 return;
2776 }
2777
2778 switch (ir->type->base_type) {
2779 case GLSL_TYPE_FLOAT:
2780 gl_type = GL_FLOAT;
2781 for (i = 0; i < ir->type->vector_elements; i++) {
2782 values[i].f = ir->value.f[i];
2783 }
2784 break;
2785 case GLSL_TYPE_DOUBLE:
2786 gl_type = GL_DOUBLE;
2787 for (i = 0; i < ir->type->vector_elements; i++) {
2788 values[i * 2].i = *(uint32_t *)&ir->value.d[i];
2789 values[i * 2 + 1].i = *(((uint32_t *)&ir->value.d[i]) + 1);
2790 }
2791 break;
2792 case GLSL_TYPE_UINT:
2793 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2794 for (i = 0; i < ir->type->vector_elements; i++) {
2795 if (native_integers)
2796 values[i].u = ir->value.u[i];
2797 else
2798 values[i].f = ir->value.u[i];
2799 }
2800 break;
2801 case GLSL_TYPE_INT:
2802 gl_type = native_integers ? GL_INT : GL_FLOAT;
2803 for (i = 0; i < ir->type->vector_elements; i++) {
2804 if (native_integers)
2805 values[i].i = ir->value.i[i];
2806 else
2807 values[i].f = ir->value.i[i];
2808 }
2809 break;
2810 case GLSL_TYPE_BOOL:
2811 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2812 for (i = 0; i < ir->type->vector_elements; i++) {
2813 values[i].u = ir->value.b[i] ? ctx->Const.UniformBooleanTrue : 0;
2814 }
2815 break;
2816 default:
2817 assert(!"Non-float/uint/int/bool constant");
2818 }
2819
2820 this->result = st_src_reg(file, -1, ir->type);
2821 this->result.index = add_constant(file,
2822 values,
2823 ir->type->vector_elements,
2824 gl_type,
2825 &this->result.swizzle);
2826 }
2827
2828 function_entry *
2829 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2830 {
2831 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2832 if (entry->sig == sig)
2833 return entry;
2834 }
2835
2836 entry = ralloc(mem_ctx, function_entry);
2837 entry->sig = sig;
2838 entry->sig_id = this->next_signature_id++;
2839 entry->bgn_inst = NULL;
2840
2841 /* Allocate storage for all the parameters. */
2842 foreach_in_list(ir_variable, param, &sig->parameters) {
2843 variable_storage *storage;
2844
2845 storage = find_variable_storage(param);
2846 assert(!storage);
2847
2848 st_src_reg src = get_temp(param->type);
2849
2850 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2851 this->variables.push_tail(storage);
2852 }
2853
2854 if (!sig->return_type->is_void()) {
2855 entry->return_reg = get_temp(sig->return_type);
2856 } else {
2857 entry->return_reg = undef_src;
2858 }
2859
2860 this->function_signatures.push_tail(entry);
2861 return entry;
2862 }
2863
2864 void
2865 glsl_to_tgsi_visitor::visit(ir_call *ir)
2866 {
2867 glsl_to_tgsi_instruction *call_inst;
2868 ir_function_signature *sig = ir->callee;
2869 function_entry *entry = get_function_signature(sig);
2870 int i;
2871
2872 /* Process in parameters. */
2873 foreach_two_lists(formal_node, &sig->parameters,
2874 actual_node, &ir->actual_parameters) {
2875 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2876 ir_variable *param = (ir_variable *) formal_node;
2877
2878 if (param->data.mode == ir_var_function_in ||
2879 param->data.mode == ir_var_function_inout) {
2880 variable_storage *storage = find_variable_storage(param);
2881 assert(storage);
2882
2883 param_rval->accept(this);
2884 st_src_reg r = this->result;
2885
2886 st_dst_reg l;
2887 l.file = storage->file;
2888 l.index = storage->index;
2889 l.reladdr = NULL;
2890 l.writemask = WRITEMASK_XYZW;
2891 l.cond_mask = COND_TR;
2892
2893 for (i = 0; i < type_size(param->type); i++) {
2894 emit(ir, TGSI_OPCODE_MOV, l, r);
2895 l.index++;
2896 r.index++;
2897 }
2898 }
2899 }
2900
2901 /* Emit call instruction */
2902 call_inst = emit(ir, TGSI_OPCODE_CAL);
2903 call_inst->function = entry;
2904
2905 /* Process out parameters. */
2906 foreach_two_lists(formal_node, &sig->parameters,
2907 actual_node, &ir->actual_parameters) {
2908 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2909 ir_variable *param = (ir_variable *) formal_node;
2910
2911 if (param->data.mode == ir_var_function_out ||
2912 param->data.mode == ir_var_function_inout) {
2913 variable_storage *storage = find_variable_storage(param);
2914 assert(storage);
2915
2916 st_src_reg r;
2917 r.file = storage->file;
2918 r.index = storage->index;
2919 r.reladdr = NULL;
2920 r.swizzle = SWIZZLE_NOOP;
2921 r.negate = 0;
2922
2923 param_rval->accept(this);
2924 st_dst_reg l = st_dst_reg(this->result);
2925
2926 for (i = 0; i < type_size(param->type); i++) {
2927 emit(ir, TGSI_OPCODE_MOV, l, r);
2928 l.index++;
2929 r.index++;
2930 }
2931 }
2932 }
2933
2934 /* Process return value. */
2935 this->result = entry->return_reg;
2936 }
2937
2938 void
2939 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2940 {
2941 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2942 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2943 st_src_reg levels_src;
2944 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2945 glsl_to_tgsi_instruction *inst = NULL;
2946 unsigned opcode = TGSI_OPCODE_NOP;
2947 const glsl_type *sampler_type = ir->sampler->type;
2948 ir_rvalue *sampler_index =
2949 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2950 bool is_cube_array = false;
2951 unsigned i;
2952
2953 /* if we are a cube array sampler */
2954 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2955 sampler_type->sampler_array)) {
2956 is_cube_array = true;
2957 }
2958
2959 if (ir->coordinate) {
2960 ir->coordinate->accept(this);
2961
2962 /* Put our coords in a temp. We'll need to modify them for shadow,
2963 * projection, or LOD, so the only case we'd use it as is is if
2964 * we're doing plain old texturing. The optimization passes on
2965 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2966 */
2967 coord = get_temp(glsl_type::vec4_type);
2968 coord_dst = st_dst_reg(coord);
2969 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2970 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2971 }
2972
2973 if (ir->projector) {
2974 ir->projector->accept(this);
2975 projector = this->result;
2976 }
2977
2978 /* Storage for our result. Ideally for an assignment we'd be using
2979 * the actual storage for the result here, instead.
2980 */
2981 result_src = get_temp(ir->type);
2982 result_dst = st_dst_reg(result_src);
2983
2984 switch (ir->op) {
2985 case ir_tex:
2986 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2987 if (ir->offset) {
2988 ir->offset->accept(this);
2989 offset[0] = this->result;
2990 }
2991 break;
2992 case ir_txb:
2993 if (is_cube_array ||
2994 sampler_type == glsl_type::samplerCubeShadow_type) {
2995 opcode = TGSI_OPCODE_TXB2;
2996 }
2997 else {
2998 opcode = TGSI_OPCODE_TXB;
2999 }
3000 ir->lod_info.bias->accept(this);
3001 lod_info = this->result;
3002 if (ir->offset) {
3003 ir->offset->accept(this);
3004 offset[0] = this->result;
3005 }
3006 break;
3007 case ir_txl:
3008 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
3009 ir->lod_info.lod->accept(this);
3010 lod_info = this->result;
3011 if (ir->offset) {
3012 ir->offset->accept(this);
3013 offset[0] = this->result;
3014 }
3015 break;
3016 case ir_txd:
3017 opcode = TGSI_OPCODE_TXD;
3018 ir->lod_info.grad.dPdx->accept(this);
3019 dx = this->result;
3020 ir->lod_info.grad.dPdy->accept(this);
3021 dy = this->result;
3022 if (ir->offset) {
3023 ir->offset->accept(this);
3024 offset[0] = this->result;
3025 }
3026 break;
3027 case ir_txs:
3028 opcode = TGSI_OPCODE_TXQ;
3029 ir->lod_info.lod->accept(this);
3030 lod_info = this->result;
3031 break;
3032 case ir_query_levels:
3033 opcode = TGSI_OPCODE_TXQ;
3034 lod_info = undef_src;
3035 levels_src = get_temp(ir->type);
3036 break;
3037 case ir_txf:
3038 opcode = TGSI_OPCODE_TXF;
3039 ir->lod_info.lod->accept(this);
3040 lod_info = this->result;
3041 if (ir->offset) {
3042 ir->offset->accept(this);
3043 offset[0] = this->result;
3044 }
3045 break;
3046 case ir_txf_ms:
3047 opcode = TGSI_OPCODE_TXF;
3048 ir->lod_info.sample_index->accept(this);
3049 sample_index = this->result;
3050 break;
3051 case ir_tg4:
3052 opcode = TGSI_OPCODE_TG4;
3053 ir->lod_info.component->accept(this);
3054 component = this->result;
3055 if (ir->offset) {
3056 ir->offset->accept(this);
3057 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
3058 const glsl_type *elt_type = ir->offset->type->fields.array;
3059 for (i = 0; i < ir->offset->type->length; i++) {
3060 offset[i] = this->result;
3061 offset[i].index += i * type_size(elt_type);
3062 offset[i].type = elt_type->base_type;
3063 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
3064 }
3065 } else {
3066 offset[0] = this->result;
3067 }
3068 }
3069 break;
3070 case ir_lod:
3071 opcode = TGSI_OPCODE_LODQ;
3072 break;
3073 }
3074
3075 if (ir->projector) {
3076 if (opcode == TGSI_OPCODE_TEX) {
3077 /* Slot the projector in as the last component of the coord. */
3078 coord_dst.writemask = WRITEMASK_W;
3079 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
3080 coord_dst.writemask = WRITEMASK_XYZW;
3081 opcode = TGSI_OPCODE_TXP;
3082 } else {
3083 st_src_reg coord_w = coord;
3084 coord_w.swizzle = SWIZZLE_WWWW;
3085
3086 /* For the other TEX opcodes there's no projective version
3087 * since the last slot is taken up by LOD info. Do the
3088 * projective divide now.
3089 */
3090 coord_dst.writemask = WRITEMASK_W;
3091 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
3092
3093 /* In the case where we have to project the coordinates "by hand,"
3094 * the shadow comparator value must also be projected.
3095 */
3096 st_src_reg tmp_src = coord;
3097 if (ir->shadow_comparitor) {
3098 /* Slot the shadow value in as the second to last component of the
3099 * coord.
3100 */
3101 ir->shadow_comparitor->accept(this);
3102
3103 tmp_src = get_temp(glsl_type::vec4_type);
3104 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
3105
3106 /* Projective division not allowed for array samplers. */
3107 assert(!sampler_type->sampler_array);
3108
3109 tmp_dst.writemask = WRITEMASK_Z;
3110 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
3111
3112 tmp_dst.writemask = WRITEMASK_XY;
3113 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
3114 }
3115
3116 coord_dst.writemask = WRITEMASK_XYZ;
3117 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
3118
3119 coord_dst.writemask = WRITEMASK_XYZW;
3120 coord.swizzle = SWIZZLE_XYZW;
3121 }
3122 }
3123
3124 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
3125 * comparator was put in the correct place (and projected) by the code,
3126 * above, that handles by-hand projection.
3127 */
3128 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
3129 /* Slot the shadow value in as the second to last component of the
3130 * coord.
3131 */
3132 ir->shadow_comparitor->accept(this);
3133
3134 if (is_cube_array) {
3135 cube_sc = get_temp(glsl_type::float_type);
3136 cube_sc_dst = st_dst_reg(cube_sc);
3137 cube_sc_dst.writemask = WRITEMASK_X;
3138 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
3139 cube_sc_dst.writemask = WRITEMASK_X;
3140 }
3141 else {
3142 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
3143 sampler_type->sampler_array) ||
3144 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
3145 coord_dst.writemask = WRITEMASK_W;
3146 } else {
3147 coord_dst.writemask = WRITEMASK_Z;
3148 }
3149 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
3150 coord_dst.writemask = WRITEMASK_XYZW;
3151 }
3152 }
3153
3154 if (ir->op == ir_txf_ms) {
3155 coord_dst.writemask = WRITEMASK_W;
3156 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
3157 coord_dst.writemask = WRITEMASK_XYZW;
3158 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
3159 opcode == TGSI_OPCODE_TXF) {
3160 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3161 coord_dst.writemask = WRITEMASK_W;
3162 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
3163 coord_dst.writemask = WRITEMASK_XYZW;
3164 }
3165
3166 if (sampler_index) {
3167 sampler_index->accept(this);
3168 emit_arl(ir, sampler_reladdr, this->result);
3169 }
3170
3171 if (opcode == TGSI_OPCODE_TXD)
3172 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3173 else if (opcode == TGSI_OPCODE_TXQ) {
3174 if (ir->op == ir_query_levels) {
3175 /* the level is stored in W */
3176 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3177 result_dst.writemask = WRITEMASK_X;
3178 levels_src.swizzle = SWIZZLE_WWWW;
3179 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3180 } else
3181 inst = emit(ir, opcode, result_dst, lod_info);
3182 } else if (opcode == TGSI_OPCODE_TXF) {
3183 inst = emit(ir, opcode, result_dst, coord);
3184 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3185 inst = emit(ir, opcode, result_dst, coord, lod_info);
3186 } else if (opcode == TGSI_OPCODE_TEX2) {
3187 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3188 } else if (opcode == TGSI_OPCODE_TG4) {
3189 if (is_cube_array && ir->shadow_comparitor) {
3190 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3191 } else {
3192 inst = emit(ir, opcode, result_dst, coord, component);
3193 }
3194 } else
3195 inst = emit(ir, opcode, result_dst, coord);
3196
3197 if (ir->shadow_comparitor)
3198 inst->tex_shadow = GL_TRUE;
3199
3200 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3201 this->shader_program,
3202 this->prog);
3203 if (sampler_index) {
3204 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3205 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3206 inst->sampler_array_size =
3207 ir->sampler->as_dereference_array()->array->type->array_size();
3208 } else {
3209 inst->sampler_array_size = 1;
3210 }
3211
3212 if (ir->offset) {
3213 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3214 inst->tex_offsets[i] = offset[i];
3215 inst->tex_offset_num_offset = i;
3216 }
3217
3218 switch (sampler_type->sampler_dimensionality) {
3219 case GLSL_SAMPLER_DIM_1D:
3220 inst->tex_target = (sampler_type->sampler_array)
3221 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3222 break;
3223 case GLSL_SAMPLER_DIM_2D:
3224 inst->tex_target = (sampler_type->sampler_array)
3225 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3226 break;
3227 case GLSL_SAMPLER_DIM_3D:
3228 inst->tex_target = TEXTURE_3D_INDEX;
3229 break;
3230 case GLSL_SAMPLER_DIM_CUBE:
3231 inst->tex_target = (sampler_type->sampler_array)
3232 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3233 break;
3234 case GLSL_SAMPLER_DIM_RECT:
3235 inst->tex_target = TEXTURE_RECT_INDEX;
3236 break;
3237 case GLSL_SAMPLER_DIM_BUF:
3238 inst->tex_target = TEXTURE_BUFFER_INDEX;
3239 break;
3240 case GLSL_SAMPLER_DIM_EXTERNAL:
3241 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3242 break;
3243 case GLSL_SAMPLER_DIM_MS:
3244 inst->tex_target = (sampler_type->sampler_array)
3245 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3246 break;
3247 default:
3248 assert(!"Should not get here.");
3249 }
3250
3251 this->result = result_src;
3252 }
3253
3254 void
3255 glsl_to_tgsi_visitor::visit(ir_return *ir)
3256 {
3257 if (ir->get_value()) {
3258 st_dst_reg l;
3259 int i;
3260
3261 assert(current_function);
3262
3263 ir->get_value()->accept(this);
3264 st_src_reg r = this->result;
3265
3266 l = st_dst_reg(current_function->return_reg);
3267
3268 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3269 emit(ir, TGSI_OPCODE_MOV, l, r);
3270 l.index++;
3271 r.index++;
3272 }
3273 }
3274
3275 emit(ir, TGSI_OPCODE_RET);
3276 }
3277
3278 void
3279 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3280 {
3281 if (ir->condition) {
3282 ir->condition->accept(this);
3283 st_src_reg condition = this->result;
3284
3285 /* Convert the bool condition to a float so we can negate. */
3286 if (native_integers) {
3287 st_src_reg temp = get_temp(ir->condition->type);
3288 emit(ir, TGSI_OPCODE_AND, st_dst_reg(temp),
3289 condition, st_src_reg_for_float(1.0));
3290 condition = temp;
3291 }
3292
3293 condition.negate = ~condition.negate;
3294 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition);
3295 } else {
3296 /* unconditional kil */
3297 emit(ir, TGSI_OPCODE_KILL);
3298 }
3299 }
3300
3301 void
3302 glsl_to_tgsi_visitor::visit(ir_if *ir)
3303 {
3304 unsigned if_opcode;
3305 glsl_to_tgsi_instruction *if_inst;
3306
3307 ir->condition->accept(this);
3308 assert(this->result.file != PROGRAM_UNDEFINED);
3309
3310 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3311
3312 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3313
3314 this->instructions.push_tail(if_inst);
3315
3316 visit_exec_list(&ir->then_instructions, this);
3317
3318 if (!ir->else_instructions.is_empty()) {
3319 emit(ir->condition, TGSI_OPCODE_ELSE);
3320 visit_exec_list(&ir->else_instructions, this);
3321 }
3322
3323 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3324 }
3325
3326
3327 void
3328 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3329 {
3330 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3331
3332 ir->stream->accept(this);
3333 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3334 }
3335
3336 void
3337 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3338 {
3339 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3340
3341 ir->stream->accept(this);
3342 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3343 }
3344
3345 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3346 {
3347 result.file = PROGRAM_UNDEFINED;
3348 next_temp = 1;
3349 array_sizes = NULL;
3350 max_num_arrays = 0;
3351 next_array = 0;
3352 next_signature_id = 1;
3353 num_immediates = 0;
3354 current_function = NULL;
3355 num_address_regs = 0;
3356 samplers_used = 0;
3357 indirect_addr_consts = false;
3358 wpos_transform_const = -1;
3359 glsl_version = 0;
3360 native_integers = false;
3361 mem_ctx = ralloc_context(NULL);
3362 ctx = NULL;
3363 prog = NULL;
3364 shader_program = NULL;
3365 shader = NULL;
3366 options = NULL;
3367 have_sqrt = false;
3368 have_fma = false;
3369 }
3370
3371 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3372 {
3373 free(array_sizes);
3374 ralloc_free(mem_ctx);
3375 }
3376
3377 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3378 {
3379 delete v;
3380 }
3381
3382
3383 /**
3384 * Count resources used by the given gpu program (number of texture
3385 * samplers, etc).
3386 */
3387 static void
3388 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3389 {
3390 v->samplers_used = 0;
3391
3392 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3393 if (is_tex_instruction(inst->op)) {
3394 for (int i = 0; i < inst->sampler_array_size; i++) {
3395 v->samplers_used |= 1 << (inst->sampler.index + i);
3396
3397 if (inst->tex_shadow) {
3398 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3399 }
3400 }
3401 }
3402 }
3403 prog->SamplersUsed = v->samplers_used;
3404
3405 if (v->shader_program != NULL)
3406 _mesa_update_shader_textures_used(v->shader_program, prog);
3407 }
3408
3409 /**
3410 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3411 * are read from the given src in this instruction
3412 */
3413 static int
3414 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3415 {
3416 int read_mask = 0, comp;
3417
3418 /* Now, given the src swizzle and the written channels, find which
3419 * components are actually read
3420 */
3421 for (comp = 0; comp < 4; ++comp) {
3422 const unsigned coord = GET_SWZ(src.swizzle, comp);
3423 assert(coord < 4);
3424 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3425 read_mask |= 1 << coord;
3426 }
3427
3428 return read_mask;
3429 }
3430
3431 /**
3432 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3433 * instruction is the first instruction to write to register T0. There are
3434 * several lowering passes done in GLSL IR (e.g. branches and
3435 * relative addressing) that create a large number of conditional assignments
3436 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3437 *
3438 * Here is why this conversion is safe:
3439 * CMP T0, T1 T2 T0 can be expanded to:
3440 * if (T1 < 0.0)
3441 * MOV T0, T2;
3442 * else
3443 * MOV T0, T0;
3444 *
3445 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3446 * as the original program. If (T1 < 0.0) evaluates to false, executing
3447 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3448 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3449 * because any instruction that was going to read from T0 after this was going
3450 * to read a garbage value anyway.
3451 */
3452 void
3453 glsl_to_tgsi_visitor::simplify_cmp(void)
3454 {
3455 int tempWritesSize = 0;
3456 unsigned *tempWrites = NULL;
3457 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3458
3459 memset(outputWrites, 0, sizeof(outputWrites));
3460
3461 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3462 unsigned prevWriteMask = 0;
3463
3464 /* Give up if we encounter relative addressing or flow control. */
3465 if (inst->dst[0].reladdr ||
3466 inst->dst[1].reladdr ||
3467 tgsi_get_opcode_info(inst->op)->is_branch ||
3468 inst->op == TGSI_OPCODE_BGNSUB ||
3469 inst->op == TGSI_OPCODE_CONT ||
3470 inst->op == TGSI_OPCODE_END ||
3471 inst->op == TGSI_OPCODE_ENDSUB ||
3472 inst->op == TGSI_OPCODE_RET) {
3473 break;
3474 }
3475
3476 if (inst->dst[0].file == PROGRAM_OUTPUT) {
3477 assert(inst->dst[0].index < MAX_PROGRAM_OUTPUTS);
3478 prevWriteMask = outputWrites[inst->dst[0].index];
3479 outputWrites[inst->dst[0].index] |= inst->dst[0].writemask;
3480 } else if (inst->dst[0].file == PROGRAM_TEMPORARY) {
3481 if (inst->dst[0].index >= tempWritesSize) {
3482 const int inc = 4096;
3483
3484 tempWrites = (unsigned*)
3485 realloc(tempWrites,
3486 (tempWritesSize + inc) * sizeof(unsigned));
3487 if (!tempWrites)
3488 return;
3489
3490 memset(tempWrites + tempWritesSize, 0, inc * sizeof(unsigned));
3491 tempWritesSize += inc;
3492 }
3493
3494 prevWriteMask = tempWrites[inst->dst[0].index];
3495 tempWrites[inst->dst[0].index] |= inst->dst[0].writemask;
3496 } else
3497 continue;
3498
3499 /* For a CMP to be considered a conditional write, the destination
3500 * register and source register two must be the same. */
3501 if (inst->op == TGSI_OPCODE_CMP
3502 && !(inst->dst[0].writemask & prevWriteMask)
3503 && inst->src[2].file == inst->dst[0].file
3504 && inst->src[2].index == inst->dst[0].index
3505 && inst->dst[0].writemask == get_src_arg_mask(inst->dst[0], inst->src[2])) {
3506
3507 inst->op = TGSI_OPCODE_MOV;
3508 inst->src[0] = inst->src[1];
3509 }
3510 }
3511
3512 free(tempWrites);
3513 }
3514
3515 /* Replaces all references to a temporary register index with another index. */
3516 void
3517 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3518 {
3519 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3520 unsigned j;
3521
3522 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3523 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3524 inst->src[j].index == index) {
3525 inst->src[j].index = new_index;
3526 }
3527 }
3528
3529 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3530 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3531 inst->tex_offsets[j].index == index) {
3532 inst->tex_offsets[j].index = new_index;
3533 }
3534 }
3535
3536 for (j = 0; j < num_inst_dst_regs(inst->op); j++) {
3537 if (inst->dst[j].file == PROGRAM_TEMPORARY && inst->dst[j].index == index) {
3538 inst->dst[j].index = new_index;
3539 }
3540 }
3541 }
3542 }
3543
3544 int
3545 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3546 {
3547 int depth = 0; /* loop depth */
3548 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3549 unsigned i = 0, j;
3550
3551 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3552 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3553 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3554 inst->src[j].index == index) {
3555 return (depth == 0) ? i : loop_start;
3556 }
3557 }
3558 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3559 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3560 inst->tex_offsets[j].index == index) {
3561 return (depth == 0) ? i : loop_start;
3562 }
3563 }
3564 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3565 if(depth++ == 0)
3566 loop_start = i;
3567 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3568 if (--depth == 0)
3569 loop_start = -1;
3570 }
3571 assert(depth >= 0);
3572 i++;
3573 }
3574 return -1;
3575 }
3576
3577 int
3578 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3579 {
3580 int depth = 0; /* loop depth */
3581 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3582 int i = 0;
3583 unsigned j;
3584
3585 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3586 for (j = 0; j < num_inst_dst_regs(inst->op); j++) {
3587 if (inst->dst[j].file == PROGRAM_TEMPORARY && inst->dst[j].index == index) {
3588 return (depth == 0) ? i : loop_start;
3589 }
3590 }
3591 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3592 if(depth++ == 0)
3593 loop_start = i;
3594 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3595 if (--depth == 0)
3596 loop_start = -1;
3597 }
3598 assert(depth >= 0);
3599 i++;
3600 }
3601 return -1;
3602 }
3603
3604 int
3605 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3606 {
3607 int depth = 0; /* loop depth */
3608 int last = -1; /* index of last instruction that reads the temporary */
3609 unsigned i = 0, j;
3610
3611 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3612 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3613 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3614 inst->src[j].index == index) {
3615 last = (depth == 0) ? i : -2;
3616 }
3617 }
3618 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3619 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3620 inst->tex_offsets[j].index == index)
3621 last = (depth == 0) ? i : -2;
3622 }
3623 if (inst->op == TGSI_OPCODE_BGNLOOP)
3624 depth++;
3625 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3626 if (--depth == 0 && last == -2)
3627 last = i;
3628 assert(depth >= 0);
3629 i++;
3630 }
3631 assert(last >= -1);
3632 return last;
3633 }
3634
3635 int
3636 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3637 {
3638 int depth = 0; /* loop depth */
3639 int last = -1; /* index of last instruction that writes to the temporary */
3640 int i = 0;
3641 unsigned j;
3642
3643 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3644 for (j = 0; j < num_inst_dst_regs(inst->op); j++) {
3645 if (inst->dst[j].file == PROGRAM_TEMPORARY && inst->dst[j].index == index)
3646 last = (depth == 0) ? i : -2;
3647 }
3648
3649 if (inst->op == TGSI_OPCODE_BGNLOOP)
3650 depth++;
3651 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3652 if (--depth == 0 && last == -2)
3653 last = i;
3654 assert(depth >= 0);
3655 i++;
3656 }
3657 assert(last >= -1);
3658 return last;
3659 }
3660
3661 /*
3662 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3663 * channels for copy propagation and updates following instructions to
3664 * use the original versions.
3665 *
3666 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3667 * will occur. As an example, a TXP production before this pass:
3668 *
3669 * 0: MOV TEMP[1], INPUT[4].xyyy;
3670 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3671 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3672 *
3673 * and after:
3674 *
3675 * 0: MOV TEMP[1], INPUT[4].xyyy;
3676 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3677 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3678 *
3679 * which allows for dead code elimination on TEMP[1]'s writes.
3680 */
3681 void
3682 glsl_to_tgsi_visitor::copy_propagate(void)
3683 {
3684 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3685 glsl_to_tgsi_instruction *,
3686 this->next_temp * 4);
3687 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3688 int level = 0;
3689
3690 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3691 assert(inst->dst[0].file != PROGRAM_TEMPORARY
3692 || inst->dst[0].index < this->next_temp);
3693
3694 /* First, do any copy propagation possible into the src regs. */
3695 for (int r = 0; r < 3; r++) {
3696 glsl_to_tgsi_instruction *first = NULL;
3697 bool good = true;
3698 int acp_base = inst->src[r].index * 4;
3699
3700 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3701 inst->src[r].reladdr ||
3702 inst->src[r].reladdr2)
3703 continue;
3704
3705 /* See if we can find entries in the ACP consisting of MOVs
3706 * from the same src register for all the swizzled channels
3707 * of this src register reference.
3708 */
3709 for (int i = 0; i < 4; i++) {
3710 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3711 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3712
3713 if (!copy_chan) {
3714 good = false;
3715 break;
3716 }
3717
3718 assert(acp_level[acp_base + src_chan] <= level);
3719
3720 if (!first) {
3721 first = copy_chan;
3722 } else {
3723 if (first->src[0].file != copy_chan->src[0].file ||
3724 first->src[0].index != copy_chan->src[0].index ||
3725 first->src[0].double_reg2 != copy_chan->src[0].double_reg2 ||
3726 first->src[0].index2D != copy_chan->src[0].index2D) {
3727 good = false;
3728 break;
3729 }
3730 }
3731 }
3732
3733 if (good) {
3734 /* We've now validated that we can copy-propagate to
3735 * replace this src register reference. Do it.
3736 */
3737 inst->src[r].file = first->src[0].file;
3738 inst->src[r].index = first->src[0].index;
3739 inst->src[r].index2D = first->src[0].index2D;
3740 inst->src[r].has_index2 = first->src[0].has_index2;
3741 inst->src[r].double_reg2 = first->src[0].double_reg2;
3742
3743 int swizzle = 0;
3744 for (int i = 0; i < 4; i++) {
3745 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3746 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3747 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << (3 * i));
3748 }
3749 inst->src[r].swizzle = swizzle;
3750 }
3751 }
3752
3753 switch (inst->op) {
3754 case TGSI_OPCODE_BGNLOOP:
3755 case TGSI_OPCODE_ENDLOOP:
3756 /* End of a basic block, clear the ACP entirely. */
3757 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3758 break;
3759
3760 case TGSI_OPCODE_IF:
3761 case TGSI_OPCODE_UIF:
3762 ++level;
3763 break;
3764
3765 case TGSI_OPCODE_ENDIF:
3766 case TGSI_OPCODE_ELSE:
3767 /* Clear all channels written inside the block from the ACP, but
3768 * leaving those that were not touched.
3769 */
3770 for (int r = 0; r < this->next_temp; r++) {
3771 for (int c = 0; c < 4; c++) {
3772 if (!acp[4 * r + c])
3773 continue;
3774
3775 if (acp_level[4 * r + c] >= level)
3776 acp[4 * r + c] = NULL;
3777 }
3778 }
3779 if (inst->op == TGSI_OPCODE_ENDIF)
3780 --level;
3781 break;
3782
3783 default:
3784 /* Continuing the block, clear any written channels from
3785 * the ACP.
3786 */
3787 for (int d = 0; d < 2; d++) {
3788 if (inst->dst[d].file == PROGRAM_TEMPORARY && inst->dst[d].reladdr) {
3789 /* Any temporary might be written, so no copy propagation
3790 * across this instruction.
3791 */
3792 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3793 } else if (inst->dst[d].file == PROGRAM_OUTPUT &&
3794 inst->dst[d].reladdr) {
3795 /* Any output might be written, so no copy propagation
3796 * from outputs across this instruction.
3797 */
3798 for (int r = 0; r < this->next_temp; r++) {
3799 for (int c = 0; c < 4; c++) {
3800 if (!acp[4 * r + c])
3801 continue;
3802
3803 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3804 acp[4 * r + c] = NULL;
3805 }
3806 }
3807 } else if (inst->dst[d].file == PROGRAM_TEMPORARY ||
3808 inst->dst[d].file == PROGRAM_OUTPUT) {
3809 /* Clear where it's used as dst. */
3810 if (inst->dst[d].file == PROGRAM_TEMPORARY) {
3811 for (int c = 0; c < 4; c++) {
3812 if (inst->dst[d].writemask & (1 << c))
3813 acp[4 * inst->dst[d].index + c] = NULL;
3814 }
3815 }
3816
3817 /* Clear where it's used as src. */
3818 for (int r = 0; r < this->next_temp; r++) {
3819 for (int c = 0; c < 4; c++) {
3820 if (!acp[4 * r + c])
3821 continue;
3822
3823 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3824
3825 if (acp[4 * r + c]->src[0].file == inst->dst[d].file &&
3826 acp[4 * r + c]->src[0].index == inst->dst[d].index &&
3827 inst->dst[d].writemask & (1 << src_chan)) {
3828 acp[4 * r + c] = NULL;
3829 }
3830 }
3831 }
3832 }
3833 }
3834 break;
3835 }
3836
3837 /* If this is a copy, add it to the ACP. */
3838 if (inst->op == TGSI_OPCODE_MOV &&
3839 inst->dst[0].file == PROGRAM_TEMPORARY &&
3840 !(inst->dst[0].file == inst->src[0].file &&
3841 inst->dst[0].index == inst->src[0].index) &&
3842 !inst->dst[0].reladdr &&
3843 !inst->saturate &&
3844 inst->src[0].file != PROGRAM_ARRAY &&
3845 !inst->src[0].reladdr &&
3846 !inst->src[0].reladdr2 &&
3847 !inst->src[0].negate) {
3848 for (int i = 0; i < 4; i++) {
3849 if (inst->dst[0].writemask & (1 << i)) {
3850 acp[4 * inst->dst[0].index + i] = inst;
3851 acp_level[4 * inst->dst[0].index + i] = level;
3852 }
3853 }
3854 }
3855 }
3856
3857 ralloc_free(acp_level);
3858 ralloc_free(acp);
3859 }
3860
3861 /*
3862 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3863 * code elimination.
3864 *
3865 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3866 * will occur. As an example, a TXP production after copy propagation but
3867 * before this pass:
3868 *
3869 * 0: MOV TEMP[1], INPUT[4].xyyy;
3870 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3871 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3872 *
3873 * and after this pass:
3874 *
3875 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3876 */
3877 int
3878 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3879 {
3880 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3881 glsl_to_tgsi_instruction *,
3882 this->next_temp * 4);
3883 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3884 int level = 0;
3885 int removed = 0;
3886
3887 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3888 assert(inst->dst[0].file != PROGRAM_TEMPORARY
3889 || inst->dst[0].index < this->next_temp);
3890
3891 switch (inst->op) {
3892 case TGSI_OPCODE_BGNLOOP:
3893 case TGSI_OPCODE_ENDLOOP:
3894 case TGSI_OPCODE_CONT:
3895 case TGSI_OPCODE_BRK:
3896 /* End of a basic block, clear the write array entirely.
3897 *
3898 * This keeps us from killing dead code when the writes are
3899 * on either side of a loop, even when the register isn't touched
3900 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3901 * dead code of this type, so it shouldn't make a difference as long as
3902 * the dead code elimination pass in the GLSL compiler does its job.
3903 */
3904 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3905 break;
3906
3907 case TGSI_OPCODE_ENDIF:
3908 case TGSI_OPCODE_ELSE:
3909 /* Promote the recorded level of all channels written inside the
3910 * preceding if or else block to the level above the if/else block.
3911 */
3912 for (int r = 0; r < this->next_temp; r++) {
3913 for (int c = 0; c < 4; c++) {
3914 if (!writes[4 * r + c])
3915 continue;
3916
3917 if (write_level[4 * r + c] == level)
3918 write_level[4 * r + c] = level-1;
3919 }
3920 }
3921 if(inst->op == TGSI_OPCODE_ENDIF)
3922 --level;
3923 break;
3924
3925 case TGSI_OPCODE_IF:
3926 case TGSI_OPCODE_UIF:
3927 ++level;
3928 /* fallthrough to default case to mark the condition as read */
3929 default:
3930 /* Continuing the block, clear any channels from the write array that
3931 * are read by this instruction.
3932 */
3933 for (unsigned i = 0; i < ARRAY_SIZE(inst->src); i++) {
3934 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3935 /* Any temporary might be read, so no dead code elimination
3936 * across this instruction.
3937 */
3938 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3939 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3940 /* Clear where it's used as src. */
3941 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3942 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3943 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3944 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3945
3946 for (int c = 0; c < 4; c++) {
3947 if (src_chans & (1 << c))
3948 writes[4 * inst->src[i].index + c] = NULL;
3949 }
3950 }
3951 }
3952 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3953 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3954 /* Any temporary might be read, so no dead code elimination
3955 * across this instruction.
3956 */
3957 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3958 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3959 /* Clear where it's used as src. */
3960 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3961 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3962 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3963 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3964
3965 for (int c = 0; c < 4; c++) {
3966 if (src_chans & (1 << c))
3967 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3968 }
3969 }
3970 }
3971 break;
3972 }
3973
3974 /* If this instruction writes to a temporary, add it to the write array.
3975 * If there is already an instruction in the write array for one or more
3976 * of the channels, flag that channel write as dead.
3977 */
3978 for (unsigned i = 0; i < ARRAY_SIZE(inst->dst); i++) {
3979 if (inst->dst[i].file == PROGRAM_TEMPORARY &&
3980 !inst->dst[i].reladdr &&
3981 !inst->saturate) {
3982 for (int c = 0; c < 4; c++) {
3983 if (inst->dst[i].writemask & (1 << c)) {
3984 if (writes[4 * inst->dst[i].index + c]) {
3985 if (write_level[4 * inst->dst[i].index + c] < level)
3986 continue;
3987 else
3988 writes[4 * inst->dst[i].index + c]->dead_mask |= (1 << c);
3989 }
3990 writes[4 * inst->dst[i].index + c] = inst;
3991 write_level[4 * inst->dst[i].index + c] = level;
3992 }
3993 }
3994 }
3995 }
3996 }
3997
3998 /* Anything still in the write array at this point is dead code. */
3999 for (int r = 0; r < this->next_temp; r++) {
4000 for (int c = 0; c < 4; c++) {
4001 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
4002 if (inst)
4003 inst->dead_mask |= (1 << c);
4004 }
4005 }
4006
4007 /* Now actually remove the instructions that are completely dead and update
4008 * the writemask of other instructions with dead channels.
4009 */
4010 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
4011 if (!inst->dead_mask || !inst->dst[0].writemask)
4012 continue;
4013 else if ((inst->dst[0].writemask & ~inst->dead_mask) == 0) {
4014 inst->remove();
4015 delete inst;
4016 removed++;
4017 } else {
4018 if (inst->dst[0].type == GLSL_TYPE_DOUBLE) {
4019 if (inst->dead_mask == WRITEMASK_XY ||
4020 inst->dead_mask == WRITEMASK_ZW)
4021 inst->dst[0].writemask &= ~(inst->dead_mask);
4022 } else
4023 inst->dst[0].writemask &= ~(inst->dead_mask);
4024 }
4025 }
4026
4027 ralloc_free(write_level);
4028 ralloc_free(writes);
4029
4030 return removed;
4031 }
4032
4033 /* merge DFRACEXP instructions into one. */
4034 void
4035 glsl_to_tgsi_visitor::merge_two_dsts(void)
4036 {
4037 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
4038 glsl_to_tgsi_instruction *inst2;
4039 bool merged;
4040 if (num_inst_dst_regs(inst->op) != 2)
4041 continue;
4042
4043 if (inst->dst[0].file != PROGRAM_UNDEFINED &&
4044 inst->dst[1].file != PROGRAM_UNDEFINED)
4045 continue;
4046
4047 inst2 = (glsl_to_tgsi_instruction *) inst->next;
4048 do {
4049
4050 if (inst->src[0].file == inst2->src[0].file &&
4051 inst->src[0].index == inst2->src[0].index &&
4052 inst->src[0].type == inst2->src[0].type &&
4053 inst->src[0].swizzle == inst2->src[0].swizzle)
4054 break;
4055 inst2 = (glsl_to_tgsi_instruction *) inst2->next;
4056 } while (inst2);
4057
4058 if (!inst2)
4059 continue;
4060 merged = false;
4061 if (inst->dst[0].file == PROGRAM_UNDEFINED) {
4062 merged = true;
4063 inst->dst[0] = inst2->dst[0];
4064 } else if (inst->dst[1].file == PROGRAM_UNDEFINED) {
4065 inst->dst[1] = inst2->dst[1];
4066 merged = true;
4067 }
4068
4069 if (merged) {
4070 inst2->remove();
4071 delete inst2;
4072 }
4073 }
4074 }
4075
4076 /* Merges temporary registers together where possible to reduce the number of
4077 * registers needed to run a program.
4078 *
4079 * Produces optimal code only after copy propagation and dead code elimination
4080 * have been run. */
4081 void
4082 glsl_to_tgsi_visitor::merge_registers(void)
4083 {
4084 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
4085 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
4086 int i, j;
4087
4088 /* Read the indices of the last read and first write to each temp register
4089 * into an array so that we don't have to traverse the instruction list as
4090 * much. */
4091 for (i = 0; i < this->next_temp; i++) {
4092 last_reads[i] = get_last_temp_read(i);
4093 first_writes[i] = get_first_temp_write(i);
4094 }
4095
4096 /* Start looking for registers with non-overlapping usages that can be
4097 * merged together. */
4098 for (i = 0; i < this->next_temp; i++) {
4099 /* Don't touch unused registers. */
4100 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
4101
4102 for (j = 0; j < this->next_temp; j++) {
4103 /* Don't touch unused registers. */
4104 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
4105
4106 /* We can merge the two registers if the first write to j is after or
4107 * in the same instruction as the last read from i. Note that the
4108 * register at index i will always be used earlier or at the same time
4109 * as the register at index j. */
4110 if (first_writes[i] <= first_writes[j] &&
4111 last_reads[i] <= first_writes[j]) {
4112 rename_temp_register(j, i); /* Replace all references to j with i.*/
4113
4114 /* Update the first_writes and last_reads arrays with the new
4115 * values for the merged register index, and mark the newly unused
4116 * register index as such. */
4117 last_reads[i] = last_reads[j];
4118 first_writes[j] = -1;
4119 last_reads[j] = -1;
4120 }
4121 }
4122 }
4123
4124 ralloc_free(last_reads);
4125 ralloc_free(first_writes);
4126 }
4127
4128 /* Reassign indices to temporary registers by reusing unused indices created
4129 * by optimization passes. */
4130 void
4131 glsl_to_tgsi_visitor::renumber_registers(void)
4132 {
4133 int i = 0;
4134 int new_index = 0;
4135
4136 for (i = 0; i < this->next_temp; i++) {
4137 if (get_first_temp_read(i) < 0) continue;
4138 if (i != new_index)
4139 rename_temp_register(i, new_index);
4140 new_index++;
4141 }
4142
4143 this->next_temp = new_index;
4144 }
4145
4146 /**
4147 * Returns a fragment program which implements the current pixel transfer ops.
4148 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
4149 */
4150 extern "C" void
4151 get_pixel_transfer_visitor(struct st_fragment_program *fp,
4152 glsl_to_tgsi_visitor *original,
4153 int scale_and_bias, int pixel_maps)
4154 {
4155 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4156 struct st_context *st = st_context(original->ctx);
4157 struct gl_program *prog = &fp->Base.Base;
4158 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
4159 st_src_reg coord, src0;
4160 st_dst_reg dst0;
4161 glsl_to_tgsi_instruction *inst;
4162
4163 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4164 v->ctx = original->ctx;
4165 v->prog = prog;
4166 v->shader_program = NULL;
4167 v->shader = NULL;
4168 v->glsl_version = original->glsl_version;
4169 v->native_integers = original->native_integers;
4170 v->options = original->options;
4171 v->next_temp = original->next_temp;
4172 v->num_address_regs = original->num_address_regs;
4173 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4174 v->indirect_addr_consts = original->indirect_addr_consts;
4175 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4176 v->num_immediates = original->num_immediates;
4177
4178 /*
4179 * Get initial pixel color from the texture.
4180 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
4181 */
4182 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4183 src0 = v->get_temp(glsl_type::vec4_type);
4184 dst0 = st_dst_reg(src0);
4185 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4186 inst->sampler_array_size = 1;
4187 inst->tex_target = TEXTURE_2D_INDEX;
4188
4189 prog->InputsRead |= VARYING_BIT_TEX0;
4190 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
4191 v->samplers_used |= (1 << 0);
4192
4193 if (scale_and_bias) {
4194 static const gl_state_index scale_state[STATE_LENGTH] =
4195 { STATE_INTERNAL, STATE_PT_SCALE,
4196 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
4197 static const gl_state_index bias_state[STATE_LENGTH] =
4198 { STATE_INTERNAL, STATE_PT_BIAS,
4199 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
4200 GLint scale_p, bias_p;
4201 st_src_reg scale, bias;
4202
4203 scale_p = _mesa_add_state_reference(params, scale_state);
4204 bias_p = _mesa_add_state_reference(params, bias_state);
4205
4206 /* MAD colorTemp, colorTemp, scale, bias; */
4207 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
4208 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
4209 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
4210 }
4211
4212 if (pixel_maps) {
4213 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
4214 st_dst_reg temp_dst = st_dst_reg(temp);
4215
4216 assert(st->pixel_xfer.pixelmap_texture);
4217 (void) st;
4218
4219 /* With a little effort, we can do four pixel map look-ups with
4220 * two TEX instructions:
4221 */
4222
4223 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4224 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
4225 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4226 inst->sampler.index = 1;
4227 inst->sampler_array_size = 1;
4228 inst->tex_target = TEXTURE_2D_INDEX;
4229
4230 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4231 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4232 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4233 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4234 inst->sampler.index = 1;
4235 inst->sampler_array_size = 1;
4236 inst->tex_target = TEXTURE_2D_INDEX;
4237
4238 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4239 v->samplers_used |= (1 << 1);
4240
4241 /* MOV colorTemp, temp; */
4242 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4243 }
4244
4245 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4246 * new visitor. */
4247 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4248 glsl_to_tgsi_instruction *newinst;
4249 st_src_reg src_regs[3];
4250
4251 if (inst->dst[0].file == PROGRAM_OUTPUT)
4252 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst[0].index);
4253
4254 for (int i = 0; i < 3; i++) {
4255 src_regs[i] = inst->src[i];
4256 if (src_regs[i].file == PROGRAM_INPUT &&
4257 src_regs[i].index == VARYING_SLOT_COL0) {
4258 src_regs[i].file = PROGRAM_TEMPORARY;
4259 src_regs[i].index = src0.index;
4260 }
4261 else if (src_regs[i].file == PROGRAM_INPUT)
4262 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4263 }
4264
4265 newinst = v->emit(NULL, inst->op, inst->dst[0], src_regs[0], src_regs[1], src_regs[2]);
4266 newinst->tex_target = inst->tex_target;
4267 newinst->sampler_array_size = inst->sampler_array_size;
4268 }
4269
4270 /* Make modifications to fragment program info. */
4271 prog->Parameters = _mesa_combine_parameter_lists(params,
4272 original->prog->Parameters);
4273 _mesa_free_parameter_list(params);
4274 count_resources(v, prog);
4275 fp->glsl_to_tgsi = v;
4276 }
4277
4278 /**
4279 * Make fragment program for glBitmap:
4280 * Sample the texture and kill the fragment if the bit is 0.
4281 * This program will be combined with the user's fragment program.
4282 *
4283 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4284 */
4285 extern "C" void
4286 get_bitmap_visitor(struct st_fragment_program *fp,
4287 glsl_to_tgsi_visitor *original, int samplerIndex)
4288 {
4289 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4290 struct st_context *st = st_context(original->ctx);
4291 struct gl_program *prog = &fp->Base.Base;
4292 st_src_reg coord, src0;
4293 st_dst_reg dst0;
4294 glsl_to_tgsi_instruction *inst;
4295
4296 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4297 v->ctx = original->ctx;
4298 v->prog = prog;
4299 v->shader_program = NULL;
4300 v->shader = NULL;
4301 v->glsl_version = original->glsl_version;
4302 v->native_integers = original->native_integers;
4303 v->options = original->options;
4304 v->next_temp = original->next_temp;
4305 v->num_address_regs = original->num_address_regs;
4306 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4307 v->indirect_addr_consts = original->indirect_addr_consts;
4308 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4309 v->num_immediates = original->num_immediates;
4310
4311 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4312 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4313 src0 = v->get_temp(glsl_type::vec4_type);
4314 dst0 = st_dst_reg(src0);
4315 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4316 inst->sampler.index = samplerIndex;
4317 inst->sampler_array_size = 1;
4318 inst->tex_target = TEXTURE_2D_INDEX;
4319
4320 prog->InputsRead |= VARYING_BIT_TEX0;
4321 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4322 v->samplers_used |= (1 << samplerIndex);
4323
4324 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4325 src0.negate = NEGATE_XYZW;
4326 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4327 src0.swizzle = SWIZZLE_XXXX;
4328 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4329
4330 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4331 * new visitor. */
4332 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4333 glsl_to_tgsi_instruction *newinst;
4334 st_src_reg src_regs[3];
4335
4336 if (inst->dst[0].file == PROGRAM_OUTPUT)
4337 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst[0].index);
4338
4339 for (int i = 0; i < 3; i++) {
4340 src_regs[i] = inst->src[i];
4341 if (src_regs[i].file == PROGRAM_INPUT)
4342 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4343 }
4344
4345 newinst = v->emit(NULL, inst->op, inst->dst[0], src_regs[0], src_regs[1], src_regs[2]);
4346 newinst->tex_target = inst->tex_target;
4347 newinst->sampler_array_size = inst->sampler_array_size;
4348 }
4349
4350 /* Make modifications to fragment program info. */
4351 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4352 count_resources(v, prog);
4353 fp->glsl_to_tgsi = v;
4354 }
4355
4356 /* ------------------------- TGSI conversion stuff -------------------------- */
4357 struct label {
4358 unsigned branch_target;
4359 unsigned token;
4360 };
4361
4362 /**
4363 * Intermediate state used during shader translation.
4364 */
4365 struct st_translate {
4366 struct ureg_program *ureg;
4367
4368 unsigned temps_size;
4369 struct ureg_dst *temps;
4370
4371 struct ureg_dst *arrays;
4372 unsigned num_temp_arrays;
4373 struct ureg_src *constants;
4374 int num_constants;
4375 struct ureg_src *immediates;
4376 int num_immediates;
4377 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4378 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4379 struct ureg_dst address[3];
4380 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4381 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4382 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4383 unsigned *array_sizes;
4384
4385 const GLuint *inputMapping;
4386 const GLuint *outputMapping;
4387
4388 /* For every instruction that contains a label (eg CALL), keep
4389 * details so that we can go back afterwards and emit the correct
4390 * tgsi instruction number for each label.
4391 */
4392 struct label *labels;
4393 unsigned labels_size;
4394 unsigned labels_count;
4395
4396 /* Keep a record of the tgsi instruction number that each mesa
4397 * instruction starts at, will be used to fix up labels after
4398 * translation.
4399 */
4400 unsigned *insn;
4401 unsigned insn_size;
4402 unsigned insn_count;
4403
4404 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4405
4406 boolean error;
4407 };
4408
4409 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4410 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4411 /* Vertex shader
4412 */
4413 TGSI_SEMANTIC_VERTEXID,
4414 TGSI_SEMANTIC_INSTANCEID,
4415 TGSI_SEMANTIC_VERTEXID_NOBASE,
4416 TGSI_SEMANTIC_BASEVERTEX,
4417
4418 /* Geometry shader
4419 */
4420 TGSI_SEMANTIC_INVOCATIONID,
4421
4422 /* Fragment shader
4423 */
4424 TGSI_SEMANTIC_FACE,
4425 TGSI_SEMANTIC_SAMPLEID,
4426 TGSI_SEMANTIC_SAMPLEPOS,
4427 TGSI_SEMANTIC_SAMPLEMASK,
4428 };
4429
4430 /**
4431 * Make note of a branch to a label in the TGSI code.
4432 * After we've emitted all instructions, we'll go over the list
4433 * of labels built here and patch the TGSI code with the actual
4434 * location of each label.
4435 */
4436 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4437 {
4438 unsigned i;
4439
4440 if (t->labels_count + 1 >= t->labels_size) {
4441 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4442 t->labels = (struct label *)realloc(t->labels,
4443 t->labels_size * sizeof(struct label));
4444 if (t->labels == NULL) {
4445 static unsigned dummy;
4446 t->error = TRUE;
4447 return &dummy;
4448 }
4449 }
4450
4451 i = t->labels_count++;
4452 t->labels[i].branch_target = branch_target;
4453 return &t->labels[i].token;
4454 }
4455
4456 /**
4457 * Called prior to emitting the TGSI code for each instruction.
4458 * Allocate additional space for instructions if needed.
4459 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4460 * the next TGSI instruction.
4461 */
4462 static void set_insn_start(struct st_translate *t, unsigned start)
4463 {
4464 if (t->insn_count + 1 >= t->insn_size) {
4465 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4466 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4467 if (t->insn == NULL) {
4468 t->error = TRUE;
4469 return;
4470 }
4471 }
4472
4473 t->insn[t->insn_count++] = start;
4474 }
4475
4476 /**
4477 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4478 */
4479 static struct ureg_src
4480 emit_immediate(struct st_translate *t,
4481 gl_constant_value values[4],
4482 int type, int size)
4483 {
4484 struct ureg_program *ureg = t->ureg;
4485
4486 switch(type)
4487 {
4488 case GL_FLOAT:
4489 return ureg_DECL_immediate(ureg, &values[0].f, size);
4490 case GL_DOUBLE:
4491 return ureg_DECL_immediate_f64(ureg, (double *)&values[0].f, size);
4492 case GL_INT:
4493 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4494 case GL_UNSIGNED_INT:
4495 case GL_BOOL:
4496 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4497 default:
4498 assert(!"should not get here - type must be float, int, uint, or bool");
4499 return ureg_src_undef();
4500 }
4501 }
4502
4503 /**
4504 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4505 */
4506 static struct ureg_dst
4507 dst_register(struct st_translate *t,
4508 gl_register_file file,
4509 GLuint index)
4510 {
4511 unsigned array;
4512
4513 switch(file) {
4514 case PROGRAM_UNDEFINED:
4515 return ureg_dst_undef();
4516
4517 case PROGRAM_TEMPORARY:
4518 /* Allocate space for temporaries on demand. */
4519 if (index >= t->temps_size) {
4520 const int inc = 4096;
4521
4522 t->temps = (struct ureg_dst*)
4523 realloc(t->temps,
4524 (t->temps_size + inc) * sizeof(struct ureg_dst));
4525 if (!t->temps)
4526 return ureg_dst_undef();
4527
4528 memset(t->temps + t->temps_size, 0, inc * sizeof(struct ureg_dst));
4529 t->temps_size += inc;
4530 }
4531
4532 if (ureg_dst_is_undef(t->temps[index]))
4533 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4534
4535 return t->temps[index];
4536
4537 case PROGRAM_ARRAY:
4538 array = index >> 16;
4539
4540 assert(array < t->num_temp_arrays);
4541
4542 if (ureg_dst_is_undef(t->arrays[array]))
4543 t->arrays[array] = ureg_DECL_array_temporary(
4544 t->ureg, t->array_sizes[array], TRUE);
4545
4546 return ureg_dst_array_offset(t->arrays[array],
4547 (int)(index & 0xFFFF) - 0x8000);
4548
4549 case PROGRAM_OUTPUT:
4550 if (t->procType == TGSI_PROCESSOR_VERTEX)
4551 assert(index < VARYING_SLOT_MAX);
4552 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4553 assert(index < FRAG_RESULT_MAX);
4554 else
4555 assert(index < VARYING_SLOT_MAX);
4556
4557 assert(t->outputMapping[index] < ARRAY_SIZE(t->outputs));
4558
4559 return t->outputs[t->outputMapping[index]];
4560
4561 case PROGRAM_ADDRESS:
4562 return t->address[index];
4563
4564 default:
4565 assert(!"unknown dst register file");
4566 return ureg_dst_undef();
4567 }
4568 }
4569
4570 /**
4571 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4572 */
4573 static struct ureg_src
4574 src_register(struct st_translate *t, const st_src_reg *reg)
4575 {
4576 int index = reg->index;
4577 int double_reg2 = reg->double_reg2 ? 1 : 0;
4578
4579 switch(reg->file) {
4580 case PROGRAM_UNDEFINED:
4581 return ureg_imm4f(t->ureg, 0, 0, 0, 0);
4582
4583 case PROGRAM_TEMPORARY:
4584 case PROGRAM_ARRAY:
4585 return ureg_src(dst_register(t, reg->file, reg->index));
4586
4587 case PROGRAM_UNIFORM:
4588 assert(reg->index >= 0);
4589 return reg->index < t->num_constants ?
4590 t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
4591 case PROGRAM_STATE_VAR:
4592 case PROGRAM_CONSTANT: /* ie, immediate */
4593 if (reg->has_index2)
4594 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4595 else
4596 return reg->index >= 0 && reg->index < t->num_constants ?
4597 t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0);
4598
4599 case PROGRAM_IMMEDIATE:
4600 assert(reg->index >= 0 && reg->index < t->num_immediates);
4601 return t->immediates[reg->index];
4602
4603 case PROGRAM_INPUT:
4604 /* GLSL inputs are 64-bit containers, so we have to
4605 * map back to the original index and add the offset after
4606 * mapping. */
4607 index -= double_reg2;
4608 assert(t->inputMapping[index] < ARRAY_SIZE(t->inputs));
4609 return t->inputs[t->inputMapping[index] + double_reg2];
4610
4611 case PROGRAM_OUTPUT:
4612 assert(t->outputMapping[reg->index] < ARRAY_SIZE(t->outputs));
4613 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4614
4615 case PROGRAM_ADDRESS:
4616 return ureg_src(t->address[reg->index]);
4617
4618 case PROGRAM_SYSTEM_VALUE:
4619 assert(reg->index < (int) ARRAY_SIZE(t->systemValues));
4620 return t->systemValues[reg->index];
4621
4622 default:
4623 assert(!"unknown src register file");
4624 return ureg_src_undef();
4625 }
4626 }
4627
4628 /**
4629 * Create a TGSI ureg_dst register from an st_dst_reg.
4630 */
4631 static struct ureg_dst
4632 translate_dst(struct st_translate *t,
4633 const st_dst_reg *dst_reg,
4634 bool saturate, bool clamp_color)
4635 {
4636 struct ureg_dst dst = dst_register(t,
4637 dst_reg->file,
4638 dst_reg->index);
4639
4640 if (dst.File == TGSI_FILE_NULL)
4641 return dst;
4642
4643 dst = ureg_writemask(dst, dst_reg->writemask);
4644
4645 if (saturate)
4646 dst = ureg_saturate(dst);
4647 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4648 /* Clamp colors for ARB_color_buffer_float. */
4649 switch (t->procType) {
4650 case TGSI_PROCESSOR_VERTEX:
4651 /* This can only occur with a compatibility profile, which doesn't
4652 * support geometry shaders. */
4653 if (dst_reg->index == VARYING_SLOT_COL0 ||
4654 dst_reg->index == VARYING_SLOT_COL1 ||
4655 dst_reg->index == VARYING_SLOT_BFC0 ||
4656 dst_reg->index == VARYING_SLOT_BFC1) {
4657 dst = ureg_saturate(dst);
4658 }
4659 break;
4660
4661 case TGSI_PROCESSOR_FRAGMENT:
4662 if (dst_reg->index == FRAG_RESULT_COLOR ||
4663 dst_reg->index >= FRAG_RESULT_DATA0) {
4664 dst = ureg_saturate(dst);
4665 }
4666 break;
4667 }
4668 }
4669
4670 if (dst_reg->reladdr != NULL) {
4671 assert(dst_reg->file != PROGRAM_TEMPORARY);
4672 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4673 }
4674
4675 return dst;
4676 }
4677
4678 /**
4679 * Create a TGSI ureg_src register from an st_src_reg.
4680 */
4681 static struct ureg_src
4682 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4683 {
4684 struct ureg_src src = src_register(t, src_reg);
4685
4686 if (src_reg->has_index2) {
4687 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4688 * and UBO constant buffers (buffer, position).
4689 */
4690 if (src_reg->reladdr2)
4691 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4692 src_reg->index2D);
4693 else
4694 src = ureg_src_dimension(src, src_reg->index2D);
4695 }
4696
4697 src = ureg_swizzle(src,
4698 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4699 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4700 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4701 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4702
4703 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4704 src = ureg_negate(src);
4705
4706 if (src_reg->reladdr != NULL) {
4707 assert(src_reg->file != PROGRAM_TEMPORARY);
4708 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4709 }
4710
4711 return src;
4712 }
4713
4714 static struct tgsi_texture_offset
4715 translate_tex_offset(struct st_translate *t,
4716 const st_src_reg *in_offset, int idx)
4717 {
4718 struct tgsi_texture_offset offset;
4719 struct ureg_src imm_src;
4720 struct ureg_dst dst;
4721 int array;
4722
4723 switch (in_offset->file) {
4724 case PROGRAM_IMMEDIATE:
4725 assert(in_offset->index >= 0 && in_offset->index < t->num_immediates);
4726 imm_src = t->immediates[in_offset->index];
4727
4728 offset.File = imm_src.File;
4729 offset.Index = imm_src.Index;
4730 offset.SwizzleX = imm_src.SwizzleX;
4731 offset.SwizzleY = imm_src.SwizzleY;
4732 offset.SwizzleZ = imm_src.SwizzleZ;
4733 offset.Padding = 0;
4734 break;
4735 case PROGRAM_TEMPORARY:
4736 imm_src = ureg_src(t->temps[in_offset->index]);
4737 offset.File = imm_src.File;
4738 offset.Index = imm_src.Index;
4739 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4740 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4741 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4742 offset.Padding = 0;
4743 break;
4744 case PROGRAM_ARRAY:
4745 array = in_offset->index >> 16;
4746
4747 assert(array >= 0);
4748 assert(array < (int)t->num_temp_arrays);
4749
4750 dst = t->arrays[array];
4751 offset.File = dst.File;
4752 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4753 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4754 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4755 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4756 offset.Padding = 0;
4757 break;
4758 default:
4759 break;
4760 }
4761 return offset;
4762 }
4763
4764 static void
4765 compile_tgsi_instruction(struct st_translate *t,
4766 const glsl_to_tgsi_instruction *inst,
4767 bool clamp_dst_color_output)
4768 {
4769 struct ureg_program *ureg = t->ureg;
4770 GLuint i;
4771 struct ureg_dst dst[2];
4772 struct ureg_src src[4];
4773 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4774
4775 unsigned num_dst;
4776 unsigned num_src;
4777 unsigned tex_target;
4778
4779 num_dst = num_inst_dst_regs(inst->op);
4780 num_src = num_inst_src_regs(inst->op);
4781
4782 for (i = 0; i < num_dst; i++)
4783 dst[i] = translate_dst(t,
4784 &inst->dst[i],
4785 inst->saturate,
4786 clamp_dst_color_output);
4787
4788 for (i = 0; i < num_src; i++)
4789 src[i] = translate_src(t, &inst->src[i]);
4790
4791 switch(inst->op) {
4792 case TGSI_OPCODE_BGNLOOP:
4793 case TGSI_OPCODE_CAL:
4794 case TGSI_OPCODE_ELSE:
4795 case TGSI_OPCODE_ENDLOOP:
4796 case TGSI_OPCODE_IF:
4797 case TGSI_OPCODE_UIF:
4798 assert(num_dst == 0);
4799 ureg_label_insn(ureg,
4800 inst->op,
4801 src, num_src,
4802 get_label(t,
4803 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4804 return;
4805
4806 case TGSI_OPCODE_TEX:
4807 case TGSI_OPCODE_TXB:
4808 case TGSI_OPCODE_TXD:
4809 case TGSI_OPCODE_TXL:
4810 case TGSI_OPCODE_TXP:
4811 case TGSI_OPCODE_TXQ:
4812 case TGSI_OPCODE_TXF:
4813 case TGSI_OPCODE_TEX2:
4814 case TGSI_OPCODE_TXB2:
4815 case TGSI_OPCODE_TXL2:
4816 case TGSI_OPCODE_TG4:
4817 case TGSI_OPCODE_LODQ:
4818 src[num_src] = t->samplers[inst->sampler.index];
4819 assert(src[num_src].File != TGSI_FILE_NULL);
4820 if (inst->sampler.reladdr)
4821 src[num_src] =
4822 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4823 num_src++;
4824 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4825 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4826 }
4827 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4828
4829 ureg_tex_insn(ureg,
4830 inst->op,
4831 dst, num_dst,
4832 tex_target,
4833 texoffsets, inst->tex_offset_num_offset,
4834 src, num_src);
4835 return;
4836
4837 case TGSI_OPCODE_SCS:
4838 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4839 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4840 break;
4841
4842 default:
4843 ureg_insn(ureg,
4844 inst->op,
4845 dst, num_dst,
4846 src, num_src);
4847 break;
4848 }
4849 }
4850
4851 /**
4852 * Emit the TGSI instructions for inverting and adjusting WPOS.
4853 * This code is unavoidable because it also depends on whether
4854 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4855 */
4856 static void
4857 emit_wpos_adjustment( struct st_translate *t,
4858 int wpos_transform_const,
4859 boolean invert,
4860 GLfloat adjX, GLfloat adjY[2])
4861 {
4862 struct ureg_program *ureg = t->ureg;
4863
4864 assert(wpos_transform_const >= 0);
4865
4866 /* Fragment program uses fragment position input.
4867 * Need to replace instances of INPUT[WPOS] with temp T
4868 * where T = INPUT[WPOS] is inverted by Y.
4869 */
4870 struct ureg_src wpostrans = ureg_DECL_constant(ureg, wpos_transform_const);
4871 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4872 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4873
4874 /* First, apply the coordinate shift: */
4875 if (adjX || adjY[0] || adjY[1]) {
4876 if (adjY[0] != adjY[1]) {
4877 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4878 * depending on whether inversion is actually going to be applied
4879 * or not, which is determined by testing against the inversion
4880 * state variable used below, which will be either +1 or -1.
4881 */
4882 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4883
4884 ureg_CMP(ureg, adj_temp,
4885 ureg_scalar(wpostrans, invert ? 2 : 0),
4886 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4887 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4888 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4889 } else {
4890 ureg_ADD(ureg, wpos_temp, wpos_input,
4891 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4892 }
4893 wpos_input = ureg_src(wpos_temp);
4894 } else {
4895 /* MOV wpos_temp, input[wpos]
4896 */
4897 ureg_MOV( ureg, wpos_temp, wpos_input );
4898 }
4899
4900 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4901 * inversion/identity, or the other way around if we're drawing to an FBO.
4902 */
4903 if (invert) {
4904 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4905 */
4906 ureg_MAD( ureg,
4907 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4908 wpos_input,
4909 ureg_scalar(wpostrans, 0),
4910 ureg_scalar(wpostrans, 1));
4911 } else {
4912 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4913 */
4914 ureg_MAD( ureg,
4915 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4916 wpos_input,
4917 ureg_scalar(wpostrans, 2),
4918 ureg_scalar(wpostrans, 3));
4919 }
4920
4921 /* Use wpos_temp as position input from here on:
4922 */
4923 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4924 }
4925
4926
4927 /**
4928 * Emit fragment position/ooordinate code.
4929 */
4930 static void
4931 emit_wpos(struct st_context *st,
4932 struct st_translate *t,
4933 const struct gl_program *program,
4934 struct ureg_program *ureg,
4935 int wpos_transform_const)
4936 {
4937 const struct gl_fragment_program *fp =
4938 (const struct gl_fragment_program *) program;
4939 struct pipe_screen *pscreen = st->pipe->screen;
4940 GLfloat adjX = 0.0f;
4941 GLfloat adjY[2] = { 0.0f, 0.0f };
4942 boolean invert = FALSE;
4943
4944 /* Query the pixel center conventions supported by the pipe driver and set
4945 * adjX, adjY to help out if it cannot handle the requested one internally.
4946 *
4947 * The bias of the y-coordinate depends on whether y-inversion takes place
4948 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4949 * drawing to an FBO (causes additional inversion), and whether the the pipe
4950 * driver origin and the requested origin differ (the latter condition is
4951 * stored in the 'invert' variable).
4952 *
4953 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4954 *
4955 * center shift only:
4956 * i -> h: +0.5
4957 * h -> i: -0.5
4958 *
4959 * inversion only:
4960 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4961 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4962 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4963 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4964 *
4965 * inversion and center shift:
4966 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4967 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4968 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4969 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4970 */
4971 if (fp->OriginUpperLeft) {
4972 /* Fragment shader wants origin in upper-left */
4973 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4974 /* the driver supports upper-left origin */
4975 }
4976 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4977 /* the driver supports lower-left origin, need to invert Y */
4978 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4979 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4980 invert = TRUE;
4981 }
4982 else
4983 assert(0);
4984 }
4985 else {
4986 /* Fragment shader wants origin in lower-left */
4987 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4988 /* the driver supports lower-left origin */
4989 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4990 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4991 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4992 /* the driver supports upper-left origin, need to invert Y */
4993 invert = TRUE;
4994 else
4995 assert(0);
4996 }
4997
4998 if (fp->PixelCenterInteger) {
4999 /* Fragment shader wants pixel center integer */
5000 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
5001 /* the driver supports pixel center integer */
5002 adjY[1] = 1.0f;
5003 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
5004 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
5005 }
5006 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
5007 /* the driver supports pixel center half integer, need to bias X,Y */
5008 adjX = -0.5f;
5009 adjY[0] = -0.5f;
5010 adjY[1] = 0.5f;
5011 }
5012 else
5013 assert(0);
5014 }
5015 else {
5016 /* Fragment shader wants pixel center half integer */
5017 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
5018 /* the driver supports pixel center half integer */
5019 }
5020 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
5021 /* the driver supports pixel center integer, need to bias X,Y */
5022 adjX = adjY[0] = adjY[1] = 0.5f;
5023 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
5024 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
5025 }
5026 else
5027 assert(0);
5028 }
5029
5030 /* we invert after adjustment so that we avoid the MOV to temporary,
5031 * and reuse the adjustment ADD instead */
5032 emit_wpos_adjustment(t, wpos_transform_const, invert, adjX, adjY);
5033 }
5034
5035 /**
5036 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
5037 * TGSI uses +1 for front, -1 for back.
5038 * This function converts the TGSI value to the GL value. Simply clamping/
5039 * saturating the value to [0,1] does the job.
5040 */
5041 static void
5042 emit_face_var(struct gl_context *ctx, struct st_translate *t)
5043 {
5044 struct ureg_program *ureg = t->ureg;
5045 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
5046 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
5047
5048 if (ctx->Const.NativeIntegers) {
5049 ureg_FSGE(ureg, face_temp, face_input, ureg_imm1f(ureg, 0));
5050 }
5051 else {
5052 /* MOV_SAT face_temp, input[face] */
5053 ureg_MOV(ureg, ureg_saturate(face_temp), face_input);
5054 }
5055
5056 /* Use face_temp as face input from here on: */
5057 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
5058 }
5059
5060 static void
5061 emit_edgeflags(struct st_translate *t)
5062 {
5063 struct ureg_program *ureg = t->ureg;
5064 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
5065 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
5066
5067 ureg_MOV(ureg, edge_dst, edge_src);
5068 }
5069
5070 /**
5071 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
5072 * \param program the program to translate
5073 * \param numInputs number of input registers used
5074 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
5075 * input indexes
5076 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
5077 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
5078 * each input
5079 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
5080 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
5081 * \param numOutputs number of output registers used
5082 * \param outputMapping maps Mesa fragment program outputs to TGSI
5083 * generic outputs
5084 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
5085 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
5086 * each output
5087 *
5088 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
5089 */
5090 extern "C" enum pipe_error
5091 st_translate_program(
5092 struct gl_context *ctx,
5093 uint procType,
5094 struct ureg_program *ureg,
5095 glsl_to_tgsi_visitor *program,
5096 const struct gl_program *proginfo,
5097 GLuint numInputs,
5098 const GLuint inputMapping[],
5099 const ubyte inputSemanticName[],
5100 const ubyte inputSemanticIndex[],
5101 const GLuint interpMode[],
5102 const GLuint interpLocation[],
5103 GLuint numOutputs,
5104 const GLuint outputMapping[],
5105 const ubyte outputSemanticName[],
5106 const ubyte outputSemanticIndex[],
5107 boolean passthrough_edgeflags,
5108 boolean clamp_color)
5109 {
5110 struct st_translate *t;
5111 unsigned i;
5112 enum pipe_error ret = PIPE_OK;
5113
5114 assert(numInputs <= ARRAY_SIZE(t->inputs));
5115 assert(numOutputs <= ARRAY_SIZE(t->outputs));
5116
5117 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
5118 TGSI_SEMANTIC_FACE);
5119 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
5120 TGSI_SEMANTIC_VERTEXID);
5121 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
5122 TGSI_SEMANTIC_INSTANCEID);
5123 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
5124 TGSI_SEMANTIC_SAMPLEID);
5125 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
5126 TGSI_SEMANTIC_SAMPLEPOS);
5127 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
5128 TGSI_SEMANTIC_SAMPLEMASK);
5129 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
5130 TGSI_SEMANTIC_INVOCATIONID);
5131 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID_ZERO_BASE] ==
5132 TGSI_SEMANTIC_VERTEXID_NOBASE);
5133 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_BASE_VERTEX] ==
5134 TGSI_SEMANTIC_BASEVERTEX);
5135
5136 t = CALLOC_STRUCT(st_translate);
5137 if (!t) {
5138 ret = PIPE_ERROR_OUT_OF_MEMORY;
5139 goto out;
5140 }
5141
5142 t->procType = procType;
5143 t->inputMapping = inputMapping;
5144 t->outputMapping = outputMapping;
5145 t->ureg = ureg;
5146 t->num_temp_arrays = program->next_array;
5147 if (t->num_temp_arrays)
5148 t->arrays = (struct ureg_dst*)
5149 calloc(1, sizeof(t->arrays[0]) * t->num_temp_arrays);
5150
5151 /*
5152 * Declare input attributes.
5153 */
5154 if (procType == TGSI_PROCESSOR_FRAGMENT) {
5155 for (i = 0; i < numInputs; i++) {
5156 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
5157 inputSemanticName[i],
5158 inputSemanticIndex[i],
5159 interpMode[i], 0,
5160 interpLocation[i], 0, 1);
5161 }
5162
5163 if (proginfo->InputsRead & VARYING_BIT_POS) {
5164 /* Must do this after setting up t->inputs. */
5165 emit_wpos(st_context(ctx), t, proginfo, ureg,
5166 program->wpos_transform_const);
5167 }
5168
5169 if (proginfo->InputsRead & VARYING_BIT_FACE)
5170 emit_face_var(ctx, t);
5171
5172 /*
5173 * Declare output attributes.
5174 */
5175 for (i = 0; i < numOutputs; i++) {
5176 switch (outputSemanticName[i]) {
5177 case TGSI_SEMANTIC_POSITION:
5178 t->outputs[i] = ureg_DECL_output(ureg,
5179 TGSI_SEMANTIC_POSITION, /* Z/Depth */
5180 outputSemanticIndex[i]);
5181 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
5182 break;
5183 case TGSI_SEMANTIC_STENCIL:
5184 t->outputs[i] = ureg_DECL_output(ureg,
5185 TGSI_SEMANTIC_STENCIL, /* Stencil */
5186 outputSemanticIndex[i]);
5187 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
5188 break;
5189 case TGSI_SEMANTIC_COLOR:
5190 t->outputs[i] = ureg_DECL_output(ureg,
5191 TGSI_SEMANTIC_COLOR,
5192 outputSemanticIndex[i]);
5193 break;
5194 case TGSI_SEMANTIC_SAMPLEMASK:
5195 t->outputs[i] = ureg_DECL_output(ureg,
5196 TGSI_SEMANTIC_SAMPLEMASK,
5197 outputSemanticIndex[i]);
5198 /* TODO: If we ever support more than 32 samples, this will have
5199 * to become an array.
5200 */
5201 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5202 break;
5203 default:
5204 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
5205 ret = PIPE_ERROR_BAD_INPUT;
5206 goto out;
5207 }
5208 }
5209 }
5210 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
5211 for (i = 0; i < numInputs; i++) {
5212 t->inputs[i] = ureg_DECL_input(ureg,
5213 inputSemanticName[i],
5214 inputSemanticIndex[i], 0, 1);
5215 }
5216
5217 for (i = 0; i < numOutputs; i++) {
5218 t->outputs[i] = ureg_DECL_output(ureg,
5219 outputSemanticName[i],
5220 outputSemanticIndex[i]);
5221 }
5222 }
5223 else {
5224 assert(procType == TGSI_PROCESSOR_VERTEX);
5225
5226 for (i = 0; i < numInputs; i++) {
5227 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
5228 }
5229
5230 for (i = 0; i < numOutputs; i++) {
5231 t->outputs[i] = ureg_DECL_output(ureg,
5232 outputSemanticName[i],
5233 outputSemanticIndex[i]);
5234 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
5235 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5236 ureg_MOV(ureg,
5237 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
5238 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
5239 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5240 }
5241 }
5242 if (passthrough_edgeflags)
5243 emit_edgeflags(t);
5244 }
5245
5246 /* Declare address register.
5247 */
5248 if (program->num_address_regs > 0) {
5249 assert(program->num_address_regs <= 3);
5250 for (int i = 0; i < program->num_address_regs; i++)
5251 t->address[i] = ureg_DECL_address(ureg);
5252 }
5253
5254 /* Declare misc input registers
5255 */
5256 {
5257 GLbitfield sysInputs = proginfo->SystemValuesRead;
5258 unsigned numSys = 0;
5259 for (i = 0; sysInputs; i++) {
5260 if (sysInputs & (1 << i)) {
5261 unsigned semName = _mesa_sysval_to_semantic[i];
5262 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5263 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5264 semName == TGSI_SEMANTIC_VERTEXID) {
5265 /* From Gallium perspective, these system values are always
5266 * integer, and require native integer support. However, if
5267 * native integer is supported on the vertex stage but not the
5268 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5269 * assumes these system values are floats. To resolve the
5270 * inconsistency, we insert a U2F.
5271 */
5272 struct st_context *st = st_context(ctx);
5273 struct pipe_screen *pscreen = st->pipe->screen;
5274 assert(procType == TGSI_PROCESSOR_VERTEX);
5275 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5276 if (!ctx->Const.NativeIntegers) {
5277 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5278 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5279 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5280 }
5281 }
5282 numSys++;
5283 sysInputs &= ~(1 << i);
5284 }
5285 }
5286 }
5287
5288 t->array_sizes = program->array_sizes;
5289
5290 /* Emit constants and uniforms. TGSI uses a single index space for these,
5291 * so we put all the translated regs in t->constants.
5292 */
5293 if (proginfo->Parameters) {
5294 t->constants = (struct ureg_src *)
5295 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5296 if (t->constants == NULL) {
5297 ret = PIPE_ERROR_OUT_OF_MEMORY;
5298 goto out;
5299 }
5300 t->num_constants = proginfo->Parameters->NumParameters;
5301
5302 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5303 switch (proginfo->Parameters->Parameters[i].Type) {
5304 case PROGRAM_STATE_VAR:
5305 case PROGRAM_UNIFORM:
5306 t->constants[i] = ureg_DECL_constant(ureg, i);
5307 break;
5308
5309 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5310 * addressing of the const buffer.
5311 * FIXME: Be smarter and recognize param arrays:
5312 * indirect addressing is only valid within the referenced
5313 * array.
5314 */
5315 case PROGRAM_CONSTANT:
5316 if (program->indirect_addr_consts)
5317 t->constants[i] = ureg_DECL_constant(ureg, i);
5318 else
5319 t->constants[i] = emit_immediate(t,
5320 proginfo->Parameters->ParameterValues[i],
5321 proginfo->Parameters->Parameters[i].DataType,
5322 4);
5323 break;
5324 default:
5325 break;
5326 }
5327 }
5328 }
5329
5330 if (program->shader) {
5331 unsigned num_ubos = program->shader->NumUniformBlocks;
5332
5333 for (i = 0; i < num_ubos; i++) {
5334 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5335 unsigned num_const_vecs = (size + 15) / 16;
5336 unsigned first, last;
5337 assert(num_const_vecs > 0);
5338 first = 0;
5339 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5340 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5341 }
5342 }
5343
5344 /* Emit immediate values.
5345 */
5346 t->immediates = (struct ureg_src *)
5347 calloc(program->num_immediates, sizeof(struct ureg_src));
5348 if (t->immediates == NULL) {
5349 ret = PIPE_ERROR_OUT_OF_MEMORY;
5350 goto out;
5351 }
5352 t->num_immediates = program->num_immediates;
5353
5354 i = 0;
5355 foreach_in_list(immediate_storage, imm, &program->immediates) {
5356 assert(i < program->num_immediates);
5357 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size32);
5358 }
5359 assert(i == program->num_immediates);
5360
5361 /* texture samplers */
5362 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5363 if (program->samplers_used & (1 << i)) {
5364 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5365 }
5366 }
5367
5368 /* Emit each instruction in turn:
5369 */
5370 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5371 set_insn_start(t, ureg_get_instruction_number(ureg));
5372 compile_tgsi_instruction(t, inst, clamp_color);
5373 }
5374
5375 /* Fix up all emitted labels:
5376 */
5377 for (i = 0; i < t->labels_count; i++) {
5378 ureg_fixup_label(ureg, t->labels[i].token,
5379 t->insn[t->labels[i].branch_target]);
5380 }
5381
5382 out:
5383 if (t) {
5384 free(t->arrays);
5385 free(t->temps);
5386 free(t->insn);
5387 free(t->labels);
5388 free(t->constants);
5389 t->num_constants = 0;
5390 free(t->immediates);
5391 t->num_immediates = 0;
5392
5393 if (t->error) {
5394 debug_printf("%s: translate error flag set\n", __func__);
5395 }
5396
5397 FREE(t);
5398 }
5399
5400 return ret;
5401 }
5402 /* ----------------------------- End TGSI code ------------------------------ */
5403
5404
5405 static unsigned
5406 shader_stage_to_ptarget(gl_shader_stage stage)
5407 {
5408 switch (stage) {
5409 case MESA_SHADER_VERTEX:
5410 return PIPE_SHADER_VERTEX;
5411 case MESA_SHADER_FRAGMENT:
5412 return PIPE_SHADER_FRAGMENT;
5413 case MESA_SHADER_GEOMETRY:
5414 return PIPE_SHADER_GEOMETRY;
5415 case MESA_SHADER_COMPUTE:
5416 return PIPE_SHADER_COMPUTE;
5417 }
5418
5419 assert(!"should not be reached");
5420 return PIPE_SHADER_VERTEX;
5421 }
5422
5423
5424 /**
5425 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5426 * generating Mesa IR.
5427 */
5428 static struct gl_program *
5429 get_mesa_program(struct gl_context *ctx,
5430 struct gl_shader_program *shader_program,
5431 struct gl_shader *shader)
5432 {
5433 glsl_to_tgsi_visitor* v;
5434 struct gl_program *prog;
5435 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5436 bool progress;
5437 struct gl_shader_compiler_options *options =
5438 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5439 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5440 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5441
5442 validate_ir_tree(shader->ir);
5443
5444 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5445 if (!prog)
5446 return NULL;
5447 prog->Parameters = _mesa_new_parameter_list();
5448 v = new glsl_to_tgsi_visitor();
5449 v->ctx = ctx;
5450 v->prog = prog;
5451 v->shader_program = shader_program;
5452 v->shader = shader;
5453 v->options = options;
5454 v->glsl_version = ctx->Const.GLSLVersion;
5455 v->native_integers = ctx->Const.NativeIntegers;
5456
5457 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5458 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5459 v->have_fma = pscreen->get_shader_param(pscreen, ptarget,
5460 PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED);
5461
5462 _mesa_copy_linked_program_data(shader->Stage, shader_program, prog);
5463 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5464 prog->Parameters);
5465
5466 /* Remove reads from output registers. */
5467 lower_output_reads(shader->ir);
5468
5469 /* Emit intermediate IR for main(). */
5470 visit_exec_list(shader->ir, v);
5471
5472 /* Now emit bodies for any functions that were used. */
5473 do {
5474 progress = GL_FALSE;
5475
5476 foreach_in_list(function_entry, entry, &v->function_signatures) {
5477 if (!entry->bgn_inst) {
5478 v->current_function = entry;
5479
5480 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5481 entry->bgn_inst->function = entry;
5482
5483 visit_exec_list(&entry->sig->body, v);
5484
5485 glsl_to_tgsi_instruction *last;
5486 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5487 if (last->op != TGSI_OPCODE_RET)
5488 v->emit(NULL, TGSI_OPCODE_RET);
5489
5490 glsl_to_tgsi_instruction *end;
5491 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5492 end->function = entry;
5493
5494 progress = GL_TRUE;
5495 }
5496 }
5497 } while (progress);
5498
5499 #if 0
5500 /* Print out some information (for debugging purposes) used by the
5501 * optimization passes. */
5502 for (i = 0; i < v->next_temp; i++) {
5503 int fr = v->get_first_temp_read(i);
5504 int fw = v->get_first_temp_write(i);
5505 int lr = v->get_last_temp_read(i);
5506 int lw = v->get_last_temp_write(i);
5507
5508 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5509 assert(fw <= fr);
5510 }
5511 #endif
5512
5513 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5514 v->simplify_cmp();
5515 v->copy_propagate();
5516 while (v->eliminate_dead_code());
5517
5518 v->merge_two_dsts();
5519 v->merge_registers();
5520 v->renumber_registers();
5521
5522 /* Write the END instruction. */
5523 v->emit(NULL, TGSI_OPCODE_END);
5524
5525 if (ctx->_Shader->Flags & GLSL_DUMP) {
5526 _mesa_log("\n");
5527 _mesa_log("GLSL IR for linked %s program %d:\n",
5528 _mesa_shader_stage_to_string(shader->Stage),
5529 shader_program->Name);
5530 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
5531 _mesa_log("\n\n");
5532 }
5533
5534 prog->Instructions = NULL;
5535 prog->NumInstructions = 0;
5536
5537 do_set_program_inouts(shader->ir, prog, shader->Stage);
5538 count_resources(v, prog);
5539
5540 /* This must be done before the uniform storage is associated. */
5541 if (shader->Type == GL_FRAGMENT_SHADER &&
5542 prog->InputsRead & VARYING_BIT_POS){
5543 static const gl_state_index wposTransformState[STATE_LENGTH] = {
5544 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
5545 };
5546
5547 v->wpos_transform_const = _mesa_add_state_reference(prog->Parameters,
5548 wposTransformState);
5549 }
5550
5551 _mesa_reference_program(ctx, &shader->Program, prog);
5552
5553 /* This has to be done last. Any operation the can cause
5554 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5555 * program constant) has to happen before creating this linkage.
5556 */
5557 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5558 if (!shader_program->LinkStatus) {
5559 free_glsl_to_tgsi_visitor(v);
5560 return NULL;
5561 }
5562
5563 struct st_vertex_program *stvp;
5564 struct st_fragment_program *stfp;
5565 struct st_geometry_program *stgp;
5566
5567 switch (shader->Type) {
5568 case GL_VERTEX_SHADER:
5569 stvp = (struct st_vertex_program *)prog;
5570 stvp->glsl_to_tgsi = v;
5571 break;
5572 case GL_FRAGMENT_SHADER:
5573 stfp = (struct st_fragment_program *)prog;
5574 stfp->glsl_to_tgsi = v;
5575 break;
5576 case GL_GEOMETRY_SHADER:
5577 stgp = (struct st_geometry_program *)prog;
5578 stgp->glsl_to_tgsi = v;
5579 break;
5580 default:
5581 assert(!"should not be reached");
5582 return NULL;
5583 }
5584
5585 return prog;
5586 }
5587
5588 extern "C" {
5589
5590 /**
5591 * Link a shader.
5592 * Called via ctx->Driver.LinkShader()
5593 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5594 * with code lowering and other optimizations.
5595 */
5596 GLboolean
5597 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5598 {
5599 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5600 assert(prog->LinkStatus);
5601
5602 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5603 if (prog->_LinkedShaders[i] == NULL)
5604 continue;
5605
5606 bool progress;
5607 exec_list *ir = prog->_LinkedShaders[i]->ir;
5608 gl_shader_stage stage = _mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type);
5609 const struct gl_shader_compiler_options *options =
5610 &ctx->Const.ShaderCompilerOptions[stage];
5611 unsigned ptarget = shader_stage_to_ptarget(stage);
5612 bool have_dround = pscreen->get_shader_param(pscreen, ptarget,
5613 PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED);
5614 bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget,
5615 PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED);
5616
5617 /* If there are forms of indirect addressing that the driver
5618 * cannot handle, perform the lowering pass.
5619 */
5620 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5621 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5622 lower_variable_index_to_cond_assign(ir,
5623 options->EmitNoIndirectInput,
5624 options->EmitNoIndirectOutput,
5625 options->EmitNoIndirectTemp,
5626 options->EmitNoIndirectUniform);
5627 }
5628
5629 if (ctx->Extensions.ARB_shading_language_packing) {
5630 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5631 LOWER_UNPACK_SNORM_2x16 |
5632 LOWER_PACK_UNORM_2x16 |
5633 LOWER_UNPACK_UNORM_2x16 |
5634 LOWER_PACK_SNORM_4x8 |
5635 LOWER_UNPACK_SNORM_4x8 |
5636 LOWER_UNPACK_UNORM_4x8 |
5637 LOWER_PACK_UNORM_4x8 |
5638 LOWER_PACK_HALF_2x16 |
5639 LOWER_UNPACK_HALF_2x16;
5640
5641 lower_packing_builtins(ir, lower_inst);
5642 }
5643
5644 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5645 lower_offset_arrays(ir);
5646 do_mat_op_to_vec(ir);
5647 lower_instructions(ir,
5648 MOD_TO_FLOOR |
5649 DIV_TO_MUL_RCP |
5650 EXP_TO_EXP2 |
5651 LOG_TO_LOG2 |
5652 LDEXP_TO_ARITH |
5653 (have_dfrexp ? 0 : DFREXP_DLDEXP_TO_ARITH) |
5654 CARRY_TO_ARITH |
5655 BORROW_TO_ARITH |
5656 (have_dround ? 0 : DOPS_TO_DFRAC) |
5657 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5658 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) |
5659 (options->EmitNoSat ? SAT_TO_CLAMP : 0));
5660
5661 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5662 do_vec_index_to_cond_assign(ir);
5663 lower_vector_insert(ir, true);
5664 lower_quadop_vector(ir, false);
5665 lower_noise(ir);
5666 if (options->MaxIfDepth == 0) {
5667 lower_discard(ir);
5668 }
5669
5670 do {
5671 progress = false;
5672
5673 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5674
5675 progress = do_common_optimization(ir, true, true, options,
5676 ctx->Const.NativeIntegers)
5677 || progress;
5678
5679 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5680
5681 } while (progress);
5682
5683 validate_ir_tree(ir);
5684 }
5685
5686 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5687 struct gl_program *linked_prog;
5688
5689 if (prog->_LinkedShaders[i] == NULL)
5690 continue;
5691
5692 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5693
5694 if (linked_prog) {
5695 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5696 linked_prog);
5697 if (!ctx->Driver.ProgramStringNotify(ctx,
5698 _mesa_shader_stage_to_program(i),
5699 linked_prog)) {
5700 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5701 NULL);
5702 _mesa_reference_program(ctx, &linked_prog, NULL);
5703 return GL_FALSE;
5704 }
5705 }
5706
5707 _mesa_reference_program(ctx, &linked_prog, NULL);
5708 }
5709
5710 return GL_TRUE;
5711 }
5712
5713 void
5714 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5715 const GLuint outputMapping[],
5716 struct pipe_stream_output_info *so)
5717 {
5718 unsigned i;
5719 struct gl_transform_feedback_info *info =
5720 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5721
5722 for (i = 0; i < info->NumOutputs; i++) {
5723 so->output[i].register_index =
5724 outputMapping[info->Outputs[i].OutputRegister];
5725 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5726 so->output[i].num_components = info->Outputs[i].NumComponents;
5727 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5728 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5729 so->output[i].stream = info->Outputs[i].StreamId;
5730 }
5731
5732 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5733 so->stride[i] = info->BufferStride[i];
5734 }
5735 so->num_outputs = info->NumOutputs;
5736 }
5737
5738 } /* extern "C" */