st/glsl_to_tgsi: convert dst to an array
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "main/shaderapi.h"
48 #include "program/hash_table.h"
49 #include "program/prog_instruction.h"
50 #include "program/prog_optimize.h"
51 #include "program/prog_print.h"
52 #include "program/program.h"
53 #include "program/prog_parameter.h"
54 #include "program/sampler.h"
55
56 #include "pipe/p_compiler.h"
57 #include "pipe/p_context.h"
58 #include "pipe/p_screen.h"
59 #include "pipe/p_shader_tokens.h"
60 #include "pipe/p_state.h"
61 #include "util/u_math.h"
62 #include "tgsi/tgsi_ureg.h"
63 #include "tgsi/tgsi_info.h"
64 #include "st_context.h"
65 #include "st_program.h"
66 #include "st_glsl_to_tgsi.h"
67 #include "st_mesa_to_tgsi.h"
68
69
70 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
71 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
72 (1 << PROGRAM_CONSTANT) | \
73 (1 << PROGRAM_UNIFORM))
74
75 /**
76 * Maximum number of arrays
77 */
78 #define MAX_ARRAYS 256
79
80 #define MAX_GLSL_TEXTURE_OFFSET 4
81
82 class st_src_reg;
83 class st_dst_reg;
84
85 static int swizzle_for_size(int size);
86
87 /**
88 * This struct is a corresponding struct to TGSI ureg_src.
89 */
90 class st_src_reg {
91 public:
92 st_src_reg(gl_register_file file, int index, const glsl_type *type)
93 {
94 this->file = file;
95 this->index = index;
96 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
97 this->swizzle = swizzle_for_size(type->vector_elements);
98 else
99 this->swizzle = SWIZZLE_XYZW;
100 this->negate = 0;
101 this->index2D = 0;
102 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
103 this->reladdr = NULL;
104 this->reladdr2 = NULL;
105 this->has_index2 = false;
106 }
107
108 st_src_reg(gl_register_file file, int index, int type)
109 {
110 this->type = type;
111 this->file = file;
112 this->index = index;
113 this->index2D = 0;
114 this->swizzle = SWIZZLE_XYZW;
115 this->negate = 0;
116 this->reladdr = NULL;
117 this->reladdr2 = NULL;
118 this->has_index2 = false;
119 }
120
121 st_src_reg(gl_register_file file, int index, int type, int index2D)
122 {
123 this->type = type;
124 this->file = file;
125 this->index = index;
126 this->index2D = index2D;
127 this->swizzle = SWIZZLE_XYZW;
128 this->negate = 0;
129 this->reladdr = NULL;
130 this->reladdr2 = NULL;
131 this->has_index2 = false;
132 }
133
134 st_src_reg()
135 {
136 this->type = GLSL_TYPE_ERROR;
137 this->file = PROGRAM_UNDEFINED;
138 this->index = 0;
139 this->index2D = 0;
140 this->swizzle = 0;
141 this->negate = 0;
142 this->reladdr = NULL;
143 this->reladdr2 = NULL;
144 this->has_index2 = false;
145 }
146
147 explicit st_src_reg(st_dst_reg reg);
148
149 gl_register_file file; /**< PROGRAM_* from Mesa */
150 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
151 int index2D;
152 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
153 int negate; /**< NEGATE_XYZW mask from mesa */
154 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
155 /** Register index should be offset by the integer in this reg. */
156 st_src_reg *reladdr;
157 st_src_reg *reladdr2;
158 bool has_index2;
159 };
160
161 class st_dst_reg {
162 public:
163 st_dst_reg(gl_register_file file, int writemask, int type, int index)
164 {
165 this->file = file;
166 this->index = index;
167 this->writemask = writemask;
168 this->cond_mask = COND_TR;
169 this->reladdr = NULL;
170 this->type = type;
171 }
172
173 st_dst_reg(gl_register_file file, int writemask, int type)
174 {
175 this->file = file;
176 this->index = 0;
177 this->writemask = writemask;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 this->type = type;
181 }
182
183 st_dst_reg()
184 {
185 this->type = GLSL_TYPE_ERROR;
186 this->file = PROGRAM_UNDEFINED;
187 this->index = 0;
188 this->writemask = 0;
189 this->cond_mask = COND_TR;
190 this->reladdr = NULL;
191 }
192
193 explicit st_dst_reg(st_src_reg reg);
194
195 gl_register_file file; /**< PROGRAM_* from Mesa */
196 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
197 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
198 GLuint cond_mask:4;
199 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
200 /** Register index should be offset by the integer in this reg. */
201 st_src_reg *reladdr;
202 };
203
204 st_src_reg::st_src_reg(st_dst_reg reg)
205 {
206 this->type = reg.type;
207 this->file = reg.file;
208 this->index = reg.index;
209 this->swizzle = SWIZZLE_XYZW;
210 this->negate = 0;
211 this->reladdr = reg.reladdr;
212 this->index2D = 0;
213 this->reladdr2 = NULL;
214 this->has_index2 = false;
215 }
216
217 st_dst_reg::st_dst_reg(st_src_reg reg)
218 {
219 this->type = reg.type;
220 this->file = reg.file;
221 this->index = reg.index;
222 this->writemask = WRITEMASK_XYZW;
223 this->cond_mask = COND_TR;
224 this->reladdr = reg.reladdr;
225 }
226
227 class glsl_to_tgsi_instruction : public exec_node {
228 public:
229 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
230
231 unsigned op;
232 st_dst_reg dst[1];
233 st_src_reg src[4];
234 /** Pointer to the ir source this tree came from for debugging */
235 ir_instruction *ir;
236 GLboolean cond_update;
237 bool saturate;
238 st_src_reg sampler; /**< sampler register */
239 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
240 int tex_target; /**< One of TEXTURE_*_INDEX */
241 GLboolean tex_shadow;
242
243 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
244 unsigned tex_offset_num_offset;
245 int dead_mask; /**< Used in dead code elimination */
246
247 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
248 };
249
250 class variable_storage : public exec_node {
251 public:
252 variable_storage(ir_variable *var, gl_register_file file, int index)
253 : file(file), index(index), var(var)
254 {
255 /* empty */
256 }
257
258 gl_register_file file;
259 int index;
260 ir_variable *var; /* variable that maps to this, if any */
261 };
262
263 class immediate_storage : public exec_node {
264 public:
265 immediate_storage(gl_constant_value *values, int size, int type)
266 {
267 memcpy(this->values, values, size * sizeof(gl_constant_value));
268 this->size = size;
269 this->type = type;
270 }
271
272 gl_constant_value values[4];
273 int size; /**< Number of components (1-4) */
274 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
275 };
276
277 class function_entry : public exec_node {
278 public:
279 ir_function_signature *sig;
280
281 /**
282 * identifier of this function signature used by the program.
283 *
284 * At the point that TGSI instructions for function calls are
285 * generated, we don't know the address of the first instruction of
286 * the function body. So we make the BranchTarget that is called a
287 * small integer and rewrite them during set_branchtargets().
288 */
289 int sig_id;
290
291 /**
292 * Pointer to first instruction of the function body.
293 *
294 * Set during function body emits after main() is processed.
295 */
296 glsl_to_tgsi_instruction *bgn_inst;
297
298 /**
299 * Index of the first instruction of the function body in actual TGSI.
300 *
301 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
302 */
303 int inst;
304
305 /** Storage for the return value. */
306 st_src_reg return_reg;
307 };
308
309 struct glsl_to_tgsi_visitor : public ir_visitor {
310 public:
311 glsl_to_tgsi_visitor();
312 ~glsl_to_tgsi_visitor();
313
314 function_entry *current_function;
315
316 struct gl_context *ctx;
317 struct gl_program *prog;
318 struct gl_shader_program *shader_program;
319 struct gl_shader *shader;
320 struct gl_shader_compiler_options *options;
321
322 int next_temp;
323
324 unsigned array_sizes[MAX_ARRAYS];
325 unsigned next_array;
326
327 int num_address_regs;
328 int samplers_used;
329 bool indirect_addr_consts;
330
331 int glsl_version;
332 bool native_integers;
333 bool have_sqrt;
334
335 variable_storage *find_variable_storage(ir_variable *var);
336
337 int add_constant(gl_register_file file, gl_constant_value values[4],
338 int size, int datatype, GLuint *swizzle_out);
339
340 function_entry *get_function_signature(ir_function_signature *sig);
341
342 st_src_reg get_temp(const glsl_type *type);
343 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
344
345 st_src_reg st_src_reg_for_float(float val);
346 st_src_reg st_src_reg_for_int(int val);
347 st_src_reg st_src_reg_for_type(int type, int val);
348
349 /**
350 * \name Visit methods
351 *
352 * As typical for the visitor pattern, there must be one \c visit method for
353 * each concrete subclass of \c ir_instruction. Virtual base classes within
354 * the hierarchy should not have \c visit methods.
355 */
356 /*@{*/
357 virtual void visit(ir_variable *);
358 virtual void visit(ir_loop *);
359 virtual void visit(ir_loop_jump *);
360 virtual void visit(ir_function_signature *);
361 virtual void visit(ir_function *);
362 virtual void visit(ir_expression *);
363 virtual void visit(ir_swizzle *);
364 virtual void visit(ir_dereference_variable *);
365 virtual void visit(ir_dereference_array *);
366 virtual void visit(ir_dereference_record *);
367 virtual void visit(ir_assignment *);
368 virtual void visit(ir_constant *);
369 virtual void visit(ir_call *);
370 virtual void visit(ir_return *);
371 virtual void visit(ir_discard *);
372 virtual void visit(ir_texture *);
373 virtual void visit(ir_if *);
374 virtual void visit(ir_emit_vertex *);
375 virtual void visit(ir_end_primitive *);
376 /*@}*/
377
378 st_src_reg result;
379
380 /** List of variable_storage */
381 exec_list variables;
382
383 /** List of immediate_storage */
384 exec_list immediates;
385 unsigned num_immediates;
386
387 /** List of function_entry */
388 exec_list function_signatures;
389 int next_signature_id;
390
391 /** List of glsl_to_tgsi_instruction */
392 exec_list instructions;
393
394 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
395
396 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
397 st_dst_reg dst, st_src_reg src0);
398
399 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
400 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
401
402 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
403 st_dst_reg dst,
404 st_src_reg src0, st_src_reg src1, st_src_reg src2);
405
406 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
407 st_dst_reg dst,
408 st_src_reg src0, st_src_reg src1,
409 st_src_reg src2, st_src_reg src3);
410
411 unsigned get_opcode(ir_instruction *ir, unsigned op,
412 st_dst_reg dst,
413 st_src_reg src0, st_src_reg src1);
414
415 /**
416 * Emit the correct dot-product instruction for the type of arguments
417 */
418 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
419 st_dst_reg dst,
420 st_src_reg src0,
421 st_src_reg src1,
422 unsigned elements);
423
424 void emit_scalar(ir_instruction *ir, unsigned op,
425 st_dst_reg dst, st_src_reg src0);
426
427 void emit_scalar(ir_instruction *ir, unsigned op,
428 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
429
430 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
431
432 void emit_scs(ir_instruction *ir, unsigned op,
433 st_dst_reg dst, const st_src_reg &src);
434
435 bool try_emit_mad(ir_expression *ir,
436 int mul_operand);
437 bool try_emit_mad_for_and_not(ir_expression *ir,
438 int mul_operand);
439
440 void emit_swz(ir_expression *ir);
441
442 bool process_move_condition(ir_rvalue *ir);
443
444 void simplify_cmp(void);
445
446 void rename_temp_register(int index, int new_index);
447 int get_first_temp_read(int index);
448 int get_first_temp_write(int index);
449 int get_last_temp_read(int index);
450 int get_last_temp_write(int index);
451
452 void copy_propagate(void);
453 int eliminate_dead_code(void);
454 void merge_registers(void);
455 void renumber_registers(void);
456
457 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
458 st_dst_reg *l, st_src_reg *r,
459 st_src_reg *cond, bool cond_swap);
460
461 void *mem_ctx;
462 };
463
464 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
465
466 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
467
468 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
469 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
470 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
471
472 static void
473 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
474
475 static void
476 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
477 {
478 va_list args;
479 va_start(args, fmt);
480 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
481 va_end(args);
482
483 prog->LinkStatus = GL_FALSE;
484 }
485
486 static int
487 swizzle_for_size(int size)
488 {
489 static const int size_swizzles[4] = {
490 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
491 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
492 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
494 };
495
496 assert((size >= 1) && (size <= 4));
497 return size_swizzles[size - 1];
498 }
499
500 static bool
501 is_tex_instruction(unsigned opcode)
502 {
503 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
504 return info->is_tex;
505 }
506
507 static unsigned
508 num_inst_dst_regs(unsigned opcode)
509 {
510 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
511 return info->num_dst;
512 }
513
514 static unsigned
515 num_inst_src_regs(unsigned opcode)
516 {
517 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
518 return info->is_tex ? info->num_src - 1 : info->num_src;
519 }
520
521 glsl_to_tgsi_instruction *
522 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
523 st_dst_reg dst,
524 st_src_reg src0, st_src_reg src1,
525 st_src_reg src2, st_src_reg src3)
526 {
527 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
528 int num_reladdr = 0, i;
529
530 op = get_opcode(ir, op, dst, src0, src1);
531
532 /* If we have to do relative addressing, we want to load the ARL
533 * reg directly for one of the regs, and preload the other reladdr
534 * sources into temps.
535 */
536 num_reladdr += dst.reladdr != NULL;
537 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
538 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
539 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
540 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
541
542 reladdr_to_temp(ir, &src3, &num_reladdr);
543 reladdr_to_temp(ir, &src2, &num_reladdr);
544 reladdr_to_temp(ir, &src1, &num_reladdr);
545 reladdr_to_temp(ir, &src0, &num_reladdr);
546
547 if (dst.reladdr) {
548 emit_arl(ir, address_reg, *dst.reladdr);
549 num_reladdr--;
550 }
551 assert(num_reladdr == 0);
552
553 inst->op = op;
554 inst->dst[0] = dst;
555 inst->src[0] = src0;
556 inst->src[1] = src1;
557 inst->src[2] = src2;
558 inst->src[3] = src3;
559 inst->ir = ir;
560 inst->dead_mask = 0;
561
562 inst->function = NULL;
563
564 /* Update indirect addressing status used by TGSI */
565 if (dst.reladdr) {
566 switch(dst.file) {
567 case PROGRAM_STATE_VAR:
568 case PROGRAM_CONSTANT:
569 case PROGRAM_UNIFORM:
570 this->indirect_addr_consts = true;
571 break;
572 case PROGRAM_IMMEDIATE:
573 assert(!"immediates should not have indirect addressing");
574 break;
575 default:
576 break;
577 }
578 }
579 else {
580 for (i = 0; i < 4; i++) {
581 if(inst->src[i].reladdr) {
582 switch(inst->src[i].file) {
583 case PROGRAM_STATE_VAR:
584 case PROGRAM_CONSTANT:
585 case PROGRAM_UNIFORM:
586 this->indirect_addr_consts = true;
587 break;
588 case PROGRAM_IMMEDIATE:
589 assert(!"immediates should not have indirect addressing");
590 break;
591 default:
592 break;
593 }
594 }
595 }
596 }
597
598 this->instructions.push_tail(inst);
599
600 return inst;
601 }
602
603 glsl_to_tgsi_instruction *
604 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
605 st_dst_reg dst, st_src_reg src0,
606 st_src_reg src1, st_src_reg src2)
607 {
608 return emit(ir, op, dst, src0, src1, src2, undef_src);
609 }
610
611 glsl_to_tgsi_instruction *
612 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
613 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
614 {
615 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
616 }
617
618 glsl_to_tgsi_instruction *
619 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
620 st_dst_reg dst, st_src_reg src0)
621 {
622 assert(dst.writemask != 0);
623 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
624 }
625
626 glsl_to_tgsi_instruction *
627 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
628 {
629 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
630 }
631
632 /**
633 * Determines whether to use an integer, unsigned integer, or float opcode
634 * based on the operands and input opcode, then emits the result.
635 */
636 unsigned
637 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
638 st_dst_reg dst,
639 st_src_reg src0, st_src_reg src1)
640 {
641 int type = GLSL_TYPE_FLOAT;
642
643 if (op == TGSI_OPCODE_MOV)
644 return op;
645
646 assert(src0.type != GLSL_TYPE_ARRAY);
647 assert(src0.type != GLSL_TYPE_STRUCT);
648 assert(src1.type != GLSL_TYPE_ARRAY);
649 assert(src1.type != GLSL_TYPE_STRUCT);
650
651 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
652 type = GLSL_TYPE_FLOAT;
653 else if (native_integers)
654 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
655
656 #define case4(c, f, i, u) \
657 case TGSI_OPCODE_##c: \
658 if (type == GLSL_TYPE_INT) \
659 op = TGSI_OPCODE_##i; \
660 else if (type == GLSL_TYPE_UINT) \
661 op = TGSI_OPCODE_##u; \
662 else \
663 op = TGSI_OPCODE_##f; \
664 break;
665
666 #define case3(f, i, u) case4(f, f, i, u)
667 #define case2fi(f, i) case4(f, f, i, i)
668 #define case2iu(i, u) case4(i, LAST, i, u)
669
670 #define casecomp(c, f, i, u) \
671 case TGSI_OPCODE_##c: \
672 if (type == GLSL_TYPE_INT) \
673 op = TGSI_OPCODE_##i; \
674 else if (type == GLSL_TYPE_UINT) \
675 op = TGSI_OPCODE_##u; \
676 else if (native_integers) \
677 op = TGSI_OPCODE_##f; \
678 else \
679 op = TGSI_OPCODE_##c; \
680 break;
681
682 switch(op) {
683 case2fi(ADD, UADD);
684 case2fi(MUL, UMUL);
685 case2fi(MAD, UMAD);
686 case3(DIV, IDIV, UDIV);
687 case3(MAX, IMAX, UMAX);
688 case3(MIN, IMIN, UMIN);
689 case2iu(MOD, UMOD);
690
691 casecomp(SEQ, FSEQ, USEQ, USEQ);
692 casecomp(SNE, FSNE, USNE, USNE);
693 casecomp(SGE, FSGE, ISGE, USGE);
694 casecomp(SLT, FSLT, ISLT, USLT);
695
696 case2iu(ISHR, USHR);
697
698 case2fi(SSG, ISSG);
699 case3(ABS, IABS, IABS);
700
701 case2iu(IBFE, UBFE);
702 case2iu(IMSB, UMSB);
703 case2iu(IMUL_HI, UMUL_HI);
704 default: break;
705 }
706
707 assert(op != TGSI_OPCODE_LAST);
708 return op;
709 }
710
711 glsl_to_tgsi_instruction *
712 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
713 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
714 unsigned elements)
715 {
716 static const unsigned dot_opcodes[] = {
717 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
718 };
719
720 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
721 }
722
723 /**
724 * Emits TGSI scalar opcodes to produce unique answers across channels.
725 *
726 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
727 * channel determines the result across all channels. So to do a vec4
728 * of this operation, we want to emit a scalar per source channel used
729 * to produce dest channels.
730 */
731 void
732 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
733 st_dst_reg dst,
734 st_src_reg orig_src0, st_src_reg orig_src1)
735 {
736 int i, j;
737 int done_mask = ~dst.writemask;
738
739 /* TGSI RCP is a scalar operation splatting results to all channels,
740 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
741 * dst channels.
742 */
743 for (i = 0; i < 4; i++) {
744 GLuint this_mask = (1 << i);
745 glsl_to_tgsi_instruction *inst;
746 st_src_reg src0 = orig_src0;
747 st_src_reg src1 = orig_src1;
748
749 if (done_mask & this_mask)
750 continue;
751
752 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
753 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
754 for (j = i + 1; j < 4; j++) {
755 /* If there is another enabled component in the destination that is
756 * derived from the same inputs, generate its value on this pass as
757 * well.
758 */
759 if (!(done_mask & (1 << j)) &&
760 GET_SWZ(src0.swizzle, j) == src0_swiz &&
761 GET_SWZ(src1.swizzle, j) == src1_swiz) {
762 this_mask |= (1 << j);
763 }
764 }
765 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
766 src0_swiz, src0_swiz);
767 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
768 src1_swiz, src1_swiz);
769
770 inst = emit(ir, op, dst, src0, src1);
771 inst->dst[0].writemask = this_mask;
772 done_mask |= this_mask;
773 }
774 }
775
776 void
777 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
778 st_dst_reg dst, st_src_reg src0)
779 {
780 st_src_reg undef = undef_src;
781
782 undef.swizzle = SWIZZLE_XXXX;
783
784 emit_scalar(ir, op, dst, src0, undef);
785 }
786
787 void
788 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
789 st_dst_reg dst, st_src_reg src0)
790 {
791 int op = TGSI_OPCODE_ARL;
792
793 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
794 op = TGSI_OPCODE_UARL;
795
796 assert(dst.file == PROGRAM_ADDRESS);
797 if (dst.index >= this->num_address_regs)
798 this->num_address_regs = dst.index + 1;
799
800 emit(NULL, op, dst, src0);
801 }
802
803 /**
804 * Emit an TGSI_OPCODE_SCS instruction
805 *
806 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
807 * Instead of splatting its result across all four components of the
808 * destination, it writes one value to the \c x component and another value to
809 * the \c y component.
810 *
811 * \param ir IR instruction being processed
812 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
813 * on which value is desired.
814 * \param dst Destination register
815 * \param src Source register
816 */
817 void
818 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
819 st_dst_reg dst,
820 const st_src_reg &src)
821 {
822 /* Vertex programs cannot use the SCS opcode.
823 */
824 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
825 emit_scalar(ir, op, dst, src);
826 return;
827 }
828
829 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
830 const unsigned scs_mask = (1U << component);
831 int done_mask = ~dst.writemask;
832 st_src_reg tmp;
833
834 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
835
836 /* If there are compnents in the destination that differ from the component
837 * that will be written by the SCS instrution, we'll need a temporary.
838 */
839 if (scs_mask != unsigned(dst.writemask)) {
840 tmp = get_temp(glsl_type::vec4_type);
841 }
842
843 for (unsigned i = 0; i < 4; i++) {
844 unsigned this_mask = (1U << i);
845 st_src_reg src0 = src;
846
847 if ((done_mask & this_mask) != 0)
848 continue;
849
850 /* The source swizzle specified which component of the source generates
851 * sine / cosine for the current component in the destination. The SCS
852 * instruction requires that this value be swizzle to the X component.
853 * Replace the current swizzle with a swizzle that puts the source in
854 * the X component.
855 */
856 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
857
858 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
859 src0_swiz, src0_swiz);
860 for (unsigned j = i + 1; j < 4; j++) {
861 /* If there is another enabled component in the destination that is
862 * derived from the same inputs, generate its value on this pass as
863 * well.
864 */
865 if (!(done_mask & (1 << j)) &&
866 GET_SWZ(src0.swizzle, j) == src0_swiz) {
867 this_mask |= (1 << j);
868 }
869 }
870
871 if (this_mask != scs_mask) {
872 glsl_to_tgsi_instruction *inst;
873 st_dst_reg tmp_dst = st_dst_reg(tmp);
874
875 /* Emit the SCS instruction.
876 */
877 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
878 inst->dst[0].writemask = scs_mask;
879
880 /* Move the result of the SCS instruction to the desired location in
881 * the destination.
882 */
883 tmp.swizzle = MAKE_SWIZZLE4(component, component,
884 component, component);
885 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
886 inst->dst[0].writemask = this_mask;
887 } else {
888 /* Emit the SCS instruction to write directly to the destination.
889 */
890 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
891 inst->dst[0].writemask = scs_mask;
892 }
893
894 done_mask |= this_mask;
895 }
896 }
897
898 int
899 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
900 gl_constant_value values[4], int size, int datatype,
901 GLuint *swizzle_out)
902 {
903 if (file == PROGRAM_CONSTANT) {
904 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
905 size, datatype, swizzle_out);
906 } else {
907 int index = 0;
908 immediate_storage *entry;
909 assert(file == PROGRAM_IMMEDIATE);
910
911 /* Search immediate storage to see if we already have an identical
912 * immediate that we can use instead of adding a duplicate entry.
913 */
914 foreach_in_list(immediate_storage, entry, &this->immediates) {
915 if (entry->size == size &&
916 entry->type == datatype &&
917 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
918 return index;
919 }
920 index++;
921 }
922
923 /* Add this immediate to the list. */
924 entry = new(mem_ctx) immediate_storage(values, size, datatype);
925 this->immediates.push_tail(entry);
926 this->num_immediates++;
927 return index;
928 }
929 }
930
931 st_src_reg
932 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
933 {
934 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
935 union gl_constant_value uval;
936
937 uval.f = val;
938 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
939
940 return src;
941 }
942
943 st_src_reg
944 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
945 {
946 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
947 union gl_constant_value uval;
948
949 assert(native_integers);
950
951 uval.i = val;
952 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
953
954 return src;
955 }
956
957 st_src_reg
958 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
959 {
960 if (native_integers)
961 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
962 st_src_reg_for_int(val);
963 else
964 return st_src_reg_for_float(val);
965 }
966
967 static int
968 type_size(const struct glsl_type *type)
969 {
970 unsigned int i;
971 int size;
972
973 switch (type->base_type) {
974 case GLSL_TYPE_UINT:
975 case GLSL_TYPE_INT:
976 case GLSL_TYPE_FLOAT:
977 case GLSL_TYPE_BOOL:
978 if (type->is_matrix()) {
979 return type->matrix_columns;
980 } else {
981 /* Regardless of size of vector, it gets a vec4. This is bad
982 * packing for things like floats, but otherwise arrays become a
983 * mess. Hopefully a later pass over the code can pack scalars
984 * down if appropriate.
985 */
986 return 1;
987 }
988 case GLSL_TYPE_ARRAY:
989 assert(type->length > 0);
990 return type_size(type->fields.array) * type->length;
991 case GLSL_TYPE_STRUCT:
992 size = 0;
993 for (i = 0; i < type->length; i++) {
994 size += type_size(type->fields.structure[i].type);
995 }
996 return size;
997 case GLSL_TYPE_SAMPLER:
998 case GLSL_TYPE_IMAGE:
999 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1000 * at link time.
1001 */
1002 return 1;
1003 case GLSL_TYPE_ATOMIC_UINT:
1004 case GLSL_TYPE_INTERFACE:
1005 case GLSL_TYPE_VOID:
1006 case GLSL_TYPE_ERROR:
1007 case GLSL_TYPE_DOUBLE:
1008 assert(!"Invalid type in type_size");
1009 break;
1010 }
1011 return 0;
1012 }
1013
1014 /**
1015 * In the initial pass of codegen, we assign temporary numbers to
1016 * intermediate results. (not SSA -- variable assignments will reuse
1017 * storage).
1018 */
1019 st_src_reg
1020 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1021 {
1022 st_src_reg src;
1023
1024 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1025 src.reladdr = NULL;
1026 src.negate = 0;
1027
1028 if (!options->EmitNoIndirectTemp &&
1029 (type->is_array() || type->is_matrix())) {
1030
1031 src.file = PROGRAM_ARRAY;
1032 src.index = next_array << 16 | 0x8000;
1033 array_sizes[next_array] = type_size(type);
1034 ++next_array;
1035
1036 } else {
1037 src.file = PROGRAM_TEMPORARY;
1038 src.index = next_temp;
1039 next_temp += type_size(type);
1040 }
1041
1042 if (type->is_array() || type->is_record()) {
1043 src.swizzle = SWIZZLE_NOOP;
1044 } else {
1045 src.swizzle = swizzle_for_size(type->vector_elements);
1046 }
1047
1048 return src;
1049 }
1050
1051 variable_storage *
1052 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1053 {
1054
1055 foreach_in_list(variable_storage, entry, &this->variables) {
1056 if (entry->var == var)
1057 return entry;
1058 }
1059
1060 return NULL;
1061 }
1062
1063 void
1064 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1065 {
1066 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1067 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1068
1069 fp->OriginUpperLeft = ir->data.origin_upper_left;
1070 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1071 }
1072
1073 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1074 unsigned int i;
1075 const ir_state_slot *const slots = ir->get_state_slots();
1076 assert(slots != NULL);
1077
1078 /* Check if this statevar's setup in the STATE file exactly
1079 * matches how we'll want to reference it as a
1080 * struct/array/whatever. If not, then we need to move it into
1081 * temporary storage and hope that it'll get copy-propagated
1082 * out.
1083 */
1084 for (i = 0; i < ir->get_num_state_slots(); i++) {
1085 if (slots[i].swizzle != SWIZZLE_XYZW) {
1086 break;
1087 }
1088 }
1089
1090 variable_storage *storage;
1091 st_dst_reg dst;
1092 if (i == ir->get_num_state_slots()) {
1093 /* We'll set the index later. */
1094 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1095 this->variables.push_tail(storage);
1096
1097 dst = undef_dst;
1098 } else {
1099 /* The variable_storage constructor allocates slots based on the size
1100 * of the type. However, this had better match the number of state
1101 * elements that we're going to copy into the new temporary.
1102 */
1103 assert((int) ir->get_num_state_slots() == type_size(ir->type));
1104
1105 dst = st_dst_reg(get_temp(ir->type));
1106
1107 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1108
1109 this->variables.push_tail(storage);
1110 }
1111
1112
1113 for (unsigned int i = 0; i < ir->get_num_state_slots(); i++) {
1114 int index = _mesa_add_state_reference(this->prog->Parameters,
1115 (gl_state_index *)slots[i].tokens);
1116
1117 if (storage->file == PROGRAM_STATE_VAR) {
1118 if (storage->index == -1) {
1119 storage->index = index;
1120 } else {
1121 assert(index == storage->index + (int)i);
1122 }
1123 } else {
1124 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1125 * the data being moved since MOV does not care about the type of
1126 * data it is moving, and we don't want to declare registers with
1127 * array or struct types.
1128 */
1129 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1130 src.swizzle = slots[i].swizzle;
1131 emit(ir, TGSI_OPCODE_MOV, dst, src);
1132 /* even a float takes up a whole vec4 reg in a struct/array. */
1133 dst.index++;
1134 }
1135 }
1136
1137 if (storage->file == PROGRAM_TEMPORARY &&
1138 dst.index != storage->index + (int) ir->get_num_state_slots()) {
1139 fail_link(this->shader_program,
1140 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1141 ir->name, dst.index - storage->index,
1142 type_size(ir->type));
1143 }
1144 }
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1149 {
1150 emit(NULL, TGSI_OPCODE_BGNLOOP);
1151
1152 visit_exec_list(&ir->body_instructions, this);
1153
1154 emit(NULL, TGSI_OPCODE_ENDLOOP);
1155 }
1156
1157 void
1158 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1159 {
1160 switch (ir->mode) {
1161 case ir_loop_jump::jump_break:
1162 emit(NULL, TGSI_OPCODE_BRK);
1163 break;
1164 case ir_loop_jump::jump_continue:
1165 emit(NULL, TGSI_OPCODE_CONT);
1166 break;
1167 }
1168 }
1169
1170
1171 void
1172 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1173 {
1174 assert(0);
1175 (void)ir;
1176 }
1177
1178 void
1179 glsl_to_tgsi_visitor::visit(ir_function *ir)
1180 {
1181 /* Ignore function bodies other than main() -- we shouldn't see calls to
1182 * them since they should all be inlined before we get to glsl_to_tgsi.
1183 */
1184 if (strcmp(ir->name, "main") == 0) {
1185 const ir_function_signature *sig;
1186 exec_list empty;
1187
1188 sig = ir->matching_signature(NULL, &empty, false);
1189
1190 assert(sig);
1191
1192 foreach_in_list(ir_instruction, ir, &sig->body) {
1193 ir->accept(this);
1194 }
1195 }
1196 }
1197
1198 bool
1199 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1200 {
1201 int nonmul_operand = 1 - mul_operand;
1202 st_src_reg a, b, c;
1203 st_dst_reg result_dst;
1204
1205 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1206 if (!expr || expr->operation != ir_binop_mul)
1207 return false;
1208
1209 expr->operands[0]->accept(this);
1210 a = this->result;
1211 expr->operands[1]->accept(this);
1212 b = this->result;
1213 ir->operands[nonmul_operand]->accept(this);
1214 c = this->result;
1215
1216 this->result = get_temp(ir->type);
1217 result_dst = st_dst_reg(this->result);
1218 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1219 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1220
1221 return true;
1222 }
1223
1224 /**
1225 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1226 *
1227 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1228 * implemented using multiplication, and logical-or is implemented using
1229 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1230 * As result, the logical expression (a & !b) can be rewritten as:
1231 *
1232 * - a * !b
1233 * - a * (1 - b)
1234 * - (a * 1) - (a * b)
1235 * - a + -(a * b)
1236 * - a + (a * -b)
1237 *
1238 * This final expression can be implemented as a single MAD(a, -b, a)
1239 * instruction.
1240 */
1241 bool
1242 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1243 {
1244 const int other_operand = 1 - try_operand;
1245 st_src_reg a, b;
1246
1247 ir_expression *expr = ir->operands[try_operand]->as_expression();
1248 if (!expr || expr->operation != ir_unop_logic_not)
1249 return false;
1250
1251 ir->operands[other_operand]->accept(this);
1252 a = this->result;
1253 expr->operands[0]->accept(this);
1254 b = this->result;
1255
1256 b.negate = ~b.negate;
1257
1258 this->result = get_temp(ir->type);
1259 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1260
1261 return true;
1262 }
1263
1264 void
1265 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1266 st_src_reg *reg, int *num_reladdr)
1267 {
1268 if (!reg->reladdr && !reg->reladdr2)
1269 return;
1270
1271 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1272 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1273
1274 if (*num_reladdr != 1) {
1275 st_src_reg temp = get_temp(glsl_type::vec4_type);
1276
1277 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1278 *reg = temp;
1279 }
1280
1281 (*num_reladdr)--;
1282 }
1283
1284 void
1285 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1286 {
1287 unsigned int operand;
1288 st_src_reg op[Elements(ir->operands)];
1289 st_src_reg result_src;
1290 st_dst_reg result_dst;
1291
1292 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1293 */
1294 if (ir->operation == ir_binop_add) {
1295 if (try_emit_mad(ir, 1))
1296 return;
1297 if (try_emit_mad(ir, 0))
1298 return;
1299 }
1300
1301 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1302 */
1303 if (!native_integers && ir->operation == ir_binop_logic_and) {
1304 if (try_emit_mad_for_and_not(ir, 1))
1305 return;
1306 if (try_emit_mad_for_and_not(ir, 0))
1307 return;
1308 }
1309
1310 if (ir->operation == ir_quadop_vector)
1311 assert(!"ir_quadop_vector should have been lowered");
1312
1313 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1314 this->result.file = PROGRAM_UNDEFINED;
1315 ir->operands[operand]->accept(this);
1316 if (this->result.file == PROGRAM_UNDEFINED) {
1317 printf("Failed to get tree for expression operand:\n");
1318 ir->operands[operand]->print();
1319 printf("\n");
1320 exit(1);
1321 }
1322 op[operand] = this->result;
1323
1324 /* Matrix expression operands should have been broken down to vector
1325 * operations already.
1326 */
1327 assert(!ir->operands[operand]->type->is_matrix());
1328 }
1329
1330 int vector_elements = ir->operands[0]->type->vector_elements;
1331 if (ir->operands[1]) {
1332 vector_elements = MAX2(vector_elements,
1333 ir->operands[1]->type->vector_elements);
1334 }
1335
1336 this->result.file = PROGRAM_UNDEFINED;
1337
1338 /* Storage for our result. Ideally for an assignment we'd be using
1339 * the actual storage for the result here, instead.
1340 */
1341 result_src = get_temp(ir->type);
1342 /* convenience for the emit functions below. */
1343 result_dst = st_dst_reg(result_src);
1344 /* Limit writes to the channels that will be used by result_src later.
1345 * This does limit this temp's use as a temporary for multi-instruction
1346 * sequences.
1347 */
1348 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1349
1350 switch (ir->operation) {
1351 case ir_unop_logic_not:
1352 if (result_dst.type != GLSL_TYPE_FLOAT)
1353 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1354 else {
1355 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1356 * older GPUs implement SEQ using multiple instructions (i915 uses two
1357 * SGE instructions and a MUL instruction). Since our logic values are
1358 * 0.0 and 1.0, 1-x also implements !x.
1359 */
1360 op[0].negate = ~op[0].negate;
1361 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1362 }
1363 break;
1364 case ir_unop_neg:
1365 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1366 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1367 else {
1368 op[0].negate = ~op[0].negate;
1369 result_src = op[0];
1370 }
1371 break;
1372 case ir_unop_abs:
1373 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1374 break;
1375 case ir_unop_sign:
1376 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1377 break;
1378 case ir_unop_rcp:
1379 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1380 break;
1381
1382 case ir_unop_exp2:
1383 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1384 break;
1385 case ir_unop_exp:
1386 case ir_unop_log:
1387 assert(!"not reached: should be handled by ir_explog_to_explog2");
1388 break;
1389 case ir_unop_log2:
1390 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1391 break;
1392 case ir_unop_sin:
1393 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1394 break;
1395 case ir_unop_cos:
1396 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1397 break;
1398 case ir_unop_sin_reduced:
1399 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1400 break;
1401 case ir_unop_cos_reduced:
1402 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1403 break;
1404 case ir_unop_saturate: {
1405 glsl_to_tgsi_instruction *inst;
1406 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
1407 inst->saturate = true;
1408 break;
1409 }
1410
1411 case ir_unop_dFdx:
1412 case ir_unop_dFdx_coarse:
1413 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1414 break;
1415 case ir_unop_dFdx_fine:
1416 emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]);
1417 break;
1418 case ir_unop_dFdy:
1419 case ir_unop_dFdy_coarse:
1420 case ir_unop_dFdy_fine:
1421 {
1422 /* The X component contains 1 or -1 depending on whether the framebuffer
1423 * is a FBO or the window system buffer, respectively.
1424 * It is then multiplied with the source operand of DDY.
1425 */
1426 static const gl_state_index transform_y_state[STATE_LENGTH]
1427 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1428
1429 unsigned transform_y_index =
1430 _mesa_add_state_reference(this->prog->Parameters,
1431 transform_y_state);
1432
1433 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1434 transform_y_index,
1435 glsl_type::vec4_type);
1436 transform_y.swizzle = SWIZZLE_XXXX;
1437
1438 st_src_reg temp = get_temp(glsl_type::vec4_type);
1439
1440 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1441 emit(ir, ir->operation == ir_unop_dFdy_fine ?
1442 TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp);
1443 break;
1444 }
1445
1446 case ir_unop_noise: {
1447 /* At some point, a motivated person could add a better
1448 * implementation of noise. Currently not even the nvidia
1449 * binary drivers do anything more than this. In any case, the
1450 * place to do this is in the GL state tracker, not the poor
1451 * driver.
1452 */
1453 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1454 break;
1455 }
1456
1457 case ir_binop_add:
1458 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1459 break;
1460 case ir_binop_sub:
1461 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1462 break;
1463
1464 case ir_binop_mul:
1465 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1466 break;
1467 case ir_binop_div:
1468 if (result_dst.type == GLSL_TYPE_FLOAT)
1469 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1470 else
1471 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1472 break;
1473 case ir_binop_mod:
1474 if (result_dst.type == GLSL_TYPE_FLOAT)
1475 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1476 else
1477 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1478 break;
1479
1480 case ir_binop_less:
1481 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1482 break;
1483 case ir_binop_greater:
1484 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1485 break;
1486 case ir_binop_lequal:
1487 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1488 break;
1489 case ir_binop_gequal:
1490 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1491 break;
1492 case ir_binop_equal:
1493 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1494 break;
1495 case ir_binop_nequal:
1496 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1497 break;
1498 case ir_binop_all_equal:
1499 /* "==" operator producing a scalar boolean. */
1500 if (ir->operands[0]->type->is_vector() ||
1501 ir->operands[1]->type->is_vector()) {
1502 st_src_reg temp = get_temp(native_integers ?
1503 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1504 glsl_type::vec4_type);
1505
1506 if (native_integers) {
1507 st_dst_reg temp_dst = st_dst_reg(temp);
1508 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1509
1510 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1511
1512 /* Emit 1-3 AND operations to combine the SEQ results. */
1513 switch (ir->operands[0]->type->vector_elements) {
1514 case 2:
1515 break;
1516 case 3:
1517 temp_dst.writemask = WRITEMASK_Y;
1518 temp1.swizzle = SWIZZLE_YYYY;
1519 temp2.swizzle = SWIZZLE_ZZZZ;
1520 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1521 break;
1522 case 4:
1523 temp_dst.writemask = WRITEMASK_X;
1524 temp1.swizzle = SWIZZLE_XXXX;
1525 temp2.swizzle = SWIZZLE_YYYY;
1526 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1527 temp_dst.writemask = WRITEMASK_Y;
1528 temp1.swizzle = SWIZZLE_ZZZZ;
1529 temp2.swizzle = SWIZZLE_WWWW;
1530 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1531 }
1532
1533 temp1.swizzle = SWIZZLE_XXXX;
1534 temp2.swizzle = SWIZZLE_YYYY;
1535 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1536 } else {
1537 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1538
1539 /* After the dot-product, the value will be an integer on the
1540 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1541 */
1542 emit_dp(ir, result_dst, temp, temp, vector_elements);
1543
1544 /* Negating the result of the dot-product gives values on the range
1545 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1546 * This is achieved using SGE.
1547 */
1548 st_src_reg sge_src = result_src;
1549 sge_src.negate = ~sge_src.negate;
1550 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1551 }
1552 } else {
1553 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1554 }
1555 break;
1556 case ir_binop_any_nequal:
1557 /* "!=" operator producing a scalar boolean. */
1558 if (ir->operands[0]->type->is_vector() ||
1559 ir->operands[1]->type->is_vector()) {
1560 st_src_reg temp = get_temp(native_integers ?
1561 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1562 glsl_type::vec4_type);
1563 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1564
1565 if (native_integers) {
1566 st_dst_reg temp_dst = st_dst_reg(temp);
1567 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1568
1569 /* Emit 1-3 OR operations to combine the SNE results. */
1570 switch (ir->operands[0]->type->vector_elements) {
1571 case 2:
1572 break;
1573 case 3:
1574 temp_dst.writemask = WRITEMASK_Y;
1575 temp1.swizzle = SWIZZLE_YYYY;
1576 temp2.swizzle = SWIZZLE_ZZZZ;
1577 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1578 break;
1579 case 4:
1580 temp_dst.writemask = WRITEMASK_X;
1581 temp1.swizzle = SWIZZLE_XXXX;
1582 temp2.swizzle = SWIZZLE_YYYY;
1583 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1584 temp_dst.writemask = WRITEMASK_Y;
1585 temp1.swizzle = SWIZZLE_ZZZZ;
1586 temp2.swizzle = SWIZZLE_WWWW;
1587 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1588 }
1589
1590 temp1.swizzle = SWIZZLE_XXXX;
1591 temp2.swizzle = SWIZZLE_YYYY;
1592 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1593 } else {
1594 /* After the dot-product, the value will be an integer on the
1595 * range [0,4]. Zero stays zero, and positive values become 1.0.
1596 */
1597 glsl_to_tgsi_instruction *const dp =
1598 emit_dp(ir, result_dst, temp, temp, vector_elements);
1599 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1600 /* The clamping to [0,1] can be done for free in the fragment
1601 * shader with a saturate.
1602 */
1603 dp->saturate = true;
1604 } else {
1605 /* Negating the result of the dot-product gives values on the range
1606 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1607 * achieved using SLT.
1608 */
1609 st_src_reg slt_src = result_src;
1610 slt_src.negate = ~slt_src.negate;
1611 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1612 }
1613 }
1614 } else {
1615 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1616 }
1617 break;
1618
1619 case ir_unop_any: {
1620 assert(ir->operands[0]->type->is_vector());
1621
1622 if (native_integers) {
1623 int dst_swizzle = 0, op0_swizzle, i;
1624 st_src_reg accum = op[0];
1625
1626 op0_swizzle = op[0].swizzle;
1627 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1628 GET_SWZ(op0_swizzle, 0),
1629 GET_SWZ(op0_swizzle, 0),
1630 GET_SWZ(op0_swizzle, 0));
1631 for (i = 0; i < 4; i++) {
1632 if (result_dst.writemask & (1 << i)) {
1633 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1634 break;
1635 }
1636 }
1637 assert(i != 4);
1638 assert(ir->operands[0]->type->is_boolean());
1639
1640 /* OR all the components together, since they should be either 0 or ~0
1641 */
1642 switch (ir->operands[0]->type->vector_elements) {
1643 case 4:
1644 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1645 GET_SWZ(op0_swizzle, 3),
1646 GET_SWZ(op0_swizzle, 3),
1647 GET_SWZ(op0_swizzle, 3));
1648 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1649 accum = st_src_reg(result_dst);
1650 accum.swizzle = dst_swizzle;
1651 /* fallthrough */
1652 case 3:
1653 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1654 GET_SWZ(op0_swizzle, 2),
1655 GET_SWZ(op0_swizzle, 2),
1656 GET_SWZ(op0_swizzle, 2));
1657 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1658 accum = st_src_reg(result_dst);
1659 accum.swizzle = dst_swizzle;
1660 /* fallthrough */
1661 case 2:
1662 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1663 GET_SWZ(op0_swizzle, 1),
1664 GET_SWZ(op0_swizzle, 1),
1665 GET_SWZ(op0_swizzle, 1));
1666 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1667 break;
1668 default:
1669 assert(!"Unexpected vector size");
1670 break;
1671 }
1672 } else {
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1675 */
1676 glsl_to_tgsi_instruction *const dp =
1677 emit_dp(ir, result_dst, op[0], op[0],
1678 ir->operands[0]->type->vector_elements);
1679 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1680 result_dst.type == GLSL_TYPE_FLOAT) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1683 */
1684 dp->saturate = true;
1685 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1689 */
1690 st_src_reg slt_src = result_src;
1691 slt_src.negate = ~slt_src.negate;
1692 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1693 }
1694 else {
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1697 }
1698 }
1699 break;
1700 }
1701
1702 case ir_binop_logic_xor:
1703 if (native_integers)
1704 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1705 else
1706 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1707 break;
1708
1709 case ir_binop_logic_or: {
1710 if (native_integers) {
1711 /* If integers are used as booleans, we can use an actual "or"
1712 * instruction.
1713 */
1714 assert(native_integers);
1715 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1716 } else {
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1719 */
1720 glsl_to_tgsi_instruction *add =
1721 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1722 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1725 */
1726 add->saturate = true;
1727 } else {
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1731 */
1732 st_src_reg slt_src = result_src;
1733 slt_src.negate = ~slt_src.negate;
1734 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1735 }
1736 }
1737 break;
1738 }
1739
1740 case ir_binop_logic_and:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1744 */
1745 if (native_integers)
1746 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1747 else
1748 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1749 break;
1750
1751 case ir_binop_dot:
1752 assert(ir->operands[0]->type->is_vector());
1753 assert(ir->operands[0]->type == ir->operands[1]->type);
1754 emit_dp(ir, result_dst, op[0], op[1],
1755 ir->operands[0]->type->vector_elements);
1756 break;
1757
1758 case ir_unop_sqrt:
1759 if (have_sqrt) {
1760 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1761 } else {
1762 /* sqrt(x) = x * rsq(x). */
1763 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1764 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1765 /* For incoming channels <= 0, set the result to 0. */
1766 op[0].negate = ~op[0].negate;
1767 emit(ir, TGSI_OPCODE_CMP, result_dst,
1768 op[0], result_src, st_src_reg_for_float(0.0));
1769 }
1770 break;
1771 case ir_unop_rsq:
1772 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1773 break;
1774 case ir_unop_i2f:
1775 if (native_integers) {
1776 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1777 break;
1778 }
1779 /* fallthrough to next case otherwise */
1780 case ir_unop_b2f:
1781 if (native_integers) {
1782 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1783 break;
1784 }
1785 /* fallthrough to next case otherwise */
1786 case ir_unop_i2u:
1787 case ir_unop_u2i:
1788 /* Converting between signed and unsigned integers is a no-op. */
1789 result_src = op[0];
1790 break;
1791 case ir_unop_b2i:
1792 if (native_integers) {
1793 /* Booleans are stored as integers using ~0 for true and 0 for false.
1794 * GLSL requires that int(bool) return 1 for true and 0 for false.
1795 * This conversion is done with AND, but it could be done with NEG.
1796 */
1797 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1798 } else {
1799 /* Booleans and integers are both stored as floats when native
1800 * integers are disabled.
1801 */
1802 result_src = op[0];
1803 }
1804 break;
1805 case ir_unop_f2i:
1806 if (native_integers)
1807 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1808 else
1809 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1810 break;
1811 case ir_unop_f2u:
1812 if (native_integers)
1813 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1814 else
1815 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1816 break;
1817 case ir_unop_bitcast_f2i:
1818 result_src = op[0];
1819 result_src.type = GLSL_TYPE_INT;
1820 break;
1821 case ir_unop_bitcast_f2u:
1822 result_src = op[0];
1823 result_src.type = GLSL_TYPE_UINT;
1824 break;
1825 case ir_unop_bitcast_i2f:
1826 case ir_unop_bitcast_u2f:
1827 result_src = op[0];
1828 result_src.type = GLSL_TYPE_FLOAT;
1829 break;
1830 case ir_unop_f2b:
1831 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1832 break;
1833 case ir_unop_i2b:
1834 if (native_integers)
1835 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1836 else
1837 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1838 break;
1839 case ir_unop_trunc:
1840 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1841 break;
1842 case ir_unop_ceil:
1843 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1844 break;
1845 case ir_unop_floor:
1846 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1847 break;
1848 case ir_unop_round_even:
1849 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1850 break;
1851 case ir_unop_fract:
1852 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1853 break;
1854
1855 case ir_binop_min:
1856 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1857 break;
1858 case ir_binop_max:
1859 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1860 break;
1861 case ir_binop_pow:
1862 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1863 break;
1864
1865 case ir_unop_bit_not:
1866 if (native_integers) {
1867 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1868 break;
1869 }
1870 case ir_unop_u2f:
1871 if (native_integers) {
1872 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1873 break;
1874 }
1875 case ir_binop_lshift:
1876 if (native_integers) {
1877 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1878 break;
1879 }
1880 case ir_binop_rshift:
1881 if (native_integers) {
1882 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1883 break;
1884 }
1885 case ir_binop_bit_and:
1886 if (native_integers) {
1887 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1888 break;
1889 }
1890 case ir_binop_bit_xor:
1891 if (native_integers) {
1892 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1893 break;
1894 }
1895 case ir_binop_bit_or:
1896 if (native_integers) {
1897 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1898 break;
1899 }
1900
1901 assert(!"GLSL 1.30 features unsupported");
1902 break;
1903
1904 case ir_binop_ubo_load: {
1905 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
1906 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1907 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1908 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
1909 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1910 st_src_reg cbuf;
1911
1912 cbuf.type = glsl_type::vec4_type->base_type;
1913 cbuf.file = PROGRAM_CONSTANT;
1914 cbuf.index = 0;
1915 cbuf.reladdr = NULL;
1916 cbuf.negate = 0;
1917
1918 assert(ir->type->is_vector() || ir->type->is_scalar());
1919
1920 if (const_offset_ir) {
1921 /* Constant index into constant buffer */
1922 cbuf.reladdr = NULL;
1923 cbuf.index = const_offset / 16;
1924 }
1925 else {
1926 /* Relative/variable index into constant buffer */
1927 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1928 st_src_reg_for_int(4));
1929 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1930 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1931 }
1932
1933 if (const_uniform_block) {
1934 /* Constant constant buffer */
1935 cbuf.reladdr2 = NULL;
1936 cbuf.index2D = const_block;
1937 cbuf.has_index2 = true;
1938 }
1939 else {
1940 /* Relative/variable constant buffer */
1941 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
1942 cbuf.index2D = 1;
1943 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
1944 cbuf.has_index2 = true;
1945 }
1946
1947 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1948 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1949 const_offset % 16 / 4,
1950 const_offset % 16 / 4,
1951 const_offset % 16 / 4);
1952
1953 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1954 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1955 } else {
1956 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1957 }
1958 break;
1959 }
1960 case ir_triop_lrp:
1961 /* note: we have to reorder the three args here */
1962 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1963 break;
1964 case ir_triop_csel:
1965 if (this->ctx->Const.NativeIntegers)
1966 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1967 else {
1968 op[0].negate = ~op[0].negate;
1969 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1970 }
1971 break;
1972 case ir_triop_bitfield_extract:
1973 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
1974 break;
1975 case ir_quadop_bitfield_insert:
1976 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
1977 break;
1978 case ir_unop_bitfield_reverse:
1979 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
1980 break;
1981 case ir_unop_bit_count:
1982 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
1983 break;
1984 case ir_unop_find_msb:
1985 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
1986 break;
1987 case ir_unop_find_lsb:
1988 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
1989 break;
1990 case ir_binop_imul_high:
1991 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
1992 break;
1993 case ir_triop_fma:
1994 /* NOTE: Perhaps there should be a special opcode that enforces fused
1995 * mul-add. Just use MAD for now.
1996 */
1997 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
1998 break;
1999 case ir_unop_interpolate_at_centroid:
2000 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2001 break;
2002 case ir_binop_interpolate_at_offset:
2003 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2004 break;
2005 case ir_binop_interpolate_at_sample:
2006 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2007 break;
2008 case ir_unop_pack_snorm_2x16:
2009 case ir_unop_pack_unorm_2x16:
2010 case ir_unop_pack_half_2x16:
2011 case ir_unop_pack_snorm_4x8:
2012 case ir_unop_pack_unorm_4x8:
2013 case ir_unop_unpack_snorm_2x16:
2014 case ir_unop_unpack_unorm_2x16:
2015 case ir_unop_unpack_half_2x16:
2016 case ir_unop_unpack_half_2x16_split_x:
2017 case ir_unop_unpack_half_2x16_split_y:
2018 case ir_unop_unpack_snorm_4x8:
2019 case ir_unop_unpack_unorm_4x8:
2020 case ir_binop_pack_half_2x16_split:
2021 case ir_binop_bfm:
2022 case ir_triop_bfi:
2023 case ir_quadop_vector:
2024 case ir_binop_vector_extract:
2025 case ir_triop_vector_insert:
2026 case ir_binop_ldexp:
2027 case ir_binop_carry:
2028 case ir_binop_borrow:
2029 case ir_unop_d2f:
2030 case ir_unop_f2d:
2031 case ir_unop_d2i:
2032 case ir_unop_i2d:
2033 case ir_unop_d2u:
2034 case ir_unop_u2d:
2035 case ir_unop_d2b:
2036 case ir_unop_pack_double_2x32:
2037 case ir_unop_unpack_double_2x32:
2038 case ir_unop_frexp_sig:
2039 case ir_unop_frexp_exp:
2040 /* This operation is not supported, or should have already been handled.
2041 */
2042 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2043 break;
2044 }
2045
2046 this->result = result_src;
2047 }
2048
2049
2050 void
2051 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2052 {
2053 st_src_reg src;
2054 int i;
2055 int swizzle[4];
2056
2057 /* Note that this is only swizzles in expressions, not those on the left
2058 * hand side of an assignment, which do write masking. See ir_assignment
2059 * for that.
2060 */
2061
2062 ir->val->accept(this);
2063 src = this->result;
2064 assert(src.file != PROGRAM_UNDEFINED);
2065 assert(ir->type->vector_elements > 0);
2066
2067 for (i = 0; i < 4; i++) {
2068 if (i < ir->type->vector_elements) {
2069 switch (i) {
2070 case 0:
2071 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2072 break;
2073 case 1:
2074 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2075 break;
2076 case 2:
2077 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2078 break;
2079 case 3:
2080 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2081 break;
2082 }
2083 } else {
2084 /* If the type is smaller than a vec4, replicate the last
2085 * channel out.
2086 */
2087 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2088 }
2089 }
2090
2091 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2092
2093 this->result = src;
2094 }
2095
2096 void
2097 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2098 {
2099 variable_storage *entry = find_variable_storage(ir->var);
2100 ir_variable *var = ir->var;
2101
2102 if (!entry) {
2103 switch (var->data.mode) {
2104 case ir_var_uniform:
2105 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2106 var->data.location);
2107 this->variables.push_tail(entry);
2108 break;
2109 case ir_var_shader_in:
2110 /* The linker assigns locations for varyings and attributes,
2111 * including deprecated builtins (like gl_Color), user-assign
2112 * generic attributes (glBindVertexLocation), and
2113 * user-defined varyings.
2114 */
2115 assert(var->data.location != -1);
2116 entry = new(mem_ctx) variable_storage(var,
2117 PROGRAM_INPUT,
2118 var->data.location);
2119 break;
2120 case ir_var_shader_out:
2121 assert(var->data.location != -1);
2122 entry = new(mem_ctx) variable_storage(var,
2123 PROGRAM_OUTPUT,
2124 var->data.location
2125 + var->data.index);
2126 break;
2127 case ir_var_system_value:
2128 entry = new(mem_ctx) variable_storage(var,
2129 PROGRAM_SYSTEM_VALUE,
2130 var->data.location);
2131 break;
2132 case ir_var_auto:
2133 case ir_var_temporary:
2134 st_src_reg src = get_temp(var->type);
2135
2136 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2137 this->variables.push_tail(entry);
2138
2139 break;
2140 }
2141
2142 if (!entry) {
2143 printf("Failed to make storage for %s\n", var->name);
2144 exit(1);
2145 }
2146 }
2147
2148 this->result = st_src_reg(entry->file, entry->index, var->type);
2149 if (!native_integers)
2150 this->result.type = GLSL_TYPE_FLOAT;
2151 }
2152
2153 void
2154 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2155 {
2156 ir_constant *index;
2157 st_src_reg src;
2158 int element_size = type_size(ir->type);
2159 bool is_2D_input;
2160
2161 index = ir->array_index->constant_expression_value();
2162
2163 ir->array->accept(this);
2164 src = this->result;
2165
2166 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2167 src.file == PROGRAM_INPUT &&
2168 ir->array->ir_type != ir_type_dereference_array;
2169
2170 if (is_2D_input)
2171 element_size = 1;
2172
2173 if (index) {
2174 if (is_2D_input) {
2175 src.index2D = index->value.i[0];
2176 src.has_index2 = true;
2177 } else
2178 src.index += index->value.i[0] * element_size;
2179 } else {
2180 /* Variable index array dereference. It eats the "vec4" of the
2181 * base of the array and an index that offsets the TGSI register
2182 * index.
2183 */
2184 ir->array_index->accept(this);
2185
2186 st_src_reg index_reg;
2187
2188 if (element_size == 1) {
2189 index_reg = this->result;
2190 } else {
2191 index_reg = get_temp(native_integers ?
2192 glsl_type::int_type : glsl_type::float_type);
2193
2194 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2195 this->result, st_src_reg_for_type(index_reg.type, element_size));
2196 }
2197
2198 /* If there was already a relative address register involved, add the
2199 * new and the old together to get the new offset.
2200 */
2201 if (!is_2D_input && src.reladdr != NULL) {
2202 st_src_reg accum_reg = get_temp(native_integers ?
2203 glsl_type::int_type : glsl_type::float_type);
2204
2205 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2206 index_reg, *src.reladdr);
2207
2208 index_reg = accum_reg;
2209 }
2210
2211 if (is_2D_input) {
2212 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2213 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2214 src.index2D = 0;
2215 src.has_index2 = true;
2216 } else {
2217 src.reladdr = ralloc(mem_ctx, st_src_reg);
2218 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2219 }
2220 }
2221
2222 /* If the type is smaller than a vec4, replicate the last channel out. */
2223 if (ir->type->is_scalar() || ir->type->is_vector())
2224 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2225 else
2226 src.swizzle = SWIZZLE_NOOP;
2227
2228 /* Change the register type to the element type of the array. */
2229 src.type = ir->type->base_type;
2230
2231 this->result = src;
2232 }
2233
2234 void
2235 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2236 {
2237 unsigned int i;
2238 const glsl_type *struct_type = ir->record->type;
2239 int offset = 0;
2240
2241 ir->record->accept(this);
2242
2243 for (i = 0; i < struct_type->length; i++) {
2244 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2245 break;
2246 offset += type_size(struct_type->fields.structure[i].type);
2247 }
2248
2249 /* If the type is smaller than a vec4, replicate the last channel out. */
2250 if (ir->type->is_scalar() || ir->type->is_vector())
2251 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2252 else
2253 this->result.swizzle = SWIZZLE_NOOP;
2254
2255 this->result.index += offset;
2256 this->result.type = ir->type->base_type;
2257 }
2258
2259 /**
2260 * We want to be careful in assignment setup to hit the actual storage
2261 * instead of potentially using a temporary like we might with the
2262 * ir_dereference handler.
2263 */
2264 static st_dst_reg
2265 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2266 {
2267 /* The LHS must be a dereference. If the LHS is a variable indexed array
2268 * access of a vector, it must be separated into a series conditional moves
2269 * before reaching this point (see ir_vec_index_to_cond_assign).
2270 */
2271 assert(ir->as_dereference());
2272 ir_dereference_array *deref_array = ir->as_dereference_array();
2273 if (deref_array) {
2274 assert(!deref_array->array->type->is_vector());
2275 }
2276
2277 /* Use the rvalue deref handler for the most part. We'll ignore
2278 * swizzles in it and write swizzles using writemask, though.
2279 */
2280 ir->accept(v);
2281 return st_dst_reg(v->result);
2282 }
2283
2284 /**
2285 * Process the condition of a conditional assignment
2286 *
2287 * Examines the condition of a conditional assignment to generate the optimal
2288 * first operand of a \c CMP instruction. If the condition is a relational
2289 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2290 * used as the source for the \c CMP instruction. Otherwise the comparison
2291 * is processed to a boolean result, and the boolean result is used as the
2292 * operand to the CMP instruction.
2293 */
2294 bool
2295 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2296 {
2297 ir_rvalue *src_ir = ir;
2298 bool negate = true;
2299 bool switch_order = false;
2300
2301 ir_expression *const expr = ir->as_expression();
2302
2303 if (native_integers) {
2304 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2305 enum glsl_base_type type = expr->operands[0]->type->base_type;
2306 if (type == GLSL_TYPE_INT || type == GLSL_TYPE_UINT ||
2307 type == GLSL_TYPE_BOOL) {
2308 if (expr->operation == ir_binop_equal) {
2309 if (expr->operands[0]->is_zero()) {
2310 src_ir = expr->operands[1];
2311 switch_order = true;
2312 }
2313 else if (expr->operands[1]->is_zero()) {
2314 src_ir = expr->operands[0];
2315 switch_order = true;
2316 }
2317 }
2318 else if (expr->operation == ir_binop_nequal) {
2319 if (expr->operands[0]->is_zero()) {
2320 src_ir = expr->operands[1];
2321 }
2322 else if (expr->operands[1]->is_zero()) {
2323 src_ir = expr->operands[0];
2324 }
2325 }
2326 }
2327 }
2328
2329 src_ir->accept(this);
2330 return switch_order;
2331 }
2332
2333 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2334 bool zero_on_left = false;
2335
2336 if (expr->operands[0]->is_zero()) {
2337 src_ir = expr->operands[1];
2338 zero_on_left = true;
2339 } else if (expr->operands[1]->is_zero()) {
2340 src_ir = expr->operands[0];
2341 zero_on_left = false;
2342 }
2343
2344 /* a is - 0 + - 0 +
2345 * (a < 0) T F F ( a < 0) T F F
2346 * (0 < a) F F T (-a < 0) F F T
2347 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2348 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2349 * (a > 0) F F T (-a < 0) F F T
2350 * (0 > a) T F F ( a < 0) T F F
2351 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2352 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2353 *
2354 * Note that exchanging the order of 0 and 'a' in the comparison simply
2355 * means that the value of 'a' should be negated.
2356 */
2357 if (src_ir != ir) {
2358 switch (expr->operation) {
2359 case ir_binop_less:
2360 switch_order = false;
2361 negate = zero_on_left;
2362 break;
2363
2364 case ir_binop_greater:
2365 switch_order = false;
2366 negate = !zero_on_left;
2367 break;
2368
2369 case ir_binop_lequal:
2370 switch_order = true;
2371 negate = !zero_on_left;
2372 break;
2373
2374 case ir_binop_gequal:
2375 switch_order = true;
2376 negate = zero_on_left;
2377 break;
2378
2379 default:
2380 /* This isn't the right kind of comparison afterall, so make sure
2381 * the whole condition is visited.
2382 */
2383 src_ir = ir;
2384 break;
2385 }
2386 }
2387 }
2388
2389 src_ir->accept(this);
2390
2391 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2392 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2393 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2394 * computing the condition.
2395 */
2396 if (negate)
2397 this->result.negate = ~this->result.negate;
2398
2399 return switch_order;
2400 }
2401
2402 void
2403 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2404 st_dst_reg *l, st_src_reg *r,
2405 st_src_reg *cond, bool cond_swap)
2406 {
2407 if (type->base_type == GLSL_TYPE_STRUCT) {
2408 for (unsigned int i = 0; i < type->length; i++) {
2409 emit_block_mov(ir, type->fields.structure[i].type, l, r,
2410 cond, cond_swap);
2411 }
2412 return;
2413 }
2414
2415 if (type->is_array()) {
2416 for (unsigned int i = 0; i < type->length; i++) {
2417 emit_block_mov(ir, type->fields.array, l, r, cond, cond_swap);
2418 }
2419 return;
2420 }
2421
2422 if (type->is_matrix()) {
2423 const struct glsl_type *vec_type;
2424
2425 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2426 type->vector_elements, 1);
2427
2428 for (int i = 0; i < type->matrix_columns; i++) {
2429 emit_block_mov(ir, vec_type, l, r, cond, cond_swap);
2430 }
2431 return;
2432 }
2433
2434 assert(type->is_scalar() || type->is_vector());
2435
2436 r->type = type->base_type;
2437 if (cond) {
2438 st_src_reg l_src = st_src_reg(*l);
2439 l_src.swizzle = swizzle_for_size(type->vector_elements);
2440
2441 if (native_integers) {
2442 emit(ir, TGSI_OPCODE_UCMP, *l, *cond,
2443 cond_swap ? l_src : *r,
2444 cond_swap ? *r : l_src);
2445 } else {
2446 emit(ir, TGSI_OPCODE_CMP, *l, *cond,
2447 cond_swap ? l_src : *r,
2448 cond_swap ? *r : l_src);
2449 }
2450 } else {
2451 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2452 }
2453 l->index++;
2454 r->index++;
2455 }
2456
2457 void
2458 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2459 {
2460 st_dst_reg l;
2461 st_src_reg r;
2462
2463 ir->rhs->accept(this);
2464 r = this->result;
2465
2466 l = get_assignment_lhs(ir->lhs, this);
2467
2468 /* FINISHME: This should really set to the correct maximal writemask for each
2469 * FINISHME: component written (in the loops below). This case can only
2470 * FINISHME: occur for matrices, arrays, and structures.
2471 */
2472 if (ir->write_mask == 0) {
2473 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2474 l.writemask = WRITEMASK_XYZW;
2475 } else if (ir->lhs->type->is_scalar() &&
2476 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2477 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2478 * FINISHME: W component of fragment shader output zero, work correctly.
2479 */
2480 l.writemask = WRITEMASK_XYZW;
2481 } else {
2482 int swizzles[4];
2483 int first_enabled_chan = 0;
2484 int rhs_chan = 0;
2485
2486 l.writemask = ir->write_mask;
2487
2488 for (int i = 0; i < 4; i++) {
2489 if (l.writemask & (1 << i)) {
2490 first_enabled_chan = GET_SWZ(r.swizzle, i);
2491 break;
2492 }
2493 }
2494
2495 /* Swizzle a small RHS vector into the channels being written.
2496 *
2497 * glsl ir treats write_mask as dictating how many channels are
2498 * present on the RHS while TGSI treats write_mask as just
2499 * showing which channels of the vec4 RHS get written.
2500 */
2501 for (int i = 0; i < 4; i++) {
2502 if (l.writemask & (1 << i))
2503 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2504 else
2505 swizzles[i] = first_enabled_chan;
2506 }
2507 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2508 swizzles[2], swizzles[3]);
2509 }
2510
2511 assert(l.file != PROGRAM_UNDEFINED);
2512 assert(r.file != PROGRAM_UNDEFINED);
2513
2514 if (ir->condition) {
2515 const bool switch_order = this->process_move_condition(ir->condition);
2516 st_src_reg condition = this->result;
2517
2518 emit_block_mov(ir, ir->lhs->type, &l, &r, &condition, switch_order);
2519 } else if (ir->rhs->as_expression() &&
2520 this->instructions.get_tail() &&
2521 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2522 type_size(ir->lhs->type) == 1 &&
2523 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst[0].writemask) {
2524 /* To avoid emitting an extra MOV when assigning an expression to a
2525 * variable, emit the last instruction of the expression again, but
2526 * replace the destination register with the target of the assignment.
2527 * Dead code elimination will remove the original instruction.
2528 */
2529 glsl_to_tgsi_instruction *inst, *new_inst;
2530 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2531 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2532 new_inst->saturate = inst->saturate;
2533 inst->dead_mask = inst->dst[0].writemask;
2534 } else {
2535 emit_block_mov(ir, ir->rhs->type, &l, &r, NULL, false);
2536 }
2537 }
2538
2539
2540 void
2541 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2542 {
2543 st_src_reg src;
2544 GLfloat stack_vals[4] = { 0 };
2545 gl_constant_value *values = (gl_constant_value *) stack_vals;
2546 GLenum gl_type = GL_NONE;
2547 unsigned int i;
2548 static int in_array = 0;
2549 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2550
2551 /* Unfortunately, 4 floats is all we can get into
2552 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2553 * aggregate constant and move each constant value into it. If we
2554 * get lucky, copy propagation will eliminate the extra moves.
2555 */
2556 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2557 st_src_reg temp_base = get_temp(ir->type);
2558 st_dst_reg temp = st_dst_reg(temp_base);
2559
2560 foreach_in_list(ir_constant, field_value, &ir->components) {
2561 int size = type_size(field_value->type);
2562
2563 assert(size > 0);
2564
2565 field_value->accept(this);
2566 src = this->result;
2567
2568 for (i = 0; i < (unsigned int)size; i++) {
2569 emit(ir, TGSI_OPCODE_MOV, temp, src);
2570
2571 src.index++;
2572 temp.index++;
2573 }
2574 }
2575 this->result = temp_base;
2576 return;
2577 }
2578
2579 if (ir->type->is_array()) {
2580 st_src_reg temp_base = get_temp(ir->type);
2581 st_dst_reg temp = st_dst_reg(temp_base);
2582 int size = type_size(ir->type->fields.array);
2583
2584 assert(size > 0);
2585 in_array++;
2586
2587 for (i = 0; i < ir->type->length; i++) {
2588 ir->array_elements[i]->accept(this);
2589 src = this->result;
2590 for (int j = 0; j < size; j++) {
2591 emit(ir, TGSI_OPCODE_MOV, temp, src);
2592
2593 src.index++;
2594 temp.index++;
2595 }
2596 }
2597 this->result = temp_base;
2598 in_array--;
2599 return;
2600 }
2601
2602 if (ir->type->is_matrix()) {
2603 st_src_reg mat = get_temp(ir->type);
2604 st_dst_reg mat_column = st_dst_reg(mat);
2605
2606 for (i = 0; i < ir->type->matrix_columns; i++) {
2607 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2608 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2609
2610 src = st_src_reg(file, -1, ir->type->base_type);
2611 src.index = add_constant(file,
2612 values,
2613 ir->type->vector_elements,
2614 GL_FLOAT,
2615 &src.swizzle);
2616 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2617
2618 mat_column.index++;
2619 }
2620
2621 this->result = mat;
2622 return;
2623 }
2624
2625 switch (ir->type->base_type) {
2626 case GLSL_TYPE_FLOAT:
2627 gl_type = GL_FLOAT;
2628 for (i = 0; i < ir->type->vector_elements; i++) {
2629 values[i].f = ir->value.f[i];
2630 }
2631 break;
2632 case GLSL_TYPE_UINT:
2633 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2634 for (i = 0; i < ir->type->vector_elements; i++) {
2635 if (native_integers)
2636 values[i].u = ir->value.u[i];
2637 else
2638 values[i].f = ir->value.u[i];
2639 }
2640 break;
2641 case GLSL_TYPE_INT:
2642 gl_type = native_integers ? GL_INT : GL_FLOAT;
2643 for (i = 0; i < ir->type->vector_elements; i++) {
2644 if (native_integers)
2645 values[i].i = ir->value.i[i];
2646 else
2647 values[i].f = ir->value.i[i];
2648 }
2649 break;
2650 case GLSL_TYPE_BOOL:
2651 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2652 for (i = 0; i < ir->type->vector_elements; i++) {
2653 values[i].u = ir->value.b[i] ? ctx->Const.UniformBooleanTrue : 0;
2654 }
2655 break;
2656 default:
2657 assert(!"Non-float/uint/int/bool constant");
2658 }
2659
2660 this->result = st_src_reg(file, -1, ir->type);
2661 this->result.index = add_constant(file,
2662 values,
2663 ir->type->vector_elements,
2664 gl_type,
2665 &this->result.swizzle);
2666 }
2667
2668 function_entry *
2669 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2670 {
2671 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2672 if (entry->sig == sig)
2673 return entry;
2674 }
2675
2676 entry = ralloc(mem_ctx, function_entry);
2677 entry->sig = sig;
2678 entry->sig_id = this->next_signature_id++;
2679 entry->bgn_inst = NULL;
2680
2681 /* Allocate storage for all the parameters. */
2682 foreach_in_list(ir_variable, param, &sig->parameters) {
2683 variable_storage *storage;
2684
2685 storage = find_variable_storage(param);
2686 assert(!storage);
2687
2688 st_src_reg src = get_temp(param->type);
2689
2690 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2691 this->variables.push_tail(storage);
2692 }
2693
2694 if (!sig->return_type->is_void()) {
2695 entry->return_reg = get_temp(sig->return_type);
2696 } else {
2697 entry->return_reg = undef_src;
2698 }
2699
2700 this->function_signatures.push_tail(entry);
2701 return entry;
2702 }
2703
2704 void
2705 glsl_to_tgsi_visitor::visit(ir_call *ir)
2706 {
2707 glsl_to_tgsi_instruction *call_inst;
2708 ir_function_signature *sig = ir->callee;
2709 function_entry *entry = get_function_signature(sig);
2710 int i;
2711
2712 /* Process in parameters. */
2713 foreach_two_lists(formal_node, &sig->parameters,
2714 actual_node, &ir->actual_parameters) {
2715 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2716 ir_variable *param = (ir_variable *) formal_node;
2717
2718 if (param->data.mode == ir_var_function_in ||
2719 param->data.mode == ir_var_function_inout) {
2720 variable_storage *storage = find_variable_storage(param);
2721 assert(storage);
2722
2723 param_rval->accept(this);
2724 st_src_reg r = this->result;
2725
2726 st_dst_reg l;
2727 l.file = storage->file;
2728 l.index = storage->index;
2729 l.reladdr = NULL;
2730 l.writemask = WRITEMASK_XYZW;
2731 l.cond_mask = COND_TR;
2732
2733 for (i = 0; i < type_size(param->type); i++) {
2734 emit(ir, TGSI_OPCODE_MOV, l, r);
2735 l.index++;
2736 r.index++;
2737 }
2738 }
2739 }
2740
2741 /* Emit call instruction */
2742 call_inst = emit(ir, TGSI_OPCODE_CAL);
2743 call_inst->function = entry;
2744
2745 /* Process out parameters. */
2746 foreach_two_lists(formal_node, &sig->parameters,
2747 actual_node, &ir->actual_parameters) {
2748 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2749 ir_variable *param = (ir_variable *) formal_node;
2750
2751 if (param->data.mode == ir_var_function_out ||
2752 param->data.mode == ir_var_function_inout) {
2753 variable_storage *storage = find_variable_storage(param);
2754 assert(storage);
2755
2756 st_src_reg r;
2757 r.file = storage->file;
2758 r.index = storage->index;
2759 r.reladdr = NULL;
2760 r.swizzle = SWIZZLE_NOOP;
2761 r.negate = 0;
2762
2763 param_rval->accept(this);
2764 st_dst_reg l = st_dst_reg(this->result);
2765
2766 for (i = 0; i < type_size(param->type); i++) {
2767 emit(ir, TGSI_OPCODE_MOV, l, r);
2768 l.index++;
2769 r.index++;
2770 }
2771 }
2772 }
2773
2774 /* Process return value. */
2775 this->result = entry->return_reg;
2776 }
2777
2778 void
2779 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2780 {
2781 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2782 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2783 st_src_reg levels_src;
2784 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2785 glsl_to_tgsi_instruction *inst = NULL;
2786 unsigned opcode = TGSI_OPCODE_NOP;
2787 const glsl_type *sampler_type = ir->sampler->type;
2788 ir_rvalue *sampler_index =
2789 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2790 bool is_cube_array = false;
2791 unsigned i;
2792
2793 /* if we are a cube array sampler */
2794 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2795 sampler_type->sampler_array)) {
2796 is_cube_array = true;
2797 }
2798
2799 if (ir->coordinate) {
2800 ir->coordinate->accept(this);
2801
2802 /* Put our coords in a temp. We'll need to modify them for shadow,
2803 * projection, or LOD, so the only case we'd use it as is is if
2804 * we're doing plain old texturing. The optimization passes on
2805 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2806 */
2807 coord = get_temp(glsl_type::vec4_type);
2808 coord_dst = st_dst_reg(coord);
2809 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2810 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2811 }
2812
2813 if (ir->projector) {
2814 ir->projector->accept(this);
2815 projector = this->result;
2816 }
2817
2818 /* Storage for our result. Ideally for an assignment we'd be using
2819 * the actual storage for the result here, instead.
2820 */
2821 result_src = get_temp(ir->type);
2822 result_dst = st_dst_reg(result_src);
2823
2824 switch (ir->op) {
2825 case ir_tex:
2826 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2827 if (ir->offset) {
2828 ir->offset->accept(this);
2829 offset[0] = this->result;
2830 }
2831 break;
2832 case ir_txb:
2833 if (is_cube_array ||
2834 sampler_type == glsl_type::samplerCubeShadow_type) {
2835 opcode = TGSI_OPCODE_TXB2;
2836 }
2837 else {
2838 opcode = TGSI_OPCODE_TXB;
2839 }
2840 ir->lod_info.bias->accept(this);
2841 lod_info = this->result;
2842 if (ir->offset) {
2843 ir->offset->accept(this);
2844 offset[0] = this->result;
2845 }
2846 break;
2847 case ir_txl:
2848 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2849 ir->lod_info.lod->accept(this);
2850 lod_info = this->result;
2851 if (ir->offset) {
2852 ir->offset->accept(this);
2853 offset[0] = this->result;
2854 }
2855 break;
2856 case ir_txd:
2857 opcode = TGSI_OPCODE_TXD;
2858 ir->lod_info.grad.dPdx->accept(this);
2859 dx = this->result;
2860 ir->lod_info.grad.dPdy->accept(this);
2861 dy = this->result;
2862 if (ir->offset) {
2863 ir->offset->accept(this);
2864 offset[0] = this->result;
2865 }
2866 break;
2867 case ir_txs:
2868 opcode = TGSI_OPCODE_TXQ;
2869 ir->lod_info.lod->accept(this);
2870 lod_info = this->result;
2871 break;
2872 case ir_query_levels:
2873 opcode = TGSI_OPCODE_TXQ;
2874 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2875 levels_src = get_temp(ir->type);
2876 break;
2877 case ir_txf:
2878 opcode = TGSI_OPCODE_TXF;
2879 ir->lod_info.lod->accept(this);
2880 lod_info = this->result;
2881 if (ir->offset) {
2882 ir->offset->accept(this);
2883 offset[0] = this->result;
2884 }
2885 break;
2886 case ir_txf_ms:
2887 opcode = TGSI_OPCODE_TXF;
2888 ir->lod_info.sample_index->accept(this);
2889 sample_index = this->result;
2890 break;
2891 case ir_tg4:
2892 opcode = TGSI_OPCODE_TG4;
2893 ir->lod_info.component->accept(this);
2894 component = this->result;
2895 if (ir->offset) {
2896 ir->offset->accept(this);
2897 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2898 const glsl_type *elt_type = ir->offset->type->fields.array;
2899 for (i = 0; i < ir->offset->type->length; i++) {
2900 offset[i] = this->result;
2901 offset[i].index += i * type_size(elt_type);
2902 offset[i].type = elt_type->base_type;
2903 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2904 }
2905 } else {
2906 offset[0] = this->result;
2907 }
2908 }
2909 break;
2910 case ir_lod:
2911 opcode = TGSI_OPCODE_LODQ;
2912 break;
2913 }
2914
2915 if (ir->projector) {
2916 if (opcode == TGSI_OPCODE_TEX) {
2917 /* Slot the projector in as the last component of the coord. */
2918 coord_dst.writemask = WRITEMASK_W;
2919 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2920 coord_dst.writemask = WRITEMASK_XYZW;
2921 opcode = TGSI_OPCODE_TXP;
2922 } else {
2923 st_src_reg coord_w = coord;
2924 coord_w.swizzle = SWIZZLE_WWWW;
2925
2926 /* For the other TEX opcodes there's no projective version
2927 * since the last slot is taken up by LOD info. Do the
2928 * projective divide now.
2929 */
2930 coord_dst.writemask = WRITEMASK_W;
2931 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2932
2933 /* In the case where we have to project the coordinates "by hand,"
2934 * the shadow comparator value must also be projected.
2935 */
2936 st_src_reg tmp_src = coord;
2937 if (ir->shadow_comparitor) {
2938 /* Slot the shadow value in as the second to last component of the
2939 * coord.
2940 */
2941 ir->shadow_comparitor->accept(this);
2942
2943 tmp_src = get_temp(glsl_type::vec4_type);
2944 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2945
2946 /* Projective division not allowed for array samplers. */
2947 assert(!sampler_type->sampler_array);
2948
2949 tmp_dst.writemask = WRITEMASK_Z;
2950 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2951
2952 tmp_dst.writemask = WRITEMASK_XY;
2953 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2954 }
2955
2956 coord_dst.writemask = WRITEMASK_XYZ;
2957 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2958
2959 coord_dst.writemask = WRITEMASK_XYZW;
2960 coord.swizzle = SWIZZLE_XYZW;
2961 }
2962 }
2963
2964 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2965 * comparator was put in the correct place (and projected) by the code,
2966 * above, that handles by-hand projection.
2967 */
2968 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2969 /* Slot the shadow value in as the second to last component of the
2970 * coord.
2971 */
2972 ir->shadow_comparitor->accept(this);
2973
2974 if (is_cube_array) {
2975 cube_sc = get_temp(glsl_type::float_type);
2976 cube_sc_dst = st_dst_reg(cube_sc);
2977 cube_sc_dst.writemask = WRITEMASK_X;
2978 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2979 cube_sc_dst.writemask = WRITEMASK_X;
2980 }
2981 else {
2982 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2983 sampler_type->sampler_array) ||
2984 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2985 coord_dst.writemask = WRITEMASK_W;
2986 } else {
2987 coord_dst.writemask = WRITEMASK_Z;
2988 }
2989 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2990 coord_dst.writemask = WRITEMASK_XYZW;
2991 }
2992 }
2993
2994 if (ir->op == ir_txf_ms) {
2995 coord_dst.writemask = WRITEMASK_W;
2996 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2997 coord_dst.writemask = WRITEMASK_XYZW;
2998 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2999 opcode == TGSI_OPCODE_TXF) {
3000 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3001 coord_dst.writemask = WRITEMASK_W;
3002 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
3003 coord_dst.writemask = WRITEMASK_XYZW;
3004 }
3005
3006 if (sampler_index) {
3007 sampler_index->accept(this);
3008 emit_arl(ir, sampler_reladdr, this->result);
3009 }
3010
3011 if (opcode == TGSI_OPCODE_TXD)
3012 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3013 else if (opcode == TGSI_OPCODE_TXQ) {
3014 if (ir->op == ir_query_levels) {
3015 /* the level is stored in W */
3016 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3017 result_dst.writemask = WRITEMASK_X;
3018 levels_src.swizzle = SWIZZLE_WWWW;
3019 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3020 } else
3021 inst = emit(ir, opcode, result_dst, lod_info);
3022 } else if (opcode == TGSI_OPCODE_TXF) {
3023 inst = emit(ir, opcode, result_dst, coord);
3024 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3025 inst = emit(ir, opcode, result_dst, coord, lod_info);
3026 } else if (opcode == TGSI_OPCODE_TEX2) {
3027 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3028 } else if (opcode == TGSI_OPCODE_TG4) {
3029 if (is_cube_array && ir->shadow_comparitor) {
3030 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3031 } else {
3032 inst = emit(ir, opcode, result_dst, coord, component);
3033 }
3034 } else
3035 inst = emit(ir, opcode, result_dst, coord);
3036
3037 if (ir->shadow_comparitor)
3038 inst->tex_shadow = GL_TRUE;
3039
3040 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3041 this->shader_program,
3042 this->prog);
3043 if (sampler_index) {
3044 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3045 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3046 inst->sampler_array_size =
3047 ir->sampler->as_dereference_array()->array->type->array_size();
3048 } else {
3049 inst->sampler_array_size = 1;
3050 }
3051
3052 if (ir->offset) {
3053 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3054 inst->tex_offsets[i] = offset[i];
3055 inst->tex_offset_num_offset = i;
3056 }
3057
3058 switch (sampler_type->sampler_dimensionality) {
3059 case GLSL_SAMPLER_DIM_1D:
3060 inst->tex_target = (sampler_type->sampler_array)
3061 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3062 break;
3063 case GLSL_SAMPLER_DIM_2D:
3064 inst->tex_target = (sampler_type->sampler_array)
3065 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3066 break;
3067 case GLSL_SAMPLER_DIM_3D:
3068 inst->tex_target = TEXTURE_3D_INDEX;
3069 break;
3070 case GLSL_SAMPLER_DIM_CUBE:
3071 inst->tex_target = (sampler_type->sampler_array)
3072 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3073 break;
3074 case GLSL_SAMPLER_DIM_RECT:
3075 inst->tex_target = TEXTURE_RECT_INDEX;
3076 break;
3077 case GLSL_SAMPLER_DIM_BUF:
3078 inst->tex_target = TEXTURE_BUFFER_INDEX;
3079 break;
3080 case GLSL_SAMPLER_DIM_EXTERNAL:
3081 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3082 break;
3083 case GLSL_SAMPLER_DIM_MS:
3084 inst->tex_target = (sampler_type->sampler_array)
3085 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3086 break;
3087 default:
3088 assert(!"Should not get here.");
3089 }
3090
3091 this->result = result_src;
3092 }
3093
3094 void
3095 glsl_to_tgsi_visitor::visit(ir_return *ir)
3096 {
3097 if (ir->get_value()) {
3098 st_dst_reg l;
3099 int i;
3100
3101 assert(current_function);
3102
3103 ir->get_value()->accept(this);
3104 st_src_reg r = this->result;
3105
3106 l = st_dst_reg(current_function->return_reg);
3107
3108 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3109 emit(ir, TGSI_OPCODE_MOV, l, r);
3110 l.index++;
3111 r.index++;
3112 }
3113 }
3114
3115 emit(ir, TGSI_OPCODE_RET);
3116 }
3117
3118 void
3119 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3120 {
3121 if (ir->condition) {
3122 ir->condition->accept(this);
3123 st_src_reg condition = this->result;
3124
3125 /* Convert the bool condition to a float so we can negate. */
3126 if (native_integers) {
3127 st_src_reg temp = get_temp(ir->condition->type);
3128 emit(ir, TGSI_OPCODE_AND, st_dst_reg(temp),
3129 condition, st_src_reg_for_float(1.0));
3130 condition = temp;
3131 }
3132
3133 condition.negate = ~condition.negate;
3134 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition);
3135 } else {
3136 /* unconditional kil */
3137 emit(ir, TGSI_OPCODE_KILL);
3138 }
3139 }
3140
3141 void
3142 glsl_to_tgsi_visitor::visit(ir_if *ir)
3143 {
3144 unsigned if_opcode;
3145 glsl_to_tgsi_instruction *if_inst;
3146
3147 ir->condition->accept(this);
3148 assert(this->result.file != PROGRAM_UNDEFINED);
3149
3150 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3151
3152 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3153
3154 this->instructions.push_tail(if_inst);
3155
3156 visit_exec_list(&ir->then_instructions, this);
3157
3158 if (!ir->else_instructions.is_empty()) {
3159 emit(ir->condition, TGSI_OPCODE_ELSE);
3160 visit_exec_list(&ir->else_instructions, this);
3161 }
3162
3163 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3164 }
3165
3166
3167 void
3168 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3169 {
3170 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3171
3172 ir->stream->accept(this);
3173 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3174 }
3175
3176 void
3177 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3178 {
3179 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3180
3181 ir->stream->accept(this);
3182 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3183 }
3184
3185 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3186 {
3187 result.file = PROGRAM_UNDEFINED;
3188 next_temp = 1;
3189 next_array = 0;
3190 next_signature_id = 1;
3191 num_immediates = 0;
3192 current_function = NULL;
3193 num_address_regs = 0;
3194 samplers_used = 0;
3195 indirect_addr_consts = false;
3196 glsl_version = 0;
3197 native_integers = false;
3198 mem_ctx = ralloc_context(NULL);
3199 ctx = NULL;
3200 prog = NULL;
3201 shader_program = NULL;
3202 shader = NULL;
3203 options = NULL;
3204 have_sqrt = false;
3205 }
3206
3207 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3208 {
3209 ralloc_free(mem_ctx);
3210 }
3211
3212 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3213 {
3214 delete v;
3215 }
3216
3217
3218 /**
3219 * Count resources used by the given gpu program (number of texture
3220 * samplers, etc).
3221 */
3222 static void
3223 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3224 {
3225 v->samplers_used = 0;
3226
3227 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3228 if (is_tex_instruction(inst->op)) {
3229 for (int i = 0; i < inst->sampler_array_size; i++) {
3230 v->samplers_used |= 1 << (inst->sampler.index + i);
3231
3232 if (inst->tex_shadow) {
3233 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3234 }
3235 }
3236 }
3237 }
3238 prog->SamplersUsed = v->samplers_used;
3239
3240 if (v->shader_program != NULL)
3241 _mesa_update_shader_textures_used(v->shader_program, prog);
3242 }
3243
3244 /**
3245 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3246 * are read from the given src in this instruction
3247 */
3248 static int
3249 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3250 {
3251 int read_mask = 0, comp;
3252
3253 /* Now, given the src swizzle and the written channels, find which
3254 * components are actually read
3255 */
3256 for (comp = 0; comp < 4; ++comp) {
3257 const unsigned coord = GET_SWZ(src.swizzle, comp);
3258 ASSERT(coord < 4);
3259 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3260 read_mask |= 1 << coord;
3261 }
3262
3263 return read_mask;
3264 }
3265
3266 /**
3267 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3268 * instruction is the first instruction to write to register T0. There are
3269 * several lowering passes done in GLSL IR (e.g. branches and
3270 * relative addressing) that create a large number of conditional assignments
3271 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3272 *
3273 * Here is why this conversion is safe:
3274 * CMP T0, T1 T2 T0 can be expanded to:
3275 * if (T1 < 0.0)
3276 * MOV T0, T2;
3277 * else
3278 * MOV T0, T0;
3279 *
3280 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3281 * as the original program. If (T1 < 0.0) evaluates to false, executing
3282 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3283 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3284 * because any instruction that was going to read from T0 after this was going
3285 * to read a garbage value anyway.
3286 */
3287 void
3288 glsl_to_tgsi_visitor::simplify_cmp(void)
3289 {
3290 int tempWritesSize = 0;
3291 unsigned *tempWrites = NULL;
3292 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3293
3294 memset(outputWrites, 0, sizeof(outputWrites));
3295
3296 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3297 unsigned prevWriteMask = 0;
3298
3299 /* Give up if we encounter relative addressing or flow control. */
3300 if (inst->dst[0].reladdr ||
3301 tgsi_get_opcode_info(inst->op)->is_branch ||
3302 inst->op == TGSI_OPCODE_BGNSUB ||
3303 inst->op == TGSI_OPCODE_CONT ||
3304 inst->op == TGSI_OPCODE_END ||
3305 inst->op == TGSI_OPCODE_ENDSUB ||
3306 inst->op == TGSI_OPCODE_RET) {
3307 break;
3308 }
3309
3310 if (inst->dst[0].file == PROGRAM_OUTPUT) {
3311 assert(inst->dst[0].index < MAX_PROGRAM_OUTPUTS);
3312 prevWriteMask = outputWrites[inst->dst[0].index];
3313 outputWrites[inst->dst[0].index] |= inst->dst[0].writemask;
3314 } else if (inst->dst[0].file == PROGRAM_TEMPORARY) {
3315 if (inst->dst[0].index >= tempWritesSize) {
3316 const int inc = 4096;
3317
3318 tempWrites = (unsigned*)
3319 realloc(tempWrites,
3320 (tempWritesSize + inc) * sizeof(unsigned));
3321 if (!tempWrites)
3322 return;
3323
3324 memset(tempWrites + tempWritesSize, 0, inc * sizeof(unsigned));
3325 tempWritesSize += inc;
3326 }
3327
3328 prevWriteMask = tempWrites[inst->dst[0].index];
3329 tempWrites[inst->dst[0].index] |= inst->dst[0].writemask;
3330 } else
3331 continue;
3332
3333 /* For a CMP to be considered a conditional write, the destination
3334 * register and source register two must be the same. */
3335 if (inst->op == TGSI_OPCODE_CMP
3336 && !(inst->dst[0].writemask & prevWriteMask)
3337 && inst->src[2].file == inst->dst[0].file
3338 && inst->src[2].index == inst->dst[0].index
3339 && inst->dst[0].writemask == get_src_arg_mask(inst->dst[0], inst->src[2])) {
3340
3341 inst->op = TGSI_OPCODE_MOV;
3342 inst->src[0] = inst->src[1];
3343 }
3344 }
3345
3346 free(tempWrites);
3347 }
3348
3349 /* Replaces all references to a temporary register index with another index. */
3350 void
3351 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3352 {
3353 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3354 unsigned j;
3355
3356 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3357 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3358 inst->src[j].index == index) {
3359 inst->src[j].index = new_index;
3360 }
3361 }
3362
3363 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3364 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3365 inst->tex_offsets[j].index == index) {
3366 inst->tex_offsets[j].index = new_index;
3367 }
3368 }
3369
3370 if (inst->dst[0].file == PROGRAM_TEMPORARY && inst->dst[0].index == index) {
3371 inst->dst[0].index = new_index;
3372 }
3373 }
3374 }
3375
3376 int
3377 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3378 {
3379 int depth = 0; /* loop depth */
3380 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3381 unsigned i = 0, j;
3382
3383 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3384 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3385 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3386 inst->src[j].index == index) {
3387 return (depth == 0) ? i : loop_start;
3388 }
3389 }
3390 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3391 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3392 inst->tex_offsets[j].index == index) {
3393 return (depth == 0) ? i : loop_start;
3394 }
3395 }
3396 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3397 if(depth++ == 0)
3398 loop_start = i;
3399 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3400 if (--depth == 0)
3401 loop_start = -1;
3402 }
3403 assert(depth >= 0);
3404 i++;
3405 }
3406 return -1;
3407 }
3408
3409 int
3410 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3411 {
3412 int depth = 0; /* loop depth */
3413 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3414 int i = 0;
3415
3416 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3417 if (inst->dst[0].file == PROGRAM_TEMPORARY && inst->dst[0].index == index) {
3418 return (depth == 0) ? i : loop_start;
3419 }
3420 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3421 if(depth++ == 0)
3422 loop_start = i;
3423 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3424 if (--depth == 0)
3425 loop_start = -1;
3426 }
3427 assert(depth >= 0);
3428 i++;
3429 }
3430 return -1;
3431 }
3432
3433 int
3434 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3435 {
3436 int depth = 0; /* loop depth */
3437 int last = -1; /* index of last instruction that reads the temporary */
3438 unsigned i = 0, j;
3439
3440 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3441 for (j = 0; j < num_inst_src_regs(inst->op); j++) {
3442 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3443 inst->src[j].index == index) {
3444 last = (depth == 0) ? i : -2;
3445 }
3446 }
3447 for (j = 0; j < inst->tex_offset_num_offset; j++) {
3448 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3449 inst->tex_offsets[j].index == index)
3450 last = (depth == 0) ? i : -2;
3451 }
3452 if (inst->op == TGSI_OPCODE_BGNLOOP)
3453 depth++;
3454 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3455 if (--depth == 0 && last == -2)
3456 last = i;
3457 assert(depth >= 0);
3458 i++;
3459 }
3460 assert(last >= -1);
3461 return last;
3462 }
3463
3464 int
3465 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3466 {
3467 int depth = 0; /* loop depth */
3468 int last = -1; /* index of last instruction that writes to the temporary */
3469 int i = 0;
3470
3471 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3472 if (inst->dst[0].file == PROGRAM_TEMPORARY && inst->dst[0].index == index)
3473 last = (depth == 0) ? i : -2;
3474
3475 if (inst->op == TGSI_OPCODE_BGNLOOP)
3476 depth++;
3477 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3478 if (--depth == 0 && last == -2)
3479 last = i;
3480 assert(depth >= 0);
3481 i++;
3482 }
3483 assert(last >= -1);
3484 return last;
3485 }
3486
3487 /*
3488 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3489 * channels for copy propagation and updates following instructions to
3490 * use the original versions.
3491 *
3492 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3493 * will occur. As an example, a TXP production before this pass:
3494 *
3495 * 0: MOV TEMP[1], INPUT[4].xyyy;
3496 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3497 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3498 *
3499 * and after:
3500 *
3501 * 0: MOV TEMP[1], INPUT[4].xyyy;
3502 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3503 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3504 *
3505 * which allows for dead code elimination on TEMP[1]'s writes.
3506 */
3507 void
3508 glsl_to_tgsi_visitor::copy_propagate(void)
3509 {
3510 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3511 glsl_to_tgsi_instruction *,
3512 this->next_temp * 4);
3513 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3514 int level = 0;
3515
3516 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3517 assert(inst->dst[0].file != PROGRAM_TEMPORARY
3518 || inst->dst[0].index < this->next_temp);
3519
3520 /* First, do any copy propagation possible into the src regs. */
3521 for (int r = 0; r < 3; r++) {
3522 glsl_to_tgsi_instruction *first = NULL;
3523 bool good = true;
3524 int acp_base = inst->src[r].index * 4;
3525
3526 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3527 inst->src[r].reladdr ||
3528 inst->src[r].reladdr2)
3529 continue;
3530
3531 /* See if we can find entries in the ACP consisting of MOVs
3532 * from the same src register for all the swizzled channels
3533 * of this src register reference.
3534 */
3535 for (int i = 0; i < 4; i++) {
3536 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3537 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3538
3539 if (!copy_chan) {
3540 good = false;
3541 break;
3542 }
3543
3544 assert(acp_level[acp_base + src_chan] <= level);
3545
3546 if (!first) {
3547 first = copy_chan;
3548 } else {
3549 if (first->src[0].file != copy_chan->src[0].file ||
3550 first->src[0].index != copy_chan->src[0].index ||
3551 first->src[0].index2D != copy_chan->src[0].index2D) {
3552 good = false;
3553 break;
3554 }
3555 }
3556 }
3557
3558 if (good) {
3559 /* We've now validated that we can copy-propagate to
3560 * replace this src register reference. Do it.
3561 */
3562 inst->src[r].file = first->src[0].file;
3563 inst->src[r].index = first->src[0].index;
3564 inst->src[r].index2D = first->src[0].index2D;
3565 inst->src[r].has_index2 = first->src[0].has_index2;
3566
3567 int swizzle = 0;
3568 for (int i = 0; i < 4; i++) {
3569 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3570 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3571 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << (3 * i));
3572 }
3573 inst->src[r].swizzle = swizzle;
3574 }
3575 }
3576
3577 switch (inst->op) {
3578 case TGSI_OPCODE_BGNLOOP:
3579 case TGSI_OPCODE_ENDLOOP:
3580 /* End of a basic block, clear the ACP entirely. */
3581 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3582 break;
3583
3584 case TGSI_OPCODE_IF:
3585 case TGSI_OPCODE_UIF:
3586 ++level;
3587 break;
3588
3589 case TGSI_OPCODE_ENDIF:
3590 case TGSI_OPCODE_ELSE:
3591 /* Clear all channels written inside the block from the ACP, but
3592 * leaving those that were not touched.
3593 */
3594 for (int r = 0; r < this->next_temp; r++) {
3595 for (int c = 0; c < 4; c++) {
3596 if (!acp[4 * r + c])
3597 continue;
3598
3599 if (acp_level[4 * r + c] >= level)
3600 acp[4 * r + c] = NULL;
3601 }
3602 }
3603 if (inst->op == TGSI_OPCODE_ENDIF)
3604 --level;
3605 break;
3606
3607 default:
3608 /* Continuing the block, clear any written channels from
3609 * the ACP.
3610 */
3611 if (inst->dst[0].file == PROGRAM_TEMPORARY && inst->dst[0].reladdr) {
3612 /* Any temporary might be written, so no copy propagation
3613 * across this instruction.
3614 */
3615 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3616 } else if (inst->dst[0].file == PROGRAM_OUTPUT &&
3617 inst->dst[0].reladdr) {
3618 /* Any output might be written, so no copy propagation
3619 * from outputs across this instruction.
3620 */
3621 for (int r = 0; r < this->next_temp; r++) {
3622 for (int c = 0; c < 4; c++) {
3623 if (!acp[4 * r + c])
3624 continue;
3625
3626 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3627 acp[4 * r + c] = NULL;
3628 }
3629 }
3630 } else if (inst->dst[0].file == PROGRAM_TEMPORARY ||
3631 inst->dst[0].file == PROGRAM_OUTPUT) {
3632 /* Clear where it's used as dst. */
3633 if (inst->dst[0].file == PROGRAM_TEMPORARY) {
3634 for (int c = 0; c < 4; c++) {
3635 if (inst->dst[0].writemask & (1 << c)) {
3636 acp[4 * inst->dst[0].index + c] = NULL;
3637 }
3638 }
3639 }
3640
3641 /* Clear where it's used as src. */
3642 for (int r = 0; r < this->next_temp; r++) {
3643 for (int c = 0; c < 4; c++) {
3644 if (!acp[4 * r + c])
3645 continue;
3646
3647 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3648
3649 if (acp[4 * r + c]->src[0].file == inst->dst[0].file &&
3650 acp[4 * r + c]->src[0].index == inst->dst[0].index &&
3651 inst->dst[0].writemask & (1 << src_chan))
3652 acp[4 * r + c] = NULL;
3653 }
3654 }
3655 }
3656 break;
3657 }
3658
3659 /* If this is a copy, add it to the ACP. */
3660 if (inst->op == TGSI_OPCODE_MOV &&
3661 inst->dst[0].file == PROGRAM_TEMPORARY &&
3662 !(inst->dst[0].file == inst->src[0].file &&
3663 inst->dst[0].index == inst->src[0].index) &&
3664 !inst->dst[0].reladdr &&
3665 !inst->saturate &&
3666 !inst->src[0].reladdr &&
3667 !inst->src[0].reladdr2 &&
3668 !inst->src[0].negate) {
3669 for (int i = 0; i < 4; i++) {
3670 if (inst->dst[0].writemask & (1 << i)) {
3671 acp[4 * inst->dst[0].index + i] = inst;
3672 acp_level[4 * inst->dst[0].index + i] = level;
3673 }
3674 }
3675 }
3676 }
3677
3678 ralloc_free(acp_level);
3679 ralloc_free(acp);
3680 }
3681
3682 /*
3683 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3684 * code elimination.
3685 *
3686 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3687 * will occur. As an example, a TXP production after copy propagation but
3688 * before this pass:
3689 *
3690 * 0: MOV TEMP[1], INPUT[4].xyyy;
3691 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3692 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3693 *
3694 * and after this pass:
3695 *
3696 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3697 */
3698 int
3699 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3700 {
3701 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3702 glsl_to_tgsi_instruction *,
3703 this->next_temp * 4);
3704 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3705 int level = 0;
3706 int removed = 0;
3707
3708 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3709 assert(inst->dst[0].file != PROGRAM_TEMPORARY
3710 || inst->dst[0].index < this->next_temp);
3711
3712 switch (inst->op) {
3713 case TGSI_OPCODE_BGNLOOP:
3714 case TGSI_OPCODE_ENDLOOP:
3715 case TGSI_OPCODE_CONT:
3716 case TGSI_OPCODE_BRK:
3717 /* End of a basic block, clear the write array entirely.
3718 *
3719 * This keeps us from killing dead code when the writes are
3720 * on either side of a loop, even when the register isn't touched
3721 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3722 * dead code of this type, so it shouldn't make a difference as long as
3723 * the dead code elimination pass in the GLSL compiler does its job.
3724 */
3725 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3726 break;
3727
3728 case TGSI_OPCODE_ENDIF:
3729 case TGSI_OPCODE_ELSE:
3730 /* Promote the recorded level of all channels written inside the
3731 * preceding if or else block to the level above the if/else block.
3732 */
3733 for (int r = 0; r < this->next_temp; r++) {
3734 for (int c = 0; c < 4; c++) {
3735 if (!writes[4 * r + c])
3736 continue;
3737
3738 if (write_level[4 * r + c] == level)
3739 write_level[4 * r + c] = level-1;
3740 }
3741 }
3742 if(inst->op == TGSI_OPCODE_ENDIF)
3743 --level;
3744 break;
3745
3746 case TGSI_OPCODE_IF:
3747 case TGSI_OPCODE_UIF:
3748 ++level;
3749 /* fallthrough to default case to mark the condition as read */
3750 default:
3751 /* Continuing the block, clear any channels from the write array that
3752 * are read by this instruction.
3753 */
3754 for (unsigned i = 0; i < Elements(inst->src); i++) {
3755 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3756 /* Any temporary might be read, so no dead code elimination
3757 * across this instruction.
3758 */
3759 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3760 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3761 /* Clear where it's used as src. */
3762 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3763 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3764 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3765 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3766
3767 for (int c = 0; c < 4; c++) {
3768 if (src_chans & (1 << c))
3769 writes[4 * inst->src[i].index + c] = NULL;
3770 }
3771 }
3772 }
3773 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3774 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3775 /* Any temporary might be read, so no dead code elimination
3776 * across this instruction.
3777 */
3778 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3779 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3780 /* Clear where it's used as src. */
3781 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3782 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3783 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3784 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3785
3786 for (int c = 0; c < 4; c++) {
3787 if (src_chans & (1 << c))
3788 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3789 }
3790 }
3791 }
3792 break;
3793 }
3794
3795 /* If this instruction writes to a temporary, add it to the write array.
3796 * If there is already an instruction in the write array for one or more
3797 * of the channels, flag that channel write as dead.
3798 */
3799 if (inst->dst[0].file == PROGRAM_TEMPORARY &&
3800 !inst->dst[0].reladdr &&
3801 !inst->saturate) {
3802 for (int c = 0; c < 4; c++) {
3803 if (inst->dst[0].writemask & (1 << c)) {
3804 if (writes[4 * inst->dst[0].index + c]) {
3805 if (write_level[4 * inst->dst[0].index + c] < level)
3806 continue;
3807 else
3808 writes[4 * inst->dst[0].index + c]->dead_mask |= (1 << c);
3809 }
3810 writes[4 * inst->dst[0].index + c] = inst;
3811 write_level[4 * inst->dst[0].index + c] = level;
3812 }
3813 }
3814 }
3815 }
3816
3817 /* Anything still in the write array at this point is dead code. */
3818 for (int r = 0; r < this->next_temp; r++) {
3819 for (int c = 0; c < 4; c++) {
3820 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3821 if (inst)
3822 inst->dead_mask |= (1 << c);
3823 }
3824 }
3825
3826 /* Now actually remove the instructions that are completely dead and update
3827 * the writemask of other instructions with dead channels.
3828 */
3829 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3830 if (!inst->dead_mask || !inst->dst[0].writemask)
3831 continue;
3832 else if ((inst->dst[0].writemask & ~inst->dead_mask) == 0) {
3833 inst->remove();
3834 delete inst;
3835 removed++;
3836 } else
3837 inst->dst[0].writemask &= ~(inst->dead_mask);
3838 }
3839
3840 ralloc_free(write_level);
3841 ralloc_free(writes);
3842
3843 return removed;
3844 }
3845
3846 /* Merges temporary registers together where possible to reduce the number of
3847 * registers needed to run a program.
3848 *
3849 * Produces optimal code only after copy propagation and dead code elimination
3850 * have been run. */
3851 void
3852 glsl_to_tgsi_visitor::merge_registers(void)
3853 {
3854 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3855 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3856 int i, j;
3857
3858 /* Read the indices of the last read and first write to each temp register
3859 * into an array so that we don't have to traverse the instruction list as
3860 * much. */
3861 for (i = 0; i < this->next_temp; i++) {
3862 last_reads[i] = get_last_temp_read(i);
3863 first_writes[i] = get_first_temp_write(i);
3864 }
3865
3866 /* Start looking for registers with non-overlapping usages that can be
3867 * merged together. */
3868 for (i = 0; i < this->next_temp; i++) {
3869 /* Don't touch unused registers. */
3870 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3871
3872 for (j = 0; j < this->next_temp; j++) {
3873 /* Don't touch unused registers. */
3874 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3875
3876 /* We can merge the two registers if the first write to j is after or
3877 * in the same instruction as the last read from i. Note that the
3878 * register at index i will always be used earlier or at the same time
3879 * as the register at index j. */
3880 if (first_writes[i] <= first_writes[j] &&
3881 last_reads[i] <= first_writes[j]) {
3882 rename_temp_register(j, i); /* Replace all references to j with i.*/
3883
3884 /* Update the first_writes and last_reads arrays with the new
3885 * values for the merged register index, and mark the newly unused
3886 * register index as such. */
3887 last_reads[i] = last_reads[j];
3888 first_writes[j] = -1;
3889 last_reads[j] = -1;
3890 }
3891 }
3892 }
3893
3894 ralloc_free(last_reads);
3895 ralloc_free(first_writes);
3896 }
3897
3898 /* Reassign indices to temporary registers by reusing unused indices created
3899 * by optimization passes. */
3900 void
3901 glsl_to_tgsi_visitor::renumber_registers(void)
3902 {
3903 int i = 0;
3904 int new_index = 0;
3905
3906 for (i = 0; i < this->next_temp; i++) {
3907 if (get_first_temp_read(i) < 0) continue;
3908 if (i != new_index)
3909 rename_temp_register(i, new_index);
3910 new_index++;
3911 }
3912
3913 this->next_temp = new_index;
3914 }
3915
3916 /**
3917 * Returns a fragment program which implements the current pixel transfer ops.
3918 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3919 */
3920 extern "C" void
3921 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3922 glsl_to_tgsi_visitor *original,
3923 int scale_and_bias, int pixel_maps)
3924 {
3925 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3926 struct st_context *st = st_context(original->ctx);
3927 struct gl_program *prog = &fp->Base.Base;
3928 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3929 st_src_reg coord, src0;
3930 st_dst_reg dst0;
3931 glsl_to_tgsi_instruction *inst;
3932
3933 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3934 v->ctx = original->ctx;
3935 v->prog = prog;
3936 v->shader_program = NULL;
3937 v->shader = NULL;
3938 v->glsl_version = original->glsl_version;
3939 v->native_integers = original->native_integers;
3940 v->options = original->options;
3941 v->next_temp = original->next_temp;
3942 v->num_address_regs = original->num_address_regs;
3943 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3944 v->indirect_addr_consts = original->indirect_addr_consts;
3945 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3946 v->num_immediates = original->num_immediates;
3947
3948 /*
3949 * Get initial pixel color from the texture.
3950 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3951 */
3952 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3953 src0 = v->get_temp(glsl_type::vec4_type);
3954 dst0 = st_dst_reg(src0);
3955 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3956 inst->sampler_array_size = 1;
3957 inst->tex_target = TEXTURE_2D_INDEX;
3958
3959 prog->InputsRead |= VARYING_BIT_TEX0;
3960 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3961 v->samplers_used |= (1 << 0);
3962
3963 if (scale_and_bias) {
3964 static const gl_state_index scale_state[STATE_LENGTH] =
3965 { STATE_INTERNAL, STATE_PT_SCALE,
3966 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3967 static const gl_state_index bias_state[STATE_LENGTH] =
3968 { STATE_INTERNAL, STATE_PT_BIAS,
3969 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3970 GLint scale_p, bias_p;
3971 st_src_reg scale, bias;
3972
3973 scale_p = _mesa_add_state_reference(params, scale_state);
3974 bias_p = _mesa_add_state_reference(params, bias_state);
3975
3976 /* MAD colorTemp, colorTemp, scale, bias; */
3977 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3978 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3979 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3980 }
3981
3982 if (pixel_maps) {
3983 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3984 st_dst_reg temp_dst = st_dst_reg(temp);
3985
3986 assert(st->pixel_xfer.pixelmap_texture);
3987
3988 /* With a little effort, we can do four pixel map look-ups with
3989 * two TEX instructions:
3990 */
3991
3992 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3993 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3994 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3995 inst->sampler.index = 1;
3996 inst->sampler_array_size = 1;
3997 inst->tex_target = TEXTURE_2D_INDEX;
3998
3999 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4000 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4001 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4002 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4003 inst->sampler.index = 1;
4004 inst->sampler_array_size = 1;
4005 inst->tex_target = TEXTURE_2D_INDEX;
4006
4007 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4008 v->samplers_used |= (1 << 1);
4009
4010 /* MOV colorTemp, temp; */
4011 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4012 }
4013
4014 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4015 * new visitor. */
4016 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4017 glsl_to_tgsi_instruction *newinst;
4018 st_src_reg src_regs[3];
4019
4020 if (inst->dst[0].file == PROGRAM_OUTPUT)
4021 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst[0].index);
4022
4023 for (int i = 0; i < 3; i++) {
4024 src_regs[i] = inst->src[i];
4025 if (src_regs[i].file == PROGRAM_INPUT &&
4026 src_regs[i].index == VARYING_SLOT_COL0) {
4027 src_regs[i].file = PROGRAM_TEMPORARY;
4028 src_regs[i].index = src0.index;
4029 }
4030 else if (src_regs[i].file == PROGRAM_INPUT)
4031 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4032 }
4033
4034 newinst = v->emit(NULL, inst->op, inst->dst[0], src_regs[0], src_regs[1], src_regs[2]);
4035 newinst->tex_target = inst->tex_target;
4036 newinst->sampler_array_size = inst->sampler_array_size;
4037 }
4038
4039 /* Make modifications to fragment program info. */
4040 prog->Parameters = _mesa_combine_parameter_lists(params,
4041 original->prog->Parameters);
4042 _mesa_free_parameter_list(params);
4043 count_resources(v, prog);
4044 fp->glsl_to_tgsi = v;
4045 }
4046
4047 /**
4048 * Make fragment program for glBitmap:
4049 * Sample the texture and kill the fragment if the bit is 0.
4050 * This program will be combined with the user's fragment program.
4051 *
4052 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4053 */
4054 extern "C" void
4055 get_bitmap_visitor(struct st_fragment_program *fp,
4056 glsl_to_tgsi_visitor *original, int samplerIndex)
4057 {
4058 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4059 struct st_context *st = st_context(original->ctx);
4060 struct gl_program *prog = &fp->Base.Base;
4061 st_src_reg coord, src0;
4062 st_dst_reg dst0;
4063 glsl_to_tgsi_instruction *inst;
4064
4065 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4066 v->ctx = original->ctx;
4067 v->prog = prog;
4068 v->shader_program = NULL;
4069 v->shader = NULL;
4070 v->glsl_version = original->glsl_version;
4071 v->native_integers = original->native_integers;
4072 v->options = original->options;
4073 v->next_temp = original->next_temp;
4074 v->num_address_regs = original->num_address_regs;
4075 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4076 v->indirect_addr_consts = original->indirect_addr_consts;
4077 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4078 v->num_immediates = original->num_immediates;
4079
4080 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4081 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4082 src0 = v->get_temp(glsl_type::vec4_type);
4083 dst0 = st_dst_reg(src0);
4084 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4085 inst->sampler.index = samplerIndex;
4086 inst->sampler_array_size = 1;
4087 inst->tex_target = TEXTURE_2D_INDEX;
4088
4089 prog->InputsRead |= VARYING_BIT_TEX0;
4090 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4091 v->samplers_used |= (1 << samplerIndex);
4092
4093 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4094 src0.negate = NEGATE_XYZW;
4095 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4096 src0.swizzle = SWIZZLE_XXXX;
4097 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4098
4099 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4100 * new visitor. */
4101 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4102 glsl_to_tgsi_instruction *newinst;
4103 st_src_reg src_regs[3];
4104
4105 if (inst->dst[0].file == PROGRAM_OUTPUT)
4106 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst[0].index);
4107
4108 for (int i = 0; i < 3; i++) {
4109 src_regs[i] = inst->src[i];
4110 if (src_regs[i].file == PROGRAM_INPUT)
4111 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4112 }
4113
4114 newinst = v->emit(NULL, inst->op, inst->dst[0], src_regs[0], src_regs[1], src_regs[2]);
4115 newinst->tex_target = inst->tex_target;
4116 newinst->sampler_array_size = inst->sampler_array_size;
4117 }
4118
4119 /* Make modifications to fragment program info. */
4120 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4121 count_resources(v, prog);
4122 fp->glsl_to_tgsi = v;
4123 }
4124
4125 /* ------------------------- TGSI conversion stuff -------------------------- */
4126 struct label {
4127 unsigned branch_target;
4128 unsigned token;
4129 };
4130
4131 /**
4132 * Intermediate state used during shader translation.
4133 */
4134 struct st_translate {
4135 struct ureg_program *ureg;
4136
4137 unsigned temps_size;
4138 struct ureg_dst *temps;
4139
4140 struct ureg_dst arrays[MAX_ARRAYS];
4141 struct ureg_src *constants;
4142 struct ureg_src *immediates;
4143 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4144 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4145 struct ureg_dst address[3];
4146 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4147 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4148 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4149 unsigned array_sizes[MAX_ARRAYS];
4150
4151 const GLuint *inputMapping;
4152 const GLuint *outputMapping;
4153
4154 /* For every instruction that contains a label (eg CALL), keep
4155 * details so that we can go back afterwards and emit the correct
4156 * tgsi instruction number for each label.
4157 */
4158 struct label *labels;
4159 unsigned labels_size;
4160 unsigned labels_count;
4161
4162 /* Keep a record of the tgsi instruction number that each mesa
4163 * instruction starts at, will be used to fix up labels after
4164 * translation.
4165 */
4166 unsigned *insn;
4167 unsigned insn_size;
4168 unsigned insn_count;
4169
4170 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4171
4172 boolean error;
4173 };
4174
4175 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4176 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4177 /* Vertex shader
4178 */
4179 TGSI_SEMANTIC_VERTEXID,
4180 TGSI_SEMANTIC_INSTANCEID,
4181 TGSI_SEMANTIC_VERTEXID_NOBASE,
4182 TGSI_SEMANTIC_BASEVERTEX,
4183
4184 /* Geometry shader
4185 */
4186 TGSI_SEMANTIC_INVOCATIONID,
4187
4188 /* Fragment shader
4189 */
4190 TGSI_SEMANTIC_FACE,
4191 TGSI_SEMANTIC_SAMPLEID,
4192 TGSI_SEMANTIC_SAMPLEPOS,
4193 TGSI_SEMANTIC_SAMPLEMASK,
4194 };
4195
4196 /**
4197 * Make note of a branch to a label in the TGSI code.
4198 * After we've emitted all instructions, we'll go over the list
4199 * of labels built here and patch the TGSI code with the actual
4200 * location of each label.
4201 */
4202 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4203 {
4204 unsigned i;
4205
4206 if (t->labels_count + 1 >= t->labels_size) {
4207 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4208 t->labels = (struct label *)realloc(t->labels,
4209 t->labels_size * sizeof(struct label));
4210 if (t->labels == NULL) {
4211 static unsigned dummy;
4212 t->error = TRUE;
4213 return &dummy;
4214 }
4215 }
4216
4217 i = t->labels_count++;
4218 t->labels[i].branch_target = branch_target;
4219 return &t->labels[i].token;
4220 }
4221
4222 /**
4223 * Called prior to emitting the TGSI code for each instruction.
4224 * Allocate additional space for instructions if needed.
4225 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4226 * the next TGSI instruction.
4227 */
4228 static void set_insn_start(struct st_translate *t, unsigned start)
4229 {
4230 if (t->insn_count + 1 >= t->insn_size) {
4231 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4232 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4233 if (t->insn == NULL) {
4234 t->error = TRUE;
4235 return;
4236 }
4237 }
4238
4239 t->insn[t->insn_count++] = start;
4240 }
4241
4242 /**
4243 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4244 */
4245 static struct ureg_src
4246 emit_immediate(struct st_translate *t,
4247 gl_constant_value values[4],
4248 int type, int size)
4249 {
4250 struct ureg_program *ureg = t->ureg;
4251
4252 switch(type)
4253 {
4254 case GL_FLOAT:
4255 return ureg_DECL_immediate(ureg, &values[0].f, size);
4256 case GL_INT:
4257 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4258 case GL_UNSIGNED_INT:
4259 case GL_BOOL:
4260 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4261 default:
4262 assert(!"should not get here - type must be float, int, uint, or bool");
4263 return ureg_src_undef();
4264 }
4265 }
4266
4267 /**
4268 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4269 */
4270 static struct ureg_dst
4271 dst_register(struct st_translate *t,
4272 gl_register_file file,
4273 GLuint index)
4274 {
4275 unsigned array;
4276
4277 switch(file) {
4278 case PROGRAM_UNDEFINED:
4279 return ureg_dst_undef();
4280
4281 case PROGRAM_TEMPORARY:
4282 /* Allocate space for temporaries on demand. */
4283 if (index >= t->temps_size) {
4284 const int inc = 4096;
4285
4286 t->temps = (struct ureg_dst*)
4287 realloc(t->temps,
4288 (t->temps_size + inc) * sizeof(struct ureg_dst));
4289 if (!t->temps)
4290 return ureg_dst_undef();
4291
4292 memset(t->temps + t->temps_size, 0, inc * sizeof(struct ureg_dst));
4293 t->temps_size += inc;
4294 }
4295
4296 if (ureg_dst_is_undef(t->temps[index]))
4297 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4298
4299 return t->temps[index];
4300
4301 case PROGRAM_ARRAY:
4302 array = index >> 16;
4303
4304 assert(array < Elements(t->arrays));
4305
4306 if (ureg_dst_is_undef(t->arrays[array]))
4307 t->arrays[array] = ureg_DECL_array_temporary(
4308 t->ureg, t->array_sizes[array], TRUE);
4309
4310 return ureg_dst_array_offset(t->arrays[array],
4311 (int)(index & 0xFFFF) - 0x8000);
4312
4313 case PROGRAM_OUTPUT:
4314 if (t->procType == TGSI_PROCESSOR_VERTEX)
4315 assert(index < VARYING_SLOT_MAX);
4316 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4317 assert(index < FRAG_RESULT_MAX);
4318 else
4319 assert(index < VARYING_SLOT_MAX);
4320
4321 assert(t->outputMapping[index] < Elements(t->outputs));
4322
4323 return t->outputs[t->outputMapping[index]];
4324
4325 case PROGRAM_ADDRESS:
4326 return t->address[index];
4327
4328 default:
4329 assert(!"unknown dst register file");
4330 return ureg_dst_undef();
4331 }
4332 }
4333
4334 /**
4335 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4336 */
4337 static struct ureg_src
4338 src_register(struct st_translate *t, const struct st_src_reg *reg)
4339 {
4340 switch(reg->file) {
4341 case PROGRAM_UNDEFINED:
4342 return ureg_src_undef();
4343
4344 case PROGRAM_TEMPORARY:
4345 case PROGRAM_ARRAY:
4346 return ureg_src(dst_register(t, reg->file, reg->index));
4347
4348 case PROGRAM_UNIFORM:
4349 assert(reg->index >= 0);
4350 return t->constants[reg->index];
4351 case PROGRAM_STATE_VAR:
4352 case PROGRAM_CONSTANT: /* ie, immediate */
4353 if (reg->has_index2)
4354 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4355 else if (reg->index < 0)
4356 return ureg_DECL_constant(t->ureg, 0);
4357 else
4358 return t->constants[reg->index];
4359
4360 case PROGRAM_IMMEDIATE:
4361 return t->immediates[reg->index];
4362
4363 case PROGRAM_INPUT:
4364 assert(t->inputMapping[reg->index] < Elements(t->inputs));
4365 return t->inputs[t->inputMapping[reg->index]];
4366
4367 case PROGRAM_OUTPUT:
4368 assert(t->outputMapping[reg->index] < Elements(t->outputs));
4369 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4370
4371 case PROGRAM_ADDRESS:
4372 return ureg_src(t->address[reg->index]);
4373
4374 case PROGRAM_SYSTEM_VALUE:
4375 assert(reg->index < (int) Elements(t->systemValues));
4376 return t->systemValues[reg->index];
4377
4378 default:
4379 assert(!"unknown src register file");
4380 return ureg_src_undef();
4381 }
4382 }
4383
4384 /**
4385 * Create a TGSI ureg_dst register from an st_dst_reg.
4386 */
4387 static struct ureg_dst
4388 translate_dst(struct st_translate *t,
4389 const st_dst_reg *dst_reg,
4390 bool saturate, bool clamp_color)
4391 {
4392 struct ureg_dst dst = dst_register(t,
4393 dst_reg->file,
4394 dst_reg->index);
4395
4396 dst = ureg_writemask(dst, dst_reg->writemask);
4397
4398 if (saturate)
4399 dst = ureg_saturate(dst);
4400 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4401 /* Clamp colors for ARB_color_buffer_float. */
4402 switch (t->procType) {
4403 case TGSI_PROCESSOR_VERTEX:
4404 /* This can only occur with a compatibility profile, which doesn't
4405 * support geometry shaders. */
4406 if (dst_reg->index == VARYING_SLOT_COL0 ||
4407 dst_reg->index == VARYING_SLOT_COL1 ||
4408 dst_reg->index == VARYING_SLOT_BFC0 ||
4409 dst_reg->index == VARYING_SLOT_BFC1) {
4410 dst = ureg_saturate(dst);
4411 }
4412 break;
4413
4414 case TGSI_PROCESSOR_FRAGMENT:
4415 if (dst_reg->index == FRAG_RESULT_COLOR ||
4416 dst_reg->index >= FRAG_RESULT_DATA0) {
4417 dst = ureg_saturate(dst);
4418 }
4419 break;
4420 }
4421 }
4422
4423 if (dst_reg->reladdr != NULL) {
4424 assert(dst_reg->file != PROGRAM_TEMPORARY);
4425 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4426 }
4427
4428 return dst;
4429 }
4430
4431 /**
4432 * Create a TGSI ureg_src register from an st_src_reg.
4433 */
4434 static struct ureg_src
4435 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4436 {
4437 struct ureg_src src = src_register(t, src_reg);
4438
4439 if (src_reg->has_index2) {
4440 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4441 * and UBO constant buffers (buffer, position).
4442 */
4443 if (src_reg->reladdr2)
4444 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4445 src_reg->index2D);
4446 else
4447 src = ureg_src_dimension(src, src_reg->index2D);
4448 }
4449
4450 src = ureg_swizzle(src,
4451 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4452 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4453 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4454 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4455
4456 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4457 src = ureg_negate(src);
4458
4459 if (src_reg->reladdr != NULL) {
4460 assert(src_reg->file != PROGRAM_TEMPORARY);
4461 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4462 }
4463
4464 return src;
4465 }
4466
4467 static struct tgsi_texture_offset
4468 translate_tex_offset(struct st_translate *t,
4469 const st_src_reg *in_offset, int idx)
4470 {
4471 struct tgsi_texture_offset offset;
4472 struct ureg_src imm_src;
4473 struct ureg_dst dst;
4474 int array;
4475
4476 switch (in_offset->file) {
4477 case PROGRAM_IMMEDIATE:
4478 imm_src = t->immediates[in_offset->index];
4479
4480 offset.File = imm_src.File;
4481 offset.Index = imm_src.Index;
4482 offset.SwizzleX = imm_src.SwizzleX;
4483 offset.SwizzleY = imm_src.SwizzleY;
4484 offset.SwizzleZ = imm_src.SwizzleZ;
4485 offset.Padding = 0;
4486 break;
4487 case PROGRAM_TEMPORARY:
4488 imm_src = ureg_src(t->temps[in_offset->index]);
4489 offset.File = imm_src.File;
4490 offset.Index = imm_src.Index;
4491 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4492 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4493 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4494 offset.Padding = 0;
4495 break;
4496 case PROGRAM_ARRAY:
4497 array = in_offset->index >> 16;
4498
4499 assert(array >= 0);
4500 assert(array < (int) Elements(t->arrays));
4501
4502 dst = t->arrays[array];
4503 offset.File = dst.File;
4504 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4505 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4506 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4507 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4508 offset.Padding = 0;
4509 break;
4510 default:
4511 break;
4512 }
4513 return offset;
4514 }
4515
4516 static void
4517 compile_tgsi_instruction(struct st_translate *t,
4518 const glsl_to_tgsi_instruction *inst,
4519 bool clamp_dst_color_output)
4520 {
4521 struct ureg_program *ureg = t->ureg;
4522 GLuint i;
4523 struct ureg_dst dst[1];
4524 struct ureg_src src[4];
4525 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4526
4527 unsigned num_dst;
4528 unsigned num_src;
4529 unsigned tex_target;
4530
4531 num_dst = num_inst_dst_regs(inst->op);
4532 num_src = num_inst_src_regs(inst->op);
4533
4534 if (num_dst)
4535 dst[0] = translate_dst(t,
4536 &inst->dst[0],
4537 inst->saturate,
4538 clamp_dst_color_output);
4539
4540 for (i = 0; i < num_src; i++) {
4541 assert(inst->src[i].file != PROGRAM_UNDEFINED);
4542 src[i] = translate_src(t, &inst->src[i]);
4543 }
4544
4545 switch(inst->op) {
4546 case TGSI_OPCODE_BGNLOOP:
4547 case TGSI_OPCODE_CAL:
4548 case TGSI_OPCODE_ELSE:
4549 case TGSI_OPCODE_ENDLOOP:
4550 case TGSI_OPCODE_IF:
4551 case TGSI_OPCODE_UIF:
4552 assert(num_dst == 0);
4553 ureg_label_insn(ureg,
4554 inst->op,
4555 src, num_src,
4556 get_label(t,
4557 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4558 return;
4559
4560 case TGSI_OPCODE_TEX:
4561 case TGSI_OPCODE_TXB:
4562 case TGSI_OPCODE_TXD:
4563 case TGSI_OPCODE_TXL:
4564 case TGSI_OPCODE_TXP:
4565 case TGSI_OPCODE_TXQ:
4566 case TGSI_OPCODE_TXF:
4567 case TGSI_OPCODE_TEX2:
4568 case TGSI_OPCODE_TXB2:
4569 case TGSI_OPCODE_TXL2:
4570 case TGSI_OPCODE_TG4:
4571 case TGSI_OPCODE_LODQ:
4572 src[num_src] = t->samplers[inst->sampler.index];
4573 assert(src[num_src].File != TGSI_FILE_NULL);
4574 if (inst->sampler.reladdr)
4575 src[num_src] =
4576 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4577 num_src++;
4578 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4579 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4580 }
4581 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4582
4583 ureg_tex_insn(ureg,
4584 inst->op,
4585 dst, num_dst,
4586 tex_target,
4587 texoffsets, inst->tex_offset_num_offset,
4588 src, num_src);
4589 return;
4590
4591 case TGSI_OPCODE_SCS:
4592 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4593 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4594 break;
4595
4596 default:
4597 ureg_insn(ureg,
4598 inst->op,
4599 dst, num_dst,
4600 src, num_src);
4601 break;
4602 }
4603 }
4604
4605 /**
4606 * Emit the TGSI instructions for inverting and adjusting WPOS.
4607 * This code is unavoidable because it also depends on whether
4608 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4609 */
4610 static void
4611 emit_wpos_adjustment( struct st_translate *t,
4612 const struct gl_program *program,
4613 boolean invert,
4614 GLfloat adjX, GLfloat adjY[2])
4615 {
4616 struct ureg_program *ureg = t->ureg;
4617
4618 /* Fragment program uses fragment position input.
4619 * Need to replace instances of INPUT[WPOS] with temp T
4620 * where T = INPUT[WPOS] by y is inverted.
4621 */
4622 static const gl_state_index wposTransformState[STATE_LENGTH]
4623 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4624 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4625
4626 /* XXX: note we are modifying the incoming shader here! Need to
4627 * do this before emitting the constant decls below, or this
4628 * will be missed:
4629 */
4630 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4631 wposTransformState);
4632
4633 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4634 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4635 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4636
4637 /* First, apply the coordinate shift: */
4638 if (adjX || adjY[0] || adjY[1]) {
4639 if (adjY[0] != adjY[1]) {
4640 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4641 * depending on whether inversion is actually going to be applied
4642 * or not, which is determined by testing against the inversion
4643 * state variable used below, which will be either +1 or -1.
4644 */
4645 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4646
4647 ureg_CMP(ureg, adj_temp,
4648 ureg_scalar(wpostrans, invert ? 2 : 0),
4649 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4650 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4651 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4652 } else {
4653 ureg_ADD(ureg, wpos_temp, wpos_input,
4654 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4655 }
4656 wpos_input = ureg_src(wpos_temp);
4657 } else {
4658 /* MOV wpos_temp, input[wpos]
4659 */
4660 ureg_MOV( ureg, wpos_temp, wpos_input );
4661 }
4662
4663 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4664 * inversion/identity, or the other way around if we're drawing to an FBO.
4665 */
4666 if (invert) {
4667 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4668 */
4669 ureg_MAD( ureg,
4670 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4671 wpos_input,
4672 ureg_scalar(wpostrans, 0),
4673 ureg_scalar(wpostrans, 1));
4674 } else {
4675 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4676 */
4677 ureg_MAD( ureg,
4678 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4679 wpos_input,
4680 ureg_scalar(wpostrans, 2),
4681 ureg_scalar(wpostrans, 3));
4682 }
4683
4684 /* Use wpos_temp as position input from here on:
4685 */
4686 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4687 }
4688
4689
4690 /**
4691 * Emit fragment position/ooordinate code.
4692 */
4693 static void
4694 emit_wpos(struct st_context *st,
4695 struct st_translate *t,
4696 const struct gl_program *program,
4697 struct ureg_program *ureg)
4698 {
4699 const struct gl_fragment_program *fp =
4700 (const struct gl_fragment_program *) program;
4701 struct pipe_screen *pscreen = st->pipe->screen;
4702 GLfloat adjX = 0.0f;
4703 GLfloat adjY[2] = { 0.0f, 0.0f };
4704 boolean invert = FALSE;
4705
4706 /* Query the pixel center conventions supported by the pipe driver and set
4707 * adjX, adjY to help out if it cannot handle the requested one internally.
4708 *
4709 * The bias of the y-coordinate depends on whether y-inversion takes place
4710 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4711 * drawing to an FBO (causes additional inversion), and whether the the pipe
4712 * driver origin and the requested origin differ (the latter condition is
4713 * stored in the 'invert' variable).
4714 *
4715 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4716 *
4717 * center shift only:
4718 * i -> h: +0.5
4719 * h -> i: -0.5
4720 *
4721 * inversion only:
4722 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4723 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4724 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4725 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4726 *
4727 * inversion and center shift:
4728 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4729 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4730 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4731 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4732 */
4733 if (fp->OriginUpperLeft) {
4734 /* Fragment shader wants origin in upper-left */
4735 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4736 /* the driver supports upper-left origin */
4737 }
4738 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4739 /* the driver supports lower-left origin, need to invert Y */
4740 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4741 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4742 invert = TRUE;
4743 }
4744 else
4745 assert(0);
4746 }
4747 else {
4748 /* Fragment shader wants origin in lower-left */
4749 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4750 /* the driver supports lower-left origin */
4751 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4752 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4753 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4754 /* the driver supports upper-left origin, need to invert Y */
4755 invert = TRUE;
4756 else
4757 assert(0);
4758 }
4759
4760 if (fp->PixelCenterInteger) {
4761 /* Fragment shader wants pixel center integer */
4762 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4763 /* the driver supports pixel center integer */
4764 adjY[1] = 1.0f;
4765 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
4766 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4767 }
4768 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4769 /* the driver supports pixel center half integer, need to bias X,Y */
4770 adjX = -0.5f;
4771 adjY[0] = -0.5f;
4772 adjY[1] = 0.5f;
4773 }
4774 else
4775 assert(0);
4776 }
4777 else {
4778 /* Fragment shader wants pixel center half integer */
4779 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4780 /* the driver supports pixel center half integer */
4781 }
4782 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4783 /* the driver supports pixel center integer, need to bias X,Y */
4784 adjX = adjY[0] = adjY[1] = 0.5f;
4785 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
4786 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4787 }
4788 else
4789 assert(0);
4790 }
4791
4792 /* we invert after adjustment so that we avoid the MOV to temporary,
4793 * and reuse the adjustment ADD instead */
4794 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4795 }
4796
4797 /**
4798 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4799 * TGSI uses +1 for front, -1 for back.
4800 * This function converts the TGSI value to the GL value. Simply clamping/
4801 * saturating the value to [0,1] does the job.
4802 */
4803 static void
4804 emit_face_var(struct gl_context *ctx, struct st_translate *t)
4805 {
4806 struct ureg_program *ureg = t->ureg;
4807 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4808 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4809
4810 if (ctx->Const.NativeIntegers) {
4811 ureg_FSGE(ureg, face_temp, face_input, ureg_imm1f(ureg, 0));
4812 }
4813 else {
4814 /* MOV_SAT face_temp, input[face] */
4815 ureg_MOV(ureg, ureg_saturate(face_temp), face_input);
4816 }
4817
4818 /* Use face_temp as face input from here on: */
4819 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4820 }
4821
4822 static void
4823 emit_edgeflags(struct st_translate *t)
4824 {
4825 struct ureg_program *ureg = t->ureg;
4826 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4827 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4828
4829 ureg_MOV(ureg, edge_dst, edge_src);
4830 }
4831
4832 /**
4833 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4834 * \param program the program to translate
4835 * \param numInputs number of input registers used
4836 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4837 * input indexes
4838 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4839 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4840 * each input
4841 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4842 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4843 * \param numOutputs number of output registers used
4844 * \param outputMapping maps Mesa fragment program outputs to TGSI
4845 * generic outputs
4846 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4847 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4848 * each output
4849 *
4850 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4851 */
4852 extern "C" enum pipe_error
4853 st_translate_program(
4854 struct gl_context *ctx,
4855 uint procType,
4856 struct ureg_program *ureg,
4857 glsl_to_tgsi_visitor *program,
4858 const struct gl_program *proginfo,
4859 GLuint numInputs,
4860 const GLuint inputMapping[],
4861 const ubyte inputSemanticName[],
4862 const ubyte inputSemanticIndex[],
4863 const GLuint interpMode[],
4864 const GLuint interpLocation[],
4865 GLuint numOutputs,
4866 const GLuint outputMapping[],
4867 const ubyte outputSemanticName[],
4868 const ubyte outputSemanticIndex[],
4869 boolean passthrough_edgeflags,
4870 boolean clamp_color)
4871 {
4872 struct st_translate *t;
4873 unsigned i;
4874 enum pipe_error ret = PIPE_OK;
4875
4876 assert(numInputs <= Elements(t->inputs));
4877 assert(numOutputs <= Elements(t->outputs));
4878
4879 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
4880 TGSI_SEMANTIC_FACE);
4881 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
4882 TGSI_SEMANTIC_VERTEXID);
4883 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
4884 TGSI_SEMANTIC_INSTANCEID);
4885 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
4886 TGSI_SEMANTIC_SAMPLEID);
4887 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
4888 TGSI_SEMANTIC_SAMPLEPOS);
4889 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
4890 TGSI_SEMANTIC_SAMPLEMASK);
4891 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
4892 TGSI_SEMANTIC_INVOCATIONID);
4893 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID_ZERO_BASE] ==
4894 TGSI_SEMANTIC_VERTEXID_NOBASE);
4895 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_BASE_VERTEX] ==
4896 TGSI_SEMANTIC_BASEVERTEX);
4897
4898 t = CALLOC_STRUCT(st_translate);
4899 if (!t) {
4900 ret = PIPE_ERROR_OUT_OF_MEMORY;
4901 goto out;
4902 }
4903
4904 memset(t, 0, sizeof *t);
4905
4906 t->procType = procType;
4907 t->inputMapping = inputMapping;
4908 t->outputMapping = outputMapping;
4909 t->ureg = ureg;
4910
4911 if (program->shader_program) {
4912 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4913 struct gl_uniform_storage *const storage =
4914 &program->shader_program->UniformStorage[i];
4915
4916 _mesa_uniform_detach_all_driver_storage(storage);
4917 }
4918 }
4919
4920 /*
4921 * Declare input attributes.
4922 */
4923 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4924 for (i = 0; i < numInputs; i++) {
4925 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4926 inputSemanticName[i],
4927 inputSemanticIndex[i],
4928 interpMode[i], 0,
4929 interpLocation[i]);
4930 }
4931
4932 if (proginfo->InputsRead & VARYING_BIT_POS) {
4933 /* Must do this after setting up t->inputs, and before
4934 * emitting constant references, below:
4935 */
4936 emit_wpos(st_context(ctx), t, proginfo, ureg);
4937 }
4938
4939 if (proginfo->InputsRead & VARYING_BIT_FACE)
4940 emit_face_var(ctx, t);
4941
4942 /*
4943 * Declare output attributes.
4944 */
4945 for (i = 0; i < numOutputs; i++) {
4946 switch (outputSemanticName[i]) {
4947 case TGSI_SEMANTIC_POSITION:
4948 t->outputs[i] = ureg_DECL_output(ureg,
4949 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4950 outputSemanticIndex[i]);
4951 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4952 break;
4953 case TGSI_SEMANTIC_STENCIL:
4954 t->outputs[i] = ureg_DECL_output(ureg,
4955 TGSI_SEMANTIC_STENCIL, /* Stencil */
4956 outputSemanticIndex[i]);
4957 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4958 break;
4959 case TGSI_SEMANTIC_COLOR:
4960 t->outputs[i] = ureg_DECL_output(ureg,
4961 TGSI_SEMANTIC_COLOR,
4962 outputSemanticIndex[i]);
4963 break;
4964 case TGSI_SEMANTIC_SAMPLEMASK:
4965 t->outputs[i] = ureg_DECL_output(ureg,
4966 TGSI_SEMANTIC_SAMPLEMASK,
4967 outputSemanticIndex[i]);
4968 /* TODO: If we ever support more than 32 samples, this will have
4969 * to become an array.
4970 */
4971 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4972 break;
4973 default:
4974 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4975 ret = PIPE_ERROR_BAD_INPUT;
4976 goto out;
4977 }
4978 }
4979 }
4980 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4981 for (i = 0; i < numInputs; i++) {
4982 t->inputs[i] = ureg_DECL_gs_input(ureg,
4983 i,
4984 inputSemanticName[i],
4985 inputSemanticIndex[i]);
4986 }
4987
4988 for (i = 0; i < numOutputs; i++) {
4989 t->outputs[i] = ureg_DECL_output(ureg,
4990 outputSemanticName[i],
4991 outputSemanticIndex[i]);
4992 }
4993 }
4994 else {
4995 assert(procType == TGSI_PROCESSOR_VERTEX);
4996
4997 for (i = 0; i < numInputs; i++) {
4998 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4999 }
5000
5001 for (i = 0; i < numOutputs; i++) {
5002 t->outputs[i] = ureg_DECL_output(ureg,
5003 outputSemanticName[i],
5004 outputSemanticIndex[i]);
5005 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
5006 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5007 ureg_MOV(ureg,
5008 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
5009 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
5010 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5011 }
5012 }
5013 if (passthrough_edgeflags)
5014 emit_edgeflags(t);
5015 }
5016
5017 /* Declare address register.
5018 */
5019 if (program->num_address_regs > 0) {
5020 assert(program->num_address_regs <= 3);
5021 for (int i = 0; i < program->num_address_regs; i++)
5022 t->address[i] = ureg_DECL_address(ureg);
5023 }
5024
5025 /* Declare misc input registers
5026 */
5027 {
5028 GLbitfield sysInputs = proginfo->SystemValuesRead;
5029 unsigned numSys = 0;
5030 for (i = 0; sysInputs; i++) {
5031 if (sysInputs & (1 << i)) {
5032 unsigned semName = _mesa_sysval_to_semantic[i];
5033 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5034 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5035 semName == TGSI_SEMANTIC_VERTEXID) {
5036 /* From Gallium perspective, these system values are always
5037 * integer, and require native integer support. However, if
5038 * native integer is supported on the vertex stage but not the
5039 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5040 * assumes these system values are floats. To resolve the
5041 * inconsistency, we insert a U2F.
5042 */
5043 struct st_context *st = st_context(ctx);
5044 struct pipe_screen *pscreen = st->pipe->screen;
5045 assert(procType == TGSI_PROCESSOR_VERTEX);
5046 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5047 if (!ctx->Const.NativeIntegers) {
5048 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5049 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5050 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5051 }
5052 }
5053 numSys++;
5054 sysInputs &= ~(1 << i);
5055 }
5056 }
5057 }
5058
5059 /* Copy over array sizes
5060 */
5061 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5062
5063 /* Emit constants and uniforms. TGSI uses a single index space for these,
5064 * so we put all the translated regs in t->constants.
5065 */
5066 if (proginfo->Parameters) {
5067 t->constants = (struct ureg_src *)
5068 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5069 if (t->constants == NULL) {
5070 ret = PIPE_ERROR_OUT_OF_MEMORY;
5071 goto out;
5072 }
5073
5074 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5075 switch (proginfo->Parameters->Parameters[i].Type) {
5076 case PROGRAM_STATE_VAR:
5077 case PROGRAM_UNIFORM:
5078 t->constants[i] = ureg_DECL_constant(ureg, i);
5079 break;
5080
5081 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5082 * addressing of the const buffer.
5083 * FIXME: Be smarter and recognize param arrays:
5084 * indirect addressing is only valid within the referenced
5085 * array.
5086 */
5087 case PROGRAM_CONSTANT:
5088 if (program->indirect_addr_consts)
5089 t->constants[i] = ureg_DECL_constant(ureg, i);
5090 else
5091 t->constants[i] = emit_immediate(t,
5092 proginfo->Parameters->ParameterValues[i],
5093 proginfo->Parameters->Parameters[i].DataType,
5094 4);
5095 break;
5096 default:
5097 break;
5098 }
5099 }
5100 }
5101
5102 if (program->shader) {
5103 unsigned num_ubos = program->shader->NumUniformBlocks;
5104
5105 for (i = 0; i < num_ubos; i++) {
5106 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5107 unsigned num_const_vecs = (size + 15) / 16;
5108 unsigned first, last;
5109 assert(num_const_vecs > 0);
5110 first = 0;
5111 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5112 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5113 }
5114 }
5115
5116 /* Emit immediate values.
5117 */
5118 t->immediates = (struct ureg_src *)
5119 calloc(program->num_immediates, sizeof(struct ureg_src));
5120 if (t->immediates == NULL) {
5121 ret = PIPE_ERROR_OUT_OF_MEMORY;
5122 goto out;
5123 }
5124 i = 0;
5125 foreach_in_list(immediate_storage, imm, &program->immediates) {
5126 assert(i < program->num_immediates);
5127 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5128 }
5129 assert(i == program->num_immediates);
5130
5131 /* texture samplers */
5132 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5133 if (program->samplers_used & (1 << i)) {
5134 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5135 }
5136 }
5137
5138 /* Emit each instruction in turn:
5139 */
5140 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5141 set_insn_start(t, ureg_get_instruction_number(ureg));
5142 compile_tgsi_instruction(t, inst, clamp_color);
5143 }
5144
5145 /* Fix up all emitted labels:
5146 */
5147 for (i = 0; i < t->labels_count; i++) {
5148 ureg_fixup_label(ureg, t->labels[i].token,
5149 t->insn[t->labels[i].branch_target]);
5150 }
5151
5152 if (program->shader_program) {
5153 /* This has to be done last. Any operation the can cause
5154 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5155 * program constant) has to happen before creating this linkage.
5156 */
5157 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5158 if (program->shader_program->_LinkedShaders[i] == NULL)
5159 continue;
5160
5161 _mesa_associate_uniform_storage(ctx, program->shader_program,
5162 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5163 }
5164 }
5165
5166 out:
5167 if (t) {
5168 free(t->temps);
5169 free(t->insn);
5170 free(t->labels);
5171 free(t->constants);
5172 free(t->immediates);
5173
5174 if (t->error) {
5175 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5176 }
5177
5178 free(t);
5179 }
5180
5181 return ret;
5182 }
5183 /* ----------------------------- End TGSI code ------------------------------ */
5184
5185
5186 static unsigned
5187 shader_stage_to_ptarget(gl_shader_stage stage)
5188 {
5189 switch (stage) {
5190 case MESA_SHADER_VERTEX:
5191 return PIPE_SHADER_VERTEX;
5192 case MESA_SHADER_FRAGMENT:
5193 return PIPE_SHADER_FRAGMENT;
5194 case MESA_SHADER_GEOMETRY:
5195 return PIPE_SHADER_GEOMETRY;
5196 case MESA_SHADER_COMPUTE:
5197 return PIPE_SHADER_COMPUTE;
5198 }
5199
5200 assert(!"should not be reached");
5201 return PIPE_SHADER_VERTEX;
5202 }
5203
5204
5205 /**
5206 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5207 * generating Mesa IR.
5208 */
5209 static struct gl_program *
5210 get_mesa_program(struct gl_context *ctx,
5211 struct gl_shader_program *shader_program,
5212 struct gl_shader *shader)
5213 {
5214 glsl_to_tgsi_visitor* v;
5215 struct gl_program *prog;
5216 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5217 bool progress;
5218 struct gl_shader_compiler_options *options =
5219 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5220 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5221 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5222
5223 validate_ir_tree(shader->ir);
5224
5225 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5226 if (!prog)
5227 return NULL;
5228 prog->Parameters = _mesa_new_parameter_list();
5229 v = new glsl_to_tgsi_visitor();
5230 v->ctx = ctx;
5231 v->prog = prog;
5232 v->shader_program = shader_program;
5233 v->shader = shader;
5234 v->options = options;
5235 v->glsl_version = ctx->Const.GLSLVersion;
5236 v->native_integers = ctx->Const.NativeIntegers;
5237
5238 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5239 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5240
5241 _mesa_copy_linked_program_data(shader->Stage, shader_program, prog);
5242 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5243 prog->Parameters);
5244
5245 /* Remove reads from output registers. */
5246 lower_output_reads(shader->ir);
5247
5248 /* Emit intermediate IR for main(). */
5249 visit_exec_list(shader->ir, v);
5250
5251 /* Now emit bodies for any functions that were used. */
5252 do {
5253 progress = GL_FALSE;
5254
5255 foreach_in_list(function_entry, entry, &v->function_signatures) {
5256 if (!entry->bgn_inst) {
5257 v->current_function = entry;
5258
5259 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5260 entry->bgn_inst->function = entry;
5261
5262 visit_exec_list(&entry->sig->body, v);
5263
5264 glsl_to_tgsi_instruction *last;
5265 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5266 if (last->op != TGSI_OPCODE_RET)
5267 v->emit(NULL, TGSI_OPCODE_RET);
5268
5269 glsl_to_tgsi_instruction *end;
5270 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5271 end->function = entry;
5272
5273 progress = GL_TRUE;
5274 }
5275 }
5276 } while (progress);
5277
5278 #if 0
5279 /* Print out some information (for debugging purposes) used by the
5280 * optimization passes. */
5281 for (i = 0; i < v->next_temp; i++) {
5282 int fr = v->get_first_temp_read(i);
5283 int fw = v->get_first_temp_write(i);
5284 int lr = v->get_last_temp_read(i);
5285 int lw = v->get_last_temp_write(i);
5286
5287 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5288 assert(fw <= fr);
5289 }
5290 #endif
5291
5292 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5293 v->simplify_cmp();
5294 v->copy_propagate();
5295 while (v->eliminate_dead_code());
5296
5297 v->merge_registers();
5298 v->renumber_registers();
5299
5300 /* Write the END instruction. */
5301 v->emit(NULL, TGSI_OPCODE_END);
5302
5303 if (ctx->_Shader->Flags & GLSL_DUMP) {
5304 printf("\n");
5305 printf("GLSL IR for linked %s program %d:\n",
5306 _mesa_shader_stage_to_string(shader->Stage),
5307 shader_program->Name);
5308 _mesa_print_ir(stdout, shader->ir, NULL);
5309 printf("\n");
5310 printf("\n");
5311 fflush(stdout);
5312 }
5313
5314 prog->Instructions = NULL;
5315 prog->NumInstructions = 0;
5316
5317 do_set_program_inouts(shader->ir, prog, shader->Stage);
5318 count_resources(v, prog);
5319
5320 _mesa_reference_program(ctx, &shader->Program, prog);
5321
5322 /* This has to be done last. Any operation the can cause
5323 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5324 * program constant) has to happen before creating this linkage.
5325 */
5326 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5327 if (!shader_program->LinkStatus) {
5328 return NULL;
5329 }
5330
5331 struct st_vertex_program *stvp;
5332 struct st_fragment_program *stfp;
5333 struct st_geometry_program *stgp;
5334
5335 switch (shader->Type) {
5336 case GL_VERTEX_SHADER:
5337 stvp = (struct st_vertex_program *)prog;
5338 stvp->glsl_to_tgsi = v;
5339 break;
5340 case GL_FRAGMENT_SHADER:
5341 stfp = (struct st_fragment_program *)prog;
5342 stfp->glsl_to_tgsi = v;
5343 break;
5344 case GL_GEOMETRY_SHADER:
5345 stgp = (struct st_geometry_program *)prog;
5346 stgp->glsl_to_tgsi = v;
5347 break;
5348 default:
5349 assert(!"should not be reached");
5350 return NULL;
5351 }
5352
5353 return prog;
5354 }
5355
5356 extern "C" {
5357
5358 /**
5359 * Link a shader.
5360 * Called via ctx->Driver.LinkShader()
5361 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5362 * with code lowering and other optimizations.
5363 */
5364 GLboolean
5365 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5366 {
5367 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5368 assert(prog->LinkStatus);
5369
5370 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5371 if (prog->_LinkedShaders[i] == NULL)
5372 continue;
5373
5374 bool progress;
5375 exec_list *ir = prog->_LinkedShaders[i]->ir;
5376 const struct gl_shader_compiler_options *options =
5377 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5378
5379 /* If there are forms of indirect addressing that the driver
5380 * cannot handle, perform the lowering pass.
5381 */
5382 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5383 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5384 lower_variable_index_to_cond_assign(ir,
5385 options->EmitNoIndirectInput,
5386 options->EmitNoIndirectOutput,
5387 options->EmitNoIndirectTemp,
5388 options->EmitNoIndirectUniform);
5389 }
5390
5391 if (ctx->Extensions.ARB_shading_language_packing) {
5392 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5393 LOWER_UNPACK_SNORM_2x16 |
5394 LOWER_PACK_UNORM_2x16 |
5395 LOWER_UNPACK_UNORM_2x16 |
5396 LOWER_PACK_SNORM_4x8 |
5397 LOWER_UNPACK_SNORM_4x8 |
5398 LOWER_UNPACK_UNORM_4x8 |
5399 LOWER_PACK_UNORM_4x8 |
5400 LOWER_PACK_HALF_2x16 |
5401 LOWER_UNPACK_HALF_2x16;
5402
5403 lower_packing_builtins(ir, lower_inst);
5404 }
5405
5406 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5407 lower_offset_arrays(ir);
5408 do_mat_op_to_vec(ir);
5409 lower_instructions(ir,
5410 MOD_TO_FLOOR |
5411 DIV_TO_MUL_RCP |
5412 EXP_TO_EXP2 |
5413 LOG_TO_LOG2 |
5414 LDEXP_TO_ARITH |
5415 CARRY_TO_ARITH |
5416 BORROW_TO_ARITH |
5417 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5418 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) |
5419 (options->EmitNoSat ? SAT_TO_CLAMP : 0));
5420
5421 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5422 do_vec_index_to_cond_assign(ir);
5423 lower_vector_insert(ir, true);
5424 lower_quadop_vector(ir, false);
5425 lower_noise(ir);
5426 if (options->MaxIfDepth == 0) {
5427 lower_discard(ir);
5428 }
5429
5430 do {
5431 progress = false;
5432
5433 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5434
5435 progress = do_common_optimization(ir, true, true, options,
5436 ctx->Const.NativeIntegers)
5437 || progress;
5438
5439 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5440
5441 } while (progress);
5442
5443 validate_ir_tree(ir);
5444 }
5445
5446 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5447 struct gl_program *linked_prog;
5448
5449 if (prog->_LinkedShaders[i] == NULL)
5450 continue;
5451
5452 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5453
5454 if (linked_prog) {
5455 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5456 linked_prog);
5457 if (!ctx->Driver.ProgramStringNotify(ctx,
5458 _mesa_shader_stage_to_program(i),
5459 linked_prog)) {
5460 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5461 NULL);
5462 _mesa_reference_program(ctx, &linked_prog, NULL);
5463 return GL_FALSE;
5464 }
5465 }
5466
5467 _mesa_reference_program(ctx, &linked_prog, NULL);
5468 }
5469
5470 return GL_TRUE;
5471 }
5472
5473 void
5474 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5475 const GLuint outputMapping[],
5476 struct pipe_stream_output_info *so)
5477 {
5478 unsigned i;
5479 struct gl_transform_feedback_info *info =
5480 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5481
5482 for (i = 0; i < info->NumOutputs; i++) {
5483 so->output[i].register_index =
5484 outputMapping[info->Outputs[i].OutputRegister];
5485 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5486 so->output[i].num_components = info->Outputs[i].NumComponents;
5487 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5488 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5489 so->output[i].stream = info->Outputs[i].StreamId;
5490 }
5491
5492 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5493 so->stride[i] = info->BufferStride[i];
5494 }
5495 so->num_outputs = info->NumOutputs;
5496 }
5497
5498 } /* extern "C" */