mesa: Add the format enums for BPTC-compressed images
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 #define MAX_GLSL_TEXTURE_OFFSET 4
91
92 class st_src_reg;
93 class st_dst_reg;
94
95 static int swizzle_for_size(int size);
96
97 /**
98 * This struct is a corresponding struct to TGSI ureg_src.
99 */
100 class st_src_reg {
101 public:
102 st_src_reg(gl_register_file file, int index, const glsl_type *type)
103 {
104 this->file = file;
105 this->index = index;
106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
107 this->swizzle = swizzle_for_size(type->vector_elements);
108 else
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->index2D = 0;
112 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
113 this->reladdr = NULL;
114 this->reladdr2 = NULL;
115 this->has_index2 = false;
116 }
117
118 st_src_reg(gl_register_file file, int index, int type)
119 {
120 this->type = type;
121 this->file = file;
122 this->index = index;
123 this->index2D = 0;
124 this->swizzle = SWIZZLE_XYZW;
125 this->negate = 0;
126 this->reladdr = NULL;
127 this->reladdr2 = NULL;
128 this->has_index2 = false;
129 }
130
131 st_src_reg(gl_register_file file, int index, int type, int index2D)
132 {
133 this->type = type;
134 this->file = file;
135 this->index = index;
136 this->index2D = index2D;
137 this->swizzle = SWIZZLE_XYZW;
138 this->negate = 0;
139 this->reladdr = NULL;
140 this->reladdr2 = NULL;
141 this->has_index2 = false;
142 }
143
144 st_src_reg()
145 {
146 this->type = GLSL_TYPE_ERROR;
147 this->file = PROGRAM_UNDEFINED;
148 this->index = 0;
149 this->index2D = 0;
150 this->swizzle = 0;
151 this->negate = 0;
152 this->reladdr = NULL;
153 this->reladdr2 = NULL;
154 this->has_index2 = false;
155 }
156
157 explicit st_src_reg(st_dst_reg reg);
158
159 gl_register_file file; /**< PROGRAM_* from Mesa */
160 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
161 int index2D;
162 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate; /**< NEGATE_XYZW mask from mesa */
164 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
166 st_src_reg *reladdr;
167 st_src_reg *reladdr2;
168 bool has_index2;
169 };
170
171 class st_dst_reg {
172 public:
173 st_dst_reg(gl_register_file file, int writemask, int type, int index)
174 {
175 this->file = file;
176 this->index = index;
177 this->writemask = writemask;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 this->type = type;
181 }
182
183 st_dst_reg(gl_register_file file, int writemask, int type)
184 {
185 this->file = file;
186 this->index = 0;
187 this->writemask = writemask;
188 this->cond_mask = COND_TR;
189 this->reladdr = NULL;
190 this->type = type;
191 }
192
193 st_dst_reg()
194 {
195 this->type = GLSL_TYPE_ERROR;
196 this->file = PROGRAM_UNDEFINED;
197 this->index = 0;
198 this->writemask = 0;
199 this->cond_mask = COND_TR;
200 this->reladdr = NULL;
201 }
202
203 explicit st_dst_reg(st_src_reg reg);
204
205 gl_register_file file; /**< PROGRAM_* from Mesa */
206 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
208 GLuint cond_mask:4;
209 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
211 st_src_reg *reladdr;
212 };
213
214 st_src_reg::st_src_reg(st_dst_reg reg)
215 {
216 this->type = reg.type;
217 this->file = reg.file;
218 this->index = reg.index;
219 this->swizzle = SWIZZLE_XYZW;
220 this->negate = 0;
221 this->reladdr = reg.reladdr;
222 this->index2D = 0;
223 this->reladdr2 = NULL;
224 this->has_index2 = false;
225 }
226
227 st_dst_reg::st_dst_reg(st_src_reg reg)
228 {
229 this->type = reg.type;
230 this->file = reg.file;
231 this->index = reg.index;
232 this->writemask = WRITEMASK_XYZW;
233 this->cond_mask = COND_TR;
234 this->reladdr = reg.reladdr;
235 }
236
237 class glsl_to_tgsi_instruction : public exec_node {
238 public:
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
240
241 unsigned op;
242 st_dst_reg dst;
243 st_src_reg src[4];
244 /** Pointer to the ir source this tree came from for debugging */
245 ir_instruction *ir;
246 GLboolean cond_update;
247 bool saturate;
248 st_src_reg sampler; /**< sampler register */
249 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
250 int tex_target; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow;
252
253 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
254 unsigned tex_offset_num_offset;
255 int dead_mask; /**< Used in dead code elimination */
256
257 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
258 };
259
260 class variable_storage : public exec_node {
261 public:
262 variable_storage(ir_variable *var, gl_register_file file, int index)
263 : file(file), index(index), var(var)
264 {
265 /* empty */
266 }
267
268 gl_register_file file;
269 int index;
270 ir_variable *var; /* variable that maps to this, if any */
271 };
272
273 class immediate_storage : public exec_node {
274 public:
275 immediate_storage(gl_constant_value *values, int size, int type)
276 {
277 memcpy(this->values, values, size * sizeof(gl_constant_value));
278 this->size = size;
279 this->type = type;
280 }
281
282 gl_constant_value values[4];
283 int size; /**< Number of components (1-4) */
284 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
285 };
286
287 class function_entry : public exec_node {
288 public:
289 ir_function_signature *sig;
290
291 /**
292 * identifier of this function signature used by the program.
293 *
294 * At the point that TGSI instructions for function calls are
295 * generated, we don't know the address of the first instruction of
296 * the function body. So we make the BranchTarget that is called a
297 * small integer and rewrite them during set_branchtargets().
298 */
299 int sig_id;
300
301 /**
302 * Pointer to first instruction of the function body.
303 *
304 * Set during function body emits after main() is processed.
305 */
306 glsl_to_tgsi_instruction *bgn_inst;
307
308 /**
309 * Index of the first instruction of the function body in actual TGSI.
310 *
311 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
312 */
313 int inst;
314
315 /** Storage for the return value. */
316 st_src_reg return_reg;
317 };
318
319 struct glsl_to_tgsi_visitor : public ir_visitor {
320 public:
321 glsl_to_tgsi_visitor();
322 ~glsl_to_tgsi_visitor();
323
324 function_entry *current_function;
325
326 struct gl_context *ctx;
327 struct gl_program *prog;
328 struct gl_shader_program *shader_program;
329 struct gl_shader *shader;
330 struct gl_shader_compiler_options *options;
331
332 int next_temp;
333
334 unsigned array_sizes[MAX_ARRAYS];
335 unsigned next_array;
336
337 int num_address_regs;
338 int samplers_used;
339 bool indirect_addr_consts;
340
341 int glsl_version;
342 bool native_integers;
343 bool have_sqrt;
344
345 variable_storage *find_variable_storage(ir_variable *var);
346
347 int add_constant(gl_register_file file, gl_constant_value values[4],
348 int size, int datatype, GLuint *swizzle_out);
349
350 function_entry *get_function_signature(ir_function_signature *sig);
351
352 st_src_reg get_temp(const glsl_type *type);
353 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
354
355 st_src_reg st_src_reg_for_float(float val);
356 st_src_reg st_src_reg_for_int(int val);
357 st_src_reg st_src_reg_for_type(int type, int val);
358
359 /**
360 * \name Visit methods
361 *
362 * As typical for the visitor pattern, there must be one \c visit method for
363 * each concrete subclass of \c ir_instruction. Virtual base classes within
364 * the hierarchy should not have \c visit methods.
365 */
366 /*@{*/
367 virtual void visit(ir_variable *);
368 virtual void visit(ir_loop *);
369 virtual void visit(ir_loop_jump *);
370 virtual void visit(ir_function_signature *);
371 virtual void visit(ir_function *);
372 virtual void visit(ir_expression *);
373 virtual void visit(ir_swizzle *);
374 virtual void visit(ir_dereference_variable *);
375 virtual void visit(ir_dereference_array *);
376 virtual void visit(ir_dereference_record *);
377 virtual void visit(ir_assignment *);
378 virtual void visit(ir_constant *);
379 virtual void visit(ir_call *);
380 virtual void visit(ir_return *);
381 virtual void visit(ir_discard *);
382 virtual void visit(ir_texture *);
383 virtual void visit(ir_if *);
384 virtual void visit(ir_emit_vertex *);
385 virtual void visit(ir_end_primitive *);
386 /*@}*/
387
388 st_src_reg result;
389
390 /** List of variable_storage */
391 exec_list variables;
392
393 /** List of immediate_storage */
394 exec_list immediates;
395 unsigned num_immediates;
396
397 /** List of function_entry */
398 exec_list function_signatures;
399 int next_signature_id;
400
401 /** List of glsl_to_tgsi_instruction */
402 exec_list instructions;
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
405
406 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
407 st_dst_reg dst, st_src_reg src0);
408
409 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
410 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
411
412 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
413 st_dst_reg dst,
414 st_src_reg src0, st_src_reg src1, st_src_reg src2);
415
416 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
417 st_dst_reg dst,
418 st_src_reg src0, st_src_reg src1,
419 st_src_reg src2, st_src_reg src3);
420
421 unsigned get_opcode(ir_instruction *ir, unsigned op,
422 st_dst_reg dst,
423 st_src_reg src0, st_src_reg src1);
424
425 /**
426 * Emit the correct dot-product instruction for the type of arguments
427 */
428 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
429 st_dst_reg dst,
430 st_src_reg src0,
431 st_src_reg src1,
432 unsigned elements);
433
434 void emit_scalar(ir_instruction *ir, unsigned op,
435 st_dst_reg dst, st_src_reg src0);
436
437 void emit_scalar(ir_instruction *ir, unsigned op,
438 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
439
440 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
441
442 void emit_scs(ir_instruction *ir, unsigned op,
443 st_dst_reg dst, const st_src_reg &src);
444
445 bool try_emit_mad(ir_expression *ir,
446 int mul_operand);
447 bool try_emit_mad_for_and_not(ir_expression *ir,
448 int mul_operand);
449 bool try_emit_sat(ir_expression *ir);
450
451 void emit_swz(ir_expression *ir);
452
453 bool process_move_condition(ir_rvalue *ir);
454
455 void simplify_cmp(void);
456
457 void rename_temp_register(int index, int new_index);
458 int get_first_temp_read(int index);
459 int get_first_temp_write(int index);
460 int get_last_temp_read(int index);
461 int get_last_temp_write(int index);
462
463 void copy_propagate(void);
464 int eliminate_dead_code(void);
465 void merge_registers(void);
466 void renumber_registers(void);
467
468 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
469 st_dst_reg *l, st_src_reg *r);
470
471 void *mem_ctx;
472 };
473
474 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
475
476 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
477
478 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
479 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
480 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
481
482 static void
483 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
484
485 static void
486 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
487 {
488 va_list args;
489 va_start(args, fmt);
490 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
491 va_end(args);
492
493 prog->LinkStatus = GL_FALSE;
494 }
495
496 static int
497 swizzle_for_size(int size)
498 {
499 int size_swizzles[4] = {
500 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
501 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
502 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
503 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
504 };
505
506 assert((size >= 1) && (size <= 4));
507 return size_swizzles[size - 1];
508 }
509
510 static bool
511 is_tex_instruction(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->is_tex;
515 }
516
517 static unsigned
518 num_inst_dst_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->num_dst;
522 }
523
524 static unsigned
525 num_inst_src_regs(unsigned opcode)
526 {
527 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
528 return info->is_tex ? info->num_src - 1 : info->num_src;
529 }
530
531 glsl_to_tgsi_instruction *
532 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
533 st_dst_reg dst,
534 st_src_reg src0, st_src_reg src1,
535 st_src_reg src2, st_src_reg src3)
536 {
537 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
538 int num_reladdr = 0, i;
539
540 op = get_opcode(ir, op, dst, src0, src1);
541
542 /* If we have to do relative addressing, we want to load the ARL
543 * reg directly for one of the regs, and preload the other reladdr
544 * sources into temps.
545 */
546 num_reladdr += dst.reladdr != NULL;
547 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
548 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
549 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
550 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
551
552 reladdr_to_temp(ir, &src3, &num_reladdr);
553 reladdr_to_temp(ir, &src2, &num_reladdr);
554 reladdr_to_temp(ir, &src1, &num_reladdr);
555 reladdr_to_temp(ir, &src0, &num_reladdr);
556
557 if (dst.reladdr) {
558 emit_arl(ir, address_reg, *dst.reladdr);
559 num_reladdr--;
560 }
561 assert(num_reladdr == 0);
562
563 inst->op = op;
564 inst->dst = dst;
565 inst->src[0] = src0;
566 inst->src[1] = src1;
567 inst->src[2] = src2;
568 inst->src[3] = src3;
569 inst->ir = ir;
570 inst->dead_mask = 0;
571
572 inst->function = NULL;
573
574 /* Update indirect addressing status used by TGSI */
575 if (dst.reladdr) {
576 switch(dst.file) {
577 case PROGRAM_STATE_VAR:
578 case PROGRAM_CONSTANT:
579 case PROGRAM_UNIFORM:
580 this->indirect_addr_consts = true;
581 break;
582 case PROGRAM_IMMEDIATE:
583 assert(!"immediates should not have indirect addressing");
584 break;
585 default:
586 break;
587 }
588 }
589 else {
590 for (i=0; i<4; i++) {
591 if(inst->src[i].reladdr) {
592 switch(inst->src[i].file) {
593 case PROGRAM_STATE_VAR:
594 case PROGRAM_CONSTANT:
595 case PROGRAM_UNIFORM:
596 this->indirect_addr_consts = true;
597 break;
598 case PROGRAM_IMMEDIATE:
599 assert(!"immediates should not have indirect addressing");
600 break;
601 default:
602 break;
603 }
604 }
605 }
606 }
607
608 this->instructions.push_tail(inst);
609
610 return inst;
611 }
612
613 glsl_to_tgsi_instruction *
614 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
615 st_dst_reg dst, st_src_reg src0,
616 st_src_reg src1, st_src_reg src2)
617 {
618 return emit(ir, op, dst, src0, src1, src2, undef_src);
619 }
620
621 glsl_to_tgsi_instruction *
622 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
623 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
624 {
625 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
626 }
627
628 glsl_to_tgsi_instruction *
629 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
630 st_dst_reg dst, st_src_reg src0)
631 {
632 assert(dst.writemask != 0);
633 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
634 }
635
636 glsl_to_tgsi_instruction *
637 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
638 {
639 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
640 }
641
642 /**
643 * Determines whether to use an integer, unsigned integer, or float opcode
644 * based on the operands and input opcode, then emits the result.
645 */
646 unsigned
647 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
648 st_dst_reg dst,
649 st_src_reg src0, st_src_reg src1)
650 {
651 int type = GLSL_TYPE_FLOAT;
652
653 if (op == TGSI_OPCODE_MOV)
654 return op;
655
656 assert(src0.type != GLSL_TYPE_ARRAY);
657 assert(src0.type != GLSL_TYPE_STRUCT);
658 assert(src1.type != GLSL_TYPE_ARRAY);
659 assert(src1.type != GLSL_TYPE_STRUCT);
660
661 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
662 type = GLSL_TYPE_FLOAT;
663 else if (native_integers)
664 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
665
666 #define case4(c, f, i, u) \
667 case TGSI_OPCODE_##c: \
668 if (type == GLSL_TYPE_INT) \
669 op = TGSI_OPCODE_##i; \
670 else if (type == GLSL_TYPE_UINT) \
671 op = TGSI_OPCODE_##u; \
672 else \
673 op = TGSI_OPCODE_##f; \
674 break;
675
676 #define case3(f, i, u) case4(f, f, i, u)
677 #define case2fi(f, i) case4(f, f, i, i)
678 #define case2iu(i, u) case4(i, LAST, i, u)
679
680 #define casecomp(c, f, i, u) \
681 case TGSI_OPCODE_##c: \
682 if (type == GLSL_TYPE_INT) \
683 op = TGSI_OPCODE_##i; \
684 else if (type == GLSL_TYPE_UINT) \
685 op = TGSI_OPCODE_##u; \
686 else if (native_integers) \
687 op = TGSI_OPCODE_##f; \
688 else \
689 op = TGSI_OPCODE_##c; \
690 break;
691
692 switch(op) {
693 case2fi(ADD, UADD);
694 case2fi(MUL, UMUL);
695 case2fi(MAD, UMAD);
696 case3(DIV, IDIV, UDIV);
697 case3(MAX, IMAX, UMAX);
698 case3(MIN, IMIN, UMIN);
699 case2iu(MOD, UMOD);
700
701 casecomp(SEQ, FSEQ, USEQ, USEQ);
702 casecomp(SNE, FSNE, USNE, USNE);
703 casecomp(SGE, FSGE, ISGE, USGE);
704 casecomp(SLT, FSLT, ISLT, USLT);
705
706 case2iu(ISHR, USHR);
707
708 case2fi(SSG, ISSG);
709 case3(ABS, IABS, IABS);
710
711 case2iu(IBFE, UBFE);
712 case2iu(IMSB, UMSB);
713 case2iu(IMUL_HI, UMUL_HI);
714 default: break;
715 }
716
717 assert(op != TGSI_OPCODE_LAST);
718 return op;
719 }
720
721 glsl_to_tgsi_instruction *
722 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
723 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
724 unsigned elements)
725 {
726 static const unsigned dot_opcodes[] = {
727 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
728 };
729
730 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
731 }
732
733 /**
734 * Emits TGSI scalar opcodes to produce unique answers across channels.
735 *
736 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
737 * channel determines the result across all channels. So to do a vec4
738 * of this operation, we want to emit a scalar per source channel used
739 * to produce dest channels.
740 */
741 void
742 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
743 st_dst_reg dst,
744 st_src_reg orig_src0, st_src_reg orig_src1)
745 {
746 int i, j;
747 int done_mask = ~dst.writemask;
748
749 /* TGSI RCP is a scalar operation splatting results to all channels,
750 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
751 * dst channels.
752 */
753 for (i = 0; i < 4; i++) {
754 GLuint this_mask = (1 << i);
755 glsl_to_tgsi_instruction *inst;
756 st_src_reg src0 = orig_src0;
757 st_src_reg src1 = orig_src1;
758
759 if (done_mask & this_mask)
760 continue;
761
762 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
763 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
764 for (j = i + 1; j < 4; j++) {
765 /* If there is another enabled component in the destination that is
766 * derived from the same inputs, generate its value on this pass as
767 * well.
768 */
769 if (!(done_mask & (1 << j)) &&
770 GET_SWZ(src0.swizzle, j) == src0_swiz &&
771 GET_SWZ(src1.swizzle, j) == src1_swiz) {
772 this_mask |= (1 << j);
773 }
774 }
775 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
776 src0_swiz, src0_swiz);
777 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
778 src1_swiz, src1_swiz);
779
780 inst = emit(ir, op, dst, src0, src1);
781 inst->dst.writemask = this_mask;
782 done_mask |= this_mask;
783 }
784 }
785
786 void
787 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
788 st_dst_reg dst, st_src_reg src0)
789 {
790 st_src_reg undef = undef_src;
791
792 undef.swizzle = SWIZZLE_XXXX;
793
794 emit_scalar(ir, op, dst, src0, undef);
795 }
796
797 void
798 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
799 st_dst_reg dst, st_src_reg src0)
800 {
801 int op = TGSI_OPCODE_ARL;
802
803 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
804 op = TGSI_OPCODE_UARL;
805
806 assert(dst.file == PROGRAM_ADDRESS);
807 if (dst.index >= this->num_address_regs)
808 this->num_address_regs = dst.index + 1;
809
810 emit(NULL, op, dst, src0);
811 }
812
813 /**
814 * Emit an TGSI_OPCODE_SCS instruction
815 *
816 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
817 * Instead of splatting its result across all four components of the
818 * destination, it writes one value to the \c x component and another value to
819 * the \c y component.
820 *
821 * \param ir IR instruction being processed
822 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
823 * on which value is desired.
824 * \param dst Destination register
825 * \param src Source register
826 */
827 void
828 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
829 st_dst_reg dst,
830 const st_src_reg &src)
831 {
832 /* Vertex programs cannot use the SCS opcode.
833 */
834 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
835 emit_scalar(ir, op, dst, src);
836 return;
837 }
838
839 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
840 const unsigned scs_mask = (1U << component);
841 int done_mask = ~dst.writemask;
842 st_src_reg tmp;
843
844 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
845
846 /* If there are compnents in the destination that differ from the component
847 * that will be written by the SCS instrution, we'll need a temporary.
848 */
849 if (scs_mask != unsigned(dst.writemask)) {
850 tmp = get_temp(glsl_type::vec4_type);
851 }
852
853 for (unsigned i = 0; i < 4; i++) {
854 unsigned this_mask = (1U << i);
855 st_src_reg src0 = src;
856
857 if ((done_mask & this_mask) != 0)
858 continue;
859
860 /* The source swizzle specified which component of the source generates
861 * sine / cosine for the current component in the destination. The SCS
862 * instruction requires that this value be swizzle to the X component.
863 * Replace the current swizzle with a swizzle that puts the source in
864 * the X component.
865 */
866 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
867
868 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
869 src0_swiz, src0_swiz);
870 for (unsigned j = i + 1; j < 4; j++) {
871 /* If there is another enabled component in the destination that is
872 * derived from the same inputs, generate its value on this pass as
873 * well.
874 */
875 if (!(done_mask & (1 << j)) &&
876 GET_SWZ(src0.swizzle, j) == src0_swiz) {
877 this_mask |= (1 << j);
878 }
879 }
880
881 if (this_mask != scs_mask) {
882 glsl_to_tgsi_instruction *inst;
883 st_dst_reg tmp_dst = st_dst_reg(tmp);
884
885 /* Emit the SCS instruction.
886 */
887 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
888 inst->dst.writemask = scs_mask;
889
890 /* Move the result of the SCS instruction to the desired location in
891 * the destination.
892 */
893 tmp.swizzle = MAKE_SWIZZLE4(component, component,
894 component, component);
895 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
896 inst->dst.writemask = this_mask;
897 } else {
898 /* Emit the SCS instruction to write directly to the destination.
899 */
900 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
901 inst->dst.writemask = scs_mask;
902 }
903
904 done_mask |= this_mask;
905 }
906 }
907
908 int
909 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
910 gl_constant_value values[4], int size, int datatype,
911 GLuint *swizzle_out)
912 {
913 if (file == PROGRAM_CONSTANT) {
914 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
915 size, datatype, swizzle_out);
916 } else {
917 int index = 0;
918 immediate_storage *entry;
919 assert(file == PROGRAM_IMMEDIATE);
920
921 /* Search immediate storage to see if we already have an identical
922 * immediate that we can use instead of adding a duplicate entry.
923 */
924 foreach_in_list(immediate_storage, entry, &this->immediates) {
925 if (entry->size == size &&
926 entry->type == datatype &&
927 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
928 return index;
929 }
930 index++;
931 }
932
933 /* Add this immediate to the list. */
934 entry = new(mem_ctx) immediate_storage(values, size, datatype);
935 this->immediates.push_tail(entry);
936 this->num_immediates++;
937 return index;
938 }
939 }
940
941 st_src_reg
942 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
943 {
944 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
945 union gl_constant_value uval;
946
947 uval.f = val;
948 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
949
950 return src;
951 }
952
953 st_src_reg
954 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
955 {
956 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
957 union gl_constant_value uval;
958
959 assert(native_integers);
960
961 uval.i = val;
962 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
963
964 return src;
965 }
966
967 st_src_reg
968 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
969 {
970 if (native_integers)
971 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
972 st_src_reg_for_int(val);
973 else
974 return st_src_reg_for_float(val);
975 }
976
977 static int
978 type_size(const struct glsl_type *type)
979 {
980 unsigned int i;
981 int size;
982
983 switch (type->base_type) {
984 case GLSL_TYPE_UINT:
985 case GLSL_TYPE_INT:
986 case GLSL_TYPE_FLOAT:
987 case GLSL_TYPE_BOOL:
988 if (type->is_matrix()) {
989 return type->matrix_columns;
990 } else {
991 /* Regardless of size of vector, it gets a vec4. This is bad
992 * packing for things like floats, but otherwise arrays become a
993 * mess. Hopefully a later pass over the code can pack scalars
994 * down if appropriate.
995 */
996 return 1;
997 }
998 case GLSL_TYPE_ARRAY:
999 assert(type->length > 0);
1000 return type_size(type->fields.array) * type->length;
1001 case GLSL_TYPE_STRUCT:
1002 size = 0;
1003 for (i = 0; i < type->length; i++) {
1004 size += type_size(type->fields.structure[i].type);
1005 }
1006 return size;
1007 case GLSL_TYPE_SAMPLER:
1008 case GLSL_TYPE_IMAGE:
1009 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1010 * at link time.
1011 */
1012 return 1;
1013 case GLSL_TYPE_ATOMIC_UINT:
1014 case GLSL_TYPE_INTERFACE:
1015 case GLSL_TYPE_VOID:
1016 case GLSL_TYPE_ERROR:
1017 assert(!"Invalid type in type_size");
1018 break;
1019 }
1020 return 0;
1021 }
1022
1023 /**
1024 * In the initial pass of codegen, we assign temporary numbers to
1025 * intermediate results. (not SSA -- variable assignments will reuse
1026 * storage).
1027 */
1028 st_src_reg
1029 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1030 {
1031 st_src_reg src;
1032
1033 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1034 src.reladdr = NULL;
1035 src.negate = 0;
1036
1037 if (!options->EmitNoIndirectTemp &&
1038 (type->is_array() || type->is_matrix())) {
1039
1040 src.file = PROGRAM_ARRAY;
1041 src.index = next_array << 16 | 0x8000;
1042 array_sizes[next_array] = type_size(type);
1043 ++next_array;
1044
1045 } else {
1046 src.file = PROGRAM_TEMPORARY;
1047 src.index = next_temp;
1048 next_temp += type_size(type);
1049 }
1050
1051 if (type->is_array() || type->is_record()) {
1052 src.swizzle = SWIZZLE_NOOP;
1053 } else {
1054 src.swizzle = swizzle_for_size(type->vector_elements);
1055 }
1056
1057 return src;
1058 }
1059
1060 variable_storage *
1061 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1062 {
1063
1064 foreach_in_list(variable_storage, entry, &this->variables) {
1065 if (entry->var == var)
1066 return entry;
1067 }
1068
1069 return NULL;
1070 }
1071
1072 void
1073 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1074 {
1075 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1076 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1077
1078 fp->OriginUpperLeft = ir->data.origin_upper_left;
1079 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1080 }
1081
1082 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1083 unsigned int i;
1084 const ir_state_slot *const slots = ir->state_slots;
1085 assert(ir->state_slots != NULL);
1086
1087 /* Check if this statevar's setup in the STATE file exactly
1088 * matches how we'll want to reference it as a
1089 * struct/array/whatever. If not, then we need to move it into
1090 * temporary storage and hope that it'll get copy-propagated
1091 * out.
1092 */
1093 for (i = 0; i < ir->num_state_slots; i++) {
1094 if (slots[i].swizzle != SWIZZLE_XYZW) {
1095 break;
1096 }
1097 }
1098
1099 variable_storage *storage;
1100 st_dst_reg dst;
1101 if (i == ir->num_state_slots) {
1102 /* We'll set the index later. */
1103 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1104 this->variables.push_tail(storage);
1105
1106 dst = undef_dst;
1107 } else {
1108 /* The variable_storage constructor allocates slots based on the size
1109 * of the type. However, this had better match the number of state
1110 * elements that we're going to copy into the new temporary.
1111 */
1112 assert((int) ir->num_state_slots == type_size(ir->type));
1113
1114 dst = st_dst_reg(get_temp(ir->type));
1115
1116 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1117
1118 this->variables.push_tail(storage);
1119 }
1120
1121
1122 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1123 int index = _mesa_add_state_reference(this->prog->Parameters,
1124 (gl_state_index *)slots[i].tokens);
1125
1126 if (storage->file == PROGRAM_STATE_VAR) {
1127 if (storage->index == -1) {
1128 storage->index = index;
1129 } else {
1130 assert(index == storage->index + (int)i);
1131 }
1132 } else {
1133 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1134 * the data being moved since MOV does not care about the type of
1135 * data it is moving, and we don't want to declare registers with
1136 * array or struct types.
1137 */
1138 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1139 src.swizzle = slots[i].swizzle;
1140 emit(ir, TGSI_OPCODE_MOV, dst, src);
1141 /* even a float takes up a whole vec4 reg in a struct/array. */
1142 dst.index++;
1143 }
1144 }
1145
1146 if (storage->file == PROGRAM_TEMPORARY &&
1147 dst.index != storage->index + (int) ir->num_state_slots) {
1148 fail_link(this->shader_program,
1149 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1150 ir->name, dst.index - storage->index,
1151 type_size(ir->type));
1152 }
1153 }
1154 }
1155
1156 void
1157 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1158 {
1159 emit(NULL, TGSI_OPCODE_BGNLOOP);
1160
1161 visit_exec_list(&ir->body_instructions, this);
1162
1163 emit(NULL, TGSI_OPCODE_ENDLOOP);
1164 }
1165
1166 void
1167 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1168 {
1169 switch (ir->mode) {
1170 case ir_loop_jump::jump_break:
1171 emit(NULL, TGSI_OPCODE_BRK);
1172 break;
1173 case ir_loop_jump::jump_continue:
1174 emit(NULL, TGSI_OPCODE_CONT);
1175 break;
1176 }
1177 }
1178
1179
1180 void
1181 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1182 {
1183 assert(0);
1184 (void)ir;
1185 }
1186
1187 void
1188 glsl_to_tgsi_visitor::visit(ir_function *ir)
1189 {
1190 /* Ignore function bodies other than main() -- we shouldn't see calls to
1191 * them since they should all be inlined before we get to glsl_to_tgsi.
1192 */
1193 if (strcmp(ir->name, "main") == 0) {
1194 const ir_function_signature *sig;
1195 exec_list empty;
1196
1197 sig = ir->matching_signature(NULL, &empty, false);
1198
1199 assert(sig);
1200
1201 foreach_in_list(ir_instruction, ir, &sig->body) {
1202 ir->accept(this);
1203 }
1204 }
1205 }
1206
1207 bool
1208 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1209 {
1210 int nonmul_operand = 1 - mul_operand;
1211 st_src_reg a, b, c;
1212 st_dst_reg result_dst;
1213
1214 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1215 if (!expr || expr->operation != ir_binop_mul)
1216 return false;
1217
1218 expr->operands[0]->accept(this);
1219 a = this->result;
1220 expr->operands[1]->accept(this);
1221 b = this->result;
1222 ir->operands[nonmul_operand]->accept(this);
1223 c = this->result;
1224
1225 this->result = get_temp(ir->type);
1226 result_dst = st_dst_reg(this->result);
1227 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1228 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1229
1230 return true;
1231 }
1232
1233 /**
1234 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1235 *
1236 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1237 * implemented using multiplication, and logical-or is implemented using
1238 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1239 * As result, the logical expression (a & !b) can be rewritten as:
1240 *
1241 * - a * !b
1242 * - a * (1 - b)
1243 * - (a * 1) - (a * b)
1244 * - a + -(a * b)
1245 * - a + (a * -b)
1246 *
1247 * This final expression can be implemented as a single MAD(a, -b, a)
1248 * instruction.
1249 */
1250 bool
1251 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1252 {
1253 const int other_operand = 1 - try_operand;
1254 st_src_reg a, b;
1255
1256 ir_expression *expr = ir->operands[try_operand]->as_expression();
1257 if (!expr || expr->operation != ir_unop_logic_not)
1258 return false;
1259
1260 ir->operands[other_operand]->accept(this);
1261 a = this->result;
1262 expr->operands[0]->accept(this);
1263 b = this->result;
1264
1265 b.negate = ~b.negate;
1266
1267 this->result = get_temp(ir->type);
1268 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1269
1270 return true;
1271 }
1272
1273 bool
1274 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1275 {
1276 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1277 */
1278 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1279 !st_context(this->ctx)->has_shader_model3) {
1280 return false;
1281 }
1282
1283 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1284 if (!sat_src)
1285 return false;
1286
1287 sat_src->accept(this);
1288 st_src_reg src = this->result;
1289
1290 /* If we generated an expression instruction into a temporary in
1291 * processing the saturate's operand, apply the saturate to that
1292 * instruction. Otherwise, generate a MOV to do the saturate.
1293 *
1294 * Note that we have to be careful to only do this optimization if
1295 * the instruction in question was what generated src->result. For
1296 * example, ir_dereference_array might generate a MUL instruction
1297 * to create the reladdr, and return us a src reg using that
1298 * reladdr. That MUL result is not the value we're trying to
1299 * saturate.
1300 */
1301 ir_expression *sat_src_expr = sat_src->as_expression();
1302 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1303 sat_src_expr->operation == ir_binop_add ||
1304 sat_src_expr->operation == ir_binop_dot)) {
1305 glsl_to_tgsi_instruction *new_inst;
1306 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1307 new_inst->saturate = true;
1308 } else {
1309 this->result = get_temp(ir->type);
1310 st_dst_reg result_dst = st_dst_reg(this->result);
1311 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1312 glsl_to_tgsi_instruction *inst;
1313 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1314 inst->saturate = true;
1315 }
1316
1317 return true;
1318 }
1319
1320 void
1321 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1322 st_src_reg *reg, int *num_reladdr)
1323 {
1324 if (!reg->reladdr && !reg->reladdr2)
1325 return;
1326
1327 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1328 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1329
1330 if (*num_reladdr != 1) {
1331 st_src_reg temp = get_temp(glsl_type::vec4_type);
1332
1333 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1334 *reg = temp;
1335 }
1336
1337 (*num_reladdr)--;
1338 }
1339
1340 void
1341 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1342 {
1343 unsigned int operand;
1344 st_src_reg op[Elements(ir->operands)];
1345 st_src_reg result_src;
1346 st_dst_reg result_dst;
1347
1348 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1349 */
1350 if (ir->operation == ir_binop_add) {
1351 if (try_emit_mad(ir, 1))
1352 return;
1353 if (try_emit_mad(ir, 0))
1354 return;
1355 }
1356
1357 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1358 */
1359 if (!native_integers && ir->operation == ir_binop_logic_and) {
1360 if (try_emit_mad_for_and_not(ir, 1))
1361 return;
1362 if (try_emit_mad_for_and_not(ir, 0))
1363 return;
1364 }
1365
1366 if (try_emit_sat(ir))
1367 return;
1368
1369 if (ir->operation == ir_quadop_vector)
1370 assert(!"ir_quadop_vector should have been lowered");
1371
1372 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1373 this->result.file = PROGRAM_UNDEFINED;
1374 ir->operands[operand]->accept(this);
1375 if (this->result.file == PROGRAM_UNDEFINED) {
1376 printf("Failed to get tree for expression operand:\n");
1377 ir->operands[operand]->print();
1378 printf("\n");
1379 exit(1);
1380 }
1381 op[operand] = this->result;
1382
1383 /* Matrix expression operands should have been broken down to vector
1384 * operations already.
1385 */
1386 assert(!ir->operands[operand]->type->is_matrix());
1387 }
1388
1389 int vector_elements = ir->operands[0]->type->vector_elements;
1390 if (ir->operands[1]) {
1391 vector_elements = MAX2(vector_elements,
1392 ir->operands[1]->type->vector_elements);
1393 }
1394
1395 this->result.file = PROGRAM_UNDEFINED;
1396
1397 /* Storage for our result. Ideally for an assignment we'd be using
1398 * the actual storage for the result here, instead.
1399 */
1400 result_src = get_temp(ir->type);
1401 /* convenience for the emit functions below. */
1402 result_dst = st_dst_reg(result_src);
1403 /* Limit writes to the channels that will be used by result_src later.
1404 * This does limit this temp's use as a temporary for multi-instruction
1405 * sequences.
1406 */
1407 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1408
1409 switch (ir->operation) {
1410 case ir_unop_logic_not:
1411 if (result_dst.type != GLSL_TYPE_FLOAT)
1412 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1413 else {
1414 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1415 * older GPUs implement SEQ using multiple instructions (i915 uses two
1416 * SGE instructions and a MUL instruction). Since our logic values are
1417 * 0.0 and 1.0, 1-x also implements !x.
1418 */
1419 op[0].negate = ~op[0].negate;
1420 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1421 }
1422 break;
1423 case ir_unop_neg:
1424 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1425 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1426 else {
1427 op[0].negate = ~op[0].negate;
1428 result_src = op[0];
1429 }
1430 break;
1431 case ir_unop_abs:
1432 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1433 break;
1434 case ir_unop_sign:
1435 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1436 break;
1437 case ir_unop_rcp:
1438 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1439 break;
1440
1441 case ir_unop_exp2:
1442 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1443 break;
1444 case ir_unop_exp:
1445 case ir_unop_log:
1446 assert(!"not reached: should be handled by ir_explog_to_explog2");
1447 break;
1448 case ir_unop_log2:
1449 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1450 break;
1451 case ir_unop_sin:
1452 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1453 break;
1454 case ir_unop_cos:
1455 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1456 break;
1457 case ir_unop_sin_reduced:
1458 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1459 break;
1460 case ir_unop_cos_reduced:
1461 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1462 break;
1463
1464 case ir_unop_dFdx:
1465 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1466 break;
1467 case ir_unop_dFdy:
1468 {
1469 /* The X component contains 1 or -1 depending on whether the framebuffer
1470 * is a FBO or the window system buffer, respectively.
1471 * It is then multiplied with the source operand of DDY.
1472 */
1473 static const gl_state_index transform_y_state[STATE_LENGTH]
1474 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1475
1476 unsigned transform_y_index =
1477 _mesa_add_state_reference(this->prog->Parameters,
1478 transform_y_state);
1479
1480 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1481 transform_y_index,
1482 glsl_type::vec4_type);
1483 transform_y.swizzle = SWIZZLE_XXXX;
1484
1485 st_src_reg temp = get_temp(glsl_type::vec4_type);
1486
1487 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1488 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1489 break;
1490 }
1491
1492 case ir_unop_noise: {
1493 /* At some point, a motivated person could add a better
1494 * implementation of noise. Currently not even the nvidia
1495 * binary drivers do anything more than this. In any case, the
1496 * place to do this is in the GL state tracker, not the poor
1497 * driver.
1498 */
1499 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1500 break;
1501 }
1502
1503 case ir_binop_add:
1504 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1505 break;
1506 case ir_binop_sub:
1507 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1508 break;
1509
1510 case ir_binop_mul:
1511 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1512 break;
1513 case ir_binop_div:
1514 if (result_dst.type == GLSL_TYPE_FLOAT)
1515 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1516 else
1517 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1518 break;
1519 case ir_binop_mod:
1520 if (result_dst.type == GLSL_TYPE_FLOAT)
1521 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1522 else
1523 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1524 break;
1525
1526 case ir_binop_less:
1527 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1528 break;
1529 case ir_binop_greater:
1530 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1531 break;
1532 case ir_binop_lequal:
1533 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1534 break;
1535 case ir_binop_gequal:
1536 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1537 break;
1538 case ir_binop_equal:
1539 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1540 break;
1541 case ir_binop_nequal:
1542 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1543 break;
1544 case ir_binop_all_equal:
1545 /* "==" operator producing a scalar boolean. */
1546 if (ir->operands[0]->type->is_vector() ||
1547 ir->operands[1]->type->is_vector()) {
1548 st_src_reg temp = get_temp(native_integers ?
1549 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1550 glsl_type::vec4_type);
1551
1552 if (native_integers) {
1553 st_dst_reg temp_dst = st_dst_reg(temp);
1554 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1555
1556 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1557
1558 /* Emit 1-3 AND operations to combine the SEQ results. */
1559 switch (ir->operands[0]->type->vector_elements) {
1560 case 2:
1561 break;
1562 case 3:
1563 temp_dst.writemask = WRITEMASK_Y;
1564 temp1.swizzle = SWIZZLE_YYYY;
1565 temp2.swizzle = SWIZZLE_ZZZZ;
1566 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1567 break;
1568 case 4:
1569 temp_dst.writemask = WRITEMASK_X;
1570 temp1.swizzle = SWIZZLE_XXXX;
1571 temp2.swizzle = SWIZZLE_YYYY;
1572 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1573 temp_dst.writemask = WRITEMASK_Y;
1574 temp1.swizzle = SWIZZLE_ZZZZ;
1575 temp2.swizzle = SWIZZLE_WWWW;
1576 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1577 }
1578
1579 temp1.swizzle = SWIZZLE_XXXX;
1580 temp2.swizzle = SWIZZLE_YYYY;
1581 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1582 } else {
1583 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1584
1585 /* After the dot-product, the value will be an integer on the
1586 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1587 */
1588 emit_dp(ir, result_dst, temp, temp, vector_elements);
1589
1590 /* Negating the result of the dot-product gives values on the range
1591 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1592 * This is achieved using SGE.
1593 */
1594 st_src_reg sge_src = result_src;
1595 sge_src.negate = ~sge_src.negate;
1596 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1597 }
1598 } else {
1599 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1600 }
1601 break;
1602 case ir_binop_any_nequal:
1603 /* "!=" operator producing a scalar boolean. */
1604 if (ir->operands[0]->type->is_vector() ||
1605 ir->operands[1]->type->is_vector()) {
1606 st_src_reg temp = get_temp(native_integers ?
1607 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1608 glsl_type::vec4_type);
1609 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1610
1611 if (native_integers) {
1612 st_dst_reg temp_dst = st_dst_reg(temp);
1613 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1614
1615 /* Emit 1-3 OR operations to combine the SNE results. */
1616 switch (ir->operands[0]->type->vector_elements) {
1617 case 2:
1618 break;
1619 case 3:
1620 temp_dst.writemask = WRITEMASK_Y;
1621 temp1.swizzle = SWIZZLE_YYYY;
1622 temp2.swizzle = SWIZZLE_ZZZZ;
1623 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1624 break;
1625 case 4:
1626 temp_dst.writemask = WRITEMASK_X;
1627 temp1.swizzle = SWIZZLE_XXXX;
1628 temp2.swizzle = SWIZZLE_YYYY;
1629 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1630 temp_dst.writemask = WRITEMASK_Y;
1631 temp1.swizzle = SWIZZLE_ZZZZ;
1632 temp2.swizzle = SWIZZLE_WWWW;
1633 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1634 }
1635
1636 temp1.swizzle = SWIZZLE_XXXX;
1637 temp2.swizzle = SWIZZLE_YYYY;
1638 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1639 } else {
1640 /* After the dot-product, the value will be an integer on the
1641 * range [0,4]. Zero stays zero, and positive values become 1.0.
1642 */
1643 glsl_to_tgsi_instruction *const dp =
1644 emit_dp(ir, result_dst, temp, temp, vector_elements);
1645 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1646 /* The clamping to [0,1] can be done for free in the fragment
1647 * shader with a saturate.
1648 */
1649 dp->saturate = true;
1650 } else {
1651 /* Negating the result of the dot-product gives values on the range
1652 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1653 * achieved using SLT.
1654 */
1655 st_src_reg slt_src = result_src;
1656 slt_src.negate = ~slt_src.negate;
1657 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1658 }
1659 }
1660 } else {
1661 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1662 }
1663 break;
1664
1665 case ir_unop_any: {
1666 assert(ir->operands[0]->type->is_vector());
1667
1668 if (native_integers) {
1669 int dst_swizzle = 0, op0_swizzle, i;
1670 st_src_reg accum = op[0];
1671
1672 op0_swizzle = op[0].swizzle;
1673 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1674 GET_SWZ(op0_swizzle, 0),
1675 GET_SWZ(op0_swizzle, 0),
1676 GET_SWZ(op0_swizzle, 0));
1677 for (i = 0; i < 4; i++) {
1678 if (result_dst.writemask & (1 << i)) {
1679 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1680 break;
1681 }
1682 }
1683 assert(i != 4);
1684 assert(ir->operands[0]->type->is_boolean());
1685
1686 /* OR all the components together, since they should be either 0 or ~0
1687 */
1688 switch (ir->operands[0]->type->vector_elements) {
1689 case 4:
1690 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1691 GET_SWZ(op0_swizzle, 3),
1692 GET_SWZ(op0_swizzle, 3),
1693 GET_SWZ(op0_swizzle, 3));
1694 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1695 accum = st_src_reg(result_dst);
1696 accum.swizzle = dst_swizzle;
1697 /* fallthrough */
1698 case 3:
1699 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1700 GET_SWZ(op0_swizzle, 2),
1701 GET_SWZ(op0_swizzle, 2),
1702 GET_SWZ(op0_swizzle, 2));
1703 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1704 accum = st_src_reg(result_dst);
1705 accum.swizzle = dst_swizzle;
1706 /* fallthrough */
1707 case 2:
1708 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1709 GET_SWZ(op0_swizzle, 1),
1710 GET_SWZ(op0_swizzle, 1),
1711 GET_SWZ(op0_swizzle, 1));
1712 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1713 break;
1714 default:
1715 assert(!"Unexpected vector size");
1716 break;
1717 }
1718 } else {
1719 /* After the dot-product, the value will be an integer on the
1720 * range [0,4]. Zero stays zero, and positive values become 1.0.
1721 */
1722 glsl_to_tgsi_instruction *const dp =
1723 emit_dp(ir, result_dst, op[0], op[0],
1724 ir->operands[0]->type->vector_elements);
1725 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1726 result_dst.type == GLSL_TYPE_FLOAT) {
1727 /* The clamping to [0,1] can be done for free in the fragment
1728 * shader with a saturate.
1729 */
1730 dp->saturate = true;
1731 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1732 /* Negating the result of the dot-product gives values on the range
1733 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1734 * is achieved using SLT.
1735 */
1736 st_src_reg slt_src = result_src;
1737 slt_src.negate = ~slt_src.negate;
1738 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1739 }
1740 else {
1741 /* Use SNE 0 if integers are being used as boolean values. */
1742 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1743 }
1744 }
1745 break;
1746 }
1747
1748 case ir_binop_logic_xor:
1749 if (native_integers)
1750 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1751 else
1752 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1753 break;
1754
1755 case ir_binop_logic_or: {
1756 if (native_integers) {
1757 /* If integers are used as booleans, we can use an actual "or"
1758 * instruction.
1759 */
1760 assert(native_integers);
1761 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1762 } else {
1763 /* After the addition, the value will be an integer on the
1764 * range [0,2]. Zero stays zero, and positive values become 1.0.
1765 */
1766 glsl_to_tgsi_instruction *add =
1767 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1768 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1769 /* The clamping to [0,1] can be done for free in the fragment
1770 * shader with a saturate if floats are being used as boolean values.
1771 */
1772 add->saturate = true;
1773 } else {
1774 /* Negating the result of the addition gives values on the range
1775 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1776 * is achieved using SLT.
1777 */
1778 st_src_reg slt_src = result_src;
1779 slt_src.negate = ~slt_src.negate;
1780 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1781 }
1782 }
1783 break;
1784 }
1785
1786 case ir_binop_logic_and:
1787 /* If native integers are disabled, the bool args are stored as float 0.0
1788 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1789 * actual AND opcode.
1790 */
1791 if (native_integers)
1792 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1793 else
1794 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1795 break;
1796
1797 case ir_binop_dot:
1798 assert(ir->operands[0]->type->is_vector());
1799 assert(ir->operands[0]->type == ir->operands[1]->type);
1800 emit_dp(ir, result_dst, op[0], op[1],
1801 ir->operands[0]->type->vector_elements);
1802 break;
1803
1804 case ir_unop_sqrt:
1805 if (have_sqrt) {
1806 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1807 }
1808 else {
1809 /* sqrt(x) = x * rsq(x). */
1810 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1811 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1812 /* For incoming channels <= 0, set the result to 0. */
1813 op[0].negate = ~op[0].negate;
1814 emit(ir, TGSI_OPCODE_CMP, result_dst,
1815 op[0], result_src, st_src_reg_for_float(0.0));
1816 }
1817 break;
1818 case ir_unop_rsq:
1819 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1820 break;
1821 case ir_unop_i2f:
1822 if (native_integers) {
1823 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1824 break;
1825 }
1826 /* fallthrough to next case otherwise */
1827 case ir_unop_b2f:
1828 if (native_integers) {
1829 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1830 break;
1831 }
1832 /* fallthrough to next case otherwise */
1833 case ir_unop_i2u:
1834 case ir_unop_u2i:
1835 /* Converting between signed and unsigned integers is a no-op. */
1836 result_src = op[0];
1837 break;
1838 case ir_unop_b2i:
1839 if (native_integers) {
1840 /* Booleans are stored as integers using ~0 for true and 0 for false.
1841 * GLSL requires that int(bool) return 1 for true and 0 for false.
1842 * This conversion is done with AND, but it could be done with NEG.
1843 */
1844 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1845 } else {
1846 /* Booleans and integers are both stored as floats when native
1847 * integers are disabled.
1848 */
1849 result_src = op[0];
1850 }
1851 break;
1852 case ir_unop_f2i:
1853 if (native_integers)
1854 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1855 else
1856 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1857 break;
1858 case ir_unop_f2u:
1859 if (native_integers)
1860 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1861 else
1862 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1863 break;
1864 case ir_unop_bitcast_f2i:
1865 result_src = op[0];
1866 result_src.type = GLSL_TYPE_INT;
1867 break;
1868 case ir_unop_bitcast_f2u:
1869 result_src = op[0];
1870 result_src.type = GLSL_TYPE_UINT;
1871 break;
1872 case ir_unop_bitcast_i2f:
1873 case ir_unop_bitcast_u2f:
1874 result_src = op[0];
1875 result_src.type = GLSL_TYPE_FLOAT;
1876 break;
1877 case ir_unop_f2b:
1878 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1879 break;
1880 case ir_unop_i2b:
1881 if (native_integers)
1882 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1883 else
1884 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1885 break;
1886 case ir_unop_trunc:
1887 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1888 break;
1889 case ir_unop_ceil:
1890 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1891 break;
1892 case ir_unop_floor:
1893 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1894 break;
1895 case ir_unop_round_even:
1896 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1897 break;
1898 case ir_unop_fract:
1899 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1900 break;
1901
1902 case ir_binop_min:
1903 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1904 break;
1905 case ir_binop_max:
1906 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1907 break;
1908 case ir_binop_pow:
1909 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1910 break;
1911
1912 case ir_unop_bit_not:
1913 if (native_integers) {
1914 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1915 break;
1916 }
1917 case ir_unop_u2f:
1918 if (native_integers) {
1919 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1920 break;
1921 }
1922 case ir_binop_lshift:
1923 if (native_integers) {
1924 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1925 break;
1926 }
1927 case ir_binop_rshift:
1928 if (native_integers) {
1929 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1930 break;
1931 }
1932 case ir_binop_bit_and:
1933 if (native_integers) {
1934 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1935 break;
1936 }
1937 case ir_binop_bit_xor:
1938 if (native_integers) {
1939 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1940 break;
1941 }
1942 case ir_binop_bit_or:
1943 if (native_integers) {
1944 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1945 break;
1946 }
1947
1948 assert(!"GLSL 1.30 features unsupported");
1949 break;
1950
1951 case ir_binop_ubo_load: {
1952 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
1953 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1954 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1955 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
1956 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1957 st_src_reg cbuf;
1958
1959 cbuf.type = glsl_type::vec4_type->base_type;
1960 cbuf.file = PROGRAM_CONSTANT;
1961 cbuf.index = 0;
1962 cbuf.reladdr = NULL;
1963 cbuf.negate = 0;
1964
1965 assert(ir->type->is_vector() || ir->type->is_scalar());
1966
1967 if (const_offset_ir) {
1968 /* Constant index into constant buffer */
1969 cbuf.reladdr = NULL;
1970 cbuf.index = const_offset / 16;
1971 }
1972 else {
1973 /* Relative/variable index into constant buffer */
1974 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1975 st_src_reg_for_int(4));
1976 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1977 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1978 }
1979
1980 if (const_uniform_block) {
1981 /* Constant constant buffer */
1982 cbuf.reladdr2 = NULL;
1983 cbuf.index2D = const_block;
1984 cbuf.has_index2 = true;
1985 }
1986 else {
1987 /* Relative/variable constant buffer */
1988 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
1989 cbuf.index2D = 1;
1990 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
1991 cbuf.has_index2 = true;
1992 }
1993
1994 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1995 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1996 const_offset % 16 / 4,
1997 const_offset % 16 / 4,
1998 const_offset % 16 / 4);
1999
2000 if (ir->type->base_type == GLSL_TYPE_BOOL) {
2001 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
2002 } else {
2003 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
2004 }
2005 break;
2006 }
2007 case ir_triop_lrp:
2008 /* note: we have to reorder the three args here */
2009 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
2010 break;
2011 case ir_triop_csel:
2012 if (this->ctx->Const.NativeIntegers)
2013 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
2014 else {
2015 op[0].negate = ~op[0].negate;
2016 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
2017 }
2018 break;
2019 case ir_triop_bitfield_extract:
2020 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
2021 break;
2022 case ir_quadop_bitfield_insert:
2023 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
2024 break;
2025 case ir_unop_bitfield_reverse:
2026 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
2027 break;
2028 case ir_unop_bit_count:
2029 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
2030 break;
2031 case ir_unop_find_msb:
2032 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
2033 break;
2034 case ir_unop_find_lsb:
2035 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
2036 break;
2037 case ir_binop_imul_high:
2038 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
2039 break;
2040 case ir_triop_fma:
2041 /* NOTE: Perhaps there should be a special opcode that enforces fused
2042 * mul-add. Just use MAD for now.
2043 */
2044 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
2045 break;
2046 case ir_unop_interpolate_at_centroid:
2047 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2048 break;
2049 case ir_binop_interpolate_at_offset:
2050 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2051 break;
2052 case ir_binop_interpolate_at_sample:
2053 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2054 break;
2055 case ir_unop_pack_snorm_2x16:
2056 case ir_unop_pack_unorm_2x16:
2057 case ir_unop_pack_half_2x16:
2058 case ir_unop_pack_snorm_4x8:
2059 case ir_unop_pack_unorm_4x8:
2060 case ir_unop_unpack_snorm_2x16:
2061 case ir_unop_unpack_unorm_2x16:
2062 case ir_unop_unpack_half_2x16:
2063 case ir_unop_unpack_half_2x16_split_x:
2064 case ir_unop_unpack_half_2x16_split_y:
2065 case ir_unop_unpack_snorm_4x8:
2066 case ir_unop_unpack_unorm_4x8:
2067 case ir_binop_pack_half_2x16_split:
2068 case ir_binop_bfm:
2069 case ir_triop_bfi:
2070 case ir_quadop_vector:
2071 case ir_binop_vector_extract:
2072 case ir_triop_vector_insert:
2073 case ir_binop_ldexp:
2074 case ir_binop_carry:
2075 case ir_binop_borrow:
2076 /* This operation is not supported, or should have already been handled.
2077 */
2078 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2079 break;
2080 }
2081
2082 this->result = result_src;
2083 }
2084
2085
2086 void
2087 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2088 {
2089 st_src_reg src;
2090 int i;
2091 int swizzle[4];
2092
2093 /* Note that this is only swizzles in expressions, not those on the left
2094 * hand side of an assignment, which do write masking. See ir_assignment
2095 * for that.
2096 */
2097
2098 ir->val->accept(this);
2099 src = this->result;
2100 assert(src.file != PROGRAM_UNDEFINED);
2101
2102 for (i = 0; i < 4; i++) {
2103 if (i < ir->type->vector_elements) {
2104 switch (i) {
2105 case 0:
2106 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2107 break;
2108 case 1:
2109 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2110 break;
2111 case 2:
2112 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2113 break;
2114 case 3:
2115 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2116 break;
2117 }
2118 } else {
2119 /* If the type is smaller than a vec4, replicate the last
2120 * channel out.
2121 */
2122 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2123 }
2124 }
2125
2126 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2127
2128 this->result = src;
2129 }
2130
2131 void
2132 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2133 {
2134 variable_storage *entry = find_variable_storage(ir->var);
2135 ir_variable *var = ir->var;
2136
2137 if (!entry) {
2138 switch (var->data.mode) {
2139 case ir_var_uniform:
2140 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2141 var->data.location);
2142 this->variables.push_tail(entry);
2143 break;
2144 case ir_var_shader_in:
2145 /* The linker assigns locations for varyings and attributes,
2146 * including deprecated builtins (like gl_Color), user-assign
2147 * generic attributes (glBindVertexLocation), and
2148 * user-defined varyings.
2149 */
2150 assert(var->data.location != -1);
2151 entry = new(mem_ctx) variable_storage(var,
2152 PROGRAM_INPUT,
2153 var->data.location);
2154 break;
2155 case ir_var_shader_out:
2156 assert(var->data.location != -1);
2157 entry = new(mem_ctx) variable_storage(var,
2158 PROGRAM_OUTPUT,
2159 var->data.location
2160 + var->data.index);
2161 break;
2162 case ir_var_system_value:
2163 entry = new(mem_ctx) variable_storage(var,
2164 PROGRAM_SYSTEM_VALUE,
2165 var->data.location);
2166 break;
2167 case ir_var_auto:
2168 case ir_var_temporary:
2169 st_src_reg src = get_temp(var->type);
2170
2171 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2172 this->variables.push_tail(entry);
2173
2174 break;
2175 }
2176
2177 if (!entry) {
2178 printf("Failed to make storage for %s\n", var->name);
2179 exit(1);
2180 }
2181 }
2182
2183 this->result = st_src_reg(entry->file, entry->index, var->type);
2184 if (!native_integers)
2185 this->result.type = GLSL_TYPE_FLOAT;
2186 }
2187
2188 void
2189 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2190 {
2191 ir_constant *index;
2192 st_src_reg src;
2193 int element_size = type_size(ir->type);
2194 bool is_2D_input;
2195
2196 index = ir->array_index->constant_expression_value();
2197
2198 ir->array->accept(this);
2199 src = this->result;
2200
2201 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2202 src.file == PROGRAM_INPUT &&
2203 ir->array->ir_type != ir_type_dereference_array;
2204
2205 if (is_2D_input)
2206 element_size = 1;
2207
2208 if (index) {
2209 if (is_2D_input) {
2210 src.index2D = index->value.i[0];
2211 src.has_index2 = true;
2212 } else
2213 src.index += index->value.i[0] * element_size;
2214 } else {
2215 /* Variable index array dereference. It eats the "vec4" of the
2216 * base of the array and an index that offsets the TGSI register
2217 * index.
2218 */
2219 ir->array_index->accept(this);
2220
2221 st_src_reg index_reg;
2222
2223 if (element_size == 1) {
2224 index_reg = this->result;
2225 } else {
2226 index_reg = get_temp(native_integers ?
2227 glsl_type::int_type : glsl_type::float_type);
2228
2229 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2230 this->result, st_src_reg_for_type(index_reg.type, element_size));
2231 }
2232
2233 /* If there was already a relative address register involved, add the
2234 * new and the old together to get the new offset.
2235 */
2236 if (!is_2D_input && src.reladdr != NULL) {
2237 st_src_reg accum_reg = get_temp(native_integers ?
2238 glsl_type::int_type : glsl_type::float_type);
2239
2240 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2241 index_reg, *src.reladdr);
2242
2243 index_reg = accum_reg;
2244 }
2245
2246 if (is_2D_input) {
2247 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2248 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2249 src.index2D = 0;
2250 src.has_index2 = true;
2251 } else {
2252 src.reladdr = ralloc(mem_ctx, st_src_reg);
2253 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2254 }
2255 }
2256
2257 /* If the type is smaller than a vec4, replicate the last channel out. */
2258 if (ir->type->is_scalar() || ir->type->is_vector())
2259 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2260 else
2261 src.swizzle = SWIZZLE_NOOP;
2262
2263 /* Change the register type to the element type of the array. */
2264 src.type = ir->type->base_type;
2265
2266 this->result = src;
2267 }
2268
2269 void
2270 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2271 {
2272 unsigned int i;
2273 const glsl_type *struct_type = ir->record->type;
2274 int offset = 0;
2275
2276 ir->record->accept(this);
2277
2278 for (i = 0; i < struct_type->length; i++) {
2279 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2280 break;
2281 offset += type_size(struct_type->fields.structure[i].type);
2282 }
2283
2284 /* If the type is smaller than a vec4, replicate the last channel out. */
2285 if (ir->type->is_scalar() || ir->type->is_vector())
2286 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2287 else
2288 this->result.swizzle = SWIZZLE_NOOP;
2289
2290 this->result.index += offset;
2291 this->result.type = ir->type->base_type;
2292 }
2293
2294 /**
2295 * We want to be careful in assignment setup to hit the actual storage
2296 * instead of potentially using a temporary like we might with the
2297 * ir_dereference handler.
2298 */
2299 static st_dst_reg
2300 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2301 {
2302 /* The LHS must be a dereference. If the LHS is a variable indexed array
2303 * access of a vector, it must be separated into a series conditional moves
2304 * before reaching this point (see ir_vec_index_to_cond_assign).
2305 */
2306 assert(ir->as_dereference());
2307 ir_dereference_array *deref_array = ir->as_dereference_array();
2308 if (deref_array) {
2309 assert(!deref_array->array->type->is_vector());
2310 }
2311
2312 /* Use the rvalue deref handler for the most part. We'll ignore
2313 * swizzles in it and write swizzles using writemask, though.
2314 */
2315 ir->accept(v);
2316 return st_dst_reg(v->result);
2317 }
2318
2319 /**
2320 * Process the condition of a conditional assignment
2321 *
2322 * Examines the condition of a conditional assignment to generate the optimal
2323 * first operand of a \c CMP instruction. If the condition is a relational
2324 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2325 * used as the source for the \c CMP instruction. Otherwise the comparison
2326 * is processed to a boolean result, and the boolean result is used as the
2327 * operand to the CMP instruction.
2328 */
2329 bool
2330 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2331 {
2332 ir_rvalue *src_ir = ir;
2333 bool negate = true;
2334 bool switch_order = false;
2335
2336 ir_expression *const expr = ir->as_expression();
2337 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2338 bool zero_on_left = false;
2339
2340 if (expr->operands[0]->is_zero()) {
2341 src_ir = expr->operands[1];
2342 zero_on_left = true;
2343 } else if (expr->operands[1]->is_zero()) {
2344 src_ir = expr->operands[0];
2345 zero_on_left = false;
2346 }
2347
2348 /* a is - 0 + - 0 +
2349 * (a < 0) T F F ( a < 0) T F F
2350 * (0 < a) F F T (-a < 0) F F T
2351 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2352 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2353 * (a > 0) F F T (-a < 0) F F T
2354 * (0 > a) T F F ( a < 0) T F F
2355 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2356 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2357 *
2358 * Note that exchanging the order of 0 and 'a' in the comparison simply
2359 * means that the value of 'a' should be negated.
2360 */
2361 if (src_ir != ir) {
2362 switch (expr->operation) {
2363 case ir_binop_less:
2364 switch_order = false;
2365 negate = zero_on_left;
2366 break;
2367
2368 case ir_binop_greater:
2369 switch_order = false;
2370 negate = !zero_on_left;
2371 break;
2372
2373 case ir_binop_lequal:
2374 switch_order = true;
2375 negate = !zero_on_left;
2376 break;
2377
2378 case ir_binop_gequal:
2379 switch_order = true;
2380 negate = zero_on_left;
2381 break;
2382
2383 default:
2384 /* This isn't the right kind of comparison afterall, so make sure
2385 * the whole condition is visited.
2386 */
2387 src_ir = ir;
2388 break;
2389 }
2390 }
2391 }
2392
2393 src_ir->accept(this);
2394
2395 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2396 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2397 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2398 * computing the condition.
2399 */
2400 if (negate)
2401 this->result.negate = ~this->result.negate;
2402
2403 return switch_order;
2404 }
2405
2406 void
2407 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2408 st_dst_reg *l, st_src_reg *r)
2409 {
2410 if (type->base_type == GLSL_TYPE_STRUCT) {
2411 for (unsigned int i = 0; i < type->length; i++) {
2412 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2413 }
2414 return;
2415 }
2416
2417 if (type->is_array()) {
2418 for (unsigned int i = 0; i < type->length; i++) {
2419 emit_block_mov(ir, type->fields.array, l, r);
2420 }
2421 return;
2422 }
2423
2424 if (type->is_matrix()) {
2425 const struct glsl_type *vec_type;
2426
2427 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2428 type->vector_elements, 1);
2429
2430 for (int i = 0; i < type->matrix_columns; i++) {
2431 emit_block_mov(ir, vec_type, l, r);
2432 }
2433 return;
2434 }
2435
2436 assert(type->is_scalar() || type->is_vector());
2437
2438 r->type = type->base_type;
2439 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2440 l->index++;
2441 r->index++;
2442 }
2443
2444 void
2445 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2446 {
2447 st_dst_reg l;
2448 st_src_reg r;
2449 int i;
2450
2451 ir->rhs->accept(this);
2452 r = this->result;
2453
2454 l = get_assignment_lhs(ir->lhs, this);
2455
2456 /* FINISHME: This should really set to the correct maximal writemask for each
2457 * FINISHME: component written (in the loops below). This case can only
2458 * FINISHME: occur for matrices, arrays, and structures.
2459 */
2460 if (ir->write_mask == 0) {
2461 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2462 l.writemask = WRITEMASK_XYZW;
2463 } else if (ir->lhs->type->is_scalar() &&
2464 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2465 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2466 * FINISHME: W component of fragment shader output zero, work correctly.
2467 */
2468 l.writemask = WRITEMASK_XYZW;
2469 } else {
2470 int swizzles[4];
2471 int first_enabled_chan = 0;
2472 int rhs_chan = 0;
2473
2474 l.writemask = ir->write_mask;
2475
2476 for (int i = 0; i < 4; i++) {
2477 if (l.writemask & (1 << i)) {
2478 first_enabled_chan = GET_SWZ(r.swizzle, i);
2479 break;
2480 }
2481 }
2482
2483 /* Swizzle a small RHS vector into the channels being written.
2484 *
2485 * glsl ir treats write_mask as dictating how many channels are
2486 * present on the RHS while TGSI treats write_mask as just
2487 * showing which channels of the vec4 RHS get written.
2488 */
2489 for (int i = 0; i < 4; i++) {
2490 if (l.writemask & (1 << i))
2491 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2492 else
2493 swizzles[i] = first_enabled_chan;
2494 }
2495 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2496 swizzles[2], swizzles[3]);
2497 }
2498
2499 assert(l.file != PROGRAM_UNDEFINED);
2500 assert(r.file != PROGRAM_UNDEFINED);
2501
2502 if (ir->condition) {
2503 const bool switch_order = this->process_move_condition(ir->condition);
2504 st_src_reg condition = this->result;
2505
2506 for (i = 0; i < type_size(ir->lhs->type); i++) {
2507 st_src_reg l_src = st_src_reg(l);
2508 st_src_reg condition_temp = condition;
2509 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2510
2511 if (native_integers) {
2512 /* This is necessary because TGSI's CMP instruction expects the
2513 * condition to be a float, and we store booleans as integers.
2514 * TODO: really want to avoid i2f path and use UCMP. Requires
2515 * changes to process_move_condition though too.
2516 */
2517 condition_temp = get_temp(glsl_type::vec4_type);
2518 condition.negate = 0;
2519 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2520 condition_temp.swizzle = condition.swizzle;
2521 }
2522
2523 if (switch_order) {
2524 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2525 } else {
2526 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2527 }
2528
2529 l.index++;
2530 r.index++;
2531 }
2532 } else if (ir->rhs->as_expression() &&
2533 this->instructions.get_tail() &&
2534 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2535 type_size(ir->lhs->type) == 1 &&
2536 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2537 /* To avoid emitting an extra MOV when assigning an expression to a
2538 * variable, emit the last instruction of the expression again, but
2539 * replace the destination register with the target of the assignment.
2540 * Dead code elimination will remove the original instruction.
2541 */
2542 glsl_to_tgsi_instruction *inst, *new_inst;
2543 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2544 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2545 new_inst->saturate = inst->saturate;
2546 inst->dead_mask = inst->dst.writemask;
2547 } else {
2548 emit_block_mov(ir, ir->rhs->type, &l, &r);
2549 }
2550 }
2551
2552
2553 void
2554 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2555 {
2556 st_src_reg src;
2557 GLfloat stack_vals[4] = { 0 };
2558 gl_constant_value *values = (gl_constant_value *) stack_vals;
2559 GLenum gl_type = GL_NONE;
2560 unsigned int i;
2561 static int in_array = 0;
2562 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2563
2564 /* Unfortunately, 4 floats is all we can get into
2565 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2566 * aggregate constant and move each constant value into it. If we
2567 * get lucky, copy propagation will eliminate the extra moves.
2568 */
2569 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2570 st_src_reg temp_base = get_temp(ir->type);
2571 st_dst_reg temp = st_dst_reg(temp_base);
2572
2573 foreach_in_list(ir_constant, field_value, &ir->components) {
2574 int size = type_size(field_value->type);
2575
2576 assert(size > 0);
2577
2578 field_value->accept(this);
2579 src = this->result;
2580
2581 for (i = 0; i < (unsigned int)size; i++) {
2582 emit(ir, TGSI_OPCODE_MOV, temp, src);
2583
2584 src.index++;
2585 temp.index++;
2586 }
2587 }
2588 this->result = temp_base;
2589 return;
2590 }
2591
2592 if (ir->type->is_array()) {
2593 st_src_reg temp_base = get_temp(ir->type);
2594 st_dst_reg temp = st_dst_reg(temp_base);
2595 int size = type_size(ir->type->fields.array);
2596
2597 assert(size > 0);
2598 in_array++;
2599
2600 for (i = 0; i < ir->type->length; i++) {
2601 ir->array_elements[i]->accept(this);
2602 src = this->result;
2603 for (int j = 0; j < size; j++) {
2604 emit(ir, TGSI_OPCODE_MOV, temp, src);
2605
2606 src.index++;
2607 temp.index++;
2608 }
2609 }
2610 this->result = temp_base;
2611 in_array--;
2612 return;
2613 }
2614
2615 if (ir->type->is_matrix()) {
2616 st_src_reg mat = get_temp(ir->type);
2617 st_dst_reg mat_column = st_dst_reg(mat);
2618
2619 for (i = 0; i < ir->type->matrix_columns; i++) {
2620 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2621 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2622
2623 src = st_src_reg(file, -1, ir->type->base_type);
2624 src.index = add_constant(file,
2625 values,
2626 ir->type->vector_elements,
2627 GL_FLOAT,
2628 &src.swizzle);
2629 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2630
2631 mat_column.index++;
2632 }
2633
2634 this->result = mat;
2635 return;
2636 }
2637
2638 switch (ir->type->base_type) {
2639 case GLSL_TYPE_FLOAT:
2640 gl_type = GL_FLOAT;
2641 for (i = 0; i < ir->type->vector_elements; i++) {
2642 values[i].f = ir->value.f[i];
2643 }
2644 break;
2645 case GLSL_TYPE_UINT:
2646 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2647 for (i = 0; i < ir->type->vector_elements; i++) {
2648 if (native_integers)
2649 values[i].u = ir->value.u[i];
2650 else
2651 values[i].f = ir->value.u[i];
2652 }
2653 break;
2654 case GLSL_TYPE_INT:
2655 gl_type = native_integers ? GL_INT : GL_FLOAT;
2656 for (i = 0; i < ir->type->vector_elements; i++) {
2657 if (native_integers)
2658 values[i].i = ir->value.i[i];
2659 else
2660 values[i].f = ir->value.i[i];
2661 }
2662 break;
2663 case GLSL_TYPE_BOOL:
2664 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2665 for (i = 0; i < ir->type->vector_elements; i++) {
2666 if (native_integers)
2667 values[i].u = ir->value.b[i] ? ~0 : 0;
2668 else
2669 values[i].f = ir->value.b[i];
2670 }
2671 break;
2672 default:
2673 assert(!"Non-float/uint/int/bool constant");
2674 }
2675
2676 this->result = st_src_reg(file, -1, ir->type);
2677 this->result.index = add_constant(file,
2678 values,
2679 ir->type->vector_elements,
2680 gl_type,
2681 &this->result.swizzle);
2682 }
2683
2684 function_entry *
2685 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2686 {
2687 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2688 if (entry->sig == sig)
2689 return entry;
2690 }
2691
2692 entry = ralloc(mem_ctx, function_entry);
2693 entry->sig = sig;
2694 entry->sig_id = this->next_signature_id++;
2695 entry->bgn_inst = NULL;
2696
2697 /* Allocate storage for all the parameters. */
2698 foreach_in_list(ir_variable, param, &sig->parameters) {
2699 variable_storage *storage;
2700
2701 storage = find_variable_storage(param);
2702 assert(!storage);
2703
2704 st_src_reg src = get_temp(param->type);
2705
2706 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2707 this->variables.push_tail(storage);
2708 }
2709
2710 if (!sig->return_type->is_void()) {
2711 entry->return_reg = get_temp(sig->return_type);
2712 } else {
2713 entry->return_reg = undef_src;
2714 }
2715
2716 this->function_signatures.push_tail(entry);
2717 return entry;
2718 }
2719
2720 void
2721 glsl_to_tgsi_visitor::visit(ir_call *ir)
2722 {
2723 glsl_to_tgsi_instruction *call_inst;
2724 ir_function_signature *sig = ir->callee;
2725 function_entry *entry = get_function_signature(sig);
2726 int i;
2727
2728 /* Process in parameters. */
2729 foreach_two_lists(formal_node, &sig->parameters,
2730 actual_node, &ir->actual_parameters) {
2731 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2732 ir_variable *param = (ir_variable *) formal_node;
2733
2734 if (param->data.mode == ir_var_function_in ||
2735 param->data.mode == ir_var_function_inout) {
2736 variable_storage *storage = find_variable_storage(param);
2737 assert(storage);
2738
2739 param_rval->accept(this);
2740 st_src_reg r = this->result;
2741
2742 st_dst_reg l;
2743 l.file = storage->file;
2744 l.index = storage->index;
2745 l.reladdr = NULL;
2746 l.writemask = WRITEMASK_XYZW;
2747 l.cond_mask = COND_TR;
2748
2749 for (i = 0; i < type_size(param->type); i++) {
2750 emit(ir, TGSI_OPCODE_MOV, l, r);
2751 l.index++;
2752 r.index++;
2753 }
2754 }
2755 }
2756
2757 /* Emit call instruction */
2758 call_inst = emit(ir, TGSI_OPCODE_CAL);
2759 call_inst->function = entry;
2760
2761 /* Process out parameters. */
2762 foreach_two_lists(formal_node, &sig->parameters,
2763 actual_node, &ir->actual_parameters) {
2764 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2765 ir_variable *param = (ir_variable *) formal_node;
2766
2767 if (param->data.mode == ir_var_function_out ||
2768 param->data.mode == ir_var_function_inout) {
2769 variable_storage *storage = find_variable_storage(param);
2770 assert(storage);
2771
2772 st_src_reg r;
2773 r.file = storage->file;
2774 r.index = storage->index;
2775 r.reladdr = NULL;
2776 r.swizzle = SWIZZLE_NOOP;
2777 r.negate = 0;
2778
2779 param_rval->accept(this);
2780 st_dst_reg l = st_dst_reg(this->result);
2781
2782 for (i = 0; i < type_size(param->type); i++) {
2783 emit(ir, TGSI_OPCODE_MOV, l, r);
2784 l.index++;
2785 r.index++;
2786 }
2787 }
2788 }
2789
2790 /* Process return value. */
2791 this->result = entry->return_reg;
2792 }
2793
2794 void
2795 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2796 {
2797 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2798 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2799 st_src_reg levels_src;
2800 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2801 glsl_to_tgsi_instruction *inst = NULL;
2802 unsigned opcode = TGSI_OPCODE_NOP;
2803 const glsl_type *sampler_type = ir->sampler->type;
2804 ir_rvalue *sampler_index =
2805 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2806 bool is_cube_array = false;
2807 unsigned i;
2808
2809 /* if we are a cube array sampler */
2810 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2811 sampler_type->sampler_array)) {
2812 is_cube_array = true;
2813 }
2814
2815 if (ir->coordinate) {
2816 ir->coordinate->accept(this);
2817
2818 /* Put our coords in a temp. We'll need to modify them for shadow,
2819 * projection, or LOD, so the only case we'd use it as is is if
2820 * we're doing plain old texturing. The optimization passes on
2821 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2822 */
2823 coord = get_temp(glsl_type::vec4_type);
2824 coord_dst = st_dst_reg(coord);
2825 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2826 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2827 }
2828
2829 if (ir->projector) {
2830 ir->projector->accept(this);
2831 projector = this->result;
2832 }
2833
2834 /* Storage for our result. Ideally for an assignment we'd be using
2835 * the actual storage for the result here, instead.
2836 */
2837 result_src = get_temp(ir->type);
2838 result_dst = st_dst_reg(result_src);
2839
2840 switch (ir->op) {
2841 case ir_tex:
2842 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2843 if (ir->offset) {
2844 ir->offset->accept(this);
2845 offset[0] = this->result;
2846 }
2847 break;
2848 case ir_txb:
2849 if (is_cube_array ||
2850 sampler_type == glsl_type::samplerCubeShadow_type) {
2851 opcode = TGSI_OPCODE_TXB2;
2852 }
2853 else {
2854 opcode = TGSI_OPCODE_TXB;
2855 }
2856 ir->lod_info.bias->accept(this);
2857 lod_info = this->result;
2858 if (ir->offset) {
2859 ir->offset->accept(this);
2860 offset[0] = this->result;
2861 }
2862 break;
2863 case ir_txl:
2864 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2865 ir->lod_info.lod->accept(this);
2866 lod_info = this->result;
2867 if (ir->offset) {
2868 ir->offset->accept(this);
2869 offset[0] = this->result;
2870 }
2871 break;
2872 case ir_txd:
2873 opcode = TGSI_OPCODE_TXD;
2874 ir->lod_info.grad.dPdx->accept(this);
2875 dx = this->result;
2876 ir->lod_info.grad.dPdy->accept(this);
2877 dy = this->result;
2878 if (ir->offset) {
2879 ir->offset->accept(this);
2880 offset[0] = this->result;
2881 }
2882 break;
2883 case ir_txs:
2884 opcode = TGSI_OPCODE_TXQ;
2885 ir->lod_info.lod->accept(this);
2886 lod_info = this->result;
2887 break;
2888 case ir_query_levels:
2889 opcode = TGSI_OPCODE_TXQ;
2890 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2891 levels_src = get_temp(ir->type);
2892 break;
2893 case ir_txf:
2894 opcode = TGSI_OPCODE_TXF;
2895 ir->lod_info.lod->accept(this);
2896 lod_info = this->result;
2897 if (ir->offset) {
2898 ir->offset->accept(this);
2899 offset[0] = this->result;
2900 }
2901 break;
2902 case ir_txf_ms:
2903 opcode = TGSI_OPCODE_TXF;
2904 ir->lod_info.sample_index->accept(this);
2905 sample_index = this->result;
2906 break;
2907 case ir_tg4:
2908 opcode = TGSI_OPCODE_TG4;
2909 ir->lod_info.component->accept(this);
2910 component = this->result;
2911 if (ir->offset) {
2912 ir->offset->accept(this);
2913 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2914 const glsl_type *elt_type = ir->offset->type->fields.array;
2915 for (i = 0; i < ir->offset->type->length; i++) {
2916 offset[i] = this->result;
2917 offset[i].index += i * type_size(elt_type);
2918 offset[i].type = elt_type->base_type;
2919 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2920 }
2921 } else {
2922 offset[0] = this->result;
2923 }
2924 }
2925 break;
2926 case ir_lod:
2927 opcode = TGSI_OPCODE_LODQ;
2928 break;
2929 }
2930
2931 if (ir->projector) {
2932 if (opcode == TGSI_OPCODE_TEX) {
2933 /* Slot the projector in as the last component of the coord. */
2934 coord_dst.writemask = WRITEMASK_W;
2935 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2936 coord_dst.writemask = WRITEMASK_XYZW;
2937 opcode = TGSI_OPCODE_TXP;
2938 } else {
2939 st_src_reg coord_w = coord;
2940 coord_w.swizzle = SWIZZLE_WWWW;
2941
2942 /* For the other TEX opcodes there's no projective version
2943 * since the last slot is taken up by LOD info. Do the
2944 * projective divide now.
2945 */
2946 coord_dst.writemask = WRITEMASK_W;
2947 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2948
2949 /* In the case where we have to project the coordinates "by hand,"
2950 * the shadow comparator value must also be projected.
2951 */
2952 st_src_reg tmp_src = coord;
2953 if (ir->shadow_comparitor) {
2954 /* Slot the shadow value in as the second to last component of the
2955 * coord.
2956 */
2957 ir->shadow_comparitor->accept(this);
2958
2959 tmp_src = get_temp(glsl_type::vec4_type);
2960 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2961
2962 /* Projective division not allowed for array samplers. */
2963 assert(!sampler_type->sampler_array);
2964
2965 tmp_dst.writemask = WRITEMASK_Z;
2966 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2967
2968 tmp_dst.writemask = WRITEMASK_XY;
2969 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2970 }
2971
2972 coord_dst.writemask = WRITEMASK_XYZ;
2973 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2974
2975 coord_dst.writemask = WRITEMASK_XYZW;
2976 coord.swizzle = SWIZZLE_XYZW;
2977 }
2978 }
2979
2980 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2981 * comparator was put in the correct place (and projected) by the code,
2982 * above, that handles by-hand projection.
2983 */
2984 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2985 /* Slot the shadow value in as the second to last component of the
2986 * coord.
2987 */
2988 ir->shadow_comparitor->accept(this);
2989
2990 if (is_cube_array) {
2991 cube_sc = get_temp(glsl_type::float_type);
2992 cube_sc_dst = st_dst_reg(cube_sc);
2993 cube_sc_dst.writemask = WRITEMASK_X;
2994 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2995 cube_sc_dst.writemask = WRITEMASK_X;
2996 }
2997 else {
2998 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2999 sampler_type->sampler_array) ||
3000 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
3001 coord_dst.writemask = WRITEMASK_W;
3002 } else {
3003 coord_dst.writemask = WRITEMASK_Z;
3004 }
3005
3006 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
3007 coord_dst.writemask = WRITEMASK_XYZW;
3008 }
3009 }
3010
3011 if (ir->op == ir_txf_ms) {
3012 coord_dst.writemask = WRITEMASK_W;
3013 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
3014 coord_dst.writemask = WRITEMASK_XYZW;
3015 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
3016 opcode == TGSI_OPCODE_TXF) {
3017 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3018 coord_dst.writemask = WRITEMASK_W;
3019 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
3020 coord_dst.writemask = WRITEMASK_XYZW;
3021 }
3022
3023 if (sampler_index) {
3024 sampler_index->accept(this);
3025 emit_arl(ir, sampler_reladdr, this->result);
3026 }
3027
3028 if (opcode == TGSI_OPCODE_TXD)
3029 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3030 else if (opcode == TGSI_OPCODE_TXQ) {
3031 if (ir->op == ir_query_levels) {
3032 /* the level is stored in W */
3033 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3034 result_dst.writemask = WRITEMASK_X;
3035 levels_src.swizzle = SWIZZLE_WWWW;
3036 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3037 } else
3038 inst = emit(ir, opcode, result_dst, lod_info);
3039 } else if (opcode == TGSI_OPCODE_TXF) {
3040 inst = emit(ir, opcode, result_dst, coord);
3041 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3042 inst = emit(ir, opcode, result_dst, coord, lod_info);
3043 } else if (opcode == TGSI_OPCODE_TEX2) {
3044 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3045 } else if (opcode == TGSI_OPCODE_TG4) {
3046 if (is_cube_array && ir->shadow_comparitor) {
3047 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3048 } else {
3049 inst = emit(ir, opcode, result_dst, coord, component);
3050 }
3051 } else
3052 inst = emit(ir, opcode, result_dst, coord);
3053
3054 if (ir->shadow_comparitor)
3055 inst->tex_shadow = GL_TRUE;
3056
3057 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3058 this->shader_program,
3059 this->prog);
3060 if (sampler_index) {
3061 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3062 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3063 inst->sampler_array_size =
3064 ir->sampler->as_dereference_array()->array->type->array_size();
3065 } else {
3066 inst->sampler_array_size = 1;
3067 }
3068
3069 if (ir->offset) {
3070 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3071 inst->tex_offsets[i] = offset[i];
3072 inst->tex_offset_num_offset = i;
3073 }
3074
3075 switch (sampler_type->sampler_dimensionality) {
3076 case GLSL_SAMPLER_DIM_1D:
3077 inst->tex_target = (sampler_type->sampler_array)
3078 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3079 break;
3080 case GLSL_SAMPLER_DIM_2D:
3081 inst->tex_target = (sampler_type->sampler_array)
3082 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3083 break;
3084 case GLSL_SAMPLER_DIM_3D:
3085 inst->tex_target = TEXTURE_3D_INDEX;
3086 break;
3087 case GLSL_SAMPLER_DIM_CUBE:
3088 inst->tex_target = (sampler_type->sampler_array)
3089 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3090 break;
3091 case GLSL_SAMPLER_DIM_RECT:
3092 inst->tex_target = TEXTURE_RECT_INDEX;
3093 break;
3094 case GLSL_SAMPLER_DIM_BUF:
3095 inst->tex_target = TEXTURE_BUFFER_INDEX;
3096 break;
3097 case GLSL_SAMPLER_DIM_EXTERNAL:
3098 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3099 break;
3100 case GLSL_SAMPLER_DIM_MS:
3101 inst->tex_target = (sampler_type->sampler_array)
3102 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3103 break;
3104 default:
3105 assert(!"Should not get here.");
3106 }
3107
3108 this->result = result_src;
3109 }
3110
3111 void
3112 glsl_to_tgsi_visitor::visit(ir_return *ir)
3113 {
3114 if (ir->get_value()) {
3115 st_dst_reg l;
3116 int i;
3117
3118 assert(current_function);
3119
3120 ir->get_value()->accept(this);
3121 st_src_reg r = this->result;
3122
3123 l = st_dst_reg(current_function->return_reg);
3124
3125 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3126 emit(ir, TGSI_OPCODE_MOV, l, r);
3127 l.index++;
3128 r.index++;
3129 }
3130 }
3131
3132 emit(ir, TGSI_OPCODE_RET);
3133 }
3134
3135 void
3136 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3137 {
3138 if (ir->condition) {
3139 ir->condition->accept(this);
3140 this->result.negate = ~this->result.negate;
3141 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
3142 } else {
3143 /* unconditional kil */
3144 emit(ir, TGSI_OPCODE_KILL);
3145 }
3146 }
3147
3148 void
3149 glsl_to_tgsi_visitor::visit(ir_if *ir)
3150 {
3151 unsigned if_opcode;
3152 glsl_to_tgsi_instruction *if_inst;
3153
3154 ir->condition->accept(this);
3155 assert(this->result.file != PROGRAM_UNDEFINED);
3156
3157 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3158
3159 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3160
3161 this->instructions.push_tail(if_inst);
3162
3163 visit_exec_list(&ir->then_instructions, this);
3164
3165 if (!ir->else_instructions.is_empty()) {
3166 emit(ir->condition, TGSI_OPCODE_ELSE);
3167 visit_exec_list(&ir->else_instructions, this);
3168 }
3169
3170 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3171 }
3172
3173
3174 void
3175 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3176 {
3177 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3178
3179 ir->stream->accept(this);
3180 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3181 }
3182
3183 void
3184 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3185 {
3186 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3187
3188 ir->stream->accept(this);
3189 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3190 }
3191
3192 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3193 {
3194 result.file = PROGRAM_UNDEFINED;
3195 next_temp = 1;
3196 next_array = 0;
3197 next_signature_id = 1;
3198 num_immediates = 0;
3199 current_function = NULL;
3200 num_address_regs = 0;
3201 samplers_used = 0;
3202 indirect_addr_consts = false;
3203 glsl_version = 0;
3204 native_integers = false;
3205 mem_ctx = ralloc_context(NULL);
3206 ctx = NULL;
3207 prog = NULL;
3208 shader_program = NULL;
3209 shader = NULL;
3210 options = NULL;
3211 }
3212
3213 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3214 {
3215 ralloc_free(mem_ctx);
3216 }
3217
3218 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3219 {
3220 delete v;
3221 }
3222
3223
3224 /**
3225 * Count resources used by the given gpu program (number of texture
3226 * samplers, etc).
3227 */
3228 static void
3229 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3230 {
3231 v->samplers_used = 0;
3232
3233 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3234 if (is_tex_instruction(inst->op)) {
3235 for (int i = 0; i < inst->sampler_array_size; i++) {
3236 v->samplers_used |= 1 << (inst->sampler.index + i);
3237
3238 if (inst->tex_shadow) {
3239 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3240 }
3241 }
3242 }
3243 }
3244
3245 prog->SamplersUsed = v->samplers_used;
3246
3247 if (v->shader_program != NULL)
3248 _mesa_update_shader_textures_used(v->shader_program, prog);
3249 }
3250
3251 /**
3252 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3253 * are read from the given src in this instruction
3254 */
3255 static int
3256 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3257 {
3258 int read_mask = 0, comp;
3259
3260 /* Now, given the src swizzle and the written channels, find which
3261 * components are actually read
3262 */
3263 for (comp = 0; comp < 4; ++comp) {
3264 const unsigned coord = GET_SWZ(src.swizzle, comp);
3265 ASSERT(coord < 4);
3266 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3267 read_mask |= 1 << coord;
3268 }
3269
3270 return read_mask;
3271 }
3272
3273 /**
3274 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3275 * instruction is the first instruction to write to register T0. There are
3276 * several lowering passes done in GLSL IR (e.g. branches and
3277 * relative addressing) that create a large number of conditional assignments
3278 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3279 *
3280 * Here is why this conversion is safe:
3281 * CMP T0, T1 T2 T0 can be expanded to:
3282 * if (T1 < 0.0)
3283 * MOV T0, T2;
3284 * else
3285 * MOV T0, T0;
3286 *
3287 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3288 * as the original program. If (T1 < 0.0) evaluates to false, executing
3289 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3290 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3291 * because any instruction that was going to read from T0 after this was going
3292 * to read a garbage value anyway.
3293 */
3294 void
3295 glsl_to_tgsi_visitor::simplify_cmp(void)
3296 {
3297 unsigned *tempWrites;
3298 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3299
3300 tempWrites = new unsigned[MAX_TEMPS];
3301 if (!tempWrites) {
3302 return;
3303 }
3304 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3305 memset(outputWrites, 0, sizeof(outputWrites));
3306
3307 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3308 unsigned prevWriteMask = 0;
3309
3310 /* Give up if we encounter relative addressing or flow control. */
3311 if (inst->dst.reladdr ||
3312 tgsi_get_opcode_info(inst->op)->is_branch ||
3313 inst->op == TGSI_OPCODE_BGNSUB ||
3314 inst->op == TGSI_OPCODE_CONT ||
3315 inst->op == TGSI_OPCODE_END ||
3316 inst->op == TGSI_OPCODE_ENDSUB ||
3317 inst->op == TGSI_OPCODE_RET) {
3318 break;
3319 }
3320
3321 if (inst->dst.file == PROGRAM_OUTPUT) {
3322 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3323 prevWriteMask = outputWrites[inst->dst.index];
3324 outputWrites[inst->dst.index] |= inst->dst.writemask;
3325 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3326 assert(inst->dst.index < MAX_TEMPS);
3327 prevWriteMask = tempWrites[inst->dst.index];
3328 tempWrites[inst->dst.index] |= inst->dst.writemask;
3329 } else
3330 continue;
3331
3332 /* For a CMP to be considered a conditional write, the destination
3333 * register and source register two must be the same. */
3334 if (inst->op == TGSI_OPCODE_CMP
3335 && !(inst->dst.writemask & prevWriteMask)
3336 && inst->src[2].file == inst->dst.file
3337 && inst->src[2].index == inst->dst.index
3338 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3339
3340 inst->op = TGSI_OPCODE_MOV;
3341 inst->src[0] = inst->src[1];
3342 }
3343 }
3344
3345 delete [] tempWrites;
3346 }
3347
3348 /* Replaces all references to a temporary register index with another index. */
3349 void
3350 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3351 {
3352 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3353 unsigned j;
3354
3355 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3356 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3357 inst->src[j].index == index) {
3358 inst->src[j].index = new_index;
3359 }
3360 }
3361
3362 for (j=0; j < inst->tex_offset_num_offset; j++) {
3363 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3364 inst->tex_offsets[j].index == index) {
3365 inst->tex_offsets[j].index = new_index;
3366 }
3367 }
3368
3369 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3370 inst->dst.index = new_index;
3371 }
3372 }
3373 }
3374
3375 int
3376 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3377 {
3378 int depth = 0; /* loop depth */
3379 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3380 unsigned i = 0, j;
3381
3382 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3383 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3384 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3385 inst->src[j].index == index) {
3386 return (depth == 0) ? i : loop_start;
3387 }
3388 }
3389 for (j=0; j < inst->tex_offset_num_offset; j++) {
3390 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3391 inst->tex_offsets[j].index == index) {
3392 return (depth == 0) ? i : loop_start;
3393 }
3394 }
3395
3396 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3397 if(depth++ == 0)
3398 loop_start = i;
3399 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3400 if (--depth == 0)
3401 loop_start = -1;
3402 }
3403 assert(depth >= 0);
3404
3405 i++;
3406 }
3407
3408 return -1;
3409 }
3410
3411 int
3412 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3413 {
3414 int depth = 0; /* loop depth */
3415 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3416 int i = 0;
3417
3418 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3419 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3420 return (depth == 0) ? i : loop_start;
3421 }
3422
3423 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3424 if(depth++ == 0)
3425 loop_start = i;
3426 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3427 if (--depth == 0)
3428 loop_start = -1;
3429 }
3430 assert(depth >= 0);
3431
3432 i++;
3433 }
3434
3435 return -1;
3436 }
3437
3438 int
3439 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3440 {
3441 int depth = 0; /* loop depth */
3442 int last = -1; /* index of last instruction that reads the temporary */
3443 unsigned i = 0, j;
3444
3445 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3446 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3447 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3448 inst->src[j].index == index) {
3449 last = (depth == 0) ? i : -2;
3450 }
3451 }
3452 for (j=0; j < inst->tex_offset_num_offset; j++) {
3453 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3454 inst->tex_offsets[j].index == index)
3455 last = (depth == 0) ? i : -2;
3456 }
3457
3458 if (inst->op == TGSI_OPCODE_BGNLOOP)
3459 depth++;
3460 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3461 if (--depth == 0 && last == -2)
3462 last = i;
3463 assert(depth >= 0);
3464
3465 i++;
3466 }
3467
3468 assert(last >= -1);
3469 return last;
3470 }
3471
3472 int
3473 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3474 {
3475 int depth = 0; /* loop depth */
3476 int last = -1; /* index of last instruction that writes to the temporary */
3477 int i = 0;
3478
3479 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3480 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3481 last = (depth == 0) ? i : -2;
3482
3483 if (inst->op == TGSI_OPCODE_BGNLOOP)
3484 depth++;
3485 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3486 if (--depth == 0 && last == -2)
3487 last = i;
3488 assert(depth >= 0);
3489
3490 i++;
3491 }
3492
3493 assert(last >= -1);
3494 return last;
3495 }
3496
3497 /*
3498 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3499 * channels for copy propagation and updates following instructions to
3500 * use the original versions.
3501 *
3502 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3503 * will occur. As an example, a TXP production before this pass:
3504 *
3505 * 0: MOV TEMP[1], INPUT[4].xyyy;
3506 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3507 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3508 *
3509 * and after:
3510 *
3511 * 0: MOV TEMP[1], INPUT[4].xyyy;
3512 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3513 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3514 *
3515 * which allows for dead code elimination on TEMP[1]'s writes.
3516 */
3517 void
3518 glsl_to_tgsi_visitor::copy_propagate(void)
3519 {
3520 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3521 glsl_to_tgsi_instruction *,
3522 this->next_temp * 4);
3523 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3524 int level = 0;
3525
3526 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3527 assert(inst->dst.file != PROGRAM_TEMPORARY
3528 || inst->dst.index < this->next_temp);
3529
3530 /* First, do any copy propagation possible into the src regs. */
3531 for (int r = 0; r < 3; r++) {
3532 glsl_to_tgsi_instruction *first = NULL;
3533 bool good = true;
3534 int acp_base = inst->src[r].index * 4;
3535
3536 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3537 inst->src[r].reladdr ||
3538 inst->src[r].reladdr2)
3539 continue;
3540
3541 /* See if we can find entries in the ACP consisting of MOVs
3542 * from the same src register for all the swizzled channels
3543 * of this src register reference.
3544 */
3545 for (int i = 0; i < 4; i++) {
3546 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3547 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3548
3549 if (!copy_chan) {
3550 good = false;
3551 break;
3552 }
3553
3554 assert(acp_level[acp_base + src_chan] <= level);
3555
3556 if (!first) {
3557 first = copy_chan;
3558 } else {
3559 if (first->src[0].file != copy_chan->src[0].file ||
3560 first->src[0].index != copy_chan->src[0].index) {
3561 good = false;
3562 break;
3563 }
3564 }
3565 }
3566
3567 if (good) {
3568 /* We've now validated that we can copy-propagate to
3569 * replace this src register reference. Do it.
3570 */
3571 inst->src[r].file = first->src[0].file;
3572 inst->src[r].index = first->src[0].index;
3573 inst->src[r].index2D = first->src[0].index2D;
3574 inst->src[r].has_index2 = first->src[0].has_index2;
3575
3576 int swizzle = 0;
3577 for (int i = 0; i < 4; i++) {
3578 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3579 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3580 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3581 (3 * i));
3582 }
3583 inst->src[r].swizzle = swizzle;
3584 }
3585 }
3586
3587 switch (inst->op) {
3588 case TGSI_OPCODE_BGNLOOP:
3589 case TGSI_OPCODE_ENDLOOP:
3590 /* End of a basic block, clear the ACP entirely. */
3591 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3592 break;
3593
3594 case TGSI_OPCODE_IF:
3595 case TGSI_OPCODE_UIF:
3596 ++level;
3597 break;
3598
3599 case TGSI_OPCODE_ENDIF:
3600 case TGSI_OPCODE_ELSE:
3601 /* Clear all channels written inside the block from the ACP, but
3602 * leaving those that were not touched.
3603 */
3604 for (int r = 0; r < this->next_temp; r++) {
3605 for (int c = 0; c < 4; c++) {
3606 if (!acp[4 * r + c])
3607 continue;
3608
3609 if (acp_level[4 * r + c] >= level)
3610 acp[4 * r + c] = NULL;
3611 }
3612 }
3613 if (inst->op == TGSI_OPCODE_ENDIF)
3614 --level;
3615 break;
3616
3617 default:
3618 /* Continuing the block, clear any written channels from
3619 * the ACP.
3620 */
3621 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3622 /* Any temporary might be written, so no copy propagation
3623 * across this instruction.
3624 */
3625 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3626 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3627 inst->dst.reladdr) {
3628 /* Any output might be written, so no copy propagation
3629 * from outputs across this instruction.
3630 */
3631 for (int r = 0; r < this->next_temp; r++) {
3632 for (int c = 0; c < 4; c++) {
3633 if (!acp[4 * r + c])
3634 continue;
3635
3636 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3637 acp[4 * r + c] = NULL;
3638 }
3639 }
3640 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3641 inst->dst.file == PROGRAM_OUTPUT) {
3642 /* Clear where it's used as dst. */
3643 if (inst->dst.file == PROGRAM_TEMPORARY) {
3644 for (int c = 0; c < 4; c++) {
3645 if (inst->dst.writemask & (1 << c)) {
3646 acp[4 * inst->dst.index + c] = NULL;
3647 }
3648 }
3649 }
3650
3651 /* Clear where it's used as src. */
3652 for (int r = 0; r < this->next_temp; r++) {
3653 for (int c = 0; c < 4; c++) {
3654 if (!acp[4 * r + c])
3655 continue;
3656
3657 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3658
3659 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3660 acp[4 * r + c]->src[0].index == inst->dst.index &&
3661 inst->dst.writemask & (1 << src_chan))
3662 {
3663 acp[4 * r + c] = NULL;
3664 }
3665 }
3666 }
3667 }
3668 break;
3669 }
3670
3671 /* If this is a copy, add it to the ACP. */
3672 if (inst->op == TGSI_OPCODE_MOV &&
3673 inst->dst.file == PROGRAM_TEMPORARY &&
3674 !(inst->dst.file == inst->src[0].file &&
3675 inst->dst.index == inst->src[0].index) &&
3676 !inst->dst.reladdr &&
3677 !inst->saturate &&
3678 !inst->src[0].reladdr &&
3679 !inst->src[0].reladdr2 &&
3680 !inst->src[0].negate) {
3681 for (int i = 0; i < 4; i++) {
3682 if (inst->dst.writemask & (1 << i)) {
3683 acp[4 * inst->dst.index + i] = inst;
3684 acp_level[4 * inst->dst.index + i] = level;
3685 }
3686 }
3687 }
3688 }
3689
3690 ralloc_free(acp_level);
3691 ralloc_free(acp);
3692 }
3693
3694 /*
3695 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3696 * code elimination.
3697 *
3698 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3699 * will occur. As an example, a TXP production after copy propagation but
3700 * before this pass:
3701 *
3702 * 0: MOV TEMP[1], INPUT[4].xyyy;
3703 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3704 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3705 *
3706 * and after this pass:
3707 *
3708 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3709 */
3710 int
3711 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3712 {
3713 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3714 glsl_to_tgsi_instruction *,
3715 this->next_temp * 4);
3716 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3717 int level = 0;
3718 int removed = 0;
3719
3720 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3721 assert(inst->dst.file != PROGRAM_TEMPORARY
3722 || inst->dst.index < this->next_temp);
3723
3724 switch (inst->op) {
3725 case TGSI_OPCODE_BGNLOOP:
3726 case TGSI_OPCODE_ENDLOOP:
3727 case TGSI_OPCODE_CONT:
3728 case TGSI_OPCODE_BRK:
3729 /* End of a basic block, clear the write array entirely.
3730 *
3731 * This keeps us from killing dead code when the writes are
3732 * on either side of a loop, even when the register isn't touched
3733 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3734 * dead code of this type, so it shouldn't make a difference as long as
3735 * the dead code elimination pass in the GLSL compiler does its job.
3736 */
3737 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3738 break;
3739
3740 case TGSI_OPCODE_ENDIF:
3741 case TGSI_OPCODE_ELSE:
3742 /* Promote the recorded level of all channels written inside the
3743 * preceding if or else block to the level above the if/else block.
3744 */
3745 for (int r = 0; r < this->next_temp; r++) {
3746 for (int c = 0; c < 4; c++) {
3747 if (!writes[4 * r + c])
3748 continue;
3749
3750 if (write_level[4 * r + c] == level)
3751 write_level[4 * r + c] = level-1;
3752 }
3753 }
3754
3755 if(inst->op == TGSI_OPCODE_ENDIF)
3756 --level;
3757
3758 break;
3759
3760 case TGSI_OPCODE_IF:
3761 case TGSI_OPCODE_UIF:
3762 ++level;
3763 /* fallthrough to default case to mark the condition as read */
3764
3765 default:
3766 /* Continuing the block, clear any channels from the write array that
3767 * are read by this instruction.
3768 */
3769 for (unsigned i = 0; i < Elements(inst->src); i++) {
3770 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3771 /* Any temporary might be read, so no dead code elimination
3772 * across this instruction.
3773 */
3774 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3775 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3776 /* Clear where it's used as src. */
3777 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3778 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3779 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3780 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3781
3782 for (int c = 0; c < 4; c++) {
3783 if (src_chans & (1 << c)) {
3784 writes[4 * inst->src[i].index + c] = NULL;
3785 }
3786 }
3787 }
3788 }
3789 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3790 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3791 /* Any temporary might be read, so no dead code elimination
3792 * across this instruction.
3793 */
3794 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3795 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3796 /* Clear where it's used as src. */
3797 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3798 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3799 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3800 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3801
3802 for (int c = 0; c < 4; c++) {
3803 if (src_chans & (1 << c)) {
3804 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3805 }
3806 }
3807 }
3808 }
3809 break;
3810 }
3811
3812 /* If this instruction writes to a temporary, add it to the write array.
3813 * If there is already an instruction in the write array for one or more
3814 * of the channels, flag that channel write as dead.
3815 */
3816 if (inst->dst.file == PROGRAM_TEMPORARY &&
3817 !inst->dst.reladdr &&
3818 !inst->saturate) {
3819 for (int c = 0; c < 4; c++) {
3820 if (inst->dst.writemask & (1 << c)) {
3821 if (writes[4 * inst->dst.index + c]) {
3822 if (write_level[4 * inst->dst.index + c] < level)
3823 continue;
3824 else
3825 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3826 }
3827 writes[4 * inst->dst.index + c] = inst;
3828 write_level[4 * inst->dst.index + c] = level;
3829 }
3830 }
3831 }
3832 }
3833
3834 /* Anything still in the write array at this point is dead code. */
3835 for (int r = 0; r < this->next_temp; r++) {
3836 for (int c = 0; c < 4; c++) {
3837 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3838 if (inst)
3839 inst->dead_mask |= (1 << c);
3840 }
3841 }
3842
3843 /* Now actually remove the instructions that are completely dead and update
3844 * the writemask of other instructions with dead channels.
3845 */
3846 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3847 if (!inst->dead_mask || !inst->dst.writemask)
3848 continue;
3849 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3850 inst->remove();
3851 delete inst;
3852 removed++;
3853 } else
3854 inst->dst.writemask &= ~(inst->dead_mask);
3855 }
3856
3857 ralloc_free(write_level);
3858 ralloc_free(writes);
3859
3860 return removed;
3861 }
3862
3863 /* Merges temporary registers together where possible to reduce the number of
3864 * registers needed to run a program.
3865 *
3866 * Produces optimal code only after copy propagation and dead code elimination
3867 * have been run. */
3868 void
3869 glsl_to_tgsi_visitor::merge_registers(void)
3870 {
3871 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3872 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3873 int i, j;
3874
3875 /* Read the indices of the last read and first write to each temp register
3876 * into an array so that we don't have to traverse the instruction list as
3877 * much. */
3878 for (i=0; i < this->next_temp; i++) {
3879 last_reads[i] = get_last_temp_read(i);
3880 first_writes[i] = get_first_temp_write(i);
3881 }
3882
3883 /* Start looking for registers with non-overlapping usages that can be
3884 * merged together. */
3885 for (i=0; i < this->next_temp; i++) {
3886 /* Don't touch unused registers. */
3887 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3888
3889 for (j=0; j < this->next_temp; j++) {
3890 /* Don't touch unused registers. */
3891 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3892
3893 /* We can merge the two registers if the first write to j is after or
3894 * in the same instruction as the last read from i. Note that the
3895 * register at index i will always be used earlier or at the same time
3896 * as the register at index j. */
3897 if (first_writes[i] <= first_writes[j] &&
3898 last_reads[i] <= first_writes[j])
3899 {
3900 rename_temp_register(j, i); /* Replace all references to j with i.*/
3901
3902 /* Update the first_writes and last_reads arrays with the new
3903 * values for the merged register index, and mark the newly unused
3904 * register index as such. */
3905 last_reads[i] = last_reads[j];
3906 first_writes[j] = -1;
3907 last_reads[j] = -1;
3908 }
3909 }
3910 }
3911
3912 ralloc_free(last_reads);
3913 ralloc_free(first_writes);
3914 }
3915
3916 /* Reassign indices to temporary registers by reusing unused indices created
3917 * by optimization passes. */
3918 void
3919 glsl_to_tgsi_visitor::renumber_registers(void)
3920 {
3921 int i = 0;
3922 int new_index = 0;
3923
3924 for (i=0; i < this->next_temp; i++) {
3925 if (get_first_temp_read(i) < 0) continue;
3926 if (i != new_index)
3927 rename_temp_register(i, new_index);
3928 new_index++;
3929 }
3930
3931 this->next_temp = new_index;
3932 }
3933
3934 /**
3935 * Returns a fragment program which implements the current pixel transfer ops.
3936 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3937 */
3938 extern "C" void
3939 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3940 glsl_to_tgsi_visitor *original,
3941 int scale_and_bias, int pixel_maps)
3942 {
3943 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3944 struct st_context *st = st_context(original->ctx);
3945 struct gl_program *prog = &fp->Base.Base;
3946 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3947 st_src_reg coord, src0;
3948 st_dst_reg dst0;
3949 glsl_to_tgsi_instruction *inst;
3950
3951 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3952 v->ctx = original->ctx;
3953 v->prog = prog;
3954 v->shader_program = NULL;
3955 v->shader = NULL;
3956 v->glsl_version = original->glsl_version;
3957 v->native_integers = original->native_integers;
3958 v->options = original->options;
3959 v->next_temp = original->next_temp;
3960 v->num_address_regs = original->num_address_regs;
3961 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3962 v->indirect_addr_consts = original->indirect_addr_consts;
3963 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3964 v->num_immediates = original->num_immediates;
3965
3966 /*
3967 * Get initial pixel color from the texture.
3968 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3969 */
3970 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3971 src0 = v->get_temp(glsl_type::vec4_type);
3972 dst0 = st_dst_reg(src0);
3973 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3974 inst->sampler_array_size = 1;
3975 inst->tex_target = TEXTURE_2D_INDEX;
3976
3977 prog->InputsRead |= VARYING_BIT_TEX0;
3978 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3979 v->samplers_used |= (1 << 0);
3980
3981 if (scale_and_bias) {
3982 static const gl_state_index scale_state[STATE_LENGTH] =
3983 { STATE_INTERNAL, STATE_PT_SCALE,
3984 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3985 static const gl_state_index bias_state[STATE_LENGTH] =
3986 { STATE_INTERNAL, STATE_PT_BIAS,
3987 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3988 GLint scale_p, bias_p;
3989 st_src_reg scale, bias;
3990
3991 scale_p = _mesa_add_state_reference(params, scale_state);
3992 bias_p = _mesa_add_state_reference(params, bias_state);
3993
3994 /* MAD colorTemp, colorTemp, scale, bias; */
3995 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3996 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3997 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3998 }
3999
4000 if (pixel_maps) {
4001 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
4002 st_dst_reg temp_dst = st_dst_reg(temp);
4003
4004 assert(st->pixel_xfer.pixelmap_texture);
4005
4006 /* With a little effort, we can do four pixel map look-ups with
4007 * two TEX instructions:
4008 */
4009
4010 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4011 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
4012 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4013 inst->sampler.index = 1;
4014 inst->sampler_array_size = 1;
4015 inst->tex_target = TEXTURE_2D_INDEX;
4016
4017 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4018 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4019 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4020 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4021 inst->sampler.index = 1;
4022 inst->sampler_array_size = 1;
4023 inst->tex_target = TEXTURE_2D_INDEX;
4024
4025 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4026 v->samplers_used |= (1 << 1);
4027
4028 /* MOV colorTemp, temp; */
4029 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4030 }
4031
4032 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4033 * new visitor. */
4034 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4035 glsl_to_tgsi_instruction *newinst;
4036 st_src_reg src_regs[3];
4037
4038 if (inst->dst.file == PROGRAM_OUTPUT)
4039 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4040
4041 for (int i=0; i<3; i++) {
4042 src_regs[i] = inst->src[i];
4043 if (src_regs[i].file == PROGRAM_INPUT &&
4044 src_regs[i].index == VARYING_SLOT_COL0)
4045 {
4046 src_regs[i].file = PROGRAM_TEMPORARY;
4047 src_regs[i].index = src0.index;
4048 }
4049 else if (src_regs[i].file == PROGRAM_INPUT)
4050 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4051 }
4052
4053 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4054 newinst->tex_target = inst->tex_target;
4055 }
4056
4057 /* Make modifications to fragment program info. */
4058 prog->Parameters = _mesa_combine_parameter_lists(params,
4059 original->prog->Parameters);
4060 _mesa_free_parameter_list(params);
4061 count_resources(v, prog);
4062 fp->glsl_to_tgsi = v;
4063 }
4064
4065 /**
4066 * Make fragment program for glBitmap:
4067 * Sample the texture and kill the fragment if the bit is 0.
4068 * This program will be combined with the user's fragment program.
4069 *
4070 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4071 */
4072 extern "C" void
4073 get_bitmap_visitor(struct st_fragment_program *fp,
4074 glsl_to_tgsi_visitor *original, int samplerIndex)
4075 {
4076 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4077 struct st_context *st = st_context(original->ctx);
4078 struct gl_program *prog = &fp->Base.Base;
4079 st_src_reg coord, src0;
4080 st_dst_reg dst0;
4081 glsl_to_tgsi_instruction *inst;
4082
4083 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4084 v->ctx = original->ctx;
4085 v->prog = prog;
4086 v->shader_program = NULL;
4087 v->shader = NULL;
4088 v->glsl_version = original->glsl_version;
4089 v->native_integers = original->native_integers;
4090 v->options = original->options;
4091 v->next_temp = original->next_temp;
4092 v->num_address_regs = original->num_address_regs;
4093 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4094 v->indirect_addr_consts = original->indirect_addr_consts;
4095 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4096 v->num_immediates = original->num_immediates;
4097
4098 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4099 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4100 src0 = v->get_temp(glsl_type::vec4_type);
4101 dst0 = st_dst_reg(src0);
4102 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4103 inst->sampler.index = samplerIndex;
4104 inst->sampler_array_size = 1;
4105 inst->tex_target = TEXTURE_2D_INDEX;
4106
4107 prog->InputsRead |= VARYING_BIT_TEX0;
4108 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4109 v->samplers_used |= (1 << samplerIndex);
4110
4111 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4112 src0.negate = NEGATE_XYZW;
4113 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4114 src0.swizzle = SWIZZLE_XXXX;
4115 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4116
4117 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4118 * new visitor. */
4119 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4120 glsl_to_tgsi_instruction *newinst;
4121 st_src_reg src_regs[3];
4122
4123 if (inst->dst.file == PROGRAM_OUTPUT)
4124 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4125
4126 for (int i=0; i<3; i++) {
4127 src_regs[i] = inst->src[i];
4128 if (src_regs[i].file == PROGRAM_INPUT)
4129 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4130 }
4131
4132 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4133 newinst->tex_target = inst->tex_target;
4134 }
4135
4136 /* Make modifications to fragment program info. */
4137 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4138 count_resources(v, prog);
4139 fp->glsl_to_tgsi = v;
4140 }
4141
4142 /* ------------------------- TGSI conversion stuff -------------------------- */
4143 struct label {
4144 unsigned branch_target;
4145 unsigned token;
4146 };
4147
4148 /**
4149 * Intermediate state used during shader translation.
4150 */
4151 struct st_translate {
4152 struct ureg_program *ureg;
4153
4154 struct ureg_dst temps[MAX_TEMPS];
4155 struct ureg_dst arrays[MAX_ARRAYS];
4156 struct ureg_src *constants;
4157 struct ureg_src *immediates;
4158 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4159 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4160 struct ureg_dst address[3];
4161 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4162 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4163 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4164 unsigned array_sizes[MAX_ARRAYS];
4165
4166 const GLuint *inputMapping;
4167 const GLuint *outputMapping;
4168
4169 /* For every instruction that contains a label (eg CALL), keep
4170 * details so that we can go back afterwards and emit the correct
4171 * tgsi instruction number for each label.
4172 */
4173 struct label *labels;
4174 unsigned labels_size;
4175 unsigned labels_count;
4176
4177 /* Keep a record of the tgsi instruction number that each mesa
4178 * instruction starts at, will be used to fix up labels after
4179 * translation.
4180 */
4181 unsigned *insn;
4182 unsigned insn_size;
4183 unsigned insn_count;
4184
4185 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4186
4187 boolean error;
4188 };
4189
4190 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4191 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4192 /* Vertex shader
4193 */
4194 TGSI_SEMANTIC_VERTEXID,
4195 TGSI_SEMANTIC_INSTANCEID,
4196
4197 /* Geometry shader
4198 */
4199 TGSI_SEMANTIC_INVOCATIONID,
4200
4201 /* Fragment shader
4202 */
4203 TGSI_SEMANTIC_FACE,
4204 TGSI_SEMANTIC_SAMPLEID,
4205 TGSI_SEMANTIC_SAMPLEPOS,
4206 TGSI_SEMANTIC_SAMPLEMASK,
4207 };
4208
4209 /**
4210 * Make note of a branch to a label in the TGSI code.
4211 * After we've emitted all instructions, we'll go over the list
4212 * of labels built here and patch the TGSI code with the actual
4213 * location of each label.
4214 */
4215 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4216 {
4217 unsigned i;
4218
4219 if (t->labels_count + 1 >= t->labels_size) {
4220 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4221 t->labels = (struct label *)realloc(t->labels,
4222 t->labels_size * sizeof(struct label));
4223 if (t->labels == NULL) {
4224 static unsigned dummy;
4225 t->error = TRUE;
4226 return &dummy;
4227 }
4228 }
4229
4230 i = t->labels_count++;
4231 t->labels[i].branch_target = branch_target;
4232 return &t->labels[i].token;
4233 }
4234
4235 /**
4236 * Called prior to emitting the TGSI code for each instruction.
4237 * Allocate additional space for instructions if needed.
4238 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4239 * the next TGSI instruction.
4240 */
4241 static void set_insn_start(struct st_translate *t, unsigned start)
4242 {
4243 if (t->insn_count + 1 >= t->insn_size) {
4244 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4245 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4246 if (t->insn == NULL) {
4247 t->error = TRUE;
4248 return;
4249 }
4250 }
4251
4252 t->insn[t->insn_count++] = start;
4253 }
4254
4255 /**
4256 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4257 */
4258 static struct ureg_src
4259 emit_immediate(struct st_translate *t,
4260 gl_constant_value values[4],
4261 int type, int size)
4262 {
4263 struct ureg_program *ureg = t->ureg;
4264
4265 switch(type)
4266 {
4267 case GL_FLOAT:
4268 return ureg_DECL_immediate(ureg, &values[0].f, size);
4269 case GL_INT:
4270 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4271 case GL_UNSIGNED_INT:
4272 case GL_BOOL:
4273 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4274 default:
4275 assert(!"should not get here - type must be float, int, uint, or bool");
4276 return ureg_src_undef();
4277 }
4278 }
4279
4280 /**
4281 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4282 */
4283 static struct ureg_dst
4284 dst_register(struct st_translate *t,
4285 gl_register_file file,
4286 GLuint index)
4287 {
4288 unsigned array;
4289
4290 switch(file) {
4291 case PROGRAM_UNDEFINED:
4292 return ureg_dst_undef();
4293
4294 case PROGRAM_TEMPORARY:
4295 assert(index < Elements(t->temps));
4296
4297 if (ureg_dst_is_undef(t->temps[index]))
4298 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4299
4300 return t->temps[index];
4301
4302 case PROGRAM_ARRAY:
4303 array = index >> 16;
4304
4305 assert(array < Elements(t->arrays));
4306
4307 if (ureg_dst_is_undef(t->arrays[array]))
4308 t->arrays[array] = ureg_DECL_array_temporary(
4309 t->ureg, t->array_sizes[array], TRUE);
4310
4311 return ureg_dst_array_offset(t->arrays[array],
4312 (int)(index & 0xFFFF) - 0x8000);
4313
4314 case PROGRAM_OUTPUT:
4315 if (t->procType == TGSI_PROCESSOR_VERTEX)
4316 assert(index < VARYING_SLOT_MAX);
4317 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4318 assert(index < FRAG_RESULT_MAX);
4319 else
4320 assert(index < VARYING_SLOT_MAX);
4321
4322 assert(t->outputMapping[index] < Elements(t->outputs));
4323
4324 return t->outputs[t->outputMapping[index]];
4325
4326 case PROGRAM_ADDRESS:
4327 return t->address[index];
4328
4329 default:
4330 assert(!"unknown dst register file");
4331 return ureg_dst_undef();
4332 }
4333 }
4334
4335 /**
4336 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4337 */
4338 static struct ureg_src
4339 src_register(struct st_translate *t, const struct st_src_reg *reg)
4340 {
4341 switch(reg->file) {
4342 case PROGRAM_UNDEFINED:
4343 return ureg_src_undef();
4344
4345 case PROGRAM_TEMPORARY:
4346 case PROGRAM_ARRAY:
4347 return ureg_src(dst_register(t, reg->file, reg->index));
4348
4349 case PROGRAM_UNIFORM:
4350 assert(reg->index >= 0);
4351 return t->constants[reg->index];
4352 case PROGRAM_STATE_VAR:
4353 case PROGRAM_CONSTANT: /* ie, immediate */
4354 if (reg->has_index2)
4355 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4356 else if (reg->index < 0)
4357 return ureg_DECL_constant(t->ureg, 0);
4358 else
4359 return t->constants[reg->index];
4360
4361 case PROGRAM_IMMEDIATE:
4362 return t->immediates[reg->index];
4363
4364 case PROGRAM_INPUT:
4365 assert(t->inputMapping[reg->index] < Elements(t->inputs));
4366 return t->inputs[t->inputMapping[reg->index]];
4367
4368 case PROGRAM_OUTPUT:
4369 assert(t->outputMapping[reg->index] < Elements(t->outputs));
4370 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4371
4372 case PROGRAM_ADDRESS:
4373 return ureg_src(t->address[reg->index]);
4374
4375 case PROGRAM_SYSTEM_VALUE:
4376 assert(reg->index < (int) Elements(t->systemValues));
4377 return t->systemValues[reg->index];
4378
4379 default:
4380 assert(!"unknown src register file");
4381 return ureg_src_undef();
4382 }
4383 }
4384
4385 /**
4386 * Create a TGSI ureg_dst register from an st_dst_reg.
4387 */
4388 static struct ureg_dst
4389 translate_dst(struct st_translate *t,
4390 const st_dst_reg *dst_reg,
4391 bool saturate, bool clamp_color)
4392 {
4393 struct ureg_dst dst = dst_register(t,
4394 dst_reg->file,
4395 dst_reg->index);
4396
4397 dst = ureg_writemask(dst, dst_reg->writemask);
4398
4399 if (saturate)
4400 dst = ureg_saturate(dst);
4401 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4402 /* Clamp colors for ARB_color_buffer_float. */
4403 switch (t->procType) {
4404 case TGSI_PROCESSOR_VERTEX:
4405 /* XXX if the geometry shader is present, this must be done there
4406 * instead of here. */
4407 if (dst_reg->index == VARYING_SLOT_COL0 ||
4408 dst_reg->index == VARYING_SLOT_COL1 ||
4409 dst_reg->index == VARYING_SLOT_BFC0 ||
4410 dst_reg->index == VARYING_SLOT_BFC1) {
4411 dst = ureg_saturate(dst);
4412 }
4413 break;
4414
4415 case TGSI_PROCESSOR_FRAGMENT:
4416 if (dst_reg->index == FRAG_RESULT_COLOR ||
4417 dst_reg->index >= FRAG_RESULT_DATA0) {
4418 dst = ureg_saturate(dst);
4419 }
4420 break;
4421 }
4422 }
4423
4424 if (dst_reg->reladdr != NULL) {
4425 assert(dst_reg->file != PROGRAM_TEMPORARY);
4426 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4427 }
4428
4429 return dst;
4430 }
4431
4432 /**
4433 * Create a TGSI ureg_src register from an st_src_reg.
4434 */
4435 static struct ureg_src
4436 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4437 {
4438 struct ureg_src src = src_register(t, src_reg);
4439
4440 if (src_reg->has_index2) {
4441 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4442 * and UBO constant buffers (buffer, position).
4443 */
4444 if (src_reg->reladdr2)
4445 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4446 src_reg->index2D);
4447 else
4448 src = ureg_src_dimension(src, src_reg->index2D);
4449 }
4450
4451 src = ureg_swizzle(src,
4452 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4453 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4454 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4455 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4456
4457 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4458 src = ureg_negate(src);
4459
4460 if (src_reg->reladdr != NULL) {
4461 assert(src_reg->file != PROGRAM_TEMPORARY);
4462 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4463 }
4464
4465 return src;
4466 }
4467
4468 static struct tgsi_texture_offset
4469 translate_tex_offset(struct st_translate *t,
4470 const st_src_reg *in_offset, int idx)
4471 {
4472 struct tgsi_texture_offset offset;
4473 struct ureg_src imm_src;
4474 struct ureg_dst dst;
4475 int array;
4476
4477 switch (in_offset->file) {
4478 case PROGRAM_IMMEDIATE:
4479 imm_src = t->immediates[in_offset->index];
4480
4481 offset.File = imm_src.File;
4482 offset.Index = imm_src.Index;
4483 offset.SwizzleX = imm_src.SwizzleX;
4484 offset.SwizzleY = imm_src.SwizzleY;
4485 offset.SwizzleZ = imm_src.SwizzleZ;
4486 offset.Padding = 0;
4487 break;
4488 case PROGRAM_TEMPORARY:
4489 imm_src = ureg_src(t->temps[in_offset->index]);
4490 offset.File = imm_src.File;
4491 offset.Index = imm_src.Index;
4492 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4493 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4494 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4495 offset.Padding = 0;
4496 break;
4497 case PROGRAM_ARRAY:
4498 array = in_offset->index >> 16;
4499
4500 assert(array >= 0);
4501 assert(array < (int) Elements(t->arrays));
4502
4503 dst = t->arrays[array];
4504 offset.File = dst.File;
4505 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4506 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4507 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4508 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4509 offset.Padding = 0;
4510 break;
4511 default:
4512 break;
4513 }
4514 return offset;
4515 }
4516
4517 static void
4518 compile_tgsi_instruction(struct st_translate *t,
4519 const glsl_to_tgsi_instruction *inst,
4520 bool clamp_dst_color_output)
4521 {
4522 struct ureg_program *ureg = t->ureg;
4523 GLuint i;
4524 struct ureg_dst dst[1];
4525 struct ureg_src src[4];
4526 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4527
4528 unsigned num_dst;
4529 unsigned num_src;
4530 unsigned tex_target;
4531
4532 num_dst = num_inst_dst_regs(inst->op);
4533 num_src = num_inst_src_regs(inst->op);
4534
4535 if (num_dst)
4536 dst[0] = translate_dst(t,
4537 &inst->dst,
4538 inst->saturate,
4539 clamp_dst_color_output);
4540
4541 for (i = 0; i < num_src; i++)
4542 src[i] = translate_src(t, &inst->src[i]);
4543
4544 switch(inst->op) {
4545 case TGSI_OPCODE_BGNLOOP:
4546 case TGSI_OPCODE_CAL:
4547 case TGSI_OPCODE_ELSE:
4548 case TGSI_OPCODE_ENDLOOP:
4549 case TGSI_OPCODE_IF:
4550 case TGSI_OPCODE_UIF:
4551 assert(num_dst == 0);
4552 ureg_label_insn(ureg,
4553 inst->op,
4554 src, num_src,
4555 get_label(t,
4556 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4557 return;
4558
4559 case TGSI_OPCODE_TEX:
4560 case TGSI_OPCODE_TXB:
4561 case TGSI_OPCODE_TXD:
4562 case TGSI_OPCODE_TXL:
4563 case TGSI_OPCODE_TXP:
4564 case TGSI_OPCODE_TXQ:
4565 case TGSI_OPCODE_TXF:
4566 case TGSI_OPCODE_TEX2:
4567 case TGSI_OPCODE_TXB2:
4568 case TGSI_OPCODE_TXL2:
4569 case TGSI_OPCODE_TG4:
4570 case TGSI_OPCODE_LODQ:
4571 src[num_src] = t->samplers[inst->sampler.index];
4572 if (inst->sampler.reladdr)
4573 src[num_src] =
4574 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4575 num_src++;
4576 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4577 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4578 }
4579 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4580
4581 ureg_tex_insn(ureg,
4582 inst->op,
4583 dst, num_dst,
4584 tex_target,
4585 texoffsets, inst->tex_offset_num_offset,
4586 src, num_src);
4587 return;
4588
4589 case TGSI_OPCODE_SCS:
4590 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4591 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4592 break;
4593
4594 default:
4595 ureg_insn(ureg,
4596 inst->op,
4597 dst, num_dst,
4598 src, num_src);
4599 break;
4600 }
4601 }
4602
4603 /**
4604 * Emit the TGSI instructions for inverting and adjusting WPOS.
4605 * This code is unavoidable because it also depends on whether
4606 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4607 */
4608 static void
4609 emit_wpos_adjustment( struct st_translate *t,
4610 const struct gl_program *program,
4611 boolean invert,
4612 GLfloat adjX, GLfloat adjY[2])
4613 {
4614 struct ureg_program *ureg = t->ureg;
4615
4616 /* Fragment program uses fragment position input.
4617 * Need to replace instances of INPUT[WPOS] with temp T
4618 * where T = INPUT[WPOS] by y is inverted.
4619 */
4620 static const gl_state_index wposTransformState[STATE_LENGTH]
4621 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4622 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4623
4624 /* XXX: note we are modifying the incoming shader here! Need to
4625 * do this before emitting the constant decls below, or this
4626 * will be missed:
4627 */
4628 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4629 wposTransformState);
4630
4631 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4632 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4633 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4634
4635 /* First, apply the coordinate shift: */
4636 if (adjX || adjY[0] || adjY[1]) {
4637 if (adjY[0] != adjY[1]) {
4638 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4639 * depending on whether inversion is actually going to be applied
4640 * or not, which is determined by testing against the inversion
4641 * state variable used below, which will be either +1 or -1.
4642 */
4643 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4644
4645 ureg_CMP(ureg, adj_temp,
4646 ureg_scalar(wpostrans, invert ? 2 : 0),
4647 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4648 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4649 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4650 } else {
4651 ureg_ADD(ureg, wpos_temp, wpos_input,
4652 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4653 }
4654 wpos_input = ureg_src(wpos_temp);
4655 } else {
4656 /* MOV wpos_temp, input[wpos]
4657 */
4658 ureg_MOV( ureg, wpos_temp, wpos_input );
4659 }
4660
4661 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4662 * inversion/identity, or the other way around if we're drawing to an FBO.
4663 */
4664 if (invert) {
4665 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4666 */
4667 ureg_MAD( ureg,
4668 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4669 wpos_input,
4670 ureg_scalar(wpostrans, 0),
4671 ureg_scalar(wpostrans, 1));
4672 } else {
4673 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4674 */
4675 ureg_MAD( ureg,
4676 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4677 wpos_input,
4678 ureg_scalar(wpostrans, 2),
4679 ureg_scalar(wpostrans, 3));
4680 }
4681
4682 /* Use wpos_temp as position input from here on:
4683 */
4684 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4685 }
4686
4687
4688 /**
4689 * Emit fragment position/ooordinate code.
4690 */
4691 static void
4692 emit_wpos(struct st_context *st,
4693 struct st_translate *t,
4694 const struct gl_program *program,
4695 struct ureg_program *ureg)
4696 {
4697 const struct gl_fragment_program *fp =
4698 (const struct gl_fragment_program *) program;
4699 struct pipe_screen *pscreen = st->pipe->screen;
4700 GLfloat adjX = 0.0f;
4701 GLfloat adjY[2] = { 0.0f, 0.0f };
4702 boolean invert = FALSE;
4703
4704 /* Query the pixel center conventions supported by the pipe driver and set
4705 * adjX, adjY to help out if it cannot handle the requested one internally.
4706 *
4707 * The bias of the y-coordinate depends on whether y-inversion takes place
4708 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4709 * drawing to an FBO (causes additional inversion), and whether the the pipe
4710 * driver origin and the requested origin differ (the latter condition is
4711 * stored in the 'invert' variable).
4712 *
4713 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4714 *
4715 * center shift only:
4716 * i -> h: +0.5
4717 * h -> i: -0.5
4718 *
4719 * inversion only:
4720 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4721 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4722 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4723 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4724 *
4725 * inversion and center shift:
4726 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4727 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4728 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4729 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4730 */
4731 if (fp->OriginUpperLeft) {
4732 /* Fragment shader wants origin in upper-left */
4733 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4734 /* the driver supports upper-left origin */
4735 }
4736 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4737 /* the driver supports lower-left origin, need to invert Y */
4738 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4739 invert = TRUE;
4740 }
4741 else
4742 assert(0);
4743 }
4744 else {
4745 /* Fragment shader wants origin in lower-left */
4746 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4747 /* the driver supports lower-left origin */
4748 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4749 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4750 /* the driver supports upper-left origin, need to invert Y */
4751 invert = TRUE;
4752 else
4753 assert(0);
4754 }
4755
4756 if (fp->PixelCenterInteger) {
4757 /* Fragment shader wants pixel center integer */
4758 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4759 /* the driver supports pixel center integer */
4760 adjY[1] = 1.0f;
4761 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4762 }
4763 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4764 /* the driver supports pixel center half integer, need to bias X,Y */
4765 adjX = -0.5f;
4766 adjY[0] = -0.5f;
4767 adjY[1] = 0.5f;
4768 }
4769 else
4770 assert(0);
4771 }
4772 else {
4773 /* Fragment shader wants pixel center half integer */
4774 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4775 /* the driver supports pixel center half integer */
4776 }
4777 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4778 /* the driver supports pixel center integer, need to bias X,Y */
4779 adjX = adjY[0] = adjY[1] = 0.5f;
4780 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4781 }
4782 else
4783 assert(0);
4784 }
4785
4786 /* we invert after adjustment so that we avoid the MOV to temporary,
4787 * and reuse the adjustment ADD instead */
4788 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4789 }
4790
4791 /**
4792 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4793 * TGSI uses +1 for front, -1 for back.
4794 * This function converts the TGSI value to the GL value. Simply clamping/
4795 * saturating the value to [0,1] does the job.
4796 */
4797 static void
4798 emit_face_var(struct st_translate *t)
4799 {
4800 struct ureg_program *ureg = t->ureg;
4801 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4802 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4803
4804 /* MOV_SAT face_temp, input[face] */
4805 face_temp = ureg_saturate(face_temp);
4806 ureg_MOV(ureg, face_temp, face_input);
4807
4808 /* Use face_temp as face input from here on: */
4809 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4810 }
4811
4812 static void
4813 emit_edgeflags(struct st_translate *t)
4814 {
4815 struct ureg_program *ureg = t->ureg;
4816 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4817 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4818
4819 ureg_MOV(ureg, edge_dst, edge_src);
4820 }
4821
4822 /**
4823 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4824 * \param program the program to translate
4825 * \param numInputs number of input registers used
4826 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4827 * input indexes
4828 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4829 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4830 * each input
4831 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4832 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4833 * \param numOutputs number of output registers used
4834 * \param outputMapping maps Mesa fragment program outputs to TGSI
4835 * generic outputs
4836 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4837 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4838 * each output
4839 *
4840 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4841 */
4842 extern "C" enum pipe_error
4843 st_translate_program(
4844 struct gl_context *ctx,
4845 uint procType,
4846 struct ureg_program *ureg,
4847 glsl_to_tgsi_visitor *program,
4848 const struct gl_program *proginfo,
4849 GLuint numInputs,
4850 const GLuint inputMapping[],
4851 const ubyte inputSemanticName[],
4852 const ubyte inputSemanticIndex[],
4853 const GLuint interpMode[],
4854 const GLuint interpLocation[],
4855 GLuint numOutputs,
4856 const GLuint outputMapping[],
4857 const ubyte outputSemanticName[],
4858 const ubyte outputSemanticIndex[],
4859 boolean passthrough_edgeflags,
4860 boolean clamp_color)
4861 {
4862 struct st_translate *t;
4863 unsigned i;
4864 enum pipe_error ret = PIPE_OK;
4865
4866 assert(numInputs <= Elements(t->inputs));
4867 assert(numOutputs <= Elements(t->outputs));
4868
4869 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
4870 TGSI_SEMANTIC_FACE);
4871 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
4872 TGSI_SEMANTIC_VERTEXID);
4873 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
4874 TGSI_SEMANTIC_INSTANCEID);
4875 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
4876 TGSI_SEMANTIC_SAMPLEID);
4877 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
4878 TGSI_SEMANTIC_SAMPLEPOS);
4879 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
4880 TGSI_SEMANTIC_SAMPLEMASK);
4881 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
4882 TGSI_SEMANTIC_INVOCATIONID);
4883
4884 t = CALLOC_STRUCT(st_translate);
4885 if (!t) {
4886 ret = PIPE_ERROR_OUT_OF_MEMORY;
4887 goto out;
4888 }
4889
4890 memset(t, 0, sizeof *t);
4891
4892 t->procType = procType;
4893 t->inputMapping = inputMapping;
4894 t->outputMapping = outputMapping;
4895 t->ureg = ureg;
4896
4897 if (program->shader_program) {
4898 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4899 struct gl_uniform_storage *const storage =
4900 &program->shader_program->UniformStorage[i];
4901
4902 _mesa_uniform_detach_all_driver_storage(storage);
4903 }
4904 }
4905
4906 /*
4907 * Declare input attributes.
4908 */
4909 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4910 for (i = 0; i < numInputs; i++) {
4911 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4912 inputSemanticName[i],
4913 inputSemanticIndex[i],
4914 interpMode[i], 0,
4915 interpLocation[i]);
4916 }
4917
4918 if (proginfo->InputsRead & VARYING_BIT_POS) {
4919 /* Must do this after setting up t->inputs, and before
4920 * emitting constant references, below:
4921 */
4922 emit_wpos(st_context(ctx), t, proginfo, ureg);
4923 }
4924
4925 if (proginfo->InputsRead & VARYING_BIT_FACE)
4926 emit_face_var(t);
4927
4928 /*
4929 * Declare output attributes.
4930 */
4931 for (i = 0; i < numOutputs; i++) {
4932 switch (outputSemanticName[i]) {
4933 case TGSI_SEMANTIC_POSITION:
4934 t->outputs[i] = ureg_DECL_output(ureg,
4935 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4936 outputSemanticIndex[i]);
4937 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4938 break;
4939 case TGSI_SEMANTIC_STENCIL:
4940 t->outputs[i] = ureg_DECL_output(ureg,
4941 TGSI_SEMANTIC_STENCIL, /* Stencil */
4942 outputSemanticIndex[i]);
4943 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4944 break;
4945 case TGSI_SEMANTIC_COLOR:
4946 t->outputs[i] = ureg_DECL_output(ureg,
4947 TGSI_SEMANTIC_COLOR,
4948 outputSemanticIndex[i]);
4949 break;
4950 case TGSI_SEMANTIC_SAMPLEMASK:
4951 t->outputs[i] = ureg_DECL_output(ureg,
4952 TGSI_SEMANTIC_SAMPLEMASK,
4953 outputSemanticIndex[i]);
4954 /* TODO: If we ever support more than 32 samples, this will have
4955 * to become an array.
4956 */
4957 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4958 break;
4959 default:
4960 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4961 ret = PIPE_ERROR_BAD_INPUT;
4962 goto out;
4963 }
4964 }
4965 }
4966 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4967 for (i = 0; i < numInputs; i++) {
4968 t->inputs[i] = ureg_DECL_gs_input(ureg,
4969 i,
4970 inputSemanticName[i],
4971 inputSemanticIndex[i]);
4972 }
4973
4974 for (i = 0; i < numOutputs; i++) {
4975 t->outputs[i] = ureg_DECL_output(ureg,
4976 outputSemanticName[i],
4977 outputSemanticIndex[i]);
4978 }
4979 }
4980 else {
4981 assert(procType == TGSI_PROCESSOR_VERTEX);
4982
4983 for (i = 0; i < numInputs; i++) {
4984 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4985 }
4986
4987 for (i = 0; i < numOutputs; i++) {
4988 t->outputs[i] = ureg_DECL_output(ureg,
4989 outputSemanticName[i],
4990 outputSemanticIndex[i]);
4991 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4992 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4993 ureg_MOV(ureg,
4994 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
4995 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
4996 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4997 }
4998 }
4999 if (passthrough_edgeflags)
5000 emit_edgeflags(t);
5001 }
5002
5003 /* Declare address register.
5004 */
5005 if (program->num_address_regs > 0) {
5006 assert(program->num_address_regs <= 3);
5007 for (int i = 0; i < program->num_address_regs; i++)
5008 t->address[i] = ureg_DECL_address(ureg);
5009 }
5010
5011 /* Declare misc input registers
5012 */
5013 {
5014 GLbitfield sysInputs = proginfo->SystemValuesRead;
5015 unsigned numSys = 0;
5016 for (i = 0; sysInputs; i++) {
5017 if (sysInputs & (1 << i)) {
5018 unsigned semName = _mesa_sysval_to_semantic[i];
5019 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5020 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5021 semName == TGSI_SEMANTIC_VERTEXID) {
5022 /* From Gallium perspective, these system values are always
5023 * integer, and require native integer support. However, if
5024 * native integer is supported on the vertex stage but not the
5025 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5026 * assumes these system values are floats. To resolve the
5027 * inconsistency, we insert a U2F.
5028 */
5029 struct st_context *st = st_context(ctx);
5030 struct pipe_screen *pscreen = st->pipe->screen;
5031 assert(procType == TGSI_PROCESSOR_VERTEX);
5032 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5033 if (!ctx->Const.NativeIntegers) {
5034 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5035 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5036 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5037 }
5038 }
5039 numSys++;
5040 sysInputs &= ~(1 << i);
5041 }
5042 }
5043 }
5044
5045 /* Copy over array sizes
5046 */
5047 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5048
5049 /* Emit constants and uniforms. TGSI uses a single index space for these,
5050 * so we put all the translated regs in t->constants.
5051 */
5052 if (proginfo->Parameters) {
5053 t->constants = (struct ureg_src *)
5054 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5055 if (t->constants == NULL) {
5056 ret = PIPE_ERROR_OUT_OF_MEMORY;
5057 goto out;
5058 }
5059
5060 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5061 switch (proginfo->Parameters->Parameters[i].Type) {
5062 case PROGRAM_STATE_VAR:
5063 case PROGRAM_UNIFORM:
5064 t->constants[i] = ureg_DECL_constant(ureg, i);
5065 break;
5066
5067 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5068 * addressing of the const buffer.
5069 * FIXME: Be smarter and recognize param arrays:
5070 * indirect addressing is only valid within the referenced
5071 * array.
5072 */
5073 case PROGRAM_CONSTANT:
5074 if (program->indirect_addr_consts)
5075 t->constants[i] = ureg_DECL_constant(ureg, i);
5076 else
5077 t->constants[i] = emit_immediate(t,
5078 proginfo->Parameters->ParameterValues[i],
5079 proginfo->Parameters->Parameters[i].DataType,
5080 4);
5081 break;
5082 default:
5083 break;
5084 }
5085 }
5086 }
5087
5088 if (program->shader) {
5089 unsigned num_ubos = program->shader->NumUniformBlocks;
5090
5091 for (i = 0; i < num_ubos; i++) {
5092 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5093 unsigned num_const_vecs = (size + 15) / 16;
5094 unsigned first, last;
5095 assert(num_const_vecs > 0);
5096 first = 0;
5097 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5098 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5099 }
5100 }
5101
5102 /* Emit immediate values.
5103 */
5104 t->immediates = (struct ureg_src *)
5105 calloc(program->num_immediates, sizeof(struct ureg_src));
5106 if (t->immediates == NULL) {
5107 ret = PIPE_ERROR_OUT_OF_MEMORY;
5108 goto out;
5109 }
5110 i = 0;
5111 foreach_in_list(immediate_storage, imm, &program->immediates) {
5112 assert(i < program->num_immediates);
5113 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5114 }
5115 assert(i == program->num_immediates);
5116
5117 /* texture samplers */
5118 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5119 if (program->samplers_used & (1 << i)) {
5120 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5121 }
5122 }
5123
5124 /* Emit each instruction in turn:
5125 */
5126 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5127 set_insn_start(t, ureg_get_instruction_number(ureg));
5128 compile_tgsi_instruction(t, inst, clamp_color);
5129 }
5130
5131 /* Fix up all emitted labels:
5132 */
5133 for (i = 0; i < t->labels_count; i++) {
5134 ureg_fixup_label(ureg, t->labels[i].token,
5135 t->insn[t->labels[i].branch_target]);
5136 }
5137
5138 if (program->shader_program) {
5139 /* This has to be done last. Any operation the can cause
5140 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5141 * program constant) has to happen before creating this linkage.
5142 */
5143 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5144 if (program->shader_program->_LinkedShaders[i] == NULL)
5145 continue;
5146
5147 _mesa_associate_uniform_storage(ctx, program->shader_program,
5148 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5149 }
5150 }
5151
5152 out:
5153 if (t) {
5154 free(t->insn);
5155 free(t->labels);
5156 free(t->constants);
5157 free(t->immediates);
5158
5159 if (t->error) {
5160 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5161 }
5162
5163 free(t);
5164 }
5165
5166 return ret;
5167 }
5168 /* ----------------------------- End TGSI code ------------------------------ */
5169
5170
5171 static unsigned
5172 shader_stage_to_ptarget(gl_shader_stage stage)
5173 {
5174 switch (stage) {
5175 case MESA_SHADER_VERTEX:
5176 return PIPE_SHADER_VERTEX;
5177 case MESA_SHADER_FRAGMENT:
5178 return PIPE_SHADER_FRAGMENT;
5179 case MESA_SHADER_GEOMETRY:
5180 return PIPE_SHADER_GEOMETRY;
5181 case MESA_SHADER_COMPUTE:
5182 return PIPE_SHADER_COMPUTE;
5183 }
5184
5185 assert(!"should not be reached");
5186 return PIPE_SHADER_VERTEX;
5187 }
5188
5189
5190 /**
5191 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5192 * generating Mesa IR.
5193 */
5194 static struct gl_program *
5195 get_mesa_program(struct gl_context *ctx,
5196 struct gl_shader_program *shader_program,
5197 struct gl_shader *shader)
5198 {
5199 glsl_to_tgsi_visitor* v;
5200 struct gl_program *prog;
5201 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5202 bool progress;
5203 struct gl_shader_compiler_options *options =
5204 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5205 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5206 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5207
5208 validate_ir_tree(shader->ir);
5209
5210 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5211 if (!prog)
5212 return NULL;
5213 prog->Parameters = _mesa_new_parameter_list();
5214 v = new glsl_to_tgsi_visitor();
5215 v->ctx = ctx;
5216 v->prog = prog;
5217 v->shader_program = shader_program;
5218 v->shader = shader;
5219 v->options = options;
5220 v->glsl_version = ctx->Const.GLSLVersion;
5221 v->native_integers = ctx->Const.NativeIntegers;
5222
5223 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5224 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5225
5226 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5227 prog->Parameters);
5228
5229 /* Remove reads from output registers. */
5230 lower_output_reads(shader->ir);
5231
5232 /* Emit intermediate IR for main(). */
5233 visit_exec_list(shader->ir, v);
5234
5235 /* Now emit bodies for any functions that were used. */
5236 do {
5237 progress = GL_FALSE;
5238
5239 foreach_in_list(function_entry, entry, &v->function_signatures) {
5240 if (!entry->bgn_inst) {
5241 v->current_function = entry;
5242
5243 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5244 entry->bgn_inst->function = entry;
5245
5246 visit_exec_list(&entry->sig->body, v);
5247
5248 glsl_to_tgsi_instruction *last;
5249 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5250 if (last->op != TGSI_OPCODE_RET)
5251 v->emit(NULL, TGSI_OPCODE_RET);
5252
5253 glsl_to_tgsi_instruction *end;
5254 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5255 end->function = entry;
5256
5257 progress = GL_TRUE;
5258 }
5259 }
5260 } while (progress);
5261
5262 #if 0
5263 /* Print out some information (for debugging purposes) used by the
5264 * optimization passes. */
5265 for (i=0; i < v->next_temp; i++) {
5266 int fr = v->get_first_temp_read(i);
5267 int fw = v->get_first_temp_write(i);
5268 int lr = v->get_last_temp_read(i);
5269 int lw = v->get_last_temp_write(i);
5270
5271 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5272 assert(fw <= fr);
5273 }
5274 #endif
5275
5276 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5277 v->simplify_cmp();
5278 v->copy_propagate();
5279 while (v->eliminate_dead_code());
5280
5281 v->merge_registers();
5282 v->renumber_registers();
5283
5284 /* Write the END instruction. */
5285 v->emit(NULL, TGSI_OPCODE_END);
5286
5287 if (ctx->_Shader->Flags & GLSL_DUMP) {
5288 printf("\n");
5289 printf("GLSL IR for linked %s program %d:\n",
5290 _mesa_shader_stage_to_string(shader->Stage),
5291 shader_program->Name);
5292 _mesa_print_ir(stdout, shader->ir, NULL);
5293 printf("\n");
5294 printf("\n");
5295 fflush(stdout);
5296 }
5297
5298 prog->Instructions = NULL;
5299 prog->NumInstructions = 0;
5300
5301 do_set_program_inouts(shader->ir, prog, shader->Stage);
5302 count_resources(v, prog);
5303
5304 _mesa_reference_program(ctx, &shader->Program, prog);
5305
5306 /* This has to be done last. Any operation the can cause
5307 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5308 * program constant) has to happen before creating this linkage.
5309 */
5310 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5311 if (!shader_program->LinkStatus) {
5312 return NULL;
5313 }
5314
5315 struct st_vertex_program *stvp;
5316 struct st_fragment_program *stfp;
5317 struct st_geometry_program *stgp;
5318
5319 switch (shader->Type) {
5320 case GL_VERTEX_SHADER:
5321 stvp = (struct st_vertex_program *)prog;
5322 stvp->glsl_to_tgsi = v;
5323 break;
5324 case GL_FRAGMENT_SHADER:
5325 stfp = (struct st_fragment_program *)prog;
5326 stfp->glsl_to_tgsi = v;
5327 break;
5328 case GL_GEOMETRY_SHADER:
5329 stgp = (struct st_geometry_program *)prog;
5330 stgp->glsl_to_tgsi = v;
5331 stgp->Base.InputType = shader_program->Geom.InputType;
5332 stgp->Base.OutputType = shader_program->Geom.OutputType;
5333 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5334 stgp->Base.Invocations = shader_program->Geom.Invocations;
5335 break;
5336 default:
5337 assert(!"should not be reached");
5338 return NULL;
5339 }
5340
5341 return prog;
5342 }
5343
5344 extern "C" {
5345
5346 struct gl_shader *
5347 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5348 {
5349 struct gl_shader *shader;
5350 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5351 type == GL_GEOMETRY_SHADER_ARB);
5352 shader = rzalloc(NULL, struct gl_shader);
5353 if (shader) {
5354 shader->Type = type;
5355 shader->Stage = _mesa_shader_enum_to_shader_stage(type);
5356 shader->Name = name;
5357 _mesa_init_shader(ctx, shader);
5358 }
5359 return shader;
5360 }
5361
5362 struct gl_shader_program *
5363 st_new_shader_program(struct gl_context *ctx, GLuint name)
5364 {
5365 struct gl_shader_program *shProg;
5366 shProg = rzalloc(NULL, struct gl_shader_program);
5367 if (shProg) {
5368 shProg->Name = name;
5369 _mesa_init_shader_program(ctx, shProg);
5370 }
5371 return shProg;
5372 }
5373
5374 /**
5375 * Link a shader.
5376 * Called via ctx->Driver.LinkShader()
5377 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5378 * with code lowering and other optimizations.
5379 */
5380 GLboolean
5381 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5382 {
5383 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5384 assert(prog->LinkStatus);
5385
5386 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5387 if (prog->_LinkedShaders[i] == NULL)
5388 continue;
5389
5390 bool progress;
5391 exec_list *ir = prog->_LinkedShaders[i]->ir;
5392 const struct gl_shader_compiler_options *options =
5393 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5394
5395 /* If there are forms of indirect addressing that the driver
5396 * cannot handle, perform the lowering pass.
5397 */
5398 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5399 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5400 lower_variable_index_to_cond_assign(ir,
5401 options->EmitNoIndirectInput,
5402 options->EmitNoIndirectOutput,
5403 options->EmitNoIndirectTemp,
5404 options->EmitNoIndirectUniform);
5405 }
5406
5407 if (ctx->Extensions.ARB_shading_language_packing) {
5408 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5409 LOWER_UNPACK_SNORM_2x16 |
5410 LOWER_PACK_UNORM_2x16 |
5411 LOWER_UNPACK_UNORM_2x16 |
5412 LOWER_PACK_SNORM_4x8 |
5413 LOWER_UNPACK_SNORM_4x8 |
5414 LOWER_UNPACK_UNORM_4x8 |
5415 LOWER_PACK_UNORM_4x8 |
5416 LOWER_PACK_HALF_2x16 |
5417 LOWER_UNPACK_HALF_2x16;
5418
5419 lower_packing_builtins(ir, lower_inst);
5420 }
5421
5422 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5423 lower_offset_arrays(ir);
5424 do_mat_op_to_vec(ir);
5425 lower_instructions(ir,
5426 MOD_TO_FRACT |
5427 DIV_TO_MUL_RCP |
5428 EXP_TO_EXP2 |
5429 LOG_TO_LOG2 |
5430 LDEXP_TO_ARITH |
5431 CARRY_TO_ARITH |
5432 BORROW_TO_ARITH |
5433 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5434 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5435
5436 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5437 do_vec_index_to_cond_assign(ir);
5438 lower_vector_insert(ir, true);
5439 lower_quadop_vector(ir, false);
5440 lower_noise(ir);
5441 if (options->MaxIfDepth == 0) {
5442 lower_discard(ir);
5443 }
5444
5445 do {
5446 progress = false;
5447
5448 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5449
5450 progress = do_common_optimization(ir, true, true, options,
5451 ctx->Const.NativeIntegers)
5452 || progress;
5453
5454 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5455
5456 } while (progress);
5457
5458 validate_ir_tree(ir);
5459 }
5460
5461 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5462 struct gl_program *linked_prog;
5463
5464 if (prog->_LinkedShaders[i] == NULL)
5465 continue;
5466
5467 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5468
5469 if (linked_prog) {
5470 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5471 linked_prog);
5472 if (!ctx->Driver.ProgramStringNotify(ctx,
5473 _mesa_shader_stage_to_program(i),
5474 linked_prog)) {
5475 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5476 NULL);
5477 _mesa_reference_program(ctx, &linked_prog, NULL);
5478 return GL_FALSE;
5479 }
5480 }
5481
5482 _mesa_reference_program(ctx, &linked_prog, NULL);
5483 }
5484
5485 return GL_TRUE;
5486 }
5487
5488 void
5489 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5490 const GLuint outputMapping[],
5491 struct pipe_stream_output_info *so)
5492 {
5493 unsigned i;
5494 struct gl_transform_feedback_info *info =
5495 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5496
5497 for (i = 0; i < info->NumOutputs; i++) {
5498 so->output[i].register_index =
5499 outputMapping[info->Outputs[i].OutputRegister];
5500 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5501 so->output[i].num_components = info->Outputs[i].NumComponents;
5502 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5503 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5504 so->output[i].stream = info->Outputs[i].StreamId;
5505 }
5506
5507 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5508 so->stride[i] = info->BufferStride[i];
5509 }
5510 so->num_outputs = info->NumOutputs;
5511 }
5512
5513 } /* extern "C" */