5bc70a4925bcab6f92bb8aa20dc9eedc0f797211
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of arrays
79 */
80 #define MAX_ARRAYS 256
81
82 #define MAX_GLSL_TEXTURE_OFFSET 4
83
84 class st_src_reg;
85 class st_dst_reg;
86
87 static int swizzle_for_size(int size);
88
89 /**
90 * This struct is a corresponding struct to TGSI ureg_src.
91 */
92 class st_src_reg {
93 public:
94 st_src_reg(gl_register_file file, int index, const glsl_type *type)
95 {
96 this->file = file;
97 this->index = index;
98 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
99 this->swizzle = swizzle_for_size(type->vector_elements);
100 else
101 this->swizzle = SWIZZLE_XYZW;
102 this->negate = 0;
103 this->index2D = 0;
104 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
105 this->reladdr = NULL;
106 this->reladdr2 = NULL;
107 this->has_index2 = false;
108 }
109
110 st_src_reg(gl_register_file file, int index, int type)
111 {
112 this->type = type;
113 this->file = file;
114 this->index = index;
115 this->index2D = 0;
116 this->swizzle = SWIZZLE_XYZW;
117 this->negate = 0;
118 this->reladdr = NULL;
119 this->reladdr2 = NULL;
120 this->has_index2 = false;
121 }
122
123 st_src_reg(gl_register_file file, int index, int type, int index2D)
124 {
125 this->type = type;
126 this->file = file;
127 this->index = index;
128 this->index2D = index2D;
129 this->swizzle = SWIZZLE_XYZW;
130 this->negate = 0;
131 this->reladdr = NULL;
132 this->reladdr2 = NULL;
133 this->has_index2 = false;
134 }
135
136 st_src_reg()
137 {
138 this->type = GLSL_TYPE_ERROR;
139 this->file = PROGRAM_UNDEFINED;
140 this->index = 0;
141 this->index2D = 0;
142 this->swizzle = 0;
143 this->negate = 0;
144 this->reladdr = NULL;
145 this->reladdr2 = NULL;
146 this->has_index2 = false;
147 }
148
149 explicit st_src_reg(st_dst_reg reg);
150
151 gl_register_file file; /**< PROGRAM_* from Mesa */
152 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
153 int index2D;
154 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
155 int negate; /**< NEGATE_XYZW mask from mesa */
156 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
157 /** Register index should be offset by the integer in this reg. */
158 st_src_reg *reladdr;
159 st_src_reg *reladdr2;
160 bool has_index2;
161 };
162
163 class st_dst_reg {
164 public:
165 st_dst_reg(gl_register_file file, int writemask, int type, int index)
166 {
167 this->file = file;
168 this->index = index;
169 this->writemask = writemask;
170 this->cond_mask = COND_TR;
171 this->reladdr = NULL;
172 this->type = type;
173 }
174
175 st_dst_reg(gl_register_file file, int writemask, int type)
176 {
177 this->file = file;
178 this->index = 0;
179 this->writemask = writemask;
180 this->cond_mask = COND_TR;
181 this->reladdr = NULL;
182 this->type = type;
183 }
184
185 st_dst_reg()
186 {
187 this->type = GLSL_TYPE_ERROR;
188 this->file = PROGRAM_UNDEFINED;
189 this->index = 0;
190 this->writemask = 0;
191 this->cond_mask = COND_TR;
192 this->reladdr = NULL;
193 }
194
195 explicit st_dst_reg(st_src_reg reg);
196
197 gl_register_file file; /**< PROGRAM_* from Mesa */
198 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
199 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
200 GLuint cond_mask:4;
201 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
202 /** Register index should be offset by the integer in this reg. */
203 st_src_reg *reladdr;
204 };
205
206 st_src_reg::st_src_reg(st_dst_reg reg)
207 {
208 this->type = reg.type;
209 this->file = reg.file;
210 this->index = reg.index;
211 this->swizzle = SWIZZLE_XYZW;
212 this->negate = 0;
213 this->reladdr = reg.reladdr;
214 this->index2D = 0;
215 this->reladdr2 = NULL;
216 this->has_index2 = false;
217 }
218
219 st_dst_reg::st_dst_reg(st_src_reg reg)
220 {
221 this->type = reg.type;
222 this->file = reg.file;
223 this->index = reg.index;
224 this->writemask = WRITEMASK_XYZW;
225 this->cond_mask = COND_TR;
226 this->reladdr = reg.reladdr;
227 }
228
229 class glsl_to_tgsi_instruction : public exec_node {
230 public:
231 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
232
233 unsigned op;
234 st_dst_reg dst;
235 st_src_reg src[4];
236 /** Pointer to the ir source this tree came from for debugging */
237 ir_instruction *ir;
238 GLboolean cond_update;
239 bool saturate;
240 st_src_reg sampler; /**< sampler register */
241 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
242 int tex_target; /**< One of TEXTURE_*_INDEX */
243 GLboolean tex_shadow;
244
245 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
246 unsigned tex_offset_num_offset;
247 int dead_mask; /**< Used in dead code elimination */
248
249 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
250 };
251
252 class variable_storage : public exec_node {
253 public:
254 variable_storage(ir_variable *var, gl_register_file file, int index)
255 : file(file), index(index), var(var)
256 {
257 /* empty */
258 }
259
260 gl_register_file file;
261 int index;
262 ir_variable *var; /* variable that maps to this, if any */
263 };
264
265 class immediate_storage : public exec_node {
266 public:
267 immediate_storage(gl_constant_value *values, int size, int type)
268 {
269 memcpy(this->values, values, size * sizeof(gl_constant_value));
270 this->size = size;
271 this->type = type;
272 }
273
274 gl_constant_value values[4];
275 int size; /**< Number of components (1-4) */
276 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
277 };
278
279 class function_entry : public exec_node {
280 public:
281 ir_function_signature *sig;
282
283 /**
284 * identifier of this function signature used by the program.
285 *
286 * At the point that TGSI instructions for function calls are
287 * generated, we don't know the address of the first instruction of
288 * the function body. So we make the BranchTarget that is called a
289 * small integer and rewrite them during set_branchtargets().
290 */
291 int sig_id;
292
293 /**
294 * Pointer to first instruction of the function body.
295 *
296 * Set during function body emits after main() is processed.
297 */
298 glsl_to_tgsi_instruction *bgn_inst;
299
300 /**
301 * Index of the first instruction of the function body in actual TGSI.
302 *
303 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
304 */
305 int inst;
306
307 /** Storage for the return value. */
308 st_src_reg return_reg;
309 };
310
311 struct glsl_to_tgsi_visitor : public ir_visitor {
312 public:
313 glsl_to_tgsi_visitor();
314 ~glsl_to_tgsi_visitor();
315
316 function_entry *current_function;
317
318 struct gl_context *ctx;
319 struct gl_program *prog;
320 struct gl_shader_program *shader_program;
321 struct gl_shader *shader;
322 struct gl_shader_compiler_options *options;
323
324 int next_temp;
325
326 unsigned array_sizes[MAX_ARRAYS];
327 unsigned next_array;
328
329 int num_address_regs;
330 int samplers_used;
331 bool indirect_addr_consts;
332
333 int glsl_version;
334 bool native_integers;
335 bool have_sqrt;
336
337 variable_storage *find_variable_storage(ir_variable *var);
338
339 int add_constant(gl_register_file file, gl_constant_value values[4],
340 int size, int datatype, GLuint *swizzle_out);
341
342 function_entry *get_function_signature(ir_function_signature *sig);
343
344 st_src_reg get_temp(const glsl_type *type);
345 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
346
347 st_src_reg st_src_reg_for_float(float val);
348 st_src_reg st_src_reg_for_int(int val);
349 st_src_reg st_src_reg_for_type(int type, int val);
350
351 /**
352 * \name Visit methods
353 *
354 * As typical for the visitor pattern, there must be one \c visit method for
355 * each concrete subclass of \c ir_instruction. Virtual base classes within
356 * the hierarchy should not have \c visit methods.
357 */
358 /*@{*/
359 virtual void visit(ir_variable *);
360 virtual void visit(ir_loop *);
361 virtual void visit(ir_loop_jump *);
362 virtual void visit(ir_function_signature *);
363 virtual void visit(ir_function *);
364 virtual void visit(ir_expression *);
365 virtual void visit(ir_swizzle *);
366 virtual void visit(ir_dereference_variable *);
367 virtual void visit(ir_dereference_array *);
368 virtual void visit(ir_dereference_record *);
369 virtual void visit(ir_assignment *);
370 virtual void visit(ir_constant *);
371 virtual void visit(ir_call *);
372 virtual void visit(ir_return *);
373 virtual void visit(ir_discard *);
374 virtual void visit(ir_texture *);
375 virtual void visit(ir_if *);
376 virtual void visit(ir_emit_vertex *);
377 virtual void visit(ir_end_primitive *);
378 /*@}*/
379
380 st_src_reg result;
381
382 /** List of variable_storage */
383 exec_list variables;
384
385 /** List of immediate_storage */
386 exec_list immediates;
387 unsigned num_immediates;
388
389 /** List of function_entry */
390 exec_list function_signatures;
391 int next_signature_id;
392
393 /** List of glsl_to_tgsi_instruction */
394 exec_list instructions;
395
396 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
397
398 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
399 st_dst_reg dst, st_src_reg src0);
400
401 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
402 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
405 st_dst_reg dst,
406 st_src_reg src0, st_src_reg src1, st_src_reg src2);
407
408 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
409 st_dst_reg dst,
410 st_src_reg src0, st_src_reg src1,
411 st_src_reg src2, st_src_reg src3);
412
413 unsigned get_opcode(ir_instruction *ir, unsigned op,
414 st_dst_reg dst,
415 st_src_reg src0, st_src_reg src1);
416
417 /**
418 * Emit the correct dot-product instruction for the type of arguments
419 */
420 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
421 st_dst_reg dst,
422 st_src_reg src0,
423 st_src_reg src1,
424 unsigned elements);
425
426 void emit_scalar(ir_instruction *ir, unsigned op,
427 st_dst_reg dst, st_src_reg src0);
428
429 void emit_scalar(ir_instruction *ir, unsigned op,
430 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
431
432 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
433
434 void emit_scs(ir_instruction *ir, unsigned op,
435 st_dst_reg dst, const st_src_reg &src);
436
437 bool try_emit_mad(ir_expression *ir,
438 int mul_operand);
439 bool try_emit_mad_for_and_not(ir_expression *ir,
440 int mul_operand);
441
442 void emit_swz(ir_expression *ir);
443
444 bool process_move_condition(ir_rvalue *ir);
445
446 void simplify_cmp(void);
447
448 void rename_temp_register(int index, int new_index);
449 int get_first_temp_read(int index);
450 int get_first_temp_write(int index);
451 int get_last_temp_read(int index);
452 int get_last_temp_write(int index);
453
454 void copy_propagate(void);
455 int eliminate_dead_code(void);
456 void merge_registers(void);
457 void renumber_registers(void);
458
459 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
460 st_dst_reg *l, st_src_reg *r);
461
462 void *mem_ctx;
463 };
464
465 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
466
467 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
468
469 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
470 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
471 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
472
473 static void
474 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
475
476 static void
477 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
478 {
479 va_list args;
480 va_start(args, fmt);
481 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
482 va_end(args);
483
484 prog->LinkStatus = GL_FALSE;
485 }
486
487 static int
488 swizzle_for_size(int size)
489 {
490 int size_swizzles[4] = {
491 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
492 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
495 };
496
497 assert((size >= 1) && (size <= 4));
498 return size_swizzles[size - 1];
499 }
500
501 static bool
502 is_tex_instruction(unsigned opcode)
503 {
504 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
505 return info->is_tex;
506 }
507
508 static unsigned
509 num_inst_dst_regs(unsigned opcode)
510 {
511 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
512 return info->num_dst;
513 }
514
515 static unsigned
516 num_inst_src_regs(unsigned opcode)
517 {
518 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
519 return info->is_tex ? info->num_src - 1 : info->num_src;
520 }
521
522 glsl_to_tgsi_instruction *
523 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
524 st_dst_reg dst,
525 st_src_reg src0, st_src_reg src1,
526 st_src_reg src2, st_src_reg src3)
527 {
528 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
529 int num_reladdr = 0, i;
530
531 op = get_opcode(ir, op, dst, src0, src1);
532
533 /* If we have to do relative addressing, we want to load the ARL
534 * reg directly for one of the regs, and preload the other reladdr
535 * sources into temps.
536 */
537 num_reladdr += dst.reladdr != NULL;
538 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
539 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
540 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
541 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
542
543 reladdr_to_temp(ir, &src3, &num_reladdr);
544 reladdr_to_temp(ir, &src2, &num_reladdr);
545 reladdr_to_temp(ir, &src1, &num_reladdr);
546 reladdr_to_temp(ir, &src0, &num_reladdr);
547
548 if (dst.reladdr) {
549 emit_arl(ir, address_reg, *dst.reladdr);
550 num_reladdr--;
551 }
552 assert(num_reladdr == 0);
553
554 inst->op = op;
555 inst->dst = dst;
556 inst->src[0] = src0;
557 inst->src[1] = src1;
558 inst->src[2] = src2;
559 inst->src[3] = src3;
560 inst->ir = ir;
561 inst->dead_mask = 0;
562
563 inst->function = NULL;
564
565 /* Update indirect addressing status used by TGSI */
566 if (dst.reladdr) {
567 switch(dst.file) {
568 case PROGRAM_STATE_VAR:
569 case PROGRAM_CONSTANT:
570 case PROGRAM_UNIFORM:
571 this->indirect_addr_consts = true;
572 break;
573 case PROGRAM_IMMEDIATE:
574 assert(!"immediates should not have indirect addressing");
575 break;
576 default:
577 break;
578 }
579 }
580 else {
581 for (i=0; i<4; i++) {
582 if(inst->src[i].reladdr) {
583 switch(inst->src[i].file) {
584 case PROGRAM_STATE_VAR:
585 case PROGRAM_CONSTANT:
586 case PROGRAM_UNIFORM:
587 this->indirect_addr_consts = true;
588 break;
589 case PROGRAM_IMMEDIATE:
590 assert(!"immediates should not have indirect addressing");
591 break;
592 default:
593 break;
594 }
595 }
596 }
597 }
598
599 this->instructions.push_tail(inst);
600
601 return inst;
602 }
603
604 glsl_to_tgsi_instruction *
605 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
606 st_dst_reg dst, st_src_reg src0,
607 st_src_reg src1, st_src_reg src2)
608 {
609 return emit(ir, op, dst, src0, src1, src2, undef_src);
610 }
611
612 glsl_to_tgsi_instruction *
613 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
614 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
615 {
616 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
617 }
618
619 glsl_to_tgsi_instruction *
620 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
621 st_dst_reg dst, st_src_reg src0)
622 {
623 assert(dst.writemask != 0);
624 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
625 }
626
627 glsl_to_tgsi_instruction *
628 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
629 {
630 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
631 }
632
633 /**
634 * Determines whether to use an integer, unsigned integer, or float opcode
635 * based on the operands and input opcode, then emits the result.
636 */
637 unsigned
638 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
639 st_dst_reg dst,
640 st_src_reg src0, st_src_reg src1)
641 {
642 int type = GLSL_TYPE_FLOAT;
643
644 if (op == TGSI_OPCODE_MOV)
645 return op;
646
647 assert(src0.type != GLSL_TYPE_ARRAY);
648 assert(src0.type != GLSL_TYPE_STRUCT);
649 assert(src1.type != GLSL_TYPE_ARRAY);
650 assert(src1.type != GLSL_TYPE_STRUCT);
651
652 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
653 type = GLSL_TYPE_FLOAT;
654 else if (native_integers)
655 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
656
657 #define case4(c, f, i, u) \
658 case TGSI_OPCODE_##c: \
659 if (type == GLSL_TYPE_INT) \
660 op = TGSI_OPCODE_##i; \
661 else if (type == GLSL_TYPE_UINT) \
662 op = TGSI_OPCODE_##u; \
663 else \
664 op = TGSI_OPCODE_##f; \
665 break;
666
667 #define case3(f, i, u) case4(f, f, i, u)
668 #define case2fi(f, i) case4(f, f, i, i)
669 #define case2iu(i, u) case4(i, LAST, i, u)
670
671 #define casecomp(c, f, i, u) \
672 case TGSI_OPCODE_##c: \
673 if (type == GLSL_TYPE_INT) \
674 op = TGSI_OPCODE_##i; \
675 else if (type == GLSL_TYPE_UINT) \
676 op = TGSI_OPCODE_##u; \
677 else if (native_integers) \
678 op = TGSI_OPCODE_##f; \
679 else \
680 op = TGSI_OPCODE_##c; \
681 break;
682
683 switch(op) {
684 case2fi(ADD, UADD);
685 case2fi(MUL, UMUL);
686 case2fi(MAD, UMAD);
687 case3(DIV, IDIV, UDIV);
688 case3(MAX, IMAX, UMAX);
689 case3(MIN, IMIN, UMIN);
690 case2iu(MOD, UMOD);
691
692 casecomp(SEQ, FSEQ, USEQ, USEQ);
693 casecomp(SNE, FSNE, USNE, USNE);
694 casecomp(SGE, FSGE, ISGE, USGE);
695 casecomp(SLT, FSLT, ISLT, USLT);
696
697 case2iu(ISHR, USHR);
698
699 case2fi(SSG, ISSG);
700 case3(ABS, IABS, IABS);
701
702 case2iu(IBFE, UBFE);
703 case2iu(IMSB, UMSB);
704 case2iu(IMUL_HI, UMUL_HI);
705 default: break;
706 }
707
708 assert(op != TGSI_OPCODE_LAST);
709 return op;
710 }
711
712 glsl_to_tgsi_instruction *
713 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
714 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
715 unsigned elements)
716 {
717 static const unsigned dot_opcodes[] = {
718 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
719 };
720
721 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
722 }
723
724 /**
725 * Emits TGSI scalar opcodes to produce unique answers across channels.
726 *
727 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
728 * channel determines the result across all channels. So to do a vec4
729 * of this operation, we want to emit a scalar per source channel used
730 * to produce dest channels.
731 */
732 void
733 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
734 st_dst_reg dst,
735 st_src_reg orig_src0, st_src_reg orig_src1)
736 {
737 int i, j;
738 int done_mask = ~dst.writemask;
739
740 /* TGSI RCP is a scalar operation splatting results to all channels,
741 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
742 * dst channels.
743 */
744 for (i = 0; i < 4; i++) {
745 GLuint this_mask = (1 << i);
746 glsl_to_tgsi_instruction *inst;
747 st_src_reg src0 = orig_src0;
748 st_src_reg src1 = orig_src1;
749
750 if (done_mask & this_mask)
751 continue;
752
753 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
754 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
755 for (j = i + 1; j < 4; j++) {
756 /* If there is another enabled component in the destination that is
757 * derived from the same inputs, generate its value on this pass as
758 * well.
759 */
760 if (!(done_mask & (1 << j)) &&
761 GET_SWZ(src0.swizzle, j) == src0_swiz &&
762 GET_SWZ(src1.swizzle, j) == src1_swiz) {
763 this_mask |= (1 << j);
764 }
765 }
766 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
767 src0_swiz, src0_swiz);
768 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
769 src1_swiz, src1_swiz);
770
771 inst = emit(ir, op, dst, src0, src1);
772 inst->dst.writemask = this_mask;
773 done_mask |= this_mask;
774 }
775 }
776
777 void
778 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
779 st_dst_reg dst, st_src_reg src0)
780 {
781 st_src_reg undef = undef_src;
782
783 undef.swizzle = SWIZZLE_XXXX;
784
785 emit_scalar(ir, op, dst, src0, undef);
786 }
787
788 void
789 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
790 st_dst_reg dst, st_src_reg src0)
791 {
792 int op = TGSI_OPCODE_ARL;
793
794 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
795 op = TGSI_OPCODE_UARL;
796
797 assert(dst.file == PROGRAM_ADDRESS);
798 if (dst.index >= this->num_address_regs)
799 this->num_address_regs = dst.index + 1;
800
801 emit(NULL, op, dst, src0);
802 }
803
804 /**
805 * Emit an TGSI_OPCODE_SCS instruction
806 *
807 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
808 * Instead of splatting its result across all four components of the
809 * destination, it writes one value to the \c x component and another value to
810 * the \c y component.
811 *
812 * \param ir IR instruction being processed
813 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
814 * on which value is desired.
815 * \param dst Destination register
816 * \param src Source register
817 */
818 void
819 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
820 st_dst_reg dst,
821 const st_src_reg &src)
822 {
823 /* Vertex programs cannot use the SCS opcode.
824 */
825 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
826 emit_scalar(ir, op, dst, src);
827 return;
828 }
829
830 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
831 const unsigned scs_mask = (1U << component);
832 int done_mask = ~dst.writemask;
833 st_src_reg tmp;
834
835 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
836
837 /* If there are compnents in the destination that differ from the component
838 * that will be written by the SCS instrution, we'll need a temporary.
839 */
840 if (scs_mask != unsigned(dst.writemask)) {
841 tmp = get_temp(glsl_type::vec4_type);
842 }
843
844 for (unsigned i = 0; i < 4; i++) {
845 unsigned this_mask = (1U << i);
846 st_src_reg src0 = src;
847
848 if ((done_mask & this_mask) != 0)
849 continue;
850
851 /* The source swizzle specified which component of the source generates
852 * sine / cosine for the current component in the destination. The SCS
853 * instruction requires that this value be swizzle to the X component.
854 * Replace the current swizzle with a swizzle that puts the source in
855 * the X component.
856 */
857 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
858
859 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
860 src0_swiz, src0_swiz);
861 for (unsigned j = i + 1; j < 4; j++) {
862 /* If there is another enabled component in the destination that is
863 * derived from the same inputs, generate its value on this pass as
864 * well.
865 */
866 if (!(done_mask & (1 << j)) &&
867 GET_SWZ(src0.swizzle, j) == src0_swiz) {
868 this_mask |= (1 << j);
869 }
870 }
871
872 if (this_mask != scs_mask) {
873 glsl_to_tgsi_instruction *inst;
874 st_dst_reg tmp_dst = st_dst_reg(tmp);
875
876 /* Emit the SCS instruction.
877 */
878 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
879 inst->dst.writemask = scs_mask;
880
881 /* Move the result of the SCS instruction to the desired location in
882 * the destination.
883 */
884 tmp.swizzle = MAKE_SWIZZLE4(component, component,
885 component, component);
886 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
887 inst->dst.writemask = this_mask;
888 } else {
889 /* Emit the SCS instruction to write directly to the destination.
890 */
891 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
892 inst->dst.writemask = scs_mask;
893 }
894
895 done_mask |= this_mask;
896 }
897 }
898
899 int
900 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
901 gl_constant_value values[4], int size, int datatype,
902 GLuint *swizzle_out)
903 {
904 if (file == PROGRAM_CONSTANT) {
905 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
906 size, datatype, swizzle_out);
907 } else {
908 int index = 0;
909 immediate_storage *entry;
910 assert(file == PROGRAM_IMMEDIATE);
911
912 /* Search immediate storage to see if we already have an identical
913 * immediate that we can use instead of adding a duplicate entry.
914 */
915 foreach_in_list(immediate_storage, entry, &this->immediates) {
916 if (entry->size == size &&
917 entry->type == datatype &&
918 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
919 return index;
920 }
921 index++;
922 }
923
924 /* Add this immediate to the list. */
925 entry = new(mem_ctx) immediate_storage(values, size, datatype);
926 this->immediates.push_tail(entry);
927 this->num_immediates++;
928 return index;
929 }
930 }
931
932 st_src_reg
933 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
934 {
935 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
936 union gl_constant_value uval;
937
938 uval.f = val;
939 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
940
941 return src;
942 }
943
944 st_src_reg
945 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
946 {
947 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
948 union gl_constant_value uval;
949
950 assert(native_integers);
951
952 uval.i = val;
953 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
954
955 return src;
956 }
957
958 st_src_reg
959 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
960 {
961 if (native_integers)
962 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
963 st_src_reg_for_int(val);
964 else
965 return st_src_reg_for_float(val);
966 }
967
968 static int
969 type_size(const struct glsl_type *type)
970 {
971 unsigned int i;
972 int size;
973
974 switch (type->base_type) {
975 case GLSL_TYPE_UINT:
976 case GLSL_TYPE_INT:
977 case GLSL_TYPE_FLOAT:
978 case GLSL_TYPE_BOOL:
979 if (type->is_matrix()) {
980 return type->matrix_columns;
981 } else {
982 /* Regardless of size of vector, it gets a vec4. This is bad
983 * packing for things like floats, but otherwise arrays become a
984 * mess. Hopefully a later pass over the code can pack scalars
985 * down if appropriate.
986 */
987 return 1;
988 }
989 case GLSL_TYPE_ARRAY:
990 assert(type->length > 0);
991 return type_size(type->fields.array) * type->length;
992 case GLSL_TYPE_STRUCT:
993 size = 0;
994 for (i = 0; i < type->length; i++) {
995 size += type_size(type->fields.structure[i].type);
996 }
997 return size;
998 case GLSL_TYPE_SAMPLER:
999 case GLSL_TYPE_IMAGE:
1000 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1001 * at link time.
1002 */
1003 return 1;
1004 case GLSL_TYPE_ATOMIC_UINT:
1005 case GLSL_TYPE_INTERFACE:
1006 case GLSL_TYPE_VOID:
1007 case GLSL_TYPE_ERROR:
1008 assert(!"Invalid type in type_size");
1009 break;
1010 }
1011 return 0;
1012 }
1013
1014 /**
1015 * In the initial pass of codegen, we assign temporary numbers to
1016 * intermediate results. (not SSA -- variable assignments will reuse
1017 * storage).
1018 */
1019 st_src_reg
1020 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1021 {
1022 st_src_reg src;
1023
1024 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1025 src.reladdr = NULL;
1026 src.negate = 0;
1027
1028 if (!options->EmitNoIndirectTemp &&
1029 (type->is_array() || type->is_matrix())) {
1030
1031 src.file = PROGRAM_ARRAY;
1032 src.index = next_array << 16 | 0x8000;
1033 array_sizes[next_array] = type_size(type);
1034 ++next_array;
1035
1036 } else {
1037 src.file = PROGRAM_TEMPORARY;
1038 src.index = next_temp;
1039 next_temp += type_size(type);
1040 }
1041
1042 if (type->is_array() || type->is_record()) {
1043 src.swizzle = SWIZZLE_NOOP;
1044 } else {
1045 src.swizzle = swizzle_for_size(type->vector_elements);
1046 }
1047
1048 return src;
1049 }
1050
1051 variable_storage *
1052 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1053 {
1054
1055 foreach_in_list(variable_storage, entry, &this->variables) {
1056 if (entry->var == var)
1057 return entry;
1058 }
1059
1060 return NULL;
1061 }
1062
1063 void
1064 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1065 {
1066 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1067 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1068
1069 fp->OriginUpperLeft = ir->data.origin_upper_left;
1070 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1071 }
1072
1073 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1074 unsigned int i;
1075 const ir_state_slot *const slots = ir->get_state_slots();
1076 assert(slots != NULL);
1077
1078 /* Check if this statevar's setup in the STATE file exactly
1079 * matches how we'll want to reference it as a
1080 * struct/array/whatever. If not, then we need to move it into
1081 * temporary storage and hope that it'll get copy-propagated
1082 * out.
1083 */
1084 for (i = 0; i < ir->get_num_state_slots(); i++) {
1085 if (slots[i].swizzle != SWIZZLE_XYZW) {
1086 break;
1087 }
1088 }
1089
1090 variable_storage *storage;
1091 st_dst_reg dst;
1092 if (i == ir->get_num_state_slots()) {
1093 /* We'll set the index later. */
1094 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1095 this->variables.push_tail(storage);
1096
1097 dst = undef_dst;
1098 } else {
1099 /* The variable_storage constructor allocates slots based on the size
1100 * of the type. However, this had better match the number of state
1101 * elements that we're going to copy into the new temporary.
1102 */
1103 assert((int) ir->get_num_state_slots() == type_size(ir->type));
1104
1105 dst = st_dst_reg(get_temp(ir->type));
1106
1107 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1108
1109 this->variables.push_tail(storage);
1110 }
1111
1112
1113 for (unsigned int i = 0; i < ir->get_num_state_slots(); i++) {
1114 int index = _mesa_add_state_reference(this->prog->Parameters,
1115 (gl_state_index *)slots[i].tokens);
1116
1117 if (storage->file == PROGRAM_STATE_VAR) {
1118 if (storage->index == -1) {
1119 storage->index = index;
1120 } else {
1121 assert(index == storage->index + (int)i);
1122 }
1123 } else {
1124 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1125 * the data being moved since MOV does not care about the type of
1126 * data it is moving, and we don't want to declare registers with
1127 * array or struct types.
1128 */
1129 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1130 src.swizzle = slots[i].swizzle;
1131 emit(ir, TGSI_OPCODE_MOV, dst, src);
1132 /* even a float takes up a whole vec4 reg in a struct/array. */
1133 dst.index++;
1134 }
1135 }
1136
1137 if (storage->file == PROGRAM_TEMPORARY &&
1138 dst.index != storage->index + (int) ir->get_num_state_slots()) {
1139 fail_link(this->shader_program,
1140 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1141 ir->name, dst.index - storage->index,
1142 type_size(ir->type));
1143 }
1144 }
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1149 {
1150 emit(NULL, TGSI_OPCODE_BGNLOOP);
1151
1152 visit_exec_list(&ir->body_instructions, this);
1153
1154 emit(NULL, TGSI_OPCODE_ENDLOOP);
1155 }
1156
1157 void
1158 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1159 {
1160 switch (ir->mode) {
1161 case ir_loop_jump::jump_break:
1162 emit(NULL, TGSI_OPCODE_BRK);
1163 break;
1164 case ir_loop_jump::jump_continue:
1165 emit(NULL, TGSI_OPCODE_CONT);
1166 break;
1167 }
1168 }
1169
1170
1171 void
1172 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1173 {
1174 assert(0);
1175 (void)ir;
1176 }
1177
1178 void
1179 glsl_to_tgsi_visitor::visit(ir_function *ir)
1180 {
1181 /* Ignore function bodies other than main() -- we shouldn't see calls to
1182 * them since they should all be inlined before we get to glsl_to_tgsi.
1183 */
1184 if (strcmp(ir->name, "main") == 0) {
1185 const ir_function_signature *sig;
1186 exec_list empty;
1187
1188 sig = ir->matching_signature(NULL, &empty, false);
1189
1190 assert(sig);
1191
1192 foreach_in_list(ir_instruction, ir, &sig->body) {
1193 ir->accept(this);
1194 }
1195 }
1196 }
1197
1198 bool
1199 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1200 {
1201 int nonmul_operand = 1 - mul_operand;
1202 st_src_reg a, b, c;
1203 st_dst_reg result_dst;
1204
1205 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1206 if (!expr || expr->operation != ir_binop_mul)
1207 return false;
1208
1209 expr->operands[0]->accept(this);
1210 a = this->result;
1211 expr->operands[1]->accept(this);
1212 b = this->result;
1213 ir->operands[nonmul_operand]->accept(this);
1214 c = this->result;
1215
1216 this->result = get_temp(ir->type);
1217 result_dst = st_dst_reg(this->result);
1218 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1219 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1220
1221 return true;
1222 }
1223
1224 /**
1225 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1226 *
1227 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1228 * implemented using multiplication, and logical-or is implemented using
1229 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1230 * As result, the logical expression (a & !b) can be rewritten as:
1231 *
1232 * - a * !b
1233 * - a * (1 - b)
1234 * - (a * 1) - (a * b)
1235 * - a + -(a * b)
1236 * - a + (a * -b)
1237 *
1238 * This final expression can be implemented as a single MAD(a, -b, a)
1239 * instruction.
1240 */
1241 bool
1242 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1243 {
1244 const int other_operand = 1 - try_operand;
1245 st_src_reg a, b;
1246
1247 ir_expression *expr = ir->operands[try_operand]->as_expression();
1248 if (!expr || expr->operation != ir_unop_logic_not)
1249 return false;
1250
1251 ir->operands[other_operand]->accept(this);
1252 a = this->result;
1253 expr->operands[0]->accept(this);
1254 b = this->result;
1255
1256 b.negate = ~b.negate;
1257
1258 this->result = get_temp(ir->type);
1259 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1260
1261 return true;
1262 }
1263
1264 void
1265 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1266 st_src_reg *reg, int *num_reladdr)
1267 {
1268 if (!reg->reladdr && !reg->reladdr2)
1269 return;
1270
1271 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1272 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1273
1274 if (*num_reladdr != 1) {
1275 st_src_reg temp = get_temp(glsl_type::vec4_type);
1276
1277 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1278 *reg = temp;
1279 }
1280
1281 (*num_reladdr)--;
1282 }
1283
1284 void
1285 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1286 {
1287 unsigned int operand;
1288 st_src_reg op[Elements(ir->operands)];
1289 st_src_reg result_src;
1290 st_dst_reg result_dst;
1291
1292 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1293 */
1294 if (ir->operation == ir_binop_add) {
1295 if (try_emit_mad(ir, 1))
1296 return;
1297 if (try_emit_mad(ir, 0))
1298 return;
1299 }
1300
1301 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1302 */
1303 if (!native_integers && ir->operation == ir_binop_logic_and) {
1304 if (try_emit_mad_for_and_not(ir, 1))
1305 return;
1306 if (try_emit_mad_for_and_not(ir, 0))
1307 return;
1308 }
1309
1310 if (ir->operation == ir_quadop_vector)
1311 assert(!"ir_quadop_vector should have been lowered");
1312
1313 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1314 this->result.file = PROGRAM_UNDEFINED;
1315 ir->operands[operand]->accept(this);
1316 if (this->result.file == PROGRAM_UNDEFINED) {
1317 printf("Failed to get tree for expression operand:\n");
1318 ir->operands[operand]->print();
1319 printf("\n");
1320 exit(1);
1321 }
1322 op[operand] = this->result;
1323
1324 /* Matrix expression operands should have been broken down to vector
1325 * operations already.
1326 */
1327 assert(!ir->operands[operand]->type->is_matrix());
1328 }
1329
1330 int vector_elements = ir->operands[0]->type->vector_elements;
1331 if (ir->operands[1]) {
1332 vector_elements = MAX2(vector_elements,
1333 ir->operands[1]->type->vector_elements);
1334 }
1335
1336 this->result.file = PROGRAM_UNDEFINED;
1337
1338 /* Storage for our result. Ideally for an assignment we'd be using
1339 * the actual storage for the result here, instead.
1340 */
1341 result_src = get_temp(ir->type);
1342 /* convenience for the emit functions below. */
1343 result_dst = st_dst_reg(result_src);
1344 /* Limit writes to the channels that will be used by result_src later.
1345 * This does limit this temp's use as a temporary for multi-instruction
1346 * sequences.
1347 */
1348 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1349
1350 switch (ir->operation) {
1351 case ir_unop_logic_not:
1352 if (result_dst.type != GLSL_TYPE_FLOAT)
1353 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1354 else {
1355 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1356 * older GPUs implement SEQ using multiple instructions (i915 uses two
1357 * SGE instructions and a MUL instruction). Since our logic values are
1358 * 0.0 and 1.0, 1-x also implements !x.
1359 */
1360 op[0].negate = ~op[0].negate;
1361 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1362 }
1363 break;
1364 case ir_unop_neg:
1365 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1366 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1367 else {
1368 op[0].negate = ~op[0].negate;
1369 result_src = op[0];
1370 }
1371 break;
1372 case ir_unop_abs:
1373 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1374 break;
1375 case ir_unop_sign:
1376 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1377 break;
1378 case ir_unop_rcp:
1379 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1380 break;
1381
1382 case ir_unop_exp2:
1383 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1384 break;
1385 case ir_unop_exp:
1386 case ir_unop_log:
1387 assert(!"not reached: should be handled by ir_explog_to_explog2");
1388 break;
1389 case ir_unop_log2:
1390 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1391 break;
1392 case ir_unop_sin:
1393 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1394 break;
1395 case ir_unop_cos:
1396 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1397 break;
1398 case ir_unop_sin_reduced:
1399 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1400 break;
1401 case ir_unop_cos_reduced:
1402 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1403 break;
1404 case ir_unop_saturate: {
1405 glsl_to_tgsi_instruction *inst;
1406 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
1407 inst->saturate = true;
1408 break;
1409 }
1410
1411 case ir_unop_dFdx:
1412 case ir_unop_dFdx_coarse:
1413 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1414 break;
1415 case ir_unop_dFdx_fine:
1416 emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]);
1417 break;
1418 case ir_unop_dFdy:
1419 case ir_unop_dFdy_coarse:
1420 case ir_unop_dFdy_fine:
1421 {
1422 /* The X component contains 1 or -1 depending on whether the framebuffer
1423 * is a FBO or the window system buffer, respectively.
1424 * It is then multiplied with the source operand of DDY.
1425 */
1426 static const gl_state_index transform_y_state[STATE_LENGTH]
1427 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1428
1429 unsigned transform_y_index =
1430 _mesa_add_state_reference(this->prog->Parameters,
1431 transform_y_state);
1432
1433 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1434 transform_y_index,
1435 glsl_type::vec4_type);
1436 transform_y.swizzle = SWIZZLE_XXXX;
1437
1438 st_src_reg temp = get_temp(glsl_type::vec4_type);
1439
1440 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1441 emit(ir, ir->operation == ir_unop_dFdy_fine ?
1442 TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp);
1443 break;
1444 }
1445
1446 case ir_unop_noise: {
1447 /* At some point, a motivated person could add a better
1448 * implementation of noise. Currently not even the nvidia
1449 * binary drivers do anything more than this. In any case, the
1450 * place to do this is in the GL state tracker, not the poor
1451 * driver.
1452 */
1453 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1454 break;
1455 }
1456
1457 case ir_binop_add:
1458 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1459 break;
1460 case ir_binop_sub:
1461 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1462 break;
1463
1464 case ir_binop_mul:
1465 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1466 break;
1467 case ir_binop_div:
1468 if (result_dst.type == GLSL_TYPE_FLOAT)
1469 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1470 else
1471 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1472 break;
1473 case ir_binop_mod:
1474 if (result_dst.type == GLSL_TYPE_FLOAT)
1475 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1476 else
1477 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1478 break;
1479
1480 case ir_binop_less:
1481 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1482 break;
1483 case ir_binop_greater:
1484 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1485 break;
1486 case ir_binop_lequal:
1487 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1488 break;
1489 case ir_binop_gequal:
1490 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1491 break;
1492 case ir_binop_equal:
1493 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1494 break;
1495 case ir_binop_nequal:
1496 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1497 break;
1498 case ir_binop_all_equal:
1499 /* "==" operator producing a scalar boolean. */
1500 if (ir->operands[0]->type->is_vector() ||
1501 ir->operands[1]->type->is_vector()) {
1502 st_src_reg temp = get_temp(native_integers ?
1503 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1504 glsl_type::vec4_type);
1505
1506 if (native_integers) {
1507 st_dst_reg temp_dst = st_dst_reg(temp);
1508 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1509
1510 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1511
1512 /* Emit 1-3 AND operations to combine the SEQ results. */
1513 switch (ir->operands[0]->type->vector_elements) {
1514 case 2:
1515 break;
1516 case 3:
1517 temp_dst.writemask = WRITEMASK_Y;
1518 temp1.swizzle = SWIZZLE_YYYY;
1519 temp2.swizzle = SWIZZLE_ZZZZ;
1520 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1521 break;
1522 case 4:
1523 temp_dst.writemask = WRITEMASK_X;
1524 temp1.swizzle = SWIZZLE_XXXX;
1525 temp2.swizzle = SWIZZLE_YYYY;
1526 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1527 temp_dst.writemask = WRITEMASK_Y;
1528 temp1.swizzle = SWIZZLE_ZZZZ;
1529 temp2.swizzle = SWIZZLE_WWWW;
1530 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1531 }
1532
1533 temp1.swizzle = SWIZZLE_XXXX;
1534 temp2.swizzle = SWIZZLE_YYYY;
1535 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1536 } else {
1537 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1538
1539 /* After the dot-product, the value will be an integer on the
1540 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1541 */
1542 emit_dp(ir, result_dst, temp, temp, vector_elements);
1543
1544 /* Negating the result of the dot-product gives values on the range
1545 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1546 * This is achieved using SGE.
1547 */
1548 st_src_reg sge_src = result_src;
1549 sge_src.negate = ~sge_src.negate;
1550 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1551 }
1552 } else {
1553 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1554 }
1555 break;
1556 case ir_binop_any_nequal:
1557 /* "!=" operator producing a scalar boolean. */
1558 if (ir->operands[0]->type->is_vector() ||
1559 ir->operands[1]->type->is_vector()) {
1560 st_src_reg temp = get_temp(native_integers ?
1561 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1562 glsl_type::vec4_type);
1563 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1564
1565 if (native_integers) {
1566 st_dst_reg temp_dst = st_dst_reg(temp);
1567 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1568
1569 /* Emit 1-3 OR operations to combine the SNE results. */
1570 switch (ir->operands[0]->type->vector_elements) {
1571 case 2:
1572 break;
1573 case 3:
1574 temp_dst.writemask = WRITEMASK_Y;
1575 temp1.swizzle = SWIZZLE_YYYY;
1576 temp2.swizzle = SWIZZLE_ZZZZ;
1577 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1578 break;
1579 case 4:
1580 temp_dst.writemask = WRITEMASK_X;
1581 temp1.swizzle = SWIZZLE_XXXX;
1582 temp2.swizzle = SWIZZLE_YYYY;
1583 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1584 temp_dst.writemask = WRITEMASK_Y;
1585 temp1.swizzle = SWIZZLE_ZZZZ;
1586 temp2.swizzle = SWIZZLE_WWWW;
1587 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1588 }
1589
1590 temp1.swizzle = SWIZZLE_XXXX;
1591 temp2.swizzle = SWIZZLE_YYYY;
1592 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1593 } else {
1594 /* After the dot-product, the value will be an integer on the
1595 * range [0,4]. Zero stays zero, and positive values become 1.0.
1596 */
1597 glsl_to_tgsi_instruction *const dp =
1598 emit_dp(ir, result_dst, temp, temp, vector_elements);
1599 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1600 /* The clamping to [0,1] can be done for free in the fragment
1601 * shader with a saturate.
1602 */
1603 dp->saturate = true;
1604 } else {
1605 /* Negating the result of the dot-product gives values on the range
1606 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1607 * achieved using SLT.
1608 */
1609 st_src_reg slt_src = result_src;
1610 slt_src.negate = ~slt_src.negate;
1611 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1612 }
1613 }
1614 } else {
1615 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1616 }
1617 break;
1618
1619 case ir_unop_any: {
1620 assert(ir->operands[0]->type->is_vector());
1621
1622 if (native_integers) {
1623 int dst_swizzle = 0, op0_swizzle, i;
1624 st_src_reg accum = op[0];
1625
1626 op0_swizzle = op[0].swizzle;
1627 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1628 GET_SWZ(op0_swizzle, 0),
1629 GET_SWZ(op0_swizzle, 0),
1630 GET_SWZ(op0_swizzle, 0));
1631 for (i = 0; i < 4; i++) {
1632 if (result_dst.writemask & (1 << i)) {
1633 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1634 break;
1635 }
1636 }
1637 assert(i != 4);
1638 assert(ir->operands[0]->type->is_boolean());
1639
1640 /* OR all the components together, since they should be either 0 or ~0
1641 */
1642 switch (ir->operands[0]->type->vector_elements) {
1643 case 4:
1644 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1645 GET_SWZ(op0_swizzle, 3),
1646 GET_SWZ(op0_swizzle, 3),
1647 GET_SWZ(op0_swizzle, 3));
1648 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1649 accum = st_src_reg(result_dst);
1650 accum.swizzle = dst_swizzle;
1651 /* fallthrough */
1652 case 3:
1653 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1654 GET_SWZ(op0_swizzle, 2),
1655 GET_SWZ(op0_swizzle, 2),
1656 GET_SWZ(op0_swizzle, 2));
1657 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1658 accum = st_src_reg(result_dst);
1659 accum.swizzle = dst_swizzle;
1660 /* fallthrough */
1661 case 2:
1662 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1663 GET_SWZ(op0_swizzle, 1),
1664 GET_SWZ(op0_swizzle, 1),
1665 GET_SWZ(op0_swizzle, 1));
1666 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1667 break;
1668 default:
1669 assert(!"Unexpected vector size");
1670 break;
1671 }
1672 } else {
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1675 */
1676 glsl_to_tgsi_instruction *const dp =
1677 emit_dp(ir, result_dst, op[0], op[0],
1678 ir->operands[0]->type->vector_elements);
1679 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1680 result_dst.type == GLSL_TYPE_FLOAT) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1683 */
1684 dp->saturate = true;
1685 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1689 */
1690 st_src_reg slt_src = result_src;
1691 slt_src.negate = ~slt_src.negate;
1692 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1693 }
1694 else {
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1697 }
1698 }
1699 break;
1700 }
1701
1702 case ir_binop_logic_xor:
1703 if (native_integers)
1704 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1705 else
1706 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1707 break;
1708
1709 case ir_binop_logic_or: {
1710 if (native_integers) {
1711 /* If integers are used as booleans, we can use an actual "or"
1712 * instruction.
1713 */
1714 assert(native_integers);
1715 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1716 } else {
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1719 */
1720 glsl_to_tgsi_instruction *add =
1721 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1722 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1725 */
1726 add->saturate = true;
1727 } else {
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1731 */
1732 st_src_reg slt_src = result_src;
1733 slt_src.negate = ~slt_src.negate;
1734 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1735 }
1736 }
1737 break;
1738 }
1739
1740 case ir_binop_logic_and:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1744 */
1745 if (native_integers)
1746 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1747 else
1748 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1749 break;
1750
1751 case ir_binop_dot:
1752 assert(ir->operands[0]->type->is_vector());
1753 assert(ir->operands[0]->type == ir->operands[1]->type);
1754 emit_dp(ir, result_dst, op[0], op[1],
1755 ir->operands[0]->type->vector_elements);
1756 break;
1757
1758 case ir_unop_sqrt:
1759 if (have_sqrt) {
1760 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1761 }
1762 else {
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1765 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op[0].negate = ~op[0].negate;
1768 emit(ir, TGSI_OPCODE_CMP, result_dst,
1769 op[0], result_src, st_src_reg_for_float(0.0));
1770 }
1771 break;
1772 case ir_unop_rsq:
1773 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1774 break;
1775 case ir_unop_i2f:
1776 if (native_integers) {
1777 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1778 break;
1779 }
1780 /* fallthrough to next case otherwise */
1781 case ir_unop_b2f:
1782 if (native_integers) {
1783 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1784 break;
1785 }
1786 /* fallthrough to next case otherwise */
1787 case ir_unop_i2u:
1788 case ir_unop_u2i:
1789 /* Converting between signed and unsigned integers is a no-op. */
1790 result_src = op[0];
1791 break;
1792 case ir_unop_b2i:
1793 if (native_integers) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1797 */
1798 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1799 } else {
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1802 */
1803 result_src = op[0];
1804 }
1805 break;
1806 case ir_unop_f2i:
1807 if (native_integers)
1808 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1809 else
1810 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1811 break;
1812 case ir_unop_f2u:
1813 if (native_integers)
1814 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1815 else
1816 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1817 break;
1818 case ir_unop_bitcast_f2i:
1819 result_src = op[0];
1820 result_src.type = GLSL_TYPE_INT;
1821 break;
1822 case ir_unop_bitcast_f2u:
1823 result_src = op[0];
1824 result_src.type = GLSL_TYPE_UINT;
1825 break;
1826 case ir_unop_bitcast_i2f:
1827 case ir_unop_bitcast_u2f:
1828 result_src = op[0];
1829 result_src.type = GLSL_TYPE_FLOAT;
1830 break;
1831 case ir_unop_f2b:
1832 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1833 break;
1834 case ir_unop_i2b:
1835 if (native_integers)
1836 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1837 else
1838 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1839 break;
1840 case ir_unop_trunc:
1841 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1842 break;
1843 case ir_unop_ceil:
1844 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1845 break;
1846 case ir_unop_floor:
1847 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1848 break;
1849 case ir_unop_round_even:
1850 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1851 break;
1852 case ir_unop_fract:
1853 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1854 break;
1855
1856 case ir_binop_min:
1857 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1858 break;
1859 case ir_binop_max:
1860 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1861 break;
1862 case ir_binop_pow:
1863 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1864 break;
1865
1866 case ir_unop_bit_not:
1867 if (native_integers) {
1868 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1869 break;
1870 }
1871 case ir_unop_u2f:
1872 if (native_integers) {
1873 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1874 break;
1875 }
1876 case ir_binop_lshift:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1879 break;
1880 }
1881 case ir_binop_rshift:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1884 break;
1885 }
1886 case ir_binop_bit_and:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1889 break;
1890 }
1891 case ir_binop_bit_xor:
1892 if (native_integers) {
1893 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1894 break;
1895 }
1896 case ir_binop_bit_or:
1897 if (native_integers) {
1898 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1899 break;
1900 }
1901
1902 assert(!"GLSL 1.30 features unsupported");
1903 break;
1904
1905 case ir_binop_ubo_load: {
1906 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
1907 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1908 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1909 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
1910 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1911 st_src_reg cbuf;
1912
1913 cbuf.type = glsl_type::vec4_type->base_type;
1914 cbuf.file = PROGRAM_CONSTANT;
1915 cbuf.index = 0;
1916 cbuf.reladdr = NULL;
1917 cbuf.negate = 0;
1918
1919 assert(ir->type->is_vector() || ir->type->is_scalar());
1920
1921 if (const_offset_ir) {
1922 /* Constant index into constant buffer */
1923 cbuf.reladdr = NULL;
1924 cbuf.index = const_offset / 16;
1925 }
1926 else {
1927 /* Relative/variable index into constant buffer */
1928 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1929 st_src_reg_for_int(4));
1930 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1931 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1932 }
1933
1934 if (const_uniform_block) {
1935 /* Constant constant buffer */
1936 cbuf.reladdr2 = NULL;
1937 cbuf.index2D = const_block;
1938 cbuf.has_index2 = true;
1939 }
1940 else {
1941 /* Relative/variable constant buffer */
1942 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
1943 cbuf.index2D = 1;
1944 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
1945 cbuf.has_index2 = true;
1946 }
1947
1948 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1949 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1950 const_offset % 16 / 4,
1951 const_offset % 16 / 4,
1952 const_offset % 16 / 4);
1953
1954 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1955 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1956 } else {
1957 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1958 }
1959 break;
1960 }
1961 case ir_triop_lrp:
1962 /* note: we have to reorder the three args here */
1963 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1964 break;
1965 case ir_triop_csel:
1966 if (this->ctx->Const.NativeIntegers)
1967 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1968 else {
1969 op[0].negate = ~op[0].negate;
1970 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1971 }
1972 break;
1973 case ir_triop_bitfield_extract:
1974 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
1975 break;
1976 case ir_quadop_bitfield_insert:
1977 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
1978 break;
1979 case ir_unop_bitfield_reverse:
1980 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
1981 break;
1982 case ir_unop_bit_count:
1983 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
1984 break;
1985 case ir_unop_find_msb:
1986 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
1987 break;
1988 case ir_unop_find_lsb:
1989 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
1990 break;
1991 case ir_binop_imul_high:
1992 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
1993 break;
1994 case ir_triop_fma:
1995 /* NOTE: Perhaps there should be a special opcode that enforces fused
1996 * mul-add. Just use MAD for now.
1997 */
1998 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
1999 break;
2000 case ir_unop_interpolate_at_centroid:
2001 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2002 break;
2003 case ir_binop_interpolate_at_offset:
2004 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2005 break;
2006 case ir_binop_interpolate_at_sample:
2007 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2008 break;
2009 case ir_unop_pack_snorm_2x16:
2010 case ir_unop_pack_unorm_2x16:
2011 case ir_unop_pack_half_2x16:
2012 case ir_unop_pack_snorm_4x8:
2013 case ir_unop_pack_unorm_4x8:
2014 case ir_unop_unpack_snorm_2x16:
2015 case ir_unop_unpack_unorm_2x16:
2016 case ir_unop_unpack_half_2x16:
2017 case ir_unop_unpack_half_2x16_split_x:
2018 case ir_unop_unpack_half_2x16_split_y:
2019 case ir_unop_unpack_snorm_4x8:
2020 case ir_unop_unpack_unorm_4x8:
2021 case ir_binop_pack_half_2x16_split:
2022 case ir_binop_bfm:
2023 case ir_triop_bfi:
2024 case ir_quadop_vector:
2025 case ir_binop_vector_extract:
2026 case ir_triop_vector_insert:
2027 case ir_binop_ldexp:
2028 case ir_binop_carry:
2029 case ir_binop_borrow:
2030 /* This operation is not supported, or should have already been handled.
2031 */
2032 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2033 break;
2034 }
2035
2036 this->result = result_src;
2037 }
2038
2039
2040 void
2041 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2042 {
2043 st_src_reg src;
2044 int i;
2045 int swizzle[4];
2046
2047 /* Note that this is only swizzles in expressions, not those on the left
2048 * hand side of an assignment, which do write masking. See ir_assignment
2049 * for that.
2050 */
2051
2052 ir->val->accept(this);
2053 src = this->result;
2054 assert(src.file != PROGRAM_UNDEFINED);
2055
2056 for (i = 0; i < 4; i++) {
2057 if (i < ir->type->vector_elements) {
2058 switch (i) {
2059 case 0:
2060 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2061 break;
2062 case 1:
2063 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2064 break;
2065 case 2:
2066 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2067 break;
2068 case 3:
2069 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2070 break;
2071 }
2072 } else {
2073 /* If the type is smaller than a vec4, replicate the last
2074 * channel out.
2075 */
2076 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2077 }
2078 }
2079
2080 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2081
2082 this->result = src;
2083 }
2084
2085 void
2086 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2087 {
2088 variable_storage *entry = find_variable_storage(ir->var);
2089 ir_variable *var = ir->var;
2090
2091 if (!entry) {
2092 switch (var->data.mode) {
2093 case ir_var_uniform:
2094 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2095 var->data.location);
2096 this->variables.push_tail(entry);
2097 break;
2098 case ir_var_shader_in:
2099 /* The linker assigns locations for varyings and attributes,
2100 * including deprecated builtins (like gl_Color), user-assign
2101 * generic attributes (glBindVertexLocation), and
2102 * user-defined varyings.
2103 */
2104 assert(var->data.location != -1);
2105 entry = new(mem_ctx) variable_storage(var,
2106 PROGRAM_INPUT,
2107 var->data.location);
2108 break;
2109 case ir_var_shader_out:
2110 assert(var->data.location != -1);
2111 entry = new(mem_ctx) variable_storage(var,
2112 PROGRAM_OUTPUT,
2113 var->data.location
2114 + var->data.index);
2115 break;
2116 case ir_var_system_value:
2117 entry = new(mem_ctx) variable_storage(var,
2118 PROGRAM_SYSTEM_VALUE,
2119 var->data.location);
2120 break;
2121 case ir_var_auto:
2122 case ir_var_temporary:
2123 st_src_reg src = get_temp(var->type);
2124
2125 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2126 this->variables.push_tail(entry);
2127
2128 break;
2129 }
2130
2131 if (!entry) {
2132 printf("Failed to make storage for %s\n", var->name);
2133 exit(1);
2134 }
2135 }
2136
2137 this->result = st_src_reg(entry->file, entry->index, var->type);
2138 if (!native_integers)
2139 this->result.type = GLSL_TYPE_FLOAT;
2140 }
2141
2142 void
2143 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2144 {
2145 ir_constant *index;
2146 st_src_reg src;
2147 int element_size = type_size(ir->type);
2148 bool is_2D_input;
2149
2150 index = ir->array_index->constant_expression_value();
2151
2152 ir->array->accept(this);
2153 src = this->result;
2154
2155 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2156 src.file == PROGRAM_INPUT &&
2157 ir->array->ir_type != ir_type_dereference_array;
2158
2159 if (is_2D_input)
2160 element_size = 1;
2161
2162 if (index) {
2163 if (is_2D_input) {
2164 src.index2D = index->value.i[0];
2165 src.has_index2 = true;
2166 } else
2167 src.index += index->value.i[0] * element_size;
2168 } else {
2169 /* Variable index array dereference. It eats the "vec4" of the
2170 * base of the array and an index that offsets the TGSI register
2171 * index.
2172 */
2173 ir->array_index->accept(this);
2174
2175 st_src_reg index_reg;
2176
2177 if (element_size == 1) {
2178 index_reg = this->result;
2179 } else {
2180 index_reg = get_temp(native_integers ?
2181 glsl_type::int_type : glsl_type::float_type);
2182
2183 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2184 this->result, st_src_reg_for_type(index_reg.type, element_size));
2185 }
2186
2187 /* If there was already a relative address register involved, add the
2188 * new and the old together to get the new offset.
2189 */
2190 if (!is_2D_input && src.reladdr != NULL) {
2191 st_src_reg accum_reg = get_temp(native_integers ?
2192 glsl_type::int_type : glsl_type::float_type);
2193
2194 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2195 index_reg, *src.reladdr);
2196
2197 index_reg = accum_reg;
2198 }
2199
2200 if (is_2D_input) {
2201 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2202 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2203 src.index2D = 0;
2204 src.has_index2 = true;
2205 } else {
2206 src.reladdr = ralloc(mem_ctx, st_src_reg);
2207 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2208 }
2209 }
2210
2211 /* If the type is smaller than a vec4, replicate the last channel out. */
2212 if (ir->type->is_scalar() || ir->type->is_vector())
2213 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2214 else
2215 src.swizzle = SWIZZLE_NOOP;
2216
2217 /* Change the register type to the element type of the array. */
2218 src.type = ir->type->base_type;
2219
2220 this->result = src;
2221 }
2222
2223 void
2224 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2225 {
2226 unsigned int i;
2227 const glsl_type *struct_type = ir->record->type;
2228 int offset = 0;
2229
2230 ir->record->accept(this);
2231
2232 for (i = 0; i < struct_type->length; i++) {
2233 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2234 break;
2235 offset += type_size(struct_type->fields.structure[i].type);
2236 }
2237
2238 /* If the type is smaller than a vec4, replicate the last channel out. */
2239 if (ir->type->is_scalar() || ir->type->is_vector())
2240 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2241 else
2242 this->result.swizzle = SWIZZLE_NOOP;
2243
2244 this->result.index += offset;
2245 this->result.type = ir->type->base_type;
2246 }
2247
2248 /**
2249 * We want to be careful in assignment setup to hit the actual storage
2250 * instead of potentially using a temporary like we might with the
2251 * ir_dereference handler.
2252 */
2253 static st_dst_reg
2254 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2255 {
2256 /* The LHS must be a dereference. If the LHS is a variable indexed array
2257 * access of a vector, it must be separated into a series conditional moves
2258 * before reaching this point (see ir_vec_index_to_cond_assign).
2259 */
2260 assert(ir->as_dereference());
2261 ir_dereference_array *deref_array = ir->as_dereference_array();
2262 if (deref_array) {
2263 assert(!deref_array->array->type->is_vector());
2264 }
2265
2266 /* Use the rvalue deref handler for the most part. We'll ignore
2267 * swizzles in it and write swizzles using writemask, though.
2268 */
2269 ir->accept(v);
2270 return st_dst_reg(v->result);
2271 }
2272
2273 /**
2274 * Process the condition of a conditional assignment
2275 *
2276 * Examines the condition of a conditional assignment to generate the optimal
2277 * first operand of a \c CMP instruction. If the condition is a relational
2278 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2279 * used as the source for the \c CMP instruction. Otherwise the comparison
2280 * is processed to a boolean result, and the boolean result is used as the
2281 * operand to the CMP instruction.
2282 */
2283 bool
2284 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2285 {
2286 ir_rvalue *src_ir = ir;
2287 bool negate = true;
2288 bool switch_order = false;
2289
2290 ir_expression *const expr = ir->as_expression();
2291
2292 if (native_integers) {
2293 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2294 enum glsl_base_type type = expr->operands[0]->type->base_type;
2295 if (type == GLSL_TYPE_INT || type == GLSL_TYPE_UINT ||
2296 type == GLSL_TYPE_BOOL) {
2297 if (expr->operation == ir_binop_equal) {
2298 if (expr->operands[0]->is_zero()) {
2299 src_ir = expr->operands[1];
2300 switch_order = true;
2301 }
2302 else if (expr->operands[1]->is_zero()) {
2303 src_ir = expr->operands[0];
2304 switch_order = true;
2305 }
2306 }
2307 else if (expr->operation == ir_binop_nequal) {
2308 if (expr->operands[0]->is_zero()) {
2309 src_ir = expr->operands[1];
2310 }
2311 else if (expr->operands[1]->is_zero()) {
2312 src_ir = expr->operands[0];
2313 }
2314 }
2315 }
2316 }
2317
2318 src_ir->accept(this);
2319 return switch_order;
2320 }
2321
2322 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2323 bool zero_on_left = false;
2324
2325 if (expr->operands[0]->is_zero()) {
2326 src_ir = expr->operands[1];
2327 zero_on_left = true;
2328 } else if (expr->operands[1]->is_zero()) {
2329 src_ir = expr->operands[0];
2330 zero_on_left = false;
2331 }
2332
2333 /* a is - 0 + - 0 +
2334 * (a < 0) T F F ( a < 0) T F F
2335 * (0 < a) F F T (-a < 0) F F T
2336 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2337 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2338 * (a > 0) F F T (-a < 0) F F T
2339 * (0 > a) T F F ( a < 0) T F F
2340 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2341 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2342 *
2343 * Note that exchanging the order of 0 and 'a' in the comparison simply
2344 * means that the value of 'a' should be negated.
2345 */
2346 if (src_ir != ir) {
2347 switch (expr->operation) {
2348 case ir_binop_less:
2349 switch_order = false;
2350 negate = zero_on_left;
2351 break;
2352
2353 case ir_binop_greater:
2354 switch_order = false;
2355 negate = !zero_on_left;
2356 break;
2357
2358 case ir_binop_lequal:
2359 switch_order = true;
2360 negate = !zero_on_left;
2361 break;
2362
2363 case ir_binop_gequal:
2364 switch_order = true;
2365 negate = zero_on_left;
2366 break;
2367
2368 default:
2369 /* This isn't the right kind of comparison afterall, so make sure
2370 * the whole condition is visited.
2371 */
2372 src_ir = ir;
2373 break;
2374 }
2375 }
2376 }
2377
2378 src_ir->accept(this);
2379
2380 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2381 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2382 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2383 * computing the condition.
2384 */
2385 if (negate)
2386 this->result.negate = ~this->result.negate;
2387
2388 return switch_order;
2389 }
2390
2391 void
2392 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2393 st_dst_reg *l, st_src_reg *r)
2394 {
2395 if (type->base_type == GLSL_TYPE_STRUCT) {
2396 for (unsigned int i = 0; i < type->length; i++) {
2397 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2398 }
2399 return;
2400 }
2401
2402 if (type->is_array()) {
2403 for (unsigned int i = 0; i < type->length; i++) {
2404 emit_block_mov(ir, type->fields.array, l, r);
2405 }
2406 return;
2407 }
2408
2409 if (type->is_matrix()) {
2410 const struct glsl_type *vec_type;
2411
2412 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2413 type->vector_elements, 1);
2414
2415 for (int i = 0; i < type->matrix_columns; i++) {
2416 emit_block_mov(ir, vec_type, l, r);
2417 }
2418 return;
2419 }
2420
2421 assert(type->is_scalar() || type->is_vector());
2422
2423 r->type = type->base_type;
2424 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2425 l->index++;
2426 r->index++;
2427 }
2428
2429 void
2430 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2431 {
2432 st_dst_reg l;
2433 st_src_reg r;
2434 int i;
2435
2436 ir->rhs->accept(this);
2437 r = this->result;
2438
2439 l = get_assignment_lhs(ir->lhs, this);
2440
2441 /* FINISHME: This should really set to the correct maximal writemask for each
2442 * FINISHME: component written (in the loops below). This case can only
2443 * FINISHME: occur for matrices, arrays, and structures.
2444 */
2445 if (ir->write_mask == 0) {
2446 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2447 l.writemask = WRITEMASK_XYZW;
2448 } else if (ir->lhs->type->is_scalar() &&
2449 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2450 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2451 * FINISHME: W component of fragment shader output zero, work correctly.
2452 */
2453 l.writemask = WRITEMASK_XYZW;
2454 } else {
2455 int swizzles[4];
2456 int first_enabled_chan = 0;
2457 int rhs_chan = 0;
2458
2459 l.writemask = ir->write_mask;
2460
2461 for (int i = 0; i < 4; i++) {
2462 if (l.writemask & (1 << i)) {
2463 first_enabled_chan = GET_SWZ(r.swizzle, i);
2464 break;
2465 }
2466 }
2467
2468 /* Swizzle a small RHS vector into the channels being written.
2469 *
2470 * glsl ir treats write_mask as dictating how many channels are
2471 * present on the RHS while TGSI treats write_mask as just
2472 * showing which channels of the vec4 RHS get written.
2473 */
2474 for (int i = 0; i < 4; i++) {
2475 if (l.writemask & (1 << i))
2476 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2477 else
2478 swizzles[i] = first_enabled_chan;
2479 }
2480 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2481 swizzles[2], swizzles[3]);
2482 }
2483
2484 assert(l.file != PROGRAM_UNDEFINED);
2485 assert(r.file != PROGRAM_UNDEFINED);
2486
2487 if (ir->condition) {
2488 const bool switch_order = this->process_move_condition(ir->condition);
2489 st_src_reg condition = this->result;
2490
2491 for (i = 0; i < type_size(ir->lhs->type); i++) {
2492 st_src_reg l_src = st_src_reg(l);
2493 st_src_reg condition_temp = condition;
2494 st_src_reg op1, op2;
2495 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2496
2497 op1 = r;
2498 op2 = l_src;
2499 if (switch_order) {
2500 op1 = l_src;
2501 op2 = r;
2502 }
2503
2504 if (native_integers) {
2505 emit(ir, TGSI_OPCODE_UCMP, l, condition_temp, op1, op2);
2506 }
2507 else {
2508 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, op1, op2);
2509 }
2510
2511 l.index++;
2512 r.index++;
2513 }
2514 } else if (ir->rhs->as_expression() &&
2515 this->instructions.get_tail() &&
2516 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2517 type_size(ir->lhs->type) == 1 &&
2518 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2519 /* To avoid emitting an extra MOV when assigning an expression to a
2520 * variable, emit the last instruction of the expression again, but
2521 * replace the destination register with the target of the assignment.
2522 * Dead code elimination will remove the original instruction.
2523 */
2524 glsl_to_tgsi_instruction *inst, *new_inst;
2525 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2526 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2527 new_inst->saturate = inst->saturate;
2528 inst->dead_mask = inst->dst.writemask;
2529 } else {
2530 emit_block_mov(ir, ir->rhs->type, &l, &r);
2531 }
2532 }
2533
2534
2535 void
2536 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2537 {
2538 st_src_reg src;
2539 GLfloat stack_vals[4] = { 0 };
2540 gl_constant_value *values = (gl_constant_value *) stack_vals;
2541 GLenum gl_type = GL_NONE;
2542 unsigned int i;
2543 static int in_array = 0;
2544 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2545
2546 /* Unfortunately, 4 floats is all we can get into
2547 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2548 * aggregate constant and move each constant value into it. If we
2549 * get lucky, copy propagation will eliminate the extra moves.
2550 */
2551 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2552 st_src_reg temp_base = get_temp(ir->type);
2553 st_dst_reg temp = st_dst_reg(temp_base);
2554
2555 foreach_in_list(ir_constant, field_value, &ir->components) {
2556 int size = type_size(field_value->type);
2557
2558 assert(size > 0);
2559
2560 field_value->accept(this);
2561 src = this->result;
2562
2563 for (i = 0; i < (unsigned int)size; i++) {
2564 emit(ir, TGSI_OPCODE_MOV, temp, src);
2565
2566 src.index++;
2567 temp.index++;
2568 }
2569 }
2570 this->result = temp_base;
2571 return;
2572 }
2573
2574 if (ir->type->is_array()) {
2575 st_src_reg temp_base = get_temp(ir->type);
2576 st_dst_reg temp = st_dst_reg(temp_base);
2577 int size = type_size(ir->type->fields.array);
2578
2579 assert(size > 0);
2580 in_array++;
2581
2582 for (i = 0; i < ir->type->length; i++) {
2583 ir->array_elements[i]->accept(this);
2584 src = this->result;
2585 for (int j = 0; j < size; j++) {
2586 emit(ir, TGSI_OPCODE_MOV, temp, src);
2587
2588 src.index++;
2589 temp.index++;
2590 }
2591 }
2592 this->result = temp_base;
2593 in_array--;
2594 return;
2595 }
2596
2597 if (ir->type->is_matrix()) {
2598 st_src_reg mat = get_temp(ir->type);
2599 st_dst_reg mat_column = st_dst_reg(mat);
2600
2601 for (i = 0; i < ir->type->matrix_columns; i++) {
2602 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2603 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2604
2605 src = st_src_reg(file, -1, ir->type->base_type);
2606 src.index = add_constant(file,
2607 values,
2608 ir->type->vector_elements,
2609 GL_FLOAT,
2610 &src.swizzle);
2611 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2612
2613 mat_column.index++;
2614 }
2615
2616 this->result = mat;
2617 return;
2618 }
2619
2620 switch (ir->type->base_type) {
2621 case GLSL_TYPE_FLOAT:
2622 gl_type = GL_FLOAT;
2623 for (i = 0; i < ir->type->vector_elements; i++) {
2624 values[i].f = ir->value.f[i];
2625 }
2626 break;
2627 case GLSL_TYPE_UINT:
2628 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2629 for (i = 0; i < ir->type->vector_elements; i++) {
2630 if (native_integers)
2631 values[i].u = ir->value.u[i];
2632 else
2633 values[i].f = ir->value.u[i];
2634 }
2635 break;
2636 case GLSL_TYPE_INT:
2637 gl_type = native_integers ? GL_INT : GL_FLOAT;
2638 for (i = 0; i < ir->type->vector_elements; i++) {
2639 if (native_integers)
2640 values[i].i = ir->value.i[i];
2641 else
2642 values[i].f = ir->value.i[i];
2643 }
2644 break;
2645 case GLSL_TYPE_BOOL:
2646 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2647 for (i = 0; i < ir->type->vector_elements; i++) {
2648 values[i].u = ir->value.b[i] ? ctx->Const.UniformBooleanTrue : 0;
2649 }
2650 break;
2651 default:
2652 assert(!"Non-float/uint/int/bool constant");
2653 }
2654
2655 this->result = st_src_reg(file, -1, ir->type);
2656 this->result.index = add_constant(file,
2657 values,
2658 ir->type->vector_elements,
2659 gl_type,
2660 &this->result.swizzle);
2661 }
2662
2663 function_entry *
2664 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2665 {
2666 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2667 if (entry->sig == sig)
2668 return entry;
2669 }
2670
2671 entry = ralloc(mem_ctx, function_entry);
2672 entry->sig = sig;
2673 entry->sig_id = this->next_signature_id++;
2674 entry->bgn_inst = NULL;
2675
2676 /* Allocate storage for all the parameters. */
2677 foreach_in_list(ir_variable, param, &sig->parameters) {
2678 variable_storage *storage;
2679
2680 storage = find_variable_storage(param);
2681 assert(!storage);
2682
2683 st_src_reg src = get_temp(param->type);
2684
2685 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2686 this->variables.push_tail(storage);
2687 }
2688
2689 if (!sig->return_type->is_void()) {
2690 entry->return_reg = get_temp(sig->return_type);
2691 } else {
2692 entry->return_reg = undef_src;
2693 }
2694
2695 this->function_signatures.push_tail(entry);
2696 return entry;
2697 }
2698
2699 void
2700 glsl_to_tgsi_visitor::visit(ir_call *ir)
2701 {
2702 glsl_to_tgsi_instruction *call_inst;
2703 ir_function_signature *sig = ir->callee;
2704 function_entry *entry = get_function_signature(sig);
2705 int i;
2706
2707 /* Process in parameters. */
2708 foreach_two_lists(formal_node, &sig->parameters,
2709 actual_node, &ir->actual_parameters) {
2710 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2711 ir_variable *param = (ir_variable *) formal_node;
2712
2713 if (param->data.mode == ir_var_function_in ||
2714 param->data.mode == ir_var_function_inout) {
2715 variable_storage *storage = find_variable_storage(param);
2716 assert(storage);
2717
2718 param_rval->accept(this);
2719 st_src_reg r = this->result;
2720
2721 st_dst_reg l;
2722 l.file = storage->file;
2723 l.index = storage->index;
2724 l.reladdr = NULL;
2725 l.writemask = WRITEMASK_XYZW;
2726 l.cond_mask = COND_TR;
2727
2728 for (i = 0; i < type_size(param->type); i++) {
2729 emit(ir, TGSI_OPCODE_MOV, l, r);
2730 l.index++;
2731 r.index++;
2732 }
2733 }
2734 }
2735
2736 /* Emit call instruction */
2737 call_inst = emit(ir, TGSI_OPCODE_CAL);
2738 call_inst->function = entry;
2739
2740 /* Process out parameters. */
2741 foreach_two_lists(formal_node, &sig->parameters,
2742 actual_node, &ir->actual_parameters) {
2743 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2744 ir_variable *param = (ir_variable *) formal_node;
2745
2746 if (param->data.mode == ir_var_function_out ||
2747 param->data.mode == ir_var_function_inout) {
2748 variable_storage *storage = find_variable_storage(param);
2749 assert(storage);
2750
2751 st_src_reg r;
2752 r.file = storage->file;
2753 r.index = storage->index;
2754 r.reladdr = NULL;
2755 r.swizzle = SWIZZLE_NOOP;
2756 r.negate = 0;
2757
2758 param_rval->accept(this);
2759 st_dst_reg l = st_dst_reg(this->result);
2760
2761 for (i = 0; i < type_size(param->type); i++) {
2762 emit(ir, TGSI_OPCODE_MOV, l, r);
2763 l.index++;
2764 r.index++;
2765 }
2766 }
2767 }
2768
2769 /* Process return value. */
2770 this->result = entry->return_reg;
2771 }
2772
2773 void
2774 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2775 {
2776 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2777 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2778 st_src_reg levels_src;
2779 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2780 glsl_to_tgsi_instruction *inst = NULL;
2781 unsigned opcode = TGSI_OPCODE_NOP;
2782 const glsl_type *sampler_type = ir->sampler->type;
2783 ir_rvalue *sampler_index =
2784 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2785 bool is_cube_array = false;
2786 unsigned i;
2787
2788 /* if we are a cube array sampler */
2789 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2790 sampler_type->sampler_array)) {
2791 is_cube_array = true;
2792 }
2793
2794 if (ir->coordinate) {
2795 ir->coordinate->accept(this);
2796
2797 /* Put our coords in a temp. We'll need to modify them for shadow,
2798 * projection, or LOD, so the only case we'd use it as is is if
2799 * we're doing plain old texturing. The optimization passes on
2800 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2801 */
2802 coord = get_temp(glsl_type::vec4_type);
2803 coord_dst = st_dst_reg(coord);
2804 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2805 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2806 }
2807
2808 if (ir->projector) {
2809 ir->projector->accept(this);
2810 projector = this->result;
2811 }
2812
2813 /* Storage for our result. Ideally for an assignment we'd be using
2814 * the actual storage for the result here, instead.
2815 */
2816 result_src = get_temp(ir->type);
2817 result_dst = st_dst_reg(result_src);
2818
2819 switch (ir->op) {
2820 case ir_tex:
2821 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2822 if (ir->offset) {
2823 ir->offset->accept(this);
2824 offset[0] = this->result;
2825 }
2826 break;
2827 case ir_txb:
2828 if (is_cube_array ||
2829 sampler_type == glsl_type::samplerCubeShadow_type) {
2830 opcode = TGSI_OPCODE_TXB2;
2831 }
2832 else {
2833 opcode = TGSI_OPCODE_TXB;
2834 }
2835 ir->lod_info.bias->accept(this);
2836 lod_info = this->result;
2837 if (ir->offset) {
2838 ir->offset->accept(this);
2839 offset[0] = this->result;
2840 }
2841 break;
2842 case ir_txl:
2843 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2844 ir->lod_info.lod->accept(this);
2845 lod_info = this->result;
2846 if (ir->offset) {
2847 ir->offset->accept(this);
2848 offset[0] = this->result;
2849 }
2850 break;
2851 case ir_txd:
2852 opcode = TGSI_OPCODE_TXD;
2853 ir->lod_info.grad.dPdx->accept(this);
2854 dx = this->result;
2855 ir->lod_info.grad.dPdy->accept(this);
2856 dy = this->result;
2857 if (ir->offset) {
2858 ir->offset->accept(this);
2859 offset[0] = this->result;
2860 }
2861 break;
2862 case ir_txs:
2863 opcode = TGSI_OPCODE_TXQ;
2864 ir->lod_info.lod->accept(this);
2865 lod_info = this->result;
2866 break;
2867 case ir_query_levels:
2868 opcode = TGSI_OPCODE_TXQ;
2869 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2870 levels_src = get_temp(ir->type);
2871 break;
2872 case ir_txf:
2873 opcode = TGSI_OPCODE_TXF;
2874 ir->lod_info.lod->accept(this);
2875 lod_info = this->result;
2876 if (ir->offset) {
2877 ir->offset->accept(this);
2878 offset[0] = this->result;
2879 }
2880 break;
2881 case ir_txf_ms:
2882 opcode = TGSI_OPCODE_TXF;
2883 ir->lod_info.sample_index->accept(this);
2884 sample_index = this->result;
2885 break;
2886 case ir_tg4:
2887 opcode = TGSI_OPCODE_TG4;
2888 ir->lod_info.component->accept(this);
2889 component = this->result;
2890 if (ir->offset) {
2891 ir->offset->accept(this);
2892 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2893 const glsl_type *elt_type = ir->offset->type->fields.array;
2894 for (i = 0; i < ir->offset->type->length; i++) {
2895 offset[i] = this->result;
2896 offset[i].index += i * type_size(elt_type);
2897 offset[i].type = elt_type->base_type;
2898 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2899 }
2900 } else {
2901 offset[0] = this->result;
2902 }
2903 }
2904 break;
2905 case ir_lod:
2906 opcode = TGSI_OPCODE_LODQ;
2907 break;
2908 }
2909
2910 if (ir->projector) {
2911 if (opcode == TGSI_OPCODE_TEX) {
2912 /* Slot the projector in as the last component of the coord. */
2913 coord_dst.writemask = WRITEMASK_W;
2914 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2915 coord_dst.writemask = WRITEMASK_XYZW;
2916 opcode = TGSI_OPCODE_TXP;
2917 } else {
2918 st_src_reg coord_w = coord;
2919 coord_w.swizzle = SWIZZLE_WWWW;
2920
2921 /* For the other TEX opcodes there's no projective version
2922 * since the last slot is taken up by LOD info. Do the
2923 * projective divide now.
2924 */
2925 coord_dst.writemask = WRITEMASK_W;
2926 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2927
2928 /* In the case where we have to project the coordinates "by hand,"
2929 * the shadow comparator value must also be projected.
2930 */
2931 st_src_reg tmp_src = coord;
2932 if (ir->shadow_comparitor) {
2933 /* Slot the shadow value in as the second to last component of the
2934 * coord.
2935 */
2936 ir->shadow_comparitor->accept(this);
2937
2938 tmp_src = get_temp(glsl_type::vec4_type);
2939 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2940
2941 /* Projective division not allowed for array samplers. */
2942 assert(!sampler_type->sampler_array);
2943
2944 tmp_dst.writemask = WRITEMASK_Z;
2945 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2946
2947 tmp_dst.writemask = WRITEMASK_XY;
2948 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2949 }
2950
2951 coord_dst.writemask = WRITEMASK_XYZ;
2952 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2953
2954 coord_dst.writemask = WRITEMASK_XYZW;
2955 coord.swizzle = SWIZZLE_XYZW;
2956 }
2957 }
2958
2959 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2960 * comparator was put in the correct place (and projected) by the code,
2961 * above, that handles by-hand projection.
2962 */
2963 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2964 /* Slot the shadow value in as the second to last component of the
2965 * coord.
2966 */
2967 ir->shadow_comparitor->accept(this);
2968
2969 if (is_cube_array) {
2970 cube_sc = get_temp(glsl_type::float_type);
2971 cube_sc_dst = st_dst_reg(cube_sc);
2972 cube_sc_dst.writemask = WRITEMASK_X;
2973 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2974 cube_sc_dst.writemask = WRITEMASK_X;
2975 }
2976 else {
2977 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2978 sampler_type->sampler_array) ||
2979 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2980 coord_dst.writemask = WRITEMASK_W;
2981 } else {
2982 coord_dst.writemask = WRITEMASK_Z;
2983 }
2984
2985 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2986 coord_dst.writemask = WRITEMASK_XYZW;
2987 }
2988 }
2989
2990 if (ir->op == ir_txf_ms) {
2991 coord_dst.writemask = WRITEMASK_W;
2992 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2993 coord_dst.writemask = WRITEMASK_XYZW;
2994 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2995 opcode == TGSI_OPCODE_TXF) {
2996 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2997 coord_dst.writemask = WRITEMASK_W;
2998 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2999 coord_dst.writemask = WRITEMASK_XYZW;
3000 }
3001
3002 if (sampler_index) {
3003 sampler_index->accept(this);
3004 emit_arl(ir, sampler_reladdr, this->result);
3005 }
3006
3007 if (opcode == TGSI_OPCODE_TXD)
3008 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3009 else if (opcode == TGSI_OPCODE_TXQ) {
3010 if (ir->op == ir_query_levels) {
3011 /* the level is stored in W */
3012 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3013 result_dst.writemask = WRITEMASK_X;
3014 levels_src.swizzle = SWIZZLE_WWWW;
3015 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3016 } else
3017 inst = emit(ir, opcode, result_dst, lod_info);
3018 } else if (opcode == TGSI_OPCODE_TXF) {
3019 inst = emit(ir, opcode, result_dst, coord);
3020 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3021 inst = emit(ir, opcode, result_dst, coord, lod_info);
3022 } else if (opcode == TGSI_OPCODE_TEX2) {
3023 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3024 } else if (opcode == TGSI_OPCODE_TG4) {
3025 if (is_cube_array && ir->shadow_comparitor) {
3026 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3027 } else {
3028 inst = emit(ir, opcode, result_dst, coord, component);
3029 }
3030 } else
3031 inst = emit(ir, opcode, result_dst, coord);
3032
3033 if (ir->shadow_comparitor)
3034 inst->tex_shadow = GL_TRUE;
3035
3036 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3037 this->shader_program,
3038 this->prog);
3039 if (sampler_index) {
3040 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3041 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3042 inst->sampler_array_size =
3043 ir->sampler->as_dereference_array()->array->type->array_size();
3044 } else {
3045 inst->sampler_array_size = 1;
3046 }
3047
3048 if (ir->offset) {
3049 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3050 inst->tex_offsets[i] = offset[i];
3051 inst->tex_offset_num_offset = i;
3052 }
3053
3054 switch (sampler_type->sampler_dimensionality) {
3055 case GLSL_SAMPLER_DIM_1D:
3056 inst->tex_target = (sampler_type->sampler_array)
3057 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3058 break;
3059 case GLSL_SAMPLER_DIM_2D:
3060 inst->tex_target = (sampler_type->sampler_array)
3061 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3062 break;
3063 case GLSL_SAMPLER_DIM_3D:
3064 inst->tex_target = TEXTURE_3D_INDEX;
3065 break;
3066 case GLSL_SAMPLER_DIM_CUBE:
3067 inst->tex_target = (sampler_type->sampler_array)
3068 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3069 break;
3070 case GLSL_SAMPLER_DIM_RECT:
3071 inst->tex_target = TEXTURE_RECT_INDEX;
3072 break;
3073 case GLSL_SAMPLER_DIM_BUF:
3074 inst->tex_target = TEXTURE_BUFFER_INDEX;
3075 break;
3076 case GLSL_SAMPLER_DIM_EXTERNAL:
3077 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3078 break;
3079 case GLSL_SAMPLER_DIM_MS:
3080 inst->tex_target = (sampler_type->sampler_array)
3081 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3082 break;
3083 default:
3084 assert(!"Should not get here.");
3085 }
3086
3087 this->result = result_src;
3088 }
3089
3090 void
3091 glsl_to_tgsi_visitor::visit(ir_return *ir)
3092 {
3093 if (ir->get_value()) {
3094 st_dst_reg l;
3095 int i;
3096
3097 assert(current_function);
3098
3099 ir->get_value()->accept(this);
3100 st_src_reg r = this->result;
3101
3102 l = st_dst_reg(current_function->return_reg);
3103
3104 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3105 emit(ir, TGSI_OPCODE_MOV, l, r);
3106 l.index++;
3107 r.index++;
3108 }
3109 }
3110
3111 emit(ir, TGSI_OPCODE_RET);
3112 }
3113
3114 void
3115 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3116 {
3117 if (ir->condition) {
3118 ir->condition->accept(this);
3119 st_src_reg condition = this->result;
3120
3121 /* Convert the bool condition to a float so we can negate. */
3122 if (native_integers) {
3123 st_src_reg temp = get_temp(ir->condition->type);
3124 emit(ir, TGSI_OPCODE_AND, st_dst_reg(temp),
3125 condition, st_src_reg_for_float(1.0));
3126 condition = temp;
3127 }
3128
3129 condition.negate = ~condition.negate;
3130 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition);
3131 } else {
3132 /* unconditional kil */
3133 emit(ir, TGSI_OPCODE_KILL);
3134 }
3135 }
3136
3137 void
3138 glsl_to_tgsi_visitor::visit(ir_if *ir)
3139 {
3140 unsigned if_opcode;
3141 glsl_to_tgsi_instruction *if_inst;
3142
3143 ir->condition->accept(this);
3144 assert(this->result.file != PROGRAM_UNDEFINED);
3145
3146 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3147
3148 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3149
3150 this->instructions.push_tail(if_inst);
3151
3152 visit_exec_list(&ir->then_instructions, this);
3153
3154 if (!ir->else_instructions.is_empty()) {
3155 emit(ir->condition, TGSI_OPCODE_ELSE);
3156 visit_exec_list(&ir->else_instructions, this);
3157 }
3158
3159 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3160 }
3161
3162
3163 void
3164 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3165 {
3166 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3167
3168 ir->stream->accept(this);
3169 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3170 }
3171
3172 void
3173 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3174 {
3175 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3176
3177 ir->stream->accept(this);
3178 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3179 }
3180
3181 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3182 {
3183 result.file = PROGRAM_UNDEFINED;
3184 next_temp = 1;
3185 next_array = 0;
3186 next_signature_id = 1;
3187 num_immediates = 0;
3188 current_function = NULL;
3189 num_address_regs = 0;
3190 samplers_used = 0;
3191 indirect_addr_consts = false;
3192 glsl_version = 0;
3193 native_integers = false;
3194 mem_ctx = ralloc_context(NULL);
3195 ctx = NULL;
3196 prog = NULL;
3197 shader_program = NULL;
3198 shader = NULL;
3199 options = NULL;
3200 have_sqrt = false;
3201 }
3202
3203 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3204 {
3205 ralloc_free(mem_ctx);
3206 }
3207
3208 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3209 {
3210 delete v;
3211 }
3212
3213
3214 /**
3215 * Count resources used by the given gpu program (number of texture
3216 * samplers, etc).
3217 */
3218 static void
3219 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3220 {
3221 v->samplers_used = 0;
3222
3223 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3224 if (is_tex_instruction(inst->op)) {
3225 for (int i = 0; i < inst->sampler_array_size; i++) {
3226 v->samplers_used |= 1 << (inst->sampler.index + i);
3227
3228 if (inst->tex_shadow) {
3229 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3230 }
3231 }
3232 }
3233 }
3234
3235 prog->SamplersUsed = v->samplers_used;
3236
3237 if (v->shader_program != NULL)
3238 _mesa_update_shader_textures_used(v->shader_program, prog);
3239 }
3240
3241 /**
3242 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3243 * are read from the given src in this instruction
3244 */
3245 static int
3246 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3247 {
3248 int read_mask = 0, comp;
3249
3250 /* Now, given the src swizzle and the written channels, find which
3251 * components are actually read
3252 */
3253 for (comp = 0; comp < 4; ++comp) {
3254 const unsigned coord = GET_SWZ(src.swizzle, comp);
3255 ASSERT(coord < 4);
3256 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3257 read_mask |= 1 << coord;
3258 }
3259
3260 return read_mask;
3261 }
3262
3263 /**
3264 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3265 * instruction is the first instruction to write to register T0. There are
3266 * several lowering passes done in GLSL IR (e.g. branches and
3267 * relative addressing) that create a large number of conditional assignments
3268 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3269 *
3270 * Here is why this conversion is safe:
3271 * CMP T0, T1 T2 T0 can be expanded to:
3272 * if (T1 < 0.0)
3273 * MOV T0, T2;
3274 * else
3275 * MOV T0, T0;
3276 *
3277 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3278 * as the original program. If (T1 < 0.0) evaluates to false, executing
3279 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3280 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3281 * because any instruction that was going to read from T0 after this was going
3282 * to read a garbage value anyway.
3283 */
3284 void
3285 glsl_to_tgsi_visitor::simplify_cmp(void)
3286 {
3287 int tempWritesSize = 0;
3288 unsigned *tempWrites = NULL;
3289 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3290
3291 memset(outputWrites, 0, sizeof(outputWrites));
3292
3293 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3294 unsigned prevWriteMask = 0;
3295
3296 /* Give up if we encounter relative addressing or flow control. */
3297 if (inst->dst.reladdr ||
3298 tgsi_get_opcode_info(inst->op)->is_branch ||
3299 inst->op == TGSI_OPCODE_BGNSUB ||
3300 inst->op == TGSI_OPCODE_CONT ||
3301 inst->op == TGSI_OPCODE_END ||
3302 inst->op == TGSI_OPCODE_ENDSUB ||
3303 inst->op == TGSI_OPCODE_RET) {
3304 break;
3305 }
3306
3307 if (inst->dst.file == PROGRAM_OUTPUT) {
3308 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3309 prevWriteMask = outputWrites[inst->dst.index];
3310 outputWrites[inst->dst.index] |= inst->dst.writemask;
3311 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3312 if (inst->dst.index >= tempWritesSize) {
3313 const int inc = 4096;
3314
3315 tempWrites = (unsigned*)
3316 realloc(tempWrites,
3317 (tempWritesSize + inc) * sizeof(unsigned));
3318 if (!tempWrites)
3319 return;
3320
3321 memset(tempWrites + tempWritesSize, 0, inc * sizeof(unsigned));
3322 tempWritesSize += inc;
3323 }
3324
3325 prevWriteMask = tempWrites[inst->dst.index];
3326 tempWrites[inst->dst.index] |= inst->dst.writemask;
3327 } else
3328 continue;
3329
3330 /* For a CMP to be considered a conditional write, the destination
3331 * register and source register two must be the same. */
3332 if (inst->op == TGSI_OPCODE_CMP
3333 && !(inst->dst.writemask & prevWriteMask)
3334 && inst->src[2].file == inst->dst.file
3335 && inst->src[2].index == inst->dst.index
3336 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3337
3338 inst->op = TGSI_OPCODE_MOV;
3339 inst->src[0] = inst->src[1];
3340 }
3341 }
3342
3343 free(tempWrites);
3344 }
3345
3346 /* Replaces all references to a temporary register index with another index. */
3347 void
3348 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3349 {
3350 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3351 unsigned j;
3352
3353 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3354 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3355 inst->src[j].index == index) {
3356 inst->src[j].index = new_index;
3357 }
3358 }
3359
3360 for (j=0; j < inst->tex_offset_num_offset; j++) {
3361 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3362 inst->tex_offsets[j].index == index) {
3363 inst->tex_offsets[j].index = new_index;
3364 }
3365 }
3366
3367 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3368 inst->dst.index = new_index;
3369 }
3370 }
3371 }
3372
3373 int
3374 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3375 {
3376 int depth = 0; /* loop depth */
3377 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3378 unsigned i = 0, j;
3379
3380 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3381 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3382 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3383 inst->src[j].index == index) {
3384 return (depth == 0) ? i : loop_start;
3385 }
3386 }
3387 for (j=0; j < inst->tex_offset_num_offset; j++) {
3388 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3389 inst->tex_offsets[j].index == index) {
3390 return (depth == 0) ? i : loop_start;
3391 }
3392 }
3393
3394 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3395 if(depth++ == 0)
3396 loop_start = i;
3397 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3398 if (--depth == 0)
3399 loop_start = -1;
3400 }
3401 assert(depth >= 0);
3402
3403 i++;
3404 }
3405
3406 return -1;
3407 }
3408
3409 int
3410 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3411 {
3412 int depth = 0; /* loop depth */
3413 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3414 int i = 0;
3415
3416 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3417 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3418 return (depth == 0) ? i : loop_start;
3419 }
3420
3421 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3422 if(depth++ == 0)
3423 loop_start = i;
3424 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3425 if (--depth == 0)
3426 loop_start = -1;
3427 }
3428 assert(depth >= 0);
3429
3430 i++;
3431 }
3432
3433 return -1;
3434 }
3435
3436 int
3437 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3438 {
3439 int depth = 0; /* loop depth */
3440 int last = -1; /* index of last instruction that reads the temporary */
3441 unsigned i = 0, j;
3442
3443 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3444 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3445 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3446 inst->src[j].index == index) {
3447 last = (depth == 0) ? i : -2;
3448 }
3449 }
3450 for (j=0; j < inst->tex_offset_num_offset; j++) {
3451 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3452 inst->tex_offsets[j].index == index)
3453 last = (depth == 0) ? i : -2;
3454 }
3455
3456 if (inst->op == TGSI_OPCODE_BGNLOOP)
3457 depth++;
3458 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3459 if (--depth == 0 && last == -2)
3460 last = i;
3461 assert(depth >= 0);
3462
3463 i++;
3464 }
3465
3466 assert(last >= -1);
3467 return last;
3468 }
3469
3470 int
3471 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3472 {
3473 int depth = 0; /* loop depth */
3474 int last = -1; /* index of last instruction that writes to the temporary */
3475 int i = 0;
3476
3477 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3478 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3479 last = (depth == 0) ? i : -2;
3480
3481 if (inst->op == TGSI_OPCODE_BGNLOOP)
3482 depth++;
3483 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3484 if (--depth == 0 && last == -2)
3485 last = i;
3486 assert(depth >= 0);
3487
3488 i++;
3489 }
3490
3491 assert(last >= -1);
3492 return last;
3493 }
3494
3495 /*
3496 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3497 * channels for copy propagation and updates following instructions to
3498 * use the original versions.
3499 *
3500 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3501 * will occur. As an example, a TXP production before this pass:
3502 *
3503 * 0: MOV TEMP[1], INPUT[4].xyyy;
3504 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3505 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3506 *
3507 * and after:
3508 *
3509 * 0: MOV TEMP[1], INPUT[4].xyyy;
3510 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3511 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3512 *
3513 * which allows for dead code elimination on TEMP[1]'s writes.
3514 */
3515 void
3516 glsl_to_tgsi_visitor::copy_propagate(void)
3517 {
3518 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3519 glsl_to_tgsi_instruction *,
3520 this->next_temp * 4);
3521 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3522 int level = 0;
3523
3524 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3525 assert(inst->dst.file != PROGRAM_TEMPORARY
3526 || inst->dst.index < this->next_temp);
3527
3528 /* First, do any copy propagation possible into the src regs. */
3529 for (int r = 0; r < 3; r++) {
3530 glsl_to_tgsi_instruction *first = NULL;
3531 bool good = true;
3532 int acp_base = inst->src[r].index * 4;
3533
3534 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3535 inst->src[r].reladdr ||
3536 inst->src[r].reladdr2)
3537 continue;
3538
3539 /* See if we can find entries in the ACP consisting of MOVs
3540 * from the same src register for all the swizzled channels
3541 * of this src register reference.
3542 */
3543 for (int i = 0; i < 4; i++) {
3544 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3545 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3546
3547 if (!copy_chan) {
3548 good = false;
3549 break;
3550 }
3551
3552 assert(acp_level[acp_base + src_chan] <= level);
3553
3554 if (!first) {
3555 first = copy_chan;
3556 } else {
3557 if (first->src[0].file != copy_chan->src[0].file ||
3558 first->src[0].index != copy_chan->src[0].index) {
3559 good = false;
3560 break;
3561 }
3562 }
3563 }
3564
3565 if (good) {
3566 /* We've now validated that we can copy-propagate to
3567 * replace this src register reference. Do it.
3568 */
3569 inst->src[r].file = first->src[0].file;
3570 inst->src[r].index = first->src[0].index;
3571 inst->src[r].index2D = first->src[0].index2D;
3572 inst->src[r].has_index2 = first->src[0].has_index2;
3573
3574 int swizzle = 0;
3575 for (int i = 0; i < 4; i++) {
3576 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3577 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3578 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3579 (3 * i));
3580 }
3581 inst->src[r].swizzle = swizzle;
3582 }
3583 }
3584
3585 switch (inst->op) {
3586 case TGSI_OPCODE_BGNLOOP:
3587 case TGSI_OPCODE_ENDLOOP:
3588 /* End of a basic block, clear the ACP entirely. */
3589 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3590 break;
3591
3592 case TGSI_OPCODE_IF:
3593 case TGSI_OPCODE_UIF:
3594 ++level;
3595 break;
3596
3597 case TGSI_OPCODE_ENDIF:
3598 case TGSI_OPCODE_ELSE:
3599 /* Clear all channels written inside the block from the ACP, but
3600 * leaving those that were not touched.
3601 */
3602 for (int r = 0; r < this->next_temp; r++) {
3603 for (int c = 0; c < 4; c++) {
3604 if (!acp[4 * r + c])
3605 continue;
3606
3607 if (acp_level[4 * r + c] >= level)
3608 acp[4 * r + c] = NULL;
3609 }
3610 }
3611 if (inst->op == TGSI_OPCODE_ENDIF)
3612 --level;
3613 break;
3614
3615 default:
3616 /* Continuing the block, clear any written channels from
3617 * the ACP.
3618 */
3619 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3620 /* Any temporary might be written, so no copy propagation
3621 * across this instruction.
3622 */
3623 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3624 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3625 inst->dst.reladdr) {
3626 /* Any output might be written, so no copy propagation
3627 * from outputs across this instruction.
3628 */
3629 for (int r = 0; r < this->next_temp; r++) {
3630 for (int c = 0; c < 4; c++) {
3631 if (!acp[4 * r + c])
3632 continue;
3633
3634 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3635 acp[4 * r + c] = NULL;
3636 }
3637 }
3638 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3639 inst->dst.file == PROGRAM_OUTPUT) {
3640 /* Clear where it's used as dst. */
3641 if (inst->dst.file == PROGRAM_TEMPORARY) {
3642 for (int c = 0; c < 4; c++) {
3643 if (inst->dst.writemask & (1 << c)) {
3644 acp[4 * inst->dst.index + c] = NULL;
3645 }
3646 }
3647 }
3648
3649 /* Clear where it's used as src. */
3650 for (int r = 0; r < this->next_temp; r++) {
3651 for (int c = 0; c < 4; c++) {
3652 if (!acp[4 * r + c])
3653 continue;
3654
3655 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3656
3657 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3658 acp[4 * r + c]->src[0].index == inst->dst.index &&
3659 inst->dst.writemask & (1 << src_chan))
3660 {
3661 acp[4 * r + c] = NULL;
3662 }
3663 }
3664 }
3665 }
3666 break;
3667 }
3668
3669 /* If this is a copy, add it to the ACP. */
3670 if (inst->op == TGSI_OPCODE_MOV &&
3671 inst->dst.file == PROGRAM_TEMPORARY &&
3672 !(inst->dst.file == inst->src[0].file &&
3673 inst->dst.index == inst->src[0].index) &&
3674 !inst->dst.reladdr &&
3675 !inst->saturate &&
3676 !inst->src[0].reladdr &&
3677 !inst->src[0].reladdr2 &&
3678 !inst->src[0].negate) {
3679 for (int i = 0; i < 4; i++) {
3680 if (inst->dst.writemask & (1 << i)) {
3681 acp[4 * inst->dst.index + i] = inst;
3682 acp_level[4 * inst->dst.index + i] = level;
3683 }
3684 }
3685 }
3686 }
3687
3688 ralloc_free(acp_level);
3689 ralloc_free(acp);
3690 }
3691
3692 /*
3693 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3694 * code elimination.
3695 *
3696 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3697 * will occur. As an example, a TXP production after copy propagation but
3698 * before this pass:
3699 *
3700 * 0: MOV TEMP[1], INPUT[4].xyyy;
3701 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3702 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3703 *
3704 * and after this pass:
3705 *
3706 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3707 */
3708 int
3709 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3710 {
3711 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3712 glsl_to_tgsi_instruction *,
3713 this->next_temp * 4);
3714 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3715 int level = 0;
3716 int removed = 0;
3717
3718 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3719 assert(inst->dst.file != PROGRAM_TEMPORARY
3720 || inst->dst.index < this->next_temp);
3721
3722 switch (inst->op) {
3723 case TGSI_OPCODE_BGNLOOP:
3724 case TGSI_OPCODE_ENDLOOP:
3725 case TGSI_OPCODE_CONT:
3726 case TGSI_OPCODE_BRK:
3727 /* End of a basic block, clear the write array entirely.
3728 *
3729 * This keeps us from killing dead code when the writes are
3730 * on either side of a loop, even when the register isn't touched
3731 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3732 * dead code of this type, so it shouldn't make a difference as long as
3733 * the dead code elimination pass in the GLSL compiler does its job.
3734 */
3735 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3736 break;
3737
3738 case TGSI_OPCODE_ENDIF:
3739 case TGSI_OPCODE_ELSE:
3740 /* Promote the recorded level of all channels written inside the
3741 * preceding if or else block to the level above the if/else block.
3742 */
3743 for (int r = 0; r < this->next_temp; r++) {
3744 for (int c = 0; c < 4; c++) {
3745 if (!writes[4 * r + c])
3746 continue;
3747
3748 if (write_level[4 * r + c] == level)
3749 write_level[4 * r + c] = level-1;
3750 }
3751 }
3752
3753 if(inst->op == TGSI_OPCODE_ENDIF)
3754 --level;
3755
3756 break;
3757
3758 case TGSI_OPCODE_IF:
3759 case TGSI_OPCODE_UIF:
3760 ++level;
3761 /* fallthrough to default case to mark the condition as read */
3762
3763 default:
3764 /* Continuing the block, clear any channels from the write array that
3765 * are read by this instruction.
3766 */
3767 for (unsigned i = 0; i < Elements(inst->src); i++) {
3768 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3769 /* Any temporary might be read, so no dead code elimination
3770 * across this instruction.
3771 */
3772 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3773 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3774 /* Clear where it's used as src. */
3775 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3776 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3777 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3778 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3779
3780 for (int c = 0; c < 4; c++) {
3781 if (src_chans & (1 << c)) {
3782 writes[4 * inst->src[i].index + c] = NULL;
3783 }
3784 }
3785 }
3786 }
3787 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3788 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3789 /* Any temporary might be read, so no dead code elimination
3790 * across this instruction.
3791 */
3792 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3793 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3794 /* Clear where it's used as src. */
3795 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3796 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3797 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3798 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3799
3800 for (int c = 0; c < 4; c++) {
3801 if (src_chans & (1 << c)) {
3802 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3803 }
3804 }
3805 }
3806 }
3807 break;
3808 }
3809
3810 /* If this instruction writes to a temporary, add it to the write array.
3811 * If there is already an instruction in the write array for one or more
3812 * of the channels, flag that channel write as dead.
3813 */
3814 if (inst->dst.file == PROGRAM_TEMPORARY &&
3815 !inst->dst.reladdr &&
3816 !inst->saturate) {
3817 for (int c = 0; c < 4; c++) {
3818 if (inst->dst.writemask & (1 << c)) {
3819 if (writes[4 * inst->dst.index + c]) {
3820 if (write_level[4 * inst->dst.index + c] < level)
3821 continue;
3822 else
3823 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3824 }
3825 writes[4 * inst->dst.index + c] = inst;
3826 write_level[4 * inst->dst.index + c] = level;
3827 }
3828 }
3829 }
3830 }
3831
3832 /* Anything still in the write array at this point is dead code. */
3833 for (int r = 0; r < this->next_temp; r++) {
3834 for (int c = 0; c < 4; c++) {
3835 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3836 if (inst)
3837 inst->dead_mask |= (1 << c);
3838 }
3839 }
3840
3841 /* Now actually remove the instructions that are completely dead and update
3842 * the writemask of other instructions with dead channels.
3843 */
3844 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3845 if (!inst->dead_mask || !inst->dst.writemask)
3846 continue;
3847 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3848 inst->remove();
3849 delete inst;
3850 removed++;
3851 } else
3852 inst->dst.writemask &= ~(inst->dead_mask);
3853 }
3854
3855 ralloc_free(write_level);
3856 ralloc_free(writes);
3857
3858 return removed;
3859 }
3860
3861 /* Merges temporary registers together where possible to reduce the number of
3862 * registers needed to run a program.
3863 *
3864 * Produces optimal code only after copy propagation and dead code elimination
3865 * have been run. */
3866 void
3867 glsl_to_tgsi_visitor::merge_registers(void)
3868 {
3869 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3870 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3871 int i, j;
3872
3873 /* Read the indices of the last read and first write to each temp register
3874 * into an array so that we don't have to traverse the instruction list as
3875 * much. */
3876 for (i=0; i < this->next_temp; i++) {
3877 last_reads[i] = get_last_temp_read(i);
3878 first_writes[i] = get_first_temp_write(i);
3879 }
3880
3881 /* Start looking for registers with non-overlapping usages that can be
3882 * merged together. */
3883 for (i=0; i < this->next_temp; i++) {
3884 /* Don't touch unused registers. */
3885 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3886
3887 for (j=0; j < this->next_temp; j++) {
3888 /* Don't touch unused registers. */
3889 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3890
3891 /* We can merge the two registers if the first write to j is after or
3892 * in the same instruction as the last read from i. Note that the
3893 * register at index i will always be used earlier or at the same time
3894 * as the register at index j. */
3895 if (first_writes[i] <= first_writes[j] &&
3896 last_reads[i] <= first_writes[j])
3897 {
3898 rename_temp_register(j, i); /* Replace all references to j with i.*/
3899
3900 /* Update the first_writes and last_reads arrays with the new
3901 * values for the merged register index, and mark the newly unused
3902 * register index as such. */
3903 last_reads[i] = last_reads[j];
3904 first_writes[j] = -1;
3905 last_reads[j] = -1;
3906 }
3907 }
3908 }
3909
3910 ralloc_free(last_reads);
3911 ralloc_free(first_writes);
3912 }
3913
3914 /* Reassign indices to temporary registers by reusing unused indices created
3915 * by optimization passes. */
3916 void
3917 glsl_to_tgsi_visitor::renumber_registers(void)
3918 {
3919 int i = 0;
3920 int new_index = 0;
3921
3922 for (i=0; i < this->next_temp; i++) {
3923 if (get_first_temp_read(i) < 0) continue;
3924 if (i != new_index)
3925 rename_temp_register(i, new_index);
3926 new_index++;
3927 }
3928
3929 this->next_temp = new_index;
3930 }
3931
3932 /**
3933 * Returns a fragment program which implements the current pixel transfer ops.
3934 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3935 */
3936 extern "C" void
3937 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3938 glsl_to_tgsi_visitor *original,
3939 int scale_and_bias, int pixel_maps)
3940 {
3941 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3942 struct st_context *st = st_context(original->ctx);
3943 struct gl_program *prog = &fp->Base.Base;
3944 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3945 st_src_reg coord, src0;
3946 st_dst_reg dst0;
3947 glsl_to_tgsi_instruction *inst;
3948
3949 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3950 v->ctx = original->ctx;
3951 v->prog = prog;
3952 v->shader_program = NULL;
3953 v->shader = NULL;
3954 v->glsl_version = original->glsl_version;
3955 v->native_integers = original->native_integers;
3956 v->options = original->options;
3957 v->next_temp = original->next_temp;
3958 v->num_address_regs = original->num_address_regs;
3959 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3960 v->indirect_addr_consts = original->indirect_addr_consts;
3961 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3962 v->num_immediates = original->num_immediates;
3963
3964 /*
3965 * Get initial pixel color from the texture.
3966 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3967 */
3968 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3969 src0 = v->get_temp(glsl_type::vec4_type);
3970 dst0 = st_dst_reg(src0);
3971 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3972 inst->sampler_array_size = 1;
3973 inst->tex_target = TEXTURE_2D_INDEX;
3974
3975 prog->InputsRead |= VARYING_BIT_TEX0;
3976 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3977 v->samplers_used |= (1 << 0);
3978
3979 if (scale_and_bias) {
3980 static const gl_state_index scale_state[STATE_LENGTH] =
3981 { STATE_INTERNAL, STATE_PT_SCALE,
3982 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3983 static const gl_state_index bias_state[STATE_LENGTH] =
3984 { STATE_INTERNAL, STATE_PT_BIAS,
3985 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3986 GLint scale_p, bias_p;
3987 st_src_reg scale, bias;
3988
3989 scale_p = _mesa_add_state_reference(params, scale_state);
3990 bias_p = _mesa_add_state_reference(params, bias_state);
3991
3992 /* MAD colorTemp, colorTemp, scale, bias; */
3993 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3994 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3995 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3996 }
3997
3998 if (pixel_maps) {
3999 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
4000 st_dst_reg temp_dst = st_dst_reg(temp);
4001
4002 assert(st->pixel_xfer.pixelmap_texture);
4003
4004 /* With a little effort, we can do four pixel map look-ups with
4005 * two TEX instructions:
4006 */
4007
4008 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4009 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
4010 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4011 inst->sampler.index = 1;
4012 inst->sampler_array_size = 1;
4013 inst->tex_target = TEXTURE_2D_INDEX;
4014
4015 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4016 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4017 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4018 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4019 inst->sampler.index = 1;
4020 inst->sampler_array_size = 1;
4021 inst->tex_target = TEXTURE_2D_INDEX;
4022
4023 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4024 v->samplers_used |= (1 << 1);
4025
4026 /* MOV colorTemp, temp; */
4027 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4028 }
4029
4030 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4031 * new visitor. */
4032 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4033 glsl_to_tgsi_instruction *newinst;
4034 st_src_reg src_regs[3];
4035
4036 if (inst->dst.file == PROGRAM_OUTPUT)
4037 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4038
4039 for (int i=0; i<3; i++) {
4040 src_regs[i] = inst->src[i];
4041 if (src_regs[i].file == PROGRAM_INPUT &&
4042 src_regs[i].index == VARYING_SLOT_COL0)
4043 {
4044 src_regs[i].file = PROGRAM_TEMPORARY;
4045 src_regs[i].index = src0.index;
4046 }
4047 else if (src_regs[i].file == PROGRAM_INPUT)
4048 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4049 }
4050
4051 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4052 newinst->tex_target = inst->tex_target;
4053 newinst->sampler_array_size = inst->sampler_array_size;
4054 }
4055
4056 /* Make modifications to fragment program info. */
4057 prog->Parameters = _mesa_combine_parameter_lists(params,
4058 original->prog->Parameters);
4059 _mesa_free_parameter_list(params);
4060 count_resources(v, prog);
4061 fp->glsl_to_tgsi = v;
4062 }
4063
4064 /**
4065 * Make fragment program for glBitmap:
4066 * Sample the texture and kill the fragment if the bit is 0.
4067 * This program will be combined with the user's fragment program.
4068 *
4069 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4070 */
4071 extern "C" void
4072 get_bitmap_visitor(struct st_fragment_program *fp,
4073 glsl_to_tgsi_visitor *original, int samplerIndex)
4074 {
4075 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4076 struct st_context *st = st_context(original->ctx);
4077 struct gl_program *prog = &fp->Base.Base;
4078 st_src_reg coord, src0;
4079 st_dst_reg dst0;
4080 glsl_to_tgsi_instruction *inst;
4081
4082 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4083 v->ctx = original->ctx;
4084 v->prog = prog;
4085 v->shader_program = NULL;
4086 v->shader = NULL;
4087 v->glsl_version = original->glsl_version;
4088 v->native_integers = original->native_integers;
4089 v->options = original->options;
4090 v->next_temp = original->next_temp;
4091 v->num_address_regs = original->num_address_regs;
4092 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4093 v->indirect_addr_consts = original->indirect_addr_consts;
4094 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4095 v->num_immediates = original->num_immediates;
4096
4097 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4098 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4099 src0 = v->get_temp(glsl_type::vec4_type);
4100 dst0 = st_dst_reg(src0);
4101 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4102 inst->sampler.index = samplerIndex;
4103 inst->sampler_array_size = 1;
4104 inst->tex_target = TEXTURE_2D_INDEX;
4105
4106 prog->InputsRead |= VARYING_BIT_TEX0;
4107 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4108 v->samplers_used |= (1 << samplerIndex);
4109
4110 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4111 src0.negate = NEGATE_XYZW;
4112 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4113 src0.swizzle = SWIZZLE_XXXX;
4114 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4115
4116 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4117 * new visitor. */
4118 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4119 glsl_to_tgsi_instruction *newinst;
4120 st_src_reg src_regs[3];
4121
4122 if (inst->dst.file == PROGRAM_OUTPUT)
4123 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4124
4125 for (int i=0; i<3; i++) {
4126 src_regs[i] = inst->src[i];
4127 if (src_regs[i].file == PROGRAM_INPUT)
4128 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4129 }
4130
4131 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4132 newinst->tex_target = inst->tex_target;
4133 newinst->sampler_array_size = inst->sampler_array_size;
4134 }
4135
4136 /* Make modifications to fragment program info. */
4137 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4138 count_resources(v, prog);
4139 fp->glsl_to_tgsi = v;
4140 }
4141
4142 /* ------------------------- TGSI conversion stuff -------------------------- */
4143 struct label {
4144 unsigned branch_target;
4145 unsigned token;
4146 };
4147
4148 /**
4149 * Intermediate state used during shader translation.
4150 */
4151 struct st_translate {
4152 struct ureg_program *ureg;
4153
4154 unsigned temps_size;
4155 struct ureg_dst *temps;
4156
4157 struct ureg_dst arrays[MAX_ARRAYS];
4158 struct ureg_src *constants;
4159 struct ureg_src *immediates;
4160 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4161 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4162 struct ureg_dst address[3];
4163 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4164 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4165 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4166 unsigned array_sizes[MAX_ARRAYS];
4167
4168 const GLuint *inputMapping;
4169 const GLuint *outputMapping;
4170
4171 /* For every instruction that contains a label (eg CALL), keep
4172 * details so that we can go back afterwards and emit the correct
4173 * tgsi instruction number for each label.
4174 */
4175 struct label *labels;
4176 unsigned labels_size;
4177 unsigned labels_count;
4178
4179 /* Keep a record of the tgsi instruction number that each mesa
4180 * instruction starts at, will be used to fix up labels after
4181 * translation.
4182 */
4183 unsigned *insn;
4184 unsigned insn_size;
4185 unsigned insn_count;
4186
4187 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4188
4189 boolean error;
4190 };
4191
4192 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4193 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4194 /* Vertex shader
4195 */
4196 TGSI_SEMANTIC_VERTEXID,
4197 TGSI_SEMANTIC_INSTANCEID,
4198 TGSI_SEMANTIC_VERTEXID_NOBASE,
4199 TGSI_SEMANTIC_BASEVERTEX,
4200
4201 /* Geometry shader
4202 */
4203 TGSI_SEMANTIC_INVOCATIONID,
4204
4205 /* Fragment shader
4206 */
4207 TGSI_SEMANTIC_FACE,
4208 TGSI_SEMANTIC_SAMPLEID,
4209 TGSI_SEMANTIC_SAMPLEPOS,
4210 TGSI_SEMANTIC_SAMPLEMASK,
4211 };
4212
4213 /**
4214 * Make note of a branch to a label in the TGSI code.
4215 * After we've emitted all instructions, we'll go over the list
4216 * of labels built here and patch the TGSI code with the actual
4217 * location of each label.
4218 */
4219 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4220 {
4221 unsigned i;
4222
4223 if (t->labels_count + 1 >= t->labels_size) {
4224 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4225 t->labels = (struct label *)realloc(t->labels,
4226 t->labels_size * sizeof(struct label));
4227 if (t->labels == NULL) {
4228 static unsigned dummy;
4229 t->error = TRUE;
4230 return &dummy;
4231 }
4232 }
4233
4234 i = t->labels_count++;
4235 t->labels[i].branch_target = branch_target;
4236 return &t->labels[i].token;
4237 }
4238
4239 /**
4240 * Called prior to emitting the TGSI code for each instruction.
4241 * Allocate additional space for instructions if needed.
4242 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4243 * the next TGSI instruction.
4244 */
4245 static void set_insn_start(struct st_translate *t, unsigned start)
4246 {
4247 if (t->insn_count + 1 >= t->insn_size) {
4248 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4249 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4250 if (t->insn == NULL) {
4251 t->error = TRUE;
4252 return;
4253 }
4254 }
4255
4256 t->insn[t->insn_count++] = start;
4257 }
4258
4259 /**
4260 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4261 */
4262 static struct ureg_src
4263 emit_immediate(struct st_translate *t,
4264 gl_constant_value values[4],
4265 int type, int size)
4266 {
4267 struct ureg_program *ureg = t->ureg;
4268
4269 switch(type)
4270 {
4271 case GL_FLOAT:
4272 return ureg_DECL_immediate(ureg, &values[0].f, size);
4273 case GL_INT:
4274 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4275 case GL_UNSIGNED_INT:
4276 case GL_BOOL:
4277 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4278 default:
4279 assert(!"should not get here - type must be float, int, uint, or bool");
4280 return ureg_src_undef();
4281 }
4282 }
4283
4284 /**
4285 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4286 */
4287 static struct ureg_dst
4288 dst_register(struct st_translate *t,
4289 gl_register_file file,
4290 GLuint index)
4291 {
4292 unsigned array;
4293
4294 switch(file) {
4295 case PROGRAM_UNDEFINED:
4296 return ureg_dst_undef();
4297
4298 case PROGRAM_TEMPORARY:
4299 /* Allocate space for temporaries on demand. */
4300 if (index >= t->temps_size) {
4301 const int inc = 4096;
4302
4303 t->temps = (struct ureg_dst*)
4304 realloc(t->temps,
4305 (t->temps_size + inc) * sizeof(struct ureg_dst));
4306 if (!t->temps)
4307 return ureg_dst_undef();
4308
4309 memset(t->temps + t->temps_size, 0, inc * sizeof(struct ureg_dst));
4310 t->temps_size += inc;
4311 }
4312
4313 if (ureg_dst_is_undef(t->temps[index]))
4314 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4315
4316 return t->temps[index];
4317
4318 case PROGRAM_ARRAY:
4319 array = index >> 16;
4320
4321 assert(array < Elements(t->arrays));
4322
4323 if (ureg_dst_is_undef(t->arrays[array]))
4324 t->arrays[array] = ureg_DECL_array_temporary(
4325 t->ureg, t->array_sizes[array], TRUE);
4326
4327 return ureg_dst_array_offset(t->arrays[array],
4328 (int)(index & 0xFFFF) - 0x8000);
4329
4330 case PROGRAM_OUTPUT:
4331 if (t->procType == TGSI_PROCESSOR_VERTEX)
4332 assert(index < VARYING_SLOT_MAX);
4333 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4334 assert(index < FRAG_RESULT_MAX);
4335 else
4336 assert(index < VARYING_SLOT_MAX);
4337
4338 assert(t->outputMapping[index] < Elements(t->outputs));
4339
4340 return t->outputs[t->outputMapping[index]];
4341
4342 case PROGRAM_ADDRESS:
4343 return t->address[index];
4344
4345 default:
4346 assert(!"unknown dst register file");
4347 return ureg_dst_undef();
4348 }
4349 }
4350
4351 /**
4352 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4353 */
4354 static struct ureg_src
4355 src_register(struct st_translate *t, const struct st_src_reg *reg)
4356 {
4357 switch(reg->file) {
4358 case PROGRAM_UNDEFINED:
4359 return ureg_src_undef();
4360
4361 case PROGRAM_TEMPORARY:
4362 case PROGRAM_ARRAY:
4363 return ureg_src(dst_register(t, reg->file, reg->index));
4364
4365 case PROGRAM_UNIFORM:
4366 assert(reg->index >= 0);
4367 return t->constants[reg->index];
4368 case PROGRAM_STATE_VAR:
4369 case PROGRAM_CONSTANT: /* ie, immediate */
4370 if (reg->has_index2)
4371 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4372 else if (reg->index < 0)
4373 return ureg_DECL_constant(t->ureg, 0);
4374 else
4375 return t->constants[reg->index];
4376
4377 case PROGRAM_IMMEDIATE:
4378 return t->immediates[reg->index];
4379
4380 case PROGRAM_INPUT:
4381 assert(t->inputMapping[reg->index] < Elements(t->inputs));
4382 return t->inputs[t->inputMapping[reg->index]];
4383
4384 case PROGRAM_OUTPUT:
4385 assert(t->outputMapping[reg->index] < Elements(t->outputs));
4386 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4387
4388 case PROGRAM_ADDRESS:
4389 return ureg_src(t->address[reg->index]);
4390
4391 case PROGRAM_SYSTEM_VALUE:
4392 assert(reg->index < (int) Elements(t->systemValues));
4393 return t->systemValues[reg->index];
4394
4395 default:
4396 assert(!"unknown src register file");
4397 return ureg_src_undef();
4398 }
4399 }
4400
4401 /**
4402 * Create a TGSI ureg_dst register from an st_dst_reg.
4403 */
4404 static struct ureg_dst
4405 translate_dst(struct st_translate *t,
4406 const st_dst_reg *dst_reg,
4407 bool saturate, bool clamp_color)
4408 {
4409 struct ureg_dst dst = dst_register(t,
4410 dst_reg->file,
4411 dst_reg->index);
4412
4413 dst = ureg_writemask(dst, dst_reg->writemask);
4414
4415 if (saturate)
4416 dst = ureg_saturate(dst);
4417 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4418 /* Clamp colors for ARB_color_buffer_float. */
4419 switch (t->procType) {
4420 case TGSI_PROCESSOR_VERTEX:
4421 /* XXX if the geometry shader is present, this must be done there
4422 * instead of here. */
4423 if (dst_reg->index == VARYING_SLOT_COL0 ||
4424 dst_reg->index == VARYING_SLOT_COL1 ||
4425 dst_reg->index == VARYING_SLOT_BFC0 ||
4426 dst_reg->index == VARYING_SLOT_BFC1) {
4427 dst = ureg_saturate(dst);
4428 }
4429 break;
4430
4431 case TGSI_PROCESSOR_FRAGMENT:
4432 if (dst_reg->index == FRAG_RESULT_COLOR ||
4433 dst_reg->index >= FRAG_RESULT_DATA0) {
4434 dst = ureg_saturate(dst);
4435 }
4436 break;
4437 }
4438 }
4439
4440 if (dst_reg->reladdr != NULL) {
4441 assert(dst_reg->file != PROGRAM_TEMPORARY);
4442 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4443 }
4444
4445 return dst;
4446 }
4447
4448 /**
4449 * Create a TGSI ureg_src register from an st_src_reg.
4450 */
4451 static struct ureg_src
4452 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4453 {
4454 struct ureg_src src = src_register(t, src_reg);
4455
4456 if (src_reg->has_index2) {
4457 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4458 * and UBO constant buffers (buffer, position).
4459 */
4460 if (src_reg->reladdr2)
4461 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4462 src_reg->index2D);
4463 else
4464 src = ureg_src_dimension(src, src_reg->index2D);
4465 }
4466
4467 src = ureg_swizzle(src,
4468 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4469 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4470 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4471 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4472
4473 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4474 src = ureg_negate(src);
4475
4476 if (src_reg->reladdr != NULL) {
4477 assert(src_reg->file != PROGRAM_TEMPORARY);
4478 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4479 }
4480
4481 return src;
4482 }
4483
4484 static struct tgsi_texture_offset
4485 translate_tex_offset(struct st_translate *t,
4486 const st_src_reg *in_offset, int idx)
4487 {
4488 struct tgsi_texture_offset offset;
4489 struct ureg_src imm_src;
4490 struct ureg_dst dst;
4491 int array;
4492
4493 switch (in_offset->file) {
4494 case PROGRAM_IMMEDIATE:
4495 imm_src = t->immediates[in_offset->index];
4496
4497 offset.File = imm_src.File;
4498 offset.Index = imm_src.Index;
4499 offset.SwizzleX = imm_src.SwizzleX;
4500 offset.SwizzleY = imm_src.SwizzleY;
4501 offset.SwizzleZ = imm_src.SwizzleZ;
4502 offset.Padding = 0;
4503 break;
4504 case PROGRAM_TEMPORARY:
4505 imm_src = ureg_src(t->temps[in_offset->index]);
4506 offset.File = imm_src.File;
4507 offset.Index = imm_src.Index;
4508 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4509 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4510 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4511 offset.Padding = 0;
4512 break;
4513 case PROGRAM_ARRAY:
4514 array = in_offset->index >> 16;
4515
4516 assert(array >= 0);
4517 assert(array < (int) Elements(t->arrays));
4518
4519 dst = t->arrays[array];
4520 offset.File = dst.File;
4521 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4522 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4523 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4524 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4525 offset.Padding = 0;
4526 break;
4527 default:
4528 break;
4529 }
4530 return offset;
4531 }
4532
4533 static void
4534 compile_tgsi_instruction(struct st_translate *t,
4535 const glsl_to_tgsi_instruction *inst,
4536 bool clamp_dst_color_output)
4537 {
4538 struct ureg_program *ureg = t->ureg;
4539 GLuint i;
4540 struct ureg_dst dst[1];
4541 struct ureg_src src[4];
4542 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4543
4544 unsigned num_dst;
4545 unsigned num_src;
4546 unsigned tex_target;
4547
4548 num_dst = num_inst_dst_regs(inst->op);
4549 num_src = num_inst_src_regs(inst->op);
4550
4551 if (num_dst)
4552 dst[0] = translate_dst(t,
4553 &inst->dst,
4554 inst->saturate,
4555 clamp_dst_color_output);
4556
4557 for (i = 0; i < num_src; i++) {
4558 assert(inst->src[i].file != PROGRAM_UNDEFINED);
4559 src[i] = translate_src(t, &inst->src[i]);
4560 }
4561
4562 switch(inst->op) {
4563 case TGSI_OPCODE_BGNLOOP:
4564 case TGSI_OPCODE_CAL:
4565 case TGSI_OPCODE_ELSE:
4566 case TGSI_OPCODE_ENDLOOP:
4567 case TGSI_OPCODE_IF:
4568 case TGSI_OPCODE_UIF:
4569 assert(num_dst == 0);
4570 ureg_label_insn(ureg,
4571 inst->op,
4572 src, num_src,
4573 get_label(t,
4574 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4575 return;
4576
4577 case TGSI_OPCODE_TEX:
4578 case TGSI_OPCODE_TXB:
4579 case TGSI_OPCODE_TXD:
4580 case TGSI_OPCODE_TXL:
4581 case TGSI_OPCODE_TXP:
4582 case TGSI_OPCODE_TXQ:
4583 case TGSI_OPCODE_TXF:
4584 case TGSI_OPCODE_TEX2:
4585 case TGSI_OPCODE_TXB2:
4586 case TGSI_OPCODE_TXL2:
4587 case TGSI_OPCODE_TG4:
4588 case TGSI_OPCODE_LODQ:
4589 src[num_src] = t->samplers[inst->sampler.index];
4590 assert(src[num_src].File != TGSI_FILE_NULL);
4591 if (inst->sampler.reladdr)
4592 src[num_src] =
4593 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4594 num_src++;
4595 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4596 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4597 }
4598 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4599
4600 ureg_tex_insn(ureg,
4601 inst->op,
4602 dst, num_dst,
4603 tex_target,
4604 texoffsets, inst->tex_offset_num_offset,
4605 src, num_src);
4606 return;
4607
4608 case TGSI_OPCODE_SCS:
4609 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4610 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4611 break;
4612
4613 default:
4614 ureg_insn(ureg,
4615 inst->op,
4616 dst, num_dst,
4617 src, num_src);
4618 break;
4619 }
4620 }
4621
4622 /**
4623 * Emit the TGSI instructions for inverting and adjusting WPOS.
4624 * This code is unavoidable because it also depends on whether
4625 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4626 */
4627 static void
4628 emit_wpos_adjustment( struct st_translate *t,
4629 const struct gl_program *program,
4630 boolean invert,
4631 GLfloat adjX, GLfloat adjY[2])
4632 {
4633 struct ureg_program *ureg = t->ureg;
4634
4635 /* Fragment program uses fragment position input.
4636 * Need to replace instances of INPUT[WPOS] with temp T
4637 * where T = INPUT[WPOS] by y is inverted.
4638 */
4639 static const gl_state_index wposTransformState[STATE_LENGTH]
4640 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4641 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4642
4643 /* XXX: note we are modifying the incoming shader here! Need to
4644 * do this before emitting the constant decls below, or this
4645 * will be missed:
4646 */
4647 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4648 wposTransformState);
4649
4650 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4651 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4652 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4653
4654 /* First, apply the coordinate shift: */
4655 if (adjX || adjY[0] || adjY[1]) {
4656 if (adjY[0] != adjY[1]) {
4657 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4658 * depending on whether inversion is actually going to be applied
4659 * or not, which is determined by testing against the inversion
4660 * state variable used below, which will be either +1 or -1.
4661 */
4662 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4663
4664 ureg_CMP(ureg, adj_temp,
4665 ureg_scalar(wpostrans, invert ? 2 : 0),
4666 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4667 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4668 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4669 } else {
4670 ureg_ADD(ureg, wpos_temp, wpos_input,
4671 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4672 }
4673 wpos_input = ureg_src(wpos_temp);
4674 } else {
4675 /* MOV wpos_temp, input[wpos]
4676 */
4677 ureg_MOV( ureg, wpos_temp, wpos_input );
4678 }
4679
4680 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4681 * inversion/identity, or the other way around if we're drawing to an FBO.
4682 */
4683 if (invert) {
4684 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4685 */
4686 ureg_MAD( ureg,
4687 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4688 wpos_input,
4689 ureg_scalar(wpostrans, 0),
4690 ureg_scalar(wpostrans, 1));
4691 } else {
4692 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4693 */
4694 ureg_MAD( ureg,
4695 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4696 wpos_input,
4697 ureg_scalar(wpostrans, 2),
4698 ureg_scalar(wpostrans, 3));
4699 }
4700
4701 /* Use wpos_temp as position input from here on:
4702 */
4703 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4704 }
4705
4706
4707 /**
4708 * Emit fragment position/ooordinate code.
4709 */
4710 static void
4711 emit_wpos(struct st_context *st,
4712 struct st_translate *t,
4713 const struct gl_program *program,
4714 struct ureg_program *ureg)
4715 {
4716 const struct gl_fragment_program *fp =
4717 (const struct gl_fragment_program *) program;
4718 struct pipe_screen *pscreen = st->pipe->screen;
4719 GLfloat adjX = 0.0f;
4720 GLfloat adjY[2] = { 0.0f, 0.0f };
4721 boolean invert = FALSE;
4722
4723 /* Query the pixel center conventions supported by the pipe driver and set
4724 * adjX, adjY to help out if it cannot handle the requested one internally.
4725 *
4726 * The bias of the y-coordinate depends on whether y-inversion takes place
4727 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4728 * drawing to an FBO (causes additional inversion), and whether the the pipe
4729 * driver origin and the requested origin differ (the latter condition is
4730 * stored in the 'invert' variable).
4731 *
4732 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4733 *
4734 * center shift only:
4735 * i -> h: +0.5
4736 * h -> i: -0.5
4737 *
4738 * inversion only:
4739 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4740 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4741 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4742 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4743 *
4744 * inversion and center shift:
4745 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4746 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4747 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4748 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4749 */
4750 if (fp->OriginUpperLeft) {
4751 /* Fragment shader wants origin in upper-left */
4752 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4753 /* the driver supports upper-left origin */
4754 }
4755 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4756 /* the driver supports lower-left origin, need to invert Y */
4757 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4758 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4759 invert = TRUE;
4760 }
4761 else
4762 assert(0);
4763 }
4764 else {
4765 /* Fragment shader wants origin in lower-left */
4766 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4767 /* the driver supports lower-left origin */
4768 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_ORIGIN,
4769 TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4770 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4771 /* the driver supports upper-left origin, need to invert Y */
4772 invert = TRUE;
4773 else
4774 assert(0);
4775 }
4776
4777 if (fp->PixelCenterInteger) {
4778 /* Fragment shader wants pixel center integer */
4779 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4780 /* the driver supports pixel center integer */
4781 adjY[1] = 1.0f;
4782 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
4783 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4784 }
4785 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4786 /* the driver supports pixel center half integer, need to bias X,Y */
4787 adjX = -0.5f;
4788 adjY[0] = -0.5f;
4789 adjY[1] = 0.5f;
4790 }
4791 else
4792 assert(0);
4793 }
4794 else {
4795 /* Fragment shader wants pixel center half integer */
4796 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4797 /* the driver supports pixel center half integer */
4798 }
4799 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4800 /* the driver supports pixel center integer, need to bias X,Y */
4801 adjX = adjY[0] = adjY[1] = 0.5f;
4802 ureg_property(ureg, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
4803 TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4804 }
4805 else
4806 assert(0);
4807 }
4808
4809 /* we invert after adjustment so that we avoid the MOV to temporary,
4810 * and reuse the adjustment ADD instead */
4811 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4812 }
4813
4814 /**
4815 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4816 * TGSI uses +1 for front, -1 for back.
4817 * This function converts the TGSI value to the GL value. Simply clamping/
4818 * saturating the value to [0,1] does the job.
4819 */
4820 static void
4821 emit_face_var(struct gl_context *ctx, struct st_translate *t)
4822 {
4823 struct ureg_program *ureg = t->ureg;
4824 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4825 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4826
4827 if (ctx->Const.NativeIntegers) {
4828 ureg_FSGE(ureg, face_temp, face_input, ureg_imm1f(ureg, 0));
4829 }
4830 else {
4831 /* MOV_SAT face_temp, input[face] */
4832 ureg_MOV(ureg, ureg_saturate(face_temp), face_input);
4833 }
4834
4835 /* Use face_temp as face input from here on: */
4836 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4837 }
4838
4839 static void
4840 emit_edgeflags(struct st_translate *t)
4841 {
4842 struct ureg_program *ureg = t->ureg;
4843 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4844 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4845
4846 ureg_MOV(ureg, edge_dst, edge_src);
4847 }
4848
4849 /**
4850 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4851 * \param program the program to translate
4852 * \param numInputs number of input registers used
4853 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4854 * input indexes
4855 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4856 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4857 * each input
4858 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4859 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4860 * \param numOutputs number of output registers used
4861 * \param outputMapping maps Mesa fragment program outputs to TGSI
4862 * generic outputs
4863 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4864 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4865 * each output
4866 *
4867 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4868 */
4869 extern "C" enum pipe_error
4870 st_translate_program(
4871 struct gl_context *ctx,
4872 uint procType,
4873 struct ureg_program *ureg,
4874 glsl_to_tgsi_visitor *program,
4875 const struct gl_program *proginfo,
4876 GLuint numInputs,
4877 const GLuint inputMapping[],
4878 const ubyte inputSemanticName[],
4879 const ubyte inputSemanticIndex[],
4880 const GLuint interpMode[],
4881 const GLuint interpLocation[],
4882 GLuint numOutputs,
4883 const GLuint outputMapping[],
4884 const ubyte outputSemanticName[],
4885 const ubyte outputSemanticIndex[],
4886 boolean passthrough_edgeflags,
4887 boolean clamp_color)
4888 {
4889 struct st_translate *t;
4890 unsigned i;
4891 enum pipe_error ret = PIPE_OK;
4892
4893 assert(numInputs <= Elements(t->inputs));
4894 assert(numOutputs <= Elements(t->outputs));
4895
4896 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
4897 TGSI_SEMANTIC_FACE);
4898 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
4899 TGSI_SEMANTIC_VERTEXID);
4900 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
4901 TGSI_SEMANTIC_INSTANCEID);
4902 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
4903 TGSI_SEMANTIC_SAMPLEID);
4904 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
4905 TGSI_SEMANTIC_SAMPLEPOS);
4906 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
4907 TGSI_SEMANTIC_SAMPLEMASK);
4908 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
4909 TGSI_SEMANTIC_INVOCATIONID);
4910 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID_ZERO_BASE] ==
4911 TGSI_SEMANTIC_VERTEXID_NOBASE);
4912 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_BASE_VERTEX] ==
4913 TGSI_SEMANTIC_BASEVERTEX);
4914
4915 t = CALLOC_STRUCT(st_translate);
4916 if (!t) {
4917 ret = PIPE_ERROR_OUT_OF_MEMORY;
4918 goto out;
4919 }
4920
4921 memset(t, 0, sizeof *t);
4922
4923 t->procType = procType;
4924 t->inputMapping = inputMapping;
4925 t->outputMapping = outputMapping;
4926 t->ureg = ureg;
4927
4928 if (program->shader_program) {
4929 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4930 struct gl_uniform_storage *const storage =
4931 &program->shader_program->UniformStorage[i];
4932
4933 _mesa_uniform_detach_all_driver_storage(storage);
4934 }
4935 }
4936
4937 /*
4938 * Declare input attributes.
4939 */
4940 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4941 for (i = 0; i < numInputs; i++) {
4942 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4943 inputSemanticName[i],
4944 inputSemanticIndex[i],
4945 interpMode[i], 0,
4946 interpLocation[i]);
4947 }
4948
4949 if (proginfo->InputsRead & VARYING_BIT_POS) {
4950 /* Must do this after setting up t->inputs, and before
4951 * emitting constant references, below:
4952 */
4953 emit_wpos(st_context(ctx), t, proginfo, ureg);
4954 }
4955
4956 if (proginfo->InputsRead & VARYING_BIT_FACE)
4957 emit_face_var(ctx, t);
4958
4959 /*
4960 * Declare output attributes.
4961 */
4962 for (i = 0; i < numOutputs; i++) {
4963 switch (outputSemanticName[i]) {
4964 case TGSI_SEMANTIC_POSITION:
4965 t->outputs[i] = ureg_DECL_output(ureg,
4966 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4967 outputSemanticIndex[i]);
4968 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4969 break;
4970 case TGSI_SEMANTIC_STENCIL:
4971 t->outputs[i] = ureg_DECL_output(ureg,
4972 TGSI_SEMANTIC_STENCIL, /* Stencil */
4973 outputSemanticIndex[i]);
4974 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4975 break;
4976 case TGSI_SEMANTIC_COLOR:
4977 t->outputs[i] = ureg_DECL_output(ureg,
4978 TGSI_SEMANTIC_COLOR,
4979 outputSemanticIndex[i]);
4980 break;
4981 case TGSI_SEMANTIC_SAMPLEMASK:
4982 t->outputs[i] = ureg_DECL_output(ureg,
4983 TGSI_SEMANTIC_SAMPLEMASK,
4984 outputSemanticIndex[i]);
4985 /* TODO: If we ever support more than 32 samples, this will have
4986 * to become an array.
4987 */
4988 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4989 break;
4990 default:
4991 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4992 ret = PIPE_ERROR_BAD_INPUT;
4993 goto out;
4994 }
4995 }
4996 }
4997 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4998 for (i = 0; i < numInputs; i++) {
4999 t->inputs[i] = ureg_DECL_gs_input(ureg,
5000 i,
5001 inputSemanticName[i],
5002 inputSemanticIndex[i]);
5003 }
5004
5005 for (i = 0; i < numOutputs; i++) {
5006 t->outputs[i] = ureg_DECL_output(ureg,
5007 outputSemanticName[i],
5008 outputSemanticIndex[i]);
5009 }
5010 }
5011 else {
5012 assert(procType == TGSI_PROCESSOR_VERTEX);
5013
5014 for (i = 0; i < numInputs; i++) {
5015 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
5016 }
5017
5018 for (i = 0; i < numOutputs; i++) {
5019 t->outputs[i] = ureg_DECL_output(ureg,
5020 outputSemanticName[i],
5021 outputSemanticIndex[i]);
5022 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
5023 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5024 ureg_MOV(ureg,
5025 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
5026 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
5027 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5028 }
5029 }
5030 if (passthrough_edgeflags)
5031 emit_edgeflags(t);
5032 }
5033
5034 /* Declare address register.
5035 */
5036 if (program->num_address_regs > 0) {
5037 assert(program->num_address_regs <= 3);
5038 for (int i = 0; i < program->num_address_regs; i++)
5039 t->address[i] = ureg_DECL_address(ureg);
5040 }
5041
5042 /* Declare misc input registers
5043 */
5044 {
5045 GLbitfield sysInputs = proginfo->SystemValuesRead;
5046 unsigned numSys = 0;
5047 for (i = 0; sysInputs; i++) {
5048 if (sysInputs & (1 << i)) {
5049 unsigned semName = _mesa_sysval_to_semantic[i];
5050 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5051 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5052 semName == TGSI_SEMANTIC_VERTEXID) {
5053 /* From Gallium perspective, these system values are always
5054 * integer, and require native integer support. However, if
5055 * native integer is supported on the vertex stage but not the
5056 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5057 * assumes these system values are floats. To resolve the
5058 * inconsistency, we insert a U2F.
5059 */
5060 struct st_context *st = st_context(ctx);
5061 struct pipe_screen *pscreen = st->pipe->screen;
5062 assert(procType == TGSI_PROCESSOR_VERTEX);
5063 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5064 if (!ctx->Const.NativeIntegers) {
5065 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5066 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5067 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5068 }
5069 }
5070 numSys++;
5071 sysInputs &= ~(1 << i);
5072 }
5073 }
5074 }
5075
5076 /* Copy over array sizes
5077 */
5078 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5079
5080 /* Emit constants and uniforms. TGSI uses a single index space for these,
5081 * so we put all the translated regs in t->constants.
5082 */
5083 if (proginfo->Parameters) {
5084 t->constants = (struct ureg_src *)
5085 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5086 if (t->constants == NULL) {
5087 ret = PIPE_ERROR_OUT_OF_MEMORY;
5088 goto out;
5089 }
5090
5091 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5092 switch (proginfo->Parameters->Parameters[i].Type) {
5093 case PROGRAM_STATE_VAR:
5094 case PROGRAM_UNIFORM:
5095 t->constants[i] = ureg_DECL_constant(ureg, i);
5096 break;
5097
5098 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5099 * addressing of the const buffer.
5100 * FIXME: Be smarter and recognize param arrays:
5101 * indirect addressing is only valid within the referenced
5102 * array.
5103 */
5104 case PROGRAM_CONSTANT:
5105 if (program->indirect_addr_consts)
5106 t->constants[i] = ureg_DECL_constant(ureg, i);
5107 else
5108 t->constants[i] = emit_immediate(t,
5109 proginfo->Parameters->ParameterValues[i],
5110 proginfo->Parameters->Parameters[i].DataType,
5111 4);
5112 break;
5113 default:
5114 break;
5115 }
5116 }
5117 }
5118
5119 if (program->shader) {
5120 unsigned num_ubos = program->shader->NumUniformBlocks;
5121
5122 for (i = 0; i < num_ubos; i++) {
5123 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5124 unsigned num_const_vecs = (size + 15) / 16;
5125 unsigned first, last;
5126 assert(num_const_vecs > 0);
5127 first = 0;
5128 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5129 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5130 }
5131 }
5132
5133 /* Emit immediate values.
5134 */
5135 t->immediates = (struct ureg_src *)
5136 calloc(program->num_immediates, sizeof(struct ureg_src));
5137 if (t->immediates == NULL) {
5138 ret = PIPE_ERROR_OUT_OF_MEMORY;
5139 goto out;
5140 }
5141 i = 0;
5142 foreach_in_list(immediate_storage, imm, &program->immediates) {
5143 assert(i < program->num_immediates);
5144 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5145 }
5146 assert(i == program->num_immediates);
5147
5148 /* texture samplers */
5149 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5150 if (program->samplers_used & (1 << i)) {
5151 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5152 }
5153 }
5154
5155 /* Emit each instruction in turn:
5156 */
5157 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5158 set_insn_start(t, ureg_get_instruction_number(ureg));
5159 compile_tgsi_instruction(t, inst, clamp_color);
5160 }
5161
5162 /* Fix up all emitted labels:
5163 */
5164 for (i = 0; i < t->labels_count; i++) {
5165 ureg_fixup_label(ureg, t->labels[i].token,
5166 t->insn[t->labels[i].branch_target]);
5167 }
5168
5169 if (program->shader_program) {
5170 /* This has to be done last. Any operation the can cause
5171 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5172 * program constant) has to happen before creating this linkage.
5173 */
5174 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5175 if (program->shader_program->_LinkedShaders[i] == NULL)
5176 continue;
5177
5178 _mesa_associate_uniform_storage(ctx, program->shader_program,
5179 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5180 }
5181 }
5182
5183 out:
5184 if (t) {
5185 free(t->temps);
5186 free(t->insn);
5187 free(t->labels);
5188 free(t->constants);
5189 free(t->immediates);
5190
5191 if (t->error) {
5192 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5193 }
5194
5195 free(t);
5196 }
5197
5198 return ret;
5199 }
5200 /* ----------------------------- End TGSI code ------------------------------ */
5201
5202
5203 static unsigned
5204 shader_stage_to_ptarget(gl_shader_stage stage)
5205 {
5206 switch (stage) {
5207 case MESA_SHADER_VERTEX:
5208 return PIPE_SHADER_VERTEX;
5209 case MESA_SHADER_FRAGMENT:
5210 return PIPE_SHADER_FRAGMENT;
5211 case MESA_SHADER_GEOMETRY:
5212 return PIPE_SHADER_GEOMETRY;
5213 case MESA_SHADER_COMPUTE:
5214 return PIPE_SHADER_COMPUTE;
5215 }
5216
5217 assert(!"should not be reached");
5218 return PIPE_SHADER_VERTEX;
5219 }
5220
5221
5222 /**
5223 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5224 * generating Mesa IR.
5225 */
5226 static struct gl_program *
5227 get_mesa_program(struct gl_context *ctx,
5228 struct gl_shader_program *shader_program,
5229 struct gl_shader *shader)
5230 {
5231 glsl_to_tgsi_visitor* v;
5232 struct gl_program *prog;
5233 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5234 bool progress;
5235 struct gl_shader_compiler_options *options =
5236 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5237 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5238 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5239
5240 validate_ir_tree(shader->ir);
5241
5242 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5243 if (!prog)
5244 return NULL;
5245 prog->Parameters = _mesa_new_parameter_list();
5246 v = new glsl_to_tgsi_visitor();
5247 v->ctx = ctx;
5248 v->prog = prog;
5249 v->shader_program = shader_program;
5250 v->shader = shader;
5251 v->options = options;
5252 v->glsl_version = ctx->Const.GLSLVersion;
5253 v->native_integers = ctx->Const.NativeIntegers;
5254
5255 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5256 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5257
5258 _mesa_copy_linked_program_data(shader->Stage, shader_program, prog);
5259 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5260 prog->Parameters);
5261
5262 /* Remove reads from output registers. */
5263 lower_output_reads(shader->ir);
5264
5265 /* Emit intermediate IR for main(). */
5266 visit_exec_list(shader->ir, v);
5267
5268 /* Now emit bodies for any functions that were used. */
5269 do {
5270 progress = GL_FALSE;
5271
5272 foreach_in_list(function_entry, entry, &v->function_signatures) {
5273 if (!entry->bgn_inst) {
5274 v->current_function = entry;
5275
5276 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5277 entry->bgn_inst->function = entry;
5278
5279 visit_exec_list(&entry->sig->body, v);
5280
5281 glsl_to_tgsi_instruction *last;
5282 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5283 if (last->op != TGSI_OPCODE_RET)
5284 v->emit(NULL, TGSI_OPCODE_RET);
5285
5286 glsl_to_tgsi_instruction *end;
5287 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5288 end->function = entry;
5289
5290 progress = GL_TRUE;
5291 }
5292 }
5293 } while (progress);
5294
5295 #if 0
5296 /* Print out some information (for debugging purposes) used by the
5297 * optimization passes. */
5298 for (i=0; i < v->next_temp; i++) {
5299 int fr = v->get_first_temp_read(i);
5300 int fw = v->get_first_temp_write(i);
5301 int lr = v->get_last_temp_read(i);
5302 int lw = v->get_last_temp_write(i);
5303
5304 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5305 assert(fw <= fr);
5306 }
5307 #endif
5308
5309 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5310 v->simplify_cmp();
5311 v->copy_propagate();
5312 while (v->eliminate_dead_code());
5313
5314 v->merge_registers();
5315 v->renumber_registers();
5316
5317 /* Write the END instruction. */
5318 v->emit(NULL, TGSI_OPCODE_END);
5319
5320 if (ctx->_Shader->Flags & GLSL_DUMP) {
5321 printf("\n");
5322 printf("GLSL IR for linked %s program %d:\n",
5323 _mesa_shader_stage_to_string(shader->Stage),
5324 shader_program->Name);
5325 _mesa_print_ir(stdout, shader->ir, NULL);
5326 printf("\n");
5327 printf("\n");
5328 fflush(stdout);
5329 }
5330
5331 prog->Instructions = NULL;
5332 prog->NumInstructions = 0;
5333
5334 do_set_program_inouts(shader->ir, prog, shader->Stage);
5335 count_resources(v, prog);
5336
5337 _mesa_reference_program(ctx, &shader->Program, prog);
5338
5339 /* This has to be done last. Any operation the can cause
5340 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5341 * program constant) has to happen before creating this linkage.
5342 */
5343 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5344 if (!shader_program->LinkStatus) {
5345 return NULL;
5346 }
5347
5348 struct st_vertex_program *stvp;
5349 struct st_fragment_program *stfp;
5350 struct st_geometry_program *stgp;
5351
5352 switch (shader->Type) {
5353 case GL_VERTEX_SHADER:
5354 stvp = (struct st_vertex_program *)prog;
5355 stvp->glsl_to_tgsi = v;
5356 break;
5357 case GL_FRAGMENT_SHADER:
5358 stfp = (struct st_fragment_program *)prog;
5359 stfp->glsl_to_tgsi = v;
5360 break;
5361 case GL_GEOMETRY_SHADER:
5362 stgp = (struct st_geometry_program *)prog;
5363 stgp->glsl_to_tgsi = v;
5364 break;
5365 default:
5366 assert(!"should not be reached");
5367 return NULL;
5368 }
5369
5370 return prog;
5371 }
5372
5373 extern "C" {
5374
5375 /**
5376 * Link a shader.
5377 * Called via ctx->Driver.LinkShader()
5378 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5379 * with code lowering and other optimizations.
5380 */
5381 GLboolean
5382 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5383 {
5384 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5385 assert(prog->LinkStatus);
5386
5387 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5388 if (prog->_LinkedShaders[i] == NULL)
5389 continue;
5390
5391 bool progress;
5392 exec_list *ir = prog->_LinkedShaders[i]->ir;
5393 const struct gl_shader_compiler_options *options =
5394 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5395
5396 /* If there are forms of indirect addressing that the driver
5397 * cannot handle, perform the lowering pass.
5398 */
5399 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5400 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5401 lower_variable_index_to_cond_assign(ir,
5402 options->EmitNoIndirectInput,
5403 options->EmitNoIndirectOutput,
5404 options->EmitNoIndirectTemp,
5405 options->EmitNoIndirectUniform);
5406 }
5407
5408 if (ctx->Extensions.ARB_shading_language_packing) {
5409 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5410 LOWER_UNPACK_SNORM_2x16 |
5411 LOWER_PACK_UNORM_2x16 |
5412 LOWER_UNPACK_UNORM_2x16 |
5413 LOWER_PACK_SNORM_4x8 |
5414 LOWER_UNPACK_SNORM_4x8 |
5415 LOWER_UNPACK_UNORM_4x8 |
5416 LOWER_PACK_UNORM_4x8 |
5417 LOWER_PACK_HALF_2x16 |
5418 LOWER_UNPACK_HALF_2x16;
5419
5420 lower_packing_builtins(ir, lower_inst);
5421 }
5422
5423 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5424 lower_offset_arrays(ir);
5425 do_mat_op_to_vec(ir);
5426 lower_instructions(ir,
5427 MOD_TO_FRACT |
5428 DIV_TO_MUL_RCP |
5429 EXP_TO_EXP2 |
5430 LOG_TO_LOG2 |
5431 LDEXP_TO_ARITH |
5432 CARRY_TO_ARITH |
5433 BORROW_TO_ARITH |
5434 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5435 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) |
5436 (options->EmitNoSat ? SAT_TO_CLAMP : 0));
5437
5438 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5439 do_vec_index_to_cond_assign(ir);
5440 lower_vector_insert(ir, true);
5441 lower_quadop_vector(ir, false);
5442 lower_noise(ir);
5443 if (options->MaxIfDepth == 0) {
5444 lower_discard(ir);
5445 }
5446
5447 do {
5448 progress = false;
5449
5450 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5451
5452 progress = do_common_optimization(ir, true, true, options,
5453 ctx->Const.NativeIntegers)
5454 || progress;
5455
5456 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5457
5458 } while (progress);
5459
5460 validate_ir_tree(ir);
5461 }
5462
5463 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5464 struct gl_program *linked_prog;
5465
5466 if (prog->_LinkedShaders[i] == NULL)
5467 continue;
5468
5469 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5470
5471 if (linked_prog) {
5472 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5473 linked_prog);
5474 if (!ctx->Driver.ProgramStringNotify(ctx,
5475 _mesa_shader_stage_to_program(i),
5476 linked_prog)) {
5477 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5478 NULL);
5479 _mesa_reference_program(ctx, &linked_prog, NULL);
5480 return GL_FALSE;
5481 }
5482 }
5483
5484 _mesa_reference_program(ctx, &linked_prog, NULL);
5485 }
5486
5487 return GL_TRUE;
5488 }
5489
5490 void
5491 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5492 const GLuint outputMapping[],
5493 struct pipe_stream_output_info *so)
5494 {
5495 unsigned i;
5496 struct gl_transform_feedback_info *info =
5497 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5498
5499 for (i = 0; i < info->NumOutputs; i++) {
5500 so->output[i].register_index =
5501 outputMapping[info->Outputs[i].OutputRegister];
5502 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5503 so->output[i].num_components = info->Outputs[i].NumComponents;
5504 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5505 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5506 so->output[i].stream = info->Outputs[i].StreamId;
5507 }
5508
5509 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5510 so->stride[i] = info->BufferStride[i];
5511 }
5512 so->num_outputs = info->NumOutputs;
5513 }
5514
5515 } /* extern "C" */