r600g: Implement GL_ARB_texture_gather
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 #define MAX_GLSL_TEXTURE_OFFSET 4
91
92 class st_src_reg;
93 class st_dst_reg;
94
95 static int swizzle_for_size(int size);
96
97 /**
98 * This struct is a corresponding struct to TGSI ureg_src.
99 */
100 class st_src_reg {
101 public:
102 st_src_reg(gl_register_file file, int index, const glsl_type *type)
103 {
104 this->file = file;
105 this->index = index;
106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
107 this->swizzle = swizzle_for_size(type->vector_elements);
108 else
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->index2D = 0;
112 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
113 this->reladdr = NULL;
114 this->reladdr2 = NULL;
115 this->has_index2 = false;
116 }
117
118 st_src_reg(gl_register_file file, int index, int type)
119 {
120 this->type = type;
121 this->file = file;
122 this->index = index;
123 this->index2D = 0;
124 this->swizzle = SWIZZLE_XYZW;
125 this->negate = 0;
126 this->reladdr = NULL;
127 this->reladdr2 = NULL;
128 this->has_index2 = false;
129 }
130
131 st_src_reg(gl_register_file file, int index, int type, int index2D)
132 {
133 this->type = type;
134 this->file = file;
135 this->index = index;
136 this->index2D = index2D;
137 this->swizzle = SWIZZLE_XYZW;
138 this->negate = 0;
139 this->reladdr = NULL;
140 this->reladdr2 = NULL;
141 this->has_index2 = false;
142 }
143
144 st_src_reg()
145 {
146 this->type = GLSL_TYPE_ERROR;
147 this->file = PROGRAM_UNDEFINED;
148 this->index = 0;
149 this->index2D = 0;
150 this->swizzle = 0;
151 this->negate = 0;
152 this->reladdr = NULL;
153 this->reladdr2 = NULL;
154 this->has_index2 = false;
155 }
156
157 explicit st_src_reg(st_dst_reg reg);
158
159 gl_register_file file; /**< PROGRAM_* from Mesa */
160 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
161 int index2D;
162 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate; /**< NEGATE_XYZW mask from mesa */
164 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
166 st_src_reg *reladdr;
167 st_src_reg *reladdr2;
168 bool has_index2;
169 };
170
171 class st_dst_reg {
172 public:
173 st_dst_reg(gl_register_file file, int writemask, int type, int index)
174 {
175 this->file = file;
176 this->index = index;
177 this->writemask = writemask;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 this->type = type;
181 }
182
183 st_dst_reg(gl_register_file file, int writemask, int type)
184 {
185 this->file = file;
186 this->index = 0;
187 this->writemask = writemask;
188 this->cond_mask = COND_TR;
189 this->reladdr = NULL;
190 this->type = type;
191 }
192
193 st_dst_reg()
194 {
195 this->type = GLSL_TYPE_ERROR;
196 this->file = PROGRAM_UNDEFINED;
197 this->index = 0;
198 this->writemask = 0;
199 this->cond_mask = COND_TR;
200 this->reladdr = NULL;
201 }
202
203 explicit st_dst_reg(st_src_reg reg);
204
205 gl_register_file file; /**< PROGRAM_* from Mesa */
206 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
208 GLuint cond_mask:4;
209 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
211 st_src_reg *reladdr;
212 };
213
214 st_src_reg::st_src_reg(st_dst_reg reg)
215 {
216 this->type = reg.type;
217 this->file = reg.file;
218 this->index = reg.index;
219 this->swizzle = SWIZZLE_XYZW;
220 this->negate = 0;
221 this->reladdr = reg.reladdr;
222 this->index2D = 0;
223 this->reladdr2 = NULL;
224 this->has_index2 = false;
225 }
226
227 st_dst_reg::st_dst_reg(st_src_reg reg)
228 {
229 this->type = reg.type;
230 this->file = reg.file;
231 this->index = reg.index;
232 this->writemask = WRITEMASK_XYZW;
233 this->cond_mask = COND_TR;
234 this->reladdr = reg.reladdr;
235 }
236
237 class glsl_to_tgsi_instruction : public exec_node {
238 public:
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
240
241 unsigned op;
242 st_dst_reg dst;
243 st_src_reg src[4];
244 /** Pointer to the ir source this tree came from for debugging */
245 ir_instruction *ir;
246 GLboolean cond_update;
247 bool saturate;
248 int sampler; /**< sampler index */
249 int tex_target; /**< One of TEXTURE_*_INDEX */
250 GLboolean tex_shadow;
251
252 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
253 unsigned tex_offset_num_offset;
254 int dead_mask; /**< Used in dead code elimination */
255
256 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
257 };
258
259 class variable_storage : public exec_node {
260 public:
261 variable_storage(ir_variable *var, gl_register_file file, int index)
262 : file(file), index(index), var(var)
263 {
264 /* empty */
265 }
266
267 gl_register_file file;
268 int index;
269 ir_variable *var; /* variable that maps to this, if any */
270 };
271
272 class immediate_storage : public exec_node {
273 public:
274 immediate_storage(gl_constant_value *values, int size, int type)
275 {
276 memcpy(this->values, values, size * sizeof(gl_constant_value));
277 this->size = size;
278 this->type = type;
279 }
280
281 gl_constant_value values[4];
282 int size; /**< Number of components (1-4) */
283 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
284 };
285
286 class function_entry : public exec_node {
287 public:
288 ir_function_signature *sig;
289
290 /**
291 * identifier of this function signature used by the program.
292 *
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
297 */
298 int sig_id;
299
300 /**
301 * Pointer to first instruction of the function body.
302 *
303 * Set during function body emits after main() is processed.
304 */
305 glsl_to_tgsi_instruction *bgn_inst;
306
307 /**
308 * Index of the first instruction of the function body in actual TGSI.
309 *
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
311 */
312 int inst;
313
314 /** Storage for the return value. */
315 st_src_reg return_reg;
316 };
317
318 struct glsl_to_tgsi_visitor : public ir_visitor {
319 public:
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
322
323 function_entry *current_function;
324
325 struct gl_context *ctx;
326 struct gl_program *prog;
327 struct gl_shader_program *shader_program;
328 struct gl_shader *shader;
329 struct gl_shader_compiler_options *options;
330
331 int next_temp;
332
333 unsigned array_sizes[MAX_ARRAYS];
334 unsigned next_array;
335
336 int num_address_regs;
337 int samplers_used;
338 bool indirect_addr_consts;
339
340 int glsl_version;
341 bool native_integers;
342 bool have_sqrt;
343
344 variable_storage *find_variable_storage(ir_variable *var);
345
346 int add_constant(gl_register_file file, gl_constant_value values[4],
347 int size, int datatype, GLuint *swizzle_out);
348
349 function_entry *get_function_signature(ir_function_signature *sig);
350
351 st_src_reg get_temp(const glsl_type *type);
352 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
353
354 st_src_reg st_src_reg_for_float(float val);
355 st_src_reg st_src_reg_for_int(int val);
356 st_src_reg st_src_reg_for_type(int type, int val);
357
358 /**
359 * \name Visit methods
360 *
361 * As typical for the visitor pattern, there must be one \c visit method for
362 * each concrete subclass of \c ir_instruction. Virtual base classes within
363 * the hierarchy should not have \c visit methods.
364 */
365 /*@{*/
366 virtual void visit(ir_variable *);
367 virtual void visit(ir_loop *);
368 virtual void visit(ir_loop_jump *);
369 virtual void visit(ir_function_signature *);
370 virtual void visit(ir_function *);
371 virtual void visit(ir_expression *);
372 virtual void visit(ir_swizzle *);
373 virtual void visit(ir_dereference_variable *);
374 virtual void visit(ir_dereference_array *);
375 virtual void visit(ir_dereference_record *);
376 virtual void visit(ir_assignment *);
377 virtual void visit(ir_constant *);
378 virtual void visit(ir_call *);
379 virtual void visit(ir_return *);
380 virtual void visit(ir_discard *);
381 virtual void visit(ir_texture *);
382 virtual void visit(ir_if *);
383 virtual void visit(ir_emit_vertex *);
384 virtual void visit(ir_end_primitive *);
385 /*@}*/
386
387 st_src_reg result;
388
389 /** List of variable_storage */
390 exec_list variables;
391
392 /** List of immediate_storage */
393 exec_list immediates;
394 unsigned num_immediates;
395
396 /** List of function_entry */
397 exec_list function_signatures;
398 int next_signature_id;
399
400 /** List of glsl_to_tgsi_instruction */
401 exec_list instructions;
402
403 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
404
405 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
406 st_dst_reg dst, st_src_reg src0);
407
408 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
409 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
410
411 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
412 st_dst_reg dst,
413 st_src_reg src0, st_src_reg src1, st_src_reg src2);
414
415 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
416 st_dst_reg dst,
417 st_src_reg src0, st_src_reg src1,
418 st_src_reg src2, st_src_reg src3);
419
420 unsigned get_opcode(ir_instruction *ir, unsigned op,
421 st_dst_reg dst,
422 st_src_reg src0, st_src_reg src1);
423
424 /**
425 * Emit the correct dot-product instruction for the type of arguments
426 */
427 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
428 st_dst_reg dst,
429 st_src_reg src0,
430 st_src_reg src1,
431 unsigned elements);
432
433 void emit_scalar(ir_instruction *ir, unsigned op,
434 st_dst_reg dst, st_src_reg src0);
435
436 void emit_scalar(ir_instruction *ir, unsigned op,
437 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
438
439 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
440
441 void emit_scs(ir_instruction *ir, unsigned op,
442 st_dst_reg dst, const st_src_reg &src);
443
444 bool try_emit_mad(ir_expression *ir,
445 int mul_operand);
446 bool try_emit_mad_for_and_not(ir_expression *ir,
447 int mul_operand);
448 bool try_emit_sat(ir_expression *ir);
449
450 void emit_swz(ir_expression *ir);
451
452 bool process_move_condition(ir_rvalue *ir);
453
454 void simplify_cmp(void);
455
456 void rename_temp_register(int index, int new_index);
457 int get_first_temp_read(int index);
458 int get_first_temp_write(int index);
459 int get_last_temp_read(int index);
460 int get_last_temp_write(int index);
461
462 void copy_propagate(void);
463 int eliminate_dead_code(void);
464 void merge_registers(void);
465 void renumber_registers(void);
466
467 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
468 st_dst_reg *l, st_src_reg *r);
469
470 void *mem_ctx;
471 };
472
473 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
474
475 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
476
477 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
478 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
479
480 static void
481 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
482
483 static void
484 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
485 {
486 va_list args;
487 va_start(args, fmt);
488 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
489 va_end(args);
490
491 prog->LinkStatus = GL_FALSE;
492 }
493
494 static int
495 swizzle_for_size(int size)
496 {
497 int size_swizzles[4] = {
498 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
499 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
500 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
501 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
502 };
503
504 assert((size >= 1) && (size <= 4));
505 return size_swizzles[size - 1];
506 }
507
508 static bool
509 is_tex_instruction(unsigned opcode)
510 {
511 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
512 return info->is_tex;
513 }
514
515 static unsigned
516 num_inst_dst_regs(unsigned opcode)
517 {
518 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
519 return info->num_dst;
520 }
521
522 static unsigned
523 num_inst_src_regs(unsigned opcode)
524 {
525 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
526 return info->is_tex ? info->num_src - 1 : info->num_src;
527 }
528
529 glsl_to_tgsi_instruction *
530 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
531 st_dst_reg dst,
532 st_src_reg src0, st_src_reg src1,
533 st_src_reg src2, st_src_reg src3)
534 {
535 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
536 int num_reladdr = 0, i;
537
538 op = get_opcode(ir, op, dst, src0, src1);
539
540 /* If we have to do relative addressing, we want to load the ARL
541 * reg directly for one of the regs, and preload the other reladdr
542 * sources into temps.
543 */
544 num_reladdr += dst.reladdr != NULL;
545 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
546 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
547 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
548 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
549
550 reladdr_to_temp(ir, &src3, &num_reladdr);
551 reladdr_to_temp(ir, &src2, &num_reladdr);
552 reladdr_to_temp(ir, &src1, &num_reladdr);
553 reladdr_to_temp(ir, &src0, &num_reladdr);
554
555 if (dst.reladdr) {
556 emit_arl(ir, address_reg, *dst.reladdr);
557 num_reladdr--;
558 }
559 assert(num_reladdr == 0);
560
561 inst->op = op;
562 inst->dst = dst;
563 inst->src[0] = src0;
564 inst->src[1] = src1;
565 inst->src[2] = src2;
566 inst->src[3] = src3;
567 inst->ir = ir;
568 inst->dead_mask = 0;
569
570 inst->function = NULL;
571
572 /* Update indirect addressing status used by TGSI */
573 if (dst.reladdr) {
574 switch(dst.file) {
575 case PROGRAM_STATE_VAR:
576 case PROGRAM_CONSTANT:
577 case PROGRAM_UNIFORM:
578 this->indirect_addr_consts = true;
579 break;
580 case PROGRAM_IMMEDIATE:
581 assert(!"immediates should not have indirect addressing");
582 break;
583 default:
584 break;
585 }
586 }
587 else {
588 for (i=0; i<4; i++) {
589 if(inst->src[i].reladdr) {
590 switch(inst->src[i].file) {
591 case PROGRAM_STATE_VAR:
592 case PROGRAM_CONSTANT:
593 case PROGRAM_UNIFORM:
594 this->indirect_addr_consts = true;
595 break;
596 case PROGRAM_IMMEDIATE:
597 assert(!"immediates should not have indirect addressing");
598 break;
599 default:
600 break;
601 }
602 }
603 }
604 }
605
606 this->instructions.push_tail(inst);
607
608 return inst;
609 }
610
611 glsl_to_tgsi_instruction *
612 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
613 st_dst_reg dst, st_src_reg src0,
614 st_src_reg src1, st_src_reg src2)
615 {
616 return emit(ir, op, dst, src0, src1, src2, undef_src);
617 }
618
619 glsl_to_tgsi_instruction *
620 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
621 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
622 {
623 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
624 }
625
626 glsl_to_tgsi_instruction *
627 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
628 st_dst_reg dst, st_src_reg src0)
629 {
630 assert(dst.writemask != 0);
631 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
632 }
633
634 glsl_to_tgsi_instruction *
635 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
636 {
637 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
638 }
639
640 /**
641 * Determines whether to use an integer, unsigned integer, or float opcode
642 * based on the operands and input opcode, then emits the result.
643 */
644 unsigned
645 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
646 st_dst_reg dst,
647 st_src_reg src0, st_src_reg src1)
648 {
649 int type = GLSL_TYPE_FLOAT;
650
651 if (op == TGSI_OPCODE_MOV)
652 return op;
653
654 assert(src0.type != GLSL_TYPE_ARRAY);
655 assert(src0.type != GLSL_TYPE_STRUCT);
656 assert(src1.type != GLSL_TYPE_ARRAY);
657 assert(src1.type != GLSL_TYPE_STRUCT);
658
659 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
660 type = GLSL_TYPE_FLOAT;
661 else if (native_integers)
662 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
663
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) \
667 op = TGSI_OPCODE_##i; \
668 else if (type == GLSL_TYPE_UINT) \
669 op = TGSI_OPCODE_##u; \
670 else \
671 op = TGSI_OPCODE_##f; \
672 break;
673
674 #define case3(f, i, u) case4(f, f, i, u)
675 #define case2fi(f, i) case4(f, f, i, i)
676 #define case2iu(i, u) case4(i, LAST, i, u)
677
678 #define casecomp(c, f, i, u) \
679 case TGSI_OPCODE_##c: \
680 if (type == GLSL_TYPE_INT) \
681 op = TGSI_OPCODE_##i; \
682 else if (type == GLSL_TYPE_UINT) \
683 op = TGSI_OPCODE_##u; \
684 else if (native_integers) \
685 op = TGSI_OPCODE_##f; \
686 else \
687 op = TGSI_OPCODE_##c; \
688 break;
689
690 switch(op) {
691 case2fi(ADD, UADD);
692 case2fi(MUL, UMUL);
693 case2fi(MAD, UMAD);
694 case3(DIV, IDIV, UDIV);
695 case3(MAX, IMAX, UMAX);
696 case3(MIN, IMIN, UMIN);
697 case2iu(MOD, UMOD);
698
699 casecomp(SEQ, FSEQ, USEQ, USEQ);
700 casecomp(SNE, FSNE, USNE, USNE);
701 casecomp(SGE, FSGE, ISGE, USGE);
702 casecomp(SLT, FSLT, ISLT, USLT);
703
704 case2iu(ISHR, USHR);
705
706 case2fi(SSG, ISSG);
707 case3(ABS, IABS, IABS);
708
709 case2iu(IBFE, UBFE);
710 case2iu(IMSB, UMSB);
711 case2iu(IMUL_HI, UMUL_HI);
712 default: break;
713 }
714
715 assert(op != TGSI_OPCODE_LAST);
716 return op;
717 }
718
719 glsl_to_tgsi_instruction *
720 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
721 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
722 unsigned elements)
723 {
724 static const unsigned dot_opcodes[] = {
725 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
726 };
727
728 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
729 }
730
731 /**
732 * Emits TGSI scalar opcodes to produce unique answers across channels.
733 *
734 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
735 * channel determines the result across all channels. So to do a vec4
736 * of this operation, we want to emit a scalar per source channel used
737 * to produce dest channels.
738 */
739 void
740 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
741 st_dst_reg dst,
742 st_src_reg orig_src0, st_src_reg orig_src1)
743 {
744 int i, j;
745 int done_mask = ~dst.writemask;
746
747 /* TGSI RCP is a scalar operation splatting results to all channels,
748 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
749 * dst channels.
750 */
751 for (i = 0; i < 4; i++) {
752 GLuint this_mask = (1 << i);
753 glsl_to_tgsi_instruction *inst;
754 st_src_reg src0 = orig_src0;
755 st_src_reg src1 = orig_src1;
756
757 if (done_mask & this_mask)
758 continue;
759
760 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
761 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
762 for (j = i + 1; j < 4; j++) {
763 /* If there is another enabled component in the destination that is
764 * derived from the same inputs, generate its value on this pass as
765 * well.
766 */
767 if (!(done_mask & (1 << j)) &&
768 GET_SWZ(src0.swizzle, j) == src0_swiz &&
769 GET_SWZ(src1.swizzle, j) == src1_swiz) {
770 this_mask |= (1 << j);
771 }
772 }
773 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
774 src0_swiz, src0_swiz);
775 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
776 src1_swiz, src1_swiz);
777
778 inst = emit(ir, op, dst, src0, src1);
779 inst->dst.writemask = this_mask;
780 done_mask |= this_mask;
781 }
782 }
783
784 void
785 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
786 st_dst_reg dst, st_src_reg src0)
787 {
788 st_src_reg undef = undef_src;
789
790 undef.swizzle = SWIZZLE_XXXX;
791
792 emit_scalar(ir, op, dst, src0, undef);
793 }
794
795 void
796 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
797 st_dst_reg dst, st_src_reg src0)
798 {
799 int op = TGSI_OPCODE_ARL;
800
801 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
802 op = TGSI_OPCODE_UARL;
803
804 assert(dst.file == PROGRAM_ADDRESS);
805 if (dst.index >= this->num_address_regs)
806 this->num_address_regs = dst.index + 1;
807
808 emit(NULL, op, dst, src0);
809 }
810
811 /**
812 * Emit an TGSI_OPCODE_SCS instruction
813 *
814 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
815 * Instead of splatting its result across all four components of the
816 * destination, it writes one value to the \c x component and another value to
817 * the \c y component.
818 *
819 * \param ir IR instruction being processed
820 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
821 * on which value is desired.
822 * \param dst Destination register
823 * \param src Source register
824 */
825 void
826 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
827 st_dst_reg dst,
828 const st_src_reg &src)
829 {
830 /* Vertex programs cannot use the SCS opcode.
831 */
832 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
833 emit_scalar(ir, op, dst, src);
834 return;
835 }
836
837 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
838 const unsigned scs_mask = (1U << component);
839 int done_mask = ~dst.writemask;
840 st_src_reg tmp;
841
842 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
843
844 /* If there are compnents in the destination that differ from the component
845 * that will be written by the SCS instrution, we'll need a temporary.
846 */
847 if (scs_mask != unsigned(dst.writemask)) {
848 tmp = get_temp(glsl_type::vec4_type);
849 }
850
851 for (unsigned i = 0; i < 4; i++) {
852 unsigned this_mask = (1U << i);
853 st_src_reg src0 = src;
854
855 if ((done_mask & this_mask) != 0)
856 continue;
857
858 /* The source swizzle specified which component of the source generates
859 * sine / cosine for the current component in the destination. The SCS
860 * instruction requires that this value be swizzle to the X component.
861 * Replace the current swizzle with a swizzle that puts the source in
862 * the X component.
863 */
864 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
865
866 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
867 src0_swiz, src0_swiz);
868 for (unsigned j = i + 1; j < 4; j++) {
869 /* If there is another enabled component in the destination that is
870 * derived from the same inputs, generate its value on this pass as
871 * well.
872 */
873 if (!(done_mask & (1 << j)) &&
874 GET_SWZ(src0.swizzle, j) == src0_swiz) {
875 this_mask |= (1 << j);
876 }
877 }
878
879 if (this_mask != scs_mask) {
880 glsl_to_tgsi_instruction *inst;
881 st_dst_reg tmp_dst = st_dst_reg(tmp);
882
883 /* Emit the SCS instruction.
884 */
885 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
886 inst->dst.writemask = scs_mask;
887
888 /* Move the result of the SCS instruction to the desired location in
889 * the destination.
890 */
891 tmp.swizzle = MAKE_SWIZZLE4(component, component,
892 component, component);
893 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
894 inst->dst.writemask = this_mask;
895 } else {
896 /* Emit the SCS instruction to write directly to the destination.
897 */
898 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
899 inst->dst.writemask = scs_mask;
900 }
901
902 done_mask |= this_mask;
903 }
904 }
905
906 int
907 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
908 gl_constant_value values[4], int size, int datatype,
909 GLuint *swizzle_out)
910 {
911 if (file == PROGRAM_CONSTANT) {
912 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
913 size, datatype, swizzle_out);
914 } else {
915 int index = 0;
916 immediate_storage *entry;
917 assert(file == PROGRAM_IMMEDIATE);
918
919 /* Search immediate storage to see if we already have an identical
920 * immediate that we can use instead of adding a duplicate entry.
921 */
922 foreach_in_list(immediate_storage, entry, &this->immediates) {
923 if (entry->size == size &&
924 entry->type == datatype &&
925 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
926 return index;
927 }
928 index++;
929 }
930
931 /* Add this immediate to the list. */
932 entry = new(mem_ctx) immediate_storage(values, size, datatype);
933 this->immediates.push_tail(entry);
934 this->num_immediates++;
935 return index;
936 }
937 }
938
939 st_src_reg
940 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
941 {
942 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
943 union gl_constant_value uval;
944
945 uval.f = val;
946 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
947
948 return src;
949 }
950
951 st_src_reg
952 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
953 {
954 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
955 union gl_constant_value uval;
956
957 assert(native_integers);
958
959 uval.i = val;
960 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
961
962 return src;
963 }
964
965 st_src_reg
966 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
967 {
968 if (native_integers)
969 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
970 st_src_reg_for_int(val);
971 else
972 return st_src_reg_for_float(val);
973 }
974
975 static int
976 type_size(const struct glsl_type *type)
977 {
978 unsigned int i;
979 int size;
980
981 switch (type->base_type) {
982 case GLSL_TYPE_UINT:
983 case GLSL_TYPE_INT:
984 case GLSL_TYPE_FLOAT:
985 case GLSL_TYPE_BOOL:
986 if (type->is_matrix()) {
987 return type->matrix_columns;
988 } else {
989 /* Regardless of size of vector, it gets a vec4. This is bad
990 * packing for things like floats, but otherwise arrays become a
991 * mess. Hopefully a later pass over the code can pack scalars
992 * down if appropriate.
993 */
994 return 1;
995 }
996 case GLSL_TYPE_ARRAY:
997 assert(type->length > 0);
998 return type_size(type->fields.array) * type->length;
999 case GLSL_TYPE_STRUCT:
1000 size = 0;
1001 for (i = 0; i < type->length; i++) {
1002 size += type_size(type->fields.structure[i].type);
1003 }
1004 return size;
1005 case GLSL_TYPE_SAMPLER:
1006 case GLSL_TYPE_IMAGE:
1007 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1008 * at link time.
1009 */
1010 return 1;
1011 case GLSL_TYPE_ATOMIC_UINT:
1012 case GLSL_TYPE_INTERFACE:
1013 case GLSL_TYPE_VOID:
1014 case GLSL_TYPE_ERROR:
1015 assert(!"Invalid type in type_size");
1016 break;
1017 }
1018 return 0;
1019 }
1020
1021 /**
1022 * In the initial pass of codegen, we assign temporary numbers to
1023 * intermediate results. (not SSA -- variable assignments will reuse
1024 * storage).
1025 */
1026 st_src_reg
1027 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1028 {
1029 st_src_reg src;
1030
1031 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1032 src.reladdr = NULL;
1033 src.negate = 0;
1034
1035 if (!options->EmitNoIndirectTemp &&
1036 (type->is_array() || type->is_matrix())) {
1037
1038 src.file = PROGRAM_ARRAY;
1039 src.index = next_array << 16 | 0x8000;
1040 array_sizes[next_array] = type_size(type);
1041 ++next_array;
1042
1043 } else {
1044 src.file = PROGRAM_TEMPORARY;
1045 src.index = next_temp;
1046 next_temp += type_size(type);
1047 }
1048
1049 if (type->is_array() || type->is_record()) {
1050 src.swizzle = SWIZZLE_NOOP;
1051 } else {
1052 src.swizzle = swizzle_for_size(type->vector_elements);
1053 }
1054
1055 return src;
1056 }
1057
1058 variable_storage *
1059 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1060 {
1061
1062 foreach_in_list(variable_storage, entry, &this->variables) {
1063 if (entry->var == var)
1064 return entry;
1065 }
1066
1067 return NULL;
1068 }
1069
1070 void
1071 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1072 {
1073 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1074 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1075
1076 fp->OriginUpperLeft = ir->data.origin_upper_left;
1077 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1078 }
1079
1080 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1081 unsigned int i;
1082 const ir_state_slot *const slots = ir->state_slots;
1083 assert(ir->state_slots != NULL);
1084
1085 /* Check if this statevar's setup in the STATE file exactly
1086 * matches how we'll want to reference it as a
1087 * struct/array/whatever. If not, then we need to move it into
1088 * temporary storage and hope that it'll get copy-propagated
1089 * out.
1090 */
1091 for (i = 0; i < ir->num_state_slots; i++) {
1092 if (slots[i].swizzle != SWIZZLE_XYZW) {
1093 break;
1094 }
1095 }
1096
1097 variable_storage *storage;
1098 st_dst_reg dst;
1099 if (i == ir->num_state_slots) {
1100 /* We'll set the index later. */
1101 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1102 this->variables.push_tail(storage);
1103
1104 dst = undef_dst;
1105 } else {
1106 /* The variable_storage constructor allocates slots based on the size
1107 * of the type. However, this had better match the number of state
1108 * elements that we're going to copy into the new temporary.
1109 */
1110 assert((int) ir->num_state_slots == type_size(ir->type));
1111
1112 dst = st_dst_reg(get_temp(ir->type));
1113
1114 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1115
1116 this->variables.push_tail(storage);
1117 }
1118
1119
1120 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1121 int index = _mesa_add_state_reference(this->prog->Parameters,
1122 (gl_state_index *)slots[i].tokens);
1123
1124 if (storage->file == PROGRAM_STATE_VAR) {
1125 if (storage->index == -1) {
1126 storage->index = index;
1127 } else {
1128 assert(index == storage->index + (int)i);
1129 }
1130 } else {
1131 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1132 * the data being moved since MOV does not care about the type of
1133 * data it is moving, and we don't want to declare registers with
1134 * array or struct types.
1135 */
1136 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1137 src.swizzle = slots[i].swizzle;
1138 emit(ir, TGSI_OPCODE_MOV, dst, src);
1139 /* even a float takes up a whole vec4 reg in a struct/array. */
1140 dst.index++;
1141 }
1142 }
1143
1144 if (storage->file == PROGRAM_TEMPORARY &&
1145 dst.index != storage->index + (int) ir->num_state_slots) {
1146 fail_link(this->shader_program,
1147 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1148 ir->name, dst.index - storage->index,
1149 type_size(ir->type));
1150 }
1151 }
1152 }
1153
1154 void
1155 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1156 {
1157 emit(NULL, TGSI_OPCODE_BGNLOOP);
1158
1159 visit_exec_list(&ir->body_instructions, this);
1160
1161 emit(NULL, TGSI_OPCODE_ENDLOOP);
1162 }
1163
1164 void
1165 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1166 {
1167 switch (ir->mode) {
1168 case ir_loop_jump::jump_break:
1169 emit(NULL, TGSI_OPCODE_BRK);
1170 break;
1171 case ir_loop_jump::jump_continue:
1172 emit(NULL, TGSI_OPCODE_CONT);
1173 break;
1174 }
1175 }
1176
1177
1178 void
1179 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1180 {
1181 assert(0);
1182 (void)ir;
1183 }
1184
1185 void
1186 glsl_to_tgsi_visitor::visit(ir_function *ir)
1187 {
1188 /* Ignore function bodies other than main() -- we shouldn't see calls to
1189 * them since they should all be inlined before we get to glsl_to_tgsi.
1190 */
1191 if (strcmp(ir->name, "main") == 0) {
1192 const ir_function_signature *sig;
1193 exec_list empty;
1194
1195 sig = ir->matching_signature(NULL, &empty);
1196
1197 assert(sig);
1198
1199 foreach_in_list(ir_instruction, ir, &sig->body) {
1200 ir->accept(this);
1201 }
1202 }
1203 }
1204
1205 bool
1206 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1207 {
1208 int nonmul_operand = 1 - mul_operand;
1209 st_src_reg a, b, c;
1210 st_dst_reg result_dst;
1211
1212 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1213 if (!expr || expr->operation != ir_binop_mul)
1214 return false;
1215
1216 expr->operands[0]->accept(this);
1217 a = this->result;
1218 expr->operands[1]->accept(this);
1219 b = this->result;
1220 ir->operands[nonmul_operand]->accept(this);
1221 c = this->result;
1222
1223 this->result = get_temp(ir->type);
1224 result_dst = st_dst_reg(this->result);
1225 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1226 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1227
1228 return true;
1229 }
1230
1231 /**
1232 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1233 *
1234 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1235 * implemented using multiplication, and logical-or is implemented using
1236 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1237 * As result, the logical expression (a & !b) can be rewritten as:
1238 *
1239 * - a * !b
1240 * - a * (1 - b)
1241 * - (a * 1) - (a * b)
1242 * - a + -(a * b)
1243 * - a + (a * -b)
1244 *
1245 * This final expression can be implemented as a single MAD(a, -b, a)
1246 * instruction.
1247 */
1248 bool
1249 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1250 {
1251 const int other_operand = 1 - try_operand;
1252 st_src_reg a, b;
1253
1254 ir_expression *expr = ir->operands[try_operand]->as_expression();
1255 if (!expr || expr->operation != ir_unop_logic_not)
1256 return false;
1257
1258 ir->operands[other_operand]->accept(this);
1259 a = this->result;
1260 expr->operands[0]->accept(this);
1261 b = this->result;
1262
1263 b.negate = ~b.negate;
1264
1265 this->result = get_temp(ir->type);
1266 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1267
1268 return true;
1269 }
1270
1271 bool
1272 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1273 {
1274 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1275 */
1276 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1277 !st_context(this->ctx)->has_shader_model3) {
1278 return false;
1279 }
1280
1281 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1282 if (!sat_src)
1283 return false;
1284
1285 sat_src->accept(this);
1286 st_src_reg src = this->result;
1287
1288 /* If we generated an expression instruction into a temporary in
1289 * processing the saturate's operand, apply the saturate to that
1290 * instruction. Otherwise, generate a MOV to do the saturate.
1291 *
1292 * Note that we have to be careful to only do this optimization if
1293 * the instruction in question was what generated src->result. For
1294 * example, ir_dereference_array might generate a MUL instruction
1295 * to create the reladdr, and return us a src reg using that
1296 * reladdr. That MUL result is not the value we're trying to
1297 * saturate.
1298 */
1299 ir_expression *sat_src_expr = sat_src->as_expression();
1300 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1301 sat_src_expr->operation == ir_binop_add ||
1302 sat_src_expr->operation == ir_binop_dot)) {
1303 glsl_to_tgsi_instruction *new_inst;
1304 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1305 new_inst->saturate = true;
1306 } else {
1307 this->result = get_temp(ir->type);
1308 st_dst_reg result_dst = st_dst_reg(this->result);
1309 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1310 glsl_to_tgsi_instruction *inst;
1311 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1312 inst->saturate = true;
1313 }
1314
1315 return true;
1316 }
1317
1318 void
1319 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1320 st_src_reg *reg, int *num_reladdr)
1321 {
1322 if (!reg->reladdr && !reg->reladdr2)
1323 return;
1324
1325 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1326 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1327
1328 if (*num_reladdr != 1) {
1329 st_src_reg temp = get_temp(glsl_type::vec4_type);
1330
1331 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1332 *reg = temp;
1333 }
1334
1335 (*num_reladdr)--;
1336 }
1337
1338 void
1339 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1340 {
1341 unsigned int operand;
1342 st_src_reg op[Elements(ir->operands)];
1343 st_src_reg result_src;
1344 st_dst_reg result_dst;
1345
1346 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1347 */
1348 if (ir->operation == ir_binop_add) {
1349 if (try_emit_mad(ir, 1))
1350 return;
1351 if (try_emit_mad(ir, 0))
1352 return;
1353 }
1354
1355 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1356 */
1357 if (ir->operation == ir_binop_logic_and) {
1358 if (try_emit_mad_for_and_not(ir, 1))
1359 return;
1360 if (try_emit_mad_for_and_not(ir, 0))
1361 return;
1362 }
1363
1364 if (try_emit_sat(ir))
1365 return;
1366
1367 if (ir->operation == ir_quadop_vector)
1368 assert(!"ir_quadop_vector should have been lowered");
1369
1370 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1371 this->result.file = PROGRAM_UNDEFINED;
1372 ir->operands[operand]->accept(this);
1373 if (this->result.file == PROGRAM_UNDEFINED) {
1374 printf("Failed to get tree for expression operand:\n");
1375 ir->operands[operand]->print();
1376 printf("\n");
1377 exit(1);
1378 }
1379 op[operand] = this->result;
1380
1381 /* Matrix expression operands should have been broken down to vector
1382 * operations already.
1383 */
1384 assert(!ir->operands[operand]->type->is_matrix());
1385 }
1386
1387 int vector_elements = ir->operands[0]->type->vector_elements;
1388 if (ir->operands[1]) {
1389 vector_elements = MAX2(vector_elements,
1390 ir->operands[1]->type->vector_elements);
1391 }
1392
1393 this->result.file = PROGRAM_UNDEFINED;
1394
1395 /* Storage for our result. Ideally for an assignment we'd be using
1396 * the actual storage for the result here, instead.
1397 */
1398 result_src = get_temp(ir->type);
1399 /* convenience for the emit functions below. */
1400 result_dst = st_dst_reg(result_src);
1401 /* Limit writes to the channels that will be used by result_src later.
1402 * This does limit this temp's use as a temporary for multi-instruction
1403 * sequences.
1404 */
1405 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1406
1407 switch (ir->operation) {
1408 case ir_unop_logic_not:
1409 if (result_dst.type != GLSL_TYPE_FLOAT)
1410 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1411 else {
1412 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1413 * older GPUs implement SEQ using multiple instructions (i915 uses two
1414 * SGE instructions and a MUL instruction). Since our logic values are
1415 * 0.0 and 1.0, 1-x also implements !x.
1416 */
1417 op[0].negate = ~op[0].negate;
1418 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1419 }
1420 break;
1421 case ir_unop_neg:
1422 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1423 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1424 else {
1425 op[0].negate = ~op[0].negate;
1426 result_src = op[0];
1427 }
1428 break;
1429 case ir_unop_abs:
1430 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1431 break;
1432 case ir_unop_sign:
1433 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1434 break;
1435 case ir_unop_rcp:
1436 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1437 break;
1438
1439 case ir_unop_exp2:
1440 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1441 break;
1442 case ir_unop_exp:
1443 case ir_unop_log:
1444 assert(!"not reached: should be handled by ir_explog_to_explog2");
1445 break;
1446 case ir_unop_log2:
1447 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1448 break;
1449 case ir_unop_sin:
1450 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1451 break;
1452 case ir_unop_cos:
1453 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1454 break;
1455 case ir_unop_sin_reduced:
1456 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1457 break;
1458 case ir_unop_cos_reduced:
1459 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1460 break;
1461
1462 case ir_unop_dFdx:
1463 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1464 break;
1465 case ir_unop_dFdy:
1466 {
1467 /* The X component contains 1 or -1 depending on whether the framebuffer
1468 * is a FBO or the window system buffer, respectively.
1469 * It is then multiplied with the source operand of DDY.
1470 */
1471 static const gl_state_index transform_y_state[STATE_LENGTH]
1472 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1473
1474 unsigned transform_y_index =
1475 _mesa_add_state_reference(this->prog->Parameters,
1476 transform_y_state);
1477
1478 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1479 transform_y_index,
1480 glsl_type::vec4_type);
1481 transform_y.swizzle = SWIZZLE_XXXX;
1482
1483 st_src_reg temp = get_temp(glsl_type::vec4_type);
1484
1485 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1486 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1487 break;
1488 }
1489
1490 case ir_unop_noise: {
1491 /* At some point, a motivated person could add a better
1492 * implementation of noise. Currently not even the nvidia
1493 * binary drivers do anything more than this. In any case, the
1494 * place to do this is in the GL state tracker, not the poor
1495 * driver.
1496 */
1497 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1498 break;
1499 }
1500
1501 case ir_binop_add:
1502 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1503 break;
1504 case ir_binop_sub:
1505 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1506 break;
1507
1508 case ir_binop_mul:
1509 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1510 break;
1511 case ir_binop_div:
1512 if (result_dst.type == GLSL_TYPE_FLOAT)
1513 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1514 else
1515 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1516 break;
1517 case ir_binop_mod:
1518 if (result_dst.type == GLSL_TYPE_FLOAT)
1519 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1520 else
1521 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1522 break;
1523
1524 case ir_binop_less:
1525 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1526 break;
1527 case ir_binop_greater:
1528 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1529 break;
1530 case ir_binop_lequal:
1531 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1532 break;
1533 case ir_binop_gequal:
1534 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1535 break;
1536 case ir_binop_equal:
1537 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1538 break;
1539 case ir_binop_nequal:
1540 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1541 break;
1542 case ir_binop_all_equal:
1543 /* "==" operator producing a scalar boolean. */
1544 if (ir->operands[0]->type->is_vector() ||
1545 ir->operands[1]->type->is_vector()) {
1546 st_src_reg temp = get_temp(native_integers ?
1547 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1548 glsl_type::vec4_type);
1549
1550 if (native_integers) {
1551 st_dst_reg temp_dst = st_dst_reg(temp);
1552 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1553
1554 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1555
1556 /* Emit 1-3 AND operations to combine the SEQ results. */
1557 switch (ir->operands[0]->type->vector_elements) {
1558 case 2:
1559 break;
1560 case 3:
1561 temp_dst.writemask = WRITEMASK_Y;
1562 temp1.swizzle = SWIZZLE_YYYY;
1563 temp2.swizzle = SWIZZLE_ZZZZ;
1564 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1565 break;
1566 case 4:
1567 temp_dst.writemask = WRITEMASK_X;
1568 temp1.swizzle = SWIZZLE_XXXX;
1569 temp2.swizzle = SWIZZLE_YYYY;
1570 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1571 temp_dst.writemask = WRITEMASK_Y;
1572 temp1.swizzle = SWIZZLE_ZZZZ;
1573 temp2.swizzle = SWIZZLE_WWWW;
1574 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1575 }
1576
1577 temp1.swizzle = SWIZZLE_XXXX;
1578 temp2.swizzle = SWIZZLE_YYYY;
1579 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1580 } else {
1581 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1582
1583 /* After the dot-product, the value will be an integer on the
1584 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1585 */
1586 emit_dp(ir, result_dst, temp, temp, vector_elements);
1587
1588 /* Negating the result of the dot-product gives values on the range
1589 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1590 * This is achieved using SGE.
1591 */
1592 st_src_reg sge_src = result_src;
1593 sge_src.negate = ~sge_src.negate;
1594 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1595 }
1596 } else {
1597 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1598 }
1599 break;
1600 case ir_binop_any_nequal:
1601 /* "!=" operator producing a scalar boolean. */
1602 if (ir->operands[0]->type->is_vector() ||
1603 ir->operands[1]->type->is_vector()) {
1604 st_src_reg temp = get_temp(native_integers ?
1605 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1606 glsl_type::vec4_type);
1607 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1608
1609 if (native_integers) {
1610 st_dst_reg temp_dst = st_dst_reg(temp);
1611 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1612
1613 /* Emit 1-3 OR operations to combine the SNE results. */
1614 switch (ir->operands[0]->type->vector_elements) {
1615 case 2:
1616 break;
1617 case 3:
1618 temp_dst.writemask = WRITEMASK_Y;
1619 temp1.swizzle = SWIZZLE_YYYY;
1620 temp2.swizzle = SWIZZLE_ZZZZ;
1621 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1622 break;
1623 case 4:
1624 temp_dst.writemask = WRITEMASK_X;
1625 temp1.swizzle = SWIZZLE_XXXX;
1626 temp2.swizzle = SWIZZLE_YYYY;
1627 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1628 temp_dst.writemask = WRITEMASK_Y;
1629 temp1.swizzle = SWIZZLE_ZZZZ;
1630 temp2.swizzle = SWIZZLE_WWWW;
1631 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1632 }
1633
1634 temp1.swizzle = SWIZZLE_XXXX;
1635 temp2.swizzle = SWIZZLE_YYYY;
1636 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1637 } else {
1638 /* After the dot-product, the value will be an integer on the
1639 * range [0,4]. Zero stays zero, and positive values become 1.0.
1640 */
1641 glsl_to_tgsi_instruction *const dp =
1642 emit_dp(ir, result_dst, temp, temp, vector_elements);
1643 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1644 /* The clamping to [0,1] can be done for free in the fragment
1645 * shader with a saturate.
1646 */
1647 dp->saturate = true;
1648 } else {
1649 /* Negating the result of the dot-product gives values on the range
1650 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1651 * achieved using SLT.
1652 */
1653 st_src_reg slt_src = result_src;
1654 slt_src.negate = ~slt_src.negate;
1655 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1656 }
1657 }
1658 } else {
1659 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1660 }
1661 break;
1662
1663 case ir_unop_any: {
1664 assert(ir->operands[0]->type->is_vector());
1665
1666 if (native_integers) {
1667 int dst_swizzle = 0, op0_swizzle, i;
1668 st_src_reg accum = op[0];
1669
1670 op0_swizzle = op[0].swizzle;
1671 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1672 GET_SWZ(op0_swizzle, 0),
1673 GET_SWZ(op0_swizzle, 0),
1674 GET_SWZ(op0_swizzle, 0));
1675 for (i = 0; i < 4; i++) {
1676 if (result_dst.writemask & (1 << i)) {
1677 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1678 break;
1679 }
1680 }
1681 assert(i != 4);
1682 assert(ir->operands[0]->type->is_boolean());
1683
1684 /* OR all the components together, since they should be either 0 or ~0
1685 */
1686 switch (ir->operands[0]->type->vector_elements) {
1687 case 4:
1688 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1689 GET_SWZ(op0_swizzle, 3),
1690 GET_SWZ(op0_swizzle, 3),
1691 GET_SWZ(op0_swizzle, 3));
1692 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1693 accum = st_src_reg(result_dst);
1694 accum.swizzle = dst_swizzle;
1695 /* fallthrough */
1696 case 3:
1697 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1698 GET_SWZ(op0_swizzle, 2),
1699 GET_SWZ(op0_swizzle, 2),
1700 GET_SWZ(op0_swizzle, 2));
1701 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1702 accum = st_src_reg(result_dst);
1703 accum.swizzle = dst_swizzle;
1704 /* fallthrough */
1705 case 2:
1706 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1707 GET_SWZ(op0_swizzle, 1),
1708 GET_SWZ(op0_swizzle, 1),
1709 GET_SWZ(op0_swizzle, 1));
1710 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1711 break;
1712 default:
1713 assert(!"Unexpected vector size");
1714 break;
1715 }
1716 } else {
1717 /* After the dot-product, the value will be an integer on the
1718 * range [0,4]. Zero stays zero, and positive values become 1.0.
1719 */
1720 glsl_to_tgsi_instruction *const dp =
1721 emit_dp(ir, result_dst, op[0], op[0],
1722 ir->operands[0]->type->vector_elements);
1723 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1724 result_dst.type == GLSL_TYPE_FLOAT) {
1725 /* The clamping to [0,1] can be done for free in the fragment
1726 * shader with a saturate.
1727 */
1728 dp->saturate = true;
1729 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1730 /* Negating the result of the dot-product gives values on the range
1731 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1732 * is achieved using SLT.
1733 */
1734 st_src_reg slt_src = result_src;
1735 slt_src.negate = ~slt_src.negate;
1736 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1737 }
1738 else {
1739 /* Use SNE 0 if integers are being used as boolean values. */
1740 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1741 }
1742 }
1743 break;
1744 }
1745
1746 case ir_binop_logic_xor:
1747 if (native_integers)
1748 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1749 else
1750 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1751 break;
1752
1753 case ir_binop_logic_or: {
1754 if (native_integers) {
1755 /* If integers are used as booleans, we can use an actual "or"
1756 * instruction.
1757 */
1758 assert(native_integers);
1759 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1760 } else {
1761 /* After the addition, the value will be an integer on the
1762 * range [0,2]. Zero stays zero, and positive values become 1.0.
1763 */
1764 glsl_to_tgsi_instruction *add =
1765 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1766 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1767 /* The clamping to [0,1] can be done for free in the fragment
1768 * shader with a saturate if floats are being used as boolean values.
1769 */
1770 add->saturate = true;
1771 } else {
1772 /* Negating the result of the addition gives values on the range
1773 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1774 * is achieved using SLT.
1775 */
1776 st_src_reg slt_src = result_src;
1777 slt_src.negate = ~slt_src.negate;
1778 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1779 }
1780 }
1781 break;
1782 }
1783
1784 case ir_binop_logic_and:
1785 /* If native integers are disabled, the bool args are stored as float 0.0
1786 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1787 * actual AND opcode.
1788 */
1789 if (native_integers)
1790 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1791 else
1792 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1793 break;
1794
1795 case ir_binop_dot:
1796 assert(ir->operands[0]->type->is_vector());
1797 assert(ir->operands[0]->type == ir->operands[1]->type);
1798 emit_dp(ir, result_dst, op[0], op[1],
1799 ir->operands[0]->type->vector_elements);
1800 break;
1801
1802 case ir_unop_sqrt:
1803 if (have_sqrt) {
1804 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1805 }
1806 else {
1807 /* sqrt(x) = x * rsq(x). */
1808 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1809 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1810 /* For incoming channels <= 0, set the result to 0. */
1811 op[0].negate = ~op[0].negate;
1812 emit(ir, TGSI_OPCODE_CMP, result_dst,
1813 op[0], result_src, st_src_reg_for_float(0.0));
1814 }
1815 break;
1816 case ir_unop_rsq:
1817 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1818 break;
1819 case ir_unop_i2f:
1820 if (native_integers) {
1821 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1822 break;
1823 }
1824 /* fallthrough to next case otherwise */
1825 case ir_unop_b2f:
1826 if (native_integers) {
1827 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1828 break;
1829 }
1830 /* fallthrough to next case otherwise */
1831 case ir_unop_i2u:
1832 case ir_unop_u2i:
1833 /* Converting between signed and unsigned integers is a no-op. */
1834 result_src = op[0];
1835 break;
1836 case ir_unop_b2i:
1837 if (native_integers) {
1838 /* Booleans are stored as integers using ~0 for true and 0 for false.
1839 * GLSL requires that int(bool) return 1 for true and 0 for false.
1840 * This conversion is done with AND, but it could be done with NEG.
1841 */
1842 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1843 } else {
1844 /* Booleans and integers are both stored as floats when native
1845 * integers are disabled.
1846 */
1847 result_src = op[0];
1848 }
1849 break;
1850 case ir_unop_f2i:
1851 if (native_integers)
1852 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1853 else
1854 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1855 break;
1856 case ir_unop_f2u:
1857 if (native_integers)
1858 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1859 else
1860 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1861 break;
1862 case ir_unop_bitcast_f2i:
1863 result_src = op[0];
1864 result_src.type = GLSL_TYPE_INT;
1865 break;
1866 case ir_unop_bitcast_f2u:
1867 result_src = op[0];
1868 result_src.type = GLSL_TYPE_UINT;
1869 break;
1870 case ir_unop_bitcast_i2f:
1871 case ir_unop_bitcast_u2f:
1872 result_src = op[0];
1873 result_src.type = GLSL_TYPE_FLOAT;
1874 break;
1875 case ir_unop_f2b:
1876 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1877 break;
1878 case ir_unop_i2b:
1879 if (native_integers)
1880 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1881 else
1882 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1883 break;
1884 case ir_unop_trunc:
1885 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1886 break;
1887 case ir_unop_ceil:
1888 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1889 break;
1890 case ir_unop_floor:
1891 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1892 break;
1893 case ir_unop_round_even:
1894 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1895 break;
1896 case ir_unop_fract:
1897 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1898 break;
1899
1900 case ir_binop_min:
1901 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1902 break;
1903 case ir_binop_max:
1904 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1905 break;
1906 case ir_binop_pow:
1907 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1908 break;
1909
1910 case ir_unop_bit_not:
1911 if (native_integers) {
1912 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1913 break;
1914 }
1915 case ir_unop_u2f:
1916 if (native_integers) {
1917 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1918 break;
1919 }
1920 case ir_binop_lshift:
1921 if (native_integers) {
1922 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1923 break;
1924 }
1925 case ir_binop_rshift:
1926 if (native_integers) {
1927 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1928 break;
1929 }
1930 case ir_binop_bit_and:
1931 if (native_integers) {
1932 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1933 break;
1934 }
1935 case ir_binop_bit_xor:
1936 if (native_integers) {
1937 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1938 break;
1939 }
1940 case ir_binop_bit_or:
1941 if (native_integers) {
1942 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1943 break;
1944 }
1945
1946 assert(!"GLSL 1.30 features unsupported");
1947 break;
1948
1949 case ir_binop_ubo_load: {
1950 ir_constant *uniform_block = ir->operands[0]->as_constant();
1951 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1952 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1953 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1954 st_src_reg cbuf;
1955
1956 cbuf.type = glsl_type::vec4_type->base_type;
1957 cbuf.file = PROGRAM_CONSTANT;
1958 cbuf.index = 0;
1959 cbuf.index2D = uniform_block->value.u[0] + 1;
1960 cbuf.reladdr = NULL;
1961 cbuf.negate = 0;
1962
1963 assert(ir->type->is_vector() || ir->type->is_scalar());
1964
1965 if (const_offset_ir) {
1966 /* Constant index into constant buffer */
1967 cbuf.reladdr = NULL;
1968 cbuf.index = const_offset / 16;
1969 cbuf.has_index2 = true;
1970 }
1971 else {
1972 /* Relative/variable index into constant buffer */
1973 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1974 st_src_reg_for_int(4));
1975 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1976 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1977 }
1978
1979 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1980 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1981 const_offset % 16 / 4,
1982 const_offset % 16 / 4,
1983 const_offset % 16 / 4);
1984
1985 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1986 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1987 } else {
1988 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1989 }
1990 break;
1991 }
1992 case ir_triop_lrp:
1993 /* note: we have to reorder the three args here */
1994 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1995 break;
1996 case ir_triop_csel:
1997 if (this->ctx->Const.NativeIntegers)
1998 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1999 else {
2000 op[0].negate = ~op[0].negate;
2001 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
2002 }
2003 break;
2004 case ir_triop_bitfield_extract:
2005 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
2006 break;
2007 case ir_quadop_bitfield_insert:
2008 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
2009 break;
2010 case ir_unop_bitfield_reverse:
2011 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
2012 break;
2013 case ir_unop_bit_count:
2014 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
2015 break;
2016 case ir_unop_find_msb:
2017 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
2018 break;
2019 case ir_unop_find_lsb:
2020 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
2021 break;
2022 case ir_binop_imul_high:
2023 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
2024 break;
2025 case ir_triop_fma:
2026 /* NOTE: Perhaps there should be a special opcode that enforces fused
2027 * mul-add. Just use MAD for now.
2028 */
2029 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
2030 break;
2031 case ir_unop_pack_snorm_2x16:
2032 case ir_unop_pack_unorm_2x16:
2033 case ir_unop_pack_half_2x16:
2034 case ir_unop_pack_snorm_4x8:
2035 case ir_unop_pack_unorm_4x8:
2036 case ir_unop_unpack_snorm_2x16:
2037 case ir_unop_unpack_unorm_2x16:
2038 case ir_unop_unpack_half_2x16:
2039 case ir_unop_unpack_half_2x16_split_x:
2040 case ir_unop_unpack_half_2x16_split_y:
2041 case ir_unop_unpack_snorm_4x8:
2042 case ir_unop_unpack_unorm_4x8:
2043 case ir_binop_pack_half_2x16_split:
2044 case ir_binop_bfm:
2045 case ir_triop_bfi:
2046 case ir_quadop_vector:
2047 case ir_binop_vector_extract:
2048 case ir_triop_vector_insert:
2049 case ir_binop_ldexp:
2050 case ir_binop_carry:
2051 case ir_binop_borrow:
2052 case ir_unop_interpolate_at_centroid:
2053 case ir_binop_interpolate_at_offset:
2054 case ir_binop_interpolate_at_sample:
2055 /* This operation is not supported, or should have already been handled.
2056 */
2057 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2058 break;
2059 }
2060
2061 this->result = result_src;
2062 }
2063
2064
2065 void
2066 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2067 {
2068 st_src_reg src;
2069 int i;
2070 int swizzle[4];
2071
2072 /* Note that this is only swizzles in expressions, not those on the left
2073 * hand side of an assignment, which do write masking. See ir_assignment
2074 * for that.
2075 */
2076
2077 ir->val->accept(this);
2078 src = this->result;
2079 assert(src.file != PROGRAM_UNDEFINED);
2080
2081 for (i = 0; i < 4; i++) {
2082 if (i < ir->type->vector_elements) {
2083 switch (i) {
2084 case 0:
2085 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2086 break;
2087 case 1:
2088 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2089 break;
2090 case 2:
2091 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2092 break;
2093 case 3:
2094 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2095 break;
2096 }
2097 } else {
2098 /* If the type is smaller than a vec4, replicate the last
2099 * channel out.
2100 */
2101 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2102 }
2103 }
2104
2105 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2106
2107 this->result = src;
2108 }
2109
2110 void
2111 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2112 {
2113 variable_storage *entry = find_variable_storage(ir->var);
2114 ir_variable *var = ir->var;
2115
2116 if (!entry) {
2117 switch (var->data.mode) {
2118 case ir_var_uniform:
2119 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2120 var->data.location);
2121 this->variables.push_tail(entry);
2122 break;
2123 case ir_var_shader_in:
2124 /* The linker assigns locations for varyings and attributes,
2125 * including deprecated builtins (like gl_Color), user-assign
2126 * generic attributes (glBindVertexLocation), and
2127 * user-defined varyings.
2128 */
2129 assert(var->data.location != -1);
2130 entry = new(mem_ctx) variable_storage(var,
2131 PROGRAM_INPUT,
2132 var->data.location);
2133 break;
2134 case ir_var_shader_out:
2135 assert(var->data.location != -1);
2136 entry = new(mem_ctx) variable_storage(var,
2137 PROGRAM_OUTPUT,
2138 var->data.location
2139 + var->data.index);
2140 break;
2141 case ir_var_system_value:
2142 entry = new(mem_ctx) variable_storage(var,
2143 PROGRAM_SYSTEM_VALUE,
2144 var->data.location);
2145 break;
2146 case ir_var_auto:
2147 case ir_var_temporary:
2148 st_src_reg src = get_temp(var->type);
2149
2150 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2151 this->variables.push_tail(entry);
2152
2153 break;
2154 }
2155
2156 if (!entry) {
2157 printf("Failed to make storage for %s\n", var->name);
2158 exit(1);
2159 }
2160 }
2161
2162 this->result = st_src_reg(entry->file, entry->index, var->type);
2163 if (!native_integers)
2164 this->result.type = GLSL_TYPE_FLOAT;
2165 }
2166
2167 void
2168 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2169 {
2170 ir_constant *index;
2171 st_src_reg src;
2172 int element_size = type_size(ir->type);
2173 bool is_2D_input;
2174
2175 index = ir->array_index->constant_expression_value();
2176
2177 ir->array->accept(this);
2178 src = this->result;
2179
2180 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2181 src.file == PROGRAM_INPUT &&
2182 ir->array->ir_type != ir_type_dereference_array;
2183
2184 if (is_2D_input)
2185 element_size = 1;
2186
2187 if (index) {
2188 if (is_2D_input) {
2189 src.index2D = index->value.i[0];
2190 src.has_index2 = true;
2191 } else
2192 src.index += index->value.i[0] * element_size;
2193 } else {
2194 /* Variable index array dereference. It eats the "vec4" of the
2195 * base of the array and an index that offsets the TGSI register
2196 * index.
2197 */
2198 ir->array_index->accept(this);
2199
2200 st_src_reg index_reg;
2201
2202 if (element_size == 1) {
2203 index_reg = this->result;
2204 } else {
2205 index_reg = get_temp(native_integers ?
2206 glsl_type::int_type : glsl_type::float_type);
2207
2208 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2209 this->result, st_src_reg_for_type(index_reg.type, element_size));
2210 }
2211
2212 /* If there was already a relative address register involved, add the
2213 * new and the old together to get the new offset.
2214 */
2215 if (!is_2D_input && src.reladdr != NULL) {
2216 st_src_reg accum_reg = get_temp(native_integers ?
2217 glsl_type::int_type : glsl_type::float_type);
2218
2219 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2220 index_reg, *src.reladdr);
2221
2222 index_reg = accum_reg;
2223 }
2224
2225 if (is_2D_input) {
2226 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2227 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2228 src.index2D = 0;
2229 src.has_index2 = true;
2230 } else {
2231 src.reladdr = ralloc(mem_ctx, st_src_reg);
2232 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2233 }
2234 }
2235
2236 /* If the type is smaller than a vec4, replicate the last channel out. */
2237 if (ir->type->is_scalar() || ir->type->is_vector())
2238 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2239 else
2240 src.swizzle = SWIZZLE_NOOP;
2241
2242 /* Change the register type to the element type of the array. */
2243 src.type = ir->type->base_type;
2244
2245 this->result = src;
2246 }
2247
2248 void
2249 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2250 {
2251 unsigned int i;
2252 const glsl_type *struct_type = ir->record->type;
2253 int offset = 0;
2254
2255 ir->record->accept(this);
2256
2257 for (i = 0; i < struct_type->length; i++) {
2258 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2259 break;
2260 offset += type_size(struct_type->fields.structure[i].type);
2261 }
2262
2263 /* If the type is smaller than a vec4, replicate the last channel out. */
2264 if (ir->type->is_scalar() || ir->type->is_vector())
2265 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2266 else
2267 this->result.swizzle = SWIZZLE_NOOP;
2268
2269 this->result.index += offset;
2270 this->result.type = ir->type->base_type;
2271 }
2272
2273 /**
2274 * We want to be careful in assignment setup to hit the actual storage
2275 * instead of potentially using a temporary like we might with the
2276 * ir_dereference handler.
2277 */
2278 static st_dst_reg
2279 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2280 {
2281 /* The LHS must be a dereference. If the LHS is a variable indexed array
2282 * access of a vector, it must be separated into a series conditional moves
2283 * before reaching this point (see ir_vec_index_to_cond_assign).
2284 */
2285 assert(ir->as_dereference());
2286 ir_dereference_array *deref_array = ir->as_dereference_array();
2287 if (deref_array) {
2288 assert(!deref_array->array->type->is_vector());
2289 }
2290
2291 /* Use the rvalue deref handler for the most part. We'll ignore
2292 * swizzles in it and write swizzles using writemask, though.
2293 */
2294 ir->accept(v);
2295 return st_dst_reg(v->result);
2296 }
2297
2298 /**
2299 * Process the condition of a conditional assignment
2300 *
2301 * Examines the condition of a conditional assignment to generate the optimal
2302 * first operand of a \c CMP instruction. If the condition is a relational
2303 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2304 * used as the source for the \c CMP instruction. Otherwise the comparison
2305 * is processed to a boolean result, and the boolean result is used as the
2306 * operand to the CMP instruction.
2307 */
2308 bool
2309 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2310 {
2311 ir_rvalue *src_ir = ir;
2312 bool negate = true;
2313 bool switch_order = false;
2314
2315 ir_expression *const expr = ir->as_expression();
2316 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2317 bool zero_on_left = false;
2318
2319 if (expr->operands[0]->is_zero()) {
2320 src_ir = expr->operands[1];
2321 zero_on_left = true;
2322 } else if (expr->operands[1]->is_zero()) {
2323 src_ir = expr->operands[0];
2324 zero_on_left = false;
2325 }
2326
2327 /* a is - 0 + - 0 +
2328 * (a < 0) T F F ( a < 0) T F F
2329 * (0 < a) F F T (-a < 0) F F T
2330 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2331 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2332 * (a > 0) F F T (-a < 0) F F T
2333 * (0 > a) T F F ( a < 0) T F F
2334 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2335 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2336 *
2337 * Note that exchanging the order of 0 and 'a' in the comparison simply
2338 * means that the value of 'a' should be negated.
2339 */
2340 if (src_ir != ir) {
2341 switch (expr->operation) {
2342 case ir_binop_less:
2343 switch_order = false;
2344 negate = zero_on_left;
2345 break;
2346
2347 case ir_binop_greater:
2348 switch_order = false;
2349 negate = !zero_on_left;
2350 break;
2351
2352 case ir_binop_lequal:
2353 switch_order = true;
2354 negate = !zero_on_left;
2355 break;
2356
2357 case ir_binop_gequal:
2358 switch_order = true;
2359 negate = zero_on_left;
2360 break;
2361
2362 default:
2363 /* This isn't the right kind of comparison afterall, so make sure
2364 * the whole condition is visited.
2365 */
2366 src_ir = ir;
2367 break;
2368 }
2369 }
2370 }
2371
2372 src_ir->accept(this);
2373
2374 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2375 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2376 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2377 * computing the condition.
2378 */
2379 if (negate)
2380 this->result.negate = ~this->result.negate;
2381
2382 return switch_order;
2383 }
2384
2385 void
2386 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2387 st_dst_reg *l, st_src_reg *r)
2388 {
2389 if (type->base_type == GLSL_TYPE_STRUCT) {
2390 for (unsigned int i = 0; i < type->length; i++) {
2391 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2392 }
2393 return;
2394 }
2395
2396 if (type->is_array()) {
2397 for (unsigned int i = 0; i < type->length; i++) {
2398 emit_block_mov(ir, type->fields.array, l, r);
2399 }
2400 return;
2401 }
2402
2403 if (type->is_matrix()) {
2404 const struct glsl_type *vec_type;
2405
2406 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2407 type->vector_elements, 1);
2408
2409 for (int i = 0; i < type->matrix_columns; i++) {
2410 emit_block_mov(ir, vec_type, l, r);
2411 }
2412 return;
2413 }
2414
2415 assert(type->is_scalar() || type->is_vector());
2416
2417 r->type = type->base_type;
2418 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2419 l->index++;
2420 r->index++;
2421 }
2422
2423 void
2424 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2425 {
2426 st_dst_reg l;
2427 st_src_reg r;
2428 int i;
2429
2430 ir->rhs->accept(this);
2431 r = this->result;
2432
2433 l = get_assignment_lhs(ir->lhs, this);
2434
2435 /* FINISHME: This should really set to the correct maximal writemask for each
2436 * FINISHME: component written (in the loops below). This case can only
2437 * FINISHME: occur for matrices, arrays, and structures.
2438 */
2439 if (ir->write_mask == 0) {
2440 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2441 l.writemask = WRITEMASK_XYZW;
2442 } else if (ir->lhs->type->is_scalar() &&
2443 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2444 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2445 * FINISHME: W component of fragment shader output zero, work correctly.
2446 */
2447 l.writemask = WRITEMASK_XYZW;
2448 } else {
2449 int swizzles[4];
2450 int first_enabled_chan = 0;
2451 int rhs_chan = 0;
2452
2453 l.writemask = ir->write_mask;
2454
2455 for (int i = 0; i < 4; i++) {
2456 if (l.writemask & (1 << i)) {
2457 first_enabled_chan = GET_SWZ(r.swizzle, i);
2458 break;
2459 }
2460 }
2461
2462 /* Swizzle a small RHS vector into the channels being written.
2463 *
2464 * glsl ir treats write_mask as dictating how many channels are
2465 * present on the RHS while TGSI treats write_mask as just
2466 * showing which channels of the vec4 RHS get written.
2467 */
2468 for (int i = 0; i < 4; i++) {
2469 if (l.writemask & (1 << i))
2470 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2471 else
2472 swizzles[i] = first_enabled_chan;
2473 }
2474 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2475 swizzles[2], swizzles[3]);
2476 }
2477
2478 assert(l.file != PROGRAM_UNDEFINED);
2479 assert(r.file != PROGRAM_UNDEFINED);
2480
2481 if (ir->condition) {
2482 const bool switch_order = this->process_move_condition(ir->condition);
2483 st_src_reg condition = this->result;
2484
2485 for (i = 0; i < type_size(ir->lhs->type); i++) {
2486 st_src_reg l_src = st_src_reg(l);
2487 st_src_reg condition_temp = condition;
2488 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2489
2490 if (native_integers) {
2491 /* This is necessary because TGSI's CMP instruction expects the
2492 * condition to be a float, and we store booleans as integers.
2493 * TODO: really want to avoid i2f path and use UCMP. Requires
2494 * changes to process_move_condition though too.
2495 */
2496 condition_temp = get_temp(glsl_type::vec4_type);
2497 condition.negate = 0;
2498 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2499 condition_temp.swizzle = condition.swizzle;
2500 }
2501
2502 if (switch_order) {
2503 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2504 } else {
2505 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2506 }
2507
2508 l.index++;
2509 r.index++;
2510 }
2511 } else if (ir->rhs->as_expression() &&
2512 this->instructions.get_tail() &&
2513 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2514 type_size(ir->lhs->type) == 1 &&
2515 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2516 /* To avoid emitting an extra MOV when assigning an expression to a
2517 * variable, emit the last instruction of the expression again, but
2518 * replace the destination register with the target of the assignment.
2519 * Dead code elimination will remove the original instruction.
2520 */
2521 glsl_to_tgsi_instruction *inst, *new_inst;
2522 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2523 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2524 new_inst->saturate = inst->saturate;
2525 inst->dead_mask = inst->dst.writemask;
2526 } else {
2527 emit_block_mov(ir, ir->rhs->type, &l, &r);
2528 }
2529 }
2530
2531
2532 void
2533 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2534 {
2535 st_src_reg src;
2536 GLfloat stack_vals[4] = { 0 };
2537 gl_constant_value *values = (gl_constant_value *) stack_vals;
2538 GLenum gl_type = GL_NONE;
2539 unsigned int i;
2540 static int in_array = 0;
2541 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2542
2543 /* Unfortunately, 4 floats is all we can get into
2544 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2545 * aggregate constant and move each constant value into it. If we
2546 * get lucky, copy propagation will eliminate the extra moves.
2547 */
2548 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2549 st_src_reg temp_base = get_temp(ir->type);
2550 st_dst_reg temp = st_dst_reg(temp_base);
2551
2552 foreach_in_list(ir_constant, field_value, &ir->components) {
2553 int size = type_size(field_value->type);
2554
2555 assert(size > 0);
2556
2557 field_value->accept(this);
2558 src = this->result;
2559
2560 for (i = 0; i < (unsigned int)size; i++) {
2561 emit(ir, TGSI_OPCODE_MOV, temp, src);
2562
2563 src.index++;
2564 temp.index++;
2565 }
2566 }
2567 this->result = temp_base;
2568 return;
2569 }
2570
2571 if (ir->type->is_array()) {
2572 st_src_reg temp_base = get_temp(ir->type);
2573 st_dst_reg temp = st_dst_reg(temp_base);
2574 int size = type_size(ir->type->fields.array);
2575
2576 assert(size > 0);
2577 in_array++;
2578
2579 for (i = 0; i < ir->type->length; i++) {
2580 ir->array_elements[i]->accept(this);
2581 src = this->result;
2582 for (int j = 0; j < size; j++) {
2583 emit(ir, TGSI_OPCODE_MOV, temp, src);
2584
2585 src.index++;
2586 temp.index++;
2587 }
2588 }
2589 this->result = temp_base;
2590 in_array--;
2591 return;
2592 }
2593
2594 if (ir->type->is_matrix()) {
2595 st_src_reg mat = get_temp(ir->type);
2596 st_dst_reg mat_column = st_dst_reg(mat);
2597
2598 for (i = 0; i < ir->type->matrix_columns; i++) {
2599 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2600 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2601
2602 src = st_src_reg(file, -1, ir->type->base_type);
2603 src.index = add_constant(file,
2604 values,
2605 ir->type->vector_elements,
2606 GL_FLOAT,
2607 &src.swizzle);
2608 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2609
2610 mat_column.index++;
2611 }
2612
2613 this->result = mat;
2614 return;
2615 }
2616
2617 switch (ir->type->base_type) {
2618 case GLSL_TYPE_FLOAT:
2619 gl_type = GL_FLOAT;
2620 for (i = 0; i < ir->type->vector_elements; i++) {
2621 values[i].f = ir->value.f[i];
2622 }
2623 break;
2624 case GLSL_TYPE_UINT:
2625 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2626 for (i = 0; i < ir->type->vector_elements; i++) {
2627 if (native_integers)
2628 values[i].u = ir->value.u[i];
2629 else
2630 values[i].f = ir->value.u[i];
2631 }
2632 break;
2633 case GLSL_TYPE_INT:
2634 gl_type = native_integers ? GL_INT : GL_FLOAT;
2635 for (i = 0; i < ir->type->vector_elements; i++) {
2636 if (native_integers)
2637 values[i].i = ir->value.i[i];
2638 else
2639 values[i].f = ir->value.i[i];
2640 }
2641 break;
2642 case GLSL_TYPE_BOOL:
2643 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2644 for (i = 0; i < ir->type->vector_elements; i++) {
2645 if (native_integers)
2646 values[i].u = ir->value.b[i] ? ~0 : 0;
2647 else
2648 values[i].f = ir->value.b[i];
2649 }
2650 break;
2651 default:
2652 assert(!"Non-float/uint/int/bool constant");
2653 }
2654
2655 this->result = st_src_reg(file, -1, ir->type);
2656 this->result.index = add_constant(file,
2657 values,
2658 ir->type->vector_elements,
2659 gl_type,
2660 &this->result.swizzle);
2661 }
2662
2663 function_entry *
2664 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2665 {
2666 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2667 if (entry->sig == sig)
2668 return entry;
2669 }
2670
2671 entry = ralloc(mem_ctx, function_entry);
2672 entry->sig = sig;
2673 entry->sig_id = this->next_signature_id++;
2674 entry->bgn_inst = NULL;
2675
2676 /* Allocate storage for all the parameters. */
2677 foreach_in_list(ir_variable, param, &sig->parameters) {
2678 variable_storage *storage;
2679
2680 storage = find_variable_storage(param);
2681 assert(!storage);
2682
2683 st_src_reg src = get_temp(param->type);
2684
2685 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2686 this->variables.push_tail(storage);
2687 }
2688
2689 if (!sig->return_type->is_void()) {
2690 entry->return_reg = get_temp(sig->return_type);
2691 } else {
2692 entry->return_reg = undef_src;
2693 }
2694
2695 this->function_signatures.push_tail(entry);
2696 return entry;
2697 }
2698
2699 void
2700 glsl_to_tgsi_visitor::visit(ir_call *ir)
2701 {
2702 glsl_to_tgsi_instruction *call_inst;
2703 ir_function_signature *sig = ir->callee;
2704 function_entry *entry = get_function_signature(sig);
2705 int i;
2706
2707 /* Process in parameters. */
2708 foreach_two_lists(formal_node, &sig->parameters,
2709 actual_node, &ir->actual_parameters) {
2710 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2711 ir_variable *param = (ir_variable *) formal_node;
2712
2713 if (param->data.mode == ir_var_function_in ||
2714 param->data.mode == ir_var_function_inout) {
2715 variable_storage *storage = find_variable_storage(param);
2716 assert(storage);
2717
2718 param_rval->accept(this);
2719 st_src_reg r = this->result;
2720
2721 st_dst_reg l;
2722 l.file = storage->file;
2723 l.index = storage->index;
2724 l.reladdr = NULL;
2725 l.writemask = WRITEMASK_XYZW;
2726 l.cond_mask = COND_TR;
2727
2728 for (i = 0; i < type_size(param->type); i++) {
2729 emit(ir, TGSI_OPCODE_MOV, l, r);
2730 l.index++;
2731 r.index++;
2732 }
2733 }
2734 }
2735
2736 /* Emit call instruction */
2737 call_inst = emit(ir, TGSI_OPCODE_CAL);
2738 call_inst->function = entry;
2739
2740 /* Process out parameters. */
2741 foreach_two_lists(formal_node, &sig->parameters,
2742 actual_node, &ir->actual_parameters) {
2743 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2744 ir_variable *param = (ir_variable *) formal_node;
2745
2746 if (param->data.mode == ir_var_function_out ||
2747 param->data.mode == ir_var_function_inout) {
2748 variable_storage *storage = find_variable_storage(param);
2749 assert(storage);
2750
2751 st_src_reg r;
2752 r.file = storage->file;
2753 r.index = storage->index;
2754 r.reladdr = NULL;
2755 r.swizzle = SWIZZLE_NOOP;
2756 r.negate = 0;
2757
2758 param_rval->accept(this);
2759 st_dst_reg l = st_dst_reg(this->result);
2760
2761 for (i = 0; i < type_size(param->type); i++) {
2762 emit(ir, TGSI_OPCODE_MOV, l, r);
2763 l.index++;
2764 r.index++;
2765 }
2766 }
2767 }
2768
2769 /* Process return value. */
2770 this->result = entry->return_reg;
2771 }
2772
2773 void
2774 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2775 {
2776 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2777 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2778 st_src_reg levels_src;
2779 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2780 glsl_to_tgsi_instruction *inst = NULL;
2781 unsigned opcode = TGSI_OPCODE_NOP;
2782 const glsl_type *sampler_type = ir->sampler->type;
2783 bool is_cube_array = false;
2784 unsigned i;
2785
2786 /* if we are a cube array sampler */
2787 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2788 sampler_type->sampler_array)) {
2789 is_cube_array = true;
2790 }
2791
2792 if (ir->coordinate) {
2793 ir->coordinate->accept(this);
2794
2795 /* Put our coords in a temp. We'll need to modify them for shadow,
2796 * projection, or LOD, so the only case we'd use it as is is if
2797 * we're doing plain old texturing. The optimization passes on
2798 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2799 */
2800 coord = get_temp(glsl_type::vec4_type);
2801 coord_dst = st_dst_reg(coord);
2802 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2803 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2804 }
2805
2806 if (ir->projector) {
2807 ir->projector->accept(this);
2808 projector = this->result;
2809 }
2810
2811 /* Storage for our result. Ideally for an assignment we'd be using
2812 * the actual storage for the result here, instead.
2813 */
2814 result_src = get_temp(ir->type);
2815 result_dst = st_dst_reg(result_src);
2816
2817 switch (ir->op) {
2818 case ir_tex:
2819 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2820 if (ir->offset) {
2821 ir->offset->accept(this);
2822 offset[0] = this->result;
2823 }
2824 break;
2825 case ir_txb:
2826 if (is_cube_array ||
2827 sampler_type == glsl_type::samplerCubeShadow_type) {
2828 opcode = TGSI_OPCODE_TXB2;
2829 }
2830 else {
2831 opcode = TGSI_OPCODE_TXB;
2832 }
2833 ir->lod_info.bias->accept(this);
2834 lod_info = this->result;
2835 if (ir->offset) {
2836 ir->offset->accept(this);
2837 offset[0] = this->result;
2838 }
2839 break;
2840 case ir_txl:
2841 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2842 ir->lod_info.lod->accept(this);
2843 lod_info = this->result;
2844 if (ir->offset) {
2845 ir->offset->accept(this);
2846 offset[0] = this->result;
2847 }
2848 break;
2849 case ir_txd:
2850 opcode = TGSI_OPCODE_TXD;
2851 ir->lod_info.grad.dPdx->accept(this);
2852 dx = this->result;
2853 ir->lod_info.grad.dPdy->accept(this);
2854 dy = this->result;
2855 if (ir->offset) {
2856 ir->offset->accept(this);
2857 offset[0] = this->result;
2858 }
2859 break;
2860 case ir_txs:
2861 opcode = TGSI_OPCODE_TXQ;
2862 ir->lod_info.lod->accept(this);
2863 lod_info = this->result;
2864 break;
2865 case ir_query_levels:
2866 opcode = TGSI_OPCODE_TXQ;
2867 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2868 levels_src = get_temp(ir->type);
2869 break;
2870 case ir_txf:
2871 opcode = TGSI_OPCODE_TXF;
2872 ir->lod_info.lod->accept(this);
2873 lod_info = this->result;
2874 if (ir->offset) {
2875 ir->offset->accept(this);
2876 offset[0] = this->result;
2877 }
2878 break;
2879 case ir_txf_ms:
2880 opcode = TGSI_OPCODE_TXF;
2881 ir->lod_info.sample_index->accept(this);
2882 sample_index = this->result;
2883 break;
2884 case ir_tg4:
2885 opcode = TGSI_OPCODE_TG4;
2886 ir->lod_info.component->accept(this);
2887 component = this->result;
2888 if (ir->offset) {
2889 ir->offset->accept(this);
2890 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2891 const glsl_type *elt_type = ir->offset->type->fields.array;
2892 for (i = 0; i < ir->offset->type->length; i++) {
2893 offset[i] = this->result;
2894 offset[i].index += i * type_size(elt_type);
2895 offset[i].type = elt_type->base_type;
2896 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2897 }
2898 } else {
2899 offset[0] = this->result;
2900 }
2901 }
2902 break;
2903 case ir_lod:
2904 opcode = TGSI_OPCODE_LODQ;
2905 break;
2906 }
2907
2908 if (ir->projector) {
2909 if (opcode == TGSI_OPCODE_TEX) {
2910 /* Slot the projector in as the last component of the coord. */
2911 coord_dst.writemask = WRITEMASK_W;
2912 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2913 coord_dst.writemask = WRITEMASK_XYZW;
2914 opcode = TGSI_OPCODE_TXP;
2915 } else {
2916 st_src_reg coord_w = coord;
2917 coord_w.swizzle = SWIZZLE_WWWW;
2918
2919 /* For the other TEX opcodes there's no projective version
2920 * since the last slot is taken up by LOD info. Do the
2921 * projective divide now.
2922 */
2923 coord_dst.writemask = WRITEMASK_W;
2924 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2925
2926 /* In the case where we have to project the coordinates "by hand,"
2927 * the shadow comparator value must also be projected.
2928 */
2929 st_src_reg tmp_src = coord;
2930 if (ir->shadow_comparitor) {
2931 /* Slot the shadow value in as the second to last component of the
2932 * coord.
2933 */
2934 ir->shadow_comparitor->accept(this);
2935
2936 tmp_src = get_temp(glsl_type::vec4_type);
2937 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2938
2939 /* Projective division not allowed for array samplers. */
2940 assert(!sampler_type->sampler_array);
2941
2942 tmp_dst.writemask = WRITEMASK_Z;
2943 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2944
2945 tmp_dst.writemask = WRITEMASK_XY;
2946 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2947 }
2948
2949 coord_dst.writemask = WRITEMASK_XYZ;
2950 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2951
2952 coord_dst.writemask = WRITEMASK_XYZW;
2953 coord.swizzle = SWIZZLE_XYZW;
2954 }
2955 }
2956
2957 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2958 * comparator was put in the correct place (and projected) by the code,
2959 * above, that handles by-hand projection.
2960 */
2961 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2962 /* Slot the shadow value in as the second to last component of the
2963 * coord.
2964 */
2965 ir->shadow_comparitor->accept(this);
2966
2967 if (is_cube_array) {
2968 cube_sc = get_temp(glsl_type::float_type);
2969 cube_sc_dst = st_dst_reg(cube_sc);
2970 cube_sc_dst.writemask = WRITEMASK_X;
2971 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2972 cube_sc_dst.writemask = WRITEMASK_X;
2973 }
2974 else {
2975 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2976 sampler_type->sampler_array) ||
2977 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2978 coord_dst.writemask = WRITEMASK_W;
2979 } else {
2980 coord_dst.writemask = WRITEMASK_Z;
2981 }
2982
2983 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2984 coord_dst.writemask = WRITEMASK_XYZW;
2985 }
2986 }
2987
2988 if (ir->op == ir_txf_ms) {
2989 coord_dst.writemask = WRITEMASK_W;
2990 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2991 coord_dst.writemask = WRITEMASK_XYZW;
2992 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2993 opcode == TGSI_OPCODE_TXF) {
2994 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2995 coord_dst.writemask = WRITEMASK_W;
2996 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2997 coord_dst.writemask = WRITEMASK_XYZW;
2998 }
2999
3000 if (opcode == TGSI_OPCODE_TXD)
3001 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3002 else if (opcode == TGSI_OPCODE_TXQ) {
3003 if (ir->op == ir_query_levels) {
3004 /* the level is stored in W */
3005 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3006 result_dst.writemask = WRITEMASK_X;
3007 levels_src.swizzle = SWIZZLE_WWWW;
3008 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3009 } else
3010 inst = emit(ir, opcode, result_dst, lod_info);
3011 } else if (opcode == TGSI_OPCODE_TXF) {
3012 inst = emit(ir, opcode, result_dst, coord);
3013 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3014 inst = emit(ir, opcode, result_dst, coord, lod_info);
3015 } else if (opcode == TGSI_OPCODE_TEX2) {
3016 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3017 } else if (opcode == TGSI_OPCODE_TG4) {
3018 if (is_cube_array && ir->shadow_comparitor) {
3019 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3020 } else {
3021 inst = emit(ir, opcode, result_dst, coord, component);
3022 }
3023 } else
3024 inst = emit(ir, opcode, result_dst, coord);
3025
3026 if (ir->shadow_comparitor)
3027 inst->tex_shadow = GL_TRUE;
3028
3029 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
3030 this->shader_program,
3031 this->prog);
3032
3033 if (ir->offset) {
3034 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3035 inst->tex_offsets[i] = offset[i];
3036 inst->tex_offset_num_offset = i;
3037 }
3038
3039 switch (sampler_type->sampler_dimensionality) {
3040 case GLSL_SAMPLER_DIM_1D:
3041 inst->tex_target = (sampler_type->sampler_array)
3042 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3043 break;
3044 case GLSL_SAMPLER_DIM_2D:
3045 inst->tex_target = (sampler_type->sampler_array)
3046 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3047 break;
3048 case GLSL_SAMPLER_DIM_3D:
3049 inst->tex_target = TEXTURE_3D_INDEX;
3050 break;
3051 case GLSL_SAMPLER_DIM_CUBE:
3052 inst->tex_target = (sampler_type->sampler_array)
3053 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3054 break;
3055 case GLSL_SAMPLER_DIM_RECT:
3056 inst->tex_target = TEXTURE_RECT_INDEX;
3057 break;
3058 case GLSL_SAMPLER_DIM_BUF:
3059 inst->tex_target = TEXTURE_BUFFER_INDEX;
3060 break;
3061 case GLSL_SAMPLER_DIM_EXTERNAL:
3062 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3063 break;
3064 case GLSL_SAMPLER_DIM_MS:
3065 inst->tex_target = (sampler_type->sampler_array)
3066 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3067 break;
3068 default:
3069 assert(!"Should not get here.");
3070 }
3071
3072 this->result = result_src;
3073 }
3074
3075 void
3076 glsl_to_tgsi_visitor::visit(ir_return *ir)
3077 {
3078 if (ir->get_value()) {
3079 st_dst_reg l;
3080 int i;
3081
3082 assert(current_function);
3083
3084 ir->get_value()->accept(this);
3085 st_src_reg r = this->result;
3086
3087 l = st_dst_reg(current_function->return_reg);
3088
3089 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3090 emit(ir, TGSI_OPCODE_MOV, l, r);
3091 l.index++;
3092 r.index++;
3093 }
3094 }
3095
3096 emit(ir, TGSI_OPCODE_RET);
3097 }
3098
3099 void
3100 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3101 {
3102 if (ir->condition) {
3103 ir->condition->accept(this);
3104 this->result.negate = ~this->result.negate;
3105 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
3106 } else {
3107 /* unconditional kil */
3108 emit(ir, TGSI_OPCODE_KILL);
3109 }
3110 }
3111
3112 void
3113 glsl_to_tgsi_visitor::visit(ir_if *ir)
3114 {
3115 unsigned if_opcode;
3116 glsl_to_tgsi_instruction *if_inst;
3117
3118 ir->condition->accept(this);
3119 assert(this->result.file != PROGRAM_UNDEFINED);
3120
3121 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3122
3123 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3124
3125 this->instructions.push_tail(if_inst);
3126
3127 visit_exec_list(&ir->then_instructions, this);
3128
3129 if (!ir->else_instructions.is_empty()) {
3130 emit(ir->condition, TGSI_OPCODE_ELSE);
3131 visit_exec_list(&ir->else_instructions, this);
3132 }
3133
3134 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3135 }
3136
3137
3138 void
3139 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3140 {
3141 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3142
3143 ir->stream->accept(this);
3144 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3145 }
3146
3147 void
3148 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3149 {
3150 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3151
3152 ir->stream->accept(this);
3153 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3154 }
3155
3156 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3157 {
3158 result.file = PROGRAM_UNDEFINED;
3159 next_temp = 1;
3160 next_array = 0;
3161 next_signature_id = 1;
3162 num_immediates = 0;
3163 current_function = NULL;
3164 num_address_regs = 0;
3165 samplers_used = 0;
3166 indirect_addr_consts = false;
3167 glsl_version = 0;
3168 native_integers = false;
3169 mem_ctx = ralloc_context(NULL);
3170 ctx = NULL;
3171 prog = NULL;
3172 shader_program = NULL;
3173 shader = NULL;
3174 options = NULL;
3175 }
3176
3177 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3178 {
3179 ralloc_free(mem_ctx);
3180 }
3181
3182 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3183 {
3184 delete v;
3185 }
3186
3187
3188 /**
3189 * Count resources used by the given gpu program (number of texture
3190 * samplers, etc).
3191 */
3192 static void
3193 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3194 {
3195 v->samplers_used = 0;
3196
3197 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3198 if (is_tex_instruction(inst->op)) {
3199 v->samplers_used |= 1 << inst->sampler;
3200
3201 if (inst->tex_shadow) {
3202 prog->ShadowSamplers |= 1 << inst->sampler;
3203 }
3204 }
3205 }
3206
3207 prog->SamplersUsed = v->samplers_used;
3208
3209 if (v->shader_program != NULL)
3210 _mesa_update_shader_textures_used(v->shader_program, prog);
3211 }
3212
3213 static void
3214 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3215 struct gl_shader_program *shader_program,
3216 const char *name, const glsl_type *type,
3217 ir_constant *val)
3218 {
3219 if (type->is_record()) {
3220 ir_constant *field_constant;
3221
3222 field_constant = (ir_constant *)val->components.get_head();
3223
3224 for (unsigned int i = 0; i < type->length; i++) {
3225 const glsl_type *field_type = type->fields.structure[i].type;
3226 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3227 type->fields.structure[i].name);
3228 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3229 field_type, field_constant);
3230 field_constant = (ir_constant *)field_constant->next;
3231 }
3232 return;
3233 }
3234
3235 unsigned offset;
3236 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3237 &offset);
3238 if (offset == GL_INVALID_INDEX) {
3239 fail_link(shader_program,
3240 "Couldn't find uniform for initializer %s\n", name);
3241 return;
3242 }
3243 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3244
3245 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3246 ir_constant *element;
3247 const glsl_type *element_type;
3248 if (type->is_array()) {
3249 element = val->array_elements[i];
3250 element_type = type->fields.array;
3251 } else {
3252 element = val;
3253 element_type = type;
3254 }
3255
3256 void *values;
3257
3258 if (element_type->base_type == GLSL_TYPE_BOOL) {
3259 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3260 for (unsigned int j = 0; j < element_type->components(); j++) {
3261 conv[j] = element->value.b[j];
3262 }
3263 values = (void *)conv;
3264 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3265 element_type->vector_elements,
3266 1);
3267 } else {
3268 values = &element->value;
3269 }
3270
3271 if (element_type->is_matrix()) {
3272 _mesa_uniform_matrix(ctx, shader_program,
3273 element_type->matrix_columns,
3274 element_type->vector_elements,
3275 loc, 1, GL_FALSE, (GLfloat *)values);
3276 } else {
3277 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3278 values, element_type->gl_type);
3279 }
3280
3281 loc++;
3282 }
3283 }
3284
3285 /**
3286 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3287 * are read from the given src in this instruction
3288 */
3289 static int
3290 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3291 {
3292 int read_mask = 0, comp;
3293
3294 /* Now, given the src swizzle and the written channels, find which
3295 * components are actually read
3296 */
3297 for (comp = 0; comp < 4; ++comp) {
3298 const unsigned coord = GET_SWZ(src.swizzle, comp);
3299 ASSERT(coord < 4);
3300 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3301 read_mask |= 1 << coord;
3302 }
3303
3304 return read_mask;
3305 }
3306
3307 /**
3308 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3309 * instruction is the first instruction to write to register T0. There are
3310 * several lowering passes done in GLSL IR (e.g. branches and
3311 * relative addressing) that create a large number of conditional assignments
3312 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3313 *
3314 * Here is why this conversion is safe:
3315 * CMP T0, T1 T2 T0 can be expanded to:
3316 * if (T1 < 0.0)
3317 * MOV T0, T2;
3318 * else
3319 * MOV T0, T0;
3320 *
3321 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3322 * as the original program. If (T1 < 0.0) evaluates to false, executing
3323 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3324 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3325 * because any instruction that was going to read from T0 after this was going
3326 * to read a garbage value anyway.
3327 */
3328 void
3329 glsl_to_tgsi_visitor::simplify_cmp(void)
3330 {
3331 unsigned *tempWrites;
3332 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3333
3334 tempWrites = new unsigned[MAX_TEMPS];
3335 if (!tempWrites) {
3336 return;
3337 }
3338 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3339 memset(outputWrites, 0, sizeof(outputWrites));
3340
3341 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3342 unsigned prevWriteMask = 0;
3343
3344 /* Give up if we encounter relative addressing or flow control. */
3345 if (inst->dst.reladdr ||
3346 tgsi_get_opcode_info(inst->op)->is_branch ||
3347 inst->op == TGSI_OPCODE_BGNSUB ||
3348 inst->op == TGSI_OPCODE_CONT ||
3349 inst->op == TGSI_OPCODE_END ||
3350 inst->op == TGSI_OPCODE_ENDSUB ||
3351 inst->op == TGSI_OPCODE_RET) {
3352 break;
3353 }
3354
3355 if (inst->dst.file == PROGRAM_OUTPUT) {
3356 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3357 prevWriteMask = outputWrites[inst->dst.index];
3358 outputWrites[inst->dst.index] |= inst->dst.writemask;
3359 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3360 assert(inst->dst.index < MAX_TEMPS);
3361 prevWriteMask = tempWrites[inst->dst.index];
3362 tempWrites[inst->dst.index] |= inst->dst.writemask;
3363 } else
3364 continue;
3365
3366 /* For a CMP to be considered a conditional write, the destination
3367 * register and source register two must be the same. */
3368 if (inst->op == TGSI_OPCODE_CMP
3369 && !(inst->dst.writemask & prevWriteMask)
3370 && inst->src[2].file == inst->dst.file
3371 && inst->src[2].index == inst->dst.index
3372 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3373
3374 inst->op = TGSI_OPCODE_MOV;
3375 inst->src[0] = inst->src[1];
3376 }
3377 }
3378
3379 delete [] tempWrites;
3380 }
3381
3382 /* Replaces all references to a temporary register index with another index. */
3383 void
3384 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3385 {
3386 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3387 unsigned j;
3388
3389 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3390 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3391 inst->src[j].index == index) {
3392 inst->src[j].index = new_index;
3393 }
3394 }
3395
3396 for (j=0; j < inst->tex_offset_num_offset; j++) {
3397 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3398 inst->tex_offsets[j].index == index) {
3399 inst->tex_offsets[j].index = new_index;
3400 }
3401 }
3402
3403 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3404 inst->dst.index = new_index;
3405 }
3406 }
3407 }
3408
3409 int
3410 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3411 {
3412 int depth = 0; /* loop depth */
3413 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3414 unsigned i = 0, j;
3415
3416 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3417 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3418 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3419 inst->src[j].index == index) {
3420 return (depth == 0) ? i : loop_start;
3421 }
3422 }
3423 for (j=0; j < inst->tex_offset_num_offset; j++) {
3424 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3425 inst->tex_offsets[j].index == index) {
3426 return (depth == 0) ? i : loop_start;
3427 }
3428 }
3429
3430 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3431 if(depth++ == 0)
3432 loop_start = i;
3433 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3434 if (--depth == 0)
3435 loop_start = -1;
3436 }
3437 assert(depth >= 0);
3438
3439 i++;
3440 }
3441
3442 return -1;
3443 }
3444
3445 int
3446 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3447 {
3448 int depth = 0; /* loop depth */
3449 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3450 int i = 0;
3451
3452 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3453 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3454 return (depth == 0) ? i : loop_start;
3455 }
3456
3457 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3458 if(depth++ == 0)
3459 loop_start = i;
3460 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3461 if (--depth == 0)
3462 loop_start = -1;
3463 }
3464 assert(depth >= 0);
3465
3466 i++;
3467 }
3468
3469 return -1;
3470 }
3471
3472 int
3473 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3474 {
3475 int depth = 0; /* loop depth */
3476 int last = -1; /* index of last instruction that reads the temporary */
3477 unsigned i = 0, j;
3478
3479 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3480 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3481 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3482 inst->src[j].index == index) {
3483 last = (depth == 0) ? i : -2;
3484 }
3485 }
3486 for (j=0; j < inst->tex_offset_num_offset; j++) {
3487 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3488 inst->tex_offsets[j].index == index)
3489 last = (depth == 0) ? i : -2;
3490 }
3491
3492 if (inst->op == TGSI_OPCODE_BGNLOOP)
3493 depth++;
3494 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3495 if (--depth == 0 && last == -2)
3496 last = i;
3497 assert(depth >= 0);
3498
3499 i++;
3500 }
3501
3502 assert(last >= -1);
3503 return last;
3504 }
3505
3506 int
3507 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3508 {
3509 int depth = 0; /* loop depth */
3510 int last = -1; /* index of last instruction that writes to the temporary */
3511 int i = 0;
3512
3513 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3514 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3515 last = (depth == 0) ? i : -2;
3516
3517 if (inst->op == TGSI_OPCODE_BGNLOOP)
3518 depth++;
3519 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3520 if (--depth == 0 && last == -2)
3521 last = i;
3522 assert(depth >= 0);
3523
3524 i++;
3525 }
3526
3527 assert(last >= -1);
3528 return last;
3529 }
3530
3531 /*
3532 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3533 * channels for copy propagation and updates following instructions to
3534 * use the original versions.
3535 *
3536 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3537 * will occur. As an example, a TXP production before this pass:
3538 *
3539 * 0: MOV TEMP[1], INPUT[4].xyyy;
3540 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3541 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3542 *
3543 * and after:
3544 *
3545 * 0: MOV TEMP[1], INPUT[4].xyyy;
3546 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3547 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3548 *
3549 * which allows for dead code elimination on TEMP[1]'s writes.
3550 */
3551 void
3552 glsl_to_tgsi_visitor::copy_propagate(void)
3553 {
3554 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3555 glsl_to_tgsi_instruction *,
3556 this->next_temp * 4);
3557 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3558 int level = 0;
3559
3560 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3561 assert(inst->dst.file != PROGRAM_TEMPORARY
3562 || inst->dst.index < this->next_temp);
3563
3564 /* First, do any copy propagation possible into the src regs. */
3565 for (int r = 0; r < 3; r++) {
3566 glsl_to_tgsi_instruction *first = NULL;
3567 bool good = true;
3568 int acp_base = inst->src[r].index * 4;
3569
3570 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3571 inst->src[r].reladdr ||
3572 inst->src[r].reladdr2)
3573 continue;
3574
3575 /* See if we can find entries in the ACP consisting of MOVs
3576 * from the same src register for all the swizzled channels
3577 * of this src register reference.
3578 */
3579 for (int i = 0; i < 4; i++) {
3580 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3581 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3582
3583 if (!copy_chan) {
3584 good = false;
3585 break;
3586 }
3587
3588 assert(acp_level[acp_base + src_chan] <= level);
3589
3590 if (!first) {
3591 first = copy_chan;
3592 } else {
3593 if (first->src[0].file != copy_chan->src[0].file ||
3594 first->src[0].index != copy_chan->src[0].index) {
3595 good = false;
3596 break;
3597 }
3598 }
3599 }
3600
3601 if (good) {
3602 /* We've now validated that we can copy-propagate to
3603 * replace this src register reference. Do it.
3604 */
3605 inst->src[r].file = first->src[0].file;
3606 inst->src[r].index = first->src[0].index;
3607 inst->src[r].index2D = first->src[0].index2D;
3608 inst->src[r].has_index2 = first->src[0].has_index2;
3609
3610 int swizzle = 0;
3611 for (int i = 0; i < 4; i++) {
3612 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3613 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3614 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3615 (3 * i));
3616 }
3617 inst->src[r].swizzle = swizzle;
3618 }
3619 }
3620
3621 switch (inst->op) {
3622 case TGSI_OPCODE_BGNLOOP:
3623 case TGSI_OPCODE_ENDLOOP:
3624 /* End of a basic block, clear the ACP entirely. */
3625 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3626 break;
3627
3628 case TGSI_OPCODE_IF:
3629 case TGSI_OPCODE_UIF:
3630 ++level;
3631 break;
3632
3633 case TGSI_OPCODE_ENDIF:
3634 case TGSI_OPCODE_ELSE:
3635 /* Clear all channels written inside the block from the ACP, but
3636 * leaving those that were not touched.
3637 */
3638 for (int r = 0; r < this->next_temp; r++) {
3639 for (int c = 0; c < 4; c++) {
3640 if (!acp[4 * r + c])
3641 continue;
3642
3643 if (acp_level[4 * r + c] >= level)
3644 acp[4 * r + c] = NULL;
3645 }
3646 }
3647 if (inst->op == TGSI_OPCODE_ENDIF)
3648 --level;
3649 break;
3650
3651 default:
3652 /* Continuing the block, clear any written channels from
3653 * the ACP.
3654 */
3655 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3656 /* Any temporary might be written, so no copy propagation
3657 * across this instruction.
3658 */
3659 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3660 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3661 inst->dst.reladdr) {
3662 /* Any output might be written, so no copy propagation
3663 * from outputs across this instruction.
3664 */
3665 for (int r = 0; r < this->next_temp; r++) {
3666 for (int c = 0; c < 4; c++) {
3667 if (!acp[4 * r + c])
3668 continue;
3669
3670 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3671 acp[4 * r + c] = NULL;
3672 }
3673 }
3674 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3675 inst->dst.file == PROGRAM_OUTPUT) {
3676 /* Clear where it's used as dst. */
3677 if (inst->dst.file == PROGRAM_TEMPORARY) {
3678 for (int c = 0; c < 4; c++) {
3679 if (inst->dst.writemask & (1 << c)) {
3680 acp[4 * inst->dst.index + c] = NULL;
3681 }
3682 }
3683 }
3684
3685 /* Clear where it's used as src. */
3686 for (int r = 0; r < this->next_temp; r++) {
3687 for (int c = 0; c < 4; c++) {
3688 if (!acp[4 * r + c])
3689 continue;
3690
3691 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3692
3693 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3694 acp[4 * r + c]->src[0].index == inst->dst.index &&
3695 inst->dst.writemask & (1 << src_chan))
3696 {
3697 acp[4 * r + c] = NULL;
3698 }
3699 }
3700 }
3701 }
3702 break;
3703 }
3704
3705 /* If this is a copy, add it to the ACP. */
3706 if (inst->op == TGSI_OPCODE_MOV &&
3707 inst->dst.file == PROGRAM_TEMPORARY &&
3708 !(inst->dst.file == inst->src[0].file &&
3709 inst->dst.index == inst->src[0].index) &&
3710 !inst->dst.reladdr &&
3711 !inst->saturate &&
3712 !inst->src[0].reladdr &&
3713 !inst->src[0].reladdr2 &&
3714 !inst->src[0].negate) {
3715 for (int i = 0; i < 4; i++) {
3716 if (inst->dst.writemask & (1 << i)) {
3717 acp[4 * inst->dst.index + i] = inst;
3718 acp_level[4 * inst->dst.index + i] = level;
3719 }
3720 }
3721 }
3722 }
3723
3724 ralloc_free(acp_level);
3725 ralloc_free(acp);
3726 }
3727
3728 /*
3729 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3730 * code elimination.
3731 *
3732 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3733 * will occur. As an example, a TXP production after copy propagation but
3734 * before this pass:
3735 *
3736 * 0: MOV TEMP[1], INPUT[4].xyyy;
3737 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3738 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3739 *
3740 * and after this pass:
3741 *
3742 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3743 */
3744 int
3745 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3746 {
3747 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3748 glsl_to_tgsi_instruction *,
3749 this->next_temp * 4);
3750 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3751 int level = 0;
3752 int removed = 0;
3753
3754 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3755 assert(inst->dst.file != PROGRAM_TEMPORARY
3756 || inst->dst.index < this->next_temp);
3757
3758 switch (inst->op) {
3759 case TGSI_OPCODE_BGNLOOP:
3760 case TGSI_OPCODE_ENDLOOP:
3761 case TGSI_OPCODE_CONT:
3762 case TGSI_OPCODE_BRK:
3763 /* End of a basic block, clear the write array entirely.
3764 *
3765 * This keeps us from killing dead code when the writes are
3766 * on either side of a loop, even when the register isn't touched
3767 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3768 * dead code of this type, so it shouldn't make a difference as long as
3769 * the dead code elimination pass in the GLSL compiler does its job.
3770 */
3771 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3772 break;
3773
3774 case TGSI_OPCODE_ENDIF:
3775 case TGSI_OPCODE_ELSE:
3776 /* Promote the recorded level of all channels written inside the
3777 * preceding if or else block to the level above the if/else block.
3778 */
3779 for (int r = 0; r < this->next_temp; r++) {
3780 for (int c = 0; c < 4; c++) {
3781 if (!writes[4 * r + c])
3782 continue;
3783
3784 if (write_level[4 * r + c] == level)
3785 write_level[4 * r + c] = level-1;
3786 }
3787 }
3788
3789 if(inst->op == TGSI_OPCODE_ENDIF)
3790 --level;
3791
3792 break;
3793
3794 case TGSI_OPCODE_IF:
3795 case TGSI_OPCODE_UIF:
3796 ++level;
3797 /* fallthrough to default case to mark the condition as read */
3798
3799 default:
3800 /* Continuing the block, clear any channels from the write array that
3801 * are read by this instruction.
3802 */
3803 for (unsigned i = 0; i < Elements(inst->src); i++) {
3804 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3805 /* Any temporary might be read, so no dead code elimination
3806 * across this instruction.
3807 */
3808 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3809 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3810 /* Clear where it's used as src. */
3811 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3812 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3813 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3814 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3815
3816 for (int c = 0; c < 4; c++) {
3817 if (src_chans & (1 << c)) {
3818 writes[4 * inst->src[i].index + c] = NULL;
3819 }
3820 }
3821 }
3822 }
3823 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3824 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3825 /* Any temporary might be read, so no dead code elimination
3826 * across this instruction.
3827 */
3828 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3829 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3830 /* Clear where it's used as src. */
3831 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3832 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3833 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3834 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3835
3836 for (int c = 0; c < 4; c++) {
3837 if (src_chans & (1 << c)) {
3838 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3839 }
3840 }
3841 }
3842 }
3843 break;
3844 }
3845
3846 /* If this instruction writes to a temporary, add it to the write array.
3847 * If there is already an instruction in the write array for one or more
3848 * of the channels, flag that channel write as dead.
3849 */
3850 if (inst->dst.file == PROGRAM_TEMPORARY &&
3851 !inst->dst.reladdr &&
3852 !inst->saturate) {
3853 for (int c = 0; c < 4; c++) {
3854 if (inst->dst.writemask & (1 << c)) {
3855 if (writes[4 * inst->dst.index + c]) {
3856 if (write_level[4 * inst->dst.index + c] < level)
3857 continue;
3858 else
3859 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3860 }
3861 writes[4 * inst->dst.index + c] = inst;
3862 write_level[4 * inst->dst.index + c] = level;
3863 }
3864 }
3865 }
3866 }
3867
3868 /* Anything still in the write array at this point is dead code. */
3869 for (int r = 0; r < this->next_temp; r++) {
3870 for (int c = 0; c < 4; c++) {
3871 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3872 if (inst)
3873 inst->dead_mask |= (1 << c);
3874 }
3875 }
3876
3877 /* Now actually remove the instructions that are completely dead and update
3878 * the writemask of other instructions with dead channels.
3879 */
3880 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3881 if (!inst->dead_mask || !inst->dst.writemask)
3882 continue;
3883 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3884 inst->remove();
3885 delete inst;
3886 removed++;
3887 } else
3888 inst->dst.writemask &= ~(inst->dead_mask);
3889 }
3890
3891 ralloc_free(write_level);
3892 ralloc_free(writes);
3893
3894 return removed;
3895 }
3896
3897 /* Merges temporary registers together where possible to reduce the number of
3898 * registers needed to run a program.
3899 *
3900 * Produces optimal code only after copy propagation and dead code elimination
3901 * have been run. */
3902 void
3903 glsl_to_tgsi_visitor::merge_registers(void)
3904 {
3905 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3906 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3907 int i, j;
3908
3909 /* Read the indices of the last read and first write to each temp register
3910 * into an array so that we don't have to traverse the instruction list as
3911 * much. */
3912 for (i=0; i < this->next_temp; i++) {
3913 last_reads[i] = get_last_temp_read(i);
3914 first_writes[i] = get_first_temp_write(i);
3915 }
3916
3917 /* Start looking for registers with non-overlapping usages that can be
3918 * merged together. */
3919 for (i=0; i < this->next_temp; i++) {
3920 /* Don't touch unused registers. */
3921 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3922
3923 for (j=0; j < this->next_temp; j++) {
3924 /* Don't touch unused registers. */
3925 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3926
3927 /* We can merge the two registers if the first write to j is after or
3928 * in the same instruction as the last read from i. Note that the
3929 * register at index i will always be used earlier or at the same time
3930 * as the register at index j. */
3931 if (first_writes[i] <= first_writes[j] &&
3932 last_reads[i] <= first_writes[j])
3933 {
3934 rename_temp_register(j, i); /* Replace all references to j with i.*/
3935
3936 /* Update the first_writes and last_reads arrays with the new
3937 * values for the merged register index, and mark the newly unused
3938 * register index as such. */
3939 last_reads[i] = last_reads[j];
3940 first_writes[j] = -1;
3941 last_reads[j] = -1;
3942 }
3943 }
3944 }
3945
3946 ralloc_free(last_reads);
3947 ralloc_free(first_writes);
3948 }
3949
3950 /* Reassign indices to temporary registers by reusing unused indices created
3951 * by optimization passes. */
3952 void
3953 glsl_to_tgsi_visitor::renumber_registers(void)
3954 {
3955 int i = 0;
3956 int new_index = 0;
3957
3958 for (i=0; i < this->next_temp; i++) {
3959 if (get_first_temp_read(i) < 0) continue;
3960 if (i != new_index)
3961 rename_temp_register(i, new_index);
3962 new_index++;
3963 }
3964
3965 this->next_temp = new_index;
3966 }
3967
3968 /**
3969 * Returns a fragment program which implements the current pixel transfer ops.
3970 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3971 */
3972 extern "C" void
3973 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3974 glsl_to_tgsi_visitor *original,
3975 int scale_and_bias, int pixel_maps)
3976 {
3977 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3978 struct st_context *st = st_context(original->ctx);
3979 struct gl_program *prog = &fp->Base.Base;
3980 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3981 st_src_reg coord, src0;
3982 st_dst_reg dst0;
3983 glsl_to_tgsi_instruction *inst;
3984
3985 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3986 v->ctx = original->ctx;
3987 v->prog = prog;
3988 v->shader_program = NULL;
3989 v->shader = NULL;
3990 v->glsl_version = original->glsl_version;
3991 v->native_integers = original->native_integers;
3992 v->options = original->options;
3993 v->next_temp = original->next_temp;
3994 v->num_address_regs = original->num_address_regs;
3995 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3996 v->indirect_addr_consts = original->indirect_addr_consts;
3997 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3998 v->num_immediates = original->num_immediates;
3999
4000 /*
4001 * Get initial pixel color from the texture.
4002 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
4003 */
4004 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4005 src0 = v->get_temp(glsl_type::vec4_type);
4006 dst0 = st_dst_reg(src0);
4007 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4008 inst->sampler = 0;
4009 inst->tex_target = TEXTURE_2D_INDEX;
4010
4011 prog->InputsRead |= VARYING_BIT_TEX0;
4012 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
4013 v->samplers_used |= (1 << 0);
4014
4015 if (scale_and_bias) {
4016 static const gl_state_index scale_state[STATE_LENGTH] =
4017 { STATE_INTERNAL, STATE_PT_SCALE,
4018 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
4019 static const gl_state_index bias_state[STATE_LENGTH] =
4020 { STATE_INTERNAL, STATE_PT_BIAS,
4021 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
4022 GLint scale_p, bias_p;
4023 st_src_reg scale, bias;
4024
4025 scale_p = _mesa_add_state_reference(params, scale_state);
4026 bias_p = _mesa_add_state_reference(params, bias_state);
4027
4028 /* MAD colorTemp, colorTemp, scale, bias; */
4029 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
4030 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
4031 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
4032 }
4033
4034 if (pixel_maps) {
4035 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
4036 st_dst_reg temp_dst = st_dst_reg(temp);
4037
4038 assert(st->pixel_xfer.pixelmap_texture);
4039
4040 /* With a little effort, we can do four pixel map look-ups with
4041 * two TEX instructions:
4042 */
4043
4044 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4045 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
4046 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4047 inst->sampler = 1;
4048 inst->tex_target = TEXTURE_2D_INDEX;
4049
4050 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4051 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4052 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4053 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4054 inst->sampler = 1;
4055 inst->tex_target = TEXTURE_2D_INDEX;
4056
4057 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4058 v->samplers_used |= (1 << 1);
4059
4060 /* MOV colorTemp, temp; */
4061 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4062 }
4063
4064 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4065 * new visitor. */
4066 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4067 glsl_to_tgsi_instruction *newinst;
4068 st_src_reg src_regs[3];
4069
4070 if (inst->dst.file == PROGRAM_OUTPUT)
4071 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4072
4073 for (int i=0; i<3; i++) {
4074 src_regs[i] = inst->src[i];
4075 if (src_regs[i].file == PROGRAM_INPUT &&
4076 src_regs[i].index == VARYING_SLOT_COL0)
4077 {
4078 src_regs[i].file = PROGRAM_TEMPORARY;
4079 src_regs[i].index = src0.index;
4080 }
4081 else if (src_regs[i].file == PROGRAM_INPUT)
4082 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4083 }
4084
4085 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4086 newinst->tex_target = inst->tex_target;
4087 }
4088
4089 /* Make modifications to fragment program info. */
4090 prog->Parameters = _mesa_combine_parameter_lists(params,
4091 original->prog->Parameters);
4092 _mesa_free_parameter_list(params);
4093 count_resources(v, prog);
4094 fp->glsl_to_tgsi = v;
4095 }
4096
4097 /**
4098 * Make fragment program for glBitmap:
4099 * Sample the texture and kill the fragment if the bit is 0.
4100 * This program will be combined with the user's fragment program.
4101 *
4102 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4103 */
4104 extern "C" void
4105 get_bitmap_visitor(struct st_fragment_program *fp,
4106 glsl_to_tgsi_visitor *original, int samplerIndex)
4107 {
4108 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4109 struct st_context *st = st_context(original->ctx);
4110 struct gl_program *prog = &fp->Base.Base;
4111 st_src_reg coord, src0;
4112 st_dst_reg dst0;
4113 glsl_to_tgsi_instruction *inst;
4114
4115 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4116 v->ctx = original->ctx;
4117 v->prog = prog;
4118 v->shader_program = NULL;
4119 v->shader = NULL;
4120 v->glsl_version = original->glsl_version;
4121 v->native_integers = original->native_integers;
4122 v->options = original->options;
4123 v->next_temp = original->next_temp;
4124 v->num_address_regs = original->num_address_regs;
4125 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4126 v->indirect_addr_consts = original->indirect_addr_consts;
4127 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4128 v->num_immediates = original->num_immediates;
4129
4130 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4131 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4132 src0 = v->get_temp(glsl_type::vec4_type);
4133 dst0 = st_dst_reg(src0);
4134 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4135 inst->sampler = samplerIndex;
4136 inst->tex_target = TEXTURE_2D_INDEX;
4137
4138 prog->InputsRead |= VARYING_BIT_TEX0;
4139 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4140 v->samplers_used |= (1 << samplerIndex);
4141
4142 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4143 src0.negate = NEGATE_XYZW;
4144 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4145 src0.swizzle = SWIZZLE_XXXX;
4146 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4147
4148 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4149 * new visitor. */
4150 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4151 glsl_to_tgsi_instruction *newinst;
4152 st_src_reg src_regs[3];
4153
4154 if (inst->dst.file == PROGRAM_OUTPUT)
4155 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4156
4157 for (int i=0; i<3; i++) {
4158 src_regs[i] = inst->src[i];
4159 if (src_regs[i].file == PROGRAM_INPUT)
4160 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4161 }
4162
4163 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4164 newinst->tex_target = inst->tex_target;
4165 }
4166
4167 /* Make modifications to fragment program info. */
4168 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4169 count_resources(v, prog);
4170 fp->glsl_to_tgsi = v;
4171 }
4172
4173 /* ------------------------- TGSI conversion stuff -------------------------- */
4174 struct label {
4175 unsigned branch_target;
4176 unsigned token;
4177 };
4178
4179 /**
4180 * Intermediate state used during shader translation.
4181 */
4182 struct st_translate {
4183 struct ureg_program *ureg;
4184
4185 struct ureg_dst temps[MAX_TEMPS];
4186 struct ureg_dst arrays[MAX_ARRAYS];
4187 struct ureg_src *constants;
4188 struct ureg_src *immediates;
4189 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4190 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4191 struct ureg_dst address[2];
4192 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4193 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4194 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4195 unsigned array_sizes[MAX_ARRAYS];
4196
4197 const GLuint *inputMapping;
4198 const GLuint *outputMapping;
4199
4200 /* For every instruction that contains a label (eg CALL), keep
4201 * details so that we can go back afterwards and emit the correct
4202 * tgsi instruction number for each label.
4203 */
4204 struct label *labels;
4205 unsigned labels_size;
4206 unsigned labels_count;
4207
4208 /* Keep a record of the tgsi instruction number that each mesa
4209 * instruction starts at, will be used to fix up labels after
4210 * translation.
4211 */
4212 unsigned *insn;
4213 unsigned insn_size;
4214 unsigned insn_count;
4215
4216 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4217
4218 boolean error;
4219 };
4220
4221 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4222 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4223 TGSI_SEMANTIC_FACE,
4224 TGSI_SEMANTIC_VERTEXID,
4225 TGSI_SEMANTIC_INSTANCEID,
4226 TGSI_SEMANTIC_SAMPLEID,
4227 TGSI_SEMANTIC_SAMPLEPOS,
4228 TGSI_SEMANTIC_SAMPLEMASK,
4229 TGSI_SEMANTIC_INVOCATIONID,
4230 };
4231
4232 /**
4233 * Make note of a branch to a label in the TGSI code.
4234 * After we've emitted all instructions, we'll go over the list
4235 * of labels built here and patch the TGSI code with the actual
4236 * location of each label.
4237 */
4238 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4239 {
4240 unsigned i;
4241
4242 if (t->labels_count + 1 >= t->labels_size) {
4243 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4244 t->labels = (struct label *)realloc(t->labels,
4245 t->labels_size * sizeof(struct label));
4246 if (t->labels == NULL) {
4247 static unsigned dummy;
4248 t->error = TRUE;
4249 return &dummy;
4250 }
4251 }
4252
4253 i = t->labels_count++;
4254 t->labels[i].branch_target = branch_target;
4255 return &t->labels[i].token;
4256 }
4257
4258 /**
4259 * Called prior to emitting the TGSI code for each instruction.
4260 * Allocate additional space for instructions if needed.
4261 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4262 * the next TGSI instruction.
4263 */
4264 static void set_insn_start(struct st_translate *t, unsigned start)
4265 {
4266 if (t->insn_count + 1 >= t->insn_size) {
4267 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4268 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4269 if (t->insn == NULL) {
4270 t->error = TRUE;
4271 return;
4272 }
4273 }
4274
4275 t->insn[t->insn_count++] = start;
4276 }
4277
4278 /**
4279 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4280 */
4281 static struct ureg_src
4282 emit_immediate(struct st_translate *t,
4283 gl_constant_value values[4],
4284 int type, int size)
4285 {
4286 struct ureg_program *ureg = t->ureg;
4287
4288 switch(type)
4289 {
4290 case GL_FLOAT:
4291 return ureg_DECL_immediate(ureg, &values[0].f, size);
4292 case GL_INT:
4293 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4294 case GL_UNSIGNED_INT:
4295 case GL_BOOL:
4296 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4297 default:
4298 assert(!"should not get here - type must be float, int, uint, or bool");
4299 return ureg_src_undef();
4300 }
4301 }
4302
4303 /**
4304 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4305 */
4306 static struct ureg_dst
4307 dst_register(struct st_translate *t,
4308 gl_register_file file,
4309 GLuint index)
4310 {
4311 unsigned array;
4312
4313 switch(file) {
4314 case PROGRAM_UNDEFINED:
4315 return ureg_dst_undef();
4316
4317 case PROGRAM_TEMPORARY:
4318 assert(index >= 0);
4319 assert(index < (int) Elements(t->temps));
4320
4321 if (ureg_dst_is_undef(t->temps[index]))
4322 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4323
4324 return t->temps[index];
4325
4326 case PROGRAM_ARRAY:
4327 array = index >> 16;
4328
4329 assert(array >= 0);
4330 assert(array < (int) Elements(t->arrays));
4331
4332 if (ureg_dst_is_undef(t->arrays[array]))
4333 t->arrays[array] = ureg_DECL_array_temporary(
4334 t->ureg, t->array_sizes[array], TRUE);
4335
4336 return ureg_dst_array_offset(t->arrays[array],
4337 (int)(index & 0xFFFF) - 0x8000);
4338
4339 case PROGRAM_OUTPUT:
4340 if (t->procType == TGSI_PROCESSOR_VERTEX)
4341 assert(index < VARYING_SLOT_MAX);
4342 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4343 assert(index < FRAG_RESULT_MAX);
4344 else
4345 assert(index < VARYING_SLOT_MAX);
4346
4347 assert(t->outputMapping[index] < Elements(t->outputs));
4348
4349 return t->outputs[t->outputMapping[index]];
4350
4351 case PROGRAM_ADDRESS:
4352 return t->address[index];
4353
4354 default:
4355 assert(!"unknown dst register file");
4356 return ureg_dst_undef();
4357 }
4358 }
4359
4360 /**
4361 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4362 */
4363 static struct ureg_src
4364 src_register(struct st_translate *t,
4365 gl_register_file file,
4366 GLint index, GLint index2D)
4367 {
4368 switch(file) {
4369 case PROGRAM_UNDEFINED:
4370 return ureg_src_undef();
4371
4372 case PROGRAM_TEMPORARY:
4373 case PROGRAM_ARRAY:
4374 return ureg_src(dst_register(t, file, index));
4375
4376 case PROGRAM_UNIFORM:
4377 assert(index >= 0);
4378 return t->constants[index];
4379 case PROGRAM_STATE_VAR:
4380 case PROGRAM_CONSTANT: /* ie, immediate */
4381 if (index2D) {
4382 struct ureg_src src;
4383 src = ureg_src_register(TGSI_FILE_CONSTANT, index);
4384 src.Dimension = 1;
4385 src.DimensionIndex = index2D;
4386 return src;
4387 } else if (index < 0)
4388 return ureg_DECL_constant(t->ureg, 0);
4389 else
4390 return t->constants[index];
4391
4392 case PROGRAM_IMMEDIATE:
4393 return t->immediates[index];
4394
4395 case PROGRAM_INPUT:
4396 assert(t->inputMapping[index] < Elements(t->inputs));
4397 return t->inputs[t->inputMapping[index]];
4398
4399 case PROGRAM_OUTPUT:
4400 assert(t->outputMapping[index] < Elements(t->outputs));
4401 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4402
4403 case PROGRAM_ADDRESS:
4404 return ureg_src(t->address[index]);
4405
4406 case PROGRAM_SYSTEM_VALUE:
4407 assert(index < (int) Elements(t->systemValues));
4408 return t->systemValues[index];
4409
4410 default:
4411 assert(!"unknown src register file");
4412 return ureg_src_undef();
4413 }
4414 }
4415
4416 /**
4417 * Create a TGSI ureg_dst register from an st_dst_reg.
4418 */
4419 static struct ureg_dst
4420 translate_dst(struct st_translate *t,
4421 const st_dst_reg *dst_reg,
4422 bool saturate, bool clamp_color)
4423 {
4424 struct ureg_dst dst = dst_register(t,
4425 dst_reg->file,
4426 dst_reg->index);
4427
4428 dst = ureg_writemask(dst, dst_reg->writemask);
4429
4430 if (saturate)
4431 dst = ureg_saturate(dst);
4432 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4433 /* Clamp colors for ARB_color_buffer_float. */
4434 switch (t->procType) {
4435 case TGSI_PROCESSOR_VERTEX:
4436 /* XXX if the geometry shader is present, this must be done there
4437 * instead of here. */
4438 if (dst_reg->index == VARYING_SLOT_COL0 ||
4439 dst_reg->index == VARYING_SLOT_COL1 ||
4440 dst_reg->index == VARYING_SLOT_BFC0 ||
4441 dst_reg->index == VARYING_SLOT_BFC1) {
4442 dst = ureg_saturate(dst);
4443 }
4444 break;
4445
4446 case TGSI_PROCESSOR_FRAGMENT:
4447 if (dst_reg->index == FRAG_RESULT_COLOR ||
4448 dst_reg->index >= FRAG_RESULT_DATA0) {
4449 dst = ureg_saturate(dst);
4450 }
4451 break;
4452 }
4453 }
4454
4455 if (dst_reg->reladdr != NULL) {
4456 assert(dst_reg->file != PROGRAM_TEMPORARY);
4457 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4458 }
4459
4460 return dst;
4461 }
4462
4463 /**
4464 * Create a TGSI ureg_src register from an st_src_reg.
4465 */
4466 static struct ureg_src
4467 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4468 {
4469 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4470
4471 if (src_reg->has_index2) {
4472 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4473 * and UBO constant buffers (buffer, position).
4474 */
4475 src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4476 if (src_reg->reladdr2)
4477 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4478 src_reg->index2D);
4479 else
4480 src = ureg_src_dimension(src, src_reg->index2D);
4481 }
4482
4483 src = ureg_swizzle(src,
4484 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4485 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4486 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4487 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4488
4489 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4490 src = ureg_negate(src);
4491
4492 if (src_reg->reladdr != NULL) {
4493 assert(src_reg->file != PROGRAM_TEMPORARY);
4494 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4495 }
4496
4497 return src;
4498 }
4499
4500 static struct tgsi_texture_offset
4501 translate_tex_offset(struct st_translate *t,
4502 const st_src_reg *in_offset, int idx)
4503 {
4504 struct tgsi_texture_offset offset;
4505 struct ureg_src imm_src;
4506 struct ureg_dst dst;
4507 int array;
4508
4509 switch (in_offset->file) {
4510 case PROGRAM_IMMEDIATE:
4511 imm_src = t->immediates[in_offset->index];
4512
4513 offset.File = imm_src.File;
4514 offset.Index = imm_src.Index;
4515 offset.SwizzleX = imm_src.SwizzleX;
4516 offset.SwizzleY = imm_src.SwizzleY;
4517 offset.SwizzleZ = imm_src.SwizzleZ;
4518 offset.Padding = 0;
4519 break;
4520 case PROGRAM_TEMPORARY:
4521 imm_src = ureg_src(t->temps[in_offset->index]);
4522 offset.File = imm_src.File;
4523 offset.Index = imm_src.Index;
4524 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4525 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4526 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4527 offset.Padding = 0;
4528 break;
4529 case PROGRAM_ARRAY:
4530 array = in_offset->index >> 16;
4531
4532 assert(array >= 0);
4533 assert(array < (int) Elements(t->arrays));
4534
4535 dst = t->arrays[array];
4536 offset.File = dst.File;
4537 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4538 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4539 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4540 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4541 offset.Padding = 0;
4542 break;
4543 default:
4544 break;
4545 }
4546 return offset;
4547 }
4548
4549 static void
4550 compile_tgsi_instruction(struct st_translate *t,
4551 const glsl_to_tgsi_instruction *inst,
4552 bool clamp_dst_color_output)
4553 {
4554 struct ureg_program *ureg = t->ureg;
4555 GLuint i;
4556 struct ureg_dst dst[1];
4557 struct ureg_src src[4];
4558 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4559
4560 unsigned num_dst;
4561 unsigned num_src;
4562 unsigned tex_target;
4563
4564 num_dst = num_inst_dst_regs(inst->op);
4565 num_src = num_inst_src_regs(inst->op);
4566
4567 if (num_dst)
4568 dst[0] = translate_dst(t,
4569 &inst->dst,
4570 inst->saturate,
4571 clamp_dst_color_output);
4572
4573 for (i = 0; i < num_src; i++)
4574 src[i] = translate_src(t, &inst->src[i]);
4575
4576 switch(inst->op) {
4577 case TGSI_OPCODE_BGNLOOP:
4578 case TGSI_OPCODE_CAL:
4579 case TGSI_OPCODE_ELSE:
4580 case TGSI_OPCODE_ENDLOOP:
4581 case TGSI_OPCODE_IF:
4582 case TGSI_OPCODE_UIF:
4583 assert(num_dst == 0);
4584 ureg_label_insn(ureg,
4585 inst->op,
4586 src, num_src,
4587 get_label(t,
4588 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4589 return;
4590
4591 case TGSI_OPCODE_TEX:
4592 case TGSI_OPCODE_TXB:
4593 case TGSI_OPCODE_TXD:
4594 case TGSI_OPCODE_TXL:
4595 case TGSI_OPCODE_TXP:
4596 case TGSI_OPCODE_TXQ:
4597 case TGSI_OPCODE_TXF:
4598 case TGSI_OPCODE_TEX2:
4599 case TGSI_OPCODE_TXB2:
4600 case TGSI_OPCODE_TXL2:
4601 case TGSI_OPCODE_TG4:
4602 case TGSI_OPCODE_LODQ:
4603 src[num_src++] = t->samplers[inst->sampler];
4604 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4605 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4606 }
4607 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4608
4609 ureg_tex_insn(ureg,
4610 inst->op,
4611 dst, num_dst,
4612 tex_target,
4613 texoffsets, inst->tex_offset_num_offset,
4614 src, num_src);
4615 return;
4616
4617 case TGSI_OPCODE_SCS:
4618 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4619 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4620 break;
4621
4622 default:
4623 ureg_insn(ureg,
4624 inst->op,
4625 dst, num_dst,
4626 src, num_src);
4627 break;
4628 }
4629 }
4630
4631 /**
4632 * Emit the TGSI instructions for inverting and adjusting WPOS.
4633 * This code is unavoidable because it also depends on whether
4634 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4635 */
4636 static void
4637 emit_wpos_adjustment( struct st_translate *t,
4638 const struct gl_program *program,
4639 boolean invert,
4640 GLfloat adjX, GLfloat adjY[2])
4641 {
4642 struct ureg_program *ureg = t->ureg;
4643
4644 /* Fragment program uses fragment position input.
4645 * Need to replace instances of INPUT[WPOS] with temp T
4646 * where T = INPUT[WPOS] by y is inverted.
4647 */
4648 static const gl_state_index wposTransformState[STATE_LENGTH]
4649 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4650 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4651
4652 /* XXX: note we are modifying the incoming shader here! Need to
4653 * do this before emitting the constant decls below, or this
4654 * will be missed:
4655 */
4656 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4657 wposTransformState);
4658
4659 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4660 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4661 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4662
4663 /* First, apply the coordinate shift: */
4664 if (adjX || adjY[0] || adjY[1]) {
4665 if (adjY[0] != adjY[1]) {
4666 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4667 * depending on whether inversion is actually going to be applied
4668 * or not, which is determined by testing against the inversion
4669 * state variable used below, which will be either +1 or -1.
4670 */
4671 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4672
4673 ureg_CMP(ureg, adj_temp,
4674 ureg_scalar(wpostrans, invert ? 2 : 0),
4675 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4676 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4677 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4678 } else {
4679 ureg_ADD(ureg, wpos_temp, wpos_input,
4680 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4681 }
4682 wpos_input = ureg_src(wpos_temp);
4683 } else {
4684 /* MOV wpos_temp, input[wpos]
4685 */
4686 ureg_MOV( ureg, wpos_temp, wpos_input );
4687 }
4688
4689 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4690 * inversion/identity, or the other way around if we're drawing to an FBO.
4691 */
4692 if (invert) {
4693 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4694 */
4695 ureg_MAD( ureg,
4696 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4697 wpos_input,
4698 ureg_scalar(wpostrans, 0),
4699 ureg_scalar(wpostrans, 1));
4700 } else {
4701 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4702 */
4703 ureg_MAD( ureg,
4704 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4705 wpos_input,
4706 ureg_scalar(wpostrans, 2),
4707 ureg_scalar(wpostrans, 3));
4708 }
4709
4710 /* Use wpos_temp as position input from here on:
4711 */
4712 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4713 }
4714
4715
4716 /**
4717 * Emit fragment position/ooordinate code.
4718 */
4719 static void
4720 emit_wpos(struct st_context *st,
4721 struct st_translate *t,
4722 const struct gl_program *program,
4723 struct ureg_program *ureg)
4724 {
4725 const struct gl_fragment_program *fp =
4726 (const struct gl_fragment_program *) program;
4727 struct pipe_screen *pscreen = st->pipe->screen;
4728 GLfloat adjX = 0.0f;
4729 GLfloat adjY[2] = { 0.0f, 0.0f };
4730 boolean invert = FALSE;
4731
4732 /* Query the pixel center conventions supported by the pipe driver and set
4733 * adjX, adjY to help out if it cannot handle the requested one internally.
4734 *
4735 * The bias of the y-coordinate depends on whether y-inversion takes place
4736 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4737 * drawing to an FBO (causes additional inversion), and whether the the pipe
4738 * driver origin and the requested origin differ (the latter condition is
4739 * stored in the 'invert' variable).
4740 *
4741 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4742 *
4743 * center shift only:
4744 * i -> h: +0.5
4745 * h -> i: -0.5
4746 *
4747 * inversion only:
4748 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4749 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4750 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4751 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4752 *
4753 * inversion and center shift:
4754 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4755 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4756 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4757 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4758 */
4759 if (fp->OriginUpperLeft) {
4760 /* Fragment shader wants origin in upper-left */
4761 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4762 /* the driver supports upper-left origin */
4763 }
4764 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4765 /* the driver supports lower-left origin, need to invert Y */
4766 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4767 invert = TRUE;
4768 }
4769 else
4770 assert(0);
4771 }
4772 else {
4773 /* Fragment shader wants origin in lower-left */
4774 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4775 /* the driver supports lower-left origin */
4776 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4777 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4778 /* the driver supports upper-left origin, need to invert Y */
4779 invert = TRUE;
4780 else
4781 assert(0);
4782 }
4783
4784 if (fp->PixelCenterInteger) {
4785 /* Fragment shader wants pixel center integer */
4786 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4787 /* the driver supports pixel center integer */
4788 adjY[1] = 1.0f;
4789 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4790 }
4791 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4792 /* the driver supports pixel center half integer, need to bias X,Y */
4793 adjX = -0.5f;
4794 adjY[0] = -0.5f;
4795 adjY[1] = 0.5f;
4796 }
4797 else
4798 assert(0);
4799 }
4800 else {
4801 /* Fragment shader wants pixel center half integer */
4802 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4803 /* the driver supports pixel center half integer */
4804 }
4805 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4806 /* the driver supports pixel center integer, need to bias X,Y */
4807 adjX = adjY[0] = adjY[1] = 0.5f;
4808 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4809 }
4810 else
4811 assert(0);
4812 }
4813
4814 /* we invert after adjustment so that we avoid the MOV to temporary,
4815 * and reuse the adjustment ADD instead */
4816 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4817 }
4818
4819 /**
4820 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4821 * TGSI uses +1 for front, -1 for back.
4822 * This function converts the TGSI value to the GL value. Simply clamping/
4823 * saturating the value to [0,1] does the job.
4824 */
4825 static void
4826 emit_face_var(struct st_translate *t)
4827 {
4828 struct ureg_program *ureg = t->ureg;
4829 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4830 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4831
4832 /* MOV_SAT face_temp, input[face] */
4833 face_temp = ureg_saturate(face_temp);
4834 ureg_MOV(ureg, face_temp, face_input);
4835
4836 /* Use face_temp as face input from here on: */
4837 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4838 }
4839
4840 static void
4841 emit_edgeflags(struct st_translate *t)
4842 {
4843 struct ureg_program *ureg = t->ureg;
4844 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4845 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4846
4847 ureg_MOV(ureg, edge_dst, edge_src);
4848 }
4849
4850 /**
4851 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4852 * \param program the program to translate
4853 * \param numInputs number of input registers used
4854 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4855 * input indexes
4856 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4857 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4858 * each input
4859 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4860 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4861 * \param numOutputs number of output registers used
4862 * \param outputMapping maps Mesa fragment program outputs to TGSI
4863 * generic outputs
4864 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4865 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4866 * each output
4867 *
4868 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4869 */
4870 extern "C" enum pipe_error
4871 st_translate_program(
4872 struct gl_context *ctx,
4873 uint procType,
4874 struct ureg_program *ureg,
4875 glsl_to_tgsi_visitor *program,
4876 const struct gl_program *proginfo,
4877 GLuint numInputs,
4878 const GLuint inputMapping[],
4879 const ubyte inputSemanticName[],
4880 const ubyte inputSemanticIndex[],
4881 const GLuint interpMode[],
4882 const GLuint interpLocation[],
4883 GLuint numOutputs,
4884 const GLuint outputMapping[],
4885 const ubyte outputSemanticName[],
4886 const ubyte outputSemanticIndex[],
4887 boolean passthrough_edgeflags,
4888 boolean clamp_color)
4889 {
4890 struct st_translate *t;
4891 unsigned i;
4892 enum pipe_error ret = PIPE_OK;
4893
4894 assert(numInputs <= Elements(t->inputs));
4895 assert(numOutputs <= Elements(t->outputs));
4896
4897 t = CALLOC_STRUCT(st_translate);
4898 if (!t) {
4899 ret = PIPE_ERROR_OUT_OF_MEMORY;
4900 goto out;
4901 }
4902
4903 memset(t, 0, sizeof *t);
4904
4905 t->procType = procType;
4906 t->inputMapping = inputMapping;
4907 t->outputMapping = outputMapping;
4908 t->ureg = ureg;
4909
4910 if (program->shader_program) {
4911 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4912 struct gl_uniform_storage *const storage =
4913 &program->shader_program->UniformStorage[i];
4914
4915 _mesa_uniform_detach_all_driver_storage(storage);
4916 }
4917 }
4918
4919 /*
4920 * Declare input attributes.
4921 */
4922 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4923 for (i = 0; i < numInputs; i++) {
4924 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4925 inputSemanticName[i],
4926 inputSemanticIndex[i],
4927 interpMode[i], 0,
4928 interpLocation[i]);
4929 }
4930
4931 if (proginfo->InputsRead & VARYING_BIT_POS) {
4932 /* Must do this after setting up t->inputs, and before
4933 * emitting constant references, below:
4934 */
4935 emit_wpos(st_context(ctx), t, proginfo, ureg);
4936 }
4937
4938 if (proginfo->InputsRead & VARYING_BIT_FACE)
4939 emit_face_var(t);
4940
4941 /*
4942 * Declare output attributes.
4943 */
4944 for (i = 0; i < numOutputs; i++) {
4945 switch (outputSemanticName[i]) {
4946 case TGSI_SEMANTIC_POSITION:
4947 t->outputs[i] = ureg_DECL_output(ureg,
4948 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4949 outputSemanticIndex[i]);
4950 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4951 break;
4952 case TGSI_SEMANTIC_STENCIL:
4953 t->outputs[i] = ureg_DECL_output(ureg,
4954 TGSI_SEMANTIC_STENCIL, /* Stencil */
4955 outputSemanticIndex[i]);
4956 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4957 break;
4958 case TGSI_SEMANTIC_COLOR:
4959 t->outputs[i] = ureg_DECL_output(ureg,
4960 TGSI_SEMANTIC_COLOR,
4961 outputSemanticIndex[i]);
4962 break;
4963 case TGSI_SEMANTIC_SAMPLEMASK:
4964 t->outputs[i] = ureg_DECL_output(ureg,
4965 TGSI_SEMANTIC_SAMPLEMASK,
4966 outputSemanticIndex[i]);
4967 /* TODO: If we ever support more than 32 samples, this will have
4968 * to become an array.
4969 */
4970 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4971 break;
4972 default:
4973 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4974 ret = PIPE_ERROR_BAD_INPUT;
4975 goto out;
4976 }
4977 }
4978 }
4979 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4980 for (i = 0; i < numInputs; i++) {
4981 t->inputs[i] = ureg_DECL_gs_input(ureg,
4982 i,
4983 inputSemanticName[i],
4984 inputSemanticIndex[i]);
4985 }
4986
4987 for (i = 0; i < numOutputs; i++) {
4988 t->outputs[i] = ureg_DECL_output(ureg,
4989 outputSemanticName[i],
4990 outputSemanticIndex[i]);
4991 }
4992 }
4993 else {
4994 assert(procType == TGSI_PROCESSOR_VERTEX);
4995
4996 for (i = 0; i < numInputs; i++) {
4997 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4998 }
4999
5000 for (i = 0; i < numOutputs; i++) {
5001 t->outputs[i] = ureg_DECL_output(ureg,
5002 outputSemanticName[i],
5003 outputSemanticIndex[i]);
5004 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
5005 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5006 ureg_MOV(ureg,
5007 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
5008 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
5009 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5010 }
5011 }
5012 if (passthrough_edgeflags)
5013 emit_edgeflags(t);
5014 }
5015
5016 /* Declare address register.
5017 */
5018 if (program->num_address_regs > 0) {
5019 assert(program->num_address_regs <= 2);
5020 t->address[0] = ureg_DECL_address(ureg);
5021 if (program->num_address_regs == 2)
5022 t->address[1] = ureg_DECL_address(ureg);
5023 }
5024
5025 /* Declare misc input registers
5026 */
5027 {
5028 GLbitfield sysInputs = proginfo->SystemValuesRead;
5029 unsigned numSys = 0;
5030 for (i = 0; sysInputs; i++) {
5031 if (sysInputs & (1 << i)) {
5032 unsigned semName = mesa_sysval_to_semantic[i];
5033 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5034 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5035 semName == TGSI_SEMANTIC_VERTEXID) {
5036 /* From Gallium perspective, these system values are always
5037 * integer, and require native integer support. However, if
5038 * native integer is supported on the vertex stage but not the
5039 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5040 * assumes these system values are floats. To resolve the
5041 * inconsistency, we insert a U2F.
5042 */
5043 struct st_context *st = st_context(ctx);
5044 struct pipe_screen *pscreen = st->pipe->screen;
5045 assert(procType == TGSI_PROCESSOR_VERTEX);
5046 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5047 if (!ctx->Const.NativeIntegers) {
5048 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5049 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5050 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5051 }
5052 }
5053 numSys++;
5054 sysInputs &= ~(1 << i);
5055 }
5056 }
5057 }
5058
5059 /* Copy over array sizes
5060 */
5061 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5062
5063 /* Emit constants and uniforms. TGSI uses a single index space for these,
5064 * so we put all the translated regs in t->constants.
5065 */
5066 if (proginfo->Parameters) {
5067 t->constants = (struct ureg_src *)
5068 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5069 if (t->constants == NULL) {
5070 ret = PIPE_ERROR_OUT_OF_MEMORY;
5071 goto out;
5072 }
5073
5074 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5075 switch (proginfo->Parameters->Parameters[i].Type) {
5076 case PROGRAM_STATE_VAR:
5077 case PROGRAM_UNIFORM:
5078 t->constants[i] = ureg_DECL_constant(ureg, i);
5079 break;
5080
5081 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5082 * addressing of the const buffer.
5083 * FIXME: Be smarter and recognize param arrays:
5084 * indirect addressing is only valid within the referenced
5085 * array.
5086 */
5087 case PROGRAM_CONSTANT:
5088 if (program->indirect_addr_consts)
5089 t->constants[i] = ureg_DECL_constant(ureg, i);
5090 else
5091 t->constants[i] = emit_immediate(t,
5092 proginfo->Parameters->ParameterValues[i],
5093 proginfo->Parameters->Parameters[i].DataType,
5094 4);
5095 break;
5096 default:
5097 break;
5098 }
5099 }
5100 }
5101
5102 if (program->shader) {
5103 unsigned num_ubos = program->shader->NumUniformBlocks;
5104
5105 for (i = 0; i < num_ubos; i++) {
5106 unsigned size =
5107 program->shader_program->UniformBlocks[i].UniformBufferSize;
5108 unsigned num_const_vecs = (size + 15) / 16;
5109 unsigned first, last;
5110 assert(num_const_vecs > 0);
5111 first = 0;
5112 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5113 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5114 }
5115 }
5116
5117 /* Emit immediate values.
5118 */
5119 t->immediates = (struct ureg_src *)
5120 calloc(program->num_immediates, sizeof(struct ureg_src));
5121 if (t->immediates == NULL) {
5122 ret = PIPE_ERROR_OUT_OF_MEMORY;
5123 goto out;
5124 }
5125 i = 0;
5126 foreach_in_list(immediate_storage, imm, &program->immediates) {
5127 assert(i < program->num_immediates);
5128 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5129 }
5130 assert(i == program->num_immediates);
5131
5132 /* texture samplers */
5133 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5134 if (program->samplers_used & (1 << i)) {
5135 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5136 }
5137 }
5138
5139 /* Emit each instruction in turn:
5140 */
5141 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5142 set_insn_start(t, ureg_get_instruction_number(ureg));
5143 compile_tgsi_instruction(t, inst, clamp_color);
5144 }
5145
5146 /* Fix up all emitted labels:
5147 */
5148 for (i = 0; i < t->labels_count; i++) {
5149 ureg_fixup_label(ureg, t->labels[i].token,
5150 t->insn[t->labels[i].branch_target]);
5151 }
5152
5153 if (program->shader_program) {
5154 /* This has to be done last. Any operation the can cause
5155 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5156 * program constant) has to happen before creating this linkage.
5157 */
5158 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5159 if (program->shader_program->_LinkedShaders[i] == NULL)
5160 continue;
5161
5162 _mesa_associate_uniform_storage(ctx, program->shader_program,
5163 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5164 }
5165 }
5166
5167 out:
5168 if (t) {
5169 free(t->insn);
5170 free(t->labels);
5171 free(t->constants);
5172 free(t->immediates);
5173
5174 if (t->error) {
5175 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5176 }
5177
5178 free(t);
5179 }
5180
5181 return ret;
5182 }
5183 /* ----------------------------- End TGSI code ------------------------------ */
5184
5185
5186 static unsigned
5187 shader_stage_to_ptarget(gl_shader_stage stage)
5188 {
5189 switch (stage) {
5190 case MESA_SHADER_VERTEX:
5191 return PIPE_SHADER_VERTEX;
5192 case MESA_SHADER_FRAGMENT:
5193 return PIPE_SHADER_FRAGMENT;
5194 case MESA_SHADER_GEOMETRY:
5195 return PIPE_SHADER_GEOMETRY;
5196 case MESA_SHADER_COMPUTE:
5197 return PIPE_SHADER_COMPUTE;
5198 }
5199
5200 assert(!"should not be reached");
5201 return PIPE_SHADER_VERTEX;
5202 }
5203
5204
5205 /**
5206 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5207 * generating Mesa IR.
5208 */
5209 static struct gl_program *
5210 get_mesa_program(struct gl_context *ctx,
5211 struct gl_shader_program *shader_program,
5212 struct gl_shader *shader)
5213 {
5214 glsl_to_tgsi_visitor* v;
5215 struct gl_program *prog;
5216 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5217 bool progress;
5218 struct gl_shader_compiler_options *options =
5219 &ctx->ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5220 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5221 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5222
5223 validate_ir_tree(shader->ir);
5224
5225 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5226 if (!prog)
5227 return NULL;
5228 prog->Parameters = _mesa_new_parameter_list();
5229 v = new glsl_to_tgsi_visitor();
5230 v->ctx = ctx;
5231 v->prog = prog;
5232 v->shader_program = shader_program;
5233 v->shader = shader;
5234 v->options = options;
5235 v->glsl_version = ctx->Const.GLSLVersion;
5236 v->native_integers = ctx->Const.NativeIntegers;
5237
5238 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5239 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5240
5241 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5242 prog->Parameters);
5243
5244 /* Remove reads from output registers. */
5245 lower_output_reads(shader->ir);
5246
5247 /* Emit intermediate IR for main(). */
5248 visit_exec_list(shader->ir, v);
5249
5250 /* Now emit bodies for any functions that were used. */
5251 do {
5252 progress = GL_FALSE;
5253
5254 foreach_in_list(function_entry, entry, &v->function_signatures) {
5255 if (!entry->bgn_inst) {
5256 v->current_function = entry;
5257
5258 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5259 entry->bgn_inst->function = entry;
5260
5261 visit_exec_list(&entry->sig->body, v);
5262
5263 glsl_to_tgsi_instruction *last;
5264 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5265 if (last->op != TGSI_OPCODE_RET)
5266 v->emit(NULL, TGSI_OPCODE_RET);
5267
5268 glsl_to_tgsi_instruction *end;
5269 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5270 end->function = entry;
5271
5272 progress = GL_TRUE;
5273 }
5274 }
5275 } while (progress);
5276
5277 #if 0
5278 /* Print out some information (for debugging purposes) used by the
5279 * optimization passes. */
5280 for (i=0; i < v->next_temp; i++) {
5281 int fr = v->get_first_temp_read(i);
5282 int fw = v->get_first_temp_write(i);
5283 int lr = v->get_last_temp_read(i);
5284 int lw = v->get_last_temp_write(i);
5285
5286 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5287 assert(fw <= fr);
5288 }
5289 #endif
5290
5291 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5292 v->simplify_cmp();
5293 v->copy_propagate();
5294 while (v->eliminate_dead_code());
5295
5296 v->merge_registers();
5297 v->renumber_registers();
5298
5299 /* Write the END instruction. */
5300 v->emit(NULL, TGSI_OPCODE_END);
5301
5302 if (ctx->_Shader->Flags & GLSL_DUMP) {
5303 printf("\n");
5304 printf("GLSL IR for linked %s program %d:\n",
5305 _mesa_shader_stage_to_string(shader->Stage),
5306 shader_program->Name);
5307 _mesa_print_ir(stdout, shader->ir, NULL);
5308 printf("\n");
5309 printf("\n");
5310 fflush(stdout);
5311 }
5312
5313 prog->Instructions = NULL;
5314 prog->NumInstructions = 0;
5315
5316 do_set_program_inouts(shader->ir, prog, shader->Stage);
5317 count_resources(v, prog);
5318
5319 _mesa_reference_program(ctx, &shader->Program, prog);
5320
5321 /* This has to be done last. Any operation the can cause
5322 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5323 * program constant) has to happen before creating this linkage.
5324 */
5325 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5326 if (!shader_program->LinkStatus) {
5327 return NULL;
5328 }
5329
5330 struct st_vertex_program *stvp;
5331 struct st_fragment_program *stfp;
5332 struct st_geometry_program *stgp;
5333
5334 switch (shader->Type) {
5335 case GL_VERTEX_SHADER:
5336 stvp = (struct st_vertex_program *)prog;
5337 stvp->glsl_to_tgsi = v;
5338 break;
5339 case GL_FRAGMENT_SHADER:
5340 stfp = (struct st_fragment_program *)prog;
5341 stfp->glsl_to_tgsi = v;
5342 break;
5343 case GL_GEOMETRY_SHADER:
5344 stgp = (struct st_geometry_program *)prog;
5345 stgp->glsl_to_tgsi = v;
5346 stgp->Base.InputType = shader_program->Geom.InputType;
5347 stgp->Base.OutputType = shader_program->Geom.OutputType;
5348 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5349 stgp->Base.Invocations = shader_program->Geom.Invocations;
5350 break;
5351 default:
5352 assert(!"should not be reached");
5353 return NULL;
5354 }
5355
5356 return prog;
5357 }
5358
5359 extern "C" {
5360
5361 struct gl_shader *
5362 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5363 {
5364 struct gl_shader *shader;
5365 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5366 type == GL_GEOMETRY_SHADER_ARB);
5367 shader = rzalloc(NULL, struct gl_shader);
5368 if (shader) {
5369 shader->Type = type;
5370 shader->Stage = _mesa_shader_enum_to_shader_stage(type);
5371 shader->Name = name;
5372 _mesa_init_shader(ctx, shader);
5373 }
5374 return shader;
5375 }
5376
5377 struct gl_shader_program *
5378 st_new_shader_program(struct gl_context *ctx, GLuint name)
5379 {
5380 struct gl_shader_program *shProg;
5381 shProg = rzalloc(NULL, struct gl_shader_program);
5382 if (shProg) {
5383 shProg->Name = name;
5384 _mesa_init_shader_program(ctx, shProg);
5385 }
5386 return shProg;
5387 }
5388
5389 /**
5390 * Link a shader.
5391 * Called via ctx->Driver.LinkShader()
5392 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5393 * with code lowering and other optimizations.
5394 */
5395 GLboolean
5396 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5397 {
5398 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5399 assert(prog->LinkStatus);
5400
5401 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5402 if (prog->_LinkedShaders[i] == NULL)
5403 continue;
5404
5405 bool progress;
5406 exec_list *ir = prog->_LinkedShaders[i]->ir;
5407 const struct gl_shader_compiler_options *options =
5408 &ctx->ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5409
5410 /* If there are forms of indirect addressing that the driver
5411 * cannot handle, perform the lowering pass.
5412 */
5413 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5414 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5415 lower_variable_index_to_cond_assign(ir,
5416 options->EmitNoIndirectInput,
5417 options->EmitNoIndirectOutput,
5418 options->EmitNoIndirectTemp,
5419 options->EmitNoIndirectUniform);
5420 }
5421
5422 if (ctx->Extensions.ARB_shading_language_packing) {
5423 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5424 LOWER_UNPACK_SNORM_2x16 |
5425 LOWER_PACK_UNORM_2x16 |
5426 LOWER_UNPACK_UNORM_2x16 |
5427 LOWER_PACK_SNORM_4x8 |
5428 LOWER_UNPACK_SNORM_4x8 |
5429 LOWER_UNPACK_UNORM_4x8 |
5430 LOWER_PACK_UNORM_4x8 |
5431 LOWER_PACK_HALF_2x16 |
5432 LOWER_UNPACK_HALF_2x16;
5433
5434 lower_packing_builtins(ir, lower_inst);
5435 }
5436
5437 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5438 lower_offset_arrays(ir);
5439 do_mat_op_to_vec(ir);
5440 lower_instructions(ir,
5441 MOD_TO_FRACT |
5442 DIV_TO_MUL_RCP |
5443 EXP_TO_EXP2 |
5444 LOG_TO_LOG2 |
5445 LDEXP_TO_ARITH |
5446 CARRY_TO_ARITH |
5447 BORROW_TO_ARITH |
5448 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5449 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5450
5451 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5452 do_vec_index_to_cond_assign(ir);
5453 lower_vector_insert(ir, true);
5454 lower_quadop_vector(ir, false);
5455 lower_noise(ir);
5456 if (options->MaxIfDepth == 0) {
5457 lower_discard(ir);
5458 }
5459
5460 do {
5461 progress = false;
5462
5463 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5464
5465 progress = do_common_optimization(ir, true, true, options,
5466 ctx->Const.NativeIntegers)
5467 || progress;
5468
5469 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5470
5471 } while (progress);
5472
5473 validate_ir_tree(ir);
5474 }
5475
5476 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5477 struct gl_program *linked_prog;
5478
5479 if (prog->_LinkedShaders[i] == NULL)
5480 continue;
5481
5482 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5483
5484 if (linked_prog) {
5485 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5486 linked_prog);
5487 if (!ctx->Driver.ProgramStringNotify(ctx,
5488 _mesa_shader_stage_to_program(i),
5489 linked_prog)) {
5490 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5491 NULL);
5492 _mesa_reference_program(ctx, &linked_prog, NULL);
5493 return GL_FALSE;
5494 }
5495 }
5496
5497 _mesa_reference_program(ctx, &linked_prog, NULL);
5498 }
5499
5500 return GL_TRUE;
5501 }
5502
5503 void
5504 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5505 const GLuint outputMapping[],
5506 struct pipe_stream_output_info *so)
5507 {
5508 unsigned i;
5509 struct gl_transform_feedback_info *info =
5510 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5511
5512 for (i = 0; i < info->NumOutputs; i++) {
5513 so->output[i].register_index =
5514 outputMapping[info->Outputs[i].OutputRegister];
5515 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5516 so->output[i].num_components = info->Outputs[i].NumComponents;
5517 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5518 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5519 so->output[i].stream = info->Outputs[i].StreamId;
5520 }
5521
5522 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5523 so->stride[i] = info->BufferStride[i];
5524 }
5525 so->num_outputs = info->NumOutputs;
5526 }
5527
5528 } /* extern "C" */