2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
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19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
33 #include "st_glsl_to_tgsi.h"
35 #include "glsl_parser_extras.h"
36 #include "ir_optimization.h"
38 #include "main/errors.h"
39 #include "main/shaderobj.h"
40 #include "main/uniforms.h"
41 #include "main/shaderapi.h"
42 #include "program/prog_instruction.h"
43 #include "program/sampler.h"
45 #include "pipe/p_context.h"
46 #include "pipe/p_screen.h"
47 #include "tgsi/tgsi_ureg.h"
48 #include "tgsi/tgsi_info.h"
49 #include "util/u_math.h"
50 #include "util/u_memory.h"
51 #include "st_program.h"
52 #include "st_mesa_to_tgsi.h"
55 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
56 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
57 (1 << PROGRAM_CONSTANT) | \
58 (1 << PROGRAM_UNIFORM))
60 #define MAX_GLSL_TEXTURE_OFFSET 4
65 static int swizzle_for_size(int size
);
68 * This struct is a corresponding struct to TGSI ureg_src.
72 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
76 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
77 this->swizzle
= swizzle_for_size(type
->vector_elements
);
79 this->swizzle
= SWIZZLE_XYZW
;
82 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
84 this->reladdr2
= NULL
;
85 this->has_index2
= false;
86 this->double_reg2
= false;
90 st_src_reg(gl_register_file file
, int index
, int type
)
96 this->swizzle
= SWIZZLE_XYZW
;
99 this->reladdr2
= NULL
;
100 this->has_index2
= false;
101 this->double_reg2
= false;
105 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
110 this->index2D
= index2D
;
111 this->swizzle
= SWIZZLE_XYZW
;
113 this->reladdr
= NULL
;
114 this->reladdr2
= NULL
;
115 this->has_index2
= false;
116 this->double_reg2
= false;
122 this->type
= GLSL_TYPE_ERROR
;
123 this->file
= PROGRAM_UNDEFINED
;
128 this->reladdr
= NULL
;
129 this->reladdr2
= NULL
;
130 this->has_index2
= false;
131 this->double_reg2
= false;
135 explicit st_src_reg(st_dst_reg reg
);
137 gl_register_file file
; /**< PROGRAM_* from Mesa */
138 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
140 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
141 int negate
; /**< NEGATE_XYZW mask from mesa */
142 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
143 /** Register index should be offset by the integer in this reg. */
145 st_src_reg
*reladdr2
;
148 * Is this the second half of a double register pair?
149 * currently used for input mapping only.
157 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
162 this->writemask
= writemask
;
163 this->cond_mask
= COND_TR
;
164 this->reladdr
= NULL
;
165 this->reladdr2
= NULL
;
166 this->has_index2
= false;
171 st_dst_reg(gl_register_file file
, int writemask
, int type
)
176 this->writemask
= writemask
;
177 this->cond_mask
= COND_TR
;
178 this->reladdr
= NULL
;
179 this->reladdr2
= NULL
;
180 this->has_index2
= false;
187 this->type
= GLSL_TYPE_ERROR
;
188 this->file
= PROGRAM_UNDEFINED
;
192 this->cond_mask
= COND_TR
;
193 this->reladdr
= NULL
;
194 this->reladdr2
= NULL
;
195 this->has_index2
= false;
199 explicit st_dst_reg(st_src_reg reg
);
201 gl_register_file file
; /**< PROGRAM_* from Mesa */
202 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
204 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
206 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
207 /** Register index should be offset by the integer in this reg. */
209 st_src_reg
*reladdr2
;
214 st_src_reg::st_src_reg(st_dst_reg reg
)
216 this->type
= reg
.type
;
217 this->file
= reg
.file
;
218 this->index
= reg
.index
;
219 this->swizzle
= SWIZZLE_XYZW
;
221 this->reladdr
= reg
.reladdr
;
222 this->index2D
= reg
.index2D
;
223 this->reladdr2
= reg
.reladdr2
;
224 this->has_index2
= reg
.has_index2
;
225 this->double_reg2
= false;
226 this->array_id
= reg
.array_id
;
229 st_dst_reg::st_dst_reg(st_src_reg reg
)
231 this->type
= reg
.type
;
232 this->file
= reg
.file
;
233 this->index
= reg
.index
;
234 this->writemask
= WRITEMASK_XYZW
;
235 this->cond_mask
= COND_TR
;
236 this->reladdr
= reg
.reladdr
;
237 this->index2D
= reg
.index2D
;
238 this->reladdr2
= reg
.reladdr2
;
239 this->has_index2
= reg
.has_index2
;
240 this->array_id
= reg
.array_id
;
243 class glsl_to_tgsi_instruction
: public exec_node
{
245 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
250 /** Pointer to the ir source this tree came from for debugging */
252 GLboolean cond_update
;
254 st_src_reg sampler
; /**< sampler register */
255 int sampler_array_size
; /**< 1-based size of sampler array, 1 if not array */
256 int tex_target
; /**< One of TEXTURE_*_INDEX */
257 glsl_base_type tex_type
;
258 GLboolean tex_shadow
;
260 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
261 unsigned tex_offset_num_offset
;
262 int dead_mask
; /**< Used in dead code elimination */
264 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
267 class variable_storage
: public exec_node
{
269 variable_storage(ir_variable
*var
, gl_register_file file
, int index
,
270 unsigned array_id
= 0)
271 : file(file
), index(index
), var(var
), array_id(array_id
)
276 gl_register_file file
;
278 ir_variable
*var
; /* variable that maps to this, if any */
282 class immediate_storage
: public exec_node
{
284 immediate_storage(gl_constant_value
*values
, int size32
, int type
)
286 memcpy(this->values
, values
, size32
* sizeof(gl_constant_value
));
287 this->size32
= size32
;
291 /* doubles are stored across 2 gl_constant_values */
292 gl_constant_value values
[4];
293 int size32
; /**< Number of 32-bit components (1-4) */
294 int type
; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
297 class function_entry
: public exec_node
{
299 ir_function_signature
*sig
;
302 * identifier of this function signature used by the program.
304 * At the point that TGSI instructions for function calls are
305 * generated, we don't know the address of the first instruction of
306 * the function body. So we make the BranchTarget that is called a
307 * small integer and rewrite them during set_branchtargets().
312 * Pointer to first instruction of the function body.
314 * Set during function body emits after main() is processed.
316 glsl_to_tgsi_instruction
*bgn_inst
;
319 * Index of the first instruction of the function body in actual TGSI.
321 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
325 /** Storage for the return value. */
326 st_src_reg return_reg
;
329 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
330 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
338 struct glsl_to_tgsi_visitor
: public ir_visitor
{
340 glsl_to_tgsi_visitor();
341 ~glsl_to_tgsi_visitor();
343 function_entry
*current_function
;
345 struct gl_context
*ctx
;
346 struct gl_program
*prog
;
347 struct gl_shader_program
*shader_program
;
348 struct gl_shader
*shader
;
349 struct gl_shader_compiler_options
*options
;
353 unsigned *array_sizes
;
354 unsigned max_num_arrays
;
357 struct array_decl input_arrays
[PIPE_MAX_SHADER_INPUTS
];
358 unsigned num_input_arrays
;
359 struct array_decl output_arrays
[PIPE_MAX_SHADER_OUTPUTS
];
360 unsigned num_output_arrays
;
362 int num_address_regs
;
364 glsl_base_type sampler_types
[PIPE_MAX_SAMPLERS
];
365 int sampler_targets
[PIPE_MAX_SAMPLERS
]; /**< One of TGSI_TEXTURE_* */
366 bool indirect_addr_consts
;
367 int wpos_transform_const
;
370 bool native_integers
;
374 variable_storage
*find_variable_storage(ir_variable
*var
);
376 int add_constant(gl_register_file file
, gl_constant_value values
[8],
377 int size
, int datatype
, GLuint
*swizzle_out
);
379 function_entry
*get_function_signature(ir_function_signature
*sig
);
381 st_src_reg
get_temp(const glsl_type
*type
);
382 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
384 st_src_reg
st_src_reg_for_double(double val
);
385 st_src_reg
st_src_reg_for_float(float val
);
386 st_src_reg
st_src_reg_for_int(int val
);
387 st_src_reg
st_src_reg_for_type(int type
, int val
);
390 * \name Visit methods
392 * As typical for the visitor pattern, there must be one \c visit method for
393 * each concrete subclass of \c ir_instruction. Virtual base classes within
394 * the hierarchy should not have \c visit methods.
397 virtual void visit(ir_variable
*);
398 virtual void visit(ir_loop
*);
399 virtual void visit(ir_loop_jump
*);
400 virtual void visit(ir_function_signature
*);
401 virtual void visit(ir_function
*);
402 virtual void visit(ir_expression
*);
403 virtual void visit(ir_swizzle
*);
404 virtual void visit(ir_dereference_variable
*);
405 virtual void visit(ir_dereference_array
*);
406 virtual void visit(ir_dereference_record
*);
407 virtual void visit(ir_assignment
*);
408 virtual void visit(ir_constant
*);
409 virtual void visit(ir_call
*);
410 virtual void visit(ir_return
*);
411 virtual void visit(ir_discard
*);
412 virtual void visit(ir_texture
*);
413 virtual void visit(ir_if
*);
414 virtual void visit(ir_emit_vertex
*);
415 virtual void visit(ir_end_primitive
*);
416 virtual void visit(ir_barrier
*);
421 /** List of variable_storage */
424 /** List of immediate_storage */
425 exec_list immediates
;
426 unsigned num_immediates
;
428 /** List of function_entry */
429 exec_list function_signatures
;
430 int next_signature_id
;
432 /** List of glsl_to_tgsi_instruction */
433 exec_list instructions
;
435 glsl_to_tgsi_instruction
*emit_asm(ir_instruction
*ir
, unsigned op
,
436 st_dst_reg dst
= undef_dst
,
437 st_src_reg src0
= undef_src
,
438 st_src_reg src1
= undef_src
,
439 st_src_reg src2
= undef_src
,
440 st_src_reg src3
= undef_src
);
442 glsl_to_tgsi_instruction
*emit_asm(ir_instruction
*ir
, unsigned op
,
443 st_dst_reg dst
, st_dst_reg dst1
,
444 st_src_reg src0
= undef_src
,
445 st_src_reg src1
= undef_src
,
446 st_src_reg src2
= undef_src
,
447 st_src_reg src3
= undef_src
);
449 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
451 st_src_reg src0
, st_src_reg src1
);
454 * Emit the correct dot-product instruction for the type of arguments
456 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
462 void emit_scalar(ir_instruction
*ir
, unsigned op
,
463 st_dst_reg dst
, st_src_reg src0
);
465 void emit_scalar(ir_instruction
*ir
, unsigned op
,
466 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
468 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
470 bool try_emit_mad(ir_expression
*ir
,
472 bool try_emit_mad_for_and_not(ir_expression
*ir
,
475 void emit_swz(ir_expression
*ir
);
477 bool process_move_condition(ir_rvalue
*ir
);
479 void simplify_cmp(void);
481 void rename_temp_register(int index
, int new_index
);
482 int get_first_temp_read(int index
);
483 int get_first_temp_write(int index
);
484 int get_last_temp_read(int index
);
485 int get_last_temp_write(int index
);
487 void copy_propagate(void);
488 int eliminate_dead_code(void);
490 void merge_two_dsts(void);
491 void merge_registers(void);
492 void renumber_registers(void);
494 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
495 st_dst_reg
*l
, st_src_reg
*r
,
496 st_src_reg
*cond
, bool cond_swap
);
501 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
502 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
503 static st_dst_reg sampler_reladdr
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 2);
506 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
509 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
513 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
516 prog
->LinkStatus
= GL_FALSE
;
520 swizzle_for_size(int size
)
522 static const int size_swizzles
[4] = {
523 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
524 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
525 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
526 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
529 assert((size
>= 1) && (size
<= 4));
530 return size_swizzles
[size
- 1];
534 is_tex_instruction(unsigned opcode
)
536 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
541 num_inst_dst_regs(unsigned opcode
)
543 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
544 return info
->num_dst
;
548 num_inst_src_regs(unsigned opcode
)
550 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
551 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
554 glsl_to_tgsi_instruction
*
555 glsl_to_tgsi_visitor::emit_asm(ir_instruction
*ir
, unsigned op
,
556 st_dst_reg dst
, st_dst_reg dst1
,
557 st_src_reg src0
, st_src_reg src1
,
558 st_src_reg src2
, st_src_reg src3
)
560 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
561 int num_reladdr
= 0, i
, j
;
563 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
565 /* If we have to do relative addressing, we want to load the ARL
566 * reg directly for one of the regs, and preload the other reladdr
567 * sources into temps.
569 num_reladdr
+= dst
.reladdr
!= NULL
|| dst
.reladdr2
;
570 num_reladdr
+= dst1
.reladdr
!= NULL
|| dst1
.reladdr2
;
571 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
572 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
573 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
574 num_reladdr
+= src3
.reladdr
!= NULL
|| src3
.reladdr2
!= NULL
;
576 reladdr_to_temp(ir
, &src3
, &num_reladdr
);
577 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
578 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
579 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
581 if (dst
.reladdr
|| dst
.reladdr2
) {
583 emit_arl(ir
, address_reg
, *dst
.reladdr
);
585 emit_arl(ir
, address_reg2
, *dst
.reladdr2
);
589 emit_arl(ir
, address_reg
, *dst1
.reladdr
);
592 assert(num_reladdr
== 0);
603 /* default to float, for paths where this is not initialized
604 * (since 0==UINT which is likely wrong):
606 inst
->tex_type
= GLSL_TYPE_FLOAT
;
608 inst
->function
= NULL
;
610 /* Update indirect addressing status used by TGSI */
611 if (dst
.reladdr
|| dst
.reladdr2
) {
613 case PROGRAM_STATE_VAR
:
614 case PROGRAM_CONSTANT
:
615 case PROGRAM_UNIFORM
:
616 this->indirect_addr_consts
= true;
618 case PROGRAM_IMMEDIATE
:
619 assert(!"immediates should not have indirect addressing");
626 for (i
= 0; i
< 4; i
++) {
627 if(inst
->src
[i
].reladdr
) {
628 switch(inst
->src
[i
].file
) {
629 case PROGRAM_STATE_VAR
:
630 case PROGRAM_CONSTANT
:
631 case PROGRAM_UNIFORM
:
632 this->indirect_addr_consts
= true;
634 case PROGRAM_IMMEDIATE
:
635 assert(!"immediates should not have indirect addressing");
644 this->instructions
.push_tail(inst
);
647 * This section contains the double processing.
648 * GLSL just represents doubles as single channel values,
649 * however most HW and TGSI represent doubles as pairs of register channels.
651 * so we have to fixup destination writemask/index and src swizzle/indexes.
652 * dest writemasks need to translate from single channel write mask
653 * to a dual-channel writemask, but also need to modify the index,
654 * if we are touching the Z,W fields in the pre-translated writemask.
656 * src channels have similiar index modifications along with swizzle
657 * changes to we pick the XY, ZW pairs from the correct index.
659 * GLSL [0].x -> TGSI [0].xy
660 * GLSL [0].y -> TGSI [0].zw
661 * GLSL [0].z -> TGSI [1].xy
662 * GLSL [0].w -> TGSI [1].zw
664 if (inst
->dst
[0].type
== GLSL_TYPE_DOUBLE
|| inst
->dst
[1].type
== GLSL_TYPE_DOUBLE
||
665 inst
->src
[0].type
== GLSL_TYPE_DOUBLE
) {
666 glsl_to_tgsi_instruction
*dinst
= NULL
;
667 int initial_src_swz
[4], initial_src_idx
[4];
668 int initial_dst_idx
[2], initial_dst_writemask
[2];
669 /* select the writemask for dst0 or dst1 */
670 unsigned writemask
= inst
->dst
[0].file
== PROGRAM_UNDEFINED
? inst
->dst
[1].writemask
: inst
->dst
[0].writemask
;
672 /* copy out the writemask, index and swizzles for all src/dsts. */
673 for (j
= 0; j
< 2; j
++) {
674 initial_dst_writemask
[j
] = inst
->dst
[j
].writemask
;
675 initial_dst_idx
[j
] = inst
->dst
[j
].index
;
678 for (j
= 0; j
< 4; j
++) {
679 initial_src_swz
[j
] = inst
->src
[j
].swizzle
;
680 initial_src_idx
[j
] = inst
->src
[j
].index
;
684 * scan all the components in the dst writemask
685 * generate an instruction for each of them if required.
689 int i
= u_bit_scan(&writemask
);
691 /* first time use previous instruction */
695 /* create a new instructions for subsequent attempts */
696 dinst
= new(mem_ctx
) glsl_to_tgsi_instruction();
700 this->instructions
.push_tail(dinst
);
703 /* modify the destination if we are splitting */
704 for (j
= 0; j
< 2; j
++) {
705 if (dinst
->dst
[j
].type
== GLSL_TYPE_DOUBLE
) {
706 dinst
->dst
[j
].writemask
= (i
& 1) ? WRITEMASK_ZW
: WRITEMASK_XY
;
707 dinst
->dst
[j
].index
= initial_dst_idx
[j
];
709 dinst
->dst
[j
].index
++;
711 /* if we aren't writing to a double, just get the bit of the initial writemask
713 dinst
->dst
[j
].writemask
= initial_dst_writemask
[j
] & (1 << i
);
717 /* modify the src registers */
718 for (j
= 0; j
< 4; j
++) {
719 int swz
= GET_SWZ(initial_src_swz
[j
], i
);
721 if (dinst
->src
[j
].type
== GLSL_TYPE_DOUBLE
) {
722 dinst
->src
[j
].index
= initial_src_idx
[j
];
724 dinst
->src
[j
].double_reg2
= true;
725 dinst
->src
[j
].index
++;
729 dinst
->src
[j
].swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
731 dinst
->src
[j
].swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_X
, SWIZZLE_Y
);
734 /* some opcodes are special case in what they use as sources
735 - F2D is a float src0, DLDEXP is integer src1 */
736 if (op
== TGSI_OPCODE_F2D
||
737 op
== TGSI_OPCODE_DLDEXP
||
738 (op
== TGSI_OPCODE_UCMP
&& dinst
->dst
[0].type
== GLSL_TYPE_DOUBLE
)) {
739 dinst
->src
[j
].swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
751 glsl_to_tgsi_instruction
*
752 glsl_to_tgsi_visitor::emit_asm(ir_instruction
*ir
, unsigned op
,
754 st_src_reg src0
, st_src_reg src1
,
755 st_src_reg src2
, st_src_reg src3
)
757 return emit_asm(ir
, op
, dst
, undef_dst
, src0
, src1
, src2
, src3
);
761 * Determines whether to use an integer, unsigned integer, or float opcode
762 * based on the operands and input opcode, then emits the result.
765 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
767 st_src_reg src0
, st_src_reg src1
)
769 int type
= GLSL_TYPE_FLOAT
;
771 if (op
== TGSI_OPCODE_MOV
)
774 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
775 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
776 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
777 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
779 if (src0
.type
== GLSL_TYPE_DOUBLE
|| src1
.type
== GLSL_TYPE_DOUBLE
)
780 type
= GLSL_TYPE_DOUBLE
;
781 else if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
782 type
= GLSL_TYPE_FLOAT
;
783 else if (native_integers
)
784 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
786 #define case5(c, f, i, u, d) \
787 case TGSI_OPCODE_##c: \
788 if (type == GLSL_TYPE_DOUBLE) \
789 op = TGSI_OPCODE_##d; \
790 else if (type == GLSL_TYPE_INT) \
791 op = TGSI_OPCODE_##i; \
792 else if (type == GLSL_TYPE_UINT) \
793 op = TGSI_OPCODE_##u; \
795 op = TGSI_OPCODE_##f; \
798 #define case4(c, f, i, u) \
799 case TGSI_OPCODE_##c: \
800 if (type == GLSL_TYPE_INT) \
801 op = TGSI_OPCODE_##i; \
802 else if (type == GLSL_TYPE_UINT) \
803 op = TGSI_OPCODE_##u; \
805 op = TGSI_OPCODE_##f; \
808 #define case3(f, i, u) case4(f, f, i, u)
809 #define case4d(f, i, u, d) case5(f, f, i, u, d)
810 #define case3fid(f, i, d) case5(f, f, i, i, d)
811 #define case2fi(f, i) case4(f, f, i, i)
812 #define case2iu(i, u) case4(i, LAST, i, u)
814 #define casecomp(c, f, i, u, d) \
815 case TGSI_OPCODE_##c: \
816 if (type == GLSL_TYPE_DOUBLE) \
817 op = TGSI_OPCODE_##d; \
818 else if (type == GLSL_TYPE_INT || type == GLSL_TYPE_SUBROUTINE) \
819 op = TGSI_OPCODE_##i; \
820 else if (type == GLSL_TYPE_UINT) \
821 op = TGSI_OPCODE_##u; \
822 else if (native_integers) \
823 op = TGSI_OPCODE_##f; \
825 op = TGSI_OPCODE_##c; \
829 case3fid(ADD
, UADD
, DADD
);
830 case3fid(MUL
, UMUL
, DMUL
);
831 case3fid(MAD
, UMAD
, DMAD
);
832 case3fid(FMA
, UMAD
, DFMA
);
833 case3(DIV
, IDIV
, UDIV
);
834 case4d(MAX
, IMAX
, UMAX
, DMAX
);
835 case4d(MIN
, IMIN
, UMIN
, DMIN
);
838 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
, DSEQ
);
839 casecomp(SNE
, FSNE
, USNE
, USNE
, DSNE
);
840 casecomp(SGE
, FSGE
, ISGE
, USGE
, DSGE
);
841 casecomp(SLT
, FSLT
, ISLT
, USLT
, DSLT
);
845 case3fid(SSG
, ISSG
, DSSG
);
846 case3fid(ABS
, IABS
, DABS
);
850 case2iu(IMUL_HI
, UMUL_HI
);
852 case3fid(SQRT
, SQRT
, DSQRT
);
854 case3fid(RCP
, RCP
, DRCP
);
855 case3fid(RSQ
, RSQ
, DRSQ
);
857 case3fid(FRC
, FRC
, DFRAC
);
858 case3fid(TRUNC
, TRUNC
, DTRUNC
);
859 case3fid(CEIL
, CEIL
, DCEIL
);
860 case3fid(FLR
, FLR
, DFLR
);
861 case3fid(ROUND
, ROUND
, DROUND
);
866 assert(op
!= TGSI_OPCODE_LAST
);
870 glsl_to_tgsi_instruction
*
871 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
872 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
875 static const unsigned dot_opcodes
[] = {
876 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
879 return emit_asm(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
883 * Emits TGSI scalar opcodes to produce unique answers across channels.
885 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
886 * channel determines the result across all channels. So to do a vec4
887 * of this operation, we want to emit a scalar per source channel used
888 * to produce dest channels.
891 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
893 st_src_reg orig_src0
, st_src_reg orig_src1
)
896 int done_mask
= ~dst
.writemask
;
898 /* TGSI RCP is a scalar operation splatting results to all channels,
899 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
902 for (i
= 0; i
< 4; i
++) {
903 GLuint this_mask
= (1 << i
);
904 st_src_reg src0
= orig_src0
;
905 st_src_reg src1
= orig_src1
;
907 if (done_mask
& this_mask
)
910 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
911 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
912 for (j
= i
+ 1; j
< 4; j
++) {
913 /* If there is another enabled component in the destination that is
914 * derived from the same inputs, generate its value on this pass as
917 if (!(done_mask
& (1 << j
)) &&
918 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
919 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
920 this_mask
|= (1 << j
);
923 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
924 src0_swiz
, src0_swiz
);
925 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
926 src1_swiz
, src1_swiz
);
928 dst
.writemask
= this_mask
;
929 emit_asm(ir
, op
, dst
, src0
, src1
);
930 done_mask
|= this_mask
;
935 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
936 st_dst_reg dst
, st_src_reg src0
)
938 st_src_reg undef
= undef_src
;
940 undef
.swizzle
= SWIZZLE_XXXX
;
942 emit_scalar(ir
, op
, dst
, src0
, undef
);
946 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
947 st_dst_reg dst
, st_src_reg src0
)
949 int op
= TGSI_OPCODE_ARL
;
951 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
952 op
= TGSI_OPCODE_UARL
;
954 assert(dst
.file
== PROGRAM_ADDRESS
);
955 if (dst
.index
>= this->num_address_regs
)
956 this->num_address_regs
= dst
.index
+ 1;
958 emit_asm(NULL
, op
, dst
, src0
);
962 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
963 gl_constant_value values
[8], int size
, int datatype
,
966 if (file
== PROGRAM_CONSTANT
) {
967 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
968 size
, datatype
, swizzle_out
);
971 assert(file
== PROGRAM_IMMEDIATE
);
974 immediate_storage
*entry
;
975 int size32
= size
* (datatype
== GL_DOUBLE
? 2 : 1);
978 /* Search immediate storage to see if we already have an identical
979 * immediate that we can use instead of adding a duplicate entry.
981 foreach_in_list(immediate_storage
, entry
, &this->immediates
) {
982 immediate_storage
*tmp
= entry
;
984 for (i
= 0; i
* 4 < size32
; i
++) {
985 int slot_size
= MIN2(size32
- (i
* 4), 4);
986 if (tmp
->type
!= datatype
|| tmp
->size32
!= slot_size
)
988 if (memcmp(tmp
->values
, &values
[i
* 4],
989 slot_size
* sizeof(gl_constant_value
)))
992 /* Everything matches, keep going until the full size is matched */
993 tmp
= (immediate_storage
*)tmp
->next
;
996 /* The full value matched */
1003 for (i
= 0; i
* 4 < size32
; i
++) {
1004 int slot_size
= MIN2(size32
- (i
* 4), 4);
1005 /* Add this immediate to the list. */
1006 entry
= new(mem_ctx
) immediate_storage(&values
[i
* 4], slot_size
, datatype
);
1007 this->immediates
.push_tail(entry
);
1008 this->num_immediates
++;
1014 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
1016 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
1017 union gl_constant_value uval
;
1020 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
1026 glsl_to_tgsi_visitor::st_src_reg_for_double(double val
)
1028 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_DOUBLE
);
1029 union gl_constant_value uval
[2];
1031 uval
[0].u
= *(uint32_t *)&val
;
1032 uval
[1].u
= *(((uint32_t *)&val
) + 1);
1033 src
.index
= add_constant(src
.file
, uval
, 1, GL_DOUBLE
, &src
.swizzle
);
1039 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
1041 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
1042 union gl_constant_value uval
;
1044 assert(native_integers
);
1047 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
1053 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
1055 if (native_integers
)
1056 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
1057 st_src_reg_for_int(val
);
1059 return st_src_reg_for_float(val
);
1063 type_size(const struct glsl_type
*type
)
1068 switch (type
->base_type
) {
1069 case GLSL_TYPE_UINT
:
1071 case GLSL_TYPE_FLOAT
:
1072 case GLSL_TYPE_BOOL
:
1073 if (type
->is_matrix()) {
1074 return type
->matrix_columns
;
1076 /* Regardless of size of vector, it gets a vec4. This is bad
1077 * packing for things like floats, but otherwise arrays become a
1078 * mess. Hopefully a later pass over the code can pack scalars
1079 * down if appropriate.
1084 case GLSL_TYPE_DOUBLE
:
1085 if (type
->is_matrix()) {
1086 if (type
->vector_elements
<= 2)
1087 return type
->matrix_columns
;
1089 return type
->matrix_columns
* 2;
1091 /* For doubles if we have a double or dvec2 they fit in one
1092 * vec4, else they need 2 vec4s.
1094 if (type
->vector_elements
<= 2)
1100 case GLSL_TYPE_ARRAY
:
1101 assert(type
->length
> 0);
1102 return type_size(type
->fields
.array
) * type
->length
;
1103 case GLSL_TYPE_STRUCT
:
1105 for (i
= 0; i
< type
->length
; i
++) {
1106 size
+= type_size(type
->fields
.structure
[i
].type
);
1109 case GLSL_TYPE_SAMPLER
:
1110 case GLSL_TYPE_IMAGE
:
1111 case GLSL_TYPE_SUBROUTINE
:
1112 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1116 case GLSL_TYPE_ATOMIC_UINT
:
1117 case GLSL_TYPE_INTERFACE
:
1118 case GLSL_TYPE_VOID
:
1119 case GLSL_TYPE_ERROR
:
1120 assert(!"Invalid type in type_size");
1128 * If the given GLSL type is an array or matrix or a structure containing
1129 * an array/matrix member, return true. Else return false.
1131 * This is used to determine which kind of temp storage (PROGRAM_TEMPORARY
1132 * or PROGRAM_ARRAY) should be used for variables of this type. Anytime
1133 * we have an array that might be indexed with a variable, we need to use
1134 * the later storage type.
1137 type_has_array_or_matrix(const glsl_type
*type
)
1139 if (type
->is_array() || type
->is_matrix())
1142 if (type
->is_record()) {
1143 for (unsigned i
= 0; i
< type
->length
; i
++) {
1144 if (type_has_array_or_matrix(type
->fields
.structure
[i
].type
)) {
1155 * In the initial pass of codegen, we assign temporary numbers to
1156 * intermediate results. (not SSA -- variable assignments will reuse
1160 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1164 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1168 if (!options
->EmitNoIndirectTemp
&& type_has_array_or_matrix(type
)) {
1169 if (next_array
>= max_num_arrays
) {
1170 max_num_arrays
+= 32;
1171 array_sizes
= (unsigned*)
1172 realloc(array_sizes
, sizeof(array_sizes
[0]) * max_num_arrays
);
1175 src
.file
= PROGRAM_ARRAY
;
1176 src
.index
= next_array
<< 16 | 0x8000;
1177 array_sizes
[next_array
] = type_size(type
);
1181 src
.file
= PROGRAM_TEMPORARY
;
1182 src
.index
= next_temp
;
1183 next_temp
+= type_size(type
);
1186 if (type
->is_array() || type
->is_record()) {
1187 src
.swizzle
= SWIZZLE_NOOP
;
1189 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1196 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1199 foreach_in_list(variable_storage
, entry
, &this->variables
) {
1200 if (entry
->var
== var
)
1208 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1210 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1211 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1213 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1214 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1217 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1219 const ir_state_slot
*const slots
= ir
->get_state_slots();
1220 assert(slots
!= NULL
);
1222 /* Check if this statevar's setup in the STATE file exactly
1223 * matches how we'll want to reference it as a
1224 * struct/array/whatever. If not, then we need to move it into
1225 * temporary storage and hope that it'll get copy-propagated
1228 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
1229 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1234 variable_storage
*storage
;
1236 if (i
== ir
->get_num_state_slots()) {
1237 /* We'll set the index later. */
1238 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1239 this->variables
.push_tail(storage
);
1243 /* The variable_storage constructor allocates slots based on the size
1244 * of the type. However, this had better match the number of state
1245 * elements that we're going to copy into the new temporary.
1247 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
1249 dst
= st_dst_reg(get_temp(ir
->type
));
1251 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1253 this->variables
.push_tail(storage
);
1257 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
1258 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1259 (gl_state_index
*)slots
[i
].tokens
);
1261 if (storage
->file
== PROGRAM_STATE_VAR
) {
1262 if (storage
->index
== -1) {
1263 storage
->index
= index
;
1265 assert(index
== storage
->index
+ (int)i
);
1268 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1269 * the data being moved since MOV does not care about the type of
1270 * data it is moving, and we don't want to declare registers with
1271 * array or struct types.
1273 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1274 src
.swizzle
= slots
[i
].swizzle
;
1275 emit_asm(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1276 /* even a float takes up a whole vec4 reg in a struct/array. */
1281 if (storage
->file
== PROGRAM_TEMPORARY
&&
1282 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
1283 fail_link(this->shader_program
,
1284 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1285 ir
->name
, dst
.index
- storage
->index
,
1286 type_size(ir
->type
));
1292 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1294 emit_asm(NULL
, TGSI_OPCODE_BGNLOOP
);
1296 visit_exec_list(&ir
->body_instructions
, this);
1298 emit_asm(NULL
, TGSI_OPCODE_ENDLOOP
);
1302 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1305 case ir_loop_jump::jump_break
:
1306 emit_asm(NULL
, TGSI_OPCODE_BRK
);
1308 case ir_loop_jump::jump_continue
:
1309 emit_asm(NULL
, TGSI_OPCODE_CONT
);
1316 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1323 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1325 /* Ignore function bodies other than main() -- we shouldn't see calls to
1326 * them since they should all be inlined before we get to glsl_to_tgsi.
1328 if (strcmp(ir
->name
, "main") == 0) {
1329 const ir_function_signature
*sig
;
1332 sig
= ir
->matching_signature(NULL
, &empty
, false);
1336 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
1343 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1345 int nonmul_operand
= 1 - mul_operand
;
1347 st_dst_reg result_dst
;
1349 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1350 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1353 expr
->operands
[0]->accept(this);
1355 expr
->operands
[1]->accept(this);
1357 ir
->operands
[nonmul_operand
]->accept(this);
1360 this->result
= get_temp(ir
->type
);
1361 result_dst
= st_dst_reg(this->result
);
1362 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1363 emit_asm(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1369 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1371 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1372 * implemented using multiplication, and logical-or is implemented using
1373 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1374 * As result, the logical expression (a & !b) can be rewritten as:
1378 * - (a * 1) - (a * b)
1382 * This final expression can be implemented as a single MAD(a, -b, a)
1386 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1388 const int other_operand
= 1 - try_operand
;
1391 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1392 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1395 ir
->operands
[other_operand
]->accept(this);
1397 expr
->operands
[0]->accept(this);
1400 b
.negate
= ~b
.negate
;
1402 this->result
= get_temp(ir
->type
);
1403 emit_asm(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1409 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1410 st_src_reg
*reg
, int *num_reladdr
)
1412 if (!reg
->reladdr
&& !reg
->reladdr2
)
1415 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1416 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1418 if (*num_reladdr
!= 1) {
1419 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1421 emit_asm(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1429 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1431 unsigned int operand
;
1432 st_src_reg op
[ARRAY_SIZE(ir
->operands
)];
1433 st_src_reg result_src
;
1434 st_dst_reg result_dst
;
1436 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1438 if (ir
->operation
== ir_binop_add
) {
1439 if (try_emit_mad(ir
, 1))
1441 if (try_emit_mad(ir
, 0))
1445 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1447 if (!native_integers
&& ir
->operation
== ir_binop_logic_and
) {
1448 if (try_emit_mad_for_and_not(ir
, 1))
1450 if (try_emit_mad_for_and_not(ir
, 0))
1454 if (ir
->operation
== ir_quadop_vector
)
1455 assert(!"ir_quadop_vector should have been lowered");
1457 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1458 this->result
.file
= PROGRAM_UNDEFINED
;
1459 ir
->operands
[operand
]->accept(this);
1460 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1461 printf("Failed to get tree for expression operand:\n");
1462 ir
->operands
[operand
]->print();
1466 op
[operand
] = this->result
;
1468 /* Matrix expression operands should have been broken down to vector
1469 * operations already.
1471 assert(!ir
->operands
[operand
]->type
->is_matrix());
1474 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1475 if (ir
->operands
[1]) {
1476 vector_elements
= MAX2(vector_elements
,
1477 ir
->operands
[1]->type
->vector_elements
);
1480 this->result
.file
= PROGRAM_UNDEFINED
;
1482 /* Storage for our result. Ideally for an assignment we'd be using
1483 * the actual storage for the result here, instead.
1485 result_src
= get_temp(ir
->type
);
1486 /* convenience for the emit functions below. */
1487 result_dst
= st_dst_reg(result_src
);
1488 /* Limit writes to the channels that will be used by result_src later.
1489 * This does limit this temp's use as a temporary for multi-instruction
1492 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1494 switch (ir
->operation
) {
1495 case ir_unop_logic_not
:
1496 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1497 emit_asm(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1499 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1500 * older GPUs implement SEQ using multiple instructions (i915 uses two
1501 * SGE instructions and a MUL instruction). Since our logic values are
1502 * 0.0 and 1.0, 1-x also implements !x.
1504 op
[0].negate
= ~op
[0].negate
;
1505 emit_asm(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1509 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1510 emit_asm(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1511 else if (result_dst
.type
== GLSL_TYPE_DOUBLE
)
1512 emit_asm(ir
, TGSI_OPCODE_DNEG
, result_dst
, op
[0]);
1514 op
[0].negate
= ~op
[0].negate
;
1518 case ir_unop_subroutine_to_int
:
1519 emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, op
[0]);
1522 emit_asm(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1525 emit_asm(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1528 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1532 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1536 assert(!"not reached: should be handled by ir_explog_to_explog2");
1539 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1542 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1545 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1547 case ir_unop_saturate
: {
1548 glsl_to_tgsi_instruction
*inst
;
1549 inst
= emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, op
[0]);
1550 inst
->saturate
= true;
1555 case ir_unop_dFdx_coarse
:
1556 emit_asm(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1558 case ir_unop_dFdx_fine
:
1559 emit_asm(ir
, TGSI_OPCODE_DDX_FINE
, result_dst
, op
[0]);
1562 case ir_unop_dFdy_coarse
:
1563 case ir_unop_dFdy_fine
:
1565 /* The X component contains 1 or -1 depending on whether the framebuffer
1566 * is a FBO or the window system buffer, respectively.
1567 * It is then multiplied with the source operand of DDY.
1569 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1570 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1572 unsigned transform_y_index
=
1573 _mesa_add_state_reference(this->prog
->Parameters
,
1576 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1578 glsl_type::vec4_type
);
1579 transform_y
.swizzle
= SWIZZLE_XXXX
;
1581 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1583 emit_asm(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1584 emit_asm(ir
, ir
->operation
== ir_unop_dFdy_fine
?
1585 TGSI_OPCODE_DDY_FINE
: TGSI_OPCODE_DDY
, result_dst
, temp
);
1589 case ir_unop_frexp_sig
:
1590 emit_asm(ir
, TGSI_OPCODE_DFRACEXP
, result_dst
, undef_dst
, op
[0]);
1593 case ir_unop_frexp_exp
:
1594 emit_asm(ir
, TGSI_OPCODE_DFRACEXP
, undef_dst
, result_dst
, op
[0]);
1597 case ir_unop_noise
: {
1598 /* At some point, a motivated person could add a better
1599 * implementation of noise. Currently not even the nvidia
1600 * binary drivers do anything more than this. In any case, the
1601 * place to do this is in the GL state tracker, not the poor
1604 emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1609 emit_asm(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1612 emit_asm(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1616 emit_asm(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1619 if (result_dst
.type
== GLSL_TYPE_FLOAT
|| result_dst
.type
== GLSL_TYPE_DOUBLE
)
1620 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1622 emit_asm(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1625 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1626 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1628 emit_asm(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1632 emit_asm(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1634 case ir_binop_greater
:
1635 emit_asm(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1637 case ir_binop_lequal
:
1638 emit_asm(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1640 case ir_binop_gequal
:
1641 emit_asm(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1643 case ir_binop_equal
:
1644 emit_asm(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1646 case ir_binop_nequal
:
1647 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1649 case ir_binop_all_equal
:
1650 /* "==" operator producing a scalar boolean. */
1651 if (ir
->operands
[0]->type
->is_vector() ||
1652 ir
->operands
[1]->type
->is_vector()) {
1653 st_src_reg temp
= get_temp(native_integers
?
1654 glsl_type::uvec4_type
:
1655 glsl_type::vec4_type
);
1657 if (native_integers
) {
1658 st_dst_reg temp_dst
= st_dst_reg(temp
);
1659 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1661 emit_asm(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1663 /* Emit 1-3 AND operations to combine the SEQ results. */
1664 switch (ir
->operands
[0]->type
->vector_elements
) {
1668 temp_dst
.writemask
= WRITEMASK_Y
;
1669 temp1
.swizzle
= SWIZZLE_YYYY
;
1670 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1671 emit_asm(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1674 temp_dst
.writemask
= WRITEMASK_X
;
1675 temp1
.swizzle
= SWIZZLE_XXXX
;
1676 temp2
.swizzle
= SWIZZLE_YYYY
;
1677 emit_asm(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1678 temp_dst
.writemask
= WRITEMASK_Y
;
1679 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1680 temp2
.swizzle
= SWIZZLE_WWWW
;
1681 emit_asm(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1684 temp1
.swizzle
= SWIZZLE_XXXX
;
1685 temp2
.swizzle
= SWIZZLE_YYYY
;
1686 emit_asm(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1688 emit_asm(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1690 /* After the dot-product, the value will be an integer on the
1691 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1693 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1695 /* Negating the result of the dot-product gives values on the range
1696 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1697 * This is achieved using SGE.
1699 st_src_reg sge_src
= result_src
;
1700 sge_src
.negate
= ~sge_src
.negate
;
1701 emit_asm(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1704 emit_asm(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1707 case ir_binop_any_nequal
:
1708 /* "!=" operator producing a scalar boolean. */
1709 if (ir
->operands
[0]->type
->is_vector() ||
1710 ir
->operands
[1]->type
->is_vector()) {
1711 st_src_reg temp
= get_temp(native_integers
?
1712 glsl_type::uvec4_type
:
1713 glsl_type::vec4_type
);
1714 emit_asm(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1716 if (native_integers
) {
1717 st_dst_reg temp_dst
= st_dst_reg(temp
);
1718 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1720 /* Emit 1-3 OR operations to combine the SNE results. */
1721 switch (ir
->operands
[0]->type
->vector_elements
) {
1725 temp_dst
.writemask
= WRITEMASK_Y
;
1726 temp1
.swizzle
= SWIZZLE_YYYY
;
1727 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1728 emit_asm(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1731 temp_dst
.writemask
= WRITEMASK_X
;
1732 temp1
.swizzle
= SWIZZLE_XXXX
;
1733 temp2
.swizzle
= SWIZZLE_YYYY
;
1734 emit_asm(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1735 temp_dst
.writemask
= WRITEMASK_Y
;
1736 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1737 temp2
.swizzle
= SWIZZLE_WWWW
;
1738 emit_asm(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1741 temp1
.swizzle
= SWIZZLE_XXXX
;
1742 temp2
.swizzle
= SWIZZLE_YYYY
;
1743 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1745 /* After the dot-product, the value will be an integer on the
1746 * range [0,4]. Zero stays zero, and positive values become 1.0.
1748 glsl_to_tgsi_instruction
*const dp
=
1749 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1750 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1751 /* The clamping to [0,1] can be done for free in the fragment
1752 * shader with a saturate.
1754 dp
->saturate
= true;
1756 /* Negating the result of the dot-product gives values on the range
1757 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1758 * achieved using SLT.
1760 st_src_reg slt_src
= result_src
;
1761 slt_src
.negate
= ~slt_src
.negate
;
1762 emit_asm(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1766 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1771 assert(ir
->operands
[0]->type
->is_vector());
1773 if (native_integers
) {
1774 int dst_swizzle
= 0, op0_swizzle
, i
;
1775 st_src_reg accum
= op
[0];
1777 op0_swizzle
= op
[0].swizzle
;
1778 accum
.swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 0),
1779 GET_SWZ(op0_swizzle
, 0),
1780 GET_SWZ(op0_swizzle
, 0),
1781 GET_SWZ(op0_swizzle
, 0));
1782 for (i
= 0; i
< 4; i
++) {
1783 if (result_dst
.writemask
& (1 << i
)) {
1784 dst_swizzle
= MAKE_SWIZZLE4(i
, i
, i
, i
);
1789 assert(ir
->operands
[0]->type
->is_boolean());
1791 /* OR all the components together, since they should be either 0 or ~0
1793 switch (ir
->operands
[0]->type
->vector_elements
) {
1795 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 3),
1796 GET_SWZ(op0_swizzle
, 3),
1797 GET_SWZ(op0_swizzle
, 3),
1798 GET_SWZ(op0_swizzle
, 3));
1799 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1800 accum
= st_src_reg(result_dst
);
1801 accum
.swizzle
= dst_swizzle
;
1804 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 2),
1805 GET_SWZ(op0_swizzle
, 2),
1806 GET_SWZ(op0_swizzle
, 2),
1807 GET_SWZ(op0_swizzle
, 2));
1808 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1809 accum
= st_src_reg(result_dst
);
1810 accum
.swizzle
= dst_swizzle
;
1813 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 1),
1814 GET_SWZ(op0_swizzle
, 1),
1815 GET_SWZ(op0_swizzle
, 1),
1816 GET_SWZ(op0_swizzle
, 1));
1817 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1820 assert(!"Unexpected vector size");
1824 /* After the dot-product, the value will be an integer on the
1825 * range [0,4]. Zero stays zero, and positive values become 1.0.
1827 glsl_to_tgsi_instruction
*const dp
=
1828 emit_dp(ir
, result_dst
, op
[0], op
[0],
1829 ir
->operands
[0]->type
->vector_elements
);
1830 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1831 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1832 /* The clamping to [0,1] can be done for free in the fragment
1833 * shader with a saturate.
1835 dp
->saturate
= true;
1836 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1837 /* Negating the result of the dot-product gives values on the range
1838 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1839 * is achieved using SLT.
1841 st_src_reg slt_src
= result_src
;
1842 slt_src
.negate
= ~slt_src
.negate
;
1843 emit_asm(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1846 /* Use SNE 0 if integers are being used as boolean values. */
1847 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1853 case ir_binop_logic_xor
:
1854 if (native_integers
)
1855 emit_asm(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1857 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1860 case ir_binop_logic_or
: {
1861 if (native_integers
) {
1862 /* If integers are used as booleans, we can use an actual "or"
1865 assert(native_integers
);
1866 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1868 /* After the addition, the value will be an integer on the
1869 * range [0,2]. Zero stays zero, and positive values become 1.0.
1871 glsl_to_tgsi_instruction
*add
=
1872 emit_asm(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1873 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1874 /* The clamping to [0,1] can be done for free in the fragment
1875 * shader with a saturate if floats are being used as boolean values.
1877 add
->saturate
= true;
1879 /* Negating the result of the addition gives values on the range
1880 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1881 * is achieved using SLT.
1883 st_src_reg slt_src
= result_src
;
1884 slt_src
.negate
= ~slt_src
.negate
;
1885 emit_asm(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1891 case ir_binop_logic_and
:
1892 /* If native integers are disabled, the bool args are stored as float 0.0
1893 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1894 * actual AND opcode.
1896 if (native_integers
)
1897 emit_asm(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1899 emit_asm(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1903 assert(ir
->operands
[0]->type
->is_vector());
1904 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1905 emit_dp(ir
, result_dst
, op
[0], op
[1],
1906 ir
->operands
[0]->type
->vector_elements
);
1911 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1913 /* sqrt(x) = x * rsq(x). */
1914 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1915 emit_asm(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1916 /* For incoming channels <= 0, set the result to 0. */
1917 op
[0].negate
= ~op
[0].negate
;
1918 emit_asm(ir
, TGSI_OPCODE_CMP
, result_dst
,
1919 op
[0], result_src
, st_src_reg_for_float(0.0));
1923 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1926 if (native_integers
) {
1927 emit_asm(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1930 /* fallthrough to next case otherwise */
1932 if (native_integers
) {
1933 emit_asm(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1936 /* fallthrough to next case otherwise */
1939 /* Converting between signed and unsigned integers is a no-op. */
1943 if (native_integers
) {
1944 /* Booleans are stored as integers using ~0 for true and 0 for false.
1945 * GLSL requires that int(bool) return 1 for true and 0 for false.
1946 * This conversion is done with AND, but it could be done with NEG.
1948 emit_asm(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1950 /* Booleans and integers are both stored as floats when native
1951 * integers are disabled.
1957 if (native_integers
)
1958 emit_asm(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1960 emit_asm(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1963 if (native_integers
)
1964 emit_asm(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1966 emit_asm(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1968 case ir_unop_bitcast_f2i
:
1970 result_src
.type
= GLSL_TYPE_INT
;
1972 case ir_unop_bitcast_f2u
:
1974 result_src
.type
= GLSL_TYPE_UINT
;
1976 case ir_unop_bitcast_i2f
:
1977 case ir_unop_bitcast_u2f
:
1979 result_src
.type
= GLSL_TYPE_FLOAT
;
1982 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1985 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_double(0.0));
1988 if (native_integers
)
1989 emit_asm(ir
, TGSI_OPCODE_USNE
, result_dst
, op
[0], st_src_reg_for_int(0));
1991 emit_asm(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1994 emit_asm(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1997 emit_asm(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
2000 emit_asm(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
2002 case ir_unop_round_even
:
2003 emit_asm(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
2006 emit_asm(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
2010 emit_asm(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
2013 emit_asm(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
2016 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
2019 case ir_unop_bit_not
:
2020 if (native_integers
) {
2021 emit_asm(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
2025 if (native_integers
) {
2026 emit_asm(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
2029 case ir_binop_lshift
:
2030 if (native_integers
) {
2031 emit_asm(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
2034 case ir_binop_rshift
:
2035 if (native_integers
) {
2036 emit_asm(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
2039 case ir_binop_bit_and
:
2040 if (native_integers
) {
2041 emit_asm(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
2044 case ir_binop_bit_xor
:
2045 if (native_integers
) {
2046 emit_asm(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
2049 case ir_binop_bit_or
:
2050 if (native_integers
) {
2051 emit_asm(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
2055 assert(!"GLSL 1.30 features unsupported");
2058 case ir_binop_ubo_load
: {
2059 ir_constant
*const_uniform_block
= ir
->operands
[0]->as_constant();
2060 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
2061 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
2062 unsigned const_block
= const_uniform_block
? const_uniform_block
->value
.u
[0] + 1 : 0;
2063 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
2066 cbuf
.type
= ir
->type
->base_type
;
2067 cbuf
.file
= PROGRAM_CONSTANT
;
2069 cbuf
.reladdr
= NULL
;
2072 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
2074 if (const_offset_ir
) {
2075 /* Constant index into constant buffer */
2076 cbuf
.reladdr
= NULL
;
2077 cbuf
.index
= const_offset
/ 16;
2080 /* Relative/variable index into constant buffer */
2081 emit_asm(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1],
2082 st_src_reg_for_int(4));
2083 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2084 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
2087 if (const_uniform_block
) {
2088 /* Constant constant buffer */
2089 cbuf
.reladdr2
= NULL
;
2090 cbuf
.index2D
= const_block
;
2091 cbuf
.has_index2
= true;
2094 /* Relative/variable constant buffer */
2095 cbuf
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2097 memcpy(cbuf
.reladdr2
, &op
[0], sizeof(st_src_reg
));
2098 cbuf
.has_index2
= true;
2101 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2102 if (cbuf
.type
== GLSL_TYPE_DOUBLE
)
2103 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 8,
2104 const_offset
% 16 / 8,
2105 const_offset
% 16 / 8,
2106 const_offset
% 16 / 8);
2108 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
2109 const_offset
% 16 / 4,
2110 const_offset
% 16 / 4,
2111 const_offset
% 16 / 4);
2113 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
2114 emit_asm(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
2116 emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
2121 /* note: we have to reorder the three args here */
2122 emit_asm(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
2125 if (this->ctx
->Const
.NativeIntegers
)
2126 emit_asm(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
2128 op
[0].negate
= ~op
[0].negate
;
2129 emit_asm(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
2132 case ir_triop_bitfield_extract
:
2133 emit_asm(ir
, TGSI_OPCODE_IBFE
, result_dst
, op
[0], op
[1], op
[2]);
2135 case ir_quadop_bitfield_insert
:
2136 emit_asm(ir
, TGSI_OPCODE_BFI
, result_dst
, op
[0], op
[1], op
[2], op
[3]);
2138 case ir_unop_bitfield_reverse
:
2139 emit_asm(ir
, TGSI_OPCODE_BREV
, result_dst
, op
[0]);
2141 case ir_unop_bit_count
:
2142 emit_asm(ir
, TGSI_OPCODE_POPC
, result_dst
, op
[0]);
2144 case ir_unop_find_msb
:
2145 emit_asm(ir
, TGSI_OPCODE_IMSB
, result_dst
, op
[0]);
2147 case ir_unop_find_lsb
:
2148 emit_asm(ir
, TGSI_OPCODE_LSB
, result_dst
, op
[0]);
2150 case ir_binop_imul_high
:
2151 emit_asm(ir
, TGSI_OPCODE_IMUL_HI
, result_dst
, op
[0], op
[1]);
2154 /* In theory, MAD is incorrect here. */
2156 emit_asm(ir
, TGSI_OPCODE_FMA
, result_dst
, op
[0], op
[1], op
[2]);
2158 emit_asm(ir
, TGSI_OPCODE_MAD
, result_dst
, op
[0], op
[1], op
[2]);
2160 case ir_unop_interpolate_at_centroid
:
2161 emit_asm(ir
, TGSI_OPCODE_INTERP_CENTROID
, result_dst
, op
[0]);
2163 case ir_binop_interpolate_at_offset
:
2164 emit_asm(ir
, TGSI_OPCODE_INTERP_OFFSET
, result_dst
, op
[0], op
[1]);
2166 case ir_binop_interpolate_at_sample
:
2167 emit_asm(ir
, TGSI_OPCODE_INTERP_SAMPLE
, result_dst
, op
[0], op
[1]);
2171 emit_asm(ir
, TGSI_OPCODE_D2F
, result_dst
, op
[0]);
2174 emit_asm(ir
, TGSI_OPCODE_F2D
, result_dst
, op
[0]);
2177 emit_asm(ir
, TGSI_OPCODE_D2I
, result_dst
, op
[0]);
2180 emit_asm(ir
, TGSI_OPCODE_I2D
, result_dst
, op
[0]);
2183 emit_asm(ir
, TGSI_OPCODE_D2U
, result_dst
, op
[0]);
2186 emit_asm(ir
, TGSI_OPCODE_U2D
, result_dst
, op
[0]);
2188 case ir_unop_unpack_double_2x32
:
2189 case ir_unop_pack_double_2x32
:
2190 emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, op
[0]);
2193 case ir_binop_ldexp
:
2194 if (ir
->operands
[0]->type
->base_type
== GLSL_TYPE_DOUBLE
) {
2195 emit_asm(ir
, TGSI_OPCODE_DLDEXP
, result_dst
, op
[0], op
[1]);
2197 assert(!"Invalid ldexp for non-double opcode in glsl_to_tgsi_visitor::visit()");
2201 case ir_unop_pack_snorm_2x16
:
2202 case ir_unop_pack_unorm_2x16
:
2203 case ir_unop_pack_half_2x16
:
2204 case ir_unop_pack_snorm_4x8
:
2205 case ir_unop_pack_unorm_4x8
:
2207 case ir_unop_unpack_snorm_2x16
:
2208 case ir_unop_unpack_unorm_2x16
:
2209 case ir_unop_unpack_half_2x16
:
2210 case ir_unop_unpack_half_2x16_split_x
:
2211 case ir_unop_unpack_half_2x16_split_y
:
2212 case ir_unop_unpack_snorm_4x8
:
2213 case ir_unop_unpack_unorm_4x8
:
2215 case ir_binop_pack_half_2x16_split
:
2218 case ir_quadop_vector
:
2219 case ir_binop_vector_extract
:
2220 case ir_triop_vector_insert
:
2221 case ir_binop_carry
:
2222 case ir_binop_borrow
:
2223 /* This operation is not supported, or should have already been handled.
2225 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2229 this->result
= result_src
;
2234 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2240 /* Note that this is only swizzles in expressions, not those on the left
2241 * hand side of an assignment, which do write masking. See ir_assignment
2245 ir
->val
->accept(this);
2247 assert(src
.file
!= PROGRAM_UNDEFINED
);
2248 assert(ir
->type
->vector_elements
> 0);
2250 for (i
= 0; i
< 4; i
++) {
2251 if (i
< ir
->type
->vector_elements
) {
2254 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2257 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2260 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2263 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2267 /* If the type is smaller than a vec4, replicate the last
2270 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2274 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2279 /* Test if the variable is an array. Note that geometry and
2280 * tessellation shader inputs are outputs are always arrays (except
2281 * for patch inputs), so only the array element type is considered.
2284 is_inout_array(unsigned stage
, ir_variable
*var
, bool *is_2d
)
2286 const glsl_type
*type
= var
->type
;
2288 if ((stage
== MESA_SHADER_VERTEX
&& var
->data
.mode
== ir_var_shader_in
) ||
2289 (stage
== MESA_SHADER_FRAGMENT
&& var
->data
.mode
== ir_var_shader_out
))
2294 if (((stage
== MESA_SHADER_GEOMETRY
&& var
->data
.mode
== ir_var_shader_in
) ||
2295 (stage
== MESA_SHADER_TESS_EVAL
&& var
->data
.mode
== ir_var_shader_in
) ||
2296 stage
== MESA_SHADER_TESS_CTRL
) &&
2298 if (!var
->type
->is_array())
2299 return false; /* a system value probably */
2301 type
= var
->type
->fields
.array
;
2305 return type
->is_array() || type
->is_matrix();
2309 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2311 variable_storage
*entry
= find_variable_storage(ir
->var
);
2312 ir_variable
*var
= ir
->var
;
2316 switch (var
->data
.mode
) {
2317 case ir_var_uniform
:
2318 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2319 var
->data
.location
);
2320 this->variables
.push_tail(entry
);
2322 case ir_var_shader_in
:
2323 /* The linker assigns locations for varyings and attributes,
2324 * including deprecated builtins (like gl_Color), user-assign
2325 * generic attributes (glBindVertexLocation), and
2326 * user-defined varyings.
2328 assert(var
->data
.location
!= -1);
2330 if (is_inout_array(shader
->Stage
, var
, &is_2d
)) {
2331 struct array_decl
*decl
= &input_arrays
[num_input_arrays
];
2333 decl
->mesa_index
= var
->data
.location
;
2334 decl
->array_id
= num_input_arrays
+ 1;
2336 decl
->array_size
= type_size(var
->type
->fields
.array
);
2338 decl
->array_size
= type_size(var
->type
);
2341 entry
= new(mem_ctx
) variable_storage(var
,
2347 entry
= new(mem_ctx
) variable_storage(var
,
2349 var
->data
.location
);
2351 this->variables
.push_tail(entry
);
2353 case ir_var_shader_out
:
2354 assert(var
->data
.location
!= -1);
2356 if (is_inout_array(shader
->Stage
, var
, &is_2d
)) {
2357 struct array_decl
*decl
= &output_arrays
[num_output_arrays
];
2359 decl
->mesa_index
= var
->data
.location
;
2360 decl
->array_id
= num_output_arrays
+ 1;
2362 decl
->array_size
= type_size(var
->type
->fields
.array
);
2364 decl
->array_size
= type_size(var
->type
);
2365 num_output_arrays
++;
2367 entry
= new(mem_ctx
) variable_storage(var
,
2373 entry
= new(mem_ctx
) variable_storage(var
,
2378 this->variables
.push_tail(entry
);
2380 case ir_var_system_value
:
2381 entry
= new(mem_ctx
) variable_storage(var
,
2382 PROGRAM_SYSTEM_VALUE
,
2383 var
->data
.location
);
2386 case ir_var_temporary
:
2387 st_src_reg src
= get_temp(var
->type
);
2389 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2390 this->variables
.push_tail(entry
);
2396 printf("Failed to make storage for %s\n", var
->name
);
2401 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2402 this->result
.array_id
= entry
->array_id
;
2403 if (!native_integers
)
2404 this->result
.type
= GLSL_TYPE_FLOAT
;
2408 shrink_array_declarations(struct array_decl
*arrays
, unsigned count
,
2409 GLbitfield64 usage_mask
,
2410 GLbitfield patch_usage_mask
)
2414 /* Fix array declarations by removing unused array elements at both ends
2415 * of the arrays. For example, mat4[3] where only mat[1] is used.
2417 for (i
= 0; i
< count
; i
++) {
2418 struct array_decl
*decl
= &arrays
[i
];
2420 /* Shrink the beginning. */
2421 for (j
= 0; j
< decl
->array_size
; j
++) {
2422 if (decl
->mesa_index
>= VARYING_SLOT_PATCH0
) {
2423 if (patch_usage_mask
&
2424 BITFIELD64_BIT(decl
->mesa_index
- VARYING_SLOT_PATCH0
+ j
))
2428 if (usage_mask
& BITFIELD64_BIT(decl
->mesa_index
+j
))
2437 /* Shrink the end. */
2438 for (j
= decl
->array_size
-1; j
>= 0; j
--) {
2439 if (decl
->mesa_index
>= VARYING_SLOT_PATCH0
) {
2440 if (patch_usage_mask
&
2441 BITFIELD64_BIT(decl
->mesa_index
- VARYING_SLOT_PATCH0
+ j
))
2445 if (usage_mask
& BITFIELD64_BIT(decl
->mesa_index
+j
))
2455 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2459 int element_size
= type_size(ir
->type
);
2462 index
= ir
->array_index
->constant_expression_value();
2464 ir
->array
->accept(this);
2467 if (ir
->array
->ir_type
!= ir_type_dereference_array
) {
2468 switch (this->prog
->Target
) {
2469 case GL_TESS_CONTROL_PROGRAM_NV
:
2470 is_2D
= (src
.file
== PROGRAM_INPUT
|| src
.file
== PROGRAM_OUTPUT
) &&
2471 !ir
->variable_referenced()->data
.patch
;
2473 case GL_TESS_EVALUATION_PROGRAM_NV
:
2474 is_2D
= src
.file
== PROGRAM_INPUT
&&
2475 !ir
->variable_referenced()->data
.patch
;
2477 case GL_GEOMETRY_PROGRAM_NV
:
2478 is_2D
= src
.file
== PROGRAM_INPUT
;
2488 src
.index2D
= index
->value
.i
[0];
2489 src
.has_index2
= true;
2491 src
.index
+= index
->value
.i
[0] * element_size
;
2493 /* Variable index array dereference. It eats the "vec4" of the
2494 * base of the array and an index that offsets the TGSI register
2497 ir
->array_index
->accept(this);
2499 st_src_reg index_reg
;
2501 if (element_size
== 1) {
2502 index_reg
= this->result
;
2504 index_reg
= get_temp(native_integers
?
2505 glsl_type::int_type
: glsl_type::float_type
);
2507 emit_asm(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2508 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2511 /* If there was already a relative address register involved, add the
2512 * new and the old together to get the new offset.
2514 if (!is_2D
&& src
.reladdr
!= NULL
) {
2515 st_src_reg accum_reg
= get_temp(native_integers
?
2516 glsl_type::int_type
: glsl_type::float_type
);
2518 emit_asm(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2519 index_reg
, *src
.reladdr
);
2521 index_reg
= accum_reg
;
2525 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2526 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2528 src
.has_index2
= true;
2530 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2531 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2535 /* If the type is smaller than a vec4, replicate the last channel out. */
2536 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2537 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2539 src
.swizzle
= SWIZZLE_NOOP
;
2541 /* Change the register type to the element type of the array. */
2542 src
.type
= ir
->type
->base_type
;
2548 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2551 const glsl_type
*struct_type
= ir
->record
->type
;
2554 ir
->record
->accept(this);
2556 for (i
= 0; i
< struct_type
->length
; i
++) {
2557 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2559 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2562 /* If the type is smaller than a vec4, replicate the last channel out. */
2563 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2564 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2566 this->result
.swizzle
= SWIZZLE_NOOP
;
2568 this->result
.index
+= offset
;
2569 this->result
.type
= ir
->type
->base_type
;
2573 * We want to be careful in assignment setup to hit the actual storage
2574 * instead of potentially using a temporary like we might with the
2575 * ir_dereference handler.
2578 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2580 /* The LHS must be a dereference. If the LHS is a variable indexed array
2581 * access of a vector, it must be separated into a series conditional moves
2582 * before reaching this point (see ir_vec_index_to_cond_assign).
2584 assert(ir
->as_dereference());
2585 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2587 assert(!deref_array
->array
->type
->is_vector());
2590 /* Use the rvalue deref handler for the most part. We'll ignore
2591 * swizzles in it and write swizzles using writemask, though.
2594 return st_dst_reg(v
->result
);
2598 * Process the condition of a conditional assignment
2600 * Examines the condition of a conditional assignment to generate the optimal
2601 * first operand of a \c CMP instruction. If the condition is a relational
2602 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2603 * used as the source for the \c CMP instruction. Otherwise the comparison
2604 * is processed to a boolean result, and the boolean result is used as the
2605 * operand to the CMP instruction.
2608 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2610 ir_rvalue
*src_ir
= ir
;
2612 bool switch_order
= false;
2614 ir_expression
*const expr
= ir
->as_expression();
2616 if (native_integers
) {
2617 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2618 enum glsl_base_type type
= expr
->operands
[0]->type
->base_type
;
2619 if (type
== GLSL_TYPE_INT
|| type
== GLSL_TYPE_UINT
||
2620 type
== GLSL_TYPE_BOOL
) {
2621 if (expr
->operation
== ir_binop_equal
) {
2622 if (expr
->operands
[0]->is_zero()) {
2623 src_ir
= expr
->operands
[1];
2624 switch_order
= true;
2626 else if (expr
->operands
[1]->is_zero()) {
2627 src_ir
= expr
->operands
[0];
2628 switch_order
= true;
2631 else if (expr
->operation
== ir_binop_nequal
) {
2632 if (expr
->operands
[0]->is_zero()) {
2633 src_ir
= expr
->operands
[1];
2635 else if (expr
->operands
[1]->is_zero()) {
2636 src_ir
= expr
->operands
[0];
2642 src_ir
->accept(this);
2643 return switch_order
;
2646 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2647 bool zero_on_left
= false;
2649 if (expr
->operands
[0]->is_zero()) {
2650 src_ir
= expr
->operands
[1];
2651 zero_on_left
= true;
2652 } else if (expr
->operands
[1]->is_zero()) {
2653 src_ir
= expr
->operands
[0];
2654 zero_on_left
= false;
2658 * (a < 0) T F F ( a < 0) T F F
2659 * (0 < a) F F T (-a < 0) F F T
2660 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2661 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2662 * (a > 0) F F T (-a < 0) F F T
2663 * (0 > a) T F F ( a < 0) T F F
2664 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2665 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2667 * Note that exchanging the order of 0 and 'a' in the comparison simply
2668 * means that the value of 'a' should be negated.
2671 switch (expr
->operation
) {
2673 switch_order
= false;
2674 negate
= zero_on_left
;
2677 case ir_binop_greater
:
2678 switch_order
= false;
2679 negate
= !zero_on_left
;
2682 case ir_binop_lequal
:
2683 switch_order
= true;
2684 negate
= !zero_on_left
;
2687 case ir_binop_gequal
:
2688 switch_order
= true;
2689 negate
= zero_on_left
;
2693 /* This isn't the right kind of comparison afterall, so make sure
2694 * the whole condition is visited.
2702 src_ir
->accept(this);
2704 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2705 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2706 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2707 * computing the condition.
2710 this->result
.negate
= ~this->result
.negate
;
2712 return switch_order
;
2716 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2717 st_dst_reg
*l
, st_src_reg
*r
,
2718 st_src_reg
*cond
, bool cond_swap
)
2720 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2721 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2722 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
,
2728 if (type
->is_array()) {
2729 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2730 emit_block_mov(ir
, type
->fields
.array
, l
, r
, cond
, cond_swap
);
2735 if (type
->is_matrix()) {
2736 const struct glsl_type
*vec_type
;
2738 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2739 type
->vector_elements
, 1);
2741 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2742 emit_block_mov(ir
, vec_type
, l
, r
, cond
, cond_swap
);
2747 assert(type
->is_scalar() || type
->is_vector());
2749 r
->type
= type
->base_type
;
2751 st_src_reg l_src
= st_src_reg(*l
);
2752 l_src
.swizzle
= swizzle_for_size(type
->vector_elements
);
2754 if (native_integers
) {
2755 emit_asm(ir
, TGSI_OPCODE_UCMP
, *l
, *cond
,
2756 cond_swap
? l_src
: *r
,
2757 cond_swap
? *r
: l_src
);
2759 emit_asm(ir
, TGSI_OPCODE_CMP
, *l
, *cond
,
2760 cond_swap
? l_src
: *r
,
2761 cond_swap
? *r
: l_src
);
2764 emit_asm(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2771 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2776 ir
->rhs
->accept(this);
2779 l
= get_assignment_lhs(ir
->lhs
, this);
2781 /* FINISHME: This should really set to the correct maximal writemask for each
2782 * FINISHME: component written (in the loops below). This case can only
2783 * FINISHME: occur for matrices, arrays, and structures.
2785 if (ir
->write_mask
== 0) {
2786 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2787 l
.writemask
= WRITEMASK_XYZW
;
2788 } else if (ir
->lhs
->type
->is_scalar() &&
2789 !ir
->lhs
->type
->is_double() &&
2790 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2791 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2792 * FINISHME: W component of fragment shader output zero, work correctly.
2794 l
.writemask
= WRITEMASK_XYZW
;
2797 int first_enabled_chan
= 0;
2800 l
.writemask
= ir
->write_mask
;
2802 for (int i
= 0; i
< 4; i
++) {
2803 if (l
.writemask
& (1 << i
)) {
2804 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2809 /* Swizzle a small RHS vector into the channels being written.
2811 * glsl ir treats write_mask as dictating how many channels are
2812 * present on the RHS while TGSI treats write_mask as just
2813 * showing which channels of the vec4 RHS get written.
2815 for (int i
= 0; i
< 4; i
++) {
2816 if (l
.writemask
& (1 << i
))
2817 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2819 swizzles
[i
] = first_enabled_chan
;
2821 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2822 swizzles
[2], swizzles
[3]);
2825 assert(l
.file
!= PROGRAM_UNDEFINED
);
2826 assert(r
.file
!= PROGRAM_UNDEFINED
);
2828 if (ir
->condition
) {
2829 const bool switch_order
= this->process_move_condition(ir
->condition
);
2830 st_src_reg condition
= this->result
;
2832 emit_block_mov(ir
, ir
->lhs
->type
, &l
, &r
, &condition
, switch_order
);
2833 } else if (ir
->rhs
->as_expression() &&
2834 this->instructions
.get_tail() &&
2835 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2836 type_size(ir
->lhs
->type
) == 1 &&
2837 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
[0].writemask
) {
2838 /* To avoid emitting an extra MOV when assigning an expression to a
2839 * variable, emit the last instruction of the expression again, but
2840 * replace the destination register with the target of the assignment.
2841 * Dead code elimination will remove the original instruction.
2843 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2844 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2845 new_inst
= emit_asm(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2], inst
->src
[3]);
2846 new_inst
->saturate
= inst
->saturate
;
2847 inst
->dead_mask
= inst
->dst
[0].writemask
;
2849 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
, NULL
, false);
2855 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2858 GLdouble stack_vals
[4] = { 0 };
2859 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2860 GLenum gl_type
= GL_NONE
;
2862 static int in_array
= 0;
2863 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2865 /* Unfortunately, 4 floats is all we can get into
2866 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2867 * aggregate constant and move each constant value into it. If we
2868 * get lucky, copy propagation will eliminate the extra moves.
2870 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2871 st_src_reg temp_base
= get_temp(ir
->type
);
2872 st_dst_reg temp
= st_dst_reg(temp_base
);
2874 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
2875 int size
= type_size(field_value
->type
);
2879 field_value
->accept(this);
2882 for (i
= 0; i
< (unsigned int)size
; i
++) {
2883 emit_asm(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2889 this->result
= temp_base
;
2893 if (ir
->type
->is_array()) {
2894 st_src_reg temp_base
= get_temp(ir
->type
);
2895 st_dst_reg temp
= st_dst_reg(temp_base
);
2896 int size
= type_size(ir
->type
->fields
.array
);
2901 for (i
= 0; i
< ir
->type
->length
; i
++) {
2902 ir
->array_elements
[i
]->accept(this);
2904 for (int j
= 0; j
< size
; j
++) {
2905 emit_asm(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2911 this->result
= temp_base
;
2916 if (ir
->type
->is_matrix()) {
2917 st_src_reg mat
= get_temp(ir
->type
);
2918 st_dst_reg mat_column
= st_dst_reg(mat
);
2920 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2921 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2922 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2924 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2925 src
.index
= add_constant(file
,
2927 ir
->type
->vector_elements
,
2930 emit_asm(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2939 switch (ir
->type
->base_type
) {
2940 case GLSL_TYPE_FLOAT
:
2942 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2943 values
[i
].f
= ir
->value
.f
[i
];
2946 case GLSL_TYPE_DOUBLE
:
2947 gl_type
= GL_DOUBLE
;
2948 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2949 values
[i
* 2].i
= *(uint32_t *)&ir
->value
.d
[i
];
2950 values
[i
* 2 + 1].i
= *(((uint32_t *)&ir
->value
.d
[i
]) + 1);
2953 case GLSL_TYPE_UINT
:
2954 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2955 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2956 if (native_integers
)
2957 values
[i
].u
= ir
->value
.u
[i
];
2959 values
[i
].f
= ir
->value
.u
[i
];
2963 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2964 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2965 if (native_integers
)
2966 values
[i
].i
= ir
->value
.i
[i
];
2968 values
[i
].f
= ir
->value
.i
[i
];
2971 case GLSL_TYPE_BOOL
:
2972 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2973 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2974 values
[i
].u
= ir
->value
.b
[i
] ? ctx
->Const
.UniformBooleanTrue
: 0;
2978 assert(!"Non-float/uint/int/bool constant");
2981 this->result
= st_src_reg(file
, -1, ir
->type
);
2982 this->result
.index
= add_constant(file
,
2984 ir
->type
->vector_elements
,
2986 &this->result
.swizzle
);
2990 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2992 foreach_in_list_use_after(function_entry
, entry
, &this->function_signatures
) {
2993 if (entry
->sig
== sig
)
2997 entry
= ralloc(mem_ctx
, function_entry
);
2999 entry
->sig_id
= this->next_signature_id
++;
3000 entry
->bgn_inst
= NULL
;
3002 /* Allocate storage for all the parameters. */
3003 foreach_in_list(ir_variable
, param
, &sig
->parameters
) {
3004 variable_storage
*storage
;
3006 storage
= find_variable_storage(param
);
3009 st_src_reg src
= get_temp(param
->type
);
3011 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
3012 this->variables
.push_tail(storage
);
3015 if (!sig
->return_type
->is_void()) {
3016 entry
->return_reg
= get_temp(sig
->return_type
);
3018 entry
->return_reg
= undef_src
;
3021 this->function_signatures
.push_tail(entry
);
3026 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
3028 glsl_to_tgsi_instruction
*call_inst
;
3029 ir_function_signature
*sig
= ir
->callee
;
3030 function_entry
*entry
= get_function_signature(sig
);
3033 /* Process in parameters. */
3034 foreach_two_lists(formal_node
, &sig
->parameters
,
3035 actual_node
, &ir
->actual_parameters
) {
3036 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
3037 ir_variable
*param
= (ir_variable
*) formal_node
;
3039 if (param
->data
.mode
== ir_var_function_in
||
3040 param
->data
.mode
== ir_var_function_inout
) {
3041 variable_storage
*storage
= find_variable_storage(param
);
3044 param_rval
->accept(this);
3045 st_src_reg r
= this->result
;
3048 l
.file
= storage
->file
;
3049 l
.index
= storage
->index
;
3051 l
.writemask
= WRITEMASK_XYZW
;
3052 l
.cond_mask
= COND_TR
;
3054 for (i
= 0; i
< type_size(param
->type
); i
++) {
3055 emit_asm(ir
, TGSI_OPCODE_MOV
, l
, r
);
3062 /* Emit call instruction */
3063 call_inst
= emit_asm(ir
, TGSI_OPCODE_CAL
);
3064 call_inst
->function
= entry
;
3066 /* Process out parameters. */
3067 foreach_two_lists(formal_node
, &sig
->parameters
,
3068 actual_node
, &ir
->actual_parameters
) {
3069 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
3070 ir_variable
*param
= (ir_variable
*) formal_node
;
3072 if (param
->data
.mode
== ir_var_function_out
||
3073 param
->data
.mode
== ir_var_function_inout
) {
3074 variable_storage
*storage
= find_variable_storage(param
);
3078 r
.file
= storage
->file
;
3079 r
.index
= storage
->index
;
3081 r
.swizzle
= SWIZZLE_NOOP
;
3084 param_rval
->accept(this);
3085 st_dst_reg l
= st_dst_reg(this->result
);
3087 for (i
= 0; i
< type_size(param
->type
); i
++) {
3088 emit_asm(ir
, TGSI_OPCODE_MOV
, l
, r
);
3095 /* Process return value. */
3096 this->result
= entry
->return_reg
;
3100 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
3102 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
;
3103 st_src_reg offset
[MAX_GLSL_TEXTURE_OFFSET
], sample_index
, component
;
3104 st_src_reg levels_src
;
3105 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
3106 glsl_to_tgsi_instruction
*inst
= NULL
;
3107 unsigned opcode
= TGSI_OPCODE_NOP
;
3108 const glsl_type
*sampler_type
= ir
->sampler
->type
;
3109 ir_rvalue
*sampler_index
=
3110 _mesa_get_sampler_array_nonconst_index(ir
->sampler
);
3111 bool is_cube_array
= false;
3114 /* if we are a cube array sampler */
3115 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
3116 sampler_type
->sampler_array
)) {
3117 is_cube_array
= true;
3120 if (ir
->coordinate
) {
3121 ir
->coordinate
->accept(this);
3123 /* Put our coords in a temp. We'll need to modify them for shadow,
3124 * projection, or LOD, so the only case we'd use it as is is if
3125 * we're doing plain old texturing. The optimization passes on
3126 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
3128 coord
= get_temp(glsl_type::vec4_type
);
3129 coord_dst
= st_dst_reg(coord
);
3130 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
3131 emit_asm(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
3134 if (ir
->projector
) {
3135 ir
->projector
->accept(this);
3136 projector
= this->result
;
3139 /* Storage for our result. Ideally for an assignment we'd be using
3140 * the actual storage for the result here, instead.
3142 result_src
= get_temp(ir
->type
);
3143 result_dst
= st_dst_reg(result_src
);
3147 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
3149 ir
->offset
->accept(this);
3150 offset
[0] = this->result
;
3154 if (is_cube_array
||
3155 sampler_type
== glsl_type::samplerCubeShadow_type
) {
3156 opcode
= TGSI_OPCODE_TXB2
;
3159 opcode
= TGSI_OPCODE_TXB
;
3161 ir
->lod_info
.bias
->accept(this);
3162 lod_info
= this->result
;
3164 ir
->offset
->accept(this);
3165 offset
[0] = this->result
;
3169 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
3170 ir
->lod_info
.lod
->accept(this);
3171 lod_info
= this->result
;
3173 ir
->offset
->accept(this);
3174 offset
[0] = this->result
;
3178 opcode
= TGSI_OPCODE_TXD
;
3179 ir
->lod_info
.grad
.dPdx
->accept(this);
3181 ir
->lod_info
.grad
.dPdy
->accept(this);
3184 ir
->offset
->accept(this);
3185 offset
[0] = this->result
;
3189 opcode
= TGSI_OPCODE_TXQ
;
3190 ir
->lod_info
.lod
->accept(this);
3191 lod_info
= this->result
;
3193 case ir_query_levels
:
3194 opcode
= TGSI_OPCODE_TXQ
;
3195 lod_info
= undef_src
;
3196 levels_src
= get_temp(ir
->type
);
3199 opcode
= TGSI_OPCODE_TXF
;
3200 ir
->lod_info
.lod
->accept(this);
3201 lod_info
= this->result
;
3203 ir
->offset
->accept(this);
3204 offset
[0] = this->result
;
3208 opcode
= TGSI_OPCODE_TXF
;
3209 ir
->lod_info
.sample_index
->accept(this);
3210 sample_index
= this->result
;
3213 opcode
= TGSI_OPCODE_TG4
;
3214 ir
->lod_info
.component
->accept(this);
3215 component
= this->result
;
3217 ir
->offset
->accept(this);
3218 if (ir
->offset
->type
->base_type
== GLSL_TYPE_ARRAY
) {
3219 const glsl_type
*elt_type
= ir
->offset
->type
->fields
.array
;
3220 for (i
= 0; i
< ir
->offset
->type
->length
; i
++) {
3221 offset
[i
] = this->result
;
3222 offset
[i
].index
+= i
* type_size(elt_type
);
3223 offset
[i
].type
= elt_type
->base_type
;
3224 offset
[i
].swizzle
= swizzle_for_size(elt_type
->vector_elements
);
3227 offset
[0] = this->result
;
3232 opcode
= TGSI_OPCODE_LODQ
;
3236 if (ir
->projector
) {
3237 if (opcode
== TGSI_OPCODE_TEX
) {
3238 /* Slot the projector in as the last component of the coord. */
3239 coord_dst
.writemask
= WRITEMASK_W
;
3240 emit_asm(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
3241 coord_dst
.writemask
= WRITEMASK_XYZW
;
3242 opcode
= TGSI_OPCODE_TXP
;
3244 st_src_reg coord_w
= coord
;
3245 coord_w
.swizzle
= SWIZZLE_WWWW
;
3247 /* For the other TEX opcodes there's no projective version
3248 * since the last slot is taken up by LOD info. Do the
3249 * projective divide now.
3251 coord_dst
.writemask
= WRITEMASK_W
;
3252 emit_asm(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
3254 /* In the case where we have to project the coordinates "by hand,"
3255 * the shadow comparator value must also be projected.
3257 st_src_reg tmp_src
= coord
;
3258 if (ir
->shadow_comparitor
) {
3259 /* Slot the shadow value in as the second to last component of the
3262 ir
->shadow_comparitor
->accept(this);
3264 tmp_src
= get_temp(glsl_type::vec4_type
);
3265 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
3267 /* Projective division not allowed for array samplers. */
3268 assert(!sampler_type
->sampler_array
);
3270 tmp_dst
.writemask
= WRITEMASK_Z
;
3271 emit_asm(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
3273 tmp_dst
.writemask
= WRITEMASK_XY
;
3274 emit_asm(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
3277 coord_dst
.writemask
= WRITEMASK_XYZ
;
3278 emit_asm(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
3280 coord_dst
.writemask
= WRITEMASK_XYZW
;
3281 coord
.swizzle
= SWIZZLE_XYZW
;
3285 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
3286 * comparator was put in the correct place (and projected) by the code,
3287 * above, that handles by-hand projection.
3289 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
3290 /* Slot the shadow value in as the second to last component of the
3293 ir
->shadow_comparitor
->accept(this);
3295 if (is_cube_array
) {
3296 cube_sc
= get_temp(glsl_type::float_type
);
3297 cube_sc_dst
= st_dst_reg(cube_sc
);
3298 cube_sc_dst
.writemask
= WRITEMASK_X
;
3299 emit_asm(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
3300 cube_sc_dst
.writemask
= WRITEMASK_X
;
3303 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
3304 sampler_type
->sampler_array
) ||
3305 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
3306 coord_dst
.writemask
= WRITEMASK_W
;
3308 coord_dst
.writemask
= WRITEMASK_Z
;
3310 emit_asm(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
3311 coord_dst
.writemask
= WRITEMASK_XYZW
;
3315 if (ir
->op
== ir_txf_ms
) {
3316 coord_dst
.writemask
= WRITEMASK_W
;
3317 emit_asm(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
3318 coord_dst
.writemask
= WRITEMASK_XYZW
;
3319 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
3320 opcode
== TGSI_OPCODE_TXF
) {
3321 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3322 coord_dst
.writemask
= WRITEMASK_W
;
3323 emit_asm(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
3324 coord_dst
.writemask
= WRITEMASK_XYZW
;
3327 if (sampler_index
) {
3328 sampler_index
->accept(this);
3329 emit_arl(ir
, sampler_reladdr
, this->result
);
3332 if (opcode
== TGSI_OPCODE_TXD
)
3333 inst
= emit_asm(ir
, opcode
, result_dst
, coord
, dx
, dy
);
3334 else if (opcode
== TGSI_OPCODE_TXQ
) {
3335 if (ir
->op
== ir_query_levels
) {
3336 /* the level is stored in W */
3337 inst
= emit_asm(ir
, opcode
, st_dst_reg(levels_src
), lod_info
);
3338 result_dst
.writemask
= WRITEMASK_X
;
3339 levels_src
.swizzle
= SWIZZLE_WWWW
;
3340 emit_asm(ir
, TGSI_OPCODE_MOV
, result_dst
, levels_src
);
3342 inst
= emit_asm(ir
, opcode
, result_dst
, lod_info
);
3343 } else if (opcode
== TGSI_OPCODE_TXF
) {
3344 inst
= emit_asm(ir
, opcode
, result_dst
, coord
);
3345 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
3346 inst
= emit_asm(ir
, opcode
, result_dst
, coord
, lod_info
);
3347 } else if (opcode
== TGSI_OPCODE_TEX2
) {
3348 inst
= emit_asm(ir
, opcode
, result_dst
, coord
, cube_sc
);
3349 } else if (opcode
== TGSI_OPCODE_TG4
) {
3350 if (is_cube_array
&& ir
->shadow_comparitor
) {
3351 inst
= emit_asm(ir
, opcode
, result_dst
, coord
, cube_sc
);
3353 inst
= emit_asm(ir
, opcode
, result_dst
, coord
, component
);
3356 inst
= emit_asm(ir
, opcode
, result_dst
, coord
);
3358 if (ir
->shadow_comparitor
)
3359 inst
->tex_shadow
= GL_TRUE
;
3361 inst
->sampler
.index
= _mesa_get_sampler_uniform_value(ir
->sampler
,
3362 this->shader_program
,
3364 if (sampler_index
) {
3365 inst
->sampler
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
3366 memcpy(inst
->sampler
.reladdr
, &sampler_reladdr
, sizeof(sampler_reladdr
));
3367 inst
->sampler_array_size
=
3368 ir
->sampler
->as_dereference_array()->array
->type
->array_size();
3370 inst
->sampler_array_size
= 1;
3374 for (i
= 0; i
< MAX_GLSL_TEXTURE_OFFSET
&& offset
[i
].file
!= PROGRAM_UNDEFINED
; i
++)
3375 inst
->tex_offsets
[i
] = offset
[i
];
3376 inst
->tex_offset_num_offset
= i
;
3379 switch (sampler_type
->sampler_dimensionality
) {
3380 case GLSL_SAMPLER_DIM_1D
:
3381 inst
->tex_target
= (sampler_type
->sampler_array
)
3382 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
3384 case GLSL_SAMPLER_DIM_2D
:
3385 inst
->tex_target
= (sampler_type
->sampler_array
)
3386 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
3388 case GLSL_SAMPLER_DIM_3D
:
3389 inst
->tex_target
= TEXTURE_3D_INDEX
;
3391 case GLSL_SAMPLER_DIM_CUBE
:
3392 inst
->tex_target
= (sampler_type
->sampler_array
)
3393 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
3395 case GLSL_SAMPLER_DIM_RECT
:
3396 inst
->tex_target
= TEXTURE_RECT_INDEX
;
3398 case GLSL_SAMPLER_DIM_BUF
:
3399 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
3401 case GLSL_SAMPLER_DIM_EXTERNAL
:
3402 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
3404 case GLSL_SAMPLER_DIM_MS
:
3405 inst
->tex_target
= (sampler_type
->sampler_array
)
3406 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
3409 assert(!"Should not get here.");
3412 inst
->tex_type
= ir
->type
->base_type
;
3414 this->result
= result_src
;
3418 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
3420 if (ir
->get_value()) {
3424 assert(current_function
);
3426 ir
->get_value()->accept(this);
3427 st_src_reg r
= this->result
;
3429 l
= st_dst_reg(current_function
->return_reg
);
3431 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
3432 emit_asm(ir
, TGSI_OPCODE_MOV
, l
, r
);
3438 emit_asm(ir
, TGSI_OPCODE_RET
);
3442 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
3444 if (ir
->condition
) {
3445 ir
->condition
->accept(this);
3446 st_src_reg condition
= this->result
;
3448 /* Convert the bool condition to a float so we can negate. */
3449 if (native_integers
) {
3450 st_src_reg temp
= get_temp(ir
->condition
->type
);
3451 emit_asm(ir
, TGSI_OPCODE_AND
, st_dst_reg(temp
),
3452 condition
, st_src_reg_for_float(1.0));
3456 condition
.negate
= ~condition
.negate
;
3457 emit_asm(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, condition
);
3459 /* unconditional kil */
3460 emit_asm(ir
, TGSI_OPCODE_KILL
);
3465 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3468 glsl_to_tgsi_instruction
*if_inst
;
3470 ir
->condition
->accept(this);
3471 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3473 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3475 if_inst
= emit_asm(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3477 this->instructions
.push_tail(if_inst
);
3479 visit_exec_list(&ir
->then_instructions
, this);
3481 if (!ir
->else_instructions
.is_empty()) {
3482 emit_asm(ir
->condition
, TGSI_OPCODE_ELSE
);
3483 visit_exec_list(&ir
->else_instructions
, this);
3486 if_inst
= emit_asm(ir
->condition
, TGSI_OPCODE_ENDIF
);
3491 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3493 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3495 ir
->stream
->accept(this);
3496 emit_asm(ir
, TGSI_OPCODE_EMIT
, undef_dst
, this->result
);
3500 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3502 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3504 ir
->stream
->accept(this);
3505 emit_asm(ir
, TGSI_OPCODE_ENDPRIM
, undef_dst
, this->result
);
3509 glsl_to_tgsi_visitor::visit(ir_barrier
*ir
)
3511 assert(this->prog
->Target
== GL_TESS_CONTROL_PROGRAM_NV
||
3512 this->prog
->Target
== GL_COMPUTE_PROGRAM_NV
);
3514 emit_asm(ir
, TGSI_OPCODE_BARRIER
);
3517 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3519 result
.file
= PROGRAM_UNDEFINED
;
3524 num_input_arrays
= 0;
3525 num_output_arrays
= 0;
3526 next_signature_id
= 1;
3528 current_function
= NULL
;
3529 num_address_regs
= 0;
3531 indirect_addr_consts
= false;
3532 wpos_transform_const
= -1;
3534 native_integers
= false;
3535 mem_ctx
= ralloc_context(NULL
);
3538 shader_program
= NULL
;
3545 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3548 ralloc_free(mem_ctx
);
3551 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3558 * Count resources used by the given gpu program (number of texture
3562 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3564 v
->samplers_used
= 0;
3566 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &v
->instructions
) {
3567 if (is_tex_instruction(inst
->op
)) {
3568 for (int i
= 0; i
< inst
->sampler_array_size
; i
++) {
3569 unsigned idx
= inst
->sampler
.index
+ i
;
3570 v
->samplers_used
|= 1 << idx
;
3572 debug_assert(idx
< (int)ARRAY_SIZE(v
->sampler_types
));
3573 v
->sampler_types
[idx
] = inst
->tex_type
;
3574 v
->sampler_targets
[idx
] =
3575 st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
3577 if (inst
->tex_shadow
) {
3578 prog
->ShadowSamplers
|= 1 << (inst
->sampler
.index
+ i
);
3583 prog
->SamplersUsed
= v
->samplers_used
;
3585 if (v
->shader_program
!= NULL
)
3586 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3590 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3591 * are read from the given src in this instruction
3594 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3596 int read_mask
= 0, comp
;
3598 /* Now, given the src swizzle and the written channels, find which
3599 * components are actually read
3601 for (comp
= 0; comp
< 4; ++comp
) {
3602 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3604 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3605 read_mask
|= 1 << coord
;
3612 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3613 * instruction is the first instruction to write to register T0. There are
3614 * several lowering passes done in GLSL IR (e.g. branches and
3615 * relative addressing) that create a large number of conditional assignments
3616 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3618 * Here is why this conversion is safe:
3619 * CMP T0, T1 T2 T0 can be expanded to:
3625 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3626 * as the original program. If (T1 < 0.0) evaluates to false, executing
3627 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3628 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3629 * because any instruction that was going to read from T0 after this was going
3630 * to read a garbage value anyway.
3633 glsl_to_tgsi_visitor::simplify_cmp(void)
3635 int tempWritesSize
= 0;
3636 unsigned *tempWrites
= NULL
;
3637 unsigned outputWrites
[VARYING_SLOT_TESS_MAX
];
3639 memset(outputWrites
, 0, sizeof(outputWrites
));
3641 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3642 unsigned prevWriteMask
= 0;
3644 /* Give up if we encounter relative addressing or flow control. */
3645 if (inst
->dst
[0].reladdr
|| inst
->dst
[0].reladdr2
||
3646 inst
->dst
[1].reladdr
|| inst
->dst
[1].reladdr2
||
3647 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3648 inst
->op
== TGSI_OPCODE_BGNSUB
||
3649 inst
->op
== TGSI_OPCODE_CONT
||
3650 inst
->op
== TGSI_OPCODE_END
||
3651 inst
->op
== TGSI_OPCODE_ENDSUB
||
3652 inst
->op
== TGSI_OPCODE_RET
) {
3656 if (inst
->dst
[0].file
== PROGRAM_OUTPUT
) {
3657 assert(inst
->dst
[0].index
< (signed)ARRAY_SIZE(outputWrites
));
3658 prevWriteMask
= outputWrites
[inst
->dst
[0].index
];
3659 outputWrites
[inst
->dst
[0].index
] |= inst
->dst
[0].writemask
;
3660 } else if (inst
->dst
[0].file
== PROGRAM_TEMPORARY
) {
3661 if (inst
->dst
[0].index
>= tempWritesSize
) {
3662 const int inc
= 4096;
3664 tempWrites
= (unsigned*)
3666 (tempWritesSize
+ inc
) * sizeof(unsigned));
3670 memset(tempWrites
+ tempWritesSize
, 0, inc
* sizeof(unsigned));
3671 tempWritesSize
+= inc
;
3674 prevWriteMask
= tempWrites
[inst
->dst
[0].index
];
3675 tempWrites
[inst
->dst
[0].index
] |= inst
->dst
[0].writemask
;
3679 /* For a CMP to be considered a conditional write, the destination
3680 * register and source register two must be the same. */
3681 if (inst
->op
== TGSI_OPCODE_CMP
3682 && !(inst
->dst
[0].writemask
& prevWriteMask
)
3683 && inst
->src
[2].file
== inst
->dst
[0].file
3684 && inst
->src
[2].index
== inst
->dst
[0].index
3685 && inst
->dst
[0].writemask
== get_src_arg_mask(inst
->dst
[0], inst
->src
[2])) {
3687 inst
->op
= TGSI_OPCODE_MOV
;
3688 inst
->src
[0] = inst
->src
[1];
3695 /* Replaces all references to a temporary register index with another index. */
3697 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3699 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3702 for (j
= 0; j
< num_inst_src_regs(inst
->op
); j
++) {
3703 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3704 inst
->src
[j
].index
== index
) {
3705 inst
->src
[j
].index
= new_index
;
3709 for (j
= 0; j
< inst
->tex_offset_num_offset
; j
++) {
3710 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3711 inst
->tex_offsets
[j
].index
== index
) {
3712 inst
->tex_offsets
[j
].index
= new_index
;
3716 for (j
= 0; j
< num_inst_dst_regs(inst
->op
); j
++) {
3717 if (inst
->dst
[j
].file
== PROGRAM_TEMPORARY
&& inst
->dst
[j
].index
== index
) {
3718 inst
->dst
[j
].index
= new_index
;
3725 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3727 int depth
= 0; /* loop depth */
3728 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3731 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3732 for (j
= 0; j
< num_inst_src_regs(inst
->op
); j
++) {
3733 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3734 inst
->src
[j
].index
== index
) {
3735 return (depth
== 0) ? i
: loop_start
;
3738 for (j
= 0; j
< inst
->tex_offset_num_offset
; j
++) {
3739 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3740 inst
->tex_offsets
[j
].index
== index
) {
3741 return (depth
== 0) ? i
: loop_start
;
3744 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3747 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3758 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3760 int depth
= 0; /* loop depth */
3761 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3765 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3766 for (j
= 0; j
< num_inst_dst_regs(inst
->op
); j
++) {
3767 if (inst
->dst
[j
].file
== PROGRAM_TEMPORARY
&& inst
->dst
[j
].index
== index
) {
3768 return (depth
== 0) ? i
: loop_start
;
3771 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3774 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3785 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3787 int depth
= 0; /* loop depth */
3788 int last
= -1; /* index of last instruction that reads the temporary */
3791 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3792 for (j
= 0; j
< num_inst_src_regs(inst
->op
); j
++) {
3793 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3794 inst
->src
[j
].index
== index
) {
3795 last
= (depth
== 0) ? i
: -2;
3798 for (j
= 0; j
< inst
->tex_offset_num_offset
; j
++) {
3799 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3800 inst
->tex_offsets
[j
].index
== index
)
3801 last
= (depth
== 0) ? i
: -2;
3803 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3805 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3806 if (--depth
== 0 && last
== -2)
3816 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3818 int depth
= 0; /* loop depth */
3819 int last
= -1; /* index of last instruction that writes to the temporary */
3823 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3824 for (j
= 0; j
< num_inst_dst_regs(inst
->op
); j
++) {
3825 if (inst
->dst
[j
].file
== PROGRAM_TEMPORARY
&& inst
->dst
[j
].index
== index
)
3826 last
= (depth
== 0) ? i
: -2;
3829 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3831 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3832 if (--depth
== 0 && last
== -2)
3842 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3843 * channels for copy propagation and updates following instructions to
3844 * use the original versions.
3846 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3847 * will occur. As an example, a TXP production before this pass:
3849 * 0: MOV TEMP[1], INPUT[4].xyyy;
3850 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3851 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3855 * 0: MOV TEMP[1], INPUT[4].xyyy;
3856 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3857 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3859 * which allows for dead code elimination on TEMP[1]'s writes.
3862 glsl_to_tgsi_visitor::copy_propagate(void)
3864 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3865 glsl_to_tgsi_instruction
*,
3866 this->next_temp
* 4);
3867 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3870 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3871 assert(inst
->dst
[0].file
!= PROGRAM_TEMPORARY
3872 || inst
->dst
[0].index
< this->next_temp
);
3874 /* First, do any copy propagation possible into the src regs. */
3875 for (int r
= 0; r
< 3; r
++) {
3876 glsl_to_tgsi_instruction
*first
= NULL
;
3878 int acp_base
= inst
->src
[r
].index
* 4;
3880 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3881 inst
->src
[r
].reladdr
||
3882 inst
->src
[r
].reladdr2
)
3885 /* See if we can find entries in the ACP consisting of MOVs
3886 * from the same src register for all the swizzled channels
3887 * of this src register reference.
3889 for (int i
= 0; i
< 4; i
++) {
3890 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3891 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3898 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3903 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3904 first
->src
[0].index
!= copy_chan
->src
[0].index
||
3905 first
->src
[0].double_reg2
!= copy_chan
->src
[0].double_reg2
||
3906 first
->src
[0].index2D
!= copy_chan
->src
[0].index2D
) {
3914 /* We've now validated that we can copy-propagate to
3915 * replace this src register reference. Do it.
3917 inst
->src
[r
].file
= first
->src
[0].file
;
3918 inst
->src
[r
].index
= first
->src
[0].index
;
3919 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3920 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3921 inst
->src
[r
].double_reg2
= first
->src
[0].double_reg2
;
3922 inst
->src
[r
].array_id
= first
->src
[0].array_id
;
3925 for (int i
= 0; i
< 4; i
++) {
3926 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3927 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3928 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) << (3 * i
));
3930 inst
->src
[r
].swizzle
= swizzle
;
3935 case TGSI_OPCODE_BGNLOOP
:
3936 case TGSI_OPCODE_ENDLOOP
:
3937 /* End of a basic block, clear the ACP entirely. */
3938 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3941 case TGSI_OPCODE_IF
:
3942 case TGSI_OPCODE_UIF
:
3946 case TGSI_OPCODE_ENDIF
:
3947 case TGSI_OPCODE_ELSE
:
3948 /* Clear all channels written inside the block from the ACP, but
3949 * leaving those that were not touched.
3951 for (int r
= 0; r
< this->next_temp
; r
++) {
3952 for (int c
= 0; c
< 4; c
++) {
3953 if (!acp
[4 * r
+ c
])
3956 if (acp_level
[4 * r
+ c
] >= level
)
3957 acp
[4 * r
+ c
] = NULL
;
3960 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3965 /* Continuing the block, clear any written channels from
3968 for (int d
= 0; d
< 2; d
++) {
3969 if (inst
->dst
[d
].file
== PROGRAM_TEMPORARY
&& inst
->dst
[d
].reladdr
) {
3970 /* Any temporary might be written, so no copy propagation
3971 * across this instruction.
3973 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3974 } else if (inst
->dst
[d
].file
== PROGRAM_OUTPUT
&&
3975 inst
->dst
[d
].reladdr
) {
3976 /* Any output might be written, so no copy propagation
3977 * from outputs across this instruction.
3979 for (int r
= 0; r
< this->next_temp
; r
++) {
3980 for (int c
= 0; c
< 4; c
++) {
3981 if (!acp
[4 * r
+ c
])
3984 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3985 acp
[4 * r
+ c
] = NULL
;
3988 } else if (inst
->dst
[d
].file
== PROGRAM_TEMPORARY
||
3989 inst
->dst
[d
].file
== PROGRAM_OUTPUT
) {
3990 /* Clear where it's used as dst. */
3991 if (inst
->dst
[d
].file
== PROGRAM_TEMPORARY
) {
3992 for (int c
= 0; c
< 4; c
++) {
3993 if (inst
->dst
[d
].writemask
& (1 << c
))
3994 acp
[4 * inst
->dst
[d
].index
+ c
] = NULL
;
3998 /* Clear where it's used as src. */
3999 for (int r
= 0; r
< this->next_temp
; r
++) {
4000 for (int c
= 0; c
< 4; c
++) {
4001 if (!acp
[4 * r
+ c
])
4004 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
4006 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
[d
].file
&&
4007 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
[d
].index
&&
4008 inst
->dst
[d
].writemask
& (1 << src_chan
)) {
4009 acp
[4 * r
+ c
] = NULL
;
4018 /* If this is a copy, add it to the ACP. */
4019 if (inst
->op
== TGSI_OPCODE_MOV
&&
4020 inst
->dst
[0].file
== PROGRAM_TEMPORARY
&&
4021 !(inst
->dst
[0].file
== inst
->src
[0].file
&&
4022 inst
->dst
[0].index
== inst
->src
[0].index
) &&
4023 !inst
->dst
[0].reladdr
&&
4024 !inst
->dst
[0].reladdr2
&&
4026 inst
->src
[0].file
!= PROGRAM_ARRAY
&&
4027 !inst
->src
[0].reladdr
&&
4028 !inst
->src
[0].reladdr2
&&
4029 !inst
->src
[0].negate
) {
4030 for (int i
= 0; i
< 4; i
++) {
4031 if (inst
->dst
[0].writemask
& (1 << i
)) {
4032 acp
[4 * inst
->dst
[0].index
+ i
] = inst
;
4033 acp_level
[4 * inst
->dst
[0].index
+ i
] = level
;
4039 ralloc_free(acp_level
);
4044 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
4047 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
4048 * will occur. As an example, a TXP production after copy propagation but
4051 * 0: MOV TEMP[1], INPUT[4].xyyy;
4052 * 1: MOV TEMP[1].w, INPUT[4].wwww;
4053 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
4055 * and after this pass:
4057 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
4060 glsl_to_tgsi_visitor::eliminate_dead_code(void)
4062 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
4063 glsl_to_tgsi_instruction
*,
4064 this->next_temp
* 4);
4065 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
4069 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
4070 assert(inst
->dst
[0].file
!= PROGRAM_TEMPORARY
4071 || inst
->dst
[0].index
< this->next_temp
);
4074 case TGSI_OPCODE_BGNLOOP
:
4075 case TGSI_OPCODE_ENDLOOP
:
4076 case TGSI_OPCODE_CONT
:
4077 case TGSI_OPCODE_BRK
:
4078 /* End of a basic block, clear the write array entirely.
4080 * This keeps us from killing dead code when the writes are
4081 * on either side of a loop, even when the register isn't touched
4082 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
4083 * dead code of this type, so it shouldn't make a difference as long as
4084 * the dead code elimination pass in the GLSL compiler does its job.
4086 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
4089 case TGSI_OPCODE_ENDIF
:
4090 case TGSI_OPCODE_ELSE
:
4091 /* Promote the recorded level of all channels written inside the
4092 * preceding if or else block to the level above the if/else block.
4094 for (int r
= 0; r
< this->next_temp
; r
++) {
4095 for (int c
= 0; c
< 4; c
++) {
4096 if (!writes
[4 * r
+ c
])
4099 if (write_level
[4 * r
+ c
] == level
)
4100 write_level
[4 * r
+ c
] = level
-1;
4103 if(inst
->op
== TGSI_OPCODE_ENDIF
)
4107 case TGSI_OPCODE_IF
:
4108 case TGSI_OPCODE_UIF
:
4110 /* fallthrough to default case to mark the condition as read */
4112 /* Continuing the block, clear any channels from the write array that
4113 * are read by this instruction.
4115 for (unsigned i
= 0; i
< ARRAY_SIZE(inst
->src
); i
++) {
4116 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
4117 /* Any temporary might be read, so no dead code elimination
4118 * across this instruction.
4120 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
4121 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
4122 /* Clear where it's used as src. */
4123 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
4124 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
4125 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
4126 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
4128 for (int c
= 0; c
< 4; c
++) {
4129 if (src_chans
& (1 << c
))
4130 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
4134 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4135 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
4136 /* Any temporary might be read, so no dead code elimination
4137 * across this instruction.
4139 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
4140 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
4141 /* Clear where it's used as src. */
4142 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
4143 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
4144 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
4145 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
4147 for (int c
= 0; c
< 4; c
++) {
4148 if (src_chans
& (1 << c
))
4149 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
4156 /* If this instruction writes to a temporary, add it to the write array.
4157 * If there is already an instruction in the write array for one or more
4158 * of the channels, flag that channel write as dead.
4160 for (unsigned i
= 0; i
< ARRAY_SIZE(inst
->dst
); i
++) {
4161 if (inst
->dst
[i
].file
== PROGRAM_TEMPORARY
&&
4162 !inst
->dst
[i
].reladdr
&&
4164 for (int c
= 0; c
< 4; c
++) {
4165 if (inst
->dst
[i
].writemask
& (1 << c
)) {
4166 if (writes
[4 * inst
->dst
[i
].index
+ c
]) {
4167 if (write_level
[4 * inst
->dst
[i
].index
+ c
] < level
)
4170 writes
[4 * inst
->dst
[i
].index
+ c
]->dead_mask
|= (1 << c
);
4172 writes
[4 * inst
->dst
[i
].index
+ c
] = inst
;
4173 write_level
[4 * inst
->dst
[i
].index
+ c
] = level
;
4180 /* Anything still in the write array at this point is dead code. */
4181 for (int r
= 0; r
< this->next_temp
; r
++) {
4182 for (int c
= 0; c
< 4; c
++) {
4183 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
4185 inst
->dead_mask
|= (1 << c
);
4189 /* Now actually remove the instructions that are completely dead and update
4190 * the writemask of other instructions with dead channels.
4192 foreach_in_list_safe(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
4193 if (!inst
->dead_mask
|| !inst
->dst
[0].writemask
)
4195 else if ((inst
->dst
[0].writemask
& ~inst
->dead_mask
) == 0) {
4200 if (inst
->dst
[0].type
== GLSL_TYPE_DOUBLE
) {
4201 if (inst
->dead_mask
== WRITEMASK_XY
||
4202 inst
->dead_mask
== WRITEMASK_ZW
)
4203 inst
->dst
[0].writemask
&= ~(inst
->dead_mask
);
4205 inst
->dst
[0].writemask
&= ~(inst
->dead_mask
);
4209 ralloc_free(write_level
);
4210 ralloc_free(writes
);
4215 /* merge DFRACEXP instructions into one. */
4217 glsl_to_tgsi_visitor::merge_two_dsts(void)
4219 foreach_in_list_safe(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
4220 glsl_to_tgsi_instruction
*inst2
;
4222 if (num_inst_dst_regs(inst
->op
) != 2)
4225 if (inst
->dst
[0].file
!= PROGRAM_UNDEFINED
&&
4226 inst
->dst
[1].file
!= PROGRAM_UNDEFINED
)
4229 inst2
= (glsl_to_tgsi_instruction
*) inst
->next
;
4232 if (inst
->src
[0].file
== inst2
->src
[0].file
&&
4233 inst
->src
[0].index
== inst2
->src
[0].index
&&
4234 inst
->src
[0].type
== inst2
->src
[0].type
&&
4235 inst
->src
[0].swizzle
== inst2
->src
[0].swizzle
)
4237 inst2
= (glsl_to_tgsi_instruction
*) inst2
->next
;
4243 if (inst
->dst
[0].file
== PROGRAM_UNDEFINED
) {
4245 inst
->dst
[0] = inst2
->dst
[0];
4246 } else if (inst
->dst
[1].file
== PROGRAM_UNDEFINED
) {
4247 inst
->dst
[1] = inst2
->dst
[1];
4258 /* Merges temporary registers together where possible to reduce the number of
4259 * registers needed to run a program.
4261 * Produces optimal code only after copy propagation and dead code elimination
4264 glsl_to_tgsi_visitor::merge_registers(void)
4266 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
4267 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
4270 /* Read the indices of the last read and first write to each temp register
4271 * into an array so that we don't have to traverse the instruction list as
4273 for (i
= 0; i
< this->next_temp
; i
++) {
4274 last_reads
[i
] = get_last_temp_read(i
);
4275 first_writes
[i
] = get_first_temp_write(i
);
4278 /* Start looking for registers with non-overlapping usages that can be
4279 * merged together. */
4280 for (i
= 0; i
< this->next_temp
; i
++) {
4281 /* Don't touch unused registers. */
4282 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
4284 for (j
= 0; j
< this->next_temp
; j
++) {
4285 /* Don't touch unused registers. */
4286 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
4288 /* We can merge the two registers if the first write to j is after or
4289 * in the same instruction as the last read from i. Note that the
4290 * register at index i will always be used earlier or at the same time
4291 * as the register at index j. */
4292 if (first_writes
[i
] <= first_writes
[j
] &&
4293 last_reads
[i
] <= first_writes
[j
]) {
4294 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
4296 /* Update the first_writes and last_reads arrays with the new
4297 * values for the merged register index, and mark the newly unused
4298 * register index as such. */
4299 last_reads
[i
] = last_reads
[j
];
4300 first_writes
[j
] = -1;
4306 ralloc_free(last_reads
);
4307 ralloc_free(first_writes
);
4310 /* Reassign indices to temporary registers by reusing unused indices created
4311 * by optimization passes. */
4313 glsl_to_tgsi_visitor::renumber_registers(void)
4318 for (i
= 0; i
< this->next_temp
; i
++) {
4319 if (get_first_temp_read(i
) < 0) continue;
4321 rename_temp_register(i
, new_index
);
4325 this->next_temp
= new_index
;
4329 * Returns a fragment program which implements the current pixel transfer ops.
4330 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
4333 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
4334 glsl_to_tgsi_visitor
*original
,
4335 int scale_and_bias
, int pixel_maps
)
4337 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4338 struct st_context
*st
= st_context(original
->ctx
);
4339 struct gl_program
*prog
= &fp
->Base
.Base
;
4340 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
4341 st_src_reg coord
, src0
;
4343 glsl_to_tgsi_instruction
*inst
;
4345 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4346 v
->ctx
= original
->ctx
;
4348 v
->shader_program
= NULL
;
4350 v
->glsl_version
= original
->glsl_version
;
4351 v
->native_integers
= original
->native_integers
;
4352 v
->options
= original
->options
;
4353 v
->next_temp
= original
->next_temp
;
4354 v
->num_address_regs
= original
->num_address_regs
;
4355 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4356 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4357 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4358 v
->num_immediates
= original
->num_immediates
;
4361 * Get initial pixel color from the texture.
4362 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
4364 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4365 src0
= v
->get_temp(glsl_type::vec4_type
);
4366 dst0
= st_dst_reg(src0
);
4367 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4368 inst
->sampler_array_size
= 1;
4369 inst
->tex_target
= TEXTURE_2D_INDEX
;
4371 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4372 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
4373 v
->samplers_used
|= (1 << 0);
4375 if (scale_and_bias
) {
4376 static const gl_state_index scale_state
[STATE_LENGTH
] =
4377 { STATE_INTERNAL
, STATE_PT_SCALE
,
4378 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4379 static const gl_state_index bias_state
[STATE_LENGTH
] =
4380 { STATE_INTERNAL
, STATE_PT_BIAS
,
4381 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4382 GLint scale_p
, bias_p
;
4383 st_src_reg scale
, bias
;
4385 scale_p
= _mesa_add_state_reference(params
, scale_state
);
4386 bias_p
= _mesa_add_state_reference(params
, bias_state
);
4388 /* MAD colorTemp, colorTemp, scale, bias; */
4389 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
4390 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
4391 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
4395 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
4396 st_dst_reg temp_dst
= st_dst_reg(temp
);
4398 assert(st
->pixel_xfer
.pixelmap_texture
);
4401 /* With a little effort, we can do four pixel map look-ups with
4402 * two TEX instructions:
4405 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4406 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
4407 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4408 inst
->sampler
.index
= 1;
4409 inst
->sampler_array_size
= 1;
4410 inst
->tex_target
= TEXTURE_2D_INDEX
;
4412 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4413 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
4414 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
4415 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4416 inst
->sampler
.index
= 1;
4417 inst
->sampler_array_size
= 1;
4418 inst
->tex_target
= TEXTURE_2D_INDEX
;
4420 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
4421 v
->samplers_used
|= (1 << 1);
4423 /* MOV colorTemp, temp; */
4424 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4427 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4429 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &original
->instructions
) {
4430 glsl_to_tgsi_instruction
*newinst
;
4431 st_src_reg src_regs
[4];
4433 if (inst
->dst
[0].file
== PROGRAM_OUTPUT
)
4434 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
[0].index
);
4436 for (int i
= 0; i
< 4; i
++) {
4437 src_regs
[i
] = inst
->src
[i
];
4438 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4439 src_regs
[i
].index
== VARYING_SLOT_COL0
) {
4440 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4441 src_regs
[i
].index
= src0
.index
;
4443 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4444 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4447 newinst
= v
->emit_asm(NULL
, inst
->op
, inst
->dst
[0], src_regs
[0], src_regs
[1], src_regs
[2], src_regs
[3]);
4448 newinst
->tex_target
= inst
->tex_target
;
4449 newinst
->sampler_array_size
= inst
->sampler_array_size
;
4452 /* Make modifications to fragment program info. */
4453 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4454 original
->prog
->Parameters
);
4455 _mesa_free_parameter_list(params
);
4456 count_resources(v
, prog
);
4457 fp
->glsl_to_tgsi
= v
;
4461 * Make fragment program for glBitmap:
4462 * Sample the texture and kill the fragment if the bit is 0.
4463 * This program will be combined with the user's fragment program.
4465 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4468 get_bitmap_visitor(struct st_fragment_program
*fp
,
4469 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4471 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4472 struct st_context
*st
= st_context(original
->ctx
);
4473 struct gl_program
*prog
= &fp
->Base
.Base
;
4474 st_src_reg coord
, src0
;
4476 glsl_to_tgsi_instruction
*inst
;
4478 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4479 v
->ctx
= original
->ctx
;
4481 v
->shader_program
= NULL
;
4483 v
->glsl_version
= original
->glsl_version
;
4484 v
->native_integers
= original
->native_integers
;
4485 v
->options
= original
->options
;
4486 v
->next_temp
= original
->next_temp
;
4487 v
->num_address_regs
= original
->num_address_regs
;
4488 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4489 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4490 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4491 v
->num_immediates
= original
->num_immediates
;
4493 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4494 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4495 src0
= v
->get_temp(glsl_type::vec4_type
);
4496 dst0
= st_dst_reg(src0
);
4497 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4498 inst
->sampler
.index
= samplerIndex
;
4499 inst
->sampler_array_size
= 1;
4500 inst
->tex_target
= TEXTURE_2D_INDEX
;
4502 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4503 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4504 v
->samplers_used
|= (1 << samplerIndex
);
4506 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4507 src0
.negate
= NEGATE_XYZW
;
4508 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4509 src0
.swizzle
= SWIZZLE_XXXX
;
4510 inst
= v
->emit_asm(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4512 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4514 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &original
->instructions
) {
4515 glsl_to_tgsi_instruction
*newinst
;
4516 st_src_reg src_regs
[4];
4518 if (inst
->dst
[0].file
== PROGRAM_OUTPUT
)
4519 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
[0].index
);
4521 for (int i
= 0; i
< 4; i
++) {
4522 src_regs
[i
] = inst
->src
[i
];
4523 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4524 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4527 newinst
= v
->emit_asm(NULL
, inst
->op
, inst
->dst
[0], src_regs
[0], src_regs
[1], src_regs
[2], src_regs
[3]);
4528 newinst
->tex_target
= inst
->tex_target
;
4529 newinst
->sampler_array_size
= inst
->sampler_array_size
;
4532 /* Make modifications to fragment program info. */
4533 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4534 count_resources(v
, prog
);
4535 fp
->glsl_to_tgsi
= v
;
4538 /* ------------------------- TGSI conversion stuff -------------------------- */
4540 unsigned branch_target
;
4545 * Intermediate state used during shader translation.
4547 struct st_translate
{
4548 struct ureg_program
*ureg
;
4550 unsigned temps_size
;
4551 struct ureg_dst
*temps
;
4553 struct ureg_dst
*arrays
;
4554 unsigned num_temp_arrays
;
4555 struct ureg_src
*constants
;
4557 struct ureg_src
*immediates
;
4559 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4560 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4561 struct ureg_dst address
[3];
4562 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4563 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4564 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4565 unsigned *array_sizes
;
4566 struct array_decl
*input_arrays
;
4567 struct array_decl
*output_arrays
;
4569 const GLuint
*inputMapping
;
4570 const GLuint
*outputMapping
;
4572 /* For every instruction that contains a label (eg CALL), keep
4573 * details so that we can go back afterwards and emit the correct
4574 * tgsi instruction number for each label.
4576 struct label
*labels
;
4577 unsigned labels_size
;
4578 unsigned labels_count
;
4580 /* Keep a record of the tgsi instruction number that each mesa
4581 * instruction starts at, will be used to fix up labels after
4586 unsigned insn_count
;
4588 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4593 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4594 const unsigned _mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4597 TGSI_SEMANTIC_VERTEXID
,
4598 TGSI_SEMANTIC_INSTANCEID
,
4599 TGSI_SEMANTIC_VERTEXID_NOBASE
,
4600 TGSI_SEMANTIC_BASEVERTEX
,
4604 TGSI_SEMANTIC_INVOCATIONID
,
4609 TGSI_SEMANTIC_SAMPLEID
,
4610 TGSI_SEMANTIC_SAMPLEPOS
,
4611 TGSI_SEMANTIC_SAMPLEMASK
,
4613 /* Tessellation shaders
4615 TGSI_SEMANTIC_TESSCOORD
,
4616 TGSI_SEMANTIC_VERTICESIN
,
4617 TGSI_SEMANTIC_PRIMID
,
4618 TGSI_SEMANTIC_TESSOUTER
,
4619 TGSI_SEMANTIC_TESSINNER
,
4623 * Make note of a branch to a label in the TGSI code.
4624 * After we've emitted all instructions, we'll go over the list
4625 * of labels built here and patch the TGSI code with the actual
4626 * location of each label.
4628 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4632 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4633 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4634 t
->labels
= (struct label
*)realloc(t
->labels
,
4635 t
->labels_size
* sizeof(struct label
));
4636 if (t
->labels
== NULL
) {
4637 static unsigned dummy
;
4643 i
= t
->labels_count
++;
4644 t
->labels
[i
].branch_target
= branch_target
;
4645 return &t
->labels
[i
].token
;
4649 * Called prior to emitting the TGSI code for each instruction.
4650 * Allocate additional space for instructions if needed.
4651 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4652 * the next TGSI instruction.
4654 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4656 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4657 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4658 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4659 if (t
->insn
== NULL
) {
4665 t
->insn
[t
->insn_count
++] = start
;
4669 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4671 static struct ureg_src
4672 emit_immediate(struct st_translate
*t
,
4673 gl_constant_value values
[4],
4676 struct ureg_program
*ureg
= t
->ureg
;
4681 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4683 return ureg_DECL_immediate_f64(ureg
, (double *)&values
[0].f
, size
);
4685 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4686 case GL_UNSIGNED_INT
:
4688 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4690 assert(!"should not get here - type must be float, int, uint, or bool");
4691 return ureg_src_undef();
4696 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4698 static struct ureg_dst
4699 dst_register(struct st_translate
*t
, gl_register_file file
, unsigned index
,
4705 case PROGRAM_UNDEFINED
:
4706 return ureg_dst_undef();
4708 case PROGRAM_TEMPORARY
:
4709 /* Allocate space for temporaries on demand. */
4710 if (index
>= t
->temps_size
) {
4711 const int inc
= 4096;
4713 t
->temps
= (struct ureg_dst
*)
4715 (t
->temps_size
+ inc
) * sizeof(struct ureg_dst
));
4717 return ureg_dst_undef();
4719 memset(t
->temps
+ t
->temps_size
, 0, inc
* sizeof(struct ureg_dst
));
4720 t
->temps_size
+= inc
;
4723 if (ureg_dst_is_undef(t
->temps
[index
]))
4724 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4726 return t
->temps
[index
];
4729 array
= index
>> 16;
4731 assert(array
< t
->num_temp_arrays
);
4733 if (ureg_dst_is_undef(t
->arrays
[array
]))
4734 t
->arrays
[array
] = ureg_DECL_array_temporary(
4735 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4737 return ureg_dst_array_offset(t
->arrays
[array
],
4738 (int)(index
& 0xFFFF) - 0x8000);
4740 case PROGRAM_OUTPUT
:
4742 if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4743 assert(index
< FRAG_RESULT_MAX
);
4744 else if (t
->procType
== TGSI_PROCESSOR_TESS_CTRL
||
4745 t
->procType
== TGSI_PROCESSOR_TESS_EVAL
)
4746 assert(index
< VARYING_SLOT_TESS_MAX
);
4748 assert(index
< VARYING_SLOT_MAX
);
4750 assert(t
->outputMapping
[index
] < ARRAY_SIZE(t
->outputs
));
4751 assert(t
->outputs
[t
->outputMapping
[index
]].File
!= TGSI_FILE_NULL
);
4752 return t
->outputs
[t
->outputMapping
[index
]];
4755 struct array_decl
*decl
= &t
->output_arrays
[array_id
-1];
4756 unsigned mesa_index
= decl
->mesa_index
;
4757 int slot
= t
->outputMapping
[mesa_index
];
4759 assert(slot
!= -1 && t
->outputs
[slot
].File
== TGSI_FILE_OUTPUT
);
4760 assert(t
->outputs
[slot
].ArrayID
== array_id
);
4761 return ureg_dst_array_offset(t
->outputs
[slot
], index
- mesa_index
);
4764 case PROGRAM_ADDRESS
:
4765 return t
->address
[index
];
4768 assert(!"unknown dst register file");
4769 return ureg_dst_undef();
4774 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4776 static struct ureg_src
4777 src_register(struct st_translate
*t
, const st_src_reg
*reg
)
4779 int index
= reg
->index
;
4780 int double_reg2
= reg
->double_reg2
? 1 : 0;
4783 case PROGRAM_UNDEFINED
:
4784 return ureg_imm4f(t
->ureg
, 0, 0, 0, 0);
4786 case PROGRAM_TEMPORARY
:
4788 case PROGRAM_OUTPUT
:
4789 return ureg_src(dst_register(t
, reg
->file
, reg
->index
, reg
->array_id
));
4791 case PROGRAM_UNIFORM
:
4792 assert(reg
->index
>= 0);
4793 return reg
->index
< t
->num_constants
?
4794 t
->constants
[reg
->index
] : ureg_imm4f(t
->ureg
, 0, 0, 0, 0);
4795 case PROGRAM_STATE_VAR
:
4796 case PROGRAM_CONSTANT
: /* ie, immediate */
4797 if (reg
->has_index2
)
4798 return ureg_src_register(TGSI_FILE_CONSTANT
, reg
->index
);
4800 return reg
->index
>= 0 && reg
->index
< t
->num_constants
?
4801 t
->constants
[reg
->index
] : ureg_imm4f(t
->ureg
, 0, 0, 0, 0);
4803 case PROGRAM_IMMEDIATE
:
4804 assert(reg
->index
>= 0 && reg
->index
< t
->num_immediates
);
4805 return t
->immediates
[reg
->index
];
4808 /* GLSL inputs are 64-bit containers, so we have to
4809 * map back to the original index and add the offset after
4811 index
-= double_reg2
;
4812 if (!reg
->array_id
) {
4813 assert(t
->inputMapping
[index
] < ARRAY_SIZE(t
->inputs
));
4814 assert(t
->inputs
[t
->inputMapping
[index
]].File
!= TGSI_FILE_NULL
);
4815 return t
->inputs
[t
->inputMapping
[index
]];
4818 struct array_decl
*decl
= &t
->input_arrays
[reg
->array_id
-1];
4819 unsigned mesa_index
= decl
->mesa_index
;
4820 int slot
= t
->inputMapping
[mesa_index
];
4822 assert(slot
!= -1 && t
->inputs
[slot
].File
== TGSI_FILE_INPUT
);
4823 assert(t
->inputs
[slot
].ArrayID
== reg
->array_id
);
4824 return ureg_src_array_offset(t
->inputs
[slot
], index
- mesa_index
);
4827 case PROGRAM_ADDRESS
:
4828 return ureg_src(t
->address
[reg
->index
]);
4830 case PROGRAM_SYSTEM_VALUE
:
4831 assert(reg
->index
< (int) ARRAY_SIZE(t
->systemValues
));
4832 return t
->systemValues
[reg
->index
];
4835 assert(!"unknown src register file");
4836 return ureg_src_undef();
4841 * Create a TGSI ureg_dst register from an st_dst_reg.
4843 static struct ureg_dst
4844 translate_dst(struct st_translate
*t
,
4845 const st_dst_reg
*dst_reg
,
4846 bool saturate
, bool clamp_color
)
4848 struct ureg_dst dst
= dst_register(t
, dst_reg
->file
, dst_reg
->index
,
4851 if (dst
.File
== TGSI_FILE_NULL
)
4854 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4857 dst
= ureg_saturate(dst
);
4858 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4859 /* Clamp colors for ARB_color_buffer_float. */
4860 switch (t
->procType
) {
4861 case TGSI_PROCESSOR_VERTEX
:
4862 /* This can only occur with a compatibility profile, which doesn't
4863 * support geometry shaders. */
4864 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4865 dst_reg
->index
== VARYING_SLOT_COL1
||
4866 dst_reg
->index
== VARYING_SLOT_BFC0
||
4867 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4868 dst
= ureg_saturate(dst
);
4872 case TGSI_PROCESSOR_FRAGMENT
:
4873 if (dst_reg
->index
== FRAG_RESULT_COLOR
||
4874 dst_reg
->index
>= FRAG_RESULT_DATA0
) {
4875 dst
= ureg_saturate(dst
);
4881 if (dst_reg
->reladdr
!= NULL
) {
4882 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4883 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4886 if (dst_reg
->has_index2
) {
4887 if (dst_reg
->reladdr2
)
4888 dst
= ureg_dst_dimension_indirect(dst
, ureg_src(t
->address
[1]),
4891 dst
= ureg_dst_dimension(dst
, dst_reg
->index2D
);
4898 * Create a TGSI ureg_src register from an st_src_reg.
4900 static struct ureg_src
4901 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4903 struct ureg_src src
= src_register(t
, src_reg
);
4905 if (src_reg
->has_index2
) {
4906 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4907 * and UBO constant buffers (buffer, position).
4909 if (src_reg
->reladdr2
)
4910 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4913 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4916 src
= ureg_swizzle(src
,
4917 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4918 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4919 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4920 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4922 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4923 src
= ureg_negate(src
);
4925 if (src_reg
->reladdr
!= NULL
) {
4926 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4927 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4933 static struct tgsi_texture_offset
4934 translate_tex_offset(struct st_translate
*t
,
4935 const st_src_reg
*in_offset
, int idx
)
4937 struct tgsi_texture_offset offset
;
4938 struct ureg_src imm_src
;
4939 struct ureg_dst dst
;
4942 switch (in_offset
->file
) {
4943 case PROGRAM_IMMEDIATE
:
4944 assert(in_offset
->index
>= 0 && in_offset
->index
< t
->num_immediates
);
4945 imm_src
= t
->immediates
[in_offset
->index
];
4947 offset
.File
= imm_src
.File
;
4948 offset
.Index
= imm_src
.Index
;
4949 offset
.SwizzleX
= imm_src
.SwizzleX
;
4950 offset
.SwizzleY
= imm_src
.SwizzleY
;
4951 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4954 case PROGRAM_TEMPORARY
:
4955 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4956 offset
.File
= imm_src
.File
;
4957 offset
.Index
= imm_src
.Index
;
4958 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4959 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4960 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4964 array
= in_offset
->index
>> 16;
4967 assert(array
< (int)t
->num_temp_arrays
);
4969 dst
= t
->arrays
[array
];
4970 offset
.File
= dst
.File
;
4971 offset
.Index
= dst
.Index
+ (in_offset
->index
& 0xFFFF) - 0x8000;
4972 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4973 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4974 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4984 compile_tgsi_instruction(struct st_translate
*t
,
4985 const glsl_to_tgsi_instruction
*inst
,
4986 bool clamp_dst_color_output
)
4988 struct ureg_program
*ureg
= t
->ureg
;
4990 struct ureg_dst dst
[2];
4991 struct ureg_src src
[4];
4992 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4996 unsigned tex_target
;
4998 num_dst
= num_inst_dst_regs(inst
->op
);
4999 num_src
= num_inst_src_regs(inst
->op
);
5001 for (i
= 0; i
< num_dst
; i
++)
5002 dst
[i
] = translate_dst(t
,
5005 clamp_dst_color_output
);
5007 for (i
= 0; i
< num_src
; i
++)
5008 src
[i
] = translate_src(t
, &inst
->src
[i
]);
5011 case TGSI_OPCODE_BGNLOOP
:
5012 case TGSI_OPCODE_CAL
:
5013 case TGSI_OPCODE_ELSE
:
5014 case TGSI_OPCODE_ENDLOOP
:
5015 case TGSI_OPCODE_IF
:
5016 case TGSI_OPCODE_UIF
:
5017 assert(num_dst
== 0);
5018 ureg_label_insn(ureg
,
5022 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
5025 case TGSI_OPCODE_TEX
:
5026 case TGSI_OPCODE_TXB
:
5027 case TGSI_OPCODE_TXD
:
5028 case TGSI_OPCODE_TXL
:
5029 case TGSI_OPCODE_TXP
:
5030 case TGSI_OPCODE_TXQ
:
5031 case TGSI_OPCODE_TXF
:
5032 case TGSI_OPCODE_TEX2
:
5033 case TGSI_OPCODE_TXB2
:
5034 case TGSI_OPCODE_TXL2
:
5035 case TGSI_OPCODE_TG4
:
5036 case TGSI_OPCODE_LODQ
:
5037 src
[num_src
] = t
->samplers
[inst
->sampler
.index
];
5038 assert(src
[num_src
].File
!= TGSI_FILE_NULL
);
5039 if (inst
->sampler
.reladdr
)
5041 ureg_src_indirect(src
[num_src
], ureg_src(t
->address
[2]));
5043 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
5044 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
5046 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
5052 texoffsets
, inst
->tex_offset_num_offset
,
5056 case TGSI_OPCODE_SCS
:
5057 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
5058 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
5071 * Emit the TGSI instructions for inverting and adjusting WPOS.
5072 * This code is unavoidable because it also depends on whether
5073 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
5076 emit_wpos_adjustment( struct st_translate
*t
,
5077 int wpos_transform_const
,
5079 GLfloat adjX
, GLfloat adjY
[2])
5081 struct ureg_program
*ureg
= t
->ureg
;
5083 assert(wpos_transform_const
>= 0);
5085 /* Fragment program uses fragment position input.
5086 * Need to replace instances of INPUT[WPOS] with temp T
5087 * where T = INPUT[WPOS] is inverted by Y.
5089 struct ureg_src wpostrans
= ureg_DECL_constant(ureg
, wpos_transform_const
);
5090 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
5091 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
5093 /* First, apply the coordinate shift: */
5094 if (adjX
|| adjY
[0] || adjY
[1]) {
5095 if (adjY
[0] != adjY
[1]) {
5096 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
5097 * depending on whether inversion is actually going to be applied
5098 * or not, which is determined by testing against the inversion
5099 * state variable used below, which will be either +1 or -1.
5101 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
5103 ureg_CMP(ureg
, adj_temp
,
5104 ureg_scalar(wpostrans
, invert
? 2 : 0),
5105 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
5106 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
5107 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
5109 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
5110 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
5112 wpos_input
= ureg_src(wpos_temp
);
5114 /* MOV wpos_temp, input[wpos]
5116 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
5119 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
5120 * inversion/identity, or the other way around if we're drawing to an FBO.
5123 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
5126 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
5128 ureg_scalar(wpostrans
, 0),
5129 ureg_scalar(wpostrans
, 1));
5131 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
5134 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
5136 ureg_scalar(wpostrans
, 2),
5137 ureg_scalar(wpostrans
, 3));
5140 /* Use wpos_temp as position input from here on:
5142 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
5147 * Emit fragment position/ooordinate code.
5150 emit_wpos(struct st_context
*st
,
5151 struct st_translate
*t
,
5152 const struct gl_program
*program
,
5153 struct ureg_program
*ureg
,
5154 int wpos_transform_const
)
5156 const struct gl_fragment_program
*fp
=
5157 (const struct gl_fragment_program
*) program
;
5158 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5159 GLfloat adjX
= 0.0f
;
5160 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
5161 boolean invert
= FALSE
;
5163 /* Query the pixel center conventions supported by the pipe driver and set
5164 * adjX, adjY to help out if it cannot handle the requested one internally.
5166 * The bias of the y-coordinate depends on whether y-inversion takes place
5167 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
5168 * drawing to an FBO (causes additional inversion), and whether the the pipe
5169 * driver origin and the requested origin differ (the latter condition is
5170 * stored in the 'invert' variable).
5172 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
5174 * center shift only:
5179 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
5180 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
5181 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
5182 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
5184 * inversion and center shift:
5185 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
5186 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
5187 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
5188 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
5190 if (fp
->OriginUpperLeft
) {
5191 /* Fragment shader wants origin in upper-left */
5192 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
5193 /* the driver supports upper-left origin */
5195 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
5196 /* the driver supports lower-left origin, need to invert Y */
5197 ureg_property(ureg
, TGSI_PROPERTY_FS_COORD_ORIGIN
,
5198 TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
5205 /* Fragment shader wants origin in lower-left */
5206 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
5207 /* the driver supports lower-left origin */
5208 ureg_property(ureg
, TGSI_PROPERTY_FS_COORD_ORIGIN
,
5209 TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
5210 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
5211 /* the driver supports upper-left origin, need to invert Y */
5217 if (fp
->PixelCenterInteger
) {
5218 /* Fragment shader wants pixel center integer */
5219 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
5220 /* the driver supports pixel center integer */
5222 ureg_property(ureg
, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
,
5223 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
5225 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
5226 /* the driver supports pixel center half integer, need to bias X,Y */
5235 /* Fragment shader wants pixel center half integer */
5236 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
5237 /* the driver supports pixel center half integer */
5239 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
5240 /* the driver supports pixel center integer, need to bias X,Y */
5241 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
5242 ureg_property(ureg
, TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
,
5243 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
5249 /* we invert after adjustment so that we avoid the MOV to temporary,
5250 * and reuse the adjustment ADD instead */
5251 emit_wpos_adjustment(t
, wpos_transform_const
, invert
, adjX
, adjY
);
5255 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
5256 * TGSI uses +1 for front, -1 for back.
5257 * This function converts the TGSI value to the GL value. Simply clamping/
5258 * saturating the value to [0,1] does the job.
5261 emit_face_var(struct gl_context
*ctx
, struct st_translate
*t
)
5263 struct ureg_program
*ureg
= t
->ureg
;
5264 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
5265 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
5267 if (ctx
->Const
.NativeIntegers
) {
5268 ureg_FSGE(ureg
, face_temp
, face_input
, ureg_imm1f(ureg
, 0));
5271 /* MOV_SAT face_temp, input[face] */
5272 ureg_MOV(ureg
, ureg_saturate(face_temp
), face_input
);
5275 /* Use face_temp as face input from here on: */
5276 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
5280 emit_edgeflags(struct st_translate
*t
)
5282 struct ureg_program
*ureg
= t
->ureg
;
5283 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
5284 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
5286 ureg_MOV(ureg
, edge_dst
, edge_src
);
5290 find_array(unsigned attr
, struct array_decl
*arrays
, unsigned count
,
5291 unsigned *array_id
, unsigned *array_size
)
5295 for (i
= 0; i
< count
; i
++) {
5296 struct array_decl
*decl
= &arrays
[i
];
5298 if (attr
== decl
->mesa_index
) {
5299 *array_id
= decl
->array_id
;
5300 *array_size
= decl
->array_size
;
5301 assert(*array_size
);
5309 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
5310 * \param program the program to translate
5311 * \param numInputs number of input registers used
5312 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
5314 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
5315 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
5317 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
5318 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
5319 * \param numOutputs number of output registers used
5320 * \param outputMapping maps Mesa fragment program outputs to TGSI
5322 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
5323 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
5326 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
5328 extern "C" enum pipe_error
5329 st_translate_program(
5330 struct gl_context
*ctx
,
5332 struct ureg_program
*ureg
,
5333 glsl_to_tgsi_visitor
*program
,
5334 const struct gl_program
*proginfo
,
5336 const GLuint inputMapping
[],
5337 const GLuint inputSlotToAttr
[],
5338 const ubyte inputSemanticName
[],
5339 const ubyte inputSemanticIndex
[],
5340 const GLuint interpMode
[],
5341 const GLuint interpLocation
[],
5343 const GLuint outputMapping
[],
5344 const GLuint outputSlotToAttr
[],
5345 const ubyte outputSemanticName
[],
5346 const ubyte outputSemanticIndex
[],
5347 boolean passthrough_edgeflags
,
5348 boolean clamp_color
)
5350 struct st_translate
*t
;
5352 enum pipe_error ret
= PIPE_OK
;
5354 assert(numInputs
<= ARRAY_SIZE(t
->inputs
));
5355 assert(numOutputs
<= ARRAY_SIZE(t
->outputs
));
5357 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_FRONT_FACE
] ==
5358 TGSI_SEMANTIC_FACE
);
5359 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_VERTEX_ID
] ==
5360 TGSI_SEMANTIC_VERTEXID
);
5361 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_INSTANCE_ID
] ==
5362 TGSI_SEMANTIC_INSTANCEID
);
5363 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_ID
] ==
5364 TGSI_SEMANTIC_SAMPLEID
);
5365 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_POS
] ==
5366 TGSI_SEMANTIC_SAMPLEPOS
);
5367 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_MASK_IN
] ==
5368 TGSI_SEMANTIC_SAMPLEMASK
);
5369 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_INVOCATION_ID
] ==
5370 TGSI_SEMANTIC_INVOCATIONID
);
5371 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
] ==
5372 TGSI_SEMANTIC_VERTEXID_NOBASE
);
5373 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_BASE_VERTEX
] ==
5374 TGSI_SEMANTIC_BASEVERTEX
);
5375 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_TESS_COORD
] ==
5376 TGSI_SEMANTIC_TESSCOORD
);
5378 t
= CALLOC_STRUCT(st_translate
);
5380 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5384 t
->procType
= procType
;
5385 t
->inputMapping
= inputMapping
;
5386 t
->outputMapping
= outputMapping
;
5388 t
->num_temp_arrays
= program
->next_array
;
5389 if (t
->num_temp_arrays
)
5390 t
->arrays
= (struct ureg_dst
*)
5391 calloc(1, sizeof(t
->arrays
[0]) * t
->num_temp_arrays
);
5394 * Declare input attributes.
5397 case TGSI_PROCESSOR_FRAGMENT
:
5398 for (i
= 0; i
< numInputs
; i
++) {
5399 unsigned array_id
= 0;
5400 unsigned array_size
;
5402 if (find_array(inputSlotToAttr
[i
], program
->input_arrays
,
5403 program
->num_input_arrays
, &array_id
, &array_size
)) {
5404 /* We've found an array. Declare it so. */
5405 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
5406 inputSemanticName
[i
], inputSemanticIndex
[i
],
5407 interpMode
[i
], 0, interpLocation
[i
],
5408 array_id
, array_size
);
5409 i
+= array_size
- 1;
5412 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
5413 inputSemanticName
[i
], inputSemanticIndex
[i
],
5414 interpMode
[i
], 0, interpLocation
[i
], 0, 1);
5418 case TGSI_PROCESSOR_GEOMETRY
:
5419 case TGSI_PROCESSOR_TESS_EVAL
:
5420 case TGSI_PROCESSOR_TESS_CTRL
:
5421 for (i
= 0; i
< numInputs
; i
++) {
5422 unsigned array_id
= 0;
5423 unsigned array_size
;
5425 if (find_array(inputSlotToAttr
[i
], program
->input_arrays
,
5426 program
->num_input_arrays
, &array_id
, &array_size
)) {
5427 /* We've found an array. Declare it so. */
5428 t
->inputs
[i
] = ureg_DECL_input(ureg
, inputSemanticName
[i
],
5429 inputSemanticIndex
[i
],
5430 array_id
, array_size
);
5431 i
+= array_size
- 1;
5434 t
->inputs
[i
] = ureg_DECL_input(ureg
, inputSemanticName
[i
],
5435 inputSemanticIndex
[i
], 0, 1);
5439 case TGSI_PROCESSOR_VERTEX
:
5440 for (i
= 0; i
< numInputs
; i
++) {
5441 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
5449 * Declare output attributes.
5452 case TGSI_PROCESSOR_FRAGMENT
:
5454 case TGSI_PROCESSOR_GEOMETRY
:
5455 case TGSI_PROCESSOR_TESS_EVAL
:
5456 case TGSI_PROCESSOR_TESS_CTRL
:
5457 case TGSI_PROCESSOR_VERTEX
:
5458 for (i
= 0; i
< numOutputs
; i
++) {
5459 unsigned array_id
= 0;
5460 unsigned array_size
;
5462 if (find_array(outputSlotToAttr
[i
], program
->output_arrays
,
5463 program
->num_output_arrays
, &array_id
, &array_size
)) {
5464 /* We've found an array. Declare it so. */
5465 t
->outputs
[i
] = ureg_DECL_output_array(ureg
,
5466 outputSemanticName
[i
],
5467 outputSemanticIndex
[i
],
5468 array_id
, array_size
);
5469 i
+= array_size
- 1;
5472 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5473 outputSemanticName
[i
],
5474 outputSemanticIndex
[i
]);
5482 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
5483 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
5484 /* Must do this after setting up t->inputs. */
5485 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
,
5486 program
->wpos_transform_const
);
5489 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
5490 emit_face_var(ctx
, t
);
5492 for (i
= 0; i
< numOutputs
; i
++) {
5493 switch (outputSemanticName
[i
]) {
5494 case TGSI_SEMANTIC_POSITION
:
5495 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5496 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
5497 outputSemanticIndex
[i
]);
5498 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
5500 case TGSI_SEMANTIC_STENCIL
:
5501 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5502 TGSI_SEMANTIC_STENCIL
, /* Stencil */
5503 outputSemanticIndex
[i
]);
5504 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
5506 case TGSI_SEMANTIC_COLOR
:
5507 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5508 TGSI_SEMANTIC_COLOR
,
5509 outputSemanticIndex
[i
]);
5511 case TGSI_SEMANTIC_SAMPLEMASK
:
5512 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5513 TGSI_SEMANTIC_SAMPLEMASK
,
5514 outputSemanticIndex
[i
]);
5515 /* TODO: If we ever support more than 32 samples, this will have
5516 * to become an array.
5518 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
5521 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
5522 ret
= PIPE_ERROR_BAD_INPUT
;
5527 else if (procType
== TGSI_PROCESSOR_VERTEX
) {
5528 for (i
= 0; i
< numOutputs
; i
++) {
5529 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
5530 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5532 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
5533 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
5534 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
5537 if (passthrough_edgeflags
)
5541 /* Declare address register.
5543 if (program
->num_address_regs
> 0) {
5544 assert(program
->num_address_regs
<= 3);
5545 for (int i
= 0; i
< program
->num_address_regs
; i
++)
5546 t
->address
[i
] = ureg_DECL_address(ureg
);
5549 /* Declare misc input registers
5552 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
5553 unsigned numSys
= 0;
5554 for (i
= 0; sysInputs
; i
++) {
5555 if (sysInputs
& (1 << i
)) {
5556 unsigned semName
= _mesa_sysval_to_semantic
[i
];
5557 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
5558 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
5559 semName
== TGSI_SEMANTIC_VERTEXID
) {
5560 /* From Gallium perspective, these system values are always
5561 * integer, and require native integer support. However, if
5562 * native integer is supported on the vertex stage but not the
5563 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5564 * assumes these system values are floats. To resolve the
5565 * inconsistency, we insert a U2F.
5567 struct st_context
*st
= st_context(ctx
);
5568 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5569 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5570 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
5572 if (!ctx
->Const
.NativeIntegers
) {
5573 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
5574 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
5575 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
5579 sysInputs
&= ~(1 << i
);
5584 t
->array_sizes
= program
->array_sizes
;
5585 t
->input_arrays
= program
->input_arrays
;
5586 t
->output_arrays
= program
->output_arrays
;
5588 /* Emit constants and uniforms. TGSI uses a single index space for these,
5589 * so we put all the translated regs in t->constants.
5591 if (proginfo
->Parameters
) {
5592 t
->constants
= (struct ureg_src
*)
5593 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
5594 if (t
->constants
== NULL
) {
5595 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5598 t
->num_constants
= proginfo
->Parameters
->NumParameters
;
5600 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
5601 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
5602 case PROGRAM_STATE_VAR
:
5603 case PROGRAM_UNIFORM
:
5604 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5607 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5608 * addressing of the const buffer.
5609 * FIXME: Be smarter and recognize param arrays:
5610 * indirect addressing is only valid within the referenced
5613 case PROGRAM_CONSTANT
:
5614 if (program
->indirect_addr_consts
)
5615 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5617 t
->constants
[i
] = emit_immediate(t
,
5618 proginfo
->Parameters
->ParameterValues
[i
],
5619 proginfo
->Parameters
->Parameters
[i
].DataType
,
5628 if (program
->shader
) {
5629 unsigned num_ubos
= program
->shader
->NumUniformBlocks
;
5631 for (i
= 0; i
< num_ubos
; i
++) {
5632 unsigned size
= program
->shader
->UniformBlocks
[i
].UniformBufferSize
;
5633 unsigned num_const_vecs
= (size
+ 15) / 16;
5634 unsigned first
, last
;
5635 assert(num_const_vecs
> 0);
5637 last
= num_const_vecs
> 0 ? num_const_vecs
- 1 : 0;
5638 ureg_DECL_constant2D(t
->ureg
, first
, last
, i
+ 1);
5642 /* Emit immediate values.
5644 t
->immediates
= (struct ureg_src
*)
5645 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5646 if (t
->immediates
== NULL
) {
5647 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5650 t
->num_immediates
= program
->num_immediates
;
5653 foreach_in_list(immediate_storage
, imm
, &program
->immediates
) {
5654 assert(i
< program
->num_immediates
);
5655 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size32
);
5657 assert(i
== program
->num_immediates
);
5659 /* texture samplers */
5660 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5661 if (program
->samplers_used
& (1 << i
)) {
5664 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5666 switch (program
->sampler_types
[i
]) {
5668 type
= TGSI_RETURN_TYPE_SINT
;
5670 case GLSL_TYPE_UINT
:
5671 type
= TGSI_RETURN_TYPE_UINT
;
5673 case GLSL_TYPE_FLOAT
:
5674 type
= TGSI_RETURN_TYPE_FLOAT
;
5677 unreachable("not reached");
5680 ureg_DECL_sampler_view( ureg
, i
, program
->sampler_targets
[i
],
5681 type
, type
, type
, type
);
5685 /* Emit each instruction in turn:
5687 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &program
->instructions
) {
5688 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5689 compile_tgsi_instruction(t
, inst
, clamp_color
);
5692 /* Fix up all emitted labels:
5694 for (i
= 0; i
< t
->labels_count
; i
++) {
5695 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5696 t
->insn
[t
->labels
[i
].branch_target
]);
5706 t
->num_constants
= 0;
5707 free(t
->immediates
);
5708 t
->num_immediates
= 0;
5711 debug_printf("%s: translate error flag set\n", __func__
);
5719 /* ----------------------------- End TGSI code ------------------------------ */
5723 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5724 * generating Mesa IR.
5726 static struct gl_program
*
5727 get_mesa_program(struct gl_context
*ctx
,
5728 struct gl_shader_program
*shader_program
,
5729 struct gl_shader
*shader
)
5731 glsl_to_tgsi_visitor
* v
;
5732 struct gl_program
*prog
;
5733 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5735 struct gl_shader_compiler_options
*options
=
5736 &ctx
->Const
.ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5737 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5738 unsigned ptarget
= st_shader_stage_to_ptarget(shader
->Stage
);
5740 validate_ir_tree(shader
->ir
);
5742 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5745 prog
->Parameters
= _mesa_new_parameter_list();
5746 v
= new glsl_to_tgsi_visitor();
5749 v
->shader_program
= shader_program
;
5751 v
->options
= options
;
5752 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5753 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5755 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5756 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5757 v
->have_fma
= pscreen
->get_shader_param(pscreen
, ptarget
,
5758 PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
);
5760 _mesa_copy_linked_program_data(shader
->Stage
, shader_program
, prog
);
5761 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5764 /* Remove reads from output registers. */
5765 lower_output_reads(shader
->Stage
, shader
->ir
);
5767 /* Emit intermediate IR for main(). */
5768 visit_exec_list(shader
->ir
, v
);
5770 /* Now emit bodies for any functions that were used. */
5772 progress
= GL_FALSE
;
5774 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
5775 if (!entry
->bgn_inst
) {
5776 v
->current_function
= entry
;
5778 entry
->bgn_inst
= v
->emit_asm(NULL
, TGSI_OPCODE_BGNSUB
);
5779 entry
->bgn_inst
->function
= entry
;
5781 visit_exec_list(&entry
->sig
->body
, v
);
5783 glsl_to_tgsi_instruction
*last
;
5784 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5785 if (last
->op
!= TGSI_OPCODE_RET
)
5786 v
->emit_asm(NULL
, TGSI_OPCODE_RET
);
5788 glsl_to_tgsi_instruction
*end
;
5789 end
= v
->emit_asm(NULL
, TGSI_OPCODE_ENDSUB
);
5790 end
->function
= entry
;
5798 /* Print out some information (for debugging purposes) used by the
5799 * optimization passes. */
5800 for (i
= 0; i
< v
->next_temp
; i
++) {
5801 int fr
= v
->get_first_temp_read(i
);
5802 int fw
= v
->get_first_temp_write(i
);
5803 int lr
= v
->get_last_temp_read(i
);
5804 int lw
= v
->get_last_temp_write(i
);
5806 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5811 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5814 if (shader
->Type
!= GL_TESS_CONTROL_SHADER
&&
5815 shader
->Type
!= GL_TESS_EVALUATION_SHADER
)
5816 v
->copy_propagate();
5818 while (v
->eliminate_dead_code());
5820 v
->merge_two_dsts();
5821 v
->merge_registers();
5822 v
->renumber_registers();
5824 /* Write the END instruction. */
5825 v
->emit_asm(NULL
, TGSI_OPCODE_END
);
5827 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5829 _mesa_log("GLSL IR for linked %s program %d:\n",
5830 _mesa_shader_stage_to_string(shader
->Stage
),
5831 shader_program
->Name
);
5832 _mesa_print_ir(_mesa_get_log_file(), shader
->ir
, NULL
);
5836 prog
->Instructions
= NULL
;
5837 prog
->NumInstructions
= 0;
5839 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5840 shrink_array_declarations(v
->input_arrays
, v
->num_input_arrays
,
5841 prog
->InputsRead
, prog
->PatchInputsRead
);
5842 shrink_array_declarations(v
->output_arrays
, v
->num_output_arrays
,
5843 prog
->OutputsWritten
, prog
->PatchOutputsWritten
);
5844 count_resources(v
, prog
);
5846 /* This must be done before the uniform storage is associated. */
5847 if (shader
->Type
== GL_FRAGMENT_SHADER
&&
5848 prog
->InputsRead
& VARYING_BIT_POS
){
5849 static const gl_state_index wposTransformState
[STATE_LENGTH
] = {
5850 STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
5853 v
->wpos_transform_const
= _mesa_add_state_reference(prog
->Parameters
,
5854 wposTransformState
);
5857 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5859 /* This has to be done last. Any operation the can cause
5860 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5861 * program constant) has to happen before creating this linkage.
5863 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5864 if (!shader_program
->LinkStatus
) {
5865 free_glsl_to_tgsi_visitor(v
);
5869 struct st_vertex_program
*stvp
;
5870 struct st_fragment_program
*stfp
;
5871 struct st_geometry_program
*stgp
;
5872 struct st_tessctrl_program
*sttcp
;
5873 struct st_tesseval_program
*sttep
;
5875 switch (shader
->Type
) {
5876 case GL_VERTEX_SHADER
:
5877 stvp
= (struct st_vertex_program
*)prog
;
5878 stvp
->glsl_to_tgsi
= v
;
5880 case GL_FRAGMENT_SHADER
:
5881 stfp
= (struct st_fragment_program
*)prog
;
5882 stfp
->glsl_to_tgsi
= v
;
5884 case GL_GEOMETRY_SHADER
:
5885 stgp
= (struct st_geometry_program
*)prog
;
5886 stgp
->glsl_to_tgsi
= v
;
5888 case GL_TESS_CONTROL_SHADER
:
5889 sttcp
= (struct st_tessctrl_program
*)prog
;
5890 sttcp
->glsl_to_tgsi
= v
;
5892 case GL_TESS_EVALUATION_SHADER
:
5893 sttep
= (struct st_tesseval_program
*)prog
;
5894 sttep
->glsl_to_tgsi
= v
;
5897 assert(!"should not be reached");
5907 st_dump_program_for_shader_db(struct gl_context
*ctx
,
5908 struct gl_shader_program
*prog
)
5910 /* Dump only successfully compiled and linked shaders to the specified
5911 * file. This is for shader-db.
5913 * These options allow some pre-processing of shaders while dumping,
5914 * because some apps have ill-formed shaders.
5916 const char *dump_filename
= os_get_option("ST_DUMP_SHADERS");
5917 const char *insert_directives
= os_get_option("ST_DUMP_INSERT");
5919 if (dump_filename
&& prog
->Name
!= 0) {
5920 FILE *f
= fopen(dump_filename
, "a");
5923 for (unsigned i
= 0; i
< prog
->NumShaders
; i
++) {
5924 const struct gl_shader
*sh
= prog
->Shaders
[i
];
5926 bool skip_version
= false;
5931 source
= sh
->Source
;
5933 /* This string mustn't be changed. shader-db uses it to find
5934 * where the shader begins.
5936 fprintf(f
, "GLSL %s shader %d source for linked program %d:\n",
5937 _mesa_shader_stage_to_string(sh
->Stage
),
5940 /* Dump the forced version if set. */
5941 if (ctx
->Const
.ForceGLSLVersion
) {
5942 fprintf(f
, "#version %i\n", ctx
->Const
.ForceGLSLVersion
);
5943 skip_version
= true;
5946 /* Insert directives (optional). */
5947 if (insert_directives
) {
5948 if (!ctx
->Const
.ForceGLSLVersion
&& prog
->Version
)
5949 fprintf(f
, "#version %i\n", prog
->Version
);
5950 fprintf(f
, "%s\n", insert_directives
);
5951 skip_version
= true;
5954 if (skip_version
&& strncmp(source
, "#version ", 9) == 0) {
5955 const char *next_line
= strstr(source
, "\n");
5958 source
= next_line
+ 1;
5963 fprintf(f
, "%s", source
);
5973 * Called via ctx->Driver.LinkShader()
5974 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5975 * with code lowering and other optimizations.
5978 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5980 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5981 assert(prog
->LinkStatus
);
5983 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5984 if (prog
->_LinkedShaders
[i
] == NULL
)
5988 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5989 gl_shader_stage stage
= _mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
);
5990 const struct gl_shader_compiler_options
*options
=
5991 &ctx
->Const
.ShaderCompilerOptions
[stage
];
5992 unsigned ptarget
= st_shader_stage_to_ptarget(stage
);
5993 bool have_dround
= pscreen
->get_shader_param(pscreen
, ptarget
,
5994 PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
);
5995 bool have_dfrexp
= pscreen
->get_shader_param(pscreen
, ptarget
,
5996 PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
);
5998 /* If there are forms of indirect addressing that the driver
5999 * cannot handle, perform the lowering pass.
6001 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
6002 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
6003 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
6004 options
->EmitNoIndirectInput
,
6005 options
->EmitNoIndirectOutput
,
6006 options
->EmitNoIndirectTemp
,
6007 options
->EmitNoIndirectUniform
);
6010 if (ctx
->Extensions
.ARB_shading_language_packing
) {
6011 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
6012 LOWER_UNPACK_SNORM_2x16
|
6013 LOWER_PACK_UNORM_2x16
|
6014 LOWER_UNPACK_UNORM_2x16
|
6015 LOWER_PACK_SNORM_4x8
|
6016 LOWER_UNPACK_SNORM_4x8
|
6017 LOWER_UNPACK_UNORM_4x8
|
6018 LOWER_PACK_UNORM_4x8
|
6019 LOWER_PACK_HALF_2x16
|
6020 LOWER_UNPACK_HALF_2x16
;
6022 lower_packing_builtins(ir
, lower_inst
);
6025 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TEXTURE_GATHER_OFFSETS
))
6026 lower_offset_arrays(ir
);
6027 do_mat_op_to_vec(ir
);
6028 lower_instructions(ir
,
6034 (have_dfrexp
? 0 : DFREXP_DLDEXP_TO_ARITH
) |
6037 (have_dround
? 0 : DOPS_TO_DFRAC
) |
6038 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
6039 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0) |
6040 (options
->EmitNoSat
? SAT_TO_CLAMP
: 0));
6042 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
6043 do_vec_index_to_cond_assign(ir
);
6044 lower_vector_insert(ir
, true);
6045 lower_quadop_vector(ir
, false);
6047 if (options
->MaxIfDepth
== 0) {
6054 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
6056 progress
= do_common_optimization(ir
, true, true, options
,
6057 ctx
->Const
.NativeIntegers
)
6060 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
6064 validate_ir_tree(ir
);
6067 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
6068 struct gl_program
*linked_prog
;
6070 if (prog
->_LinkedShaders
[i
] == NULL
)
6073 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
6076 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
6078 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
6079 _mesa_shader_stage_to_program(i
),
6081 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
6083 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
6088 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
6091 st_dump_program_for_shader_db(ctx
, prog
);
6096 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
6097 const GLuint outputMapping
[],
6098 struct pipe_stream_output_info
*so
)
6101 struct gl_transform_feedback_info
*info
=
6102 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
6104 for (i
= 0; i
< info
->NumOutputs
; i
++) {
6105 so
->output
[i
].register_index
=
6106 outputMapping
[info
->Outputs
[i
].OutputRegister
];
6107 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
6108 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
6109 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
6110 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
6111 so
->output
[i
].stream
= info
->Outputs
[i
].StreamId
;
6114 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
6115 so
->stride
[i
] = info
->BufferStride
[i
];
6117 so
->num_outputs
= info
->NumOutputs
;