2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
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19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
81 * Maximum number of temporary registers.
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
86 #define MAX_TEMPS 4096
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
94 static int swizzle_for_size(int size
);
97 * This struct is a corresponding struct to TGSI ureg_src.
101 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
105 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
106 this->swizzle
= swizzle_for_size(type
->vector_elements
);
108 this->swizzle
= SWIZZLE_XYZW
;
110 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
111 this->reladdr
= NULL
;
114 st_src_reg(gl_register_file file
, int index
, int type
)
119 this->swizzle
= SWIZZLE_XYZW
;
121 this->reladdr
= NULL
;
126 this->type
= GLSL_TYPE_ERROR
;
127 this->file
= PROGRAM_UNDEFINED
;
131 this->reladdr
= NULL
;
134 explicit st_src_reg(st_dst_reg reg
);
136 gl_register_file file
; /**< PROGRAM_* from Mesa */
137 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
138 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
139 int negate
; /**< NEGATE_XYZW mask from mesa */
140 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
141 /** Register index should be offset by the integer in this reg. */
147 st_dst_reg(gl_register_file file
, int writemask
, int type
)
151 this->writemask
= writemask
;
152 this->cond_mask
= COND_TR
;
153 this->reladdr
= NULL
;
159 this->type
= GLSL_TYPE_ERROR
;
160 this->file
= PROGRAM_UNDEFINED
;
163 this->cond_mask
= COND_TR
;
164 this->reladdr
= NULL
;
167 explicit st_dst_reg(st_src_reg reg
);
169 gl_register_file file
; /**< PROGRAM_* from Mesa */
170 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
171 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
173 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
174 /** Register index should be offset by the integer in this reg. */
178 st_src_reg::st_src_reg(st_dst_reg reg
)
180 this->type
= reg
.type
;
181 this->file
= reg
.file
;
182 this->index
= reg
.index
;
183 this->swizzle
= SWIZZLE_XYZW
;
185 this->reladdr
= reg
.reladdr
;
188 st_dst_reg::st_dst_reg(st_src_reg reg
)
190 this->type
= reg
.type
;
191 this->file
= reg
.file
;
192 this->index
= reg
.index
;
193 this->writemask
= WRITEMASK_XYZW
;
194 this->cond_mask
= COND_TR
;
195 this->reladdr
= reg
.reladdr
;
198 class glsl_to_tgsi_instruction
: public exec_node
{
200 /* Callers of this ralloc-based new need not call delete. It's
201 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
202 static void* operator new(size_t size
, void *ctx
)
206 node
= rzalloc_size(ctx
, size
);
207 assert(node
!= NULL
);
215 /** Pointer to the ir source this tree came from for debugging */
217 GLboolean cond_update
;
219 int sampler
; /**< sampler index */
220 int tex_target
; /**< One of TEXTURE_*_INDEX */
221 GLboolean tex_shadow
;
222 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
223 unsigned tex_offset_num_offset
;
224 int dead_mask
; /**< Used in dead code elimination */
226 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
229 class variable_storage
: public exec_node
{
231 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
232 : file(file
), index(index
), var(var
)
237 gl_register_file file
;
239 ir_variable
*var
; /* variable that maps to this, if any */
242 class immediate_storage
: public exec_node
{
244 immediate_storage(gl_constant_value
*values
, int size
, int type
)
246 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
251 gl_constant_value values
[4];
252 int size
; /**< Number of components (1-4) */
253 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
256 class function_entry
: public exec_node
{
258 ir_function_signature
*sig
;
261 * identifier of this function signature used by the program.
263 * At the point that TGSI instructions for function calls are
264 * generated, we don't know the address of the first instruction of
265 * the function body. So we make the BranchTarget that is called a
266 * small integer and rewrite them during set_branchtargets().
271 * Pointer to first instruction of the function body.
273 * Set during function body emits after main() is processed.
275 glsl_to_tgsi_instruction
*bgn_inst
;
278 * Index of the first instruction of the function body in actual TGSI.
280 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
284 /** Storage for the return value. */
285 st_src_reg return_reg
;
288 class glsl_to_tgsi_visitor
: public ir_visitor
{
290 glsl_to_tgsi_visitor();
291 ~glsl_to_tgsi_visitor();
293 function_entry
*current_function
;
295 struct gl_context
*ctx
;
296 struct gl_program
*prog
;
297 struct gl_shader_program
*shader_program
;
298 struct gl_shader_compiler_options
*options
;
302 int num_address_regs
;
304 bool indirect_addr_temps
;
305 bool indirect_addr_consts
;
308 bool native_integers
;
310 variable_storage
*find_variable_storage(ir_variable
*var
);
312 int add_constant(gl_register_file file
, gl_constant_value values
[4],
313 int size
, int datatype
, GLuint
*swizzle_out
);
315 function_entry
*get_function_signature(ir_function_signature
*sig
);
317 st_src_reg
get_temp(const glsl_type
*type
);
318 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
320 st_src_reg
st_src_reg_for_float(float val
);
321 st_src_reg
st_src_reg_for_int(int val
);
322 st_src_reg
st_src_reg_for_type(int type
, int val
);
325 * \name Visit methods
327 * As typical for the visitor pattern, there must be one \c visit method for
328 * each concrete subclass of \c ir_instruction. Virtual base classes within
329 * the hierarchy should not have \c visit methods.
332 virtual void visit(ir_variable
*);
333 virtual void visit(ir_loop
*);
334 virtual void visit(ir_loop_jump
*);
335 virtual void visit(ir_function_signature
*);
336 virtual void visit(ir_function
*);
337 virtual void visit(ir_expression
*);
338 virtual void visit(ir_swizzle
*);
339 virtual void visit(ir_dereference_variable
*);
340 virtual void visit(ir_dereference_array
*);
341 virtual void visit(ir_dereference_record
*);
342 virtual void visit(ir_assignment
*);
343 virtual void visit(ir_constant
*);
344 virtual void visit(ir_call
*);
345 virtual void visit(ir_return
*);
346 virtual void visit(ir_discard
*);
347 virtual void visit(ir_texture
*);
348 virtual void visit(ir_if
*);
353 /** List of variable_storage */
356 /** List of immediate_storage */
357 exec_list immediates
;
358 unsigned num_immediates
;
360 /** List of function_entry */
361 exec_list function_signatures
;
362 int next_signature_id
;
364 /** List of glsl_to_tgsi_instruction */
365 exec_list instructions
;
367 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
369 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
370 st_dst_reg dst
, st_src_reg src0
);
372 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
373 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
375 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
377 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
379 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
381 st_src_reg src0
, st_src_reg src1
);
384 * Emit the correct dot-product instruction for the type of arguments
386 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
392 void emit_scalar(ir_instruction
*ir
, unsigned op
,
393 st_dst_reg dst
, st_src_reg src0
);
395 void emit_scalar(ir_instruction
*ir
, unsigned op
,
396 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
398 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
400 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
402 void emit_scs(ir_instruction
*ir
, unsigned op
,
403 st_dst_reg dst
, const st_src_reg
&src
);
405 bool try_emit_mad(ir_expression
*ir
,
407 bool try_emit_mad_for_and_not(ir_expression
*ir
,
409 bool try_emit_sat(ir_expression
*ir
);
411 void emit_swz(ir_expression
*ir
);
413 bool process_move_condition(ir_rvalue
*ir
);
415 void simplify_cmp(void);
417 void rename_temp_register(int index
, int new_index
);
418 int get_first_temp_read(int index
);
419 int get_first_temp_write(int index
);
420 int get_last_temp_read(int index
);
421 int get_last_temp_write(int index
);
423 void copy_propagate(void);
424 void eliminate_dead_code(void);
425 int eliminate_dead_code_advanced(void);
426 void merge_registers(void);
427 void renumber_registers(void);
432 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
434 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
436 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
439 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
442 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
446 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
449 prog
->LinkStatus
= GL_FALSE
;
453 swizzle_for_size(int size
)
455 int size_swizzles
[4] = {
456 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
457 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
458 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
459 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
462 assert((size
>= 1) && (size
<= 4));
463 return size_swizzles
[size
- 1];
467 is_tex_instruction(unsigned opcode
)
469 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
474 num_inst_dst_regs(unsigned opcode
)
476 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
477 return info
->num_dst
;
481 num_inst_src_regs(unsigned opcode
)
483 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
484 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
487 glsl_to_tgsi_instruction
*
488 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
490 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
492 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
493 int num_reladdr
= 0, i
;
495 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
497 /* If we have to do relative addressing, we want to load the ARL
498 * reg directly for one of the regs, and preload the other reladdr
499 * sources into temps.
501 num_reladdr
+= dst
.reladdr
!= NULL
;
502 num_reladdr
+= src0
.reladdr
!= NULL
;
503 num_reladdr
+= src1
.reladdr
!= NULL
;
504 num_reladdr
+= src2
.reladdr
!= NULL
;
506 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
507 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
508 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
511 emit_arl(ir
, address_reg
, *dst
.reladdr
);
514 assert(num_reladdr
== 0);
524 inst
->function
= NULL
;
526 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
527 this->num_address_regs
= 1;
529 /* Update indirect addressing status used by TGSI */
532 case PROGRAM_TEMPORARY
:
533 this->indirect_addr_temps
= true;
535 case PROGRAM_LOCAL_PARAM
:
536 case PROGRAM_ENV_PARAM
:
537 case PROGRAM_STATE_VAR
:
538 case PROGRAM_CONSTANT
:
539 case PROGRAM_UNIFORM
:
540 this->indirect_addr_consts
= true;
542 case PROGRAM_IMMEDIATE
:
543 assert(!"immediates should not have indirect addressing");
550 for (i
=0; i
<3; i
++) {
551 if(inst
->src
[i
].reladdr
) {
552 switch(inst
->src
[i
].file
) {
553 case PROGRAM_TEMPORARY
:
554 this->indirect_addr_temps
= true;
556 case PROGRAM_LOCAL_PARAM
:
557 case PROGRAM_ENV_PARAM
:
558 case PROGRAM_STATE_VAR
:
559 case PROGRAM_CONSTANT
:
560 case PROGRAM_UNIFORM
:
561 this->indirect_addr_consts
= true;
563 case PROGRAM_IMMEDIATE
:
564 assert(!"immediates should not have indirect addressing");
573 this->instructions
.push_tail(inst
);
576 try_emit_float_set(ir
, op
, dst
);
582 glsl_to_tgsi_instruction
*
583 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
584 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
586 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
589 glsl_to_tgsi_instruction
*
590 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
591 st_dst_reg dst
, st_src_reg src0
)
593 assert(dst
.writemask
!= 0);
594 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
597 glsl_to_tgsi_instruction
*
598 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
600 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
604 * Emits the code to convert the result of float SET instructions to integers.
607 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
610 if ((op
== TGSI_OPCODE_SEQ
||
611 op
== TGSI_OPCODE_SNE
||
612 op
== TGSI_OPCODE_SGE
||
613 op
== TGSI_OPCODE_SLT
))
615 st_src_reg src
= st_src_reg(dst
);
616 src
.negate
= ~src
.negate
;
617 dst
.type
= GLSL_TYPE_FLOAT
;
618 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
623 * Determines whether to use an integer, unsigned integer, or float opcode
624 * based on the operands and input opcode, then emits the result.
627 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
629 st_src_reg src0
, st_src_reg src1
)
631 int type
= GLSL_TYPE_FLOAT
;
633 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
634 type
= GLSL_TYPE_FLOAT
;
635 else if (native_integers
)
636 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
638 #define case4(c, f, i, u) \
639 case TGSI_OPCODE_##c: \
640 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
641 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
642 else op = TGSI_OPCODE_##f; \
644 #define case3(f, i, u) case4(f, f, i, u)
645 #define case2fi(f, i) case4(f, f, i, i)
646 #define case2iu(i, u) case4(i, LAST, i, u)
652 case3(DIV
, IDIV
, UDIV
);
653 case3(MAX
, IMAX
, UMAX
);
654 case3(MIN
, IMIN
, UMIN
);
659 case3(SGE
, ISGE
, USGE
);
660 case3(SLT
, ISLT
, USLT
);
665 case3(ABS
, IABS
, IABS
);
670 assert(op
!= TGSI_OPCODE_LAST
);
674 glsl_to_tgsi_instruction
*
675 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
676 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
679 static const unsigned dot_opcodes
[] = {
680 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
683 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
687 * Emits TGSI scalar opcodes to produce unique answers across channels.
689 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
690 * channel determines the result across all channels. So to do a vec4
691 * of this operation, we want to emit a scalar per source channel used
692 * to produce dest channels.
695 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
697 st_src_reg orig_src0
, st_src_reg orig_src1
)
700 int done_mask
= ~dst
.writemask
;
702 /* TGSI RCP is a scalar operation splatting results to all channels,
703 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
706 for (i
= 0; i
< 4; i
++) {
707 GLuint this_mask
= (1 << i
);
708 glsl_to_tgsi_instruction
*inst
;
709 st_src_reg src0
= orig_src0
;
710 st_src_reg src1
= orig_src1
;
712 if (done_mask
& this_mask
)
715 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
716 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
717 for (j
= i
+ 1; j
< 4; j
++) {
718 /* If there is another enabled component in the destination that is
719 * derived from the same inputs, generate its value on this pass as
722 if (!(done_mask
& (1 << j
)) &&
723 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
724 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
725 this_mask
|= (1 << j
);
728 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
729 src0_swiz
, src0_swiz
);
730 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
731 src1_swiz
, src1_swiz
);
733 inst
= emit(ir
, op
, dst
, src0
, src1
);
734 inst
->dst
.writemask
= this_mask
;
735 done_mask
|= this_mask
;
740 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
741 st_dst_reg dst
, st_src_reg src0
)
743 st_src_reg undef
= undef_src
;
745 undef
.swizzle
= SWIZZLE_XXXX
;
747 emit_scalar(ir
, op
, dst
, src0
, undef
);
751 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
752 st_dst_reg dst
, st_src_reg src0
)
754 int op
= TGSI_OPCODE_ARL
;
756 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
757 op
= TGSI_OPCODE_UARL
;
759 emit(NULL
, op
, dst
, src0
);
763 * Emit an TGSI_OPCODE_SCS instruction
765 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
766 * Instead of splatting its result across all four components of the
767 * destination, it writes one value to the \c x component and another value to
768 * the \c y component.
770 * \param ir IR instruction being processed
771 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
772 * on which value is desired.
773 * \param dst Destination register
774 * \param src Source register
777 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
779 const st_src_reg
&src
)
781 /* Vertex programs cannot use the SCS opcode.
783 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
784 emit_scalar(ir
, op
, dst
, src
);
788 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
789 const unsigned scs_mask
= (1U << component
);
790 int done_mask
= ~dst
.writemask
;
793 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
795 /* If there are compnents in the destination that differ from the component
796 * that will be written by the SCS instrution, we'll need a temporary.
798 if (scs_mask
!= unsigned(dst
.writemask
)) {
799 tmp
= get_temp(glsl_type::vec4_type
);
802 for (unsigned i
= 0; i
< 4; i
++) {
803 unsigned this_mask
= (1U << i
);
804 st_src_reg src0
= src
;
806 if ((done_mask
& this_mask
) != 0)
809 /* The source swizzle specified which component of the source generates
810 * sine / cosine for the current component in the destination. The SCS
811 * instruction requires that this value be swizzle to the X component.
812 * Replace the current swizzle with a swizzle that puts the source in
815 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
817 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
818 src0_swiz
, src0_swiz
);
819 for (unsigned j
= i
+ 1; j
< 4; j
++) {
820 /* If there is another enabled component in the destination that is
821 * derived from the same inputs, generate its value on this pass as
824 if (!(done_mask
& (1 << j
)) &&
825 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
826 this_mask
|= (1 << j
);
830 if (this_mask
!= scs_mask
) {
831 glsl_to_tgsi_instruction
*inst
;
832 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
834 /* Emit the SCS instruction.
836 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
837 inst
->dst
.writemask
= scs_mask
;
839 /* Move the result of the SCS instruction to the desired location in
842 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
843 component
, component
);
844 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
845 inst
->dst
.writemask
= this_mask
;
847 /* Emit the SCS instruction to write directly to the destination.
849 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
850 inst
->dst
.writemask
= scs_mask
;
853 done_mask
|= this_mask
;
858 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
859 gl_constant_value values
[4], int size
, int datatype
,
862 if (file
== PROGRAM_CONSTANT
) {
863 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
864 size
, datatype
, swizzle_out
);
867 immediate_storage
*entry
;
868 assert(file
== PROGRAM_IMMEDIATE
);
870 /* Search immediate storage to see if we already have an identical
871 * immediate that we can use instead of adding a duplicate entry.
873 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
874 entry
= (immediate_storage
*)iter
.get();
876 if (entry
->size
== size
&&
877 entry
->type
== datatype
&&
878 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
884 /* Add this immediate to the list. */
885 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
886 this->immediates
.push_tail(entry
);
887 this->num_immediates
++;
893 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
895 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
896 union gl_constant_value uval
;
899 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
905 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
907 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
908 union gl_constant_value uval
;
910 assert(native_integers
);
913 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
919 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
922 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
923 st_src_reg_for_int(val
);
925 return st_src_reg_for_float(val
);
929 type_size(const struct glsl_type
*type
)
934 switch (type
->base_type
) {
937 case GLSL_TYPE_FLOAT
:
939 if (type
->is_matrix()) {
940 return type
->matrix_columns
;
942 /* Regardless of size of vector, it gets a vec4. This is bad
943 * packing for things like floats, but otherwise arrays become a
944 * mess. Hopefully a later pass over the code can pack scalars
945 * down if appropriate.
949 case GLSL_TYPE_ARRAY
:
950 assert(type
->length
> 0);
951 return type_size(type
->fields
.array
) * type
->length
;
952 case GLSL_TYPE_STRUCT
:
954 for (i
= 0; i
< type
->length
; i
++) {
955 size
+= type_size(type
->fields
.structure
[i
].type
);
958 case GLSL_TYPE_SAMPLER
:
959 /* Samplers take up one slot in UNIFORMS[], but they're baked in
970 * In the initial pass of codegen, we assign temporary numbers to
971 * intermediate results. (not SSA -- variable assignments will reuse
975 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
979 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
980 src
.file
= PROGRAM_TEMPORARY
;
981 src
.index
= next_temp
;
983 next_temp
+= type_size(type
);
985 if (type
->is_array() || type
->is_record()) {
986 src
.swizzle
= SWIZZLE_NOOP
;
988 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
996 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
999 variable_storage
*entry
;
1001 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1002 entry
= (variable_storage
*)iter
.get();
1004 if (entry
->var
== var
)
1012 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1014 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1015 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1017 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1018 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1021 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1023 const ir_state_slot
*const slots
= ir
->state_slots
;
1024 assert(ir
->state_slots
!= NULL
);
1026 /* Check if this statevar's setup in the STATE file exactly
1027 * matches how we'll want to reference it as a
1028 * struct/array/whatever. If not, then we need to move it into
1029 * temporary storage and hope that it'll get copy-propagated
1032 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1033 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1038 variable_storage
*storage
;
1040 if (i
== ir
->num_state_slots
) {
1041 /* We'll set the index later. */
1042 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1043 this->variables
.push_tail(storage
);
1047 /* The variable_storage constructor allocates slots based on the size
1048 * of the type. However, this had better match the number of state
1049 * elements that we're going to copy into the new temporary.
1051 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1053 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
1055 this->variables
.push_tail(storage
);
1056 this->next_temp
+= type_size(ir
->type
);
1058 dst
= st_dst_reg(st_src_reg(PROGRAM_TEMPORARY
, storage
->index
,
1059 native_integers
? ir
->type
->base_type
: GLSL_TYPE_FLOAT
));
1063 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1064 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1065 (gl_state_index
*)slots
[i
].tokens
);
1067 if (storage
->file
== PROGRAM_STATE_VAR
) {
1068 if (storage
->index
== -1) {
1069 storage
->index
= index
;
1071 assert(index
== storage
->index
+ (int)i
);
1074 st_src_reg
src(PROGRAM_STATE_VAR
, index
,
1075 native_integers
? ir
->type
->base_type
: GLSL_TYPE_FLOAT
);
1076 src
.swizzle
= slots
[i
].swizzle
;
1077 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1078 /* even a float takes up a whole vec4 reg in a struct/array. */
1083 if (storage
->file
== PROGRAM_TEMPORARY
&&
1084 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1085 fail_link(this->shader_program
,
1086 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1087 ir
->name
, dst
.index
- storage
->index
,
1088 type_size(ir
->type
));
1094 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1096 ir_dereference_variable
*counter
= NULL
;
1098 if (ir
->counter
!= NULL
)
1099 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1101 if (ir
->from
!= NULL
) {
1102 assert(ir
->counter
!= NULL
);
1104 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1110 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1114 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1116 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1118 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1120 if_stmt
->then_instructions
.push_tail(brk
);
1122 if_stmt
->accept(this);
1129 visit_exec_list(&ir
->body_instructions
, this);
1131 if (ir
->increment
) {
1133 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1134 counter
, ir
->increment
);
1136 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1143 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1147 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1150 case ir_loop_jump::jump_break
:
1151 emit(NULL
, TGSI_OPCODE_BRK
);
1153 case ir_loop_jump::jump_continue
:
1154 emit(NULL
, TGSI_OPCODE_CONT
);
1161 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1168 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1170 /* Ignore function bodies other than main() -- we shouldn't see calls to
1171 * them since they should all be inlined before we get to glsl_to_tgsi.
1173 if (strcmp(ir
->name
, "main") == 0) {
1174 const ir_function_signature
*sig
;
1177 sig
= ir
->matching_signature(&empty
);
1181 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1182 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1190 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1192 int nonmul_operand
= 1 - mul_operand
;
1194 st_dst_reg result_dst
;
1196 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1197 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1200 expr
->operands
[0]->accept(this);
1202 expr
->operands
[1]->accept(this);
1204 ir
->operands
[nonmul_operand
]->accept(this);
1207 this->result
= get_temp(ir
->type
);
1208 result_dst
= st_dst_reg(this->result
);
1209 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1210 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1216 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1218 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1219 * implemented using multiplication, and logical-or is implemented using
1220 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1221 * As result, the logical expression (a & !b) can be rewritten as:
1225 * - (a * 1) - (a * b)
1229 * This final expression can be implemented as a single MAD(a, -b, a)
1233 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1235 const int other_operand
= 1 - try_operand
;
1238 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1239 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1242 ir
->operands
[other_operand
]->accept(this);
1244 expr
->operands
[0]->accept(this);
1247 b
.negate
= ~b
.negate
;
1249 this->result
= get_temp(ir
->type
);
1250 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1256 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1258 /* Saturates were only introduced to vertex programs in
1259 * NV_vertex_program3, so don't give them to drivers in the VP.
1261 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
1264 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1268 sat_src
->accept(this);
1269 st_src_reg src
= this->result
;
1271 /* If we generated an expression instruction into a temporary in
1272 * processing the saturate's operand, apply the saturate to that
1273 * instruction. Otherwise, generate a MOV to do the saturate.
1275 * Note that we have to be careful to only do this optimization if
1276 * the instruction in question was what generated src->result. For
1277 * example, ir_dereference_array might generate a MUL instruction
1278 * to create the reladdr, and return us a src reg using that
1279 * reladdr. That MUL result is not the value we're trying to
1282 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1283 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1284 sat_src_expr
->operation
== ir_binop_add
||
1285 sat_src_expr
->operation
== ir_binop_dot
)) {
1286 glsl_to_tgsi_instruction
*new_inst
;
1287 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1288 new_inst
->saturate
= true;
1290 this->result
= get_temp(ir
->type
);
1291 st_dst_reg result_dst
= st_dst_reg(this->result
);
1292 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1293 glsl_to_tgsi_instruction
*inst
;
1294 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1295 inst
->saturate
= true;
1302 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1303 st_src_reg
*reg
, int *num_reladdr
)
1308 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1310 if (*num_reladdr
!= 1) {
1311 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1313 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1321 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1323 unsigned int operand
;
1324 st_src_reg op
[Elements(ir
->operands
)];
1325 st_src_reg result_src
;
1326 st_dst_reg result_dst
;
1328 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1330 if (ir
->operation
== ir_binop_add
) {
1331 if (try_emit_mad(ir
, 1))
1333 if (try_emit_mad(ir
, 0))
1337 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1339 if (ir
->operation
== ir_binop_logic_and
) {
1340 if (try_emit_mad_for_and_not(ir
, 1))
1342 if (try_emit_mad_for_and_not(ir
, 0))
1346 if (try_emit_sat(ir
))
1349 if (ir
->operation
== ir_quadop_vector
)
1350 assert(!"ir_quadop_vector should have been lowered");
1352 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1353 this->result
.file
= PROGRAM_UNDEFINED
;
1354 ir
->operands
[operand
]->accept(this);
1355 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1357 printf("Failed to get tree for expression operand:\n");
1358 ir
->operands
[operand
]->accept(&v
);
1361 op
[operand
] = this->result
;
1363 /* Matrix expression operands should have been broken down to vector
1364 * operations already.
1366 assert(!ir
->operands
[operand
]->type
->is_matrix());
1369 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1370 if (ir
->operands
[1]) {
1371 vector_elements
= MAX2(vector_elements
,
1372 ir
->operands
[1]->type
->vector_elements
);
1375 this->result
.file
= PROGRAM_UNDEFINED
;
1377 /* Storage for our result. Ideally for an assignment we'd be using
1378 * the actual storage for the result here, instead.
1380 result_src
= get_temp(ir
->type
);
1381 /* convenience for the emit functions below. */
1382 result_dst
= st_dst_reg(result_src
);
1383 /* Limit writes to the channels that will be used by result_src later.
1384 * This does limit this temp's use as a temporary for multi-instruction
1387 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1389 switch (ir
->operation
) {
1390 case ir_unop_logic_not
:
1391 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1392 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1394 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1395 * older GPUs implement SEQ using multiple instructions (i915 uses two
1396 * SGE instructions and a MUL instruction). Since our logic values are
1397 * 0.0 and 1.0, 1-x also implements !x.
1399 op
[0].negate
= ~op
[0].negate
;
1400 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1404 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1405 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1407 op
[0].negate
= ~op
[0].negate
;
1412 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1415 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1418 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1422 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1426 assert(!"not reached: should be handled by ir_explog_to_explog2");
1429 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1432 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1435 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1437 case ir_unop_sin_reduced
:
1438 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1440 case ir_unop_cos_reduced
:
1441 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1445 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1449 /* The X component contains 1 or -1 depending on whether the framebuffer
1450 * is a FBO or the window system buffer, respectively.
1451 * It is then multiplied with the source operand of DDY.
1453 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1454 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1456 unsigned transform_y_index
=
1457 _mesa_add_state_reference(this->prog
->Parameters
,
1460 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1462 glsl_type::vec4_type
);
1463 transform_y
.swizzle
= SWIZZLE_XXXX
;
1465 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1467 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1468 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1472 case ir_unop_noise
: {
1473 /* At some point, a motivated person could add a better
1474 * implementation of noise. Currently not even the nvidia
1475 * binary drivers do anything more than this. In any case, the
1476 * place to do this is in the GL state tracker, not the poor
1479 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1484 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1487 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1491 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1494 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1495 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1497 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1500 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1501 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1503 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1507 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1509 case ir_binop_greater
:
1510 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1512 case ir_binop_lequal
:
1513 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1515 case ir_binop_gequal
:
1516 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1518 case ir_binop_equal
:
1519 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1521 case ir_binop_nequal
:
1522 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1524 case ir_binop_all_equal
:
1525 /* "==" operator producing a scalar boolean. */
1526 if (ir
->operands
[0]->type
->is_vector() ||
1527 ir
->operands
[1]->type
->is_vector()) {
1528 st_src_reg temp
= get_temp(native_integers
?
1529 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1530 glsl_type::vec4_type
);
1532 if (native_integers
) {
1533 st_dst_reg temp_dst
= st_dst_reg(temp
);
1534 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1536 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1538 /* Emit 1-3 AND operations to combine the SEQ results. */
1539 switch (ir
->operands
[0]->type
->vector_elements
) {
1543 temp_dst
.writemask
= WRITEMASK_Y
;
1544 temp1
.swizzle
= SWIZZLE_YYYY
;
1545 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1546 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1549 temp_dst
.writemask
= WRITEMASK_X
;
1550 temp1
.swizzle
= SWIZZLE_XXXX
;
1551 temp2
.swizzle
= SWIZZLE_YYYY
;
1552 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1553 temp_dst
.writemask
= WRITEMASK_Y
;
1554 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1555 temp2
.swizzle
= SWIZZLE_WWWW
;
1556 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1559 temp1
.swizzle
= SWIZZLE_XXXX
;
1560 temp2
.swizzle
= SWIZZLE_YYYY
;
1561 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1563 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1565 /* After the dot-product, the value will be an integer on the
1566 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1568 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1570 /* Negating the result of the dot-product gives values on the range
1571 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1572 * This is achieved using SGE.
1574 st_src_reg sge_src
= result_src
;
1575 sge_src
.negate
= ~sge_src
.negate
;
1576 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1579 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1582 case ir_binop_any_nequal
:
1583 /* "!=" operator producing a scalar boolean. */
1584 if (ir
->operands
[0]->type
->is_vector() ||
1585 ir
->operands
[1]->type
->is_vector()) {
1586 st_src_reg temp
= get_temp(native_integers
?
1587 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1588 glsl_type::vec4_type
);
1589 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1591 if (native_integers
) {
1592 st_dst_reg temp_dst
= st_dst_reg(temp
);
1593 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1595 /* Emit 1-3 OR operations to combine the SNE results. */
1596 switch (ir
->operands
[0]->type
->vector_elements
) {
1600 temp_dst
.writemask
= WRITEMASK_Y
;
1601 temp1
.swizzle
= SWIZZLE_YYYY
;
1602 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1603 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1606 temp_dst
.writemask
= WRITEMASK_X
;
1607 temp1
.swizzle
= SWIZZLE_XXXX
;
1608 temp2
.swizzle
= SWIZZLE_YYYY
;
1609 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1610 temp_dst
.writemask
= WRITEMASK_Y
;
1611 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1612 temp2
.swizzle
= SWIZZLE_WWWW
;
1613 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1616 temp1
.swizzle
= SWIZZLE_XXXX
;
1617 temp2
.swizzle
= SWIZZLE_YYYY
;
1618 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1620 /* After the dot-product, the value will be an integer on the
1621 * range [0,4]. Zero stays zero, and positive values become 1.0.
1623 glsl_to_tgsi_instruction
*const dp
=
1624 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1625 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1626 /* The clamping to [0,1] can be done for free in the fragment
1627 * shader with a saturate.
1629 dp
->saturate
= true;
1631 /* Negating the result of the dot-product gives values on the range
1632 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1633 * achieved using SLT.
1635 st_src_reg slt_src
= result_src
;
1636 slt_src
.negate
= ~slt_src
.negate
;
1637 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1641 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1646 assert(ir
->operands
[0]->type
->is_vector());
1648 /* After the dot-product, the value will be an integer on the
1649 * range [0,4]. Zero stays zero, and positive values become 1.0.
1651 glsl_to_tgsi_instruction
*const dp
=
1652 emit_dp(ir
, result_dst
, op
[0], op
[0],
1653 ir
->operands
[0]->type
->vector_elements
);
1654 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1655 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1656 /* The clamping to [0,1] can be done for free in the fragment
1657 * shader with a saturate.
1659 dp
->saturate
= true;
1660 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1661 /* Negating the result of the dot-product gives values on the range
1662 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1663 * is achieved using SLT.
1665 st_src_reg slt_src
= result_src
;
1666 slt_src
.negate
= ~slt_src
.negate
;
1667 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1670 /* Use SNE 0 if integers are being used as boolean values. */
1671 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1676 case ir_binop_logic_xor
:
1677 if (native_integers
)
1678 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1680 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1683 case ir_binop_logic_or
: {
1684 if (native_integers
) {
1685 /* If integers are used as booleans, we can use an actual "or"
1688 assert(native_integers
);
1689 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1691 /* After the addition, the value will be an integer on the
1692 * range [0,2]. Zero stays zero, and positive values become 1.0.
1694 glsl_to_tgsi_instruction
*add
=
1695 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1696 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1697 /* The clamping to [0,1] can be done for free in the fragment
1698 * shader with a saturate if floats are being used as boolean values.
1700 add
->saturate
= true;
1702 /* Negating the result of the addition gives values on the range
1703 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1704 * is achieved using SLT.
1706 st_src_reg slt_src
= result_src
;
1707 slt_src
.negate
= ~slt_src
.negate
;
1708 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1714 case ir_binop_logic_and
:
1715 /* If native integers are disabled, the bool args are stored as float 0.0
1716 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1717 * actual AND opcode.
1719 if (native_integers
)
1720 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1722 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1726 assert(ir
->operands
[0]->type
->is_vector());
1727 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1728 emit_dp(ir
, result_dst
, op
[0], op
[1],
1729 ir
->operands
[0]->type
->vector_elements
);
1733 /* sqrt(x) = x * rsq(x). */
1734 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1735 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1736 /* For incoming channels <= 0, set the result to 0. */
1737 op
[0].negate
= ~op
[0].negate
;
1738 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1739 op
[0], result_src
, st_src_reg_for_float(0.0));
1742 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1745 if (native_integers
) {
1746 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1749 /* fallthrough to next case otherwise */
1751 if (native_integers
) {
1752 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1755 /* fallthrough to next case otherwise */
1758 /* Converting between signed and unsigned integers is a no-op. */
1762 if (native_integers
) {
1763 /* Booleans are stored as integers using ~0 for true and 0 for false.
1764 * GLSL requires that int(bool) return 1 for true and 0 for false.
1765 * This conversion is done with AND, but it could be done with NEG.
1767 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1769 /* Booleans and integers are both stored as floats when native
1770 * integers are disabled.
1776 if (native_integers
)
1777 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1779 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1782 if (native_integers
)
1783 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1785 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1787 case ir_unop_bitcast_f2i
:
1788 case ir_unop_bitcast_f2u
:
1789 case ir_unop_bitcast_i2f
:
1790 case ir_unop_bitcast_u2f
:
1794 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1797 if (native_integers
)
1798 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1800 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1803 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1806 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1809 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1811 case ir_unop_round_even
:
1812 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1815 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1819 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1822 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1825 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1828 case ir_unop_bit_not
:
1829 if (native_integers
) {
1830 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1834 if (native_integers
) {
1835 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1838 case ir_binop_lshift
:
1839 if (native_integers
) {
1840 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1843 case ir_binop_rshift
:
1844 if (native_integers
) {
1845 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1848 case ir_binop_bit_and
:
1849 if (native_integers
) {
1850 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1853 case ir_binop_bit_xor
:
1854 if (native_integers
) {
1855 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1858 case ir_binop_bit_or
:
1859 if (native_integers
) {
1860 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1864 assert(!"GLSL 1.30 features unsupported");
1867 case ir_binop_ubo_load
:
1868 assert(!"not yet supported");
1871 case ir_quadop_vector
:
1872 /* This operation should have already been handled.
1874 assert(!"Should not get here.");
1878 this->result
= result_src
;
1883 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1889 /* Note that this is only swizzles in expressions, not those on the left
1890 * hand side of an assignment, which do write masking. See ir_assignment
1894 ir
->val
->accept(this);
1896 assert(src
.file
!= PROGRAM_UNDEFINED
);
1898 for (i
= 0; i
< 4; i
++) {
1899 if (i
< ir
->type
->vector_elements
) {
1902 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1905 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1908 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1911 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1915 /* If the type is smaller than a vec4, replicate the last
1918 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1922 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1928 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
1930 variable_storage
*entry
= find_variable_storage(ir
->var
);
1931 ir_variable
*var
= ir
->var
;
1934 switch (var
->mode
) {
1935 case ir_var_uniform
:
1936 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1938 this->variables
.push_tail(entry
);
1942 /* The linker assigns locations for varyings and attributes,
1943 * including deprecated builtins (like gl_Color), user-assign
1944 * generic attributes (glBindVertexLocation), and
1945 * user-defined varyings.
1947 * FINISHME: We would hit this path for function arguments. Fix!
1949 assert(var
->location
!= -1);
1950 entry
= new(mem_ctx
) variable_storage(var
,
1955 assert(var
->location
!= -1);
1956 entry
= new(mem_ctx
) variable_storage(var
,
1958 var
->location
+ var
->index
);
1960 case ir_var_system_value
:
1961 entry
= new(mem_ctx
) variable_storage(var
,
1962 PROGRAM_SYSTEM_VALUE
,
1966 case ir_var_temporary
:
1967 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1969 this->variables
.push_tail(entry
);
1971 next_temp
+= type_size(var
->type
);
1976 printf("Failed to make storage for %s\n", var
->name
);
1981 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
1982 if (!native_integers
)
1983 this->result
.type
= GLSL_TYPE_FLOAT
;
1987 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
1991 int element_size
= type_size(ir
->type
);
1993 index
= ir
->array_index
->constant_expression_value();
1995 ir
->array
->accept(this);
1999 src
.index
+= index
->value
.i
[0] * element_size
;
2001 /* Variable index array dereference. It eats the "vec4" of the
2002 * base of the array and an index that offsets the TGSI register
2005 ir
->array_index
->accept(this);
2007 st_src_reg index_reg
;
2009 if (element_size
== 1) {
2010 index_reg
= this->result
;
2012 index_reg
= get_temp(native_integers
?
2013 glsl_type::int_type
: glsl_type::float_type
);
2015 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2016 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2019 /* If there was already a relative address register involved, add the
2020 * new and the old together to get the new offset.
2022 if (src
.reladdr
!= NULL
) {
2023 st_src_reg accum_reg
= get_temp(native_integers
?
2024 glsl_type::int_type
: glsl_type::float_type
);
2026 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2027 index_reg
, *src
.reladdr
);
2029 index_reg
= accum_reg
;
2032 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2033 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2036 /* If the type is smaller than a vec4, replicate the last channel out. */
2037 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2038 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2040 src
.swizzle
= SWIZZLE_NOOP
;
2046 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2049 const glsl_type
*struct_type
= ir
->record
->type
;
2052 ir
->record
->accept(this);
2054 for (i
= 0; i
< struct_type
->length
; i
++) {
2055 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2057 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2060 /* If the type is smaller than a vec4, replicate the last channel out. */
2061 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2062 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2064 this->result
.swizzle
= SWIZZLE_NOOP
;
2066 this->result
.index
+= offset
;
2070 * We want to be careful in assignment setup to hit the actual storage
2071 * instead of potentially using a temporary like we might with the
2072 * ir_dereference handler.
2075 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2077 /* The LHS must be a dereference. If the LHS is a variable indexed array
2078 * access of a vector, it must be separated into a series conditional moves
2079 * before reaching this point (see ir_vec_index_to_cond_assign).
2081 assert(ir
->as_dereference());
2082 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2084 assert(!deref_array
->array
->type
->is_vector());
2087 /* Use the rvalue deref handler for the most part. We'll ignore
2088 * swizzles in it and write swizzles using writemask, though.
2091 return st_dst_reg(v
->result
);
2095 * Process the condition of a conditional assignment
2097 * Examines the condition of a conditional assignment to generate the optimal
2098 * first operand of a \c CMP instruction. If the condition is a relational
2099 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2100 * used as the source for the \c CMP instruction. Otherwise the comparison
2101 * is processed to a boolean result, and the boolean result is used as the
2102 * operand to the CMP instruction.
2105 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2107 ir_rvalue
*src_ir
= ir
;
2109 bool switch_order
= false;
2111 ir_expression
*const expr
= ir
->as_expression();
2112 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2113 bool zero_on_left
= false;
2115 if (expr
->operands
[0]->is_zero()) {
2116 src_ir
= expr
->operands
[1];
2117 zero_on_left
= true;
2118 } else if (expr
->operands
[1]->is_zero()) {
2119 src_ir
= expr
->operands
[0];
2120 zero_on_left
= false;
2124 * (a < 0) T F F ( a < 0) T F F
2125 * (0 < a) F F T (-a < 0) F F T
2126 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2127 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2128 * (a > 0) F F T (-a < 0) F F T
2129 * (0 > a) T F F ( a < 0) T F F
2130 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2131 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2133 * Note that exchanging the order of 0 and 'a' in the comparison simply
2134 * means that the value of 'a' should be negated.
2137 switch (expr
->operation
) {
2139 switch_order
= false;
2140 negate
= zero_on_left
;
2143 case ir_binop_greater
:
2144 switch_order
= false;
2145 negate
= !zero_on_left
;
2148 case ir_binop_lequal
:
2149 switch_order
= true;
2150 negate
= !zero_on_left
;
2153 case ir_binop_gequal
:
2154 switch_order
= true;
2155 negate
= zero_on_left
;
2159 /* This isn't the right kind of comparison afterall, so make sure
2160 * the whole condition is visited.
2168 src_ir
->accept(this);
2170 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2171 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2172 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2173 * computing the condition.
2176 this->result
.negate
= ~this->result
.negate
;
2178 return switch_order
;
2182 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2188 ir
->rhs
->accept(this);
2191 l
= get_assignment_lhs(ir
->lhs
, this);
2193 /* FINISHME: This should really set to the correct maximal writemask for each
2194 * FINISHME: component written (in the loops below). This case can only
2195 * FINISHME: occur for matrices, arrays, and structures.
2197 if (ir
->write_mask
== 0) {
2198 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2199 l
.writemask
= WRITEMASK_XYZW
;
2200 } else if (ir
->lhs
->type
->is_scalar() &&
2201 ir
->lhs
->variable_referenced()->mode
== ir_var_out
) {
2202 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2203 * FINISHME: W component of fragment shader output zero, work correctly.
2205 l
.writemask
= WRITEMASK_XYZW
;
2208 int first_enabled_chan
= 0;
2211 l
.writemask
= ir
->write_mask
;
2213 for (int i
= 0; i
< 4; i
++) {
2214 if (l
.writemask
& (1 << i
)) {
2215 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2220 /* Swizzle a small RHS vector into the channels being written.
2222 * glsl ir treats write_mask as dictating how many channels are
2223 * present on the RHS while TGSI treats write_mask as just
2224 * showing which channels of the vec4 RHS get written.
2226 for (int i
= 0; i
< 4; i
++) {
2227 if (l
.writemask
& (1 << i
))
2228 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2230 swizzles
[i
] = first_enabled_chan
;
2232 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2233 swizzles
[2], swizzles
[3]);
2236 assert(l
.file
!= PROGRAM_UNDEFINED
);
2237 assert(r
.file
!= PROGRAM_UNDEFINED
);
2239 if (ir
->condition
) {
2240 const bool switch_order
= this->process_move_condition(ir
->condition
);
2241 st_src_reg condition
= this->result
;
2243 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2244 st_src_reg l_src
= st_src_reg(l
);
2245 st_src_reg condition_temp
= condition
;
2246 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2248 if (native_integers
) {
2249 /* This is necessary because TGSI's CMP instruction expects the
2250 * condition to be a float, and we store booleans as integers.
2251 * If TGSI had a UCMP instruction or similar, this extra
2252 * instruction would not be necessary.
2254 condition_temp
= get_temp(glsl_type::vec4_type
);
2255 condition
.negate
= 0;
2256 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2257 condition_temp
.swizzle
= condition
.swizzle
;
2261 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2263 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2269 } else if (ir
->rhs
->as_expression() &&
2270 this->instructions
.get_tail() &&
2271 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2272 type_size(ir
->lhs
->type
) == 1 &&
2273 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2274 /* To avoid emitting an extra MOV when assigning an expression to a
2275 * variable, emit the last instruction of the expression again, but
2276 * replace the destination register with the target of the assignment.
2277 * Dead code elimination will remove the original instruction.
2279 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2280 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2281 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2282 new_inst
->saturate
= inst
->saturate
;
2283 inst
->dead_mask
= inst
->dst
.writemask
;
2285 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2286 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2295 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2298 GLfloat stack_vals
[4] = { 0 };
2299 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2300 GLenum gl_type
= GL_NONE
;
2302 static int in_array
= 0;
2303 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2305 /* Unfortunately, 4 floats is all we can get into
2306 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2307 * aggregate constant and move each constant value into it. If we
2308 * get lucky, copy propagation will eliminate the extra moves.
2310 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2311 st_src_reg temp_base
= get_temp(ir
->type
);
2312 st_dst_reg temp
= st_dst_reg(temp_base
);
2314 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2315 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2316 int size
= type_size(field_value
->type
);
2320 field_value
->accept(this);
2323 for (i
= 0; i
< (unsigned int)size
; i
++) {
2324 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2330 this->result
= temp_base
;
2334 if (ir
->type
->is_array()) {
2335 st_src_reg temp_base
= get_temp(ir
->type
);
2336 st_dst_reg temp
= st_dst_reg(temp_base
);
2337 int size
= type_size(ir
->type
->fields
.array
);
2342 for (i
= 0; i
< ir
->type
->length
; i
++) {
2343 ir
->array_elements
[i
]->accept(this);
2345 for (int j
= 0; j
< size
; j
++) {
2346 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2352 this->result
= temp_base
;
2357 if (ir
->type
->is_matrix()) {
2358 st_src_reg mat
= get_temp(ir
->type
);
2359 st_dst_reg mat_column
= st_dst_reg(mat
);
2361 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2362 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2363 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2365 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2366 src
.index
= add_constant(file
,
2368 ir
->type
->vector_elements
,
2371 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2380 switch (ir
->type
->base_type
) {
2381 case GLSL_TYPE_FLOAT
:
2383 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2384 values
[i
].f
= ir
->value
.f
[i
];
2387 case GLSL_TYPE_UINT
:
2388 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2389 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2390 if (native_integers
)
2391 values
[i
].u
= ir
->value
.u
[i
];
2393 values
[i
].f
= ir
->value
.u
[i
];
2397 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2398 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2399 if (native_integers
)
2400 values
[i
].i
= ir
->value
.i
[i
];
2402 values
[i
].f
= ir
->value
.i
[i
];
2405 case GLSL_TYPE_BOOL
:
2406 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2407 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2408 if (native_integers
)
2409 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2411 values
[i
].f
= ir
->value
.b
[i
];
2415 assert(!"Non-float/uint/int/bool constant");
2418 this->result
= st_src_reg(file
, -1, ir
->type
);
2419 this->result
.index
= add_constant(file
,
2421 ir
->type
->vector_elements
,
2423 &this->result
.swizzle
);
2427 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2429 function_entry
*entry
;
2431 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2432 entry
= (function_entry
*)iter
.get();
2434 if (entry
->sig
== sig
)
2438 entry
= ralloc(mem_ctx
, function_entry
);
2440 entry
->sig_id
= this->next_signature_id
++;
2441 entry
->bgn_inst
= NULL
;
2443 /* Allocate storage for all the parameters. */
2444 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2445 ir_variable
*param
= (ir_variable
*)iter
.get();
2446 variable_storage
*storage
;
2448 storage
= find_variable_storage(param
);
2451 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
2453 this->variables
.push_tail(storage
);
2455 this->next_temp
+= type_size(param
->type
);
2458 if (!sig
->return_type
->is_void()) {
2459 entry
->return_reg
= get_temp(sig
->return_type
);
2461 entry
->return_reg
= undef_src
;
2464 this->function_signatures
.push_tail(entry
);
2469 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2471 glsl_to_tgsi_instruction
*call_inst
;
2472 ir_function_signature
*sig
= ir
->callee
;
2473 function_entry
*entry
= get_function_signature(sig
);
2476 /* Process in parameters. */
2477 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2478 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2479 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2480 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2482 if (param
->mode
== ir_var_in
||
2483 param
->mode
== ir_var_inout
) {
2484 variable_storage
*storage
= find_variable_storage(param
);
2487 param_rval
->accept(this);
2488 st_src_reg r
= this->result
;
2491 l
.file
= storage
->file
;
2492 l
.index
= storage
->index
;
2494 l
.writemask
= WRITEMASK_XYZW
;
2495 l
.cond_mask
= COND_TR
;
2497 for (i
= 0; i
< type_size(param
->type
); i
++) {
2498 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2506 assert(!sig_iter
.has_next());
2508 /* Emit call instruction */
2509 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2510 call_inst
->function
= entry
;
2512 /* Process out parameters. */
2513 sig_iter
= sig
->parameters
.iterator();
2514 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2515 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2516 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2518 if (param
->mode
== ir_var_out
||
2519 param
->mode
== ir_var_inout
) {
2520 variable_storage
*storage
= find_variable_storage(param
);
2524 r
.file
= storage
->file
;
2525 r
.index
= storage
->index
;
2527 r
.swizzle
= SWIZZLE_NOOP
;
2530 param_rval
->accept(this);
2531 st_dst_reg l
= st_dst_reg(this->result
);
2533 for (i
= 0; i
< type_size(param
->type
); i
++) {
2534 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2542 assert(!sig_iter
.has_next());
2544 /* Process return value. */
2545 this->result
= entry
->return_reg
;
2549 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2551 st_src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
, offset
;
2552 st_dst_reg result_dst
, coord_dst
;
2553 glsl_to_tgsi_instruction
*inst
= NULL
;
2554 unsigned opcode
= TGSI_OPCODE_NOP
;
2556 if (ir
->coordinate
) {
2557 ir
->coordinate
->accept(this);
2559 /* Put our coords in a temp. We'll need to modify them for shadow,
2560 * projection, or LOD, so the only case we'd use it as is is if
2561 * we're doing plain old texturing. The optimization passes on
2562 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2564 coord
= get_temp(glsl_type::vec4_type
);
2565 coord_dst
= st_dst_reg(coord
);
2566 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2569 if (ir
->projector
) {
2570 ir
->projector
->accept(this);
2571 projector
= this->result
;
2574 /* Storage for our result. Ideally for an assignment we'd be using
2575 * the actual storage for the result here, instead.
2577 result_src
= get_temp(glsl_type::vec4_type
);
2578 result_dst
= st_dst_reg(result_src
);
2582 opcode
= TGSI_OPCODE_TEX
;
2585 opcode
= TGSI_OPCODE_TXB
;
2586 ir
->lod_info
.bias
->accept(this);
2587 lod_info
= this->result
;
2590 opcode
= TGSI_OPCODE_TXL
;
2591 ir
->lod_info
.lod
->accept(this);
2592 lod_info
= this->result
;
2595 opcode
= TGSI_OPCODE_TXD
;
2596 ir
->lod_info
.grad
.dPdx
->accept(this);
2598 ir
->lod_info
.grad
.dPdy
->accept(this);
2602 opcode
= TGSI_OPCODE_TXQ
;
2603 ir
->lod_info
.lod
->accept(this);
2604 lod_info
= this->result
;
2607 opcode
= TGSI_OPCODE_TXF
;
2608 ir
->lod_info
.lod
->accept(this);
2609 lod_info
= this->result
;
2611 ir
->offset
->accept(this);
2612 offset
= this->result
;
2617 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2619 if (ir
->projector
) {
2620 if (opcode
== TGSI_OPCODE_TEX
) {
2621 /* Slot the projector in as the last component of the coord. */
2622 coord_dst
.writemask
= WRITEMASK_W
;
2623 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2624 coord_dst
.writemask
= WRITEMASK_XYZW
;
2625 opcode
= TGSI_OPCODE_TXP
;
2627 st_src_reg coord_w
= coord
;
2628 coord_w
.swizzle
= SWIZZLE_WWWW
;
2630 /* For the other TEX opcodes there's no projective version
2631 * since the last slot is taken up by LOD info. Do the
2632 * projective divide now.
2634 coord_dst
.writemask
= WRITEMASK_W
;
2635 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2637 /* In the case where we have to project the coordinates "by hand,"
2638 * the shadow comparator value must also be projected.
2640 st_src_reg tmp_src
= coord
;
2641 if (ir
->shadow_comparitor
) {
2642 /* Slot the shadow value in as the second to last component of the
2645 ir
->shadow_comparitor
->accept(this);
2647 tmp_src
= get_temp(glsl_type::vec4_type
);
2648 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2650 /* Projective division not allowed for array samplers. */
2651 assert(!sampler_type
->sampler_array
);
2653 tmp_dst
.writemask
= WRITEMASK_Z
;
2654 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2656 tmp_dst
.writemask
= WRITEMASK_XY
;
2657 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2660 coord_dst
.writemask
= WRITEMASK_XYZ
;
2661 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2663 coord_dst
.writemask
= WRITEMASK_XYZW
;
2664 coord
.swizzle
= SWIZZLE_XYZW
;
2668 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2669 * comparator was put in the correct place (and projected) by the code,
2670 * above, that handles by-hand projection.
2672 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2673 /* Slot the shadow value in as the second to last component of the
2676 ir
->shadow_comparitor
->accept(this);
2678 /* XXX This will need to be updated for cubemap array samplers. */
2679 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2680 sampler_type
->sampler_array
) ||
2681 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2682 coord_dst
.writemask
= WRITEMASK_W
;
2684 coord_dst
.writemask
= WRITEMASK_Z
;
2687 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2688 coord_dst
.writemask
= WRITEMASK_XYZW
;
2691 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2692 opcode
== TGSI_OPCODE_TXF
) {
2693 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2694 coord_dst
.writemask
= WRITEMASK_W
;
2695 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2696 coord_dst
.writemask
= WRITEMASK_XYZW
;
2699 if (opcode
== TGSI_OPCODE_TXD
)
2700 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2701 else if (opcode
== TGSI_OPCODE_TXQ
)
2702 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2703 else if (opcode
== TGSI_OPCODE_TXF
) {
2704 inst
= emit(ir
, opcode
, result_dst
, coord
);
2706 inst
= emit(ir
, opcode
, result_dst
, coord
);
2708 if (ir
->shadow_comparitor
)
2709 inst
->tex_shadow
= GL_TRUE
;
2711 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2712 this->shader_program
,
2716 inst
->tex_offset_num_offset
= 1;
2717 inst
->tex_offsets
[0].Index
= offset
.index
;
2718 inst
->tex_offsets
[0].File
= offset
.file
;
2719 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2720 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2721 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2724 switch (sampler_type
->sampler_dimensionality
) {
2725 case GLSL_SAMPLER_DIM_1D
:
2726 inst
->tex_target
= (sampler_type
->sampler_array
)
2727 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2729 case GLSL_SAMPLER_DIM_2D
:
2730 inst
->tex_target
= (sampler_type
->sampler_array
)
2731 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2733 case GLSL_SAMPLER_DIM_3D
:
2734 inst
->tex_target
= TEXTURE_3D_INDEX
;
2736 case GLSL_SAMPLER_DIM_CUBE
:
2737 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2739 case GLSL_SAMPLER_DIM_RECT
:
2740 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2742 case GLSL_SAMPLER_DIM_BUF
:
2743 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2745 case GLSL_SAMPLER_DIM_EXTERNAL
:
2746 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2749 assert(!"Should not get here.");
2752 this->result
= result_src
;
2756 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2758 if (ir
->get_value()) {
2762 assert(current_function
);
2764 ir
->get_value()->accept(this);
2765 st_src_reg r
= this->result
;
2767 l
= st_dst_reg(current_function
->return_reg
);
2769 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2770 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2776 emit(ir
, TGSI_OPCODE_RET
);
2780 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2782 if (ir
->condition
) {
2783 ir
->condition
->accept(this);
2784 this->result
.negate
= ~this->result
.negate
;
2785 emit(ir
, TGSI_OPCODE_KIL
, undef_dst
, this->result
);
2787 emit(ir
, TGSI_OPCODE_KILP
);
2792 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2794 glsl_to_tgsi_instruction
*cond_inst
, *if_inst
;
2795 glsl_to_tgsi_instruction
*prev_inst
;
2797 prev_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2799 ir
->condition
->accept(this);
2800 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2802 if (this->options
->EmitCondCodes
) {
2803 cond_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2805 /* See if we actually generated any instruction for generating
2806 * the condition. If not, then cook up a move to a temp so we
2807 * have something to set cond_update on.
2809 if (cond_inst
== prev_inst
) {
2810 st_src_reg temp
= get_temp(glsl_type::bool_type
);
2811 cond_inst
= emit(ir
->condition
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), result
);
2813 cond_inst
->cond_update
= GL_TRUE
;
2815 if_inst
= emit(ir
->condition
, TGSI_OPCODE_IF
);
2816 if_inst
->dst
.cond_mask
= COND_NE
;
2818 if_inst
= emit(ir
->condition
, TGSI_OPCODE_IF
, undef_dst
, this->result
);
2821 this->instructions
.push_tail(if_inst
);
2823 visit_exec_list(&ir
->then_instructions
, this);
2825 if (!ir
->else_instructions
.is_empty()) {
2826 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
2827 visit_exec_list(&ir
->else_instructions
, this);
2830 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
2833 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2835 result
.file
= PROGRAM_UNDEFINED
;
2837 next_signature_id
= 1;
2839 current_function
= NULL
;
2840 num_address_regs
= 0;
2842 indirect_addr_temps
= false;
2843 indirect_addr_consts
= false;
2845 native_integers
= false;
2846 mem_ctx
= ralloc_context(NULL
);
2849 shader_program
= NULL
;
2853 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2855 ralloc_free(mem_ctx
);
2858 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
2865 * Count resources used by the given gpu program (number of texture
2869 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
2871 v
->samplers_used
= 0;
2873 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
2874 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
2876 if (is_tex_instruction(inst
->op
)) {
2877 v
->samplers_used
|= 1 << inst
->sampler
;
2879 if (inst
->tex_shadow
) {
2880 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
2885 prog
->SamplersUsed
= v
->samplers_used
;
2887 if (v
->shader_program
!= NULL
)
2888 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
2892 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
2893 struct gl_shader_program
*shader_program
,
2894 const char *name
, const glsl_type
*type
,
2897 if (type
->is_record()) {
2898 ir_constant
*field_constant
;
2900 field_constant
= (ir_constant
*)val
->components
.get_head();
2902 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2903 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
2904 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
2905 type
->fields
.structure
[i
].name
);
2906 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
2907 field_type
, field_constant
);
2908 field_constant
= (ir_constant
*)field_constant
->next
;
2914 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
2916 if (offset
== GL_INVALID_INDEX
) {
2917 fail_link(shader_program
,
2918 "Couldn't find uniform for initializer %s\n", name
);
2921 int loc
= _mesa_uniform_merge_location_offset(index
, offset
);
2923 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
2924 ir_constant
*element
;
2925 const glsl_type
*element_type
;
2926 if (type
->is_array()) {
2927 element
= val
->array_elements
[i
];
2928 element_type
= type
->fields
.array
;
2931 element_type
= type
;
2936 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
2937 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
2938 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
2939 conv
[j
] = element
->value
.b
[j
];
2941 values
= (void *)conv
;
2942 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
2943 element_type
->vector_elements
,
2946 values
= &element
->value
;
2949 if (element_type
->is_matrix()) {
2950 _mesa_uniform_matrix(ctx
, shader_program
,
2951 element_type
->matrix_columns
,
2952 element_type
->vector_elements
,
2953 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
2955 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
2956 values
, element_type
->gl_type
);
2964 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
2965 * are read from the given src in this instruction
2968 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
2970 int read_mask
= 0, comp
;
2972 /* Now, given the src swizzle and the written channels, find which
2973 * components are actually read
2975 for (comp
= 0; comp
< 4; ++comp
) {
2976 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
2978 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
2979 read_mask
|= 1 << coord
;
2986 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
2987 * instruction is the first instruction to write to register T0. There are
2988 * several lowering passes done in GLSL IR (e.g. branches and
2989 * relative addressing) that create a large number of conditional assignments
2990 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
2992 * Here is why this conversion is safe:
2993 * CMP T0, T1 T2 T0 can be expanded to:
2999 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3000 * as the original program. If (T1 < 0.0) evaluates to false, executing
3001 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3002 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3003 * because any instruction that was going to read from T0 after this was going
3004 * to read a garbage value anyway.
3007 glsl_to_tgsi_visitor::simplify_cmp(void)
3009 unsigned *tempWrites
;
3010 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3012 tempWrites
= new unsigned[MAX_TEMPS
];
3016 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3017 memset(outputWrites
, 0, sizeof(outputWrites
));
3019 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3020 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3021 unsigned prevWriteMask
= 0;
3023 /* Give up if we encounter relative addressing or flow control. */
3024 if (inst
->dst
.reladdr
||
3025 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3026 inst
->op
== TGSI_OPCODE_BGNSUB
||
3027 inst
->op
== TGSI_OPCODE_CONT
||
3028 inst
->op
== TGSI_OPCODE_END
||
3029 inst
->op
== TGSI_OPCODE_ENDSUB
||
3030 inst
->op
== TGSI_OPCODE_RET
) {
3034 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3035 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3036 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3037 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3038 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3039 assert(inst
->dst
.index
< MAX_TEMPS
);
3040 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3041 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3044 /* For a CMP to be considered a conditional write, the destination
3045 * register and source register two must be the same. */
3046 if (inst
->op
== TGSI_OPCODE_CMP
3047 && !(inst
->dst
.writemask
& prevWriteMask
)
3048 && inst
->src
[2].file
== inst
->dst
.file
3049 && inst
->src
[2].index
== inst
->dst
.index
3050 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3052 inst
->op
= TGSI_OPCODE_MOV
;
3053 inst
->src
[0] = inst
->src
[1];
3057 delete [] tempWrites
;
3060 /* Replaces all references to a temporary register index with another index. */
3062 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3064 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3065 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3068 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3069 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3070 inst
->src
[j
].index
== index
) {
3071 inst
->src
[j
].index
= new_index
;
3075 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3076 inst
->dst
.index
= new_index
;
3082 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3084 int depth
= 0; /* loop depth */
3085 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3088 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3089 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3091 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3092 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3093 inst
->src
[j
].index
== index
) {
3094 return (depth
== 0) ? i
: loop_start
;
3098 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3101 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3114 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3116 int depth
= 0; /* loop depth */
3117 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3120 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3121 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3123 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3124 return (depth
== 0) ? i
: loop_start
;
3127 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3130 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3143 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3145 int depth
= 0; /* loop depth */
3146 int last
= -1; /* index of last instruction that reads the temporary */
3149 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3150 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3152 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3153 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3154 inst
->src
[j
].index
== index
) {
3155 last
= (depth
== 0) ? i
: -2;
3159 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3161 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3162 if (--depth
== 0 && last
== -2)
3174 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3176 int depth
= 0; /* loop depth */
3177 int last
= -1; /* index of last instruction that writes to the temporary */
3180 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3181 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3183 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3184 last
= (depth
== 0) ? i
: -2;
3186 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3188 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3189 if (--depth
== 0 && last
== -2)
3201 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3202 * channels for copy propagation and updates following instructions to
3203 * use the original versions.
3205 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3206 * will occur. As an example, a TXP production before this pass:
3208 * 0: MOV TEMP[1], INPUT[4].xyyy;
3209 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3210 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3214 * 0: MOV TEMP[1], INPUT[4].xyyy;
3215 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3216 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3218 * which allows for dead code elimination on TEMP[1]'s writes.
3221 glsl_to_tgsi_visitor::copy_propagate(void)
3223 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3224 glsl_to_tgsi_instruction
*,
3225 this->next_temp
* 4);
3226 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3229 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3230 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3232 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3233 || inst
->dst
.index
< this->next_temp
);
3235 /* First, do any copy propagation possible into the src regs. */
3236 for (int r
= 0; r
< 3; r
++) {
3237 glsl_to_tgsi_instruction
*first
= NULL
;
3239 int acp_base
= inst
->src
[r
].index
* 4;
3241 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3242 inst
->src
[r
].reladdr
)
3245 /* See if we can find entries in the ACP consisting of MOVs
3246 * from the same src register for all the swizzled channels
3247 * of this src register reference.
3249 for (int i
= 0; i
< 4; i
++) {
3250 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3251 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3258 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3263 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3264 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3272 /* We've now validated that we can copy-propagate to
3273 * replace this src register reference. Do it.
3275 inst
->src
[r
].file
= first
->src
[0].file
;
3276 inst
->src
[r
].index
= first
->src
[0].index
;
3279 for (int i
= 0; i
< 4; i
++) {
3280 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3281 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3282 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3285 inst
->src
[r
].swizzle
= swizzle
;
3290 case TGSI_OPCODE_BGNLOOP
:
3291 case TGSI_OPCODE_ENDLOOP
:
3292 /* End of a basic block, clear the ACP entirely. */
3293 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3296 case TGSI_OPCODE_IF
:
3300 case TGSI_OPCODE_ENDIF
:
3301 case TGSI_OPCODE_ELSE
:
3302 /* Clear all channels written inside the block from the ACP, but
3303 * leaving those that were not touched.
3305 for (int r
= 0; r
< this->next_temp
; r
++) {
3306 for (int c
= 0; c
< 4; c
++) {
3307 if (!acp
[4 * r
+ c
])
3310 if (acp_level
[4 * r
+ c
] >= level
)
3311 acp
[4 * r
+ c
] = NULL
;
3314 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3319 /* Continuing the block, clear any written channels from
3322 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3323 /* Any temporary might be written, so no copy propagation
3324 * across this instruction.
3326 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3327 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3328 inst
->dst
.reladdr
) {
3329 /* Any output might be written, so no copy propagation
3330 * from outputs across this instruction.
3332 for (int r
= 0; r
< this->next_temp
; r
++) {
3333 for (int c
= 0; c
< 4; c
++) {
3334 if (!acp
[4 * r
+ c
])
3337 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3338 acp
[4 * r
+ c
] = NULL
;
3341 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3342 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3343 /* Clear where it's used as dst. */
3344 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3345 for (int c
= 0; c
< 4; c
++) {
3346 if (inst
->dst
.writemask
& (1 << c
)) {
3347 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3352 /* Clear where it's used as src. */
3353 for (int r
= 0; r
< this->next_temp
; r
++) {
3354 for (int c
= 0; c
< 4; c
++) {
3355 if (!acp
[4 * r
+ c
])
3358 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3360 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3361 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3362 inst
->dst
.writemask
& (1 << src_chan
))
3364 acp
[4 * r
+ c
] = NULL
;
3372 /* If this is a copy, add it to the ACP. */
3373 if (inst
->op
== TGSI_OPCODE_MOV
&&
3374 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3375 !inst
->dst
.reladdr
&&
3377 !inst
->src
[0].reladdr
&&
3378 !inst
->src
[0].negate
) {
3379 for (int i
= 0; i
< 4; i
++) {
3380 if (inst
->dst
.writemask
& (1 << i
)) {
3381 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3382 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3388 ralloc_free(acp_level
);
3393 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3395 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3396 * will occur. As an example, a TXP production after copy propagation but
3399 * 0: MOV TEMP[1], INPUT[4].xyyy;
3400 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3401 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3403 * and after this pass:
3405 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3407 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3408 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3411 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3415 for (i
=0; i
< this->next_temp
; i
++) {
3416 int last_read
= get_last_temp_read(i
);
3419 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3420 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3422 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3435 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3436 * code elimination. This is less primitive than eliminate_dead_code(), as it
3437 * is per-channel and can detect consecutive writes without a read between them
3438 * as dead code. However, there is some dead code that can be eliminated by
3439 * eliminate_dead_code() but not this function - for example, this function
3440 * cannot eliminate an instruction writing to a register that is never read and
3441 * is the only instruction writing to that register.
3443 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3447 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3449 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3450 glsl_to_tgsi_instruction
*,
3451 this->next_temp
* 4);
3452 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3456 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3457 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3459 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3460 || inst
->dst
.index
< this->next_temp
);
3463 case TGSI_OPCODE_BGNLOOP
:
3464 case TGSI_OPCODE_ENDLOOP
:
3465 case TGSI_OPCODE_CONT
:
3466 case TGSI_OPCODE_BRK
:
3467 /* End of a basic block, clear the write array entirely.
3469 * This keeps us from killing dead code when the writes are
3470 * on either side of a loop, even when the register isn't touched
3471 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3472 * dead code of this type, so it shouldn't make a difference as long as
3473 * the dead code elimination pass in the GLSL compiler does its job.
3475 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3478 case TGSI_OPCODE_ENDIF
:
3479 case TGSI_OPCODE_ELSE
:
3480 /* Promote the recorded level of all channels written inside the
3481 * preceding if or else block to the level above the if/else block.
3483 for (int r
= 0; r
< this->next_temp
; r
++) {
3484 for (int c
= 0; c
< 4; c
++) {
3485 if (!writes
[4 * r
+ c
])
3488 if (write_level
[4 * r
+ c
] == level
)
3489 write_level
[4 * r
+ c
] = level
-1;
3493 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3498 case TGSI_OPCODE_IF
:
3500 /* fallthrough to default case to mark the condition as read */
3503 /* Continuing the block, clear any channels from the write array that
3504 * are read by this instruction.
3506 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3507 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3508 /* Any temporary might be read, so no dead code elimination
3509 * across this instruction.
3511 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3512 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3513 /* Clear where it's used as src. */
3514 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3515 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3516 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3517 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3519 for (int c
= 0; c
< 4; c
++) {
3520 if (src_chans
& (1 << c
)) {
3521 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3529 /* If this instruction writes to a temporary, add it to the write array.
3530 * If there is already an instruction in the write array for one or more
3531 * of the channels, flag that channel write as dead.
3533 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3534 !inst
->dst
.reladdr
&&
3536 for (int c
= 0; c
< 4; c
++) {
3537 if (inst
->dst
.writemask
& (1 << c
)) {
3538 if (writes
[4 * inst
->dst
.index
+ c
]) {
3539 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3542 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3544 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3545 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3551 /* Anything still in the write array at this point is dead code. */
3552 for (int r
= 0; r
< this->next_temp
; r
++) {
3553 for (int c
= 0; c
< 4; c
++) {
3554 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3556 inst
->dead_mask
|= (1 << c
);
3560 /* Now actually remove the instructions that are completely dead and update
3561 * the writemask of other instructions with dead channels.
3563 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3564 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3566 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3568 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3573 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3576 ralloc_free(write_level
);
3577 ralloc_free(writes
);
3582 /* Merges temporary registers together where possible to reduce the number of
3583 * registers needed to run a program.
3585 * Produces optimal code only after copy propagation and dead code elimination
3588 glsl_to_tgsi_visitor::merge_registers(void)
3590 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3591 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3594 /* Read the indices of the last read and first write to each temp register
3595 * into an array so that we don't have to traverse the instruction list as
3597 for (i
=0; i
< this->next_temp
; i
++) {
3598 last_reads
[i
] = get_last_temp_read(i
);
3599 first_writes
[i
] = get_first_temp_write(i
);
3602 /* Start looking for registers with non-overlapping usages that can be
3603 * merged together. */
3604 for (i
=0; i
< this->next_temp
; i
++) {
3605 /* Don't touch unused registers. */
3606 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3608 for (j
=0; j
< this->next_temp
; j
++) {
3609 /* Don't touch unused registers. */
3610 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3612 /* We can merge the two registers if the first write to j is after or
3613 * in the same instruction as the last read from i. Note that the
3614 * register at index i will always be used earlier or at the same time
3615 * as the register at index j. */
3616 if (first_writes
[i
] <= first_writes
[j
] &&
3617 last_reads
[i
] <= first_writes
[j
])
3619 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3621 /* Update the first_writes and last_reads arrays with the new
3622 * values for the merged register index, and mark the newly unused
3623 * register index as such. */
3624 last_reads
[i
] = last_reads
[j
];
3625 first_writes
[j
] = -1;
3631 ralloc_free(last_reads
);
3632 ralloc_free(first_writes
);
3635 /* Reassign indices to temporary registers by reusing unused indices created
3636 * by optimization passes. */
3638 glsl_to_tgsi_visitor::renumber_registers(void)
3643 for (i
=0; i
< this->next_temp
; i
++) {
3644 if (get_first_temp_read(i
) < 0) continue;
3646 rename_temp_register(i
, new_index
);
3650 this->next_temp
= new_index
;
3654 * Returns a fragment program which implements the current pixel transfer ops.
3655 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3658 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3659 glsl_to_tgsi_visitor
*original
,
3660 int scale_and_bias
, int pixel_maps
)
3662 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3663 struct st_context
*st
= st_context(original
->ctx
);
3664 struct gl_program
*prog
= &fp
->Base
.Base
;
3665 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3666 st_src_reg coord
, src0
;
3668 glsl_to_tgsi_instruction
*inst
;
3670 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3671 v
->ctx
= original
->ctx
;
3673 v
->shader_program
= NULL
;
3674 v
->glsl_version
= original
->glsl_version
;
3675 v
->native_integers
= original
->native_integers
;
3676 v
->options
= original
->options
;
3677 v
->next_temp
= original
->next_temp
;
3678 v
->num_address_regs
= original
->num_address_regs
;
3679 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3680 v
->indirect_addr_temps
= original
->indirect_addr_temps
;
3681 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3682 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3683 v
->num_immediates
= original
->num_immediates
;
3686 * Get initial pixel color from the texture.
3687 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3689 coord
= st_src_reg(PROGRAM_INPUT
, FRAG_ATTRIB_TEX0
, glsl_type::vec2_type
);
3690 src0
= v
->get_temp(glsl_type::vec4_type
);
3691 dst0
= st_dst_reg(src0
);
3692 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3694 inst
->tex_target
= TEXTURE_2D_INDEX
;
3696 prog
->InputsRead
|= FRAG_BIT_TEX0
;
3697 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3698 v
->samplers_used
|= (1 << 0);
3700 if (scale_and_bias
) {
3701 static const gl_state_index scale_state
[STATE_LENGTH
] =
3702 { STATE_INTERNAL
, STATE_PT_SCALE
,
3703 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3704 static const gl_state_index bias_state
[STATE_LENGTH
] =
3705 { STATE_INTERNAL
, STATE_PT_BIAS
,
3706 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3707 GLint scale_p
, bias_p
;
3708 st_src_reg scale
, bias
;
3710 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3711 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3713 /* MAD colorTemp, colorTemp, scale, bias; */
3714 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3715 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3716 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3720 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3721 st_dst_reg temp_dst
= st_dst_reg(temp
);
3723 assert(st
->pixel_xfer
.pixelmap_texture
);
3725 /* With a little effort, we can do four pixel map look-ups with
3726 * two TEX instructions:
3729 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3730 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3731 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3733 inst
->tex_target
= TEXTURE_2D_INDEX
;
3735 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3736 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3737 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3738 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3740 inst
->tex_target
= TEXTURE_2D_INDEX
;
3742 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3743 v
->samplers_used
|= (1 << 1);
3745 /* MOV colorTemp, temp; */
3746 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3749 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3751 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3752 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3753 glsl_to_tgsi_instruction
*newinst
;
3754 st_src_reg src_regs
[3];
3756 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3757 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3759 for (int i
=0; i
<3; i
++) {
3760 src_regs
[i
] = inst
->src
[i
];
3761 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3762 src_regs
[i
].index
== FRAG_ATTRIB_COL0
)
3764 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3765 src_regs
[i
].index
= src0
.index
;
3767 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3768 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3771 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3772 newinst
->tex_target
= inst
->tex_target
;
3775 /* Make modifications to fragment program info. */
3776 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3777 original
->prog
->Parameters
);
3778 _mesa_free_parameter_list(params
);
3779 count_resources(v
, prog
);
3780 fp
->glsl_to_tgsi
= v
;
3784 * Make fragment program for glBitmap:
3785 * Sample the texture and kill the fragment if the bit is 0.
3786 * This program will be combined with the user's fragment program.
3788 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3791 get_bitmap_visitor(struct st_fragment_program
*fp
,
3792 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3794 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3795 struct st_context
*st
= st_context(original
->ctx
);
3796 struct gl_program
*prog
= &fp
->Base
.Base
;
3797 st_src_reg coord
, src0
;
3799 glsl_to_tgsi_instruction
*inst
;
3801 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3802 v
->ctx
= original
->ctx
;
3804 v
->shader_program
= NULL
;
3805 v
->glsl_version
= original
->glsl_version
;
3806 v
->native_integers
= original
->native_integers
;
3807 v
->options
= original
->options
;
3808 v
->next_temp
= original
->next_temp
;
3809 v
->num_address_regs
= original
->num_address_regs
;
3810 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3811 v
->indirect_addr_temps
= original
->indirect_addr_temps
;
3812 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3813 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3814 v
->num_immediates
= original
->num_immediates
;
3816 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3817 coord
= st_src_reg(PROGRAM_INPUT
, FRAG_ATTRIB_TEX0
, glsl_type::vec2_type
);
3818 src0
= v
->get_temp(glsl_type::vec4_type
);
3819 dst0
= st_dst_reg(src0
);
3820 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3821 inst
->sampler
= samplerIndex
;
3822 inst
->tex_target
= TEXTURE_2D_INDEX
;
3824 prog
->InputsRead
|= FRAG_BIT_TEX0
;
3825 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
3826 v
->samplers_used
|= (1 << samplerIndex
);
3828 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3829 src0
.negate
= NEGATE_XYZW
;
3830 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
3831 src0
.swizzle
= SWIZZLE_XXXX
;
3832 inst
= v
->emit(NULL
, TGSI_OPCODE_KIL
, undef_dst
, src0
);
3834 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3836 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3837 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3838 glsl_to_tgsi_instruction
*newinst
;
3839 st_src_reg src_regs
[3];
3841 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3842 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3844 for (int i
=0; i
<3; i
++) {
3845 src_regs
[i
] = inst
->src
[i
];
3846 if (src_regs
[i
].file
== PROGRAM_INPUT
)
3847 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3850 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3851 newinst
->tex_target
= inst
->tex_target
;
3854 /* Make modifications to fragment program info. */
3855 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
3856 count_resources(v
, prog
);
3857 fp
->glsl_to_tgsi
= v
;
3860 /* ------------------------- TGSI conversion stuff -------------------------- */
3862 unsigned branch_target
;
3867 * Intermediate state used during shader translation.
3869 struct st_translate
{
3870 struct ureg_program
*ureg
;
3872 struct ureg_dst temps
[MAX_TEMPS
];
3873 struct ureg_src
*constants
;
3874 struct ureg_src
*immediates
;
3875 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
3876 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
3877 struct ureg_dst address
[1];
3878 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
3879 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
3881 const GLuint
*inputMapping
;
3882 const GLuint
*outputMapping
;
3884 /* For every instruction that contains a label (eg CALL), keep
3885 * details so that we can go back afterwards and emit the correct
3886 * tgsi instruction number for each label.
3888 struct label
*labels
;
3889 unsigned labels_size
;
3890 unsigned labels_count
;
3892 /* Keep a record of the tgsi instruction number that each mesa
3893 * instruction starts at, will be used to fix up labels after
3898 unsigned insn_count
;
3900 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3905 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3906 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
3908 TGSI_SEMANTIC_VERTEXID
,
3909 TGSI_SEMANTIC_INSTANCEID
3913 * Make note of a branch to a label in the TGSI code.
3914 * After we've emitted all instructions, we'll go over the list
3915 * of labels built here and patch the TGSI code with the actual
3916 * location of each label.
3918 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
3922 if (t
->labels_count
+ 1 >= t
->labels_size
) {
3923 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
3924 t
->labels
= (struct label
*)realloc(t
->labels
,
3925 t
->labels_size
* sizeof(struct label
));
3926 if (t
->labels
== NULL
) {
3927 static unsigned dummy
;
3933 i
= t
->labels_count
++;
3934 t
->labels
[i
].branch_target
= branch_target
;
3935 return &t
->labels
[i
].token
;
3939 * Called prior to emitting the TGSI code for each instruction.
3940 * Allocate additional space for instructions if needed.
3941 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
3942 * the next TGSI instruction.
3944 static void set_insn_start(struct st_translate
*t
, unsigned start
)
3946 if (t
->insn_count
+ 1 >= t
->insn_size
) {
3947 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
3948 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
3949 if (t
->insn
== NULL
) {
3955 t
->insn
[t
->insn_count
++] = start
;
3959 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
3961 static struct ureg_src
3962 emit_immediate(struct st_translate
*t
,
3963 gl_constant_value values
[4],
3966 struct ureg_program
*ureg
= t
->ureg
;
3971 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
3973 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
3974 case GL_UNSIGNED_INT
:
3976 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
3978 assert(!"should not get here - type must be float, int, uint, or bool");
3979 return ureg_src_undef();
3984 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
3986 static struct ureg_dst
3987 dst_register(struct st_translate
*t
,
3988 gl_register_file file
,
3992 case PROGRAM_UNDEFINED
:
3993 return ureg_dst_undef();
3995 case PROGRAM_TEMPORARY
:
3996 if (ureg_dst_is_undef(t
->temps
[index
]))
3997 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
3999 return t
->temps
[index
];
4001 case PROGRAM_OUTPUT
:
4002 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4003 assert(index
< VERT_RESULT_MAX
);
4004 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4005 assert(index
< FRAG_RESULT_MAX
);
4007 assert(index
< GEOM_RESULT_MAX
);
4009 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4011 return t
->outputs
[t
->outputMapping
[index
]];
4013 case PROGRAM_ADDRESS
:
4014 return t
->address
[index
];
4017 assert(!"unknown dst register file");
4018 return ureg_dst_undef();
4023 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4025 static struct ureg_src
4026 src_register(struct st_translate
*t
,
4027 gl_register_file file
,
4031 case PROGRAM_UNDEFINED
:
4032 return ureg_src_undef();
4034 case PROGRAM_TEMPORARY
:
4036 assert(index
< (int) Elements(t
->temps
));
4037 if (ureg_dst_is_undef(t
->temps
[index
]))
4038 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4039 return ureg_src(t
->temps
[index
]);
4041 case PROGRAM_ENV_PARAM
:
4042 case PROGRAM_LOCAL_PARAM
:
4043 case PROGRAM_UNIFORM
:
4045 return t
->constants
[index
];
4046 case PROGRAM_STATE_VAR
:
4047 case PROGRAM_CONSTANT
: /* ie, immediate */
4049 return ureg_DECL_constant(t
->ureg
, 0);
4051 return t
->constants
[index
];
4053 case PROGRAM_IMMEDIATE
:
4054 return t
->immediates
[index
];
4057 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4058 return t
->inputs
[t
->inputMapping
[index
]];
4060 case PROGRAM_OUTPUT
:
4061 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4062 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4064 case PROGRAM_ADDRESS
:
4065 return ureg_src(t
->address
[index
]);
4067 case PROGRAM_SYSTEM_VALUE
:
4068 assert(index
< (int) Elements(t
->systemValues
));
4069 return t
->systemValues
[index
];
4072 assert(!"unknown src register file");
4073 return ureg_src_undef();
4078 * Create a TGSI ureg_dst register from an st_dst_reg.
4080 static struct ureg_dst
4081 translate_dst(struct st_translate
*t
,
4082 const st_dst_reg
*dst_reg
,
4083 bool saturate
, bool clamp_color
)
4085 struct ureg_dst dst
= dst_register(t
,
4089 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4092 dst
= ureg_saturate(dst
);
4093 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4094 /* Clamp colors for ARB_color_buffer_float. */
4095 switch (t
->procType
) {
4096 case TGSI_PROCESSOR_VERTEX
:
4097 /* XXX if the geometry shader is present, this must be done there
4098 * instead of here. */
4099 if (dst_reg
->index
== VERT_RESULT_COL0
||
4100 dst_reg
->index
== VERT_RESULT_COL1
||
4101 dst_reg
->index
== VERT_RESULT_BFC0
||
4102 dst_reg
->index
== VERT_RESULT_BFC1
) {
4103 dst
= ureg_saturate(dst
);
4107 case TGSI_PROCESSOR_FRAGMENT
:
4108 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4109 dst
= ureg_saturate(dst
);
4115 if (dst_reg
->reladdr
!= NULL
)
4116 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4122 * Create a TGSI ureg_src register from an st_src_reg.
4124 static struct ureg_src
4125 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4127 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
);
4129 src
= ureg_swizzle(src
,
4130 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4131 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4132 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4133 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4135 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4136 src
= ureg_negate(src
);
4138 if (src_reg
->reladdr
!= NULL
) {
4139 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4140 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4141 * set the bit for src.Negate. So we have to do the operation manually
4142 * here to work around the compiler's problems. */
4143 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4144 struct ureg_src addr
= ureg_src(t
->address
[0]);
4146 src
.IndirectFile
= addr
.File
;
4147 src
.IndirectIndex
= addr
.Index
;
4148 src
.IndirectSwizzle
= addr
.SwizzleX
;
4150 if (src_reg
->file
!= PROGRAM_INPUT
&&
4151 src_reg
->file
!= PROGRAM_OUTPUT
) {
4152 /* If src_reg->index was negative, it was set to zero in
4153 * src_register(). Reassign it now. But don't do this
4154 * for input/output regs since they get remapped while
4155 * const buffers don't.
4157 src
.Index
= src_reg
->index
;
4164 static struct tgsi_texture_offset
4165 translate_tex_offset(struct st_translate
*t
,
4166 const struct tgsi_texture_offset
*in_offset
)
4168 struct tgsi_texture_offset offset
;
4170 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4172 offset
.File
= TGSI_FILE_IMMEDIATE
;
4173 offset
.Index
= in_offset
->Index
;
4174 offset
.SwizzleX
= in_offset
->SwizzleX
;
4175 offset
.SwizzleY
= in_offset
->SwizzleY
;
4176 offset
.SwizzleZ
= in_offset
->SwizzleZ
;
4183 compile_tgsi_instruction(struct st_translate
*t
,
4184 const glsl_to_tgsi_instruction
*inst
,
4185 bool clamp_dst_color_output
)
4187 struct ureg_program
*ureg
= t
->ureg
;
4189 struct ureg_dst dst
[1];
4190 struct ureg_src src
[4];
4191 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4196 num_dst
= num_inst_dst_regs(inst
->op
);
4197 num_src
= num_inst_src_regs(inst
->op
);
4200 dst
[0] = translate_dst(t
,
4203 clamp_dst_color_output
);
4205 for (i
= 0; i
< num_src
; i
++)
4206 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4209 case TGSI_OPCODE_BGNLOOP
:
4210 case TGSI_OPCODE_CAL
:
4211 case TGSI_OPCODE_ELSE
:
4212 case TGSI_OPCODE_ENDLOOP
:
4213 case TGSI_OPCODE_IF
:
4214 assert(num_dst
== 0);
4215 ureg_label_insn(ureg
,
4219 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4222 case TGSI_OPCODE_TEX
:
4223 case TGSI_OPCODE_TXB
:
4224 case TGSI_OPCODE_TXD
:
4225 case TGSI_OPCODE_TXL
:
4226 case TGSI_OPCODE_TXP
:
4227 case TGSI_OPCODE_TXQ
:
4228 case TGSI_OPCODE_TXF
:
4229 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4230 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4231 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4236 st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
),
4237 texoffsets
, inst
->tex_offset_num_offset
,
4241 case TGSI_OPCODE_SCS
:
4242 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4243 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4256 * Emit the TGSI instructions for inverting and adjusting WPOS.
4257 * This code is unavoidable because it also depends on whether
4258 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4261 emit_wpos_adjustment( struct st_translate
*t
,
4262 const struct gl_program
*program
,
4264 GLfloat adjX
, GLfloat adjY
[2])
4266 struct ureg_program
*ureg
= t
->ureg
;
4268 /* Fragment program uses fragment position input.
4269 * Need to replace instances of INPUT[WPOS] with temp T
4270 * where T = INPUT[WPOS] by y is inverted.
4272 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4273 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4274 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4276 /* XXX: note we are modifying the incoming shader here! Need to
4277 * do this before emitting the constant decls below, or this
4280 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4281 wposTransformState
);
4283 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4284 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4285 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
4287 /* First, apply the coordinate shift: */
4288 if (adjX
|| adjY
[0] || adjY
[1]) {
4289 if (adjY
[0] != adjY
[1]) {
4290 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4291 * depending on whether inversion is actually going to be applied
4292 * or not, which is determined by testing against the inversion
4293 * state variable used below, which will be either +1 or -1.
4295 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4297 ureg_CMP(ureg
, adj_temp
,
4298 ureg_scalar(wpostrans
, invert
? 2 : 0),
4299 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4300 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4301 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4303 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4304 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4306 wpos_input
= ureg_src(wpos_temp
);
4308 /* MOV wpos_temp, input[wpos]
4310 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4313 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4314 * inversion/identity, or the other way around if we're drawing to an FBO.
4317 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4320 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4322 ureg_scalar(wpostrans
, 0),
4323 ureg_scalar(wpostrans
, 1));
4325 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4328 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4330 ureg_scalar(wpostrans
, 2),
4331 ureg_scalar(wpostrans
, 3));
4334 /* Use wpos_temp as position input from here on:
4336 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
4341 * Emit fragment position/ooordinate code.
4344 emit_wpos(struct st_context
*st
,
4345 struct st_translate
*t
,
4346 const struct gl_program
*program
,
4347 struct ureg_program
*ureg
)
4349 const struct gl_fragment_program
*fp
=
4350 (const struct gl_fragment_program
*) program
;
4351 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4352 GLfloat adjX
= 0.0f
;
4353 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4354 boolean invert
= FALSE
;
4356 /* Query the pixel center conventions supported by the pipe driver and set
4357 * adjX, adjY to help out if it cannot handle the requested one internally.
4359 * The bias of the y-coordinate depends on whether y-inversion takes place
4360 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4361 * drawing to an FBO (causes additional inversion), and whether the the pipe
4362 * driver origin and the requested origin differ (the latter condition is
4363 * stored in the 'invert' variable).
4365 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4367 * center shift only:
4372 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4373 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4374 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4375 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4377 * inversion and center shift:
4378 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4379 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4380 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4381 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4383 if (fp
->OriginUpperLeft
) {
4384 /* Fragment shader wants origin in upper-left */
4385 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4386 /* the driver supports upper-left origin */
4388 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4389 /* the driver supports lower-left origin, need to invert Y */
4390 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4397 /* Fragment shader wants origin in lower-left */
4398 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4399 /* the driver supports lower-left origin */
4400 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4401 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4402 /* the driver supports upper-left origin, need to invert Y */
4408 if (fp
->PixelCenterInteger
) {
4409 /* Fragment shader wants pixel center integer */
4410 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4411 /* the driver supports pixel center integer */
4413 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4415 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4416 /* the driver supports pixel center half integer, need to bias X,Y */
4425 /* Fragment shader wants pixel center half integer */
4426 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4427 /* the driver supports pixel center half integer */
4429 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4430 /* the driver supports pixel center integer, need to bias X,Y */
4431 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4432 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4438 /* we invert after adjustment so that we avoid the MOV to temporary,
4439 * and reuse the adjustment ADD instead */
4440 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4444 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4445 * TGSI uses +1 for front, -1 for back.
4446 * This function converts the TGSI value to the GL value. Simply clamping/
4447 * saturating the value to [0,1] does the job.
4450 emit_face_var(struct st_translate
*t
)
4452 struct ureg_program
*ureg
= t
->ureg
;
4453 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4454 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
4456 /* MOV_SAT face_temp, input[face] */
4457 face_temp
= ureg_saturate(face_temp
);
4458 ureg_MOV(ureg
, face_temp
, face_input
);
4460 /* Use face_temp as face input from here on: */
4461 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
4465 emit_edgeflags(struct st_translate
*t
)
4467 struct ureg_program
*ureg
= t
->ureg
;
4468 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
4469 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4471 ureg_MOV(ureg
, edge_dst
, edge_src
);
4475 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4476 * \param program the program to translate
4477 * \param numInputs number of input registers used
4478 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4480 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4481 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4483 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4484 * \param numOutputs number of output registers used
4485 * \param outputMapping maps Mesa fragment program outputs to TGSI
4487 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4488 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4491 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4493 extern "C" enum pipe_error
4494 st_translate_program(
4495 struct gl_context
*ctx
,
4497 struct ureg_program
*ureg
,
4498 glsl_to_tgsi_visitor
*program
,
4499 const struct gl_program
*proginfo
,
4501 const GLuint inputMapping
[],
4502 const ubyte inputSemanticName
[],
4503 const ubyte inputSemanticIndex
[],
4504 const GLuint interpMode
[],
4505 const GLboolean is_centroid
[],
4507 const GLuint outputMapping
[],
4508 const ubyte outputSemanticName
[],
4509 const ubyte outputSemanticIndex
[],
4510 boolean passthrough_edgeflags
,
4511 boolean clamp_color
)
4513 struct st_translate
*t
;
4515 enum pipe_error ret
= PIPE_OK
;
4517 assert(numInputs
<= Elements(t
->inputs
));
4518 assert(numOutputs
<= Elements(t
->outputs
));
4520 t
= CALLOC_STRUCT(st_translate
);
4522 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4526 memset(t
, 0, sizeof *t
);
4528 t
->procType
= procType
;
4529 t
->inputMapping
= inputMapping
;
4530 t
->outputMapping
= outputMapping
;
4533 if (program
->shader_program
) {
4534 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4535 struct gl_uniform_storage
*const storage
=
4536 &program
->shader_program
->UniformStorage
[i
];
4538 _mesa_uniform_detach_all_driver_storage(storage
);
4543 * Declare input attributes.
4545 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4546 for (i
= 0; i
< numInputs
; i
++) {
4547 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4548 inputSemanticName
[i
],
4549 inputSemanticIndex
[i
],
4554 if (proginfo
->InputsRead
& FRAG_BIT_WPOS
) {
4555 /* Must do this after setting up t->inputs, and before
4556 * emitting constant references, below:
4558 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4561 if (proginfo
->InputsRead
& FRAG_BIT_FACE
)
4565 * Declare output attributes.
4567 for (i
= 0; i
< numOutputs
; i
++) {
4568 switch (outputSemanticName
[i
]) {
4569 case TGSI_SEMANTIC_POSITION
:
4570 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4571 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4572 outputSemanticIndex
[i
]);
4573 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4575 case TGSI_SEMANTIC_STENCIL
:
4576 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4577 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4578 outputSemanticIndex
[i
]);
4579 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4581 case TGSI_SEMANTIC_COLOR
:
4582 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4583 TGSI_SEMANTIC_COLOR
,
4584 outputSemanticIndex
[i
]);
4587 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4588 ret
= PIPE_ERROR_BAD_INPUT
;
4593 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4594 for (i
= 0; i
< numInputs
; i
++) {
4595 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4597 inputSemanticName
[i
],
4598 inputSemanticIndex
[i
]);
4601 for (i
= 0; i
< numOutputs
; i
++) {
4602 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4603 outputSemanticName
[i
],
4604 outputSemanticIndex
[i
]);
4608 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4610 for (i
= 0; i
< numInputs
; i
++) {
4611 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4614 for (i
= 0; i
< numOutputs
; i
++) {
4615 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4616 outputSemanticName
[i
],
4617 outputSemanticIndex
[i
]);
4619 if (passthrough_edgeflags
)
4623 /* Declare address register.
4625 if (program
->num_address_regs
> 0) {
4626 assert(program
->num_address_regs
== 1);
4627 t
->address
[0] = ureg_DECL_address(ureg
);
4630 /* Declare misc input registers
4633 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4634 unsigned numSys
= 0;
4635 for (i
= 0; sysInputs
; i
++) {
4636 if (sysInputs
& (1 << i
)) {
4637 unsigned semName
= mesa_sysval_to_semantic
[i
];
4638 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4639 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4640 semName
== TGSI_SEMANTIC_VERTEXID
) {
4641 /* From Gallium perspective, these system values are always
4642 * integer, and require native integer support. However, if
4643 * native integer is supported on the vertex stage but not the
4644 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4645 * assumes these system values are floats. To resolve the
4646 * inconsistency, we insert a U2F.
4648 struct st_context
*st
= st_context(ctx
);
4649 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4650 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4651 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4652 if (!ctx
->Const
.NativeIntegers
) {
4653 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4654 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4655 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4659 sysInputs
&= ~(1 << i
);
4664 if (program
->indirect_addr_temps
) {
4665 /* If temps are accessed with indirect addressing, declare temporaries
4666 * in sequential order. Else, we declare them on demand elsewhere.
4667 * (Note: the number of temporaries is equal to program->next_temp)
4669 for (i
= 0; i
< (unsigned)program
->next_temp
; i
++) {
4670 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4671 t
->temps
[i
] = ureg_DECL_local_temporary(t
->ureg
);
4675 /* Emit constants and uniforms. TGSI uses a single index space for these,
4676 * so we put all the translated regs in t->constants.
4678 if (proginfo
->Parameters
) {
4679 t
->constants
= (struct ureg_src
*)
4680 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4681 if (t
->constants
== NULL
) {
4682 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4686 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4687 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4688 case PROGRAM_ENV_PARAM
:
4689 case PROGRAM_LOCAL_PARAM
:
4690 case PROGRAM_STATE_VAR
:
4691 case PROGRAM_UNIFORM
:
4692 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4695 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4696 * addressing of the const buffer.
4697 * FIXME: Be smarter and recognize param arrays:
4698 * indirect addressing is only valid within the referenced
4701 case PROGRAM_CONSTANT
:
4702 if (program
->indirect_addr_consts
)
4703 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4705 t
->constants
[i
] = emit_immediate(t
,
4706 proginfo
->Parameters
->ParameterValues
[i
],
4707 proginfo
->Parameters
->Parameters
[i
].DataType
,
4716 /* Emit immediate values.
4718 t
->immediates
= (struct ureg_src
*)
4719 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4720 if (t
->immediates
== NULL
) {
4721 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4725 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4726 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4727 assert(i
< program
->num_immediates
);
4728 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4730 assert(i
== program
->num_immediates
);
4732 /* texture samplers */
4733 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
4734 if (program
->samplers_used
& (1 << i
)) {
4735 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4739 /* Emit each instruction in turn:
4741 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4742 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4743 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4747 /* Fix up all emitted labels:
4749 for (i
= 0; i
< t
->labels_count
; i
++) {
4750 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4751 t
->insn
[t
->labels
[i
].branch_target
]);
4754 if (program
->shader_program
) {
4755 /* This has to be done last. Any operation the can cause
4756 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4757 * program constant) has to happen before creating this linkage.
4759 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4760 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4763 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4764 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4773 free(t
->immediates
);
4776 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
4784 /* ----------------------------- End TGSI code ------------------------------ */
4787 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4788 * generating Mesa IR.
4790 static struct gl_program
*
4791 get_mesa_program(struct gl_context
*ctx
,
4792 struct gl_shader_program
*shader_program
,
4793 struct gl_shader
*shader
)
4795 glsl_to_tgsi_visitor
* v
;
4796 struct gl_program
*prog
;
4798 const char *target_string
;
4800 struct gl_shader_compiler_options
*options
=
4801 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
4803 switch (shader
->Type
) {
4804 case GL_VERTEX_SHADER
:
4805 target
= GL_VERTEX_PROGRAM_ARB
;
4806 target_string
= "vertex";
4808 case GL_FRAGMENT_SHADER
:
4809 target
= GL_FRAGMENT_PROGRAM_ARB
;
4810 target_string
= "fragment";
4812 case GL_GEOMETRY_SHADER
:
4813 target
= GL_GEOMETRY_PROGRAM_NV
;
4814 target_string
= "geometry";
4817 assert(!"should not be reached");
4821 validate_ir_tree(shader
->ir
);
4823 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
4826 prog
->Parameters
= _mesa_new_parameter_list();
4827 v
= new glsl_to_tgsi_visitor();
4830 v
->shader_program
= shader_program
;
4831 v
->options
= options
;
4832 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
4833 v
->native_integers
= ctx
->Const
.NativeIntegers
;
4835 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
4838 /* Remove reads from output registers. */
4839 lower_output_reads(shader
->ir
);
4841 /* Emit intermediate IR for main(). */
4842 visit_exec_list(shader
->ir
, v
);
4844 /* Now emit bodies for any functions that were used. */
4846 progress
= GL_FALSE
;
4848 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
4849 function_entry
*entry
= (function_entry
*)iter
.get();
4851 if (!entry
->bgn_inst
) {
4852 v
->current_function
= entry
;
4854 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
4855 entry
->bgn_inst
->function
= entry
;
4857 visit_exec_list(&entry
->sig
->body
, v
);
4859 glsl_to_tgsi_instruction
*last
;
4860 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
4861 if (last
->op
!= TGSI_OPCODE_RET
)
4862 v
->emit(NULL
, TGSI_OPCODE_RET
);
4864 glsl_to_tgsi_instruction
*end
;
4865 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
4866 end
->function
= entry
;
4874 /* Print out some information (for debugging purposes) used by the
4875 * optimization passes. */
4876 for (i
=0; i
< v
->next_temp
; i
++) {
4877 int fr
= v
->get_first_temp_read(i
);
4878 int fw
= v
->get_first_temp_write(i
);
4879 int lr
= v
->get_last_temp_read(i
);
4880 int lw
= v
->get_last_temp_write(i
);
4882 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
4887 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4889 v
->copy_propagate();
4890 while (v
->eliminate_dead_code_advanced());
4892 /* FIXME: These passes to optimize temporary registers don't work when there
4893 * is indirect addressing of the temporary register space. We need proper
4894 * array support so that we don't have to give up these passes in every
4895 * shader that uses arrays.
4897 if (!v
->indirect_addr_temps
) {
4898 v
->eliminate_dead_code();
4899 v
->merge_registers();
4900 v
->renumber_registers();
4903 /* Write the END instruction. */
4904 v
->emit(NULL
, TGSI_OPCODE_END
);
4906 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
4908 printf("GLSL IR for linked %s program %d:\n", target_string
,
4909 shader_program
->Name
);
4910 _mesa_print_ir(shader
->ir
, NULL
);
4916 prog
->Instructions
= NULL
;
4917 prog
->NumInstructions
= 0;
4919 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
4920 count_resources(v
, prog
);
4922 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
4924 /* This has to be done last. Any operation the can cause
4925 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4926 * program constant) has to happen before creating this linkage.
4928 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
4929 if (!shader_program
->LinkStatus
) {
4933 struct st_vertex_program
*stvp
;
4934 struct st_fragment_program
*stfp
;
4935 struct st_geometry_program
*stgp
;
4937 switch (shader
->Type
) {
4938 case GL_VERTEX_SHADER
:
4939 stvp
= (struct st_vertex_program
*)prog
;
4940 stvp
->glsl_to_tgsi
= v
;
4942 case GL_FRAGMENT_SHADER
:
4943 stfp
= (struct st_fragment_program
*)prog
;
4944 stfp
->glsl_to_tgsi
= v
;
4946 case GL_GEOMETRY_SHADER
:
4947 stgp
= (struct st_geometry_program
*)prog
;
4948 stgp
->glsl_to_tgsi
= v
;
4951 assert(!"should not be reached");
4961 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
4963 struct gl_shader
*shader
;
4964 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
4965 type
== GL_GEOMETRY_SHADER_ARB
);
4966 shader
= rzalloc(NULL
, struct gl_shader
);
4968 shader
->Type
= type
;
4969 shader
->Name
= name
;
4970 _mesa_init_shader(ctx
, shader
);
4975 struct gl_shader_program
*
4976 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
4978 struct gl_shader_program
*shProg
;
4979 shProg
= rzalloc(NULL
, struct gl_shader_program
);
4981 shProg
->Name
= name
;
4982 _mesa_init_shader_program(ctx
, shProg
);
4989 * Called via ctx->Driver.LinkShader()
4990 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
4991 * with code lowering and other optimizations.
4994 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
4996 assert(prog
->LinkStatus
);
4998 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4999 if (prog
->_LinkedShaders
[i
] == NULL
)
5003 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5004 const struct gl_shader_compiler_options
*options
=
5005 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5008 unsigned what_to_lower
= MOD_TO_FRACT
| DIV_TO_MUL_RCP
|
5009 EXP_TO_EXP2
| LOG_TO_LOG2
;
5010 if (options
->EmitNoPow
)
5011 what_to_lower
|= POW_TO_EXP2
;
5012 if (!ctx
->Const
.NativeIntegers
)
5013 what_to_lower
|= INT_DIV_TO_MUL_RCP
;
5018 do_mat_op_to_vec(ir
);
5019 lower_instructions(ir
, what_to_lower
);
5021 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5023 progress
= do_common_optimization(ir
, true, true,
5024 options
->MaxUnrollIterations
)
5027 progress
= lower_quadop_vector(ir
, false) || progress
;
5029 if (options
->MaxIfDepth
== 0)
5030 progress
= lower_discard(ir
) || progress
;
5032 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5034 if (options
->EmitNoNoise
)
5035 progress
= lower_noise(ir
) || progress
;
5037 /* If there are forms of indirect addressing that the driver
5038 * cannot handle, perform the lowering pass.
5040 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
5041 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
5043 lower_variable_index_to_cond_assign(ir
,
5044 options
->EmitNoIndirectInput
,
5045 options
->EmitNoIndirectOutput
,
5046 options
->EmitNoIndirectTemp
,
5047 options
->EmitNoIndirectUniform
)
5050 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
5053 validate_ir_tree(ir
);
5056 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5057 struct gl_program
*linked_prog
;
5059 if (prog
->_LinkedShaders
[i
] == NULL
)
5062 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5065 static const GLenum targets
[] = {
5066 GL_VERTEX_PROGRAM_ARB
,
5067 GL_FRAGMENT_PROGRAM_ARB
,
5068 GL_GEOMETRY_PROGRAM_NV
5071 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5073 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
5074 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5076 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5081 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5088 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5089 const GLuint outputMapping
[],
5090 struct pipe_stream_output_info
*so
)
5093 struct gl_transform_feedback_info
*info
=
5094 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5096 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5097 so
->output
[i
].register_index
=
5098 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5099 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5100 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5101 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5102 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5105 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5106 so
->stride
[i
] = info
->BufferStride
[i
];
5108 so
->num_outputs
= info
->NumOutputs
;