mesa: Remove support for named parameters.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
79
80 /**
81 * Maximum number of temporary registers.
82 *
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
85 */
86 #define MAX_TEMPS 4096
87
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
90
91 class st_src_reg;
92 class st_dst_reg;
93
94 static int swizzle_for_size(int size);
95
96 /**
97 * This struct is a corresponding struct to TGSI ureg_src.
98 */
99 class st_src_reg {
100 public:
101 st_src_reg(gl_register_file file, int index, const glsl_type *type)
102 {
103 this->file = file;
104 this->index = index;
105 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
106 this->swizzle = swizzle_for_size(type->vector_elements);
107 else
108 this->swizzle = SWIZZLE_XYZW;
109 this->negate = 0;
110 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
111 this->reladdr = NULL;
112 }
113
114 st_src_reg(gl_register_file file, int index, int type)
115 {
116 this->type = type;
117 this->file = file;
118 this->index = index;
119 this->swizzle = SWIZZLE_XYZW;
120 this->negate = 0;
121 this->reladdr = NULL;
122 }
123
124 st_src_reg()
125 {
126 this->type = GLSL_TYPE_ERROR;
127 this->file = PROGRAM_UNDEFINED;
128 this->index = 0;
129 this->swizzle = 0;
130 this->negate = 0;
131 this->reladdr = NULL;
132 }
133
134 explicit st_src_reg(st_dst_reg reg);
135
136 gl_register_file file; /**< PROGRAM_* from Mesa */
137 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
138 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
139 int negate; /**< NEGATE_XYZW mask from mesa */
140 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
141 /** Register index should be offset by the integer in this reg. */
142 st_src_reg *reladdr;
143 };
144
145 class st_dst_reg {
146 public:
147 st_dst_reg(gl_register_file file, int writemask, int type)
148 {
149 this->file = file;
150 this->index = 0;
151 this->writemask = writemask;
152 this->cond_mask = COND_TR;
153 this->reladdr = NULL;
154 this->type = type;
155 }
156
157 st_dst_reg()
158 {
159 this->type = GLSL_TYPE_ERROR;
160 this->file = PROGRAM_UNDEFINED;
161 this->index = 0;
162 this->writemask = 0;
163 this->cond_mask = COND_TR;
164 this->reladdr = NULL;
165 }
166
167 explicit st_dst_reg(st_src_reg reg);
168
169 gl_register_file file; /**< PROGRAM_* from Mesa */
170 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
171 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
172 GLuint cond_mask:4;
173 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
174 /** Register index should be offset by the integer in this reg. */
175 st_src_reg *reladdr;
176 };
177
178 st_src_reg::st_src_reg(st_dst_reg reg)
179 {
180 this->type = reg.type;
181 this->file = reg.file;
182 this->index = reg.index;
183 this->swizzle = SWIZZLE_XYZW;
184 this->negate = 0;
185 this->reladdr = reg.reladdr;
186 }
187
188 st_dst_reg::st_dst_reg(st_src_reg reg)
189 {
190 this->type = reg.type;
191 this->file = reg.file;
192 this->index = reg.index;
193 this->writemask = WRITEMASK_XYZW;
194 this->cond_mask = COND_TR;
195 this->reladdr = reg.reladdr;
196 }
197
198 class glsl_to_tgsi_instruction : public exec_node {
199 public:
200 /* Callers of this ralloc-based new need not call delete. It's
201 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
202 static void* operator new(size_t size, void *ctx)
203 {
204 void *node;
205
206 node = rzalloc_size(ctx, size);
207 assert(node != NULL);
208
209 return node;
210 }
211
212 unsigned op;
213 st_dst_reg dst;
214 st_src_reg src[3];
215 /** Pointer to the ir source this tree came from for debugging */
216 ir_instruction *ir;
217 GLboolean cond_update;
218 bool saturate;
219 int sampler; /**< sampler index */
220 int tex_target; /**< One of TEXTURE_*_INDEX */
221 GLboolean tex_shadow;
222 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
223 unsigned tex_offset_num_offset;
224 int dead_mask; /**< Used in dead code elimination */
225
226 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
227 };
228
229 class variable_storage : public exec_node {
230 public:
231 variable_storage(ir_variable *var, gl_register_file file, int index)
232 : file(file), index(index), var(var)
233 {
234 /* empty */
235 }
236
237 gl_register_file file;
238 int index;
239 ir_variable *var; /* variable that maps to this, if any */
240 };
241
242 class immediate_storage : public exec_node {
243 public:
244 immediate_storage(gl_constant_value *values, int size, int type)
245 {
246 memcpy(this->values, values, size * sizeof(gl_constant_value));
247 this->size = size;
248 this->type = type;
249 }
250
251 gl_constant_value values[4];
252 int size; /**< Number of components (1-4) */
253 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
254 };
255
256 class function_entry : public exec_node {
257 public:
258 ir_function_signature *sig;
259
260 /**
261 * identifier of this function signature used by the program.
262 *
263 * At the point that TGSI instructions for function calls are
264 * generated, we don't know the address of the first instruction of
265 * the function body. So we make the BranchTarget that is called a
266 * small integer and rewrite them during set_branchtargets().
267 */
268 int sig_id;
269
270 /**
271 * Pointer to first instruction of the function body.
272 *
273 * Set during function body emits after main() is processed.
274 */
275 glsl_to_tgsi_instruction *bgn_inst;
276
277 /**
278 * Index of the first instruction of the function body in actual TGSI.
279 *
280 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
281 */
282 int inst;
283
284 /** Storage for the return value. */
285 st_src_reg return_reg;
286 };
287
288 class glsl_to_tgsi_visitor : public ir_visitor {
289 public:
290 glsl_to_tgsi_visitor();
291 ~glsl_to_tgsi_visitor();
292
293 function_entry *current_function;
294
295 struct gl_context *ctx;
296 struct gl_program *prog;
297 struct gl_shader_program *shader_program;
298 struct gl_shader_compiler_options *options;
299
300 int next_temp;
301
302 int num_address_regs;
303 int samplers_used;
304 bool indirect_addr_temps;
305 bool indirect_addr_consts;
306
307 int glsl_version;
308 bool native_integers;
309
310 variable_storage *find_variable_storage(ir_variable *var);
311
312 int add_constant(gl_register_file file, gl_constant_value values[4],
313 int size, int datatype, GLuint *swizzle_out);
314
315 function_entry *get_function_signature(ir_function_signature *sig);
316
317 st_src_reg get_temp(const glsl_type *type);
318 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
319
320 st_src_reg st_src_reg_for_float(float val);
321 st_src_reg st_src_reg_for_int(int val);
322 st_src_reg st_src_reg_for_type(int type, int val);
323
324 /**
325 * \name Visit methods
326 *
327 * As typical for the visitor pattern, there must be one \c visit method for
328 * each concrete subclass of \c ir_instruction. Virtual base classes within
329 * the hierarchy should not have \c visit methods.
330 */
331 /*@{*/
332 virtual void visit(ir_variable *);
333 virtual void visit(ir_loop *);
334 virtual void visit(ir_loop_jump *);
335 virtual void visit(ir_function_signature *);
336 virtual void visit(ir_function *);
337 virtual void visit(ir_expression *);
338 virtual void visit(ir_swizzle *);
339 virtual void visit(ir_dereference_variable *);
340 virtual void visit(ir_dereference_array *);
341 virtual void visit(ir_dereference_record *);
342 virtual void visit(ir_assignment *);
343 virtual void visit(ir_constant *);
344 virtual void visit(ir_call *);
345 virtual void visit(ir_return *);
346 virtual void visit(ir_discard *);
347 virtual void visit(ir_texture *);
348 virtual void visit(ir_if *);
349 /*@}*/
350
351 st_src_reg result;
352
353 /** List of variable_storage */
354 exec_list variables;
355
356 /** List of immediate_storage */
357 exec_list immediates;
358 unsigned num_immediates;
359
360 /** List of function_entry */
361 exec_list function_signatures;
362 int next_signature_id;
363
364 /** List of glsl_to_tgsi_instruction */
365 exec_list instructions;
366
367 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
368
369 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
370 st_dst_reg dst, st_src_reg src0);
371
372 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
373 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
374
375 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
376 st_dst_reg dst,
377 st_src_reg src0, st_src_reg src1, st_src_reg src2);
378
379 unsigned get_opcode(ir_instruction *ir, unsigned op,
380 st_dst_reg dst,
381 st_src_reg src0, st_src_reg src1);
382
383 /**
384 * Emit the correct dot-product instruction for the type of arguments
385 */
386 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
387 st_dst_reg dst,
388 st_src_reg src0,
389 st_src_reg src1,
390 unsigned elements);
391
392 void emit_scalar(ir_instruction *ir, unsigned op,
393 st_dst_reg dst, st_src_reg src0);
394
395 void emit_scalar(ir_instruction *ir, unsigned op,
396 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
397
398 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
399
400 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
401
402 void emit_scs(ir_instruction *ir, unsigned op,
403 st_dst_reg dst, const st_src_reg &src);
404
405 bool try_emit_mad(ir_expression *ir,
406 int mul_operand);
407 bool try_emit_mad_for_and_not(ir_expression *ir,
408 int mul_operand);
409 bool try_emit_sat(ir_expression *ir);
410
411 void emit_swz(ir_expression *ir);
412
413 bool process_move_condition(ir_rvalue *ir);
414
415 void simplify_cmp(void);
416
417 void rename_temp_register(int index, int new_index);
418 int get_first_temp_read(int index);
419 int get_first_temp_write(int index);
420 int get_last_temp_read(int index);
421 int get_last_temp_write(int index);
422
423 void copy_propagate(void);
424 void eliminate_dead_code(void);
425 int eliminate_dead_code_advanced(void);
426 void merge_registers(void);
427 void renumber_registers(void);
428
429 void *mem_ctx;
430 };
431
432 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
433
434 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
435
436 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
437
438 static void
439 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
440
441 static void
442 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
443 {
444 va_list args;
445 va_start(args, fmt);
446 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
447 va_end(args);
448
449 prog->LinkStatus = GL_FALSE;
450 }
451
452 static int
453 swizzle_for_size(int size)
454 {
455 int size_swizzles[4] = {
456 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
457 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
458 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
459 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
460 };
461
462 assert((size >= 1) && (size <= 4));
463 return size_swizzles[size - 1];
464 }
465
466 static bool
467 is_tex_instruction(unsigned opcode)
468 {
469 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
470 return info->is_tex;
471 }
472
473 static unsigned
474 num_inst_dst_regs(unsigned opcode)
475 {
476 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
477 return info->num_dst;
478 }
479
480 static unsigned
481 num_inst_src_regs(unsigned opcode)
482 {
483 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
484 return info->is_tex ? info->num_src - 1 : info->num_src;
485 }
486
487 glsl_to_tgsi_instruction *
488 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
489 st_dst_reg dst,
490 st_src_reg src0, st_src_reg src1, st_src_reg src2)
491 {
492 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
493 int num_reladdr = 0, i;
494
495 op = get_opcode(ir, op, dst, src0, src1);
496
497 /* If we have to do relative addressing, we want to load the ARL
498 * reg directly for one of the regs, and preload the other reladdr
499 * sources into temps.
500 */
501 num_reladdr += dst.reladdr != NULL;
502 num_reladdr += src0.reladdr != NULL;
503 num_reladdr += src1.reladdr != NULL;
504 num_reladdr += src2.reladdr != NULL;
505
506 reladdr_to_temp(ir, &src2, &num_reladdr);
507 reladdr_to_temp(ir, &src1, &num_reladdr);
508 reladdr_to_temp(ir, &src0, &num_reladdr);
509
510 if (dst.reladdr) {
511 emit_arl(ir, address_reg, *dst.reladdr);
512 num_reladdr--;
513 }
514 assert(num_reladdr == 0);
515
516 inst->op = op;
517 inst->dst = dst;
518 inst->src[0] = src0;
519 inst->src[1] = src1;
520 inst->src[2] = src2;
521 inst->ir = ir;
522 inst->dead_mask = 0;
523
524 inst->function = NULL;
525
526 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
527 this->num_address_regs = 1;
528
529 /* Update indirect addressing status used by TGSI */
530 if (dst.reladdr) {
531 switch(dst.file) {
532 case PROGRAM_TEMPORARY:
533 this->indirect_addr_temps = true;
534 break;
535 case PROGRAM_LOCAL_PARAM:
536 case PROGRAM_ENV_PARAM:
537 case PROGRAM_STATE_VAR:
538 case PROGRAM_CONSTANT:
539 case PROGRAM_UNIFORM:
540 this->indirect_addr_consts = true;
541 break;
542 case PROGRAM_IMMEDIATE:
543 assert(!"immediates should not have indirect addressing");
544 break;
545 default:
546 break;
547 }
548 }
549 else {
550 for (i=0; i<3; i++) {
551 if(inst->src[i].reladdr) {
552 switch(inst->src[i].file) {
553 case PROGRAM_TEMPORARY:
554 this->indirect_addr_temps = true;
555 break;
556 case PROGRAM_LOCAL_PARAM:
557 case PROGRAM_ENV_PARAM:
558 case PROGRAM_STATE_VAR:
559 case PROGRAM_CONSTANT:
560 case PROGRAM_UNIFORM:
561 this->indirect_addr_consts = true;
562 break;
563 case PROGRAM_IMMEDIATE:
564 assert(!"immediates should not have indirect addressing");
565 break;
566 default:
567 break;
568 }
569 }
570 }
571 }
572
573 this->instructions.push_tail(inst);
574
575 if (native_integers)
576 try_emit_float_set(ir, op, dst);
577
578 return inst;
579 }
580
581
582 glsl_to_tgsi_instruction *
583 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
584 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
585 {
586 return emit(ir, op, dst, src0, src1, undef_src);
587 }
588
589 glsl_to_tgsi_instruction *
590 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
591 st_dst_reg dst, st_src_reg src0)
592 {
593 assert(dst.writemask != 0);
594 return emit(ir, op, dst, src0, undef_src, undef_src);
595 }
596
597 glsl_to_tgsi_instruction *
598 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
599 {
600 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
601 }
602
603 /**
604 * Emits the code to convert the result of float SET instructions to integers.
605 */
606 void
607 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
608 st_dst_reg dst)
609 {
610 if ((op == TGSI_OPCODE_SEQ ||
611 op == TGSI_OPCODE_SNE ||
612 op == TGSI_OPCODE_SGE ||
613 op == TGSI_OPCODE_SLT))
614 {
615 st_src_reg src = st_src_reg(dst);
616 src.negate = ~src.negate;
617 dst.type = GLSL_TYPE_FLOAT;
618 emit(ir, TGSI_OPCODE_F2I, dst, src);
619 }
620 }
621
622 /**
623 * Determines whether to use an integer, unsigned integer, or float opcode
624 * based on the operands and input opcode, then emits the result.
625 */
626 unsigned
627 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
628 st_dst_reg dst,
629 st_src_reg src0, st_src_reg src1)
630 {
631 int type = GLSL_TYPE_FLOAT;
632
633 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
634 type = GLSL_TYPE_FLOAT;
635 else if (native_integers)
636 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
637
638 #define case4(c, f, i, u) \
639 case TGSI_OPCODE_##c: \
640 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
641 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
642 else op = TGSI_OPCODE_##f; \
643 break;
644 #define case3(f, i, u) case4(f, f, i, u)
645 #define case2fi(f, i) case4(f, f, i, i)
646 #define case2iu(i, u) case4(i, LAST, i, u)
647
648 switch(op) {
649 case2fi(ADD, UADD);
650 case2fi(MUL, UMUL);
651 case2fi(MAD, UMAD);
652 case3(DIV, IDIV, UDIV);
653 case3(MAX, IMAX, UMAX);
654 case3(MIN, IMIN, UMIN);
655 case2iu(MOD, UMOD);
656
657 case2fi(SEQ, USEQ);
658 case2fi(SNE, USNE);
659 case3(SGE, ISGE, USGE);
660 case3(SLT, ISLT, USLT);
661
662 case2iu(ISHR, USHR);
663
664 case2fi(SSG, ISSG);
665 case3(ABS, IABS, IABS);
666
667 default: break;
668 }
669
670 assert(op != TGSI_OPCODE_LAST);
671 return op;
672 }
673
674 glsl_to_tgsi_instruction *
675 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
676 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
677 unsigned elements)
678 {
679 static const unsigned dot_opcodes[] = {
680 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
681 };
682
683 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
684 }
685
686 /**
687 * Emits TGSI scalar opcodes to produce unique answers across channels.
688 *
689 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
690 * channel determines the result across all channels. So to do a vec4
691 * of this operation, we want to emit a scalar per source channel used
692 * to produce dest channels.
693 */
694 void
695 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
696 st_dst_reg dst,
697 st_src_reg orig_src0, st_src_reg orig_src1)
698 {
699 int i, j;
700 int done_mask = ~dst.writemask;
701
702 /* TGSI RCP is a scalar operation splatting results to all channels,
703 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
704 * dst channels.
705 */
706 for (i = 0; i < 4; i++) {
707 GLuint this_mask = (1 << i);
708 glsl_to_tgsi_instruction *inst;
709 st_src_reg src0 = orig_src0;
710 st_src_reg src1 = orig_src1;
711
712 if (done_mask & this_mask)
713 continue;
714
715 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
716 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
717 for (j = i + 1; j < 4; j++) {
718 /* If there is another enabled component in the destination that is
719 * derived from the same inputs, generate its value on this pass as
720 * well.
721 */
722 if (!(done_mask & (1 << j)) &&
723 GET_SWZ(src0.swizzle, j) == src0_swiz &&
724 GET_SWZ(src1.swizzle, j) == src1_swiz) {
725 this_mask |= (1 << j);
726 }
727 }
728 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
729 src0_swiz, src0_swiz);
730 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
731 src1_swiz, src1_swiz);
732
733 inst = emit(ir, op, dst, src0, src1);
734 inst->dst.writemask = this_mask;
735 done_mask |= this_mask;
736 }
737 }
738
739 void
740 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
741 st_dst_reg dst, st_src_reg src0)
742 {
743 st_src_reg undef = undef_src;
744
745 undef.swizzle = SWIZZLE_XXXX;
746
747 emit_scalar(ir, op, dst, src0, undef);
748 }
749
750 void
751 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
752 st_dst_reg dst, st_src_reg src0)
753 {
754 int op = TGSI_OPCODE_ARL;
755
756 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
757 op = TGSI_OPCODE_UARL;
758
759 emit(NULL, op, dst, src0);
760 }
761
762 /**
763 * Emit an TGSI_OPCODE_SCS instruction
764 *
765 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
766 * Instead of splatting its result across all four components of the
767 * destination, it writes one value to the \c x component and another value to
768 * the \c y component.
769 *
770 * \param ir IR instruction being processed
771 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
772 * on which value is desired.
773 * \param dst Destination register
774 * \param src Source register
775 */
776 void
777 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
778 st_dst_reg dst,
779 const st_src_reg &src)
780 {
781 /* Vertex programs cannot use the SCS opcode.
782 */
783 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
784 emit_scalar(ir, op, dst, src);
785 return;
786 }
787
788 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
789 const unsigned scs_mask = (1U << component);
790 int done_mask = ~dst.writemask;
791 st_src_reg tmp;
792
793 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
794
795 /* If there are compnents in the destination that differ from the component
796 * that will be written by the SCS instrution, we'll need a temporary.
797 */
798 if (scs_mask != unsigned(dst.writemask)) {
799 tmp = get_temp(glsl_type::vec4_type);
800 }
801
802 for (unsigned i = 0; i < 4; i++) {
803 unsigned this_mask = (1U << i);
804 st_src_reg src0 = src;
805
806 if ((done_mask & this_mask) != 0)
807 continue;
808
809 /* The source swizzle specified which component of the source generates
810 * sine / cosine for the current component in the destination. The SCS
811 * instruction requires that this value be swizzle to the X component.
812 * Replace the current swizzle with a swizzle that puts the source in
813 * the X component.
814 */
815 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
816
817 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
818 src0_swiz, src0_swiz);
819 for (unsigned j = i + 1; j < 4; j++) {
820 /* If there is another enabled component in the destination that is
821 * derived from the same inputs, generate its value on this pass as
822 * well.
823 */
824 if (!(done_mask & (1 << j)) &&
825 GET_SWZ(src0.swizzle, j) == src0_swiz) {
826 this_mask |= (1 << j);
827 }
828 }
829
830 if (this_mask != scs_mask) {
831 glsl_to_tgsi_instruction *inst;
832 st_dst_reg tmp_dst = st_dst_reg(tmp);
833
834 /* Emit the SCS instruction.
835 */
836 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
837 inst->dst.writemask = scs_mask;
838
839 /* Move the result of the SCS instruction to the desired location in
840 * the destination.
841 */
842 tmp.swizzle = MAKE_SWIZZLE4(component, component,
843 component, component);
844 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
845 inst->dst.writemask = this_mask;
846 } else {
847 /* Emit the SCS instruction to write directly to the destination.
848 */
849 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
850 inst->dst.writemask = scs_mask;
851 }
852
853 done_mask |= this_mask;
854 }
855 }
856
857 int
858 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
859 gl_constant_value values[4], int size, int datatype,
860 GLuint *swizzle_out)
861 {
862 if (file == PROGRAM_CONSTANT) {
863 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
864 size, datatype, swizzle_out);
865 } else {
866 int index = 0;
867 immediate_storage *entry;
868 assert(file == PROGRAM_IMMEDIATE);
869
870 /* Search immediate storage to see if we already have an identical
871 * immediate that we can use instead of adding a duplicate entry.
872 */
873 foreach_iter(exec_list_iterator, iter, this->immediates) {
874 entry = (immediate_storage *)iter.get();
875
876 if (entry->size == size &&
877 entry->type == datatype &&
878 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
879 return index;
880 }
881 index++;
882 }
883
884 /* Add this immediate to the list. */
885 entry = new(mem_ctx) immediate_storage(values, size, datatype);
886 this->immediates.push_tail(entry);
887 this->num_immediates++;
888 return index;
889 }
890 }
891
892 st_src_reg
893 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
894 {
895 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
896 union gl_constant_value uval;
897
898 uval.f = val;
899 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
900
901 return src;
902 }
903
904 st_src_reg
905 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
906 {
907 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
908 union gl_constant_value uval;
909
910 assert(native_integers);
911
912 uval.i = val;
913 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
914
915 return src;
916 }
917
918 st_src_reg
919 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
920 {
921 if (native_integers)
922 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
923 st_src_reg_for_int(val);
924 else
925 return st_src_reg_for_float(val);
926 }
927
928 static int
929 type_size(const struct glsl_type *type)
930 {
931 unsigned int i;
932 int size;
933
934 switch (type->base_type) {
935 case GLSL_TYPE_UINT:
936 case GLSL_TYPE_INT:
937 case GLSL_TYPE_FLOAT:
938 case GLSL_TYPE_BOOL:
939 if (type->is_matrix()) {
940 return type->matrix_columns;
941 } else {
942 /* Regardless of size of vector, it gets a vec4. This is bad
943 * packing for things like floats, but otherwise arrays become a
944 * mess. Hopefully a later pass over the code can pack scalars
945 * down if appropriate.
946 */
947 return 1;
948 }
949 case GLSL_TYPE_ARRAY:
950 assert(type->length > 0);
951 return type_size(type->fields.array) * type->length;
952 case GLSL_TYPE_STRUCT:
953 size = 0;
954 for (i = 0; i < type->length; i++) {
955 size += type_size(type->fields.structure[i].type);
956 }
957 return size;
958 case GLSL_TYPE_SAMPLER:
959 /* Samplers take up one slot in UNIFORMS[], but they're baked in
960 * at link time.
961 */
962 return 1;
963 default:
964 assert(0);
965 return 0;
966 }
967 }
968
969 /**
970 * In the initial pass of codegen, we assign temporary numbers to
971 * intermediate results. (not SSA -- variable assignments will reuse
972 * storage).
973 */
974 st_src_reg
975 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
976 {
977 st_src_reg src;
978
979 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
980 src.file = PROGRAM_TEMPORARY;
981 src.index = next_temp;
982 src.reladdr = NULL;
983 next_temp += type_size(type);
984
985 if (type->is_array() || type->is_record()) {
986 src.swizzle = SWIZZLE_NOOP;
987 } else {
988 src.swizzle = swizzle_for_size(type->vector_elements);
989 }
990 src.negate = 0;
991
992 return src;
993 }
994
995 variable_storage *
996 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
997 {
998
999 variable_storage *entry;
1000
1001 foreach_iter(exec_list_iterator, iter, this->variables) {
1002 entry = (variable_storage *)iter.get();
1003
1004 if (entry->var == var)
1005 return entry;
1006 }
1007
1008 return NULL;
1009 }
1010
1011 void
1012 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1013 {
1014 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1015 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1016
1017 fp->OriginUpperLeft = ir->origin_upper_left;
1018 fp->PixelCenterInteger = ir->pixel_center_integer;
1019 }
1020
1021 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1022 unsigned int i;
1023 const ir_state_slot *const slots = ir->state_slots;
1024 assert(ir->state_slots != NULL);
1025
1026 /* Check if this statevar's setup in the STATE file exactly
1027 * matches how we'll want to reference it as a
1028 * struct/array/whatever. If not, then we need to move it into
1029 * temporary storage and hope that it'll get copy-propagated
1030 * out.
1031 */
1032 for (i = 0; i < ir->num_state_slots; i++) {
1033 if (slots[i].swizzle != SWIZZLE_XYZW) {
1034 break;
1035 }
1036 }
1037
1038 variable_storage *storage;
1039 st_dst_reg dst;
1040 if (i == ir->num_state_slots) {
1041 /* We'll set the index later. */
1042 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1043 this->variables.push_tail(storage);
1044
1045 dst = undef_dst;
1046 } else {
1047 /* The variable_storage constructor allocates slots based on the size
1048 * of the type. However, this had better match the number of state
1049 * elements that we're going to copy into the new temporary.
1050 */
1051 assert((int) ir->num_state_slots == type_size(ir->type));
1052
1053 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1054 this->next_temp);
1055 this->variables.push_tail(storage);
1056 this->next_temp += type_size(ir->type);
1057
1058 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1059 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1060 }
1061
1062
1063 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1064 int index = _mesa_add_state_reference(this->prog->Parameters,
1065 (gl_state_index *)slots[i].tokens);
1066
1067 if (storage->file == PROGRAM_STATE_VAR) {
1068 if (storage->index == -1) {
1069 storage->index = index;
1070 } else {
1071 assert(index == storage->index + (int)i);
1072 }
1073 } else {
1074 st_src_reg src(PROGRAM_STATE_VAR, index,
1075 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT);
1076 src.swizzle = slots[i].swizzle;
1077 emit(ir, TGSI_OPCODE_MOV, dst, src);
1078 /* even a float takes up a whole vec4 reg in a struct/array. */
1079 dst.index++;
1080 }
1081 }
1082
1083 if (storage->file == PROGRAM_TEMPORARY &&
1084 dst.index != storage->index + (int) ir->num_state_slots) {
1085 fail_link(this->shader_program,
1086 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1087 ir->name, dst.index - storage->index,
1088 type_size(ir->type));
1089 }
1090 }
1091 }
1092
1093 void
1094 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1095 {
1096 ir_dereference_variable *counter = NULL;
1097
1098 if (ir->counter != NULL)
1099 counter = new(ir) ir_dereference_variable(ir->counter);
1100
1101 if (ir->from != NULL) {
1102 assert(ir->counter != NULL);
1103
1104 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1105
1106 a->accept(this);
1107 delete a;
1108 }
1109
1110 emit(NULL, TGSI_OPCODE_BGNLOOP);
1111
1112 if (ir->to) {
1113 ir_expression *e =
1114 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1115 counter, ir->to);
1116 ir_if *if_stmt = new(ir) ir_if(e);
1117
1118 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1119
1120 if_stmt->then_instructions.push_tail(brk);
1121
1122 if_stmt->accept(this);
1123
1124 delete if_stmt;
1125 delete e;
1126 delete brk;
1127 }
1128
1129 visit_exec_list(&ir->body_instructions, this);
1130
1131 if (ir->increment) {
1132 ir_expression *e =
1133 new(ir) ir_expression(ir_binop_add, counter->type,
1134 counter, ir->increment);
1135
1136 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1137
1138 a->accept(this);
1139 delete a;
1140 delete e;
1141 }
1142
1143 emit(NULL, TGSI_OPCODE_ENDLOOP);
1144 }
1145
1146 void
1147 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1148 {
1149 switch (ir->mode) {
1150 case ir_loop_jump::jump_break:
1151 emit(NULL, TGSI_OPCODE_BRK);
1152 break;
1153 case ir_loop_jump::jump_continue:
1154 emit(NULL, TGSI_OPCODE_CONT);
1155 break;
1156 }
1157 }
1158
1159
1160 void
1161 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1162 {
1163 assert(0);
1164 (void)ir;
1165 }
1166
1167 void
1168 glsl_to_tgsi_visitor::visit(ir_function *ir)
1169 {
1170 /* Ignore function bodies other than main() -- we shouldn't see calls to
1171 * them since they should all be inlined before we get to glsl_to_tgsi.
1172 */
1173 if (strcmp(ir->name, "main") == 0) {
1174 const ir_function_signature *sig;
1175 exec_list empty;
1176
1177 sig = ir->matching_signature(&empty);
1178
1179 assert(sig);
1180
1181 foreach_iter(exec_list_iterator, iter, sig->body) {
1182 ir_instruction *ir = (ir_instruction *)iter.get();
1183
1184 ir->accept(this);
1185 }
1186 }
1187 }
1188
1189 bool
1190 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1191 {
1192 int nonmul_operand = 1 - mul_operand;
1193 st_src_reg a, b, c;
1194 st_dst_reg result_dst;
1195
1196 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1197 if (!expr || expr->operation != ir_binop_mul)
1198 return false;
1199
1200 expr->operands[0]->accept(this);
1201 a = this->result;
1202 expr->operands[1]->accept(this);
1203 b = this->result;
1204 ir->operands[nonmul_operand]->accept(this);
1205 c = this->result;
1206
1207 this->result = get_temp(ir->type);
1208 result_dst = st_dst_reg(this->result);
1209 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1210 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1211
1212 return true;
1213 }
1214
1215 /**
1216 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1217 *
1218 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1219 * implemented using multiplication, and logical-or is implemented using
1220 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1221 * As result, the logical expression (a & !b) can be rewritten as:
1222 *
1223 * - a * !b
1224 * - a * (1 - b)
1225 * - (a * 1) - (a * b)
1226 * - a + -(a * b)
1227 * - a + (a * -b)
1228 *
1229 * This final expression can be implemented as a single MAD(a, -b, a)
1230 * instruction.
1231 */
1232 bool
1233 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1234 {
1235 const int other_operand = 1 - try_operand;
1236 st_src_reg a, b;
1237
1238 ir_expression *expr = ir->operands[try_operand]->as_expression();
1239 if (!expr || expr->operation != ir_unop_logic_not)
1240 return false;
1241
1242 ir->operands[other_operand]->accept(this);
1243 a = this->result;
1244 expr->operands[0]->accept(this);
1245 b = this->result;
1246
1247 b.negate = ~b.negate;
1248
1249 this->result = get_temp(ir->type);
1250 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1251
1252 return true;
1253 }
1254
1255 bool
1256 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1257 {
1258 /* Saturates were only introduced to vertex programs in
1259 * NV_vertex_program3, so don't give them to drivers in the VP.
1260 */
1261 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1262 return false;
1263
1264 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1265 if (!sat_src)
1266 return false;
1267
1268 sat_src->accept(this);
1269 st_src_reg src = this->result;
1270
1271 /* If we generated an expression instruction into a temporary in
1272 * processing the saturate's operand, apply the saturate to that
1273 * instruction. Otherwise, generate a MOV to do the saturate.
1274 *
1275 * Note that we have to be careful to only do this optimization if
1276 * the instruction in question was what generated src->result. For
1277 * example, ir_dereference_array might generate a MUL instruction
1278 * to create the reladdr, and return us a src reg using that
1279 * reladdr. That MUL result is not the value we're trying to
1280 * saturate.
1281 */
1282 ir_expression *sat_src_expr = sat_src->as_expression();
1283 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1284 sat_src_expr->operation == ir_binop_add ||
1285 sat_src_expr->operation == ir_binop_dot)) {
1286 glsl_to_tgsi_instruction *new_inst;
1287 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1288 new_inst->saturate = true;
1289 } else {
1290 this->result = get_temp(ir->type);
1291 st_dst_reg result_dst = st_dst_reg(this->result);
1292 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1293 glsl_to_tgsi_instruction *inst;
1294 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1295 inst->saturate = true;
1296 }
1297
1298 return true;
1299 }
1300
1301 void
1302 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1303 st_src_reg *reg, int *num_reladdr)
1304 {
1305 if (!reg->reladdr)
1306 return;
1307
1308 emit_arl(ir, address_reg, *reg->reladdr);
1309
1310 if (*num_reladdr != 1) {
1311 st_src_reg temp = get_temp(glsl_type::vec4_type);
1312
1313 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1314 *reg = temp;
1315 }
1316
1317 (*num_reladdr)--;
1318 }
1319
1320 void
1321 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1322 {
1323 unsigned int operand;
1324 st_src_reg op[Elements(ir->operands)];
1325 st_src_reg result_src;
1326 st_dst_reg result_dst;
1327
1328 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1329 */
1330 if (ir->operation == ir_binop_add) {
1331 if (try_emit_mad(ir, 1))
1332 return;
1333 if (try_emit_mad(ir, 0))
1334 return;
1335 }
1336
1337 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1338 */
1339 if (ir->operation == ir_binop_logic_and) {
1340 if (try_emit_mad_for_and_not(ir, 1))
1341 return;
1342 if (try_emit_mad_for_and_not(ir, 0))
1343 return;
1344 }
1345
1346 if (try_emit_sat(ir))
1347 return;
1348
1349 if (ir->operation == ir_quadop_vector)
1350 assert(!"ir_quadop_vector should have been lowered");
1351
1352 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1353 this->result.file = PROGRAM_UNDEFINED;
1354 ir->operands[operand]->accept(this);
1355 if (this->result.file == PROGRAM_UNDEFINED) {
1356 ir_print_visitor v;
1357 printf("Failed to get tree for expression operand:\n");
1358 ir->operands[operand]->accept(&v);
1359 exit(1);
1360 }
1361 op[operand] = this->result;
1362
1363 /* Matrix expression operands should have been broken down to vector
1364 * operations already.
1365 */
1366 assert(!ir->operands[operand]->type->is_matrix());
1367 }
1368
1369 int vector_elements = ir->operands[0]->type->vector_elements;
1370 if (ir->operands[1]) {
1371 vector_elements = MAX2(vector_elements,
1372 ir->operands[1]->type->vector_elements);
1373 }
1374
1375 this->result.file = PROGRAM_UNDEFINED;
1376
1377 /* Storage for our result. Ideally for an assignment we'd be using
1378 * the actual storage for the result here, instead.
1379 */
1380 result_src = get_temp(ir->type);
1381 /* convenience for the emit functions below. */
1382 result_dst = st_dst_reg(result_src);
1383 /* Limit writes to the channels that will be used by result_src later.
1384 * This does limit this temp's use as a temporary for multi-instruction
1385 * sequences.
1386 */
1387 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1388
1389 switch (ir->operation) {
1390 case ir_unop_logic_not:
1391 if (result_dst.type != GLSL_TYPE_FLOAT)
1392 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1393 else {
1394 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1395 * older GPUs implement SEQ using multiple instructions (i915 uses two
1396 * SGE instructions and a MUL instruction). Since our logic values are
1397 * 0.0 and 1.0, 1-x also implements !x.
1398 */
1399 op[0].negate = ~op[0].negate;
1400 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1401 }
1402 break;
1403 case ir_unop_neg:
1404 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1405 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1406 else {
1407 op[0].negate = ~op[0].negate;
1408 result_src = op[0];
1409 }
1410 break;
1411 case ir_unop_abs:
1412 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1413 break;
1414 case ir_unop_sign:
1415 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1416 break;
1417 case ir_unop_rcp:
1418 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1419 break;
1420
1421 case ir_unop_exp2:
1422 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1423 break;
1424 case ir_unop_exp:
1425 case ir_unop_log:
1426 assert(!"not reached: should be handled by ir_explog_to_explog2");
1427 break;
1428 case ir_unop_log2:
1429 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1430 break;
1431 case ir_unop_sin:
1432 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1433 break;
1434 case ir_unop_cos:
1435 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1436 break;
1437 case ir_unop_sin_reduced:
1438 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1439 break;
1440 case ir_unop_cos_reduced:
1441 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1442 break;
1443
1444 case ir_unop_dFdx:
1445 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1446 break;
1447 case ir_unop_dFdy:
1448 {
1449 /* The X component contains 1 or -1 depending on whether the framebuffer
1450 * is a FBO or the window system buffer, respectively.
1451 * It is then multiplied with the source operand of DDY.
1452 */
1453 static const gl_state_index transform_y_state[STATE_LENGTH]
1454 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1455
1456 unsigned transform_y_index =
1457 _mesa_add_state_reference(this->prog->Parameters,
1458 transform_y_state);
1459
1460 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1461 transform_y_index,
1462 glsl_type::vec4_type);
1463 transform_y.swizzle = SWIZZLE_XXXX;
1464
1465 st_src_reg temp = get_temp(glsl_type::vec4_type);
1466
1467 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1468 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1469 break;
1470 }
1471
1472 case ir_unop_noise: {
1473 /* At some point, a motivated person could add a better
1474 * implementation of noise. Currently not even the nvidia
1475 * binary drivers do anything more than this. In any case, the
1476 * place to do this is in the GL state tracker, not the poor
1477 * driver.
1478 */
1479 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1480 break;
1481 }
1482
1483 case ir_binop_add:
1484 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1485 break;
1486 case ir_binop_sub:
1487 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1488 break;
1489
1490 case ir_binop_mul:
1491 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1492 break;
1493 case ir_binop_div:
1494 if (result_dst.type == GLSL_TYPE_FLOAT)
1495 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1496 else
1497 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1498 break;
1499 case ir_binop_mod:
1500 if (result_dst.type == GLSL_TYPE_FLOAT)
1501 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1502 else
1503 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1504 break;
1505
1506 case ir_binop_less:
1507 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1508 break;
1509 case ir_binop_greater:
1510 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1511 break;
1512 case ir_binop_lequal:
1513 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1514 break;
1515 case ir_binop_gequal:
1516 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1517 break;
1518 case ir_binop_equal:
1519 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1520 break;
1521 case ir_binop_nequal:
1522 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1523 break;
1524 case ir_binop_all_equal:
1525 /* "==" operator producing a scalar boolean. */
1526 if (ir->operands[0]->type->is_vector() ||
1527 ir->operands[1]->type->is_vector()) {
1528 st_src_reg temp = get_temp(native_integers ?
1529 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1530 glsl_type::vec4_type);
1531
1532 if (native_integers) {
1533 st_dst_reg temp_dst = st_dst_reg(temp);
1534 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1535
1536 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1537
1538 /* Emit 1-3 AND operations to combine the SEQ results. */
1539 switch (ir->operands[0]->type->vector_elements) {
1540 case 2:
1541 break;
1542 case 3:
1543 temp_dst.writemask = WRITEMASK_Y;
1544 temp1.swizzle = SWIZZLE_YYYY;
1545 temp2.swizzle = SWIZZLE_ZZZZ;
1546 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1547 break;
1548 case 4:
1549 temp_dst.writemask = WRITEMASK_X;
1550 temp1.swizzle = SWIZZLE_XXXX;
1551 temp2.swizzle = SWIZZLE_YYYY;
1552 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1553 temp_dst.writemask = WRITEMASK_Y;
1554 temp1.swizzle = SWIZZLE_ZZZZ;
1555 temp2.swizzle = SWIZZLE_WWWW;
1556 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1557 }
1558
1559 temp1.swizzle = SWIZZLE_XXXX;
1560 temp2.swizzle = SWIZZLE_YYYY;
1561 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1562 } else {
1563 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1564
1565 /* After the dot-product, the value will be an integer on the
1566 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1567 */
1568 emit_dp(ir, result_dst, temp, temp, vector_elements);
1569
1570 /* Negating the result of the dot-product gives values on the range
1571 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1572 * This is achieved using SGE.
1573 */
1574 st_src_reg sge_src = result_src;
1575 sge_src.negate = ~sge_src.negate;
1576 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1577 }
1578 } else {
1579 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1580 }
1581 break;
1582 case ir_binop_any_nequal:
1583 /* "!=" operator producing a scalar boolean. */
1584 if (ir->operands[0]->type->is_vector() ||
1585 ir->operands[1]->type->is_vector()) {
1586 st_src_reg temp = get_temp(native_integers ?
1587 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1588 glsl_type::vec4_type);
1589 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1590
1591 if (native_integers) {
1592 st_dst_reg temp_dst = st_dst_reg(temp);
1593 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1594
1595 /* Emit 1-3 OR operations to combine the SNE results. */
1596 switch (ir->operands[0]->type->vector_elements) {
1597 case 2:
1598 break;
1599 case 3:
1600 temp_dst.writemask = WRITEMASK_Y;
1601 temp1.swizzle = SWIZZLE_YYYY;
1602 temp2.swizzle = SWIZZLE_ZZZZ;
1603 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1604 break;
1605 case 4:
1606 temp_dst.writemask = WRITEMASK_X;
1607 temp1.swizzle = SWIZZLE_XXXX;
1608 temp2.swizzle = SWIZZLE_YYYY;
1609 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1610 temp_dst.writemask = WRITEMASK_Y;
1611 temp1.swizzle = SWIZZLE_ZZZZ;
1612 temp2.swizzle = SWIZZLE_WWWW;
1613 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1614 }
1615
1616 temp1.swizzle = SWIZZLE_XXXX;
1617 temp2.swizzle = SWIZZLE_YYYY;
1618 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1619 } else {
1620 /* After the dot-product, the value will be an integer on the
1621 * range [0,4]. Zero stays zero, and positive values become 1.0.
1622 */
1623 glsl_to_tgsi_instruction *const dp =
1624 emit_dp(ir, result_dst, temp, temp, vector_elements);
1625 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1626 /* The clamping to [0,1] can be done for free in the fragment
1627 * shader with a saturate.
1628 */
1629 dp->saturate = true;
1630 } else {
1631 /* Negating the result of the dot-product gives values on the range
1632 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1633 * achieved using SLT.
1634 */
1635 st_src_reg slt_src = result_src;
1636 slt_src.negate = ~slt_src.negate;
1637 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1638 }
1639 }
1640 } else {
1641 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1642 }
1643 break;
1644
1645 case ir_unop_any: {
1646 assert(ir->operands[0]->type->is_vector());
1647
1648 /* After the dot-product, the value will be an integer on the
1649 * range [0,4]. Zero stays zero, and positive values become 1.0.
1650 */
1651 glsl_to_tgsi_instruction *const dp =
1652 emit_dp(ir, result_dst, op[0], op[0],
1653 ir->operands[0]->type->vector_elements);
1654 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1655 result_dst.type == GLSL_TYPE_FLOAT) {
1656 /* The clamping to [0,1] can be done for free in the fragment
1657 * shader with a saturate.
1658 */
1659 dp->saturate = true;
1660 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1661 /* Negating the result of the dot-product gives values on the range
1662 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1663 * is achieved using SLT.
1664 */
1665 st_src_reg slt_src = result_src;
1666 slt_src.negate = ~slt_src.negate;
1667 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1668 }
1669 else {
1670 /* Use SNE 0 if integers are being used as boolean values. */
1671 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1672 }
1673 break;
1674 }
1675
1676 case ir_binop_logic_xor:
1677 if (native_integers)
1678 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1679 else
1680 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1681 break;
1682
1683 case ir_binop_logic_or: {
1684 if (native_integers) {
1685 /* If integers are used as booleans, we can use an actual "or"
1686 * instruction.
1687 */
1688 assert(native_integers);
1689 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1690 } else {
1691 /* After the addition, the value will be an integer on the
1692 * range [0,2]. Zero stays zero, and positive values become 1.0.
1693 */
1694 glsl_to_tgsi_instruction *add =
1695 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1696 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1697 /* The clamping to [0,1] can be done for free in the fragment
1698 * shader with a saturate if floats are being used as boolean values.
1699 */
1700 add->saturate = true;
1701 } else {
1702 /* Negating the result of the addition gives values on the range
1703 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1704 * is achieved using SLT.
1705 */
1706 st_src_reg slt_src = result_src;
1707 slt_src.negate = ~slt_src.negate;
1708 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1709 }
1710 }
1711 break;
1712 }
1713
1714 case ir_binop_logic_and:
1715 /* If native integers are disabled, the bool args are stored as float 0.0
1716 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1717 * actual AND opcode.
1718 */
1719 if (native_integers)
1720 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1721 else
1722 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1723 break;
1724
1725 case ir_binop_dot:
1726 assert(ir->operands[0]->type->is_vector());
1727 assert(ir->operands[0]->type == ir->operands[1]->type);
1728 emit_dp(ir, result_dst, op[0], op[1],
1729 ir->operands[0]->type->vector_elements);
1730 break;
1731
1732 case ir_unop_sqrt:
1733 /* sqrt(x) = x * rsq(x). */
1734 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1735 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1736 /* For incoming channels <= 0, set the result to 0. */
1737 op[0].negate = ~op[0].negate;
1738 emit(ir, TGSI_OPCODE_CMP, result_dst,
1739 op[0], result_src, st_src_reg_for_float(0.0));
1740 break;
1741 case ir_unop_rsq:
1742 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1743 break;
1744 case ir_unop_i2f:
1745 if (native_integers) {
1746 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1747 break;
1748 }
1749 /* fallthrough to next case otherwise */
1750 case ir_unop_b2f:
1751 if (native_integers) {
1752 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1753 break;
1754 }
1755 /* fallthrough to next case otherwise */
1756 case ir_unop_i2u:
1757 case ir_unop_u2i:
1758 /* Converting between signed and unsigned integers is a no-op. */
1759 result_src = op[0];
1760 break;
1761 case ir_unop_b2i:
1762 if (native_integers) {
1763 /* Booleans are stored as integers using ~0 for true and 0 for false.
1764 * GLSL requires that int(bool) return 1 for true and 0 for false.
1765 * This conversion is done with AND, but it could be done with NEG.
1766 */
1767 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1768 } else {
1769 /* Booleans and integers are both stored as floats when native
1770 * integers are disabled.
1771 */
1772 result_src = op[0];
1773 }
1774 break;
1775 case ir_unop_f2i:
1776 if (native_integers)
1777 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1778 else
1779 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1780 break;
1781 case ir_unop_f2u:
1782 if (native_integers)
1783 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1784 else
1785 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1786 break;
1787 case ir_unop_bitcast_f2i:
1788 case ir_unop_bitcast_f2u:
1789 case ir_unop_bitcast_i2f:
1790 case ir_unop_bitcast_u2f:
1791 result_src = op[0];
1792 break;
1793 case ir_unop_f2b:
1794 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1795 break;
1796 case ir_unop_i2b:
1797 if (native_integers)
1798 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1799 else
1800 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1801 break;
1802 case ir_unop_trunc:
1803 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1804 break;
1805 case ir_unop_ceil:
1806 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1807 break;
1808 case ir_unop_floor:
1809 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1810 break;
1811 case ir_unop_round_even:
1812 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1813 break;
1814 case ir_unop_fract:
1815 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1816 break;
1817
1818 case ir_binop_min:
1819 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1820 break;
1821 case ir_binop_max:
1822 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1823 break;
1824 case ir_binop_pow:
1825 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1826 break;
1827
1828 case ir_unop_bit_not:
1829 if (native_integers) {
1830 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1831 break;
1832 }
1833 case ir_unop_u2f:
1834 if (native_integers) {
1835 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1836 break;
1837 }
1838 case ir_binop_lshift:
1839 if (native_integers) {
1840 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1841 break;
1842 }
1843 case ir_binop_rshift:
1844 if (native_integers) {
1845 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1846 break;
1847 }
1848 case ir_binop_bit_and:
1849 if (native_integers) {
1850 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1851 break;
1852 }
1853 case ir_binop_bit_xor:
1854 if (native_integers) {
1855 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1856 break;
1857 }
1858 case ir_binop_bit_or:
1859 if (native_integers) {
1860 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1861 break;
1862 }
1863
1864 assert(!"GLSL 1.30 features unsupported");
1865 break;
1866
1867 case ir_binop_ubo_load:
1868 assert(!"not yet supported");
1869 break;
1870
1871 case ir_quadop_vector:
1872 /* This operation should have already been handled.
1873 */
1874 assert(!"Should not get here.");
1875 break;
1876 }
1877
1878 this->result = result_src;
1879 }
1880
1881
1882 void
1883 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1884 {
1885 st_src_reg src;
1886 int i;
1887 int swizzle[4];
1888
1889 /* Note that this is only swizzles in expressions, not those on the left
1890 * hand side of an assignment, which do write masking. See ir_assignment
1891 * for that.
1892 */
1893
1894 ir->val->accept(this);
1895 src = this->result;
1896 assert(src.file != PROGRAM_UNDEFINED);
1897
1898 for (i = 0; i < 4; i++) {
1899 if (i < ir->type->vector_elements) {
1900 switch (i) {
1901 case 0:
1902 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1903 break;
1904 case 1:
1905 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1906 break;
1907 case 2:
1908 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1909 break;
1910 case 3:
1911 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1912 break;
1913 }
1914 } else {
1915 /* If the type is smaller than a vec4, replicate the last
1916 * channel out.
1917 */
1918 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1919 }
1920 }
1921
1922 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1923
1924 this->result = src;
1925 }
1926
1927 void
1928 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1929 {
1930 variable_storage *entry = find_variable_storage(ir->var);
1931 ir_variable *var = ir->var;
1932
1933 if (!entry) {
1934 switch (var->mode) {
1935 case ir_var_uniform:
1936 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1937 var->location);
1938 this->variables.push_tail(entry);
1939 break;
1940 case ir_var_in:
1941 case ir_var_inout:
1942 /* The linker assigns locations for varyings and attributes,
1943 * including deprecated builtins (like gl_Color), user-assign
1944 * generic attributes (glBindVertexLocation), and
1945 * user-defined varyings.
1946 *
1947 * FINISHME: We would hit this path for function arguments. Fix!
1948 */
1949 assert(var->location != -1);
1950 entry = new(mem_ctx) variable_storage(var,
1951 PROGRAM_INPUT,
1952 var->location);
1953 break;
1954 case ir_var_out:
1955 assert(var->location != -1);
1956 entry = new(mem_ctx) variable_storage(var,
1957 PROGRAM_OUTPUT,
1958 var->location + var->index);
1959 break;
1960 case ir_var_system_value:
1961 entry = new(mem_ctx) variable_storage(var,
1962 PROGRAM_SYSTEM_VALUE,
1963 var->location);
1964 break;
1965 case ir_var_auto:
1966 case ir_var_temporary:
1967 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1968 this->next_temp);
1969 this->variables.push_tail(entry);
1970
1971 next_temp += type_size(var->type);
1972 break;
1973 }
1974
1975 if (!entry) {
1976 printf("Failed to make storage for %s\n", var->name);
1977 exit(1);
1978 }
1979 }
1980
1981 this->result = st_src_reg(entry->file, entry->index, var->type);
1982 if (!native_integers)
1983 this->result.type = GLSL_TYPE_FLOAT;
1984 }
1985
1986 void
1987 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
1988 {
1989 ir_constant *index;
1990 st_src_reg src;
1991 int element_size = type_size(ir->type);
1992
1993 index = ir->array_index->constant_expression_value();
1994
1995 ir->array->accept(this);
1996 src = this->result;
1997
1998 if (index) {
1999 src.index += index->value.i[0] * element_size;
2000 } else {
2001 /* Variable index array dereference. It eats the "vec4" of the
2002 * base of the array and an index that offsets the TGSI register
2003 * index.
2004 */
2005 ir->array_index->accept(this);
2006
2007 st_src_reg index_reg;
2008
2009 if (element_size == 1) {
2010 index_reg = this->result;
2011 } else {
2012 index_reg = get_temp(native_integers ?
2013 glsl_type::int_type : glsl_type::float_type);
2014
2015 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2016 this->result, st_src_reg_for_type(index_reg.type, element_size));
2017 }
2018
2019 /* If there was already a relative address register involved, add the
2020 * new and the old together to get the new offset.
2021 */
2022 if (src.reladdr != NULL) {
2023 st_src_reg accum_reg = get_temp(native_integers ?
2024 glsl_type::int_type : glsl_type::float_type);
2025
2026 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2027 index_reg, *src.reladdr);
2028
2029 index_reg = accum_reg;
2030 }
2031
2032 src.reladdr = ralloc(mem_ctx, st_src_reg);
2033 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2034 }
2035
2036 /* If the type is smaller than a vec4, replicate the last channel out. */
2037 if (ir->type->is_scalar() || ir->type->is_vector())
2038 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2039 else
2040 src.swizzle = SWIZZLE_NOOP;
2041
2042 this->result = src;
2043 }
2044
2045 void
2046 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2047 {
2048 unsigned int i;
2049 const glsl_type *struct_type = ir->record->type;
2050 int offset = 0;
2051
2052 ir->record->accept(this);
2053
2054 for (i = 0; i < struct_type->length; i++) {
2055 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2056 break;
2057 offset += type_size(struct_type->fields.structure[i].type);
2058 }
2059
2060 /* If the type is smaller than a vec4, replicate the last channel out. */
2061 if (ir->type->is_scalar() || ir->type->is_vector())
2062 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2063 else
2064 this->result.swizzle = SWIZZLE_NOOP;
2065
2066 this->result.index += offset;
2067 }
2068
2069 /**
2070 * We want to be careful in assignment setup to hit the actual storage
2071 * instead of potentially using a temporary like we might with the
2072 * ir_dereference handler.
2073 */
2074 static st_dst_reg
2075 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2076 {
2077 /* The LHS must be a dereference. If the LHS is a variable indexed array
2078 * access of a vector, it must be separated into a series conditional moves
2079 * before reaching this point (see ir_vec_index_to_cond_assign).
2080 */
2081 assert(ir->as_dereference());
2082 ir_dereference_array *deref_array = ir->as_dereference_array();
2083 if (deref_array) {
2084 assert(!deref_array->array->type->is_vector());
2085 }
2086
2087 /* Use the rvalue deref handler for the most part. We'll ignore
2088 * swizzles in it and write swizzles using writemask, though.
2089 */
2090 ir->accept(v);
2091 return st_dst_reg(v->result);
2092 }
2093
2094 /**
2095 * Process the condition of a conditional assignment
2096 *
2097 * Examines the condition of a conditional assignment to generate the optimal
2098 * first operand of a \c CMP instruction. If the condition is a relational
2099 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2100 * used as the source for the \c CMP instruction. Otherwise the comparison
2101 * is processed to a boolean result, and the boolean result is used as the
2102 * operand to the CMP instruction.
2103 */
2104 bool
2105 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2106 {
2107 ir_rvalue *src_ir = ir;
2108 bool negate = true;
2109 bool switch_order = false;
2110
2111 ir_expression *const expr = ir->as_expression();
2112 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2113 bool zero_on_left = false;
2114
2115 if (expr->operands[0]->is_zero()) {
2116 src_ir = expr->operands[1];
2117 zero_on_left = true;
2118 } else if (expr->operands[1]->is_zero()) {
2119 src_ir = expr->operands[0];
2120 zero_on_left = false;
2121 }
2122
2123 /* a is - 0 + - 0 +
2124 * (a < 0) T F F ( a < 0) T F F
2125 * (0 < a) F F T (-a < 0) F F T
2126 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2127 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2128 * (a > 0) F F T (-a < 0) F F T
2129 * (0 > a) T F F ( a < 0) T F F
2130 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2131 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2132 *
2133 * Note that exchanging the order of 0 and 'a' in the comparison simply
2134 * means that the value of 'a' should be negated.
2135 */
2136 if (src_ir != ir) {
2137 switch (expr->operation) {
2138 case ir_binop_less:
2139 switch_order = false;
2140 negate = zero_on_left;
2141 break;
2142
2143 case ir_binop_greater:
2144 switch_order = false;
2145 negate = !zero_on_left;
2146 break;
2147
2148 case ir_binop_lequal:
2149 switch_order = true;
2150 negate = !zero_on_left;
2151 break;
2152
2153 case ir_binop_gequal:
2154 switch_order = true;
2155 negate = zero_on_left;
2156 break;
2157
2158 default:
2159 /* This isn't the right kind of comparison afterall, so make sure
2160 * the whole condition is visited.
2161 */
2162 src_ir = ir;
2163 break;
2164 }
2165 }
2166 }
2167
2168 src_ir->accept(this);
2169
2170 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2171 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2172 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2173 * computing the condition.
2174 */
2175 if (negate)
2176 this->result.negate = ~this->result.negate;
2177
2178 return switch_order;
2179 }
2180
2181 void
2182 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2183 {
2184 st_dst_reg l;
2185 st_src_reg r;
2186 int i;
2187
2188 ir->rhs->accept(this);
2189 r = this->result;
2190
2191 l = get_assignment_lhs(ir->lhs, this);
2192
2193 /* FINISHME: This should really set to the correct maximal writemask for each
2194 * FINISHME: component written (in the loops below). This case can only
2195 * FINISHME: occur for matrices, arrays, and structures.
2196 */
2197 if (ir->write_mask == 0) {
2198 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2199 l.writemask = WRITEMASK_XYZW;
2200 } else if (ir->lhs->type->is_scalar() &&
2201 ir->lhs->variable_referenced()->mode == ir_var_out) {
2202 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2203 * FINISHME: W component of fragment shader output zero, work correctly.
2204 */
2205 l.writemask = WRITEMASK_XYZW;
2206 } else {
2207 int swizzles[4];
2208 int first_enabled_chan = 0;
2209 int rhs_chan = 0;
2210
2211 l.writemask = ir->write_mask;
2212
2213 for (int i = 0; i < 4; i++) {
2214 if (l.writemask & (1 << i)) {
2215 first_enabled_chan = GET_SWZ(r.swizzle, i);
2216 break;
2217 }
2218 }
2219
2220 /* Swizzle a small RHS vector into the channels being written.
2221 *
2222 * glsl ir treats write_mask as dictating how many channels are
2223 * present on the RHS while TGSI treats write_mask as just
2224 * showing which channels of the vec4 RHS get written.
2225 */
2226 for (int i = 0; i < 4; i++) {
2227 if (l.writemask & (1 << i))
2228 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2229 else
2230 swizzles[i] = first_enabled_chan;
2231 }
2232 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2233 swizzles[2], swizzles[3]);
2234 }
2235
2236 assert(l.file != PROGRAM_UNDEFINED);
2237 assert(r.file != PROGRAM_UNDEFINED);
2238
2239 if (ir->condition) {
2240 const bool switch_order = this->process_move_condition(ir->condition);
2241 st_src_reg condition = this->result;
2242
2243 for (i = 0; i < type_size(ir->lhs->type); i++) {
2244 st_src_reg l_src = st_src_reg(l);
2245 st_src_reg condition_temp = condition;
2246 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2247
2248 if (native_integers) {
2249 /* This is necessary because TGSI's CMP instruction expects the
2250 * condition to be a float, and we store booleans as integers.
2251 * If TGSI had a UCMP instruction or similar, this extra
2252 * instruction would not be necessary.
2253 */
2254 condition_temp = get_temp(glsl_type::vec4_type);
2255 condition.negate = 0;
2256 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2257 condition_temp.swizzle = condition.swizzle;
2258 }
2259
2260 if (switch_order) {
2261 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2262 } else {
2263 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2264 }
2265
2266 l.index++;
2267 r.index++;
2268 }
2269 } else if (ir->rhs->as_expression() &&
2270 this->instructions.get_tail() &&
2271 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2272 type_size(ir->lhs->type) == 1 &&
2273 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2274 /* To avoid emitting an extra MOV when assigning an expression to a
2275 * variable, emit the last instruction of the expression again, but
2276 * replace the destination register with the target of the assignment.
2277 * Dead code elimination will remove the original instruction.
2278 */
2279 glsl_to_tgsi_instruction *inst, *new_inst;
2280 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2281 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2282 new_inst->saturate = inst->saturate;
2283 inst->dead_mask = inst->dst.writemask;
2284 } else {
2285 for (i = 0; i < type_size(ir->lhs->type); i++) {
2286 emit(ir, TGSI_OPCODE_MOV, l, r);
2287 l.index++;
2288 r.index++;
2289 }
2290 }
2291 }
2292
2293
2294 void
2295 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2296 {
2297 st_src_reg src;
2298 GLfloat stack_vals[4] = { 0 };
2299 gl_constant_value *values = (gl_constant_value *) stack_vals;
2300 GLenum gl_type = GL_NONE;
2301 unsigned int i;
2302 static int in_array = 0;
2303 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2304
2305 /* Unfortunately, 4 floats is all we can get into
2306 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2307 * aggregate constant and move each constant value into it. If we
2308 * get lucky, copy propagation will eliminate the extra moves.
2309 */
2310 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2311 st_src_reg temp_base = get_temp(ir->type);
2312 st_dst_reg temp = st_dst_reg(temp_base);
2313
2314 foreach_iter(exec_list_iterator, iter, ir->components) {
2315 ir_constant *field_value = (ir_constant *)iter.get();
2316 int size = type_size(field_value->type);
2317
2318 assert(size > 0);
2319
2320 field_value->accept(this);
2321 src = this->result;
2322
2323 for (i = 0; i < (unsigned int)size; i++) {
2324 emit(ir, TGSI_OPCODE_MOV, temp, src);
2325
2326 src.index++;
2327 temp.index++;
2328 }
2329 }
2330 this->result = temp_base;
2331 return;
2332 }
2333
2334 if (ir->type->is_array()) {
2335 st_src_reg temp_base = get_temp(ir->type);
2336 st_dst_reg temp = st_dst_reg(temp_base);
2337 int size = type_size(ir->type->fields.array);
2338
2339 assert(size > 0);
2340 in_array++;
2341
2342 for (i = 0; i < ir->type->length; i++) {
2343 ir->array_elements[i]->accept(this);
2344 src = this->result;
2345 for (int j = 0; j < size; j++) {
2346 emit(ir, TGSI_OPCODE_MOV, temp, src);
2347
2348 src.index++;
2349 temp.index++;
2350 }
2351 }
2352 this->result = temp_base;
2353 in_array--;
2354 return;
2355 }
2356
2357 if (ir->type->is_matrix()) {
2358 st_src_reg mat = get_temp(ir->type);
2359 st_dst_reg mat_column = st_dst_reg(mat);
2360
2361 for (i = 0; i < ir->type->matrix_columns; i++) {
2362 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2363 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2364
2365 src = st_src_reg(file, -1, ir->type->base_type);
2366 src.index = add_constant(file,
2367 values,
2368 ir->type->vector_elements,
2369 GL_FLOAT,
2370 &src.swizzle);
2371 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2372
2373 mat_column.index++;
2374 }
2375
2376 this->result = mat;
2377 return;
2378 }
2379
2380 switch (ir->type->base_type) {
2381 case GLSL_TYPE_FLOAT:
2382 gl_type = GL_FLOAT;
2383 for (i = 0; i < ir->type->vector_elements; i++) {
2384 values[i].f = ir->value.f[i];
2385 }
2386 break;
2387 case GLSL_TYPE_UINT:
2388 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2389 for (i = 0; i < ir->type->vector_elements; i++) {
2390 if (native_integers)
2391 values[i].u = ir->value.u[i];
2392 else
2393 values[i].f = ir->value.u[i];
2394 }
2395 break;
2396 case GLSL_TYPE_INT:
2397 gl_type = native_integers ? GL_INT : GL_FLOAT;
2398 for (i = 0; i < ir->type->vector_elements; i++) {
2399 if (native_integers)
2400 values[i].i = ir->value.i[i];
2401 else
2402 values[i].f = ir->value.i[i];
2403 }
2404 break;
2405 case GLSL_TYPE_BOOL:
2406 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2407 for (i = 0; i < ir->type->vector_elements; i++) {
2408 if (native_integers)
2409 values[i].u = ir->value.b[i] ? ~0 : 0;
2410 else
2411 values[i].f = ir->value.b[i];
2412 }
2413 break;
2414 default:
2415 assert(!"Non-float/uint/int/bool constant");
2416 }
2417
2418 this->result = st_src_reg(file, -1, ir->type);
2419 this->result.index = add_constant(file,
2420 values,
2421 ir->type->vector_elements,
2422 gl_type,
2423 &this->result.swizzle);
2424 }
2425
2426 function_entry *
2427 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2428 {
2429 function_entry *entry;
2430
2431 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2432 entry = (function_entry *)iter.get();
2433
2434 if (entry->sig == sig)
2435 return entry;
2436 }
2437
2438 entry = ralloc(mem_ctx, function_entry);
2439 entry->sig = sig;
2440 entry->sig_id = this->next_signature_id++;
2441 entry->bgn_inst = NULL;
2442
2443 /* Allocate storage for all the parameters. */
2444 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2445 ir_variable *param = (ir_variable *)iter.get();
2446 variable_storage *storage;
2447
2448 storage = find_variable_storage(param);
2449 assert(!storage);
2450
2451 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2452 this->next_temp);
2453 this->variables.push_tail(storage);
2454
2455 this->next_temp += type_size(param->type);
2456 }
2457
2458 if (!sig->return_type->is_void()) {
2459 entry->return_reg = get_temp(sig->return_type);
2460 } else {
2461 entry->return_reg = undef_src;
2462 }
2463
2464 this->function_signatures.push_tail(entry);
2465 return entry;
2466 }
2467
2468 void
2469 glsl_to_tgsi_visitor::visit(ir_call *ir)
2470 {
2471 glsl_to_tgsi_instruction *call_inst;
2472 ir_function_signature *sig = ir->callee;
2473 function_entry *entry = get_function_signature(sig);
2474 int i;
2475
2476 /* Process in parameters. */
2477 exec_list_iterator sig_iter = sig->parameters.iterator();
2478 foreach_iter(exec_list_iterator, iter, *ir) {
2479 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2480 ir_variable *param = (ir_variable *)sig_iter.get();
2481
2482 if (param->mode == ir_var_in ||
2483 param->mode == ir_var_inout) {
2484 variable_storage *storage = find_variable_storage(param);
2485 assert(storage);
2486
2487 param_rval->accept(this);
2488 st_src_reg r = this->result;
2489
2490 st_dst_reg l;
2491 l.file = storage->file;
2492 l.index = storage->index;
2493 l.reladdr = NULL;
2494 l.writemask = WRITEMASK_XYZW;
2495 l.cond_mask = COND_TR;
2496
2497 for (i = 0; i < type_size(param->type); i++) {
2498 emit(ir, TGSI_OPCODE_MOV, l, r);
2499 l.index++;
2500 r.index++;
2501 }
2502 }
2503
2504 sig_iter.next();
2505 }
2506 assert(!sig_iter.has_next());
2507
2508 /* Emit call instruction */
2509 call_inst = emit(ir, TGSI_OPCODE_CAL);
2510 call_inst->function = entry;
2511
2512 /* Process out parameters. */
2513 sig_iter = sig->parameters.iterator();
2514 foreach_iter(exec_list_iterator, iter, *ir) {
2515 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2516 ir_variable *param = (ir_variable *)sig_iter.get();
2517
2518 if (param->mode == ir_var_out ||
2519 param->mode == ir_var_inout) {
2520 variable_storage *storage = find_variable_storage(param);
2521 assert(storage);
2522
2523 st_src_reg r;
2524 r.file = storage->file;
2525 r.index = storage->index;
2526 r.reladdr = NULL;
2527 r.swizzle = SWIZZLE_NOOP;
2528 r.negate = 0;
2529
2530 param_rval->accept(this);
2531 st_dst_reg l = st_dst_reg(this->result);
2532
2533 for (i = 0; i < type_size(param->type); i++) {
2534 emit(ir, TGSI_OPCODE_MOV, l, r);
2535 l.index++;
2536 r.index++;
2537 }
2538 }
2539
2540 sig_iter.next();
2541 }
2542 assert(!sig_iter.has_next());
2543
2544 /* Process return value. */
2545 this->result = entry->return_reg;
2546 }
2547
2548 void
2549 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2550 {
2551 st_src_reg result_src, coord, lod_info, projector, dx, dy, offset;
2552 st_dst_reg result_dst, coord_dst;
2553 glsl_to_tgsi_instruction *inst = NULL;
2554 unsigned opcode = TGSI_OPCODE_NOP;
2555
2556 if (ir->coordinate) {
2557 ir->coordinate->accept(this);
2558
2559 /* Put our coords in a temp. We'll need to modify them for shadow,
2560 * projection, or LOD, so the only case we'd use it as is is if
2561 * we're doing plain old texturing. The optimization passes on
2562 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2563 */
2564 coord = get_temp(glsl_type::vec4_type);
2565 coord_dst = st_dst_reg(coord);
2566 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2567 }
2568
2569 if (ir->projector) {
2570 ir->projector->accept(this);
2571 projector = this->result;
2572 }
2573
2574 /* Storage for our result. Ideally for an assignment we'd be using
2575 * the actual storage for the result here, instead.
2576 */
2577 result_src = get_temp(glsl_type::vec4_type);
2578 result_dst = st_dst_reg(result_src);
2579
2580 switch (ir->op) {
2581 case ir_tex:
2582 opcode = TGSI_OPCODE_TEX;
2583 break;
2584 case ir_txb:
2585 opcode = TGSI_OPCODE_TXB;
2586 ir->lod_info.bias->accept(this);
2587 lod_info = this->result;
2588 break;
2589 case ir_txl:
2590 opcode = TGSI_OPCODE_TXL;
2591 ir->lod_info.lod->accept(this);
2592 lod_info = this->result;
2593 break;
2594 case ir_txd:
2595 opcode = TGSI_OPCODE_TXD;
2596 ir->lod_info.grad.dPdx->accept(this);
2597 dx = this->result;
2598 ir->lod_info.grad.dPdy->accept(this);
2599 dy = this->result;
2600 break;
2601 case ir_txs:
2602 opcode = TGSI_OPCODE_TXQ;
2603 ir->lod_info.lod->accept(this);
2604 lod_info = this->result;
2605 break;
2606 case ir_txf:
2607 opcode = TGSI_OPCODE_TXF;
2608 ir->lod_info.lod->accept(this);
2609 lod_info = this->result;
2610 if (ir->offset) {
2611 ir->offset->accept(this);
2612 offset = this->result;
2613 }
2614 break;
2615 }
2616
2617 const glsl_type *sampler_type = ir->sampler->type;
2618
2619 if (ir->projector) {
2620 if (opcode == TGSI_OPCODE_TEX) {
2621 /* Slot the projector in as the last component of the coord. */
2622 coord_dst.writemask = WRITEMASK_W;
2623 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2624 coord_dst.writemask = WRITEMASK_XYZW;
2625 opcode = TGSI_OPCODE_TXP;
2626 } else {
2627 st_src_reg coord_w = coord;
2628 coord_w.swizzle = SWIZZLE_WWWW;
2629
2630 /* For the other TEX opcodes there's no projective version
2631 * since the last slot is taken up by LOD info. Do the
2632 * projective divide now.
2633 */
2634 coord_dst.writemask = WRITEMASK_W;
2635 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2636
2637 /* In the case where we have to project the coordinates "by hand,"
2638 * the shadow comparator value must also be projected.
2639 */
2640 st_src_reg tmp_src = coord;
2641 if (ir->shadow_comparitor) {
2642 /* Slot the shadow value in as the second to last component of the
2643 * coord.
2644 */
2645 ir->shadow_comparitor->accept(this);
2646
2647 tmp_src = get_temp(glsl_type::vec4_type);
2648 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2649
2650 /* Projective division not allowed for array samplers. */
2651 assert(!sampler_type->sampler_array);
2652
2653 tmp_dst.writemask = WRITEMASK_Z;
2654 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2655
2656 tmp_dst.writemask = WRITEMASK_XY;
2657 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2658 }
2659
2660 coord_dst.writemask = WRITEMASK_XYZ;
2661 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2662
2663 coord_dst.writemask = WRITEMASK_XYZW;
2664 coord.swizzle = SWIZZLE_XYZW;
2665 }
2666 }
2667
2668 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2669 * comparator was put in the correct place (and projected) by the code,
2670 * above, that handles by-hand projection.
2671 */
2672 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2673 /* Slot the shadow value in as the second to last component of the
2674 * coord.
2675 */
2676 ir->shadow_comparitor->accept(this);
2677
2678 /* XXX This will need to be updated for cubemap array samplers. */
2679 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2680 sampler_type->sampler_array) ||
2681 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2682 coord_dst.writemask = WRITEMASK_W;
2683 } else {
2684 coord_dst.writemask = WRITEMASK_Z;
2685 }
2686
2687 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2688 coord_dst.writemask = WRITEMASK_XYZW;
2689 }
2690
2691 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2692 opcode == TGSI_OPCODE_TXF) {
2693 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2694 coord_dst.writemask = WRITEMASK_W;
2695 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2696 coord_dst.writemask = WRITEMASK_XYZW;
2697 }
2698
2699 if (opcode == TGSI_OPCODE_TXD)
2700 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2701 else if (opcode == TGSI_OPCODE_TXQ)
2702 inst = emit(ir, opcode, result_dst, lod_info);
2703 else if (opcode == TGSI_OPCODE_TXF) {
2704 inst = emit(ir, opcode, result_dst, coord);
2705 } else
2706 inst = emit(ir, opcode, result_dst, coord);
2707
2708 if (ir->shadow_comparitor)
2709 inst->tex_shadow = GL_TRUE;
2710
2711 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2712 this->shader_program,
2713 this->prog);
2714
2715 if (ir->offset) {
2716 inst->tex_offset_num_offset = 1;
2717 inst->tex_offsets[0].Index = offset.index;
2718 inst->tex_offsets[0].File = offset.file;
2719 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2720 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2721 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2722 }
2723
2724 switch (sampler_type->sampler_dimensionality) {
2725 case GLSL_SAMPLER_DIM_1D:
2726 inst->tex_target = (sampler_type->sampler_array)
2727 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2728 break;
2729 case GLSL_SAMPLER_DIM_2D:
2730 inst->tex_target = (sampler_type->sampler_array)
2731 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2732 break;
2733 case GLSL_SAMPLER_DIM_3D:
2734 inst->tex_target = TEXTURE_3D_INDEX;
2735 break;
2736 case GLSL_SAMPLER_DIM_CUBE:
2737 inst->tex_target = TEXTURE_CUBE_INDEX;
2738 break;
2739 case GLSL_SAMPLER_DIM_RECT:
2740 inst->tex_target = TEXTURE_RECT_INDEX;
2741 break;
2742 case GLSL_SAMPLER_DIM_BUF:
2743 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2744 break;
2745 case GLSL_SAMPLER_DIM_EXTERNAL:
2746 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2747 break;
2748 default:
2749 assert(!"Should not get here.");
2750 }
2751
2752 this->result = result_src;
2753 }
2754
2755 void
2756 glsl_to_tgsi_visitor::visit(ir_return *ir)
2757 {
2758 if (ir->get_value()) {
2759 st_dst_reg l;
2760 int i;
2761
2762 assert(current_function);
2763
2764 ir->get_value()->accept(this);
2765 st_src_reg r = this->result;
2766
2767 l = st_dst_reg(current_function->return_reg);
2768
2769 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2770 emit(ir, TGSI_OPCODE_MOV, l, r);
2771 l.index++;
2772 r.index++;
2773 }
2774 }
2775
2776 emit(ir, TGSI_OPCODE_RET);
2777 }
2778
2779 void
2780 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2781 {
2782 if (ir->condition) {
2783 ir->condition->accept(this);
2784 this->result.negate = ~this->result.negate;
2785 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2786 } else {
2787 emit(ir, TGSI_OPCODE_KILP);
2788 }
2789 }
2790
2791 void
2792 glsl_to_tgsi_visitor::visit(ir_if *ir)
2793 {
2794 glsl_to_tgsi_instruction *cond_inst, *if_inst;
2795 glsl_to_tgsi_instruction *prev_inst;
2796
2797 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2798
2799 ir->condition->accept(this);
2800 assert(this->result.file != PROGRAM_UNDEFINED);
2801
2802 if (this->options->EmitCondCodes) {
2803 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2804
2805 /* See if we actually generated any instruction for generating
2806 * the condition. If not, then cook up a move to a temp so we
2807 * have something to set cond_update on.
2808 */
2809 if (cond_inst == prev_inst) {
2810 st_src_reg temp = get_temp(glsl_type::bool_type);
2811 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result);
2812 }
2813 cond_inst->cond_update = GL_TRUE;
2814
2815 if_inst = emit(ir->condition, TGSI_OPCODE_IF);
2816 if_inst->dst.cond_mask = COND_NE;
2817 } else {
2818 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2819 }
2820
2821 this->instructions.push_tail(if_inst);
2822
2823 visit_exec_list(&ir->then_instructions, this);
2824
2825 if (!ir->else_instructions.is_empty()) {
2826 emit(ir->condition, TGSI_OPCODE_ELSE);
2827 visit_exec_list(&ir->else_instructions, this);
2828 }
2829
2830 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2831 }
2832
2833 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2834 {
2835 result.file = PROGRAM_UNDEFINED;
2836 next_temp = 1;
2837 next_signature_id = 1;
2838 num_immediates = 0;
2839 current_function = NULL;
2840 num_address_regs = 0;
2841 samplers_used = 0;
2842 indirect_addr_temps = false;
2843 indirect_addr_consts = false;
2844 glsl_version = 0;
2845 native_integers = false;
2846 mem_ctx = ralloc_context(NULL);
2847 ctx = NULL;
2848 prog = NULL;
2849 shader_program = NULL;
2850 options = NULL;
2851 }
2852
2853 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2854 {
2855 ralloc_free(mem_ctx);
2856 }
2857
2858 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2859 {
2860 delete v;
2861 }
2862
2863
2864 /**
2865 * Count resources used by the given gpu program (number of texture
2866 * samplers, etc).
2867 */
2868 static void
2869 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2870 {
2871 v->samplers_used = 0;
2872
2873 foreach_iter(exec_list_iterator, iter, v->instructions) {
2874 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2875
2876 if (is_tex_instruction(inst->op)) {
2877 v->samplers_used |= 1 << inst->sampler;
2878
2879 if (inst->tex_shadow) {
2880 prog->ShadowSamplers |= 1 << inst->sampler;
2881 }
2882 }
2883 }
2884
2885 prog->SamplersUsed = v->samplers_used;
2886
2887 if (v->shader_program != NULL)
2888 _mesa_update_shader_textures_used(v->shader_program, prog);
2889 }
2890
2891 static void
2892 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2893 struct gl_shader_program *shader_program,
2894 const char *name, const glsl_type *type,
2895 ir_constant *val)
2896 {
2897 if (type->is_record()) {
2898 ir_constant *field_constant;
2899
2900 field_constant = (ir_constant *)val->components.get_head();
2901
2902 for (unsigned int i = 0; i < type->length; i++) {
2903 const glsl_type *field_type = type->fields.structure[i].type;
2904 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2905 type->fields.structure[i].name);
2906 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2907 field_type, field_constant);
2908 field_constant = (ir_constant *)field_constant->next;
2909 }
2910 return;
2911 }
2912
2913 unsigned offset;
2914 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
2915 &offset);
2916 if (offset == GL_INVALID_INDEX) {
2917 fail_link(shader_program,
2918 "Couldn't find uniform for initializer %s\n", name);
2919 return;
2920 }
2921 int loc = _mesa_uniform_merge_location_offset(index, offset);
2922
2923 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2924 ir_constant *element;
2925 const glsl_type *element_type;
2926 if (type->is_array()) {
2927 element = val->array_elements[i];
2928 element_type = type->fields.array;
2929 } else {
2930 element = val;
2931 element_type = type;
2932 }
2933
2934 void *values;
2935
2936 if (element_type->base_type == GLSL_TYPE_BOOL) {
2937 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2938 for (unsigned int j = 0; j < element_type->components(); j++) {
2939 conv[j] = element->value.b[j];
2940 }
2941 values = (void *)conv;
2942 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2943 element_type->vector_elements,
2944 1);
2945 } else {
2946 values = &element->value;
2947 }
2948
2949 if (element_type->is_matrix()) {
2950 _mesa_uniform_matrix(ctx, shader_program,
2951 element_type->matrix_columns,
2952 element_type->vector_elements,
2953 loc, 1, GL_FALSE, (GLfloat *)values);
2954 } else {
2955 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2956 values, element_type->gl_type);
2957 }
2958
2959 loc++;
2960 }
2961 }
2962
2963 /**
2964 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
2965 * are read from the given src in this instruction
2966 */
2967 static int
2968 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
2969 {
2970 int read_mask = 0, comp;
2971
2972 /* Now, given the src swizzle and the written channels, find which
2973 * components are actually read
2974 */
2975 for (comp = 0; comp < 4; ++comp) {
2976 const unsigned coord = GET_SWZ(src.swizzle, comp);
2977 ASSERT(coord < 4);
2978 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
2979 read_mask |= 1 << coord;
2980 }
2981
2982 return read_mask;
2983 }
2984
2985 /**
2986 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
2987 * instruction is the first instruction to write to register T0. There are
2988 * several lowering passes done in GLSL IR (e.g. branches and
2989 * relative addressing) that create a large number of conditional assignments
2990 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
2991 *
2992 * Here is why this conversion is safe:
2993 * CMP T0, T1 T2 T0 can be expanded to:
2994 * if (T1 < 0.0)
2995 * MOV T0, T2;
2996 * else
2997 * MOV T0, T0;
2998 *
2999 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3000 * as the original program. If (T1 < 0.0) evaluates to false, executing
3001 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3002 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3003 * because any instruction that was going to read from T0 after this was going
3004 * to read a garbage value anyway.
3005 */
3006 void
3007 glsl_to_tgsi_visitor::simplify_cmp(void)
3008 {
3009 unsigned *tempWrites;
3010 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3011
3012 tempWrites = new unsigned[MAX_TEMPS];
3013 if (!tempWrites) {
3014 return;
3015 }
3016 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3017 memset(outputWrites, 0, sizeof(outputWrites));
3018
3019 foreach_iter(exec_list_iterator, iter, this->instructions) {
3020 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3021 unsigned prevWriteMask = 0;
3022
3023 /* Give up if we encounter relative addressing or flow control. */
3024 if (inst->dst.reladdr ||
3025 tgsi_get_opcode_info(inst->op)->is_branch ||
3026 inst->op == TGSI_OPCODE_BGNSUB ||
3027 inst->op == TGSI_OPCODE_CONT ||
3028 inst->op == TGSI_OPCODE_END ||
3029 inst->op == TGSI_OPCODE_ENDSUB ||
3030 inst->op == TGSI_OPCODE_RET) {
3031 break;
3032 }
3033
3034 if (inst->dst.file == PROGRAM_OUTPUT) {
3035 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3036 prevWriteMask = outputWrites[inst->dst.index];
3037 outputWrites[inst->dst.index] |= inst->dst.writemask;
3038 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3039 assert(inst->dst.index < MAX_TEMPS);
3040 prevWriteMask = tempWrites[inst->dst.index];
3041 tempWrites[inst->dst.index] |= inst->dst.writemask;
3042 }
3043
3044 /* For a CMP to be considered a conditional write, the destination
3045 * register and source register two must be the same. */
3046 if (inst->op == TGSI_OPCODE_CMP
3047 && !(inst->dst.writemask & prevWriteMask)
3048 && inst->src[2].file == inst->dst.file
3049 && inst->src[2].index == inst->dst.index
3050 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3051
3052 inst->op = TGSI_OPCODE_MOV;
3053 inst->src[0] = inst->src[1];
3054 }
3055 }
3056
3057 delete [] tempWrites;
3058 }
3059
3060 /* Replaces all references to a temporary register index with another index. */
3061 void
3062 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3063 {
3064 foreach_iter(exec_list_iterator, iter, this->instructions) {
3065 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3066 unsigned j;
3067
3068 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3069 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3070 inst->src[j].index == index) {
3071 inst->src[j].index = new_index;
3072 }
3073 }
3074
3075 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3076 inst->dst.index = new_index;
3077 }
3078 }
3079 }
3080
3081 int
3082 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3083 {
3084 int depth = 0; /* loop depth */
3085 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3086 unsigned i = 0, j;
3087
3088 foreach_iter(exec_list_iterator, iter, this->instructions) {
3089 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3090
3091 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3092 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3093 inst->src[j].index == index) {
3094 return (depth == 0) ? i : loop_start;
3095 }
3096 }
3097
3098 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3099 if(depth++ == 0)
3100 loop_start = i;
3101 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3102 if (--depth == 0)
3103 loop_start = -1;
3104 }
3105 assert(depth >= 0);
3106
3107 i++;
3108 }
3109
3110 return -1;
3111 }
3112
3113 int
3114 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3115 {
3116 int depth = 0; /* loop depth */
3117 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3118 int i = 0;
3119
3120 foreach_iter(exec_list_iterator, iter, this->instructions) {
3121 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3122
3123 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3124 return (depth == 0) ? i : loop_start;
3125 }
3126
3127 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3128 if(depth++ == 0)
3129 loop_start = i;
3130 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3131 if (--depth == 0)
3132 loop_start = -1;
3133 }
3134 assert(depth >= 0);
3135
3136 i++;
3137 }
3138
3139 return -1;
3140 }
3141
3142 int
3143 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3144 {
3145 int depth = 0; /* loop depth */
3146 int last = -1; /* index of last instruction that reads the temporary */
3147 unsigned i = 0, j;
3148
3149 foreach_iter(exec_list_iterator, iter, this->instructions) {
3150 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3151
3152 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3153 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3154 inst->src[j].index == index) {
3155 last = (depth == 0) ? i : -2;
3156 }
3157 }
3158
3159 if (inst->op == TGSI_OPCODE_BGNLOOP)
3160 depth++;
3161 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3162 if (--depth == 0 && last == -2)
3163 last = i;
3164 assert(depth >= 0);
3165
3166 i++;
3167 }
3168
3169 assert(last >= -1);
3170 return last;
3171 }
3172
3173 int
3174 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3175 {
3176 int depth = 0; /* loop depth */
3177 int last = -1; /* index of last instruction that writes to the temporary */
3178 int i = 0;
3179
3180 foreach_iter(exec_list_iterator, iter, this->instructions) {
3181 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3182
3183 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3184 last = (depth == 0) ? i : -2;
3185
3186 if (inst->op == TGSI_OPCODE_BGNLOOP)
3187 depth++;
3188 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3189 if (--depth == 0 && last == -2)
3190 last = i;
3191 assert(depth >= 0);
3192
3193 i++;
3194 }
3195
3196 assert(last >= -1);
3197 return last;
3198 }
3199
3200 /*
3201 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3202 * channels for copy propagation and updates following instructions to
3203 * use the original versions.
3204 *
3205 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3206 * will occur. As an example, a TXP production before this pass:
3207 *
3208 * 0: MOV TEMP[1], INPUT[4].xyyy;
3209 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3210 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3211 *
3212 * and after:
3213 *
3214 * 0: MOV TEMP[1], INPUT[4].xyyy;
3215 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3216 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3217 *
3218 * which allows for dead code elimination on TEMP[1]'s writes.
3219 */
3220 void
3221 glsl_to_tgsi_visitor::copy_propagate(void)
3222 {
3223 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3224 glsl_to_tgsi_instruction *,
3225 this->next_temp * 4);
3226 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3227 int level = 0;
3228
3229 foreach_iter(exec_list_iterator, iter, this->instructions) {
3230 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3231
3232 assert(inst->dst.file != PROGRAM_TEMPORARY
3233 || inst->dst.index < this->next_temp);
3234
3235 /* First, do any copy propagation possible into the src regs. */
3236 for (int r = 0; r < 3; r++) {
3237 glsl_to_tgsi_instruction *first = NULL;
3238 bool good = true;
3239 int acp_base = inst->src[r].index * 4;
3240
3241 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3242 inst->src[r].reladdr)
3243 continue;
3244
3245 /* See if we can find entries in the ACP consisting of MOVs
3246 * from the same src register for all the swizzled channels
3247 * of this src register reference.
3248 */
3249 for (int i = 0; i < 4; i++) {
3250 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3251 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3252
3253 if (!copy_chan) {
3254 good = false;
3255 break;
3256 }
3257
3258 assert(acp_level[acp_base + src_chan] <= level);
3259
3260 if (!first) {
3261 first = copy_chan;
3262 } else {
3263 if (first->src[0].file != copy_chan->src[0].file ||
3264 first->src[0].index != copy_chan->src[0].index) {
3265 good = false;
3266 break;
3267 }
3268 }
3269 }
3270
3271 if (good) {
3272 /* We've now validated that we can copy-propagate to
3273 * replace this src register reference. Do it.
3274 */
3275 inst->src[r].file = first->src[0].file;
3276 inst->src[r].index = first->src[0].index;
3277
3278 int swizzle = 0;
3279 for (int i = 0; i < 4; i++) {
3280 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3281 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3282 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3283 (3 * i));
3284 }
3285 inst->src[r].swizzle = swizzle;
3286 }
3287 }
3288
3289 switch (inst->op) {
3290 case TGSI_OPCODE_BGNLOOP:
3291 case TGSI_OPCODE_ENDLOOP:
3292 /* End of a basic block, clear the ACP entirely. */
3293 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3294 break;
3295
3296 case TGSI_OPCODE_IF:
3297 ++level;
3298 break;
3299
3300 case TGSI_OPCODE_ENDIF:
3301 case TGSI_OPCODE_ELSE:
3302 /* Clear all channels written inside the block from the ACP, but
3303 * leaving those that were not touched.
3304 */
3305 for (int r = 0; r < this->next_temp; r++) {
3306 for (int c = 0; c < 4; c++) {
3307 if (!acp[4 * r + c])
3308 continue;
3309
3310 if (acp_level[4 * r + c] >= level)
3311 acp[4 * r + c] = NULL;
3312 }
3313 }
3314 if (inst->op == TGSI_OPCODE_ENDIF)
3315 --level;
3316 break;
3317
3318 default:
3319 /* Continuing the block, clear any written channels from
3320 * the ACP.
3321 */
3322 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3323 /* Any temporary might be written, so no copy propagation
3324 * across this instruction.
3325 */
3326 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3327 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3328 inst->dst.reladdr) {
3329 /* Any output might be written, so no copy propagation
3330 * from outputs across this instruction.
3331 */
3332 for (int r = 0; r < this->next_temp; r++) {
3333 for (int c = 0; c < 4; c++) {
3334 if (!acp[4 * r + c])
3335 continue;
3336
3337 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3338 acp[4 * r + c] = NULL;
3339 }
3340 }
3341 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3342 inst->dst.file == PROGRAM_OUTPUT) {
3343 /* Clear where it's used as dst. */
3344 if (inst->dst.file == PROGRAM_TEMPORARY) {
3345 for (int c = 0; c < 4; c++) {
3346 if (inst->dst.writemask & (1 << c)) {
3347 acp[4 * inst->dst.index + c] = NULL;
3348 }
3349 }
3350 }
3351
3352 /* Clear where it's used as src. */
3353 for (int r = 0; r < this->next_temp; r++) {
3354 for (int c = 0; c < 4; c++) {
3355 if (!acp[4 * r + c])
3356 continue;
3357
3358 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3359
3360 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3361 acp[4 * r + c]->src[0].index == inst->dst.index &&
3362 inst->dst.writemask & (1 << src_chan))
3363 {
3364 acp[4 * r + c] = NULL;
3365 }
3366 }
3367 }
3368 }
3369 break;
3370 }
3371
3372 /* If this is a copy, add it to the ACP. */
3373 if (inst->op == TGSI_OPCODE_MOV &&
3374 inst->dst.file == PROGRAM_TEMPORARY &&
3375 !inst->dst.reladdr &&
3376 !inst->saturate &&
3377 !inst->src[0].reladdr &&
3378 !inst->src[0].negate) {
3379 for (int i = 0; i < 4; i++) {
3380 if (inst->dst.writemask & (1 << i)) {
3381 acp[4 * inst->dst.index + i] = inst;
3382 acp_level[4 * inst->dst.index + i] = level;
3383 }
3384 }
3385 }
3386 }
3387
3388 ralloc_free(acp_level);
3389 ralloc_free(acp);
3390 }
3391
3392 /*
3393 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3394 *
3395 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3396 * will occur. As an example, a TXP production after copy propagation but
3397 * before this pass:
3398 *
3399 * 0: MOV TEMP[1], INPUT[4].xyyy;
3400 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3401 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3402 *
3403 * and after this pass:
3404 *
3405 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3406 *
3407 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3408 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3409 */
3410 void
3411 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3412 {
3413 int i;
3414
3415 for (i=0; i < this->next_temp; i++) {
3416 int last_read = get_last_temp_read(i);
3417 int j = 0;
3418
3419 foreach_iter(exec_list_iterator, iter, this->instructions) {
3420 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3421
3422 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3423 j > last_read)
3424 {
3425 iter.remove();
3426 delete inst;
3427 }
3428
3429 j++;
3430 }
3431 }
3432 }
3433
3434 /*
3435 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3436 * code elimination. This is less primitive than eliminate_dead_code(), as it
3437 * is per-channel and can detect consecutive writes without a read between them
3438 * as dead code. However, there is some dead code that can be eliminated by
3439 * eliminate_dead_code() but not this function - for example, this function
3440 * cannot eliminate an instruction writing to a register that is never read and
3441 * is the only instruction writing to that register.
3442 *
3443 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3444 * will occur.
3445 */
3446 int
3447 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3448 {
3449 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3450 glsl_to_tgsi_instruction *,
3451 this->next_temp * 4);
3452 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3453 int level = 0;
3454 int removed = 0;
3455
3456 foreach_iter(exec_list_iterator, iter, this->instructions) {
3457 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3458
3459 assert(inst->dst.file != PROGRAM_TEMPORARY
3460 || inst->dst.index < this->next_temp);
3461
3462 switch (inst->op) {
3463 case TGSI_OPCODE_BGNLOOP:
3464 case TGSI_OPCODE_ENDLOOP:
3465 case TGSI_OPCODE_CONT:
3466 case TGSI_OPCODE_BRK:
3467 /* End of a basic block, clear the write array entirely.
3468 *
3469 * This keeps us from killing dead code when the writes are
3470 * on either side of a loop, even when the register isn't touched
3471 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3472 * dead code of this type, so it shouldn't make a difference as long as
3473 * the dead code elimination pass in the GLSL compiler does its job.
3474 */
3475 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3476 break;
3477
3478 case TGSI_OPCODE_ENDIF:
3479 case TGSI_OPCODE_ELSE:
3480 /* Promote the recorded level of all channels written inside the
3481 * preceding if or else block to the level above the if/else block.
3482 */
3483 for (int r = 0; r < this->next_temp; r++) {
3484 for (int c = 0; c < 4; c++) {
3485 if (!writes[4 * r + c])
3486 continue;
3487
3488 if (write_level[4 * r + c] == level)
3489 write_level[4 * r + c] = level-1;
3490 }
3491 }
3492
3493 if(inst->op == TGSI_OPCODE_ENDIF)
3494 --level;
3495
3496 break;
3497
3498 case TGSI_OPCODE_IF:
3499 ++level;
3500 /* fallthrough to default case to mark the condition as read */
3501
3502 default:
3503 /* Continuing the block, clear any channels from the write array that
3504 * are read by this instruction.
3505 */
3506 for (unsigned i = 0; i < Elements(inst->src); i++) {
3507 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3508 /* Any temporary might be read, so no dead code elimination
3509 * across this instruction.
3510 */
3511 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3512 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3513 /* Clear where it's used as src. */
3514 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3515 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3516 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3517 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3518
3519 for (int c = 0; c < 4; c++) {
3520 if (src_chans & (1 << c)) {
3521 writes[4 * inst->src[i].index + c] = NULL;
3522 }
3523 }
3524 }
3525 }
3526 break;
3527 }
3528
3529 /* If this instruction writes to a temporary, add it to the write array.
3530 * If there is already an instruction in the write array for one or more
3531 * of the channels, flag that channel write as dead.
3532 */
3533 if (inst->dst.file == PROGRAM_TEMPORARY &&
3534 !inst->dst.reladdr &&
3535 !inst->saturate) {
3536 for (int c = 0; c < 4; c++) {
3537 if (inst->dst.writemask & (1 << c)) {
3538 if (writes[4 * inst->dst.index + c]) {
3539 if (write_level[4 * inst->dst.index + c] < level)
3540 continue;
3541 else
3542 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3543 }
3544 writes[4 * inst->dst.index + c] = inst;
3545 write_level[4 * inst->dst.index + c] = level;
3546 }
3547 }
3548 }
3549 }
3550
3551 /* Anything still in the write array at this point is dead code. */
3552 for (int r = 0; r < this->next_temp; r++) {
3553 for (int c = 0; c < 4; c++) {
3554 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3555 if (inst)
3556 inst->dead_mask |= (1 << c);
3557 }
3558 }
3559
3560 /* Now actually remove the instructions that are completely dead and update
3561 * the writemask of other instructions with dead channels.
3562 */
3563 foreach_iter(exec_list_iterator, iter, this->instructions) {
3564 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3565
3566 if (!inst->dead_mask || !inst->dst.writemask)
3567 continue;
3568 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3569 iter.remove();
3570 delete inst;
3571 removed++;
3572 } else
3573 inst->dst.writemask &= ~(inst->dead_mask);
3574 }
3575
3576 ralloc_free(write_level);
3577 ralloc_free(writes);
3578
3579 return removed;
3580 }
3581
3582 /* Merges temporary registers together where possible to reduce the number of
3583 * registers needed to run a program.
3584 *
3585 * Produces optimal code only after copy propagation and dead code elimination
3586 * have been run. */
3587 void
3588 glsl_to_tgsi_visitor::merge_registers(void)
3589 {
3590 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3591 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3592 int i, j;
3593
3594 /* Read the indices of the last read and first write to each temp register
3595 * into an array so that we don't have to traverse the instruction list as
3596 * much. */
3597 for (i=0; i < this->next_temp; i++) {
3598 last_reads[i] = get_last_temp_read(i);
3599 first_writes[i] = get_first_temp_write(i);
3600 }
3601
3602 /* Start looking for registers with non-overlapping usages that can be
3603 * merged together. */
3604 for (i=0; i < this->next_temp; i++) {
3605 /* Don't touch unused registers. */
3606 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3607
3608 for (j=0; j < this->next_temp; j++) {
3609 /* Don't touch unused registers. */
3610 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3611
3612 /* We can merge the two registers if the first write to j is after or
3613 * in the same instruction as the last read from i. Note that the
3614 * register at index i will always be used earlier or at the same time
3615 * as the register at index j. */
3616 if (first_writes[i] <= first_writes[j] &&
3617 last_reads[i] <= first_writes[j])
3618 {
3619 rename_temp_register(j, i); /* Replace all references to j with i.*/
3620
3621 /* Update the first_writes and last_reads arrays with the new
3622 * values for the merged register index, and mark the newly unused
3623 * register index as such. */
3624 last_reads[i] = last_reads[j];
3625 first_writes[j] = -1;
3626 last_reads[j] = -1;
3627 }
3628 }
3629 }
3630
3631 ralloc_free(last_reads);
3632 ralloc_free(first_writes);
3633 }
3634
3635 /* Reassign indices to temporary registers by reusing unused indices created
3636 * by optimization passes. */
3637 void
3638 glsl_to_tgsi_visitor::renumber_registers(void)
3639 {
3640 int i = 0;
3641 int new_index = 0;
3642
3643 for (i=0; i < this->next_temp; i++) {
3644 if (get_first_temp_read(i) < 0) continue;
3645 if (i != new_index)
3646 rename_temp_register(i, new_index);
3647 new_index++;
3648 }
3649
3650 this->next_temp = new_index;
3651 }
3652
3653 /**
3654 * Returns a fragment program which implements the current pixel transfer ops.
3655 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3656 */
3657 extern "C" void
3658 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3659 glsl_to_tgsi_visitor *original,
3660 int scale_and_bias, int pixel_maps)
3661 {
3662 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3663 struct st_context *st = st_context(original->ctx);
3664 struct gl_program *prog = &fp->Base.Base;
3665 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3666 st_src_reg coord, src0;
3667 st_dst_reg dst0;
3668 glsl_to_tgsi_instruction *inst;
3669
3670 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3671 v->ctx = original->ctx;
3672 v->prog = prog;
3673 v->shader_program = NULL;
3674 v->glsl_version = original->glsl_version;
3675 v->native_integers = original->native_integers;
3676 v->options = original->options;
3677 v->next_temp = original->next_temp;
3678 v->num_address_regs = original->num_address_regs;
3679 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3680 v->indirect_addr_temps = original->indirect_addr_temps;
3681 v->indirect_addr_consts = original->indirect_addr_consts;
3682 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3683 v->num_immediates = original->num_immediates;
3684
3685 /*
3686 * Get initial pixel color from the texture.
3687 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3688 */
3689 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3690 src0 = v->get_temp(glsl_type::vec4_type);
3691 dst0 = st_dst_reg(src0);
3692 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3693 inst->sampler = 0;
3694 inst->tex_target = TEXTURE_2D_INDEX;
3695
3696 prog->InputsRead |= FRAG_BIT_TEX0;
3697 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3698 v->samplers_used |= (1 << 0);
3699
3700 if (scale_and_bias) {
3701 static const gl_state_index scale_state[STATE_LENGTH] =
3702 { STATE_INTERNAL, STATE_PT_SCALE,
3703 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3704 static const gl_state_index bias_state[STATE_LENGTH] =
3705 { STATE_INTERNAL, STATE_PT_BIAS,
3706 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3707 GLint scale_p, bias_p;
3708 st_src_reg scale, bias;
3709
3710 scale_p = _mesa_add_state_reference(params, scale_state);
3711 bias_p = _mesa_add_state_reference(params, bias_state);
3712
3713 /* MAD colorTemp, colorTemp, scale, bias; */
3714 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3715 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3716 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3717 }
3718
3719 if (pixel_maps) {
3720 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3721 st_dst_reg temp_dst = st_dst_reg(temp);
3722
3723 assert(st->pixel_xfer.pixelmap_texture);
3724
3725 /* With a little effort, we can do four pixel map look-ups with
3726 * two TEX instructions:
3727 */
3728
3729 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3730 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3731 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3732 inst->sampler = 1;
3733 inst->tex_target = TEXTURE_2D_INDEX;
3734
3735 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3736 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3737 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3738 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3739 inst->sampler = 1;
3740 inst->tex_target = TEXTURE_2D_INDEX;
3741
3742 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3743 v->samplers_used |= (1 << 1);
3744
3745 /* MOV colorTemp, temp; */
3746 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3747 }
3748
3749 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3750 * new visitor. */
3751 foreach_iter(exec_list_iterator, iter, original->instructions) {
3752 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3753 glsl_to_tgsi_instruction *newinst;
3754 st_src_reg src_regs[3];
3755
3756 if (inst->dst.file == PROGRAM_OUTPUT)
3757 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3758
3759 for (int i=0; i<3; i++) {
3760 src_regs[i] = inst->src[i];
3761 if (src_regs[i].file == PROGRAM_INPUT &&
3762 src_regs[i].index == FRAG_ATTRIB_COL0)
3763 {
3764 src_regs[i].file = PROGRAM_TEMPORARY;
3765 src_regs[i].index = src0.index;
3766 }
3767 else if (src_regs[i].file == PROGRAM_INPUT)
3768 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3769 }
3770
3771 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3772 newinst->tex_target = inst->tex_target;
3773 }
3774
3775 /* Make modifications to fragment program info. */
3776 prog->Parameters = _mesa_combine_parameter_lists(params,
3777 original->prog->Parameters);
3778 _mesa_free_parameter_list(params);
3779 count_resources(v, prog);
3780 fp->glsl_to_tgsi = v;
3781 }
3782
3783 /**
3784 * Make fragment program for glBitmap:
3785 * Sample the texture and kill the fragment if the bit is 0.
3786 * This program will be combined with the user's fragment program.
3787 *
3788 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3789 */
3790 extern "C" void
3791 get_bitmap_visitor(struct st_fragment_program *fp,
3792 glsl_to_tgsi_visitor *original, int samplerIndex)
3793 {
3794 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3795 struct st_context *st = st_context(original->ctx);
3796 struct gl_program *prog = &fp->Base.Base;
3797 st_src_reg coord, src0;
3798 st_dst_reg dst0;
3799 glsl_to_tgsi_instruction *inst;
3800
3801 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3802 v->ctx = original->ctx;
3803 v->prog = prog;
3804 v->shader_program = NULL;
3805 v->glsl_version = original->glsl_version;
3806 v->native_integers = original->native_integers;
3807 v->options = original->options;
3808 v->next_temp = original->next_temp;
3809 v->num_address_regs = original->num_address_regs;
3810 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3811 v->indirect_addr_temps = original->indirect_addr_temps;
3812 v->indirect_addr_consts = original->indirect_addr_consts;
3813 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3814 v->num_immediates = original->num_immediates;
3815
3816 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3817 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3818 src0 = v->get_temp(glsl_type::vec4_type);
3819 dst0 = st_dst_reg(src0);
3820 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3821 inst->sampler = samplerIndex;
3822 inst->tex_target = TEXTURE_2D_INDEX;
3823
3824 prog->InputsRead |= FRAG_BIT_TEX0;
3825 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3826 v->samplers_used |= (1 << samplerIndex);
3827
3828 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3829 src0.negate = NEGATE_XYZW;
3830 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3831 src0.swizzle = SWIZZLE_XXXX;
3832 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3833
3834 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3835 * new visitor. */
3836 foreach_iter(exec_list_iterator, iter, original->instructions) {
3837 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3838 glsl_to_tgsi_instruction *newinst;
3839 st_src_reg src_regs[3];
3840
3841 if (inst->dst.file == PROGRAM_OUTPUT)
3842 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3843
3844 for (int i=0; i<3; i++) {
3845 src_regs[i] = inst->src[i];
3846 if (src_regs[i].file == PROGRAM_INPUT)
3847 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3848 }
3849
3850 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3851 newinst->tex_target = inst->tex_target;
3852 }
3853
3854 /* Make modifications to fragment program info. */
3855 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3856 count_resources(v, prog);
3857 fp->glsl_to_tgsi = v;
3858 }
3859
3860 /* ------------------------- TGSI conversion stuff -------------------------- */
3861 struct label {
3862 unsigned branch_target;
3863 unsigned token;
3864 };
3865
3866 /**
3867 * Intermediate state used during shader translation.
3868 */
3869 struct st_translate {
3870 struct ureg_program *ureg;
3871
3872 struct ureg_dst temps[MAX_TEMPS];
3873 struct ureg_src *constants;
3874 struct ureg_src *immediates;
3875 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3876 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3877 struct ureg_dst address[1];
3878 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3879 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3880
3881 const GLuint *inputMapping;
3882 const GLuint *outputMapping;
3883
3884 /* For every instruction that contains a label (eg CALL), keep
3885 * details so that we can go back afterwards and emit the correct
3886 * tgsi instruction number for each label.
3887 */
3888 struct label *labels;
3889 unsigned labels_size;
3890 unsigned labels_count;
3891
3892 /* Keep a record of the tgsi instruction number that each mesa
3893 * instruction starts at, will be used to fix up labels after
3894 * translation.
3895 */
3896 unsigned *insn;
3897 unsigned insn_size;
3898 unsigned insn_count;
3899
3900 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3901
3902 boolean error;
3903 };
3904
3905 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3906 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
3907 TGSI_SEMANTIC_FACE,
3908 TGSI_SEMANTIC_VERTEXID,
3909 TGSI_SEMANTIC_INSTANCEID
3910 };
3911
3912 /**
3913 * Make note of a branch to a label in the TGSI code.
3914 * After we've emitted all instructions, we'll go over the list
3915 * of labels built here and patch the TGSI code with the actual
3916 * location of each label.
3917 */
3918 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
3919 {
3920 unsigned i;
3921
3922 if (t->labels_count + 1 >= t->labels_size) {
3923 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
3924 t->labels = (struct label *)realloc(t->labels,
3925 t->labels_size * sizeof(struct label));
3926 if (t->labels == NULL) {
3927 static unsigned dummy;
3928 t->error = TRUE;
3929 return &dummy;
3930 }
3931 }
3932
3933 i = t->labels_count++;
3934 t->labels[i].branch_target = branch_target;
3935 return &t->labels[i].token;
3936 }
3937
3938 /**
3939 * Called prior to emitting the TGSI code for each instruction.
3940 * Allocate additional space for instructions if needed.
3941 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
3942 * the next TGSI instruction.
3943 */
3944 static void set_insn_start(struct st_translate *t, unsigned start)
3945 {
3946 if (t->insn_count + 1 >= t->insn_size) {
3947 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
3948 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
3949 if (t->insn == NULL) {
3950 t->error = TRUE;
3951 return;
3952 }
3953 }
3954
3955 t->insn[t->insn_count++] = start;
3956 }
3957
3958 /**
3959 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
3960 */
3961 static struct ureg_src
3962 emit_immediate(struct st_translate *t,
3963 gl_constant_value values[4],
3964 int type, int size)
3965 {
3966 struct ureg_program *ureg = t->ureg;
3967
3968 switch(type)
3969 {
3970 case GL_FLOAT:
3971 return ureg_DECL_immediate(ureg, &values[0].f, size);
3972 case GL_INT:
3973 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
3974 case GL_UNSIGNED_INT:
3975 case GL_BOOL:
3976 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
3977 default:
3978 assert(!"should not get here - type must be float, int, uint, or bool");
3979 return ureg_src_undef();
3980 }
3981 }
3982
3983 /**
3984 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
3985 */
3986 static struct ureg_dst
3987 dst_register(struct st_translate *t,
3988 gl_register_file file,
3989 GLuint index)
3990 {
3991 switch(file) {
3992 case PROGRAM_UNDEFINED:
3993 return ureg_dst_undef();
3994
3995 case PROGRAM_TEMPORARY:
3996 if (ureg_dst_is_undef(t->temps[index]))
3997 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
3998
3999 return t->temps[index];
4000
4001 case PROGRAM_OUTPUT:
4002 if (t->procType == TGSI_PROCESSOR_VERTEX)
4003 assert(index < VERT_RESULT_MAX);
4004 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4005 assert(index < FRAG_RESULT_MAX);
4006 else
4007 assert(index < GEOM_RESULT_MAX);
4008
4009 assert(t->outputMapping[index] < Elements(t->outputs));
4010
4011 return t->outputs[t->outputMapping[index]];
4012
4013 case PROGRAM_ADDRESS:
4014 return t->address[index];
4015
4016 default:
4017 assert(!"unknown dst register file");
4018 return ureg_dst_undef();
4019 }
4020 }
4021
4022 /**
4023 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4024 */
4025 static struct ureg_src
4026 src_register(struct st_translate *t,
4027 gl_register_file file,
4028 GLint index)
4029 {
4030 switch(file) {
4031 case PROGRAM_UNDEFINED:
4032 return ureg_src_undef();
4033
4034 case PROGRAM_TEMPORARY:
4035 assert(index >= 0);
4036 assert(index < (int) Elements(t->temps));
4037 if (ureg_dst_is_undef(t->temps[index]))
4038 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4039 return ureg_src(t->temps[index]);
4040
4041 case PROGRAM_ENV_PARAM:
4042 case PROGRAM_LOCAL_PARAM:
4043 case PROGRAM_UNIFORM:
4044 assert(index >= 0);
4045 return t->constants[index];
4046 case PROGRAM_STATE_VAR:
4047 case PROGRAM_CONSTANT: /* ie, immediate */
4048 if (index < 0)
4049 return ureg_DECL_constant(t->ureg, 0);
4050 else
4051 return t->constants[index];
4052
4053 case PROGRAM_IMMEDIATE:
4054 return t->immediates[index];
4055
4056 case PROGRAM_INPUT:
4057 assert(t->inputMapping[index] < Elements(t->inputs));
4058 return t->inputs[t->inputMapping[index]];
4059
4060 case PROGRAM_OUTPUT:
4061 assert(t->outputMapping[index] < Elements(t->outputs));
4062 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4063
4064 case PROGRAM_ADDRESS:
4065 return ureg_src(t->address[index]);
4066
4067 case PROGRAM_SYSTEM_VALUE:
4068 assert(index < (int) Elements(t->systemValues));
4069 return t->systemValues[index];
4070
4071 default:
4072 assert(!"unknown src register file");
4073 return ureg_src_undef();
4074 }
4075 }
4076
4077 /**
4078 * Create a TGSI ureg_dst register from an st_dst_reg.
4079 */
4080 static struct ureg_dst
4081 translate_dst(struct st_translate *t,
4082 const st_dst_reg *dst_reg,
4083 bool saturate, bool clamp_color)
4084 {
4085 struct ureg_dst dst = dst_register(t,
4086 dst_reg->file,
4087 dst_reg->index);
4088
4089 dst = ureg_writemask(dst, dst_reg->writemask);
4090
4091 if (saturate)
4092 dst = ureg_saturate(dst);
4093 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4094 /* Clamp colors for ARB_color_buffer_float. */
4095 switch (t->procType) {
4096 case TGSI_PROCESSOR_VERTEX:
4097 /* XXX if the geometry shader is present, this must be done there
4098 * instead of here. */
4099 if (dst_reg->index == VERT_RESULT_COL0 ||
4100 dst_reg->index == VERT_RESULT_COL1 ||
4101 dst_reg->index == VERT_RESULT_BFC0 ||
4102 dst_reg->index == VERT_RESULT_BFC1) {
4103 dst = ureg_saturate(dst);
4104 }
4105 break;
4106
4107 case TGSI_PROCESSOR_FRAGMENT:
4108 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4109 dst = ureg_saturate(dst);
4110 }
4111 break;
4112 }
4113 }
4114
4115 if (dst_reg->reladdr != NULL)
4116 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4117
4118 return dst;
4119 }
4120
4121 /**
4122 * Create a TGSI ureg_src register from an st_src_reg.
4123 */
4124 static struct ureg_src
4125 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4126 {
4127 struct ureg_src src = src_register(t, src_reg->file, src_reg->index);
4128
4129 src = ureg_swizzle(src,
4130 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4131 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4132 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4133 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4134
4135 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4136 src = ureg_negate(src);
4137
4138 if (src_reg->reladdr != NULL) {
4139 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4140 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4141 * set the bit for src.Negate. So we have to do the operation manually
4142 * here to work around the compiler's problems. */
4143 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4144 struct ureg_src addr = ureg_src(t->address[0]);
4145 src.Indirect = 1;
4146 src.IndirectFile = addr.File;
4147 src.IndirectIndex = addr.Index;
4148 src.IndirectSwizzle = addr.SwizzleX;
4149
4150 if (src_reg->file != PROGRAM_INPUT &&
4151 src_reg->file != PROGRAM_OUTPUT) {
4152 /* If src_reg->index was negative, it was set to zero in
4153 * src_register(). Reassign it now. But don't do this
4154 * for input/output regs since they get remapped while
4155 * const buffers don't.
4156 */
4157 src.Index = src_reg->index;
4158 }
4159 }
4160
4161 return src;
4162 }
4163
4164 static struct tgsi_texture_offset
4165 translate_tex_offset(struct st_translate *t,
4166 const struct tgsi_texture_offset *in_offset)
4167 {
4168 struct tgsi_texture_offset offset;
4169
4170 assert(in_offset->File == PROGRAM_IMMEDIATE);
4171
4172 offset.File = TGSI_FILE_IMMEDIATE;
4173 offset.Index = in_offset->Index;
4174 offset.SwizzleX = in_offset->SwizzleX;
4175 offset.SwizzleY = in_offset->SwizzleY;
4176 offset.SwizzleZ = in_offset->SwizzleZ;
4177 offset.Padding = 0;
4178
4179 return offset;
4180 }
4181
4182 static void
4183 compile_tgsi_instruction(struct st_translate *t,
4184 const glsl_to_tgsi_instruction *inst,
4185 bool clamp_dst_color_output)
4186 {
4187 struct ureg_program *ureg = t->ureg;
4188 GLuint i;
4189 struct ureg_dst dst[1];
4190 struct ureg_src src[4];
4191 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4192
4193 unsigned num_dst;
4194 unsigned num_src;
4195
4196 num_dst = num_inst_dst_regs(inst->op);
4197 num_src = num_inst_src_regs(inst->op);
4198
4199 if (num_dst)
4200 dst[0] = translate_dst(t,
4201 &inst->dst,
4202 inst->saturate,
4203 clamp_dst_color_output);
4204
4205 for (i = 0; i < num_src; i++)
4206 src[i] = translate_src(t, &inst->src[i]);
4207
4208 switch(inst->op) {
4209 case TGSI_OPCODE_BGNLOOP:
4210 case TGSI_OPCODE_CAL:
4211 case TGSI_OPCODE_ELSE:
4212 case TGSI_OPCODE_ENDLOOP:
4213 case TGSI_OPCODE_IF:
4214 assert(num_dst == 0);
4215 ureg_label_insn(ureg,
4216 inst->op,
4217 src, num_src,
4218 get_label(t,
4219 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4220 return;
4221
4222 case TGSI_OPCODE_TEX:
4223 case TGSI_OPCODE_TXB:
4224 case TGSI_OPCODE_TXD:
4225 case TGSI_OPCODE_TXL:
4226 case TGSI_OPCODE_TXP:
4227 case TGSI_OPCODE_TXQ:
4228 case TGSI_OPCODE_TXF:
4229 src[num_src++] = t->samplers[inst->sampler];
4230 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4231 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4232 }
4233 ureg_tex_insn(ureg,
4234 inst->op,
4235 dst, num_dst,
4236 st_translate_texture_target(inst->tex_target, inst->tex_shadow),
4237 texoffsets, inst->tex_offset_num_offset,
4238 src, num_src);
4239 return;
4240
4241 case TGSI_OPCODE_SCS:
4242 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4243 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4244 break;
4245
4246 default:
4247 ureg_insn(ureg,
4248 inst->op,
4249 dst, num_dst,
4250 src, num_src);
4251 break;
4252 }
4253 }
4254
4255 /**
4256 * Emit the TGSI instructions for inverting and adjusting WPOS.
4257 * This code is unavoidable because it also depends on whether
4258 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4259 */
4260 static void
4261 emit_wpos_adjustment( struct st_translate *t,
4262 const struct gl_program *program,
4263 boolean invert,
4264 GLfloat adjX, GLfloat adjY[2])
4265 {
4266 struct ureg_program *ureg = t->ureg;
4267
4268 /* Fragment program uses fragment position input.
4269 * Need to replace instances of INPUT[WPOS] with temp T
4270 * where T = INPUT[WPOS] by y is inverted.
4271 */
4272 static const gl_state_index wposTransformState[STATE_LENGTH]
4273 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4274 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4275
4276 /* XXX: note we are modifying the incoming shader here! Need to
4277 * do this before emitting the constant decls below, or this
4278 * will be missed:
4279 */
4280 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4281 wposTransformState);
4282
4283 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4284 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4285 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4286
4287 /* First, apply the coordinate shift: */
4288 if (adjX || adjY[0] || adjY[1]) {
4289 if (adjY[0] != adjY[1]) {
4290 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4291 * depending on whether inversion is actually going to be applied
4292 * or not, which is determined by testing against the inversion
4293 * state variable used below, which will be either +1 or -1.
4294 */
4295 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4296
4297 ureg_CMP(ureg, adj_temp,
4298 ureg_scalar(wpostrans, invert ? 2 : 0),
4299 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4300 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4301 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4302 } else {
4303 ureg_ADD(ureg, wpos_temp, wpos_input,
4304 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4305 }
4306 wpos_input = ureg_src(wpos_temp);
4307 } else {
4308 /* MOV wpos_temp, input[wpos]
4309 */
4310 ureg_MOV( ureg, wpos_temp, wpos_input );
4311 }
4312
4313 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4314 * inversion/identity, or the other way around if we're drawing to an FBO.
4315 */
4316 if (invert) {
4317 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4318 */
4319 ureg_MAD( ureg,
4320 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4321 wpos_input,
4322 ureg_scalar(wpostrans, 0),
4323 ureg_scalar(wpostrans, 1));
4324 } else {
4325 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4326 */
4327 ureg_MAD( ureg,
4328 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4329 wpos_input,
4330 ureg_scalar(wpostrans, 2),
4331 ureg_scalar(wpostrans, 3));
4332 }
4333
4334 /* Use wpos_temp as position input from here on:
4335 */
4336 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4337 }
4338
4339
4340 /**
4341 * Emit fragment position/ooordinate code.
4342 */
4343 static void
4344 emit_wpos(struct st_context *st,
4345 struct st_translate *t,
4346 const struct gl_program *program,
4347 struct ureg_program *ureg)
4348 {
4349 const struct gl_fragment_program *fp =
4350 (const struct gl_fragment_program *) program;
4351 struct pipe_screen *pscreen = st->pipe->screen;
4352 GLfloat adjX = 0.0f;
4353 GLfloat adjY[2] = { 0.0f, 0.0f };
4354 boolean invert = FALSE;
4355
4356 /* Query the pixel center conventions supported by the pipe driver and set
4357 * adjX, adjY to help out if it cannot handle the requested one internally.
4358 *
4359 * The bias of the y-coordinate depends on whether y-inversion takes place
4360 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4361 * drawing to an FBO (causes additional inversion), and whether the the pipe
4362 * driver origin and the requested origin differ (the latter condition is
4363 * stored in the 'invert' variable).
4364 *
4365 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4366 *
4367 * center shift only:
4368 * i -> h: +0.5
4369 * h -> i: -0.5
4370 *
4371 * inversion only:
4372 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4373 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4374 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4375 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4376 *
4377 * inversion and center shift:
4378 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4379 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4380 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4381 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4382 */
4383 if (fp->OriginUpperLeft) {
4384 /* Fragment shader wants origin in upper-left */
4385 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4386 /* the driver supports upper-left origin */
4387 }
4388 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4389 /* the driver supports lower-left origin, need to invert Y */
4390 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4391 invert = TRUE;
4392 }
4393 else
4394 assert(0);
4395 }
4396 else {
4397 /* Fragment shader wants origin in lower-left */
4398 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4399 /* the driver supports lower-left origin */
4400 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4401 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4402 /* the driver supports upper-left origin, need to invert Y */
4403 invert = TRUE;
4404 else
4405 assert(0);
4406 }
4407
4408 if (fp->PixelCenterInteger) {
4409 /* Fragment shader wants pixel center integer */
4410 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4411 /* the driver supports pixel center integer */
4412 adjY[1] = 1.0f;
4413 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4414 }
4415 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4416 /* the driver supports pixel center half integer, need to bias X,Y */
4417 adjX = -0.5f;
4418 adjY[0] = -0.5f;
4419 adjY[1] = 0.5f;
4420 }
4421 else
4422 assert(0);
4423 }
4424 else {
4425 /* Fragment shader wants pixel center half integer */
4426 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4427 /* the driver supports pixel center half integer */
4428 }
4429 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4430 /* the driver supports pixel center integer, need to bias X,Y */
4431 adjX = adjY[0] = adjY[1] = 0.5f;
4432 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4433 }
4434 else
4435 assert(0);
4436 }
4437
4438 /* we invert after adjustment so that we avoid the MOV to temporary,
4439 * and reuse the adjustment ADD instead */
4440 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4441 }
4442
4443 /**
4444 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4445 * TGSI uses +1 for front, -1 for back.
4446 * This function converts the TGSI value to the GL value. Simply clamping/
4447 * saturating the value to [0,1] does the job.
4448 */
4449 static void
4450 emit_face_var(struct st_translate *t)
4451 {
4452 struct ureg_program *ureg = t->ureg;
4453 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4454 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4455
4456 /* MOV_SAT face_temp, input[face] */
4457 face_temp = ureg_saturate(face_temp);
4458 ureg_MOV(ureg, face_temp, face_input);
4459
4460 /* Use face_temp as face input from here on: */
4461 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4462 }
4463
4464 static void
4465 emit_edgeflags(struct st_translate *t)
4466 {
4467 struct ureg_program *ureg = t->ureg;
4468 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4469 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4470
4471 ureg_MOV(ureg, edge_dst, edge_src);
4472 }
4473
4474 /**
4475 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4476 * \param program the program to translate
4477 * \param numInputs number of input registers used
4478 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4479 * input indexes
4480 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4481 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4482 * each input
4483 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4484 * \param numOutputs number of output registers used
4485 * \param outputMapping maps Mesa fragment program outputs to TGSI
4486 * generic outputs
4487 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4488 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4489 * each output
4490 *
4491 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4492 */
4493 extern "C" enum pipe_error
4494 st_translate_program(
4495 struct gl_context *ctx,
4496 uint procType,
4497 struct ureg_program *ureg,
4498 glsl_to_tgsi_visitor *program,
4499 const struct gl_program *proginfo,
4500 GLuint numInputs,
4501 const GLuint inputMapping[],
4502 const ubyte inputSemanticName[],
4503 const ubyte inputSemanticIndex[],
4504 const GLuint interpMode[],
4505 const GLboolean is_centroid[],
4506 GLuint numOutputs,
4507 const GLuint outputMapping[],
4508 const ubyte outputSemanticName[],
4509 const ubyte outputSemanticIndex[],
4510 boolean passthrough_edgeflags,
4511 boolean clamp_color)
4512 {
4513 struct st_translate *t;
4514 unsigned i;
4515 enum pipe_error ret = PIPE_OK;
4516
4517 assert(numInputs <= Elements(t->inputs));
4518 assert(numOutputs <= Elements(t->outputs));
4519
4520 t = CALLOC_STRUCT(st_translate);
4521 if (!t) {
4522 ret = PIPE_ERROR_OUT_OF_MEMORY;
4523 goto out;
4524 }
4525
4526 memset(t, 0, sizeof *t);
4527
4528 t->procType = procType;
4529 t->inputMapping = inputMapping;
4530 t->outputMapping = outputMapping;
4531 t->ureg = ureg;
4532
4533 if (program->shader_program) {
4534 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4535 struct gl_uniform_storage *const storage =
4536 &program->shader_program->UniformStorage[i];
4537
4538 _mesa_uniform_detach_all_driver_storage(storage);
4539 }
4540 }
4541
4542 /*
4543 * Declare input attributes.
4544 */
4545 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4546 for (i = 0; i < numInputs; i++) {
4547 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4548 inputSemanticName[i],
4549 inputSemanticIndex[i],
4550 interpMode[i], 0,
4551 is_centroid[i]);
4552 }
4553
4554 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4555 /* Must do this after setting up t->inputs, and before
4556 * emitting constant references, below:
4557 */
4558 emit_wpos(st_context(ctx), t, proginfo, ureg);
4559 }
4560
4561 if (proginfo->InputsRead & FRAG_BIT_FACE)
4562 emit_face_var(t);
4563
4564 /*
4565 * Declare output attributes.
4566 */
4567 for (i = 0; i < numOutputs; i++) {
4568 switch (outputSemanticName[i]) {
4569 case TGSI_SEMANTIC_POSITION:
4570 t->outputs[i] = ureg_DECL_output(ureg,
4571 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4572 outputSemanticIndex[i]);
4573 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4574 break;
4575 case TGSI_SEMANTIC_STENCIL:
4576 t->outputs[i] = ureg_DECL_output(ureg,
4577 TGSI_SEMANTIC_STENCIL, /* Stencil */
4578 outputSemanticIndex[i]);
4579 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4580 break;
4581 case TGSI_SEMANTIC_COLOR:
4582 t->outputs[i] = ureg_DECL_output(ureg,
4583 TGSI_SEMANTIC_COLOR,
4584 outputSemanticIndex[i]);
4585 break;
4586 default:
4587 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4588 ret = PIPE_ERROR_BAD_INPUT;
4589 goto out;
4590 }
4591 }
4592 }
4593 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4594 for (i = 0; i < numInputs; i++) {
4595 t->inputs[i] = ureg_DECL_gs_input(ureg,
4596 i,
4597 inputSemanticName[i],
4598 inputSemanticIndex[i]);
4599 }
4600
4601 for (i = 0; i < numOutputs; i++) {
4602 t->outputs[i] = ureg_DECL_output(ureg,
4603 outputSemanticName[i],
4604 outputSemanticIndex[i]);
4605 }
4606 }
4607 else {
4608 assert(procType == TGSI_PROCESSOR_VERTEX);
4609
4610 for (i = 0; i < numInputs; i++) {
4611 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4612 }
4613
4614 for (i = 0; i < numOutputs; i++) {
4615 t->outputs[i] = ureg_DECL_output(ureg,
4616 outputSemanticName[i],
4617 outputSemanticIndex[i]);
4618 }
4619 if (passthrough_edgeflags)
4620 emit_edgeflags(t);
4621 }
4622
4623 /* Declare address register.
4624 */
4625 if (program->num_address_regs > 0) {
4626 assert(program->num_address_regs == 1);
4627 t->address[0] = ureg_DECL_address(ureg);
4628 }
4629
4630 /* Declare misc input registers
4631 */
4632 {
4633 GLbitfield sysInputs = proginfo->SystemValuesRead;
4634 unsigned numSys = 0;
4635 for (i = 0; sysInputs; i++) {
4636 if (sysInputs & (1 << i)) {
4637 unsigned semName = mesa_sysval_to_semantic[i];
4638 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4639 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4640 semName == TGSI_SEMANTIC_VERTEXID) {
4641 /* From Gallium perspective, these system values are always
4642 * integer, and require native integer support. However, if
4643 * native integer is supported on the vertex stage but not the
4644 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4645 * assumes these system values are floats. To resolve the
4646 * inconsistency, we insert a U2F.
4647 */
4648 struct st_context *st = st_context(ctx);
4649 struct pipe_screen *pscreen = st->pipe->screen;
4650 assert(procType == TGSI_PROCESSOR_VERTEX);
4651 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4652 if (!ctx->Const.NativeIntegers) {
4653 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4654 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4655 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4656 }
4657 }
4658 numSys++;
4659 sysInputs &= ~(1 << i);
4660 }
4661 }
4662 }
4663
4664 if (program->indirect_addr_temps) {
4665 /* If temps are accessed with indirect addressing, declare temporaries
4666 * in sequential order. Else, we declare them on demand elsewhere.
4667 * (Note: the number of temporaries is equal to program->next_temp)
4668 */
4669 for (i = 0; i < (unsigned)program->next_temp; i++) {
4670 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4671 t->temps[i] = ureg_DECL_local_temporary(t->ureg);
4672 }
4673 }
4674
4675 /* Emit constants and uniforms. TGSI uses a single index space for these,
4676 * so we put all the translated regs in t->constants.
4677 */
4678 if (proginfo->Parameters) {
4679 t->constants = (struct ureg_src *)
4680 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4681 if (t->constants == NULL) {
4682 ret = PIPE_ERROR_OUT_OF_MEMORY;
4683 goto out;
4684 }
4685
4686 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4687 switch (proginfo->Parameters->Parameters[i].Type) {
4688 case PROGRAM_ENV_PARAM:
4689 case PROGRAM_LOCAL_PARAM:
4690 case PROGRAM_STATE_VAR:
4691 case PROGRAM_UNIFORM:
4692 t->constants[i] = ureg_DECL_constant(ureg, i);
4693 break;
4694
4695 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4696 * addressing of the const buffer.
4697 * FIXME: Be smarter and recognize param arrays:
4698 * indirect addressing is only valid within the referenced
4699 * array.
4700 */
4701 case PROGRAM_CONSTANT:
4702 if (program->indirect_addr_consts)
4703 t->constants[i] = ureg_DECL_constant(ureg, i);
4704 else
4705 t->constants[i] = emit_immediate(t,
4706 proginfo->Parameters->ParameterValues[i],
4707 proginfo->Parameters->Parameters[i].DataType,
4708 4);
4709 break;
4710 default:
4711 break;
4712 }
4713 }
4714 }
4715
4716 /* Emit immediate values.
4717 */
4718 t->immediates = (struct ureg_src *)
4719 calloc(program->num_immediates, sizeof(struct ureg_src));
4720 if (t->immediates == NULL) {
4721 ret = PIPE_ERROR_OUT_OF_MEMORY;
4722 goto out;
4723 }
4724 i = 0;
4725 foreach_iter(exec_list_iterator, iter, program->immediates) {
4726 immediate_storage *imm = (immediate_storage *)iter.get();
4727 assert(i < program->num_immediates);
4728 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4729 }
4730 assert(i == program->num_immediates);
4731
4732 /* texture samplers */
4733 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4734 if (program->samplers_used & (1 << i)) {
4735 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4736 }
4737 }
4738
4739 /* Emit each instruction in turn:
4740 */
4741 foreach_iter(exec_list_iterator, iter, program->instructions) {
4742 set_insn_start(t, ureg_get_instruction_number(ureg));
4743 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4744 clamp_color);
4745 }
4746
4747 /* Fix up all emitted labels:
4748 */
4749 for (i = 0; i < t->labels_count; i++) {
4750 ureg_fixup_label(ureg, t->labels[i].token,
4751 t->insn[t->labels[i].branch_target]);
4752 }
4753
4754 if (program->shader_program) {
4755 /* This has to be done last. Any operation the can cause
4756 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4757 * program constant) has to happen before creating this linkage.
4758 */
4759 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4760 if (program->shader_program->_LinkedShaders[i] == NULL)
4761 continue;
4762
4763 _mesa_associate_uniform_storage(ctx, program->shader_program,
4764 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4765 }
4766 }
4767
4768 out:
4769 if (t) {
4770 free(t->insn);
4771 free(t->labels);
4772 free(t->constants);
4773 free(t->immediates);
4774
4775 if (t->error) {
4776 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4777 }
4778
4779 free(t);
4780 }
4781
4782 return ret;
4783 }
4784 /* ----------------------------- End TGSI code ------------------------------ */
4785
4786 /**
4787 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4788 * generating Mesa IR.
4789 */
4790 static struct gl_program *
4791 get_mesa_program(struct gl_context *ctx,
4792 struct gl_shader_program *shader_program,
4793 struct gl_shader *shader)
4794 {
4795 glsl_to_tgsi_visitor* v;
4796 struct gl_program *prog;
4797 GLenum target;
4798 const char *target_string;
4799 bool progress;
4800 struct gl_shader_compiler_options *options =
4801 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4802
4803 switch (shader->Type) {
4804 case GL_VERTEX_SHADER:
4805 target = GL_VERTEX_PROGRAM_ARB;
4806 target_string = "vertex";
4807 break;
4808 case GL_FRAGMENT_SHADER:
4809 target = GL_FRAGMENT_PROGRAM_ARB;
4810 target_string = "fragment";
4811 break;
4812 case GL_GEOMETRY_SHADER:
4813 target = GL_GEOMETRY_PROGRAM_NV;
4814 target_string = "geometry";
4815 break;
4816 default:
4817 assert(!"should not be reached");
4818 return NULL;
4819 }
4820
4821 validate_ir_tree(shader->ir);
4822
4823 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4824 if (!prog)
4825 return NULL;
4826 prog->Parameters = _mesa_new_parameter_list();
4827 v = new glsl_to_tgsi_visitor();
4828 v->ctx = ctx;
4829 v->prog = prog;
4830 v->shader_program = shader_program;
4831 v->options = options;
4832 v->glsl_version = ctx->Const.GLSLVersion;
4833 v->native_integers = ctx->Const.NativeIntegers;
4834
4835 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4836 prog->Parameters);
4837
4838 /* Remove reads from output registers. */
4839 lower_output_reads(shader->ir);
4840
4841 /* Emit intermediate IR for main(). */
4842 visit_exec_list(shader->ir, v);
4843
4844 /* Now emit bodies for any functions that were used. */
4845 do {
4846 progress = GL_FALSE;
4847
4848 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4849 function_entry *entry = (function_entry *)iter.get();
4850
4851 if (!entry->bgn_inst) {
4852 v->current_function = entry;
4853
4854 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
4855 entry->bgn_inst->function = entry;
4856
4857 visit_exec_list(&entry->sig->body, v);
4858
4859 glsl_to_tgsi_instruction *last;
4860 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
4861 if (last->op != TGSI_OPCODE_RET)
4862 v->emit(NULL, TGSI_OPCODE_RET);
4863
4864 glsl_to_tgsi_instruction *end;
4865 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
4866 end->function = entry;
4867
4868 progress = GL_TRUE;
4869 }
4870 }
4871 } while (progress);
4872
4873 #if 0
4874 /* Print out some information (for debugging purposes) used by the
4875 * optimization passes. */
4876 for (i=0; i < v->next_temp; i++) {
4877 int fr = v->get_first_temp_read(i);
4878 int fw = v->get_first_temp_write(i);
4879 int lr = v->get_last_temp_read(i);
4880 int lw = v->get_last_temp_write(i);
4881
4882 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
4883 assert(fw <= fr);
4884 }
4885 #endif
4886
4887 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4888 v->simplify_cmp();
4889 v->copy_propagate();
4890 while (v->eliminate_dead_code_advanced());
4891
4892 /* FIXME: These passes to optimize temporary registers don't work when there
4893 * is indirect addressing of the temporary register space. We need proper
4894 * array support so that we don't have to give up these passes in every
4895 * shader that uses arrays.
4896 */
4897 if (!v->indirect_addr_temps) {
4898 v->eliminate_dead_code();
4899 v->merge_registers();
4900 v->renumber_registers();
4901 }
4902
4903 /* Write the END instruction. */
4904 v->emit(NULL, TGSI_OPCODE_END);
4905
4906 if (ctx->Shader.Flags & GLSL_DUMP) {
4907 printf("\n");
4908 printf("GLSL IR for linked %s program %d:\n", target_string,
4909 shader_program->Name);
4910 _mesa_print_ir(shader->ir, NULL);
4911 printf("\n");
4912 printf("\n");
4913 fflush(stdout);
4914 }
4915
4916 prog->Instructions = NULL;
4917 prog->NumInstructions = 0;
4918
4919 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
4920 count_resources(v, prog);
4921
4922 _mesa_reference_program(ctx, &shader->Program, prog);
4923
4924 /* This has to be done last. Any operation the can cause
4925 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4926 * program constant) has to happen before creating this linkage.
4927 */
4928 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
4929 if (!shader_program->LinkStatus) {
4930 return NULL;
4931 }
4932
4933 struct st_vertex_program *stvp;
4934 struct st_fragment_program *stfp;
4935 struct st_geometry_program *stgp;
4936
4937 switch (shader->Type) {
4938 case GL_VERTEX_SHADER:
4939 stvp = (struct st_vertex_program *)prog;
4940 stvp->glsl_to_tgsi = v;
4941 break;
4942 case GL_FRAGMENT_SHADER:
4943 stfp = (struct st_fragment_program *)prog;
4944 stfp->glsl_to_tgsi = v;
4945 break;
4946 case GL_GEOMETRY_SHADER:
4947 stgp = (struct st_geometry_program *)prog;
4948 stgp->glsl_to_tgsi = v;
4949 break;
4950 default:
4951 assert(!"should not be reached");
4952 return NULL;
4953 }
4954
4955 return prog;
4956 }
4957
4958 extern "C" {
4959
4960 struct gl_shader *
4961 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
4962 {
4963 struct gl_shader *shader;
4964 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
4965 type == GL_GEOMETRY_SHADER_ARB);
4966 shader = rzalloc(NULL, struct gl_shader);
4967 if (shader) {
4968 shader->Type = type;
4969 shader->Name = name;
4970 _mesa_init_shader(ctx, shader);
4971 }
4972 return shader;
4973 }
4974
4975 struct gl_shader_program *
4976 st_new_shader_program(struct gl_context *ctx, GLuint name)
4977 {
4978 struct gl_shader_program *shProg;
4979 shProg = rzalloc(NULL, struct gl_shader_program);
4980 if (shProg) {
4981 shProg->Name = name;
4982 _mesa_init_shader_program(ctx, shProg);
4983 }
4984 return shProg;
4985 }
4986
4987 /**
4988 * Link a shader.
4989 * Called via ctx->Driver.LinkShader()
4990 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
4991 * with code lowering and other optimizations.
4992 */
4993 GLboolean
4994 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
4995 {
4996 assert(prog->LinkStatus);
4997
4998 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4999 if (prog->_LinkedShaders[i] == NULL)
5000 continue;
5001
5002 bool progress;
5003 exec_list *ir = prog->_LinkedShaders[i]->ir;
5004 const struct gl_shader_compiler_options *options =
5005 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5006
5007 do {
5008 unsigned what_to_lower = MOD_TO_FRACT | DIV_TO_MUL_RCP |
5009 EXP_TO_EXP2 | LOG_TO_LOG2;
5010 if (options->EmitNoPow)
5011 what_to_lower |= POW_TO_EXP2;
5012 if (!ctx->Const.NativeIntegers)
5013 what_to_lower |= INT_DIV_TO_MUL_RCP;
5014
5015 progress = false;
5016
5017 /* Lowering */
5018 do_mat_op_to_vec(ir);
5019 lower_instructions(ir, what_to_lower);
5020
5021 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5022
5023 progress = do_common_optimization(ir, true, true,
5024 options->MaxUnrollIterations)
5025 || progress;
5026
5027 progress = lower_quadop_vector(ir, false) || progress;
5028
5029 if (options->MaxIfDepth == 0)
5030 progress = lower_discard(ir) || progress;
5031
5032 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5033
5034 if (options->EmitNoNoise)
5035 progress = lower_noise(ir) || progress;
5036
5037 /* If there are forms of indirect addressing that the driver
5038 * cannot handle, perform the lowering pass.
5039 */
5040 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
5041 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
5042 progress =
5043 lower_variable_index_to_cond_assign(ir,
5044 options->EmitNoIndirectInput,
5045 options->EmitNoIndirectOutput,
5046 options->EmitNoIndirectTemp,
5047 options->EmitNoIndirectUniform)
5048 || progress;
5049
5050 progress = do_vec_index_to_cond_assign(ir) || progress;
5051 } while (progress);
5052
5053 validate_ir_tree(ir);
5054 }
5055
5056 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5057 struct gl_program *linked_prog;
5058
5059 if (prog->_LinkedShaders[i] == NULL)
5060 continue;
5061
5062 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5063
5064 if (linked_prog) {
5065 static const GLenum targets[] = {
5066 GL_VERTEX_PROGRAM_ARB,
5067 GL_FRAGMENT_PROGRAM_ARB,
5068 GL_GEOMETRY_PROGRAM_NV
5069 };
5070
5071 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5072 linked_prog);
5073 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5074 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5075 NULL);
5076 _mesa_reference_program(ctx, &linked_prog, NULL);
5077 return GL_FALSE;
5078 }
5079 }
5080
5081 _mesa_reference_program(ctx, &linked_prog, NULL);
5082 }
5083
5084 return GL_TRUE;
5085 }
5086
5087 void
5088 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5089 const GLuint outputMapping[],
5090 struct pipe_stream_output_info *so)
5091 {
5092 unsigned i;
5093 struct gl_transform_feedback_info *info =
5094 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5095
5096 for (i = 0; i < info->NumOutputs; i++) {
5097 so->output[i].register_index =
5098 outputMapping[info->Outputs[i].OutputRegister];
5099 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5100 so->output[i].num_components = info->Outputs[i].NumComponents;
5101 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5102 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5103 }
5104
5105 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5106 so->stride[i] = info->BufferStride[i];
5107 }
5108 so->num_outputs = info->NumOutputs;
5109 }
5110
5111 } /* extern "C" */