2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of temporary registers.
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
83 #define MAX_TEMPS 4096
86 * Maximum number of arrays
88 #define MAX_ARRAYS 256
90 #define MAX_GLSL_TEXTURE_OFFSET 4
95 static int swizzle_for_size(int size
);
98 * This struct is a corresponding struct to TGSI ureg_src.
102 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
106 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
107 this->swizzle
= swizzle_for_size(type
->vector_elements
);
109 this->swizzle
= SWIZZLE_XYZW
;
112 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
113 this->reladdr
= NULL
;
114 this->reladdr2
= NULL
;
115 this->has_index2
= false;
118 st_src_reg(gl_register_file file
, int index
, int type
)
124 this->swizzle
= SWIZZLE_XYZW
;
126 this->reladdr
= NULL
;
127 this->reladdr2
= NULL
;
128 this->has_index2
= false;
131 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
136 this->index2D
= index2D
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= NULL
;
140 this->reladdr2
= NULL
;
141 this->has_index2
= false;
146 this->type
= GLSL_TYPE_ERROR
;
147 this->file
= PROGRAM_UNDEFINED
;
152 this->reladdr
= NULL
;
153 this->reladdr2
= NULL
;
154 this->has_index2
= false;
157 explicit st_src_reg(st_dst_reg reg
);
159 gl_register_file file
; /**< PROGRAM_* from Mesa */
160 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate
; /**< NEGATE_XYZW mask from mesa */
164 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
167 st_src_reg
*reladdr2
;
173 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
177 this->writemask
= writemask
;
178 this->cond_mask
= COND_TR
;
179 this->reladdr
= NULL
;
183 st_dst_reg(gl_register_file file
, int writemask
, int type
)
187 this->writemask
= writemask
;
188 this->cond_mask
= COND_TR
;
189 this->reladdr
= NULL
;
195 this->type
= GLSL_TYPE_ERROR
;
196 this->file
= PROGRAM_UNDEFINED
;
199 this->cond_mask
= COND_TR
;
200 this->reladdr
= NULL
;
203 explicit st_dst_reg(st_src_reg reg
);
205 gl_register_file file
; /**< PROGRAM_* from Mesa */
206 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
209 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
214 st_src_reg::st_src_reg(st_dst_reg reg
)
216 this->type
= reg
.type
;
217 this->file
= reg
.file
;
218 this->index
= reg
.index
;
219 this->swizzle
= SWIZZLE_XYZW
;
221 this->reladdr
= reg
.reladdr
;
223 this->reladdr2
= NULL
;
224 this->has_index2
= false;
227 st_dst_reg::st_dst_reg(st_src_reg reg
)
229 this->type
= reg
.type
;
230 this->file
= reg
.file
;
231 this->index
= reg
.index
;
232 this->writemask
= WRITEMASK_XYZW
;
233 this->cond_mask
= COND_TR
;
234 this->reladdr
= reg
.reladdr
;
237 class glsl_to_tgsi_instruction
: public exec_node
{
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
244 /** Pointer to the ir source this tree came from for debugging */
246 GLboolean cond_update
;
248 int sampler
; /**< sampler index */
249 int tex_target
; /**< One of TEXTURE_*_INDEX */
250 GLboolean tex_shadow
;
252 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
253 unsigned tex_offset_num_offset
;
254 int dead_mask
; /**< Used in dead code elimination */
256 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
259 class variable_storage
: public exec_node
{
261 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
262 : file(file
), index(index
), var(var
)
267 gl_register_file file
;
269 ir_variable
*var
; /* variable that maps to this, if any */
272 class immediate_storage
: public exec_node
{
274 immediate_storage(gl_constant_value
*values
, int size
, int type
)
276 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
281 gl_constant_value values
[4];
282 int size
; /**< Number of components (1-4) */
283 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
286 class function_entry
: public exec_node
{
288 ir_function_signature
*sig
;
291 * identifier of this function signature used by the program.
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
301 * Pointer to first instruction of the function body.
303 * Set during function body emits after main() is processed.
305 glsl_to_tgsi_instruction
*bgn_inst
;
308 * Index of the first instruction of the function body in actual TGSI.
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
314 /** Storage for the return value. */
315 st_src_reg return_reg
;
318 struct glsl_to_tgsi_visitor
: public ir_visitor
{
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
323 function_entry
*current_function
;
325 struct gl_context
*ctx
;
326 struct gl_program
*prog
;
327 struct gl_shader_program
*shader_program
;
328 struct gl_shader
*shader
;
329 struct gl_shader_compiler_options
*options
;
333 unsigned array_sizes
[MAX_ARRAYS
];
336 int num_address_regs
;
338 bool indirect_addr_consts
;
341 bool native_integers
;
344 variable_storage
*find_variable_storage(ir_variable
*var
);
346 int add_constant(gl_register_file file
, gl_constant_value values
[4],
347 int size
, int datatype
, GLuint
*swizzle_out
);
349 function_entry
*get_function_signature(ir_function_signature
*sig
);
351 st_src_reg
get_temp(const glsl_type
*type
);
352 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
354 st_src_reg
st_src_reg_for_float(float val
);
355 st_src_reg
st_src_reg_for_int(int val
);
356 st_src_reg
st_src_reg_for_type(int type
, int val
);
359 * \name Visit methods
361 * As typical for the visitor pattern, there must be one \c visit method for
362 * each concrete subclass of \c ir_instruction. Virtual base classes within
363 * the hierarchy should not have \c visit methods.
366 virtual void visit(ir_variable
*);
367 virtual void visit(ir_loop
*);
368 virtual void visit(ir_loop_jump
*);
369 virtual void visit(ir_function_signature
*);
370 virtual void visit(ir_function
*);
371 virtual void visit(ir_expression
*);
372 virtual void visit(ir_swizzle
*);
373 virtual void visit(ir_dereference_variable
*);
374 virtual void visit(ir_dereference_array
*);
375 virtual void visit(ir_dereference_record
*);
376 virtual void visit(ir_assignment
*);
377 virtual void visit(ir_constant
*);
378 virtual void visit(ir_call
*);
379 virtual void visit(ir_return
*);
380 virtual void visit(ir_discard
*);
381 virtual void visit(ir_texture
*);
382 virtual void visit(ir_if
*);
383 virtual void visit(ir_emit_vertex
*);
384 virtual void visit(ir_end_primitive
*);
389 /** List of variable_storage */
392 /** List of immediate_storage */
393 exec_list immediates
;
394 unsigned num_immediates
;
396 /** List of function_entry */
397 exec_list function_signatures
;
398 int next_signature_id
;
400 /** List of glsl_to_tgsi_instruction */
401 exec_list instructions
;
403 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
405 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
406 st_dst_reg dst
, st_src_reg src0
);
408 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
409 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
411 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
413 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
415 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
417 st_src_reg src0
, st_src_reg src1
,
418 st_src_reg src2
, st_src_reg src3
);
420 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
422 st_src_reg src0
, st_src_reg src1
);
425 * Emit the correct dot-product instruction for the type of arguments
427 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
433 void emit_scalar(ir_instruction
*ir
, unsigned op
,
434 st_dst_reg dst
, st_src_reg src0
);
436 void emit_scalar(ir_instruction
*ir
, unsigned op
,
437 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
439 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
441 void emit_scs(ir_instruction
*ir
, unsigned op
,
442 st_dst_reg dst
, const st_src_reg
&src
);
444 bool try_emit_mad(ir_expression
*ir
,
446 bool try_emit_mad_for_and_not(ir_expression
*ir
,
448 bool try_emit_sat(ir_expression
*ir
);
450 void emit_swz(ir_expression
*ir
);
452 bool process_move_condition(ir_rvalue
*ir
);
454 void simplify_cmp(void);
456 void rename_temp_register(int index
, int new_index
);
457 int get_first_temp_read(int index
);
458 int get_first_temp_write(int index
);
459 int get_last_temp_read(int index
);
460 int get_last_temp_write(int index
);
462 void copy_propagate(void);
463 int eliminate_dead_code(void);
464 void merge_registers(void);
465 void renumber_registers(void);
467 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
468 st_dst_reg
*l
, st_src_reg
*r
);
473 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
475 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
477 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
478 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
481 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
484 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
488 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
491 prog
->LinkStatus
= GL_FALSE
;
495 swizzle_for_size(int size
)
497 int size_swizzles
[4] = {
498 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
499 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
500 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
501 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
504 assert((size
>= 1) && (size
<= 4));
505 return size_swizzles
[size
- 1];
509 is_tex_instruction(unsigned opcode
)
511 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
516 num_inst_dst_regs(unsigned opcode
)
518 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
519 return info
->num_dst
;
523 num_inst_src_regs(unsigned opcode
)
525 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
526 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
529 glsl_to_tgsi_instruction
*
530 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
532 st_src_reg src0
, st_src_reg src1
,
533 st_src_reg src2
, st_src_reg src3
)
535 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
536 int num_reladdr
= 0, i
;
538 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
540 /* If we have to do relative addressing, we want to load the ARL
541 * reg directly for one of the regs, and preload the other reladdr
542 * sources into temps.
544 num_reladdr
+= dst
.reladdr
!= NULL
;
545 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
546 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
547 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
548 num_reladdr
+= src3
.reladdr
!= NULL
|| src3
.reladdr2
!= NULL
;
550 reladdr_to_temp(ir
, &src3
, &num_reladdr
);
551 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
552 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
553 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
556 emit_arl(ir
, address_reg
, *dst
.reladdr
);
559 assert(num_reladdr
== 0);
570 inst
->function
= NULL
;
572 /* Update indirect addressing status used by TGSI */
575 case PROGRAM_STATE_VAR
:
576 case PROGRAM_CONSTANT
:
577 case PROGRAM_UNIFORM
:
578 this->indirect_addr_consts
= true;
580 case PROGRAM_IMMEDIATE
:
581 assert(!"immediates should not have indirect addressing");
588 for (i
=0; i
<4; i
++) {
589 if(inst
->src
[i
].reladdr
) {
590 switch(inst
->src
[i
].file
) {
591 case PROGRAM_STATE_VAR
:
592 case PROGRAM_CONSTANT
:
593 case PROGRAM_UNIFORM
:
594 this->indirect_addr_consts
= true;
596 case PROGRAM_IMMEDIATE
:
597 assert(!"immediates should not have indirect addressing");
606 this->instructions
.push_tail(inst
);
611 glsl_to_tgsi_instruction
*
612 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
613 st_dst_reg dst
, st_src_reg src0
,
614 st_src_reg src1
, st_src_reg src2
)
616 return emit(ir
, op
, dst
, src0
, src1
, src2
, undef_src
);
619 glsl_to_tgsi_instruction
*
620 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
621 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
623 return emit(ir
, op
, dst
, src0
, src1
, undef_src
, undef_src
);
626 glsl_to_tgsi_instruction
*
627 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
628 st_dst_reg dst
, st_src_reg src0
)
630 assert(dst
.writemask
!= 0);
631 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
, undef_src
);
634 glsl_to_tgsi_instruction
*
635 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
637 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
, undef_src
);
641 * Determines whether to use an integer, unsigned integer, or float opcode
642 * based on the operands and input opcode, then emits the result.
645 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
647 st_src_reg src0
, st_src_reg src1
)
649 int type
= GLSL_TYPE_FLOAT
;
651 if (op
== TGSI_OPCODE_MOV
)
654 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
655 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
656 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
657 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
659 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
660 type
= GLSL_TYPE_FLOAT
;
661 else if (native_integers
)
662 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) \
667 op = TGSI_OPCODE_##i; \
668 else if (type == GLSL_TYPE_UINT) \
669 op = TGSI_OPCODE_##u; \
671 op = TGSI_OPCODE_##f; \
674 #define case3(f, i, u) case4(f, f, i, u)
675 #define case2fi(f, i) case4(f, f, i, i)
676 #define case2iu(i, u) case4(i, LAST, i, u)
678 #define casecomp(c, f, i, u) \
679 case TGSI_OPCODE_##c: \
680 if (type == GLSL_TYPE_INT) \
681 op = TGSI_OPCODE_##i; \
682 else if (type == GLSL_TYPE_UINT) \
683 op = TGSI_OPCODE_##u; \
684 else if (native_integers) \
685 op = TGSI_OPCODE_##f; \
687 op = TGSI_OPCODE_##c; \
694 case3(DIV
, IDIV
, UDIV
);
695 case3(MAX
, IMAX
, UMAX
);
696 case3(MIN
, IMIN
, UMIN
);
699 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
700 casecomp(SNE
, FSNE
, USNE
, USNE
);
701 casecomp(SGE
, FSGE
, ISGE
, USGE
);
702 casecomp(SLT
, FSLT
, ISLT
, USLT
);
707 case3(ABS
, IABS
, IABS
);
711 case2iu(IMUL_HI
, UMUL_HI
);
715 assert(op
!= TGSI_OPCODE_LAST
);
719 glsl_to_tgsi_instruction
*
720 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
721 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
724 static const unsigned dot_opcodes
[] = {
725 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
728 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
732 * Emits TGSI scalar opcodes to produce unique answers across channels.
734 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
735 * channel determines the result across all channels. So to do a vec4
736 * of this operation, we want to emit a scalar per source channel used
737 * to produce dest channels.
740 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
742 st_src_reg orig_src0
, st_src_reg orig_src1
)
745 int done_mask
= ~dst
.writemask
;
747 /* TGSI RCP is a scalar operation splatting results to all channels,
748 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
751 for (i
= 0; i
< 4; i
++) {
752 GLuint this_mask
= (1 << i
);
753 glsl_to_tgsi_instruction
*inst
;
754 st_src_reg src0
= orig_src0
;
755 st_src_reg src1
= orig_src1
;
757 if (done_mask
& this_mask
)
760 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
761 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
762 for (j
= i
+ 1; j
< 4; j
++) {
763 /* If there is another enabled component in the destination that is
764 * derived from the same inputs, generate its value on this pass as
767 if (!(done_mask
& (1 << j
)) &&
768 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
769 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
770 this_mask
|= (1 << j
);
773 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
774 src0_swiz
, src0_swiz
);
775 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
776 src1_swiz
, src1_swiz
);
778 inst
= emit(ir
, op
, dst
, src0
, src1
);
779 inst
->dst
.writemask
= this_mask
;
780 done_mask
|= this_mask
;
785 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
786 st_dst_reg dst
, st_src_reg src0
)
788 st_src_reg undef
= undef_src
;
790 undef
.swizzle
= SWIZZLE_XXXX
;
792 emit_scalar(ir
, op
, dst
, src0
, undef
);
796 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
797 st_dst_reg dst
, st_src_reg src0
)
799 int op
= TGSI_OPCODE_ARL
;
801 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
802 op
= TGSI_OPCODE_UARL
;
804 assert(dst
.file
== PROGRAM_ADDRESS
);
805 if (dst
.index
>= this->num_address_regs
)
806 this->num_address_regs
= dst
.index
+ 1;
808 emit(NULL
, op
, dst
, src0
);
812 * Emit an TGSI_OPCODE_SCS instruction
814 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
815 * Instead of splatting its result across all four components of the
816 * destination, it writes one value to the \c x component and another value to
817 * the \c y component.
819 * \param ir IR instruction being processed
820 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
821 * on which value is desired.
822 * \param dst Destination register
823 * \param src Source register
826 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
828 const st_src_reg
&src
)
830 /* Vertex programs cannot use the SCS opcode.
832 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
833 emit_scalar(ir
, op
, dst
, src
);
837 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
838 const unsigned scs_mask
= (1U << component
);
839 int done_mask
= ~dst
.writemask
;
842 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
844 /* If there are compnents in the destination that differ from the component
845 * that will be written by the SCS instrution, we'll need a temporary.
847 if (scs_mask
!= unsigned(dst
.writemask
)) {
848 tmp
= get_temp(glsl_type::vec4_type
);
851 for (unsigned i
= 0; i
< 4; i
++) {
852 unsigned this_mask
= (1U << i
);
853 st_src_reg src0
= src
;
855 if ((done_mask
& this_mask
) != 0)
858 /* The source swizzle specified which component of the source generates
859 * sine / cosine for the current component in the destination. The SCS
860 * instruction requires that this value be swizzle to the X component.
861 * Replace the current swizzle with a swizzle that puts the source in
864 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
866 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
867 src0_swiz
, src0_swiz
);
868 for (unsigned j
= i
+ 1; j
< 4; j
++) {
869 /* If there is another enabled component in the destination that is
870 * derived from the same inputs, generate its value on this pass as
873 if (!(done_mask
& (1 << j
)) &&
874 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
875 this_mask
|= (1 << j
);
879 if (this_mask
!= scs_mask
) {
880 glsl_to_tgsi_instruction
*inst
;
881 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
883 /* Emit the SCS instruction.
885 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
886 inst
->dst
.writemask
= scs_mask
;
888 /* Move the result of the SCS instruction to the desired location in
891 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
892 component
, component
);
893 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
894 inst
->dst
.writemask
= this_mask
;
896 /* Emit the SCS instruction to write directly to the destination.
898 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
899 inst
->dst
.writemask
= scs_mask
;
902 done_mask
|= this_mask
;
907 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
908 gl_constant_value values
[4], int size
, int datatype
,
911 if (file
== PROGRAM_CONSTANT
) {
912 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
913 size
, datatype
, swizzle_out
);
916 immediate_storage
*entry
;
917 assert(file
== PROGRAM_IMMEDIATE
);
919 /* Search immediate storage to see if we already have an identical
920 * immediate that we can use instead of adding a duplicate entry.
922 foreach_list(node
, &this->immediates
) {
923 entry
= (immediate_storage
*) node
;
925 if (entry
->size
== size
&&
926 entry
->type
== datatype
&&
927 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
933 /* Add this immediate to the list. */
934 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
935 this->immediates
.push_tail(entry
);
936 this->num_immediates
++;
942 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
944 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
945 union gl_constant_value uval
;
948 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
954 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
956 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
957 union gl_constant_value uval
;
959 assert(native_integers
);
962 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
968 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
971 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
972 st_src_reg_for_int(val
);
974 return st_src_reg_for_float(val
);
978 type_size(const struct glsl_type
*type
)
983 switch (type
->base_type
) {
986 case GLSL_TYPE_FLOAT
:
988 if (type
->is_matrix()) {
989 return type
->matrix_columns
;
991 /* Regardless of size of vector, it gets a vec4. This is bad
992 * packing for things like floats, but otherwise arrays become a
993 * mess. Hopefully a later pass over the code can pack scalars
994 * down if appropriate.
998 case GLSL_TYPE_ARRAY
:
999 assert(type
->length
> 0);
1000 return type_size(type
->fields
.array
) * type
->length
;
1001 case GLSL_TYPE_STRUCT
:
1003 for (i
= 0; i
< type
->length
; i
++) {
1004 size
+= type_size(type
->fields
.structure
[i
].type
);
1007 case GLSL_TYPE_SAMPLER
:
1008 case GLSL_TYPE_IMAGE
:
1009 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1013 case GLSL_TYPE_ATOMIC_UINT
:
1014 case GLSL_TYPE_INTERFACE
:
1015 case GLSL_TYPE_VOID
:
1016 case GLSL_TYPE_ERROR
:
1017 assert(!"Invalid type in type_size");
1024 * In the initial pass of codegen, we assign temporary numbers to
1025 * intermediate results. (not SSA -- variable assignments will reuse
1029 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1033 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1037 if (!options
->EmitNoIndirectTemp
&&
1038 (type
->is_array() || type
->is_matrix())) {
1040 src
.file
= PROGRAM_ARRAY
;
1041 src
.index
= next_array
<< 16 | 0x8000;
1042 array_sizes
[next_array
] = type_size(type
);
1046 src
.file
= PROGRAM_TEMPORARY
;
1047 src
.index
= next_temp
;
1048 next_temp
+= type_size(type
);
1051 if (type
->is_array() || type
->is_record()) {
1052 src
.swizzle
= SWIZZLE_NOOP
;
1054 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1061 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1064 variable_storage
*entry
;
1066 foreach_list(node
, &this->variables
) {
1067 entry
= (variable_storage
*) node
;
1069 if (entry
->var
== var
)
1077 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1079 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1080 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1082 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1083 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1086 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1088 const ir_state_slot
*const slots
= ir
->state_slots
;
1089 assert(ir
->state_slots
!= NULL
);
1091 /* Check if this statevar's setup in the STATE file exactly
1092 * matches how we'll want to reference it as a
1093 * struct/array/whatever. If not, then we need to move it into
1094 * temporary storage and hope that it'll get copy-propagated
1097 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1098 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1103 variable_storage
*storage
;
1105 if (i
== ir
->num_state_slots
) {
1106 /* We'll set the index later. */
1107 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1108 this->variables
.push_tail(storage
);
1112 /* The variable_storage constructor allocates slots based on the size
1113 * of the type. However, this had better match the number of state
1114 * elements that we're going to copy into the new temporary.
1116 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1118 dst
= st_dst_reg(get_temp(ir
->type
));
1120 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1122 this->variables
.push_tail(storage
);
1126 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1127 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1128 (gl_state_index
*)slots
[i
].tokens
);
1130 if (storage
->file
== PROGRAM_STATE_VAR
) {
1131 if (storage
->index
== -1) {
1132 storage
->index
= index
;
1134 assert(index
== storage
->index
+ (int)i
);
1137 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1138 * the data being moved since MOV does not care about the type of
1139 * data it is moving, and we don't want to declare registers with
1140 * array or struct types.
1142 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1143 src
.swizzle
= slots
[i
].swizzle
;
1144 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1145 /* even a float takes up a whole vec4 reg in a struct/array. */
1150 if (storage
->file
== PROGRAM_TEMPORARY
&&
1151 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1152 fail_link(this->shader_program
,
1153 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1154 ir
->name
, dst
.index
- storage
->index
,
1155 type_size(ir
->type
));
1161 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1163 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1165 visit_exec_list(&ir
->body_instructions
, this);
1167 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1171 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1174 case ir_loop_jump::jump_break
:
1175 emit(NULL
, TGSI_OPCODE_BRK
);
1177 case ir_loop_jump::jump_continue
:
1178 emit(NULL
, TGSI_OPCODE_CONT
);
1185 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1192 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1194 /* Ignore function bodies other than main() -- we shouldn't see calls to
1195 * them since they should all be inlined before we get to glsl_to_tgsi.
1197 if (strcmp(ir
->name
, "main") == 0) {
1198 const ir_function_signature
*sig
;
1201 sig
= ir
->matching_signature(NULL
, &empty
);
1205 foreach_list(node
, &sig
->body
) {
1206 ir_instruction
*ir
= (ir_instruction
*) node
;
1214 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1216 int nonmul_operand
= 1 - mul_operand
;
1218 st_dst_reg result_dst
;
1220 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1221 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1224 expr
->operands
[0]->accept(this);
1226 expr
->operands
[1]->accept(this);
1228 ir
->operands
[nonmul_operand
]->accept(this);
1231 this->result
= get_temp(ir
->type
);
1232 result_dst
= st_dst_reg(this->result
);
1233 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1234 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1240 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1242 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1243 * implemented using multiplication, and logical-or is implemented using
1244 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1245 * As result, the logical expression (a & !b) can be rewritten as:
1249 * - (a * 1) - (a * b)
1253 * This final expression can be implemented as a single MAD(a, -b, a)
1257 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1259 const int other_operand
= 1 - try_operand
;
1262 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1263 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1266 ir
->operands
[other_operand
]->accept(this);
1268 expr
->operands
[0]->accept(this);
1271 b
.negate
= ~b
.negate
;
1273 this->result
= get_temp(ir
->type
);
1274 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1280 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1282 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1284 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1285 !st_context(this->ctx
)->has_shader_model3
) {
1289 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1293 sat_src
->accept(this);
1294 st_src_reg src
= this->result
;
1296 /* If we generated an expression instruction into a temporary in
1297 * processing the saturate's operand, apply the saturate to that
1298 * instruction. Otherwise, generate a MOV to do the saturate.
1300 * Note that we have to be careful to only do this optimization if
1301 * the instruction in question was what generated src->result. For
1302 * example, ir_dereference_array might generate a MUL instruction
1303 * to create the reladdr, and return us a src reg using that
1304 * reladdr. That MUL result is not the value we're trying to
1307 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1308 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1309 sat_src_expr
->operation
== ir_binop_add
||
1310 sat_src_expr
->operation
== ir_binop_dot
)) {
1311 glsl_to_tgsi_instruction
*new_inst
;
1312 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1313 new_inst
->saturate
= true;
1315 this->result
= get_temp(ir
->type
);
1316 st_dst_reg result_dst
= st_dst_reg(this->result
);
1317 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1318 glsl_to_tgsi_instruction
*inst
;
1319 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1320 inst
->saturate
= true;
1327 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1328 st_src_reg
*reg
, int *num_reladdr
)
1330 if (!reg
->reladdr
&& !reg
->reladdr2
)
1333 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1334 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1336 if (*num_reladdr
!= 1) {
1337 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1339 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1347 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1349 unsigned int operand
;
1350 st_src_reg op
[Elements(ir
->operands
)];
1351 st_src_reg result_src
;
1352 st_dst_reg result_dst
;
1354 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1356 if (ir
->operation
== ir_binop_add
) {
1357 if (try_emit_mad(ir
, 1))
1359 if (try_emit_mad(ir
, 0))
1363 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1365 if (ir
->operation
== ir_binop_logic_and
) {
1366 if (try_emit_mad_for_and_not(ir
, 1))
1368 if (try_emit_mad_for_and_not(ir
, 0))
1372 if (try_emit_sat(ir
))
1375 if (ir
->operation
== ir_quadop_vector
)
1376 assert(!"ir_quadop_vector should have been lowered");
1378 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1379 this->result
.file
= PROGRAM_UNDEFINED
;
1380 ir
->operands
[operand
]->accept(this);
1381 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1382 printf("Failed to get tree for expression operand:\n");
1383 ir
->operands
[operand
]->print();
1387 op
[operand
] = this->result
;
1389 /* Matrix expression operands should have been broken down to vector
1390 * operations already.
1392 assert(!ir
->operands
[operand
]->type
->is_matrix());
1395 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1396 if (ir
->operands
[1]) {
1397 vector_elements
= MAX2(vector_elements
,
1398 ir
->operands
[1]->type
->vector_elements
);
1401 this->result
.file
= PROGRAM_UNDEFINED
;
1403 /* Storage for our result. Ideally for an assignment we'd be using
1404 * the actual storage for the result here, instead.
1406 result_src
= get_temp(ir
->type
);
1407 /* convenience for the emit functions below. */
1408 result_dst
= st_dst_reg(result_src
);
1409 /* Limit writes to the channels that will be used by result_src later.
1410 * This does limit this temp's use as a temporary for multi-instruction
1413 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1415 switch (ir
->operation
) {
1416 case ir_unop_logic_not
:
1417 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1418 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1420 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1421 * older GPUs implement SEQ using multiple instructions (i915 uses two
1422 * SGE instructions and a MUL instruction). Since our logic values are
1423 * 0.0 and 1.0, 1-x also implements !x.
1425 op
[0].negate
= ~op
[0].negate
;
1426 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1430 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1431 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1433 op
[0].negate
= ~op
[0].negate
;
1438 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1441 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1444 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1448 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1452 assert(!"not reached: should be handled by ir_explog_to_explog2");
1455 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1458 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1461 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1463 case ir_unop_sin_reduced
:
1464 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1466 case ir_unop_cos_reduced
:
1467 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1471 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1475 /* The X component contains 1 or -1 depending on whether the framebuffer
1476 * is a FBO or the window system buffer, respectively.
1477 * It is then multiplied with the source operand of DDY.
1479 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1480 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1482 unsigned transform_y_index
=
1483 _mesa_add_state_reference(this->prog
->Parameters
,
1486 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1488 glsl_type::vec4_type
);
1489 transform_y
.swizzle
= SWIZZLE_XXXX
;
1491 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1493 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1494 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1498 case ir_unop_noise
: {
1499 /* At some point, a motivated person could add a better
1500 * implementation of noise. Currently not even the nvidia
1501 * binary drivers do anything more than this. In any case, the
1502 * place to do this is in the GL state tracker, not the poor
1505 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1510 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1513 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1517 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1520 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1521 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1523 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1526 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1527 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1529 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1533 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1535 case ir_binop_greater
:
1536 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1538 case ir_binop_lequal
:
1539 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1541 case ir_binop_gequal
:
1542 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1544 case ir_binop_equal
:
1545 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1547 case ir_binop_nequal
:
1548 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1550 case ir_binop_all_equal
:
1551 /* "==" operator producing a scalar boolean. */
1552 if (ir
->operands
[0]->type
->is_vector() ||
1553 ir
->operands
[1]->type
->is_vector()) {
1554 st_src_reg temp
= get_temp(native_integers
?
1555 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1556 glsl_type::vec4_type
);
1558 if (native_integers
) {
1559 st_dst_reg temp_dst
= st_dst_reg(temp
);
1560 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1562 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1564 /* Emit 1-3 AND operations to combine the SEQ results. */
1565 switch (ir
->operands
[0]->type
->vector_elements
) {
1569 temp_dst
.writemask
= WRITEMASK_Y
;
1570 temp1
.swizzle
= SWIZZLE_YYYY
;
1571 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1572 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1575 temp_dst
.writemask
= WRITEMASK_X
;
1576 temp1
.swizzle
= SWIZZLE_XXXX
;
1577 temp2
.swizzle
= SWIZZLE_YYYY
;
1578 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1579 temp_dst
.writemask
= WRITEMASK_Y
;
1580 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1581 temp2
.swizzle
= SWIZZLE_WWWW
;
1582 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1585 temp1
.swizzle
= SWIZZLE_XXXX
;
1586 temp2
.swizzle
= SWIZZLE_YYYY
;
1587 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1589 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1591 /* After the dot-product, the value will be an integer on the
1592 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1594 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1596 /* Negating the result of the dot-product gives values on the range
1597 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1598 * This is achieved using SGE.
1600 st_src_reg sge_src
= result_src
;
1601 sge_src
.negate
= ~sge_src
.negate
;
1602 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1605 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1608 case ir_binop_any_nequal
:
1609 /* "!=" operator producing a scalar boolean. */
1610 if (ir
->operands
[0]->type
->is_vector() ||
1611 ir
->operands
[1]->type
->is_vector()) {
1612 st_src_reg temp
= get_temp(native_integers
?
1613 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1614 glsl_type::vec4_type
);
1615 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1617 if (native_integers
) {
1618 st_dst_reg temp_dst
= st_dst_reg(temp
);
1619 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1621 /* Emit 1-3 OR operations to combine the SNE results. */
1622 switch (ir
->operands
[0]->type
->vector_elements
) {
1626 temp_dst
.writemask
= WRITEMASK_Y
;
1627 temp1
.swizzle
= SWIZZLE_YYYY
;
1628 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1629 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1632 temp_dst
.writemask
= WRITEMASK_X
;
1633 temp1
.swizzle
= SWIZZLE_XXXX
;
1634 temp2
.swizzle
= SWIZZLE_YYYY
;
1635 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1636 temp_dst
.writemask
= WRITEMASK_Y
;
1637 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1638 temp2
.swizzle
= SWIZZLE_WWWW
;
1639 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1642 temp1
.swizzle
= SWIZZLE_XXXX
;
1643 temp2
.swizzle
= SWIZZLE_YYYY
;
1644 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1646 /* After the dot-product, the value will be an integer on the
1647 * range [0,4]. Zero stays zero, and positive values become 1.0.
1649 glsl_to_tgsi_instruction
*const dp
=
1650 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1651 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1652 /* The clamping to [0,1] can be done for free in the fragment
1653 * shader with a saturate.
1655 dp
->saturate
= true;
1657 /* Negating the result of the dot-product gives values on the range
1658 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1659 * achieved using SLT.
1661 st_src_reg slt_src
= result_src
;
1662 slt_src
.negate
= ~slt_src
.negate
;
1663 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1667 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1672 assert(ir
->operands
[0]->type
->is_vector());
1674 if (native_integers
) {
1675 int dst_swizzle
= 0, op0_swizzle
, i
;
1676 st_src_reg accum
= op
[0];
1678 op0_swizzle
= op
[0].swizzle
;
1679 accum
.swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 0),
1680 GET_SWZ(op0_swizzle
, 0),
1681 GET_SWZ(op0_swizzle
, 0),
1682 GET_SWZ(op0_swizzle
, 0));
1683 for (i
= 0; i
< 4; i
++) {
1684 if (result_dst
.writemask
& (1 << i
)) {
1685 dst_swizzle
= MAKE_SWIZZLE4(i
, i
, i
, i
);
1690 assert(ir
->operands
[0]->type
->is_boolean());
1692 /* OR all the components together, since they should be either 0 or ~0
1694 switch (ir
->operands
[0]->type
->vector_elements
) {
1696 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 3),
1697 GET_SWZ(op0_swizzle
, 3),
1698 GET_SWZ(op0_swizzle
, 3),
1699 GET_SWZ(op0_swizzle
, 3));
1700 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1701 accum
= st_src_reg(result_dst
);
1702 accum
.swizzle
= dst_swizzle
;
1705 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 2),
1706 GET_SWZ(op0_swizzle
, 2),
1707 GET_SWZ(op0_swizzle
, 2),
1708 GET_SWZ(op0_swizzle
, 2));
1709 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1710 accum
= st_src_reg(result_dst
);
1711 accum
.swizzle
= dst_swizzle
;
1714 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 1),
1715 GET_SWZ(op0_swizzle
, 1),
1716 GET_SWZ(op0_swizzle
, 1),
1717 GET_SWZ(op0_swizzle
, 1));
1718 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1721 assert(!"Unexpected vector size");
1725 /* After the dot-product, the value will be an integer on the
1726 * range [0,4]. Zero stays zero, and positive values become 1.0.
1728 glsl_to_tgsi_instruction
*const dp
=
1729 emit_dp(ir
, result_dst
, op
[0], op
[0],
1730 ir
->operands
[0]->type
->vector_elements
);
1731 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1732 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1733 /* The clamping to [0,1] can be done for free in the fragment
1734 * shader with a saturate.
1736 dp
->saturate
= true;
1737 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1738 /* Negating the result of the dot-product gives values on the range
1739 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1740 * is achieved using SLT.
1742 st_src_reg slt_src
= result_src
;
1743 slt_src
.negate
= ~slt_src
.negate
;
1744 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1747 /* Use SNE 0 if integers are being used as boolean values. */
1748 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1754 case ir_binop_logic_xor
:
1755 if (native_integers
)
1756 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1758 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1761 case ir_binop_logic_or
: {
1762 if (native_integers
) {
1763 /* If integers are used as booleans, we can use an actual "or"
1766 assert(native_integers
);
1767 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1769 /* After the addition, the value will be an integer on the
1770 * range [0,2]. Zero stays zero, and positive values become 1.0.
1772 glsl_to_tgsi_instruction
*add
=
1773 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1774 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1775 /* The clamping to [0,1] can be done for free in the fragment
1776 * shader with a saturate if floats are being used as boolean values.
1778 add
->saturate
= true;
1780 /* Negating the result of the addition gives values on the range
1781 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1782 * is achieved using SLT.
1784 st_src_reg slt_src
= result_src
;
1785 slt_src
.negate
= ~slt_src
.negate
;
1786 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1792 case ir_binop_logic_and
:
1793 /* If native integers are disabled, the bool args are stored as float 0.0
1794 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1795 * actual AND opcode.
1797 if (native_integers
)
1798 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1800 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1804 assert(ir
->operands
[0]->type
->is_vector());
1805 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1806 emit_dp(ir
, result_dst
, op
[0], op
[1],
1807 ir
->operands
[0]->type
->vector_elements
);
1812 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1815 /* sqrt(x) = x * rsq(x). */
1816 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1817 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1818 /* For incoming channels <= 0, set the result to 0. */
1819 op
[0].negate
= ~op
[0].negate
;
1820 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1821 op
[0], result_src
, st_src_reg_for_float(0.0));
1825 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1828 if (native_integers
) {
1829 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1832 /* fallthrough to next case otherwise */
1834 if (native_integers
) {
1835 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1838 /* fallthrough to next case otherwise */
1841 /* Converting between signed and unsigned integers is a no-op. */
1845 if (native_integers
) {
1846 /* Booleans are stored as integers using ~0 for true and 0 for false.
1847 * GLSL requires that int(bool) return 1 for true and 0 for false.
1848 * This conversion is done with AND, but it could be done with NEG.
1850 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1852 /* Booleans and integers are both stored as floats when native
1853 * integers are disabled.
1859 if (native_integers
)
1860 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1862 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1865 if (native_integers
)
1866 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1868 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1870 case ir_unop_bitcast_f2i
:
1872 result_src
.type
= GLSL_TYPE_INT
;
1874 case ir_unop_bitcast_f2u
:
1876 result_src
.type
= GLSL_TYPE_UINT
;
1878 case ir_unop_bitcast_i2f
:
1879 case ir_unop_bitcast_u2f
:
1881 result_src
.type
= GLSL_TYPE_FLOAT
;
1884 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1887 if (native_integers
)
1888 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1890 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1893 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1896 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1899 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1901 case ir_unop_round_even
:
1902 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1905 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1909 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1912 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1915 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1918 case ir_unop_bit_not
:
1919 if (native_integers
) {
1920 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1924 if (native_integers
) {
1925 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1928 case ir_binop_lshift
:
1929 if (native_integers
) {
1930 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1933 case ir_binop_rshift
:
1934 if (native_integers
) {
1935 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1938 case ir_binop_bit_and
:
1939 if (native_integers
) {
1940 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1943 case ir_binop_bit_xor
:
1944 if (native_integers
) {
1945 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1948 case ir_binop_bit_or
:
1949 if (native_integers
) {
1950 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1954 assert(!"GLSL 1.30 features unsupported");
1957 case ir_binop_ubo_load
: {
1958 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1959 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1960 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1961 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1964 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1965 cbuf
.file
= PROGRAM_CONSTANT
;
1967 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1968 cbuf
.reladdr
= NULL
;
1971 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1973 if (const_offset_ir
) {
1974 /* Constant index into constant buffer */
1975 cbuf
.reladdr
= NULL
;
1976 cbuf
.index
= const_offset
/ 16;
1977 cbuf
.has_index2
= true;
1980 /* Relative/variable index into constant buffer */
1981 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1],
1982 st_src_reg_for_int(4));
1983 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1984 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1987 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1988 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1989 const_offset
% 16 / 4,
1990 const_offset
% 16 / 4,
1991 const_offset
% 16 / 4);
1993 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1994 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1996 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
2001 /* note: we have to reorder the three args here */
2002 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
2005 if (this->ctx
->Const
.NativeIntegers
)
2006 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
2008 op
[0].negate
= ~op
[0].negate
;
2009 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
2012 case ir_triop_bitfield_extract
:
2013 emit(ir
, TGSI_OPCODE_IBFE
, result_dst
, op
[0], op
[1], op
[2]);
2015 case ir_quadop_bitfield_insert
:
2016 emit(ir
, TGSI_OPCODE_BFI
, result_dst
, op
[0], op
[1], op
[2], op
[3]);
2018 case ir_unop_bitfield_reverse
:
2019 emit(ir
, TGSI_OPCODE_BREV
, result_dst
, op
[0]);
2021 case ir_unop_bit_count
:
2022 emit(ir
, TGSI_OPCODE_POPC
, result_dst
, op
[0]);
2024 case ir_unop_find_msb
:
2025 emit(ir
, TGSI_OPCODE_IMSB
, result_dst
, op
[0]);
2027 case ir_unop_find_lsb
:
2028 emit(ir
, TGSI_OPCODE_LSB
, result_dst
, op
[0]);
2030 case ir_binop_imul_high
:
2031 emit(ir
, TGSI_OPCODE_IMUL_HI
, result_dst
, op
[0], op
[1]);
2034 /* NOTE: Perhaps there should be a special opcode that enforces fused
2035 * mul-add. Just use MAD for now.
2037 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, op
[0], op
[1], op
[2]);
2039 case ir_unop_pack_snorm_2x16
:
2040 case ir_unop_pack_unorm_2x16
:
2041 case ir_unop_pack_half_2x16
:
2042 case ir_unop_pack_snorm_4x8
:
2043 case ir_unop_pack_unorm_4x8
:
2044 case ir_unop_unpack_snorm_2x16
:
2045 case ir_unop_unpack_unorm_2x16
:
2046 case ir_unop_unpack_half_2x16
:
2047 case ir_unop_unpack_half_2x16_split_x
:
2048 case ir_unop_unpack_half_2x16_split_y
:
2049 case ir_unop_unpack_snorm_4x8
:
2050 case ir_unop_unpack_unorm_4x8
:
2051 case ir_binop_pack_half_2x16_split
:
2054 case ir_quadop_vector
:
2055 case ir_binop_vector_extract
:
2056 case ir_triop_vector_insert
:
2057 case ir_binop_ldexp
:
2058 case ir_binop_carry
:
2059 case ir_binop_borrow
:
2060 /* This operation is not supported, or should have already been handled.
2062 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2066 this->result
= result_src
;
2071 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2077 /* Note that this is only swizzles in expressions, not those on the left
2078 * hand side of an assignment, which do write masking. See ir_assignment
2082 ir
->val
->accept(this);
2084 assert(src
.file
!= PROGRAM_UNDEFINED
);
2086 for (i
= 0; i
< 4; i
++) {
2087 if (i
< ir
->type
->vector_elements
) {
2090 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2093 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2096 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2099 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2103 /* If the type is smaller than a vec4, replicate the last
2106 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2110 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2116 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2118 variable_storage
*entry
= find_variable_storage(ir
->var
);
2119 ir_variable
*var
= ir
->var
;
2122 switch (var
->data
.mode
) {
2123 case ir_var_uniform
:
2124 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2125 var
->data
.location
);
2126 this->variables
.push_tail(entry
);
2128 case ir_var_shader_in
:
2129 /* The linker assigns locations for varyings and attributes,
2130 * including deprecated builtins (like gl_Color), user-assign
2131 * generic attributes (glBindVertexLocation), and
2132 * user-defined varyings.
2134 assert(var
->data
.location
!= -1);
2135 entry
= new(mem_ctx
) variable_storage(var
,
2137 var
->data
.location
);
2139 case ir_var_shader_out
:
2140 assert(var
->data
.location
!= -1);
2141 entry
= new(mem_ctx
) variable_storage(var
,
2146 case ir_var_system_value
:
2147 entry
= new(mem_ctx
) variable_storage(var
,
2148 PROGRAM_SYSTEM_VALUE
,
2149 var
->data
.location
);
2152 case ir_var_temporary
:
2153 st_src_reg src
= get_temp(var
->type
);
2155 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2156 this->variables
.push_tail(entry
);
2162 printf("Failed to make storage for %s\n", var
->name
);
2167 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2168 if (!native_integers
)
2169 this->result
.type
= GLSL_TYPE_FLOAT
;
2173 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2177 int element_size
= type_size(ir
->type
);
2180 index
= ir
->array_index
->constant_expression_value();
2182 ir
->array
->accept(this);
2185 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2186 src
.file
== PROGRAM_INPUT
&&
2187 ir
->array
->ir_type
!= ir_type_dereference_array
;
2194 src
.index2D
= index
->value
.i
[0];
2195 src
.has_index2
= true;
2197 src
.index
+= index
->value
.i
[0] * element_size
;
2199 /* Variable index array dereference. It eats the "vec4" of the
2200 * base of the array and an index that offsets the TGSI register
2203 ir
->array_index
->accept(this);
2205 st_src_reg index_reg
;
2207 if (element_size
== 1) {
2208 index_reg
= this->result
;
2210 index_reg
= get_temp(native_integers
?
2211 glsl_type::int_type
: glsl_type::float_type
);
2213 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2214 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2217 /* If there was already a relative address register involved, add the
2218 * new and the old together to get the new offset.
2220 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2221 st_src_reg accum_reg
= get_temp(native_integers
?
2222 glsl_type::int_type
: glsl_type::float_type
);
2224 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2225 index_reg
, *src
.reladdr
);
2227 index_reg
= accum_reg
;
2231 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2232 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2234 src
.has_index2
= true;
2236 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2237 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2241 /* If the type is smaller than a vec4, replicate the last channel out. */
2242 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2243 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2245 src
.swizzle
= SWIZZLE_NOOP
;
2247 /* Change the register type to the element type of the array. */
2248 src
.type
= ir
->type
->base_type
;
2254 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2257 const glsl_type
*struct_type
= ir
->record
->type
;
2260 ir
->record
->accept(this);
2262 for (i
= 0; i
< struct_type
->length
; i
++) {
2263 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2265 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2268 /* If the type is smaller than a vec4, replicate the last channel out. */
2269 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2270 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2272 this->result
.swizzle
= SWIZZLE_NOOP
;
2274 this->result
.index
+= offset
;
2275 this->result
.type
= ir
->type
->base_type
;
2279 * We want to be careful in assignment setup to hit the actual storage
2280 * instead of potentially using a temporary like we might with the
2281 * ir_dereference handler.
2284 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2286 /* The LHS must be a dereference. If the LHS is a variable indexed array
2287 * access of a vector, it must be separated into a series conditional moves
2288 * before reaching this point (see ir_vec_index_to_cond_assign).
2290 assert(ir
->as_dereference());
2291 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2293 assert(!deref_array
->array
->type
->is_vector());
2296 /* Use the rvalue deref handler for the most part. We'll ignore
2297 * swizzles in it and write swizzles using writemask, though.
2300 return st_dst_reg(v
->result
);
2304 * Process the condition of a conditional assignment
2306 * Examines the condition of a conditional assignment to generate the optimal
2307 * first operand of a \c CMP instruction. If the condition is a relational
2308 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2309 * used as the source for the \c CMP instruction. Otherwise the comparison
2310 * is processed to a boolean result, and the boolean result is used as the
2311 * operand to the CMP instruction.
2314 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2316 ir_rvalue
*src_ir
= ir
;
2318 bool switch_order
= false;
2320 ir_expression
*const expr
= ir
->as_expression();
2321 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2322 bool zero_on_left
= false;
2324 if (expr
->operands
[0]->is_zero()) {
2325 src_ir
= expr
->operands
[1];
2326 zero_on_left
= true;
2327 } else if (expr
->operands
[1]->is_zero()) {
2328 src_ir
= expr
->operands
[0];
2329 zero_on_left
= false;
2333 * (a < 0) T F F ( a < 0) T F F
2334 * (0 < a) F F T (-a < 0) F F T
2335 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2336 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2337 * (a > 0) F F T (-a < 0) F F T
2338 * (0 > a) T F F ( a < 0) T F F
2339 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2340 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2342 * Note that exchanging the order of 0 and 'a' in the comparison simply
2343 * means that the value of 'a' should be negated.
2346 switch (expr
->operation
) {
2348 switch_order
= false;
2349 negate
= zero_on_left
;
2352 case ir_binop_greater
:
2353 switch_order
= false;
2354 negate
= !zero_on_left
;
2357 case ir_binop_lequal
:
2358 switch_order
= true;
2359 negate
= !zero_on_left
;
2362 case ir_binop_gequal
:
2363 switch_order
= true;
2364 negate
= zero_on_left
;
2368 /* This isn't the right kind of comparison afterall, so make sure
2369 * the whole condition is visited.
2377 src_ir
->accept(this);
2379 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2380 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2381 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2382 * computing the condition.
2385 this->result
.negate
= ~this->result
.negate
;
2387 return switch_order
;
2391 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2392 st_dst_reg
*l
, st_src_reg
*r
)
2394 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2395 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2396 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2401 if (type
->is_array()) {
2402 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2403 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2408 if (type
->is_matrix()) {
2409 const struct glsl_type
*vec_type
;
2411 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2412 type
->vector_elements
, 1);
2414 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2415 emit_block_mov(ir
, vec_type
, l
, r
);
2420 assert(type
->is_scalar() || type
->is_vector());
2422 r
->type
= type
->base_type
;
2423 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2429 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2435 ir
->rhs
->accept(this);
2438 l
= get_assignment_lhs(ir
->lhs
, this);
2440 /* FINISHME: This should really set to the correct maximal writemask for each
2441 * FINISHME: component written (in the loops below). This case can only
2442 * FINISHME: occur for matrices, arrays, and structures.
2444 if (ir
->write_mask
== 0) {
2445 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2446 l
.writemask
= WRITEMASK_XYZW
;
2447 } else if (ir
->lhs
->type
->is_scalar() &&
2448 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2449 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2450 * FINISHME: W component of fragment shader output zero, work correctly.
2452 l
.writemask
= WRITEMASK_XYZW
;
2455 int first_enabled_chan
= 0;
2458 l
.writemask
= ir
->write_mask
;
2460 for (int i
= 0; i
< 4; i
++) {
2461 if (l
.writemask
& (1 << i
)) {
2462 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2467 /* Swizzle a small RHS vector into the channels being written.
2469 * glsl ir treats write_mask as dictating how many channels are
2470 * present on the RHS while TGSI treats write_mask as just
2471 * showing which channels of the vec4 RHS get written.
2473 for (int i
= 0; i
< 4; i
++) {
2474 if (l
.writemask
& (1 << i
))
2475 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2477 swizzles
[i
] = first_enabled_chan
;
2479 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2480 swizzles
[2], swizzles
[3]);
2483 assert(l
.file
!= PROGRAM_UNDEFINED
);
2484 assert(r
.file
!= PROGRAM_UNDEFINED
);
2486 if (ir
->condition
) {
2487 const bool switch_order
= this->process_move_condition(ir
->condition
);
2488 st_src_reg condition
= this->result
;
2490 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2491 st_src_reg l_src
= st_src_reg(l
);
2492 st_src_reg condition_temp
= condition
;
2493 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2495 if (native_integers
) {
2496 /* This is necessary because TGSI's CMP instruction expects the
2497 * condition to be a float, and we store booleans as integers.
2498 * TODO: really want to avoid i2f path and use UCMP. Requires
2499 * changes to process_move_condition though too.
2501 condition_temp
= get_temp(glsl_type::vec4_type
);
2502 condition
.negate
= 0;
2503 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2504 condition_temp
.swizzle
= condition
.swizzle
;
2508 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2510 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2516 } else if (ir
->rhs
->as_expression() &&
2517 this->instructions
.get_tail() &&
2518 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2519 type_size(ir
->lhs
->type
) == 1 &&
2520 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2521 /* To avoid emitting an extra MOV when assigning an expression to a
2522 * variable, emit the last instruction of the expression again, but
2523 * replace the destination register with the target of the assignment.
2524 * Dead code elimination will remove the original instruction.
2526 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2527 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2528 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2529 new_inst
->saturate
= inst
->saturate
;
2530 inst
->dead_mask
= inst
->dst
.writemask
;
2532 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2538 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2541 GLfloat stack_vals
[4] = { 0 };
2542 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2543 GLenum gl_type
= GL_NONE
;
2545 static int in_array
= 0;
2546 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2548 /* Unfortunately, 4 floats is all we can get into
2549 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2550 * aggregate constant and move each constant value into it. If we
2551 * get lucky, copy propagation will eliminate the extra moves.
2553 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2554 st_src_reg temp_base
= get_temp(ir
->type
);
2555 st_dst_reg temp
= st_dst_reg(temp_base
);
2557 foreach_list(node
, &ir
->components
) {
2558 ir_constant
*field_value
= (ir_constant
*) node
;
2559 int size
= type_size(field_value
->type
);
2563 field_value
->accept(this);
2566 for (i
= 0; i
< (unsigned int)size
; i
++) {
2567 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2573 this->result
= temp_base
;
2577 if (ir
->type
->is_array()) {
2578 st_src_reg temp_base
= get_temp(ir
->type
);
2579 st_dst_reg temp
= st_dst_reg(temp_base
);
2580 int size
= type_size(ir
->type
->fields
.array
);
2585 for (i
= 0; i
< ir
->type
->length
; i
++) {
2586 ir
->array_elements
[i
]->accept(this);
2588 for (int j
= 0; j
< size
; j
++) {
2589 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2595 this->result
= temp_base
;
2600 if (ir
->type
->is_matrix()) {
2601 st_src_reg mat
= get_temp(ir
->type
);
2602 st_dst_reg mat_column
= st_dst_reg(mat
);
2604 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2605 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2606 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2608 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2609 src
.index
= add_constant(file
,
2611 ir
->type
->vector_elements
,
2614 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2623 switch (ir
->type
->base_type
) {
2624 case GLSL_TYPE_FLOAT
:
2626 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2627 values
[i
].f
= ir
->value
.f
[i
];
2630 case GLSL_TYPE_UINT
:
2631 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2632 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2633 if (native_integers
)
2634 values
[i
].u
= ir
->value
.u
[i
];
2636 values
[i
].f
= ir
->value
.u
[i
];
2640 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2641 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2642 if (native_integers
)
2643 values
[i
].i
= ir
->value
.i
[i
];
2645 values
[i
].f
= ir
->value
.i
[i
];
2648 case GLSL_TYPE_BOOL
:
2649 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2650 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2651 if (native_integers
)
2652 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2654 values
[i
].f
= ir
->value
.b
[i
];
2658 assert(!"Non-float/uint/int/bool constant");
2661 this->result
= st_src_reg(file
, -1, ir
->type
);
2662 this->result
.index
= add_constant(file
,
2664 ir
->type
->vector_elements
,
2666 &this->result
.swizzle
);
2670 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2672 function_entry
*entry
;
2674 foreach_list(node
, &this->function_signatures
) {
2675 entry
= (function_entry
*) node
;
2677 if (entry
->sig
== sig
)
2681 entry
= ralloc(mem_ctx
, function_entry
);
2683 entry
->sig_id
= this->next_signature_id
++;
2684 entry
->bgn_inst
= NULL
;
2686 /* Allocate storage for all the parameters. */
2687 foreach_list(node
, &sig
->parameters
) {
2688 ir_variable
*param
= (ir_variable
*) node
;
2689 variable_storage
*storage
;
2691 storage
= find_variable_storage(param
);
2694 st_src_reg src
= get_temp(param
->type
);
2696 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2697 this->variables
.push_tail(storage
);
2700 if (!sig
->return_type
->is_void()) {
2701 entry
->return_reg
= get_temp(sig
->return_type
);
2703 entry
->return_reg
= undef_src
;
2706 this->function_signatures
.push_tail(entry
);
2711 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2713 glsl_to_tgsi_instruction
*call_inst
;
2714 ir_function_signature
*sig
= ir
->callee
;
2715 function_entry
*entry
= get_function_signature(sig
);
2718 /* Process in parameters. */
2719 foreach_two_lists(formal_node
, &sig
->parameters
,
2720 actual_node
, &ir
->actual_parameters
) {
2721 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2722 ir_variable
*param
= (ir_variable
*) formal_node
;
2724 if (param
->data
.mode
== ir_var_function_in
||
2725 param
->data
.mode
== ir_var_function_inout
) {
2726 variable_storage
*storage
= find_variable_storage(param
);
2729 param_rval
->accept(this);
2730 st_src_reg r
= this->result
;
2733 l
.file
= storage
->file
;
2734 l
.index
= storage
->index
;
2736 l
.writemask
= WRITEMASK_XYZW
;
2737 l
.cond_mask
= COND_TR
;
2739 for (i
= 0; i
< type_size(param
->type
); i
++) {
2740 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2747 /* Emit call instruction */
2748 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2749 call_inst
->function
= entry
;
2751 /* Process out parameters. */
2752 foreach_two_lists(formal_node
, &sig
->parameters
,
2753 actual_node
, &ir
->actual_parameters
) {
2754 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2755 ir_variable
*param
= (ir_variable
*) formal_node
;
2757 if (param
->data
.mode
== ir_var_function_out
||
2758 param
->data
.mode
== ir_var_function_inout
) {
2759 variable_storage
*storage
= find_variable_storage(param
);
2763 r
.file
= storage
->file
;
2764 r
.index
= storage
->index
;
2766 r
.swizzle
= SWIZZLE_NOOP
;
2769 param_rval
->accept(this);
2770 st_dst_reg l
= st_dst_reg(this->result
);
2772 for (i
= 0; i
< type_size(param
->type
); i
++) {
2773 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2780 /* Process return value. */
2781 this->result
= entry
->return_reg
;
2785 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2787 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
;
2788 st_src_reg offset
[MAX_GLSL_TEXTURE_OFFSET
], sample_index
, component
;
2789 st_src_reg levels_src
;
2790 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2791 glsl_to_tgsi_instruction
*inst
= NULL
;
2792 unsigned opcode
= TGSI_OPCODE_NOP
;
2793 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2794 bool is_cube_array
= false;
2797 /* if we are a cube array sampler */
2798 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2799 sampler_type
->sampler_array
)) {
2800 is_cube_array
= true;
2803 if (ir
->coordinate
) {
2804 ir
->coordinate
->accept(this);
2806 /* Put our coords in a temp. We'll need to modify them for shadow,
2807 * projection, or LOD, so the only case we'd use it as is is if
2808 * we're doing plain old texturing. The optimization passes on
2809 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2811 coord
= get_temp(glsl_type::vec4_type
);
2812 coord_dst
= st_dst_reg(coord
);
2813 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2814 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2817 if (ir
->projector
) {
2818 ir
->projector
->accept(this);
2819 projector
= this->result
;
2822 /* Storage for our result. Ideally for an assignment we'd be using
2823 * the actual storage for the result here, instead.
2825 result_src
= get_temp(ir
->type
);
2826 result_dst
= st_dst_reg(result_src
);
2830 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2832 ir
->offset
->accept(this);
2833 offset
[0] = this->result
;
2837 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2838 ir
->lod_info
.bias
->accept(this);
2839 lod_info
= this->result
;
2841 ir
->offset
->accept(this);
2842 offset
[0] = this->result
;
2846 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2847 ir
->lod_info
.lod
->accept(this);
2848 lod_info
= this->result
;
2850 ir
->offset
->accept(this);
2851 offset
[0] = this->result
;
2855 opcode
= TGSI_OPCODE_TXD
;
2856 ir
->lod_info
.grad
.dPdx
->accept(this);
2858 ir
->lod_info
.grad
.dPdy
->accept(this);
2861 ir
->offset
->accept(this);
2862 offset
[0] = this->result
;
2866 opcode
= TGSI_OPCODE_TXQ
;
2867 ir
->lod_info
.lod
->accept(this);
2868 lod_info
= this->result
;
2870 case ir_query_levels
:
2871 opcode
= TGSI_OPCODE_TXQ
;
2872 lod_info
= st_src_reg(PROGRAM_IMMEDIATE
, 0, GLSL_TYPE_INT
);
2873 levels_src
= get_temp(ir
->type
);
2876 opcode
= TGSI_OPCODE_TXF
;
2877 ir
->lod_info
.lod
->accept(this);
2878 lod_info
= this->result
;
2880 ir
->offset
->accept(this);
2881 offset
[0] = this->result
;
2885 opcode
= TGSI_OPCODE_TXF
;
2886 ir
->lod_info
.sample_index
->accept(this);
2887 sample_index
= this->result
;
2890 opcode
= TGSI_OPCODE_TG4
;
2891 ir
->lod_info
.component
->accept(this);
2892 component
= this->result
;
2894 ir
->offset
->accept(this);
2895 if (ir
->offset
->type
->base_type
== GLSL_TYPE_ARRAY
) {
2896 const glsl_type
*elt_type
= ir
->offset
->type
->fields
.array
;
2897 for (i
= 0; i
< ir
->offset
->type
->length
; i
++) {
2898 offset
[i
] = this->result
;
2899 offset
[i
].index
+= i
* type_size(elt_type
);
2900 offset
[i
].type
= elt_type
->base_type
;
2901 offset
[i
].swizzle
= swizzle_for_size(elt_type
->vector_elements
);
2904 offset
[0] = this->result
;
2909 opcode
= TGSI_OPCODE_LODQ
;
2913 if (ir
->projector
) {
2914 if (opcode
== TGSI_OPCODE_TEX
) {
2915 /* Slot the projector in as the last component of the coord. */
2916 coord_dst
.writemask
= WRITEMASK_W
;
2917 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2918 coord_dst
.writemask
= WRITEMASK_XYZW
;
2919 opcode
= TGSI_OPCODE_TXP
;
2921 st_src_reg coord_w
= coord
;
2922 coord_w
.swizzle
= SWIZZLE_WWWW
;
2924 /* For the other TEX opcodes there's no projective version
2925 * since the last slot is taken up by LOD info. Do the
2926 * projective divide now.
2928 coord_dst
.writemask
= WRITEMASK_W
;
2929 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2931 /* In the case where we have to project the coordinates "by hand,"
2932 * the shadow comparator value must also be projected.
2934 st_src_reg tmp_src
= coord
;
2935 if (ir
->shadow_comparitor
) {
2936 /* Slot the shadow value in as the second to last component of the
2939 ir
->shadow_comparitor
->accept(this);
2941 tmp_src
= get_temp(glsl_type::vec4_type
);
2942 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2944 /* Projective division not allowed for array samplers. */
2945 assert(!sampler_type
->sampler_array
);
2947 tmp_dst
.writemask
= WRITEMASK_Z
;
2948 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2950 tmp_dst
.writemask
= WRITEMASK_XY
;
2951 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2954 coord_dst
.writemask
= WRITEMASK_XYZ
;
2955 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2957 coord_dst
.writemask
= WRITEMASK_XYZW
;
2958 coord
.swizzle
= SWIZZLE_XYZW
;
2962 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2963 * comparator was put in the correct place (and projected) by the code,
2964 * above, that handles by-hand projection.
2966 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2967 /* Slot the shadow value in as the second to last component of the
2970 ir
->shadow_comparitor
->accept(this);
2972 if (is_cube_array
) {
2973 cube_sc
= get_temp(glsl_type::float_type
);
2974 cube_sc_dst
= st_dst_reg(cube_sc
);
2975 cube_sc_dst
.writemask
= WRITEMASK_X
;
2976 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2977 cube_sc_dst
.writemask
= WRITEMASK_X
;
2980 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2981 sampler_type
->sampler_array
) ||
2982 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2983 coord_dst
.writemask
= WRITEMASK_W
;
2985 coord_dst
.writemask
= WRITEMASK_Z
;
2988 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2989 coord_dst
.writemask
= WRITEMASK_XYZW
;
2993 if (ir
->op
== ir_txf_ms
) {
2994 coord_dst
.writemask
= WRITEMASK_W
;
2995 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2996 coord_dst
.writemask
= WRITEMASK_XYZW
;
2997 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2998 opcode
== TGSI_OPCODE_TXF
) {
2999 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3000 coord_dst
.writemask
= WRITEMASK_W
;
3001 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
3002 coord_dst
.writemask
= WRITEMASK_XYZW
;
3005 if (opcode
== TGSI_OPCODE_TXD
)
3006 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
3007 else if (opcode
== TGSI_OPCODE_TXQ
) {
3008 if (ir
->op
== ir_query_levels
) {
3009 /* the level is stored in W */
3010 inst
= emit(ir
, opcode
, st_dst_reg(levels_src
), lod_info
);
3011 result_dst
.writemask
= WRITEMASK_X
;
3012 levels_src
.swizzle
= SWIZZLE_WWWW
;
3013 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, levels_src
);
3015 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
3016 } else if (opcode
== TGSI_OPCODE_TXF
) {
3017 inst
= emit(ir
, opcode
, result_dst
, coord
);
3018 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
3019 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
3020 } else if (opcode
== TGSI_OPCODE_TEX2
) {
3021 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
3022 } else if (opcode
== TGSI_OPCODE_TG4
) {
3023 if (is_cube_array
&& ir
->shadow_comparitor
) {
3024 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
3026 inst
= emit(ir
, opcode
, result_dst
, coord
, component
);
3029 inst
= emit(ir
, opcode
, result_dst
, coord
);
3031 if (ir
->shadow_comparitor
)
3032 inst
->tex_shadow
= GL_TRUE
;
3034 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
3035 this->shader_program
,
3039 for (i
= 0; i
< MAX_GLSL_TEXTURE_OFFSET
&& offset
[i
].file
!= PROGRAM_UNDEFINED
; i
++)
3040 inst
->tex_offsets
[i
] = offset
[i
];
3041 inst
->tex_offset_num_offset
= i
;
3044 switch (sampler_type
->sampler_dimensionality
) {
3045 case GLSL_SAMPLER_DIM_1D
:
3046 inst
->tex_target
= (sampler_type
->sampler_array
)
3047 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
3049 case GLSL_SAMPLER_DIM_2D
:
3050 inst
->tex_target
= (sampler_type
->sampler_array
)
3051 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
3053 case GLSL_SAMPLER_DIM_3D
:
3054 inst
->tex_target
= TEXTURE_3D_INDEX
;
3056 case GLSL_SAMPLER_DIM_CUBE
:
3057 inst
->tex_target
= (sampler_type
->sampler_array
)
3058 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
3060 case GLSL_SAMPLER_DIM_RECT
:
3061 inst
->tex_target
= TEXTURE_RECT_INDEX
;
3063 case GLSL_SAMPLER_DIM_BUF
:
3064 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
3066 case GLSL_SAMPLER_DIM_EXTERNAL
:
3067 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
3069 case GLSL_SAMPLER_DIM_MS
:
3070 inst
->tex_target
= (sampler_type
->sampler_array
)
3071 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
3074 assert(!"Should not get here.");
3077 this->result
= result_src
;
3081 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
3083 if (ir
->get_value()) {
3087 assert(current_function
);
3089 ir
->get_value()->accept(this);
3090 st_src_reg r
= this->result
;
3092 l
= st_dst_reg(current_function
->return_reg
);
3094 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
3095 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
3101 emit(ir
, TGSI_OPCODE_RET
);
3105 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
3107 if (ir
->condition
) {
3108 ir
->condition
->accept(this);
3109 this->result
.negate
= ~this->result
.negate
;
3110 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
3112 /* unconditional kil */
3113 emit(ir
, TGSI_OPCODE_KILL
);
3118 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3121 glsl_to_tgsi_instruction
*if_inst
;
3123 ir
->condition
->accept(this);
3124 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3126 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3128 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3130 this->instructions
.push_tail(if_inst
);
3132 visit_exec_list(&ir
->then_instructions
, this);
3134 if (!ir
->else_instructions
.is_empty()) {
3135 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3136 visit_exec_list(&ir
->else_instructions
, this);
3139 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3144 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3146 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3148 ir
->stream
->accept(this);
3149 emit(ir
, TGSI_OPCODE_EMIT
, undef_dst
, this->result
);
3153 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3155 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3157 ir
->stream
->accept(this);
3158 emit(ir
, TGSI_OPCODE_ENDPRIM
, undef_dst
, this->result
);
3161 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3163 result
.file
= PROGRAM_UNDEFINED
;
3166 next_signature_id
= 1;
3168 current_function
= NULL
;
3169 num_address_regs
= 0;
3171 indirect_addr_consts
= false;
3173 native_integers
= false;
3174 mem_ctx
= ralloc_context(NULL
);
3177 shader_program
= NULL
;
3182 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3184 ralloc_free(mem_ctx
);
3187 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3194 * Count resources used by the given gpu program (number of texture
3198 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3200 v
->samplers_used
= 0;
3202 foreach_list(node
, &v
->instructions
) {
3203 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3205 if (is_tex_instruction(inst
->op
)) {
3206 v
->samplers_used
|= 1 << inst
->sampler
;
3208 if (inst
->tex_shadow
) {
3209 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3214 prog
->SamplersUsed
= v
->samplers_used
;
3216 if (v
->shader_program
!= NULL
)
3217 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3221 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3222 struct gl_shader_program
*shader_program
,
3223 const char *name
, const glsl_type
*type
,
3226 if (type
->is_record()) {
3227 ir_constant
*field_constant
;
3229 field_constant
= (ir_constant
*)val
->components
.get_head();
3231 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3232 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3233 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3234 type
->fields
.structure
[i
].name
);
3235 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3236 field_type
, field_constant
);
3237 field_constant
= (ir_constant
*)field_constant
->next
;
3243 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3245 if (offset
== GL_INVALID_INDEX
) {
3246 fail_link(shader_program
,
3247 "Couldn't find uniform for initializer %s\n", name
);
3250 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3252 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3253 ir_constant
*element
;
3254 const glsl_type
*element_type
;
3255 if (type
->is_array()) {
3256 element
= val
->array_elements
[i
];
3257 element_type
= type
->fields
.array
;
3260 element_type
= type
;
3265 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3266 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3267 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3268 conv
[j
] = element
->value
.b
[j
];
3270 values
= (void *)conv
;
3271 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3272 element_type
->vector_elements
,
3275 values
= &element
->value
;
3278 if (element_type
->is_matrix()) {
3279 _mesa_uniform_matrix(ctx
, shader_program
,
3280 element_type
->matrix_columns
,
3281 element_type
->vector_elements
,
3282 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3284 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3285 values
, element_type
->gl_type
);
3293 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3294 * are read from the given src in this instruction
3297 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3299 int read_mask
= 0, comp
;
3301 /* Now, given the src swizzle and the written channels, find which
3302 * components are actually read
3304 for (comp
= 0; comp
< 4; ++comp
) {
3305 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3307 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3308 read_mask
|= 1 << coord
;
3315 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3316 * instruction is the first instruction to write to register T0. There are
3317 * several lowering passes done in GLSL IR (e.g. branches and
3318 * relative addressing) that create a large number of conditional assignments
3319 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3321 * Here is why this conversion is safe:
3322 * CMP T0, T1 T2 T0 can be expanded to:
3328 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3329 * as the original program. If (T1 < 0.0) evaluates to false, executing
3330 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3331 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3332 * because any instruction that was going to read from T0 after this was going
3333 * to read a garbage value anyway.
3336 glsl_to_tgsi_visitor::simplify_cmp(void)
3338 unsigned *tempWrites
;
3339 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3341 tempWrites
= new unsigned[MAX_TEMPS
];
3345 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3346 memset(outputWrites
, 0, sizeof(outputWrites
));
3348 foreach_list(node
, &this->instructions
) {
3349 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3350 unsigned prevWriteMask
= 0;
3352 /* Give up if we encounter relative addressing or flow control. */
3353 if (inst
->dst
.reladdr
||
3354 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3355 inst
->op
== TGSI_OPCODE_BGNSUB
||
3356 inst
->op
== TGSI_OPCODE_CONT
||
3357 inst
->op
== TGSI_OPCODE_END
||
3358 inst
->op
== TGSI_OPCODE_ENDSUB
||
3359 inst
->op
== TGSI_OPCODE_RET
) {
3363 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3364 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3365 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3366 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3367 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3368 assert(inst
->dst
.index
< MAX_TEMPS
);
3369 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3370 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3374 /* For a CMP to be considered a conditional write, the destination
3375 * register and source register two must be the same. */
3376 if (inst
->op
== TGSI_OPCODE_CMP
3377 && !(inst
->dst
.writemask
& prevWriteMask
)
3378 && inst
->src
[2].file
== inst
->dst
.file
3379 && inst
->src
[2].index
== inst
->dst
.index
3380 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3382 inst
->op
= TGSI_OPCODE_MOV
;
3383 inst
->src
[0] = inst
->src
[1];
3387 delete [] tempWrites
;
3390 /* Replaces all references to a temporary register index with another index. */
3392 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3394 foreach_list(node
, &this->instructions
) {
3395 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3398 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3399 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3400 inst
->src
[j
].index
== index
) {
3401 inst
->src
[j
].index
= new_index
;
3405 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3406 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3407 inst
->tex_offsets
[j
].index
== index
) {
3408 inst
->tex_offsets
[j
].index
= new_index
;
3412 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3413 inst
->dst
.index
= new_index
;
3419 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3421 int depth
= 0; /* loop depth */
3422 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3425 foreach_list(node
, &this->instructions
) {
3426 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3428 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3429 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3430 inst
->src
[j
].index
== index
) {
3431 return (depth
== 0) ? i
: loop_start
;
3434 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3435 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3436 inst
->tex_offsets
[j
].index
== index
) {
3437 return (depth
== 0) ? i
: loop_start
;
3441 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3444 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3457 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3459 int depth
= 0; /* loop depth */
3460 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3463 foreach_list(node
, &this->instructions
) {
3464 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3466 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3467 return (depth
== 0) ? i
: loop_start
;
3470 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3473 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3486 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3488 int depth
= 0; /* loop depth */
3489 int last
= -1; /* index of last instruction that reads the temporary */
3492 foreach_list(node
, &this->instructions
) {
3493 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3495 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3496 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3497 inst
->src
[j
].index
== index
) {
3498 last
= (depth
== 0) ? i
: -2;
3501 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3502 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3503 inst
->tex_offsets
[j
].index
== index
)
3504 last
= (depth
== 0) ? i
: -2;
3507 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3509 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3510 if (--depth
== 0 && last
== -2)
3522 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3524 int depth
= 0; /* loop depth */
3525 int last
= -1; /* index of last instruction that writes to the temporary */
3528 foreach_list(node
, &this->instructions
) {
3529 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3531 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3532 last
= (depth
== 0) ? i
: -2;
3534 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3536 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3537 if (--depth
== 0 && last
== -2)
3549 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3550 * channels for copy propagation and updates following instructions to
3551 * use the original versions.
3553 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3554 * will occur. As an example, a TXP production before this pass:
3556 * 0: MOV TEMP[1], INPUT[4].xyyy;
3557 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3558 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3562 * 0: MOV TEMP[1], INPUT[4].xyyy;
3563 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3564 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3566 * which allows for dead code elimination on TEMP[1]'s writes.
3569 glsl_to_tgsi_visitor::copy_propagate(void)
3571 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3572 glsl_to_tgsi_instruction
*,
3573 this->next_temp
* 4);
3574 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3577 foreach_list(node
, &this->instructions
) {
3578 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3580 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3581 || inst
->dst
.index
< this->next_temp
);
3583 /* First, do any copy propagation possible into the src regs. */
3584 for (int r
= 0; r
< 3; r
++) {
3585 glsl_to_tgsi_instruction
*first
= NULL
;
3587 int acp_base
= inst
->src
[r
].index
* 4;
3589 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3590 inst
->src
[r
].reladdr
||
3591 inst
->src
[r
].reladdr2
)
3594 /* See if we can find entries in the ACP consisting of MOVs
3595 * from the same src register for all the swizzled channels
3596 * of this src register reference.
3598 for (int i
= 0; i
< 4; i
++) {
3599 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3600 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3607 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3612 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3613 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3621 /* We've now validated that we can copy-propagate to
3622 * replace this src register reference. Do it.
3624 inst
->src
[r
].file
= first
->src
[0].file
;
3625 inst
->src
[r
].index
= first
->src
[0].index
;
3626 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3627 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3630 for (int i
= 0; i
< 4; i
++) {
3631 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3632 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3633 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3636 inst
->src
[r
].swizzle
= swizzle
;
3641 case TGSI_OPCODE_BGNLOOP
:
3642 case TGSI_OPCODE_ENDLOOP
:
3643 /* End of a basic block, clear the ACP entirely. */
3644 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3647 case TGSI_OPCODE_IF
:
3648 case TGSI_OPCODE_UIF
:
3652 case TGSI_OPCODE_ENDIF
:
3653 case TGSI_OPCODE_ELSE
:
3654 /* Clear all channels written inside the block from the ACP, but
3655 * leaving those that were not touched.
3657 for (int r
= 0; r
< this->next_temp
; r
++) {
3658 for (int c
= 0; c
< 4; c
++) {
3659 if (!acp
[4 * r
+ c
])
3662 if (acp_level
[4 * r
+ c
] >= level
)
3663 acp
[4 * r
+ c
] = NULL
;
3666 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3671 /* Continuing the block, clear any written channels from
3674 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3675 /* Any temporary might be written, so no copy propagation
3676 * across this instruction.
3678 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3679 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3680 inst
->dst
.reladdr
) {
3681 /* Any output might be written, so no copy propagation
3682 * from outputs across this instruction.
3684 for (int r
= 0; r
< this->next_temp
; r
++) {
3685 for (int c
= 0; c
< 4; c
++) {
3686 if (!acp
[4 * r
+ c
])
3689 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3690 acp
[4 * r
+ c
] = NULL
;
3693 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3694 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3695 /* Clear where it's used as dst. */
3696 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3697 for (int c
= 0; c
< 4; c
++) {
3698 if (inst
->dst
.writemask
& (1 << c
)) {
3699 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3704 /* Clear where it's used as src. */
3705 for (int r
= 0; r
< this->next_temp
; r
++) {
3706 for (int c
= 0; c
< 4; c
++) {
3707 if (!acp
[4 * r
+ c
])
3710 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3712 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3713 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3714 inst
->dst
.writemask
& (1 << src_chan
))
3716 acp
[4 * r
+ c
] = NULL
;
3724 /* If this is a copy, add it to the ACP. */
3725 if (inst
->op
== TGSI_OPCODE_MOV
&&
3726 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3727 !(inst
->dst
.file
== inst
->src
[0].file
&&
3728 inst
->dst
.index
== inst
->src
[0].index
) &&
3729 !inst
->dst
.reladdr
&&
3731 !inst
->src
[0].reladdr
&&
3732 !inst
->src
[0].reladdr2
&&
3733 !inst
->src
[0].negate
) {
3734 for (int i
= 0; i
< 4; i
++) {
3735 if (inst
->dst
.writemask
& (1 << i
)) {
3736 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3737 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3743 ralloc_free(acp_level
);
3748 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3751 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3752 * will occur. As an example, a TXP production after copy propagation but
3755 * 0: MOV TEMP[1], INPUT[4].xyyy;
3756 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3757 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3759 * and after this pass:
3761 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3764 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3766 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3767 glsl_to_tgsi_instruction
*,
3768 this->next_temp
* 4);
3769 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3773 foreach_list(node
, &this->instructions
) {
3774 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3776 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3777 || inst
->dst
.index
< this->next_temp
);
3780 case TGSI_OPCODE_BGNLOOP
:
3781 case TGSI_OPCODE_ENDLOOP
:
3782 case TGSI_OPCODE_CONT
:
3783 case TGSI_OPCODE_BRK
:
3784 /* End of a basic block, clear the write array entirely.
3786 * This keeps us from killing dead code when the writes are
3787 * on either side of a loop, even when the register isn't touched
3788 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3789 * dead code of this type, so it shouldn't make a difference as long as
3790 * the dead code elimination pass in the GLSL compiler does its job.
3792 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3795 case TGSI_OPCODE_ENDIF
:
3796 case TGSI_OPCODE_ELSE
:
3797 /* Promote the recorded level of all channels written inside the
3798 * preceding if or else block to the level above the if/else block.
3800 for (int r
= 0; r
< this->next_temp
; r
++) {
3801 for (int c
= 0; c
< 4; c
++) {
3802 if (!writes
[4 * r
+ c
])
3805 if (write_level
[4 * r
+ c
] == level
)
3806 write_level
[4 * r
+ c
] = level
-1;
3810 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3815 case TGSI_OPCODE_IF
:
3816 case TGSI_OPCODE_UIF
:
3818 /* fallthrough to default case to mark the condition as read */
3821 /* Continuing the block, clear any channels from the write array that
3822 * are read by this instruction.
3824 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3825 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3826 /* Any temporary might be read, so no dead code elimination
3827 * across this instruction.
3829 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3830 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3831 /* Clear where it's used as src. */
3832 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3833 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3834 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3835 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3837 for (int c
= 0; c
< 4; c
++) {
3838 if (src_chans
& (1 << c
)) {
3839 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3844 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
3845 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
3846 /* Any temporary might be read, so no dead code elimination
3847 * across this instruction.
3849 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3850 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
3851 /* Clear where it's used as src. */
3852 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
3853 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
3854 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
3855 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
3857 for (int c
= 0; c
< 4; c
++) {
3858 if (src_chans
& (1 << c
)) {
3859 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
3867 /* If this instruction writes to a temporary, add it to the write array.
3868 * If there is already an instruction in the write array for one or more
3869 * of the channels, flag that channel write as dead.
3871 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3872 !inst
->dst
.reladdr
&&
3874 for (int c
= 0; c
< 4; c
++) {
3875 if (inst
->dst
.writemask
& (1 << c
)) {
3876 if (writes
[4 * inst
->dst
.index
+ c
]) {
3877 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3880 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3882 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3883 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3889 /* Anything still in the write array at this point is dead code. */
3890 for (int r
= 0; r
< this->next_temp
; r
++) {
3891 for (int c
= 0; c
< 4; c
++) {
3892 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3894 inst
->dead_mask
|= (1 << c
);
3898 /* Now actually remove the instructions that are completely dead and update
3899 * the writemask of other instructions with dead channels.
3901 foreach_list_safe(node
, &this->instructions
) {
3902 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3904 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3906 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3911 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3914 ralloc_free(write_level
);
3915 ralloc_free(writes
);
3920 /* Merges temporary registers together where possible to reduce the number of
3921 * registers needed to run a program.
3923 * Produces optimal code only after copy propagation and dead code elimination
3926 glsl_to_tgsi_visitor::merge_registers(void)
3928 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3929 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3932 /* Read the indices of the last read and first write to each temp register
3933 * into an array so that we don't have to traverse the instruction list as
3935 for (i
=0; i
< this->next_temp
; i
++) {
3936 last_reads
[i
] = get_last_temp_read(i
);
3937 first_writes
[i
] = get_first_temp_write(i
);
3940 /* Start looking for registers with non-overlapping usages that can be
3941 * merged together. */
3942 for (i
=0; i
< this->next_temp
; i
++) {
3943 /* Don't touch unused registers. */
3944 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3946 for (j
=0; j
< this->next_temp
; j
++) {
3947 /* Don't touch unused registers. */
3948 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3950 /* We can merge the two registers if the first write to j is after or
3951 * in the same instruction as the last read from i. Note that the
3952 * register at index i will always be used earlier or at the same time
3953 * as the register at index j. */
3954 if (first_writes
[i
] <= first_writes
[j
] &&
3955 last_reads
[i
] <= first_writes
[j
])
3957 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3959 /* Update the first_writes and last_reads arrays with the new
3960 * values for the merged register index, and mark the newly unused
3961 * register index as such. */
3962 last_reads
[i
] = last_reads
[j
];
3963 first_writes
[j
] = -1;
3969 ralloc_free(last_reads
);
3970 ralloc_free(first_writes
);
3973 /* Reassign indices to temporary registers by reusing unused indices created
3974 * by optimization passes. */
3976 glsl_to_tgsi_visitor::renumber_registers(void)
3981 for (i
=0; i
< this->next_temp
; i
++) {
3982 if (get_first_temp_read(i
) < 0) continue;
3984 rename_temp_register(i
, new_index
);
3988 this->next_temp
= new_index
;
3992 * Returns a fragment program which implements the current pixel transfer ops.
3993 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3996 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3997 glsl_to_tgsi_visitor
*original
,
3998 int scale_and_bias
, int pixel_maps
)
4000 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4001 struct st_context
*st
= st_context(original
->ctx
);
4002 struct gl_program
*prog
= &fp
->Base
.Base
;
4003 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
4004 st_src_reg coord
, src0
;
4006 glsl_to_tgsi_instruction
*inst
;
4008 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4009 v
->ctx
= original
->ctx
;
4011 v
->shader_program
= NULL
;
4013 v
->glsl_version
= original
->glsl_version
;
4014 v
->native_integers
= original
->native_integers
;
4015 v
->options
= original
->options
;
4016 v
->next_temp
= original
->next_temp
;
4017 v
->num_address_regs
= original
->num_address_regs
;
4018 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4019 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4020 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4021 v
->num_immediates
= original
->num_immediates
;
4024 * Get initial pixel color from the texture.
4025 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
4027 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4028 src0
= v
->get_temp(glsl_type::vec4_type
);
4029 dst0
= st_dst_reg(src0
);
4030 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4032 inst
->tex_target
= TEXTURE_2D_INDEX
;
4034 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4035 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
4036 v
->samplers_used
|= (1 << 0);
4038 if (scale_and_bias
) {
4039 static const gl_state_index scale_state
[STATE_LENGTH
] =
4040 { STATE_INTERNAL
, STATE_PT_SCALE
,
4041 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4042 static const gl_state_index bias_state
[STATE_LENGTH
] =
4043 { STATE_INTERNAL
, STATE_PT_BIAS
,
4044 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4045 GLint scale_p
, bias_p
;
4046 st_src_reg scale
, bias
;
4048 scale_p
= _mesa_add_state_reference(params
, scale_state
);
4049 bias_p
= _mesa_add_state_reference(params
, bias_state
);
4051 /* MAD colorTemp, colorTemp, scale, bias; */
4052 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
4053 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
4054 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
4058 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
4059 st_dst_reg temp_dst
= st_dst_reg(temp
);
4061 assert(st
->pixel_xfer
.pixelmap_texture
);
4063 /* With a little effort, we can do four pixel map look-ups with
4064 * two TEX instructions:
4067 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4068 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
4069 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4071 inst
->tex_target
= TEXTURE_2D_INDEX
;
4073 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4074 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
4075 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
4076 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4078 inst
->tex_target
= TEXTURE_2D_INDEX
;
4080 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
4081 v
->samplers_used
|= (1 << 1);
4083 /* MOV colorTemp, temp; */
4084 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4087 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4089 foreach_list(node
, &original
->instructions
) {
4090 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4091 glsl_to_tgsi_instruction
*newinst
;
4092 st_src_reg src_regs
[3];
4094 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4095 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4097 for (int i
=0; i
<3; i
++) {
4098 src_regs
[i
] = inst
->src
[i
];
4099 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4100 src_regs
[i
].index
== VARYING_SLOT_COL0
)
4102 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4103 src_regs
[i
].index
= src0
.index
;
4105 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4106 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4109 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4110 newinst
->tex_target
= inst
->tex_target
;
4113 /* Make modifications to fragment program info. */
4114 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4115 original
->prog
->Parameters
);
4116 _mesa_free_parameter_list(params
);
4117 count_resources(v
, prog
);
4118 fp
->glsl_to_tgsi
= v
;
4122 * Make fragment program for glBitmap:
4123 * Sample the texture and kill the fragment if the bit is 0.
4124 * This program will be combined with the user's fragment program.
4126 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4129 get_bitmap_visitor(struct st_fragment_program
*fp
,
4130 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4132 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4133 struct st_context
*st
= st_context(original
->ctx
);
4134 struct gl_program
*prog
= &fp
->Base
.Base
;
4135 st_src_reg coord
, src0
;
4137 glsl_to_tgsi_instruction
*inst
;
4139 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4140 v
->ctx
= original
->ctx
;
4142 v
->shader_program
= NULL
;
4144 v
->glsl_version
= original
->glsl_version
;
4145 v
->native_integers
= original
->native_integers
;
4146 v
->options
= original
->options
;
4147 v
->next_temp
= original
->next_temp
;
4148 v
->num_address_regs
= original
->num_address_regs
;
4149 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4150 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4151 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4152 v
->num_immediates
= original
->num_immediates
;
4154 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4155 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4156 src0
= v
->get_temp(glsl_type::vec4_type
);
4157 dst0
= st_dst_reg(src0
);
4158 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4159 inst
->sampler
= samplerIndex
;
4160 inst
->tex_target
= TEXTURE_2D_INDEX
;
4162 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4163 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4164 v
->samplers_used
|= (1 << samplerIndex
);
4166 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4167 src0
.negate
= NEGATE_XYZW
;
4168 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4169 src0
.swizzle
= SWIZZLE_XXXX
;
4170 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4172 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4174 foreach_list(node
, &original
->instructions
) {
4175 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4176 glsl_to_tgsi_instruction
*newinst
;
4177 st_src_reg src_regs
[3];
4179 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4180 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4182 for (int i
=0; i
<3; i
++) {
4183 src_regs
[i
] = inst
->src
[i
];
4184 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4185 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4188 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4189 newinst
->tex_target
= inst
->tex_target
;
4192 /* Make modifications to fragment program info. */
4193 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4194 count_resources(v
, prog
);
4195 fp
->glsl_to_tgsi
= v
;
4198 /* ------------------------- TGSI conversion stuff -------------------------- */
4200 unsigned branch_target
;
4205 * Intermediate state used during shader translation.
4207 struct st_translate
{
4208 struct ureg_program
*ureg
;
4210 struct ureg_dst temps
[MAX_TEMPS
];
4211 struct ureg_dst arrays
[MAX_ARRAYS
];
4212 struct ureg_src
*constants
;
4213 struct ureg_src
*immediates
;
4214 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4215 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4216 struct ureg_dst address
[2];
4217 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4218 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4219 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4220 unsigned array_sizes
[MAX_ARRAYS
];
4222 const GLuint
*inputMapping
;
4223 const GLuint
*outputMapping
;
4225 /* For every instruction that contains a label (eg CALL), keep
4226 * details so that we can go back afterwards and emit the correct
4227 * tgsi instruction number for each label.
4229 struct label
*labels
;
4230 unsigned labels_size
;
4231 unsigned labels_count
;
4233 /* Keep a record of the tgsi instruction number that each mesa
4234 * instruction starts at, will be used to fix up labels after
4239 unsigned insn_count
;
4241 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4246 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4247 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4249 TGSI_SEMANTIC_VERTEXID
,
4250 TGSI_SEMANTIC_INSTANCEID
,
4251 TGSI_SEMANTIC_SAMPLEID
,
4252 TGSI_SEMANTIC_SAMPLEPOS
,
4253 TGSI_SEMANTIC_SAMPLEMASK
,
4254 TGSI_SEMANTIC_INVOCATIONID
,
4258 * Make note of a branch to a label in the TGSI code.
4259 * After we've emitted all instructions, we'll go over the list
4260 * of labels built here and patch the TGSI code with the actual
4261 * location of each label.
4263 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4267 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4268 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4269 t
->labels
= (struct label
*)realloc(t
->labels
,
4270 t
->labels_size
* sizeof(struct label
));
4271 if (t
->labels
== NULL
) {
4272 static unsigned dummy
;
4278 i
= t
->labels_count
++;
4279 t
->labels
[i
].branch_target
= branch_target
;
4280 return &t
->labels
[i
].token
;
4284 * Called prior to emitting the TGSI code for each instruction.
4285 * Allocate additional space for instructions if needed.
4286 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4287 * the next TGSI instruction.
4289 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4291 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4292 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4293 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4294 if (t
->insn
== NULL
) {
4300 t
->insn
[t
->insn_count
++] = start
;
4304 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4306 static struct ureg_src
4307 emit_immediate(struct st_translate
*t
,
4308 gl_constant_value values
[4],
4311 struct ureg_program
*ureg
= t
->ureg
;
4316 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4318 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4319 case GL_UNSIGNED_INT
:
4321 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4323 assert(!"should not get here - type must be float, int, uint, or bool");
4324 return ureg_src_undef();
4329 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4331 static struct ureg_dst
4332 dst_register(struct st_translate
*t
,
4333 gl_register_file file
,
4339 case PROGRAM_UNDEFINED
:
4340 return ureg_dst_undef();
4342 case PROGRAM_TEMPORARY
:
4344 assert(index
< (int) Elements(t
->temps
));
4346 if (ureg_dst_is_undef(t
->temps
[index
]))
4347 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4349 return t
->temps
[index
];
4352 array
= index
>> 16;
4355 assert(array
< (int) Elements(t
->arrays
));
4357 if (ureg_dst_is_undef(t
->arrays
[array
]))
4358 t
->arrays
[array
] = ureg_DECL_array_temporary(
4359 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4361 return ureg_dst_array_offset(t
->arrays
[array
],
4362 (int)(index
& 0xFFFF) - 0x8000);
4364 case PROGRAM_OUTPUT
:
4365 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4366 assert(index
< VARYING_SLOT_MAX
);
4367 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4368 assert(index
< FRAG_RESULT_MAX
);
4370 assert(index
< VARYING_SLOT_MAX
);
4372 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4374 return t
->outputs
[t
->outputMapping
[index
]];
4376 case PROGRAM_ADDRESS
:
4377 return t
->address
[index
];
4380 assert(!"unknown dst register file");
4381 return ureg_dst_undef();
4386 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4388 static struct ureg_src
4389 src_register(struct st_translate
*t
,
4390 gl_register_file file
,
4391 GLint index
, GLint index2D
)
4394 case PROGRAM_UNDEFINED
:
4395 return ureg_src_undef();
4397 case PROGRAM_TEMPORARY
:
4399 return ureg_src(dst_register(t
, file
, index
));
4401 case PROGRAM_UNIFORM
:
4403 return t
->constants
[index
];
4404 case PROGRAM_STATE_VAR
:
4405 case PROGRAM_CONSTANT
: /* ie, immediate */
4407 struct ureg_src src
;
4408 src
= ureg_src_register(TGSI_FILE_CONSTANT
, index
);
4410 src
.DimensionIndex
= index2D
;
4412 } else if (index
< 0)
4413 return ureg_DECL_constant(t
->ureg
, 0);
4415 return t
->constants
[index
];
4417 case PROGRAM_IMMEDIATE
:
4418 return t
->immediates
[index
];
4421 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4422 return t
->inputs
[t
->inputMapping
[index
]];
4424 case PROGRAM_OUTPUT
:
4425 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4426 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4428 case PROGRAM_ADDRESS
:
4429 return ureg_src(t
->address
[index
]);
4431 case PROGRAM_SYSTEM_VALUE
:
4432 assert(index
< (int) Elements(t
->systemValues
));
4433 return t
->systemValues
[index
];
4436 assert(!"unknown src register file");
4437 return ureg_src_undef();
4442 * Create a TGSI ureg_dst register from an st_dst_reg.
4444 static struct ureg_dst
4445 translate_dst(struct st_translate
*t
,
4446 const st_dst_reg
*dst_reg
,
4447 bool saturate
, bool clamp_color
)
4449 struct ureg_dst dst
= dst_register(t
,
4453 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4456 dst
= ureg_saturate(dst
);
4457 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4458 /* Clamp colors for ARB_color_buffer_float. */
4459 switch (t
->procType
) {
4460 case TGSI_PROCESSOR_VERTEX
:
4461 /* XXX if the geometry shader is present, this must be done there
4462 * instead of here. */
4463 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4464 dst_reg
->index
== VARYING_SLOT_COL1
||
4465 dst_reg
->index
== VARYING_SLOT_BFC0
||
4466 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4467 dst
= ureg_saturate(dst
);
4471 case TGSI_PROCESSOR_FRAGMENT
:
4472 if (dst_reg
->index
== FRAG_RESULT_COLOR
||
4473 dst_reg
->index
>= FRAG_RESULT_DATA0
) {
4474 dst
= ureg_saturate(dst
);
4480 if (dst_reg
->reladdr
!= NULL
) {
4481 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4482 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4489 * Create a TGSI ureg_src register from an st_src_reg.
4491 static struct ureg_src
4492 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4494 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4496 if (src_reg
->has_index2
) {
4497 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4498 * and UBO constant buffers (buffer, position).
4500 src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4501 if (src_reg
->reladdr2
)
4502 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4505 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4508 src
= ureg_swizzle(src
,
4509 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4510 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4511 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4512 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4514 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4515 src
= ureg_negate(src
);
4517 if (src_reg
->reladdr
!= NULL
) {
4518 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4519 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4525 static struct tgsi_texture_offset
4526 translate_tex_offset(struct st_translate
*t
,
4527 const st_src_reg
*in_offset
, int idx
)
4529 struct tgsi_texture_offset offset
;
4530 struct ureg_src imm_src
;
4531 struct ureg_dst dst
;
4534 switch (in_offset
->file
) {
4535 case PROGRAM_IMMEDIATE
:
4536 imm_src
= t
->immediates
[in_offset
->index
];
4538 offset
.File
= imm_src
.File
;
4539 offset
.Index
= imm_src
.Index
;
4540 offset
.SwizzleX
= imm_src
.SwizzleX
;
4541 offset
.SwizzleY
= imm_src
.SwizzleY
;
4542 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4545 case PROGRAM_TEMPORARY
:
4546 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4547 offset
.File
= imm_src
.File
;
4548 offset
.Index
= imm_src
.Index
;
4549 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4550 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4551 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4555 array
= in_offset
->index
>> 16;
4558 assert(array
< (int) Elements(t
->arrays
));
4560 dst
= t
->arrays
[array
];
4561 offset
.File
= dst
.File
;
4562 offset
.Index
= dst
.Index
+ (in_offset
->index
& 0xFFFF) - 0x8000;
4563 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4564 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4565 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4575 compile_tgsi_instruction(struct st_translate
*t
,
4576 const glsl_to_tgsi_instruction
*inst
,
4577 bool clamp_dst_color_output
)
4579 struct ureg_program
*ureg
= t
->ureg
;
4581 struct ureg_dst dst
[1];
4582 struct ureg_src src
[4];
4583 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4587 unsigned tex_target
;
4589 num_dst
= num_inst_dst_regs(inst
->op
);
4590 num_src
= num_inst_src_regs(inst
->op
);
4593 dst
[0] = translate_dst(t
,
4596 clamp_dst_color_output
);
4598 for (i
= 0; i
< num_src
; i
++)
4599 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4602 case TGSI_OPCODE_BGNLOOP
:
4603 case TGSI_OPCODE_CAL
:
4604 case TGSI_OPCODE_ELSE
:
4605 case TGSI_OPCODE_ENDLOOP
:
4606 case TGSI_OPCODE_IF
:
4607 case TGSI_OPCODE_UIF
:
4608 assert(num_dst
== 0);
4609 ureg_label_insn(ureg
,
4613 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4616 case TGSI_OPCODE_TEX
:
4617 case TGSI_OPCODE_TXB
:
4618 case TGSI_OPCODE_TXD
:
4619 case TGSI_OPCODE_TXL
:
4620 case TGSI_OPCODE_TXP
:
4621 case TGSI_OPCODE_TXQ
:
4622 case TGSI_OPCODE_TXF
:
4623 case TGSI_OPCODE_TEX2
:
4624 case TGSI_OPCODE_TXB2
:
4625 case TGSI_OPCODE_TXL2
:
4626 case TGSI_OPCODE_TG4
:
4627 case TGSI_OPCODE_LODQ
:
4628 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4629 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4630 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
4632 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4638 texoffsets
, inst
->tex_offset_num_offset
,
4642 case TGSI_OPCODE_SCS
:
4643 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4644 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4657 * Emit the TGSI instructions for inverting and adjusting WPOS.
4658 * This code is unavoidable because it also depends on whether
4659 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4662 emit_wpos_adjustment( struct st_translate
*t
,
4663 const struct gl_program
*program
,
4665 GLfloat adjX
, GLfloat adjY
[2])
4667 struct ureg_program
*ureg
= t
->ureg
;
4669 /* Fragment program uses fragment position input.
4670 * Need to replace instances of INPUT[WPOS] with temp T
4671 * where T = INPUT[WPOS] by y is inverted.
4673 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4674 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4675 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4677 /* XXX: note we are modifying the incoming shader here! Need to
4678 * do this before emitting the constant decls below, or this
4681 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4682 wposTransformState
);
4684 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4685 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4686 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4688 /* First, apply the coordinate shift: */
4689 if (adjX
|| adjY
[0] || adjY
[1]) {
4690 if (adjY
[0] != adjY
[1]) {
4691 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4692 * depending on whether inversion is actually going to be applied
4693 * or not, which is determined by testing against the inversion
4694 * state variable used below, which will be either +1 or -1.
4696 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4698 ureg_CMP(ureg
, adj_temp
,
4699 ureg_scalar(wpostrans
, invert
? 2 : 0),
4700 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4701 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4702 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4704 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4705 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4707 wpos_input
= ureg_src(wpos_temp
);
4709 /* MOV wpos_temp, input[wpos]
4711 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4714 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4715 * inversion/identity, or the other way around if we're drawing to an FBO.
4718 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4721 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4723 ureg_scalar(wpostrans
, 0),
4724 ureg_scalar(wpostrans
, 1));
4726 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4729 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4731 ureg_scalar(wpostrans
, 2),
4732 ureg_scalar(wpostrans
, 3));
4735 /* Use wpos_temp as position input from here on:
4737 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4742 * Emit fragment position/ooordinate code.
4745 emit_wpos(struct st_context
*st
,
4746 struct st_translate
*t
,
4747 const struct gl_program
*program
,
4748 struct ureg_program
*ureg
)
4750 const struct gl_fragment_program
*fp
=
4751 (const struct gl_fragment_program
*) program
;
4752 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4753 GLfloat adjX
= 0.0f
;
4754 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4755 boolean invert
= FALSE
;
4757 /* Query the pixel center conventions supported by the pipe driver and set
4758 * adjX, adjY to help out if it cannot handle the requested one internally.
4760 * The bias of the y-coordinate depends on whether y-inversion takes place
4761 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4762 * drawing to an FBO (causes additional inversion), and whether the the pipe
4763 * driver origin and the requested origin differ (the latter condition is
4764 * stored in the 'invert' variable).
4766 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4768 * center shift only:
4773 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4774 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4775 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4776 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4778 * inversion and center shift:
4779 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4780 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4781 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4782 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4784 if (fp
->OriginUpperLeft
) {
4785 /* Fragment shader wants origin in upper-left */
4786 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4787 /* the driver supports upper-left origin */
4789 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4790 /* the driver supports lower-left origin, need to invert Y */
4791 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4798 /* Fragment shader wants origin in lower-left */
4799 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4800 /* the driver supports lower-left origin */
4801 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4802 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4803 /* the driver supports upper-left origin, need to invert Y */
4809 if (fp
->PixelCenterInteger
) {
4810 /* Fragment shader wants pixel center integer */
4811 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4812 /* the driver supports pixel center integer */
4814 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4816 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4817 /* the driver supports pixel center half integer, need to bias X,Y */
4826 /* Fragment shader wants pixel center half integer */
4827 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4828 /* the driver supports pixel center half integer */
4830 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4831 /* the driver supports pixel center integer, need to bias X,Y */
4832 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4833 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4839 /* we invert after adjustment so that we avoid the MOV to temporary,
4840 * and reuse the adjustment ADD instead */
4841 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4845 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4846 * TGSI uses +1 for front, -1 for back.
4847 * This function converts the TGSI value to the GL value. Simply clamping/
4848 * saturating the value to [0,1] does the job.
4851 emit_face_var(struct st_translate
*t
)
4853 struct ureg_program
*ureg
= t
->ureg
;
4854 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4855 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4857 /* MOV_SAT face_temp, input[face] */
4858 face_temp
= ureg_saturate(face_temp
);
4859 ureg_MOV(ureg
, face_temp
, face_input
);
4861 /* Use face_temp as face input from here on: */
4862 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4866 emit_edgeflags(struct st_translate
*t
)
4868 struct ureg_program
*ureg
= t
->ureg
;
4869 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4870 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4872 ureg_MOV(ureg
, edge_dst
, edge_src
);
4876 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4877 * \param program the program to translate
4878 * \param numInputs number of input registers used
4879 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4881 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4882 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4884 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4885 * \param numOutputs number of output registers used
4886 * \param outputMapping maps Mesa fragment program outputs to TGSI
4888 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4889 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4892 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4894 extern "C" enum pipe_error
4895 st_translate_program(
4896 struct gl_context
*ctx
,
4898 struct ureg_program
*ureg
,
4899 glsl_to_tgsi_visitor
*program
,
4900 const struct gl_program
*proginfo
,
4902 const GLuint inputMapping
[],
4903 const ubyte inputSemanticName
[],
4904 const ubyte inputSemanticIndex
[],
4905 const GLuint interpMode
[],
4906 const GLboolean is_centroid
[],
4908 const GLuint outputMapping
[],
4909 const ubyte outputSemanticName
[],
4910 const ubyte outputSemanticIndex
[],
4911 boolean passthrough_edgeflags
,
4912 boolean clamp_color
)
4914 struct st_translate
*t
;
4916 enum pipe_error ret
= PIPE_OK
;
4918 assert(numInputs
<= Elements(t
->inputs
));
4919 assert(numOutputs
<= Elements(t
->outputs
));
4921 t
= CALLOC_STRUCT(st_translate
);
4923 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4927 memset(t
, 0, sizeof *t
);
4929 t
->procType
= procType
;
4930 t
->inputMapping
= inputMapping
;
4931 t
->outputMapping
= outputMapping
;
4934 if (program
->shader_program
) {
4935 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4936 struct gl_uniform_storage
*const storage
=
4937 &program
->shader_program
->UniformStorage
[i
];
4939 _mesa_uniform_detach_all_driver_storage(storage
);
4944 * Declare input attributes.
4946 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4947 for (i
= 0; i
< numInputs
; i
++) {
4948 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4949 inputSemanticName
[i
],
4950 inputSemanticIndex
[i
],
4955 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4956 /* Must do this after setting up t->inputs, and before
4957 * emitting constant references, below:
4959 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4962 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4966 * Declare output attributes.
4968 for (i
= 0; i
< numOutputs
; i
++) {
4969 switch (outputSemanticName
[i
]) {
4970 case TGSI_SEMANTIC_POSITION
:
4971 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4972 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4973 outputSemanticIndex
[i
]);
4974 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4976 case TGSI_SEMANTIC_STENCIL
:
4977 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4978 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4979 outputSemanticIndex
[i
]);
4980 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4982 case TGSI_SEMANTIC_COLOR
:
4983 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4984 TGSI_SEMANTIC_COLOR
,
4985 outputSemanticIndex
[i
]);
4987 case TGSI_SEMANTIC_SAMPLEMASK
:
4988 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4989 TGSI_SEMANTIC_SAMPLEMASK
,
4990 outputSemanticIndex
[i
]);
4991 /* TODO: If we ever support more than 32 samples, this will have
4992 * to become an array.
4994 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4997 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4998 ret
= PIPE_ERROR_BAD_INPUT
;
5003 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
5004 for (i
= 0; i
< numInputs
; i
++) {
5005 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
5007 inputSemanticName
[i
],
5008 inputSemanticIndex
[i
]);
5011 for (i
= 0; i
< numOutputs
; i
++) {
5012 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5013 outputSemanticName
[i
],
5014 outputSemanticIndex
[i
]);
5018 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5020 for (i
= 0; i
< numInputs
; i
++) {
5021 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
5024 for (i
= 0; i
< numOutputs
; i
++) {
5025 t
->outputs
[i
] = ureg_DECL_output(ureg
,
5026 outputSemanticName
[i
],
5027 outputSemanticIndex
[i
]);
5028 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
5029 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5031 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
5032 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
5033 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
5036 if (passthrough_edgeflags
)
5040 /* Declare address register.
5042 if (program
->num_address_regs
> 0) {
5043 assert(program
->num_address_regs
<= 2);
5044 t
->address
[0] = ureg_DECL_address(ureg
);
5045 if (program
->num_address_regs
== 2)
5046 t
->address
[1] = ureg_DECL_address(ureg
);
5049 /* Declare misc input registers
5052 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
5053 unsigned numSys
= 0;
5054 for (i
= 0; sysInputs
; i
++) {
5055 if (sysInputs
& (1 << i
)) {
5056 unsigned semName
= mesa_sysval_to_semantic
[i
];
5057 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
5058 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
5059 semName
== TGSI_SEMANTIC_VERTEXID
) {
5060 /* From Gallium perspective, these system values are always
5061 * integer, and require native integer support. However, if
5062 * native integer is supported on the vertex stage but not the
5063 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5064 * assumes these system values are floats. To resolve the
5065 * inconsistency, we insert a U2F.
5067 struct st_context
*st
= st_context(ctx
);
5068 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5069 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5070 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
5071 if (!ctx
->Const
.NativeIntegers
) {
5072 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
5073 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
5074 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
5078 sysInputs
&= ~(1 << i
);
5083 /* Copy over array sizes
5085 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
5087 /* Emit constants and uniforms. TGSI uses a single index space for these,
5088 * so we put all the translated regs in t->constants.
5090 if (proginfo
->Parameters
) {
5091 t
->constants
= (struct ureg_src
*)
5092 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
5093 if (t
->constants
== NULL
) {
5094 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5098 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
5099 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
5100 case PROGRAM_STATE_VAR
:
5101 case PROGRAM_UNIFORM
:
5102 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5105 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5106 * addressing of the const buffer.
5107 * FIXME: Be smarter and recognize param arrays:
5108 * indirect addressing is only valid within the referenced
5111 case PROGRAM_CONSTANT
:
5112 if (program
->indirect_addr_consts
)
5113 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5115 t
->constants
[i
] = emit_immediate(t
,
5116 proginfo
->Parameters
->ParameterValues
[i
],
5117 proginfo
->Parameters
->Parameters
[i
].DataType
,
5126 if (program
->shader
) {
5127 unsigned num_ubos
= program
->shader
->NumUniformBlocks
;
5129 for (i
= 0; i
< num_ubos
; i
++) {
5131 program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
;
5132 unsigned num_const_vecs
= (size
+ 15) / 16;
5133 unsigned first
, last
;
5134 assert(num_const_vecs
> 0);
5136 last
= num_const_vecs
> 0 ? num_const_vecs
- 1 : 0;
5137 ureg_DECL_constant2D(t
->ureg
, first
, last
, i
+ 1);
5141 /* Emit immediate values.
5143 t
->immediates
= (struct ureg_src
*)
5144 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5145 if (t
->immediates
== NULL
) {
5146 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5150 foreach_list(node
, &program
->immediates
) {
5151 immediate_storage
*imm
= (immediate_storage
*) node
;
5152 assert(i
< program
->num_immediates
);
5153 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
5155 assert(i
== program
->num_immediates
);
5157 /* texture samplers */
5158 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5159 if (program
->samplers_used
& (1 << i
)) {
5160 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5164 /* Emit each instruction in turn:
5166 foreach_list(n
, &program
->instructions
) {
5167 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5168 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*) n
, clamp_color
);
5171 /* Fix up all emitted labels:
5173 for (i
= 0; i
< t
->labels_count
; i
++) {
5174 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5175 t
->insn
[t
->labels
[i
].branch_target
]);
5178 if (program
->shader_program
) {
5179 /* This has to be done last. Any operation the can cause
5180 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5181 * program constant) has to happen before creating this linkage.
5183 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5184 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5187 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5188 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5197 free(t
->immediates
);
5200 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5208 /* ----------------------------- End TGSI code ------------------------------ */
5212 shader_stage_to_ptarget(gl_shader_stage stage
)
5215 case MESA_SHADER_VERTEX
:
5216 return PIPE_SHADER_VERTEX
;
5217 case MESA_SHADER_FRAGMENT
:
5218 return PIPE_SHADER_FRAGMENT
;
5219 case MESA_SHADER_GEOMETRY
:
5220 return PIPE_SHADER_GEOMETRY
;
5221 case MESA_SHADER_COMPUTE
:
5222 return PIPE_SHADER_COMPUTE
;
5225 assert(!"should not be reached");
5226 return PIPE_SHADER_VERTEX
;
5231 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5232 * generating Mesa IR.
5234 static struct gl_program
*
5235 get_mesa_program(struct gl_context
*ctx
,
5236 struct gl_shader_program
*shader_program
,
5237 struct gl_shader
*shader
)
5239 glsl_to_tgsi_visitor
* v
;
5240 struct gl_program
*prog
;
5241 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5243 struct gl_shader_compiler_options
*options
=
5244 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5245 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5246 unsigned ptarget
= shader_stage_to_ptarget(shader
->Stage
);
5248 validate_ir_tree(shader
->ir
);
5250 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5253 prog
->Parameters
= _mesa_new_parameter_list();
5254 v
= new glsl_to_tgsi_visitor();
5257 v
->shader_program
= shader_program
;
5259 v
->options
= options
;
5260 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5261 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5263 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5264 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5266 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5269 /* Remove reads from output registers. */
5270 lower_output_reads(shader
->ir
);
5272 /* Emit intermediate IR for main(). */
5273 visit_exec_list(shader
->ir
, v
);
5275 /* Now emit bodies for any functions that were used. */
5277 progress
= GL_FALSE
;
5279 foreach_list(node
, &v
->function_signatures
) {
5280 function_entry
*entry
= (function_entry
*) node
;
5282 if (!entry
->bgn_inst
) {
5283 v
->current_function
= entry
;
5285 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5286 entry
->bgn_inst
->function
= entry
;
5288 visit_exec_list(&entry
->sig
->body
, v
);
5290 glsl_to_tgsi_instruction
*last
;
5291 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5292 if (last
->op
!= TGSI_OPCODE_RET
)
5293 v
->emit(NULL
, TGSI_OPCODE_RET
);
5295 glsl_to_tgsi_instruction
*end
;
5296 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5297 end
->function
= entry
;
5305 /* Print out some information (for debugging purposes) used by the
5306 * optimization passes. */
5307 for (i
=0; i
< v
->next_temp
; i
++) {
5308 int fr
= v
->get_first_temp_read(i
);
5309 int fw
= v
->get_first_temp_write(i
);
5310 int lr
= v
->get_last_temp_read(i
);
5311 int lw
= v
->get_last_temp_write(i
);
5313 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5318 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5320 v
->copy_propagate();
5321 while (v
->eliminate_dead_code());
5323 v
->merge_registers();
5324 v
->renumber_registers();
5326 /* Write the END instruction. */
5327 v
->emit(NULL
, TGSI_OPCODE_END
);
5329 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5331 printf("GLSL IR for linked %s program %d:\n",
5332 _mesa_shader_stage_to_string(shader
->Stage
),
5333 shader_program
->Name
);
5334 _mesa_print_ir(stdout
, shader
->ir
, NULL
);
5340 prog
->Instructions
= NULL
;
5341 prog
->NumInstructions
= 0;
5343 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5344 count_resources(v
, prog
);
5346 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5348 /* This has to be done last. Any operation the can cause
5349 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5350 * program constant) has to happen before creating this linkage.
5352 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5353 if (!shader_program
->LinkStatus
) {
5357 struct st_vertex_program
*stvp
;
5358 struct st_fragment_program
*stfp
;
5359 struct st_geometry_program
*stgp
;
5361 switch (shader
->Type
) {
5362 case GL_VERTEX_SHADER
:
5363 stvp
= (struct st_vertex_program
*)prog
;
5364 stvp
->glsl_to_tgsi
= v
;
5366 case GL_FRAGMENT_SHADER
:
5367 stfp
= (struct st_fragment_program
*)prog
;
5368 stfp
->glsl_to_tgsi
= v
;
5370 case GL_GEOMETRY_SHADER
:
5371 stgp
= (struct st_geometry_program
*)prog
;
5372 stgp
->glsl_to_tgsi
= v
;
5373 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5374 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5375 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5376 stgp
->Base
.Invocations
= shader_program
->Geom
.Invocations
;
5379 assert(!"should not be reached");
5389 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5391 struct gl_shader
*shader
;
5392 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5393 type
== GL_GEOMETRY_SHADER_ARB
);
5394 shader
= rzalloc(NULL
, struct gl_shader
);
5396 shader
->Type
= type
;
5397 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5398 shader
->Name
= name
;
5399 _mesa_init_shader(ctx
, shader
);
5404 struct gl_shader_program
*
5405 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5407 struct gl_shader_program
*shProg
;
5408 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5410 shProg
->Name
= name
;
5411 _mesa_init_shader_program(ctx
, shProg
);
5418 * Called via ctx->Driver.LinkShader()
5419 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5420 * with code lowering and other optimizations.
5423 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5425 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5426 assert(prog
->LinkStatus
);
5428 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5429 if (prog
->_LinkedShaders
[i
] == NULL
)
5433 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5434 const struct gl_shader_compiler_options
*options
=
5435 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5437 /* If there are forms of indirect addressing that the driver
5438 * cannot handle, perform the lowering pass.
5440 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5441 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5442 lower_variable_index_to_cond_assign(ir
,
5443 options
->EmitNoIndirectInput
,
5444 options
->EmitNoIndirectOutput
,
5445 options
->EmitNoIndirectTemp
,
5446 options
->EmitNoIndirectUniform
);
5449 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5450 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5451 LOWER_UNPACK_SNORM_2x16
|
5452 LOWER_PACK_UNORM_2x16
|
5453 LOWER_UNPACK_UNORM_2x16
|
5454 LOWER_PACK_SNORM_4x8
|
5455 LOWER_UNPACK_SNORM_4x8
|
5456 LOWER_UNPACK_UNORM_4x8
|
5457 LOWER_PACK_UNORM_4x8
|
5458 LOWER_PACK_HALF_2x16
|
5459 LOWER_UNPACK_HALF_2x16
;
5461 lower_packing_builtins(ir
, lower_inst
);
5464 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TEXTURE_GATHER_OFFSETS
))
5465 lower_offset_arrays(ir
);
5466 do_mat_op_to_vec(ir
);
5467 lower_instructions(ir
,
5475 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5476 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5478 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5479 do_vec_index_to_cond_assign(ir
);
5480 lower_vector_insert(ir
, true);
5481 lower_quadop_vector(ir
, false);
5483 if (options
->MaxIfDepth
== 0) {
5490 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5492 progress
= do_common_optimization(ir
, true, true, options
,
5493 ctx
->Const
.NativeIntegers
)
5496 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5500 validate_ir_tree(ir
);
5503 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5504 struct gl_program
*linked_prog
;
5506 if (prog
->_LinkedShaders
[i
] == NULL
)
5509 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5512 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5514 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5515 _mesa_shader_stage_to_program(i
),
5517 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5519 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5524 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5531 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5532 const GLuint outputMapping
[],
5533 struct pipe_stream_output_info
*so
)
5536 struct gl_transform_feedback_info
*info
=
5537 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5539 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5540 so
->output
[i
].register_index
=
5541 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5542 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5543 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5544 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5545 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5546 so
->output
[i
].stream
= info
->Outputs
[i
].StreamId
;
5549 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5550 so
->stride
[i
] = info
->BufferStride
[i
];
5552 so
->num_outputs
= info
->NumOutputs
;