2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "program/hash_table.h"
49 #include "main/shaderapi.h"
50 #include "main/uniforms.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
74 (1 << PROGRAM_ENV_PARAM) | \
75 (1 << PROGRAM_STATE_VAR) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
80 * Maximum number of temporary registers.
82 * It is too big for stack allocated arrays -- it will cause stack overflow on
83 * Windows and likely Mac OS X.
85 #define MAX_TEMPS 4096
88 * Maximum number of arrays
90 #define MAX_ARRAYS 256
92 /* will be 4 for GLSL 4.00 */
93 #define MAX_GLSL_TEXTURE_OFFSET 1
98 static int swizzle_for_size(int size
);
101 * This struct is a corresponding struct to TGSI ureg_src.
105 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
109 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
110 this->swizzle
= swizzle_for_size(type
->vector_elements
);
112 this->swizzle
= SWIZZLE_XYZW
;
115 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
116 this->reladdr
= NULL
;
119 st_src_reg(gl_register_file file
, int index
, int type
)
125 this->swizzle
= SWIZZLE_XYZW
;
127 this->reladdr
= NULL
;
130 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
135 this->index2D
= index2D
;
136 this->swizzle
= SWIZZLE_XYZW
;
138 this->reladdr
= NULL
;
143 this->type
= GLSL_TYPE_ERROR
;
144 this->file
= PROGRAM_UNDEFINED
;
149 this->reladdr
= NULL
;
152 explicit st_src_reg(st_dst_reg reg
);
154 gl_register_file file
; /**< PROGRAM_* from Mesa */
155 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
157 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
158 int negate
; /**< NEGATE_XYZW mask from mesa */
159 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
160 /** Register index should be offset by the integer in this reg. */
166 st_dst_reg(gl_register_file file
, int writemask
, int type
)
170 this->writemask
= writemask
;
171 this->cond_mask
= COND_TR
;
172 this->reladdr
= NULL
;
178 this->type
= GLSL_TYPE_ERROR
;
179 this->file
= PROGRAM_UNDEFINED
;
182 this->cond_mask
= COND_TR
;
183 this->reladdr
= NULL
;
186 explicit st_dst_reg(st_src_reg reg
);
188 gl_register_file file
; /**< PROGRAM_* from Mesa */
189 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
190 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
192 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
193 /** Register index should be offset by the integer in this reg. */
197 st_src_reg::st_src_reg(st_dst_reg reg
)
199 this->type
= reg
.type
;
200 this->file
= reg
.file
;
201 this->index
= reg
.index
;
202 this->swizzle
= SWIZZLE_XYZW
;
204 this->reladdr
= reg
.reladdr
;
208 st_dst_reg::st_dst_reg(st_src_reg reg
)
210 this->type
= reg
.type
;
211 this->file
= reg
.file
;
212 this->index
= reg
.index
;
213 this->writemask
= WRITEMASK_XYZW
;
214 this->cond_mask
= COND_TR
;
215 this->reladdr
= reg
.reladdr
;
218 class glsl_to_tgsi_instruction
: public exec_node
{
220 /* Callers of this ralloc-based new need not call delete. It's
221 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
222 static void* operator new(size_t size
, void *ctx
)
226 node
= rzalloc_size(ctx
, size
);
227 assert(node
!= NULL
);
235 /** Pointer to the ir source this tree came from for debugging */
237 GLboolean cond_update
;
239 int sampler
; /**< sampler index */
240 int tex_target
; /**< One of TEXTURE_*_INDEX */
241 GLboolean tex_shadow
;
242 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
243 unsigned tex_offset_num_offset
;
244 int dead_mask
; /**< Used in dead code elimination */
246 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
249 class variable_storage
: public exec_node
{
251 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
252 : file(file
), index(index
), var(var
)
257 gl_register_file file
;
259 ir_variable
*var
; /* variable that maps to this, if any */
262 class immediate_storage
: public exec_node
{
264 immediate_storage(gl_constant_value
*values
, int size
, int type
)
266 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
271 gl_constant_value values
[4];
272 int size
; /**< Number of components (1-4) */
273 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
276 class function_entry
: public exec_node
{
278 ir_function_signature
*sig
;
281 * identifier of this function signature used by the program.
283 * At the point that TGSI instructions for function calls are
284 * generated, we don't know the address of the first instruction of
285 * the function body. So we make the BranchTarget that is called a
286 * small integer and rewrite them during set_branchtargets().
291 * Pointer to first instruction of the function body.
293 * Set during function body emits after main() is processed.
295 glsl_to_tgsi_instruction
*bgn_inst
;
298 * Index of the first instruction of the function body in actual TGSI.
300 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
304 /** Storage for the return value. */
305 st_src_reg return_reg
;
308 struct glsl_to_tgsi_visitor
: public ir_visitor
{
310 glsl_to_tgsi_visitor();
311 ~glsl_to_tgsi_visitor();
313 function_entry
*current_function
;
315 struct gl_context
*ctx
;
316 struct gl_program
*prog
;
317 struct gl_shader_program
*shader_program
;
318 struct gl_shader_compiler_options
*options
;
322 unsigned array_sizes
[MAX_ARRAYS
];
325 int num_address_regs
;
327 bool indirect_addr_consts
;
330 bool native_integers
;
333 variable_storage
*find_variable_storage(ir_variable
*var
);
335 int add_constant(gl_register_file file
, gl_constant_value values
[4],
336 int size
, int datatype
, GLuint
*swizzle_out
);
338 function_entry
*get_function_signature(ir_function_signature
*sig
);
340 st_src_reg
get_temp(const glsl_type
*type
);
341 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
343 st_src_reg
st_src_reg_for_float(float val
);
344 st_src_reg
st_src_reg_for_int(int val
);
345 st_src_reg
st_src_reg_for_type(int type
, int val
);
348 * \name Visit methods
350 * As typical for the visitor pattern, there must be one \c visit method for
351 * each concrete subclass of \c ir_instruction. Virtual base classes within
352 * the hierarchy should not have \c visit methods.
355 virtual void visit(ir_variable
*);
356 virtual void visit(ir_loop
*);
357 virtual void visit(ir_loop_jump
*);
358 virtual void visit(ir_function_signature
*);
359 virtual void visit(ir_function
*);
360 virtual void visit(ir_expression
*);
361 virtual void visit(ir_swizzle
*);
362 virtual void visit(ir_dereference_variable
*);
363 virtual void visit(ir_dereference_array
*);
364 virtual void visit(ir_dereference_record
*);
365 virtual void visit(ir_assignment
*);
366 virtual void visit(ir_constant
*);
367 virtual void visit(ir_call
*);
368 virtual void visit(ir_return
*);
369 virtual void visit(ir_discard
*);
370 virtual void visit(ir_texture
*);
371 virtual void visit(ir_if
*);
376 /** List of variable_storage */
379 /** List of immediate_storage */
380 exec_list immediates
;
381 unsigned num_immediates
;
383 /** List of function_entry */
384 exec_list function_signatures
;
385 int next_signature_id
;
387 /** List of glsl_to_tgsi_instruction */
388 exec_list instructions
;
390 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
392 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
393 st_dst_reg dst
, st_src_reg src0
);
395 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
396 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
398 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
400 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
402 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
404 st_src_reg src0
, st_src_reg src1
);
407 * Emit the correct dot-product instruction for the type of arguments
409 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
415 void emit_scalar(ir_instruction
*ir
, unsigned op
,
416 st_dst_reg dst
, st_src_reg src0
);
418 void emit_scalar(ir_instruction
*ir
, unsigned op
,
419 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
421 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
423 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
425 void emit_scs(ir_instruction
*ir
, unsigned op
,
426 st_dst_reg dst
, const st_src_reg
&src
);
428 bool try_emit_mad(ir_expression
*ir
,
430 bool try_emit_mad_for_and_not(ir_expression
*ir
,
432 bool try_emit_sat(ir_expression
*ir
);
434 void emit_swz(ir_expression
*ir
);
436 bool process_move_condition(ir_rvalue
*ir
);
438 void simplify_cmp(void);
440 void rename_temp_register(int index
, int new_index
);
441 int get_first_temp_read(int index
);
442 int get_first_temp_write(int index
);
443 int get_last_temp_read(int index
);
444 int get_last_temp_write(int index
);
446 void copy_propagate(void);
447 void eliminate_dead_code(void);
448 int eliminate_dead_code_advanced(void);
449 void merge_registers(void);
450 void renumber_registers(void);
452 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
453 st_dst_reg
*l
, st_src_reg
*r
);
458 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
460 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
462 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
465 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
468 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
472 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
475 prog
->LinkStatus
= GL_FALSE
;
479 swizzle_for_size(int size
)
481 int size_swizzles
[4] = {
482 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
483 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
484 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
485 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
488 assert((size
>= 1) && (size
<= 4));
489 return size_swizzles
[size
- 1];
493 is_tex_instruction(unsigned opcode
)
495 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
500 num_inst_dst_regs(unsigned opcode
)
502 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
503 return info
->num_dst
;
507 num_inst_src_regs(unsigned opcode
)
509 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
510 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
513 glsl_to_tgsi_instruction
*
514 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
516 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
518 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
519 int num_reladdr
= 0, i
;
521 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
523 /* If we have to do relative addressing, we want to load the ARL
524 * reg directly for one of the regs, and preload the other reladdr
525 * sources into temps.
527 num_reladdr
+= dst
.reladdr
!= NULL
;
528 num_reladdr
+= src0
.reladdr
!= NULL
;
529 num_reladdr
+= src1
.reladdr
!= NULL
;
530 num_reladdr
+= src2
.reladdr
!= NULL
;
532 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
533 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
534 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
537 emit_arl(ir
, address_reg
, *dst
.reladdr
);
540 assert(num_reladdr
== 0);
550 inst
->function
= NULL
;
552 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
553 this->num_address_regs
= 1;
555 /* Update indirect addressing status used by TGSI */
558 case PROGRAM_LOCAL_PARAM
:
559 case PROGRAM_ENV_PARAM
:
560 case PROGRAM_STATE_VAR
:
561 case PROGRAM_CONSTANT
:
562 case PROGRAM_UNIFORM
:
563 this->indirect_addr_consts
= true;
565 case PROGRAM_IMMEDIATE
:
566 assert(!"immediates should not have indirect addressing");
573 for (i
=0; i
<3; i
++) {
574 if(inst
->src
[i
].reladdr
) {
575 switch(inst
->src
[i
].file
) {
576 case PROGRAM_LOCAL_PARAM
:
577 case PROGRAM_ENV_PARAM
:
578 case PROGRAM_STATE_VAR
:
579 case PROGRAM_CONSTANT
:
580 case PROGRAM_UNIFORM
:
581 this->indirect_addr_consts
= true;
583 case PROGRAM_IMMEDIATE
:
584 assert(!"immediates should not have indirect addressing");
593 this->instructions
.push_tail(inst
);
596 try_emit_float_set(ir
, op
, dst
);
602 glsl_to_tgsi_instruction
*
603 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
604 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
606 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
609 glsl_to_tgsi_instruction
*
610 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
611 st_dst_reg dst
, st_src_reg src0
)
613 assert(dst
.writemask
!= 0);
614 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
617 glsl_to_tgsi_instruction
*
618 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
620 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
624 * Emits the code to convert the result of float SET instructions to integers.
627 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
630 if ((op
== TGSI_OPCODE_SEQ
||
631 op
== TGSI_OPCODE_SNE
||
632 op
== TGSI_OPCODE_SGE
||
633 op
== TGSI_OPCODE_SLT
))
635 st_src_reg src
= st_src_reg(dst
);
636 src
.negate
= ~src
.negate
;
637 dst
.type
= GLSL_TYPE_FLOAT
;
638 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
643 * Determines whether to use an integer, unsigned integer, or float opcode
644 * based on the operands and input opcode, then emits the result.
647 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
649 st_src_reg src0
, st_src_reg src1
)
651 int type
= GLSL_TYPE_FLOAT
;
653 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
654 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
655 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
656 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
658 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
659 type
= GLSL_TYPE_FLOAT
;
660 else if (native_integers
)
661 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
663 #define case4(c, f, i, u) \
664 case TGSI_OPCODE_##c: \
665 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
666 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
667 else op = TGSI_OPCODE_##f; \
669 #define case3(f, i, u) case4(f, f, i, u)
670 #define case2fi(f, i) case4(f, f, i, i)
671 #define case2iu(i, u) case4(i, LAST, i, u)
677 case3(DIV
, IDIV
, UDIV
);
678 case3(MAX
, IMAX
, UMAX
);
679 case3(MIN
, IMIN
, UMIN
);
684 case3(SGE
, ISGE
, USGE
);
685 case3(SLT
, ISLT
, USLT
);
690 case3(ABS
, IABS
, IABS
);
695 assert(op
!= TGSI_OPCODE_LAST
);
699 glsl_to_tgsi_instruction
*
700 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
701 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
704 static const unsigned dot_opcodes
[] = {
705 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
708 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
712 * Emits TGSI scalar opcodes to produce unique answers across channels.
714 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
715 * channel determines the result across all channels. So to do a vec4
716 * of this operation, we want to emit a scalar per source channel used
717 * to produce dest channels.
720 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
722 st_src_reg orig_src0
, st_src_reg orig_src1
)
725 int done_mask
= ~dst
.writemask
;
727 /* TGSI RCP is a scalar operation splatting results to all channels,
728 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
731 for (i
= 0; i
< 4; i
++) {
732 GLuint this_mask
= (1 << i
);
733 glsl_to_tgsi_instruction
*inst
;
734 st_src_reg src0
= orig_src0
;
735 st_src_reg src1
= orig_src1
;
737 if (done_mask
& this_mask
)
740 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
741 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
742 for (j
= i
+ 1; j
< 4; j
++) {
743 /* If there is another enabled component in the destination that is
744 * derived from the same inputs, generate its value on this pass as
747 if (!(done_mask
& (1 << j
)) &&
748 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
749 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
750 this_mask
|= (1 << j
);
753 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
754 src0_swiz
, src0_swiz
);
755 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
756 src1_swiz
, src1_swiz
);
758 inst
= emit(ir
, op
, dst
, src0
, src1
);
759 inst
->dst
.writemask
= this_mask
;
760 done_mask
|= this_mask
;
765 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
766 st_dst_reg dst
, st_src_reg src0
)
768 st_src_reg undef
= undef_src
;
770 undef
.swizzle
= SWIZZLE_XXXX
;
772 emit_scalar(ir
, op
, dst
, src0
, undef
);
776 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
777 st_dst_reg dst
, st_src_reg src0
)
779 int op
= TGSI_OPCODE_ARL
;
781 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
782 op
= TGSI_OPCODE_UARL
;
784 emit(NULL
, op
, dst
, src0
);
788 * Emit an TGSI_OPCODE_SCS instruction
790 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
791 * Instead of splatting its result across all four components of the
792 * destination, it writes one value to the \c x component and another value to
793 * the \c y component.
795 * \param ir IR instruction being processed
796 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
797 * on which value is desired.
798 * \param dst Destination register
799 * \param src Source register
802 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
804 const st_src_reg
&src
)
806 /* Vertex programs cannot use the SCS opcode.
808 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
809 emit_scalar(ir
, op
, dst
, src
);
813 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
814 const unsigned scs_mask
= (1U << component
);
815 int done_mask
= ~dst
.writemask
;
818 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
820 /* If there are compnents in the destination that differ from the component
821 * that will be written by the SCS instrution, we'll need a temporary.
823 if (scs_mask
!= unsigned(dst
.writemask
)) {
824 tmp
= get_temp(glsl_type::vec4_type
);
827 for (unsigned i
= 0; i
< 4; i
++) {
828 unsigned this_mask
= (1U << i
);
829 st_src_reg src0
= src
;
831 if ((done_mask
& this_mask
) != 0)
834 /* The source swizzle specified which component of the source generates
835 * sine / cosine for the current component in the destination. The SCS
836 * instruction requires that this value be swizzle to the X component.
837 * Replace the current swizzle with a swizzle that puts the source in
840 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
842 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
843 src0_swiz
, src0_swiz
);
844 for (unsigned j
= i
+ 1; j
< 4; j
++) {
845 /* If there is another enabled component in the destination that is
846 * derived from the same inputs, generate its value on this pass as
849 if (!(done_mask
& (1 << j
)) &&
850 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
851 this_mask
|= (1 << j
);
855 if (this_mask
!= scs_mask
) {
856 glsl_to_tgsi_instruction
*inst
;
857 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
859 /* Emit the SCS instruction.
861 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
862 inst
->dst
.writemask
= scs_mask
;
864 /* Move the result of the SCS instruction to the desired location in
867 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
868 component
, component
);
869 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
870 inst
->dst
.writemask
= this_mask
;
872 /* Emit the SCS instruction to write directly to the destination.
874 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
875 inst
->dst
.writemask
= scs_mask
;
878 done_mask
|= this_mask
;
883 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
884 gl_constant_value values
[4], int size
, int datatype
,
887 if (file
== PROGRAM_CONSTANT
) {
888 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
889 size
, datatype
, swizzle_out
);
892 immediate_storage
*entry
;
893 assert(file
== PROGRAM_IMMEDIATE
);
895 /* Search immediate storage to see if we already have an identical
896 * immediate that we can use instead of adding a duplicate entry.
898 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
899 entry
= (immediate_storage
*)iter
.get();
901 if (entry
->size
== size
&&
902 entry
->type
== datatype
&&
903 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
909 /* Add this immediate to the list. */
910 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
911 this->immediates
.push_tail(entry
);
912 this->num_immediates
++;
918 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
920 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
921 union gl_constant_value uval
;
924 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
930 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
932 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
933 union gl_constant_value uval
;
935 assert(native_integers
);
938 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
944 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
947 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
948 st_src_reg_for_int(val
);
950 return st_src_reg_for_float(val
);
954 type_size(const struct glsl_type
*type
)
959 switch (type
->base_type
) {
962 case GLSL_TYPE_FLOAT
:
964 if (type
->is_matrix()) {
965 return type
->matrix_columns
;
967 /* Regardless of size of vector, it gets a vec4. This is bad
968 * packing for things like floats, but otherwise arrays become a
969 * mess. Hopefully a later pass over the code can pack scalars
970 * down if appropriate.
974 case GLSL_TYPE_ARRAY
:
975 assert(type
->length
> 0);
976 return type_size(type
->fields
.array
) * type
->length
;
977 case GLSL_TYPE_STRUCT
:
979 for (i
= 0; i
< type
->length
; i
++) {
980 size
+= type_size(type
->fields
.structure
[i
].type
);
983 case GLSL_TYPE_SAMPLER
:
984 /* Samplers take up one slot in UNIFORMS[], but they're baked in
988 case GLSL_TYPE_INTERFACE
:
990 case GLSL_TYPE_ERROR
:
991 assert(!"Invalid type in type_size");
998 * In the initial pass of codegen, we assign temporary numbers to
999 * intermediate results. (not SSA -- variable assignments will reuse
1003 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1007 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1011 if (!options
->EmitNoIndirectTemp
&&
1012 (type
->is_array() || type
->is_matrix())) {
1014 src
.file
= PROGRAM_ARRAY
;
1015 src
.index
= next_array
<< 16 | 0x8000;
1016 array_sizes
[next_array
] = type_size(type
);
1020 src
.file
= PROGRAM_TEMPORARY
;
1021 src
.index
= next_temp
;
1022 next_temp
+= type_size(type
);
1025 if (type
->is_array() || type
->is_record()) {
1026 src
.swizzle
= SWIZZLE_NOOP
;
1028 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1035 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1038 variable_storage
*entry
;
1040 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1041 entry
= (variable_storage
*)iter
.get();
1043 if (entry
->var
== var
)
1051 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1053 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1054 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1056 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1057 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1060 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1062 const ir_state_slot
*const slots
= ir
->state_slots
;
1063 assert(ir
->state_slots
!= NULL
);
1065 /* Check if this statevar's setup in the STATE file exactly
1066 * matches how we'll want to reference it as a
1067 * struct/array/whatever. If not, then we need to move it into
1068 * temporary storage and hope that it'll get copy-propagated
1071 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1072 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1077 variable_storage
*storage
;
1079 if (i
== ir
->num_state_slots
) {
1080 /* We'll set the index later. */
1081 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1082 this->variables
.push_tail(storage
);
1086 /* The variable_storage constructor allocates slots based on the size
1087 * of the type. However, this had better match the number of state
1088 * elements that we're going to copy into the new temporary.
1090 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1092 dst
= st_dst_reg(get_temp(ir
->type
));
1094 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1096 this->variables
.push_tail(storage
);
1100 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1101 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1102 (gl_state_index
*)slots
[i
].tokens
);
1104 if (storage
->file
== PROGRAM_STATE_VAR
) {
1105 if (storage
->index
== -1) {
1106 storage
->index
= index
;
1108 assert(index
== storage
->index
+ (int)i
);
1111 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1112 * the data being moved since MOV does not care about the type of
1113 * data it is moving, and we don't want to declare registers with
1114 * array or struct types.
1116 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1117 src
.swizzle
= slots
[i
].swizzle
;
1118 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1119 /* even a float takes up a whole vec4 reg in a struct/array. */
1124 if (storage
->file
== PROGRAM_TEMPORARY
&&
1125 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1126 fail_link(this->shader_program
,
1127 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1128 ir
->name
, dst
.index
- storage
->index
,
1129 type_size(ir
->type
));
1135 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1137 ir_dereference_variable
*counter
= NULL
;
1139 if (ir
->counter
!= NULL
)
1140 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1142 if (ir
->from
!= NULL
) {
1143 assert(ir
->counter
!= NULL
);
1145 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1151 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1155 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1157 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1159 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1161 if_stmt
->then_instructions
.push_tail(brk
);
1163 if_stmt
->accept(this);
1170 visit_exec_list(&ir
->body_instructions
, this);
1172 if (ir
->increment
) {
1174 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1175 counter
, ir
->increment
);
1177 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1184 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1188 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1191 case ir_loop_jump::jump_break
:
1192 emit(NULL
, TGSI_OPCODE_BRK
);
1194 case ir_loop_jump::jump_continue
:
1195 emit(NULL
, TGSI_OPCODE_CONT
);
1202 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1209 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1211 /* Ignore function bodies other than main() -- we shouldn't see calls to
1212 * them since they should all be inlined before we get to glsl_to_tgsi.
1214 if (strcmp(ir
->name
, "main") == 0) {
1215 const ir_function_signature
*sig
;
1218 sig
= ir
->matching_signature(&empty
);
1222 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1223 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1231 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1233 int nonmul_operand
= 1 - mul_operand
;
1235 st_dst_reg result_dst
;
1237 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1238 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1241 expr
->operands
[0]->accept(this);
1243 expr
->operands
[1]->accept(this);
1245 ir
->operands
[nonmul_operand
]->accept(this);
1248 this->result
= get_temp(ir
->type
);
1249 result_dst
= st_dst_reg(this->result
);
1250 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1251 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1257 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1259 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1260 * implemented using multiplication, and logical-or is implemented using
1261 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1262 * As result, the logical expression (a & !b) can be rewritten as:
1266 * - (a * 1) - (a * b)
1270 * This final expression can be implemented as a single MAD(a, -b, a)
1274 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1276 const int other_operand
= 1 - try_operand
;
1279 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1280 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1283 ir
->operands
[other_operand
]->accept(this);
1285 expr
->operands
[0]->accept(this);
1288 b
.negate
= ~b
.negate
;
1290 this->result
= get_temp(ir
->type
);
1291 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1297 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1299 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1301 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1302 !st_context(this->ctx
)->has_shader_model3
) {
1306 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1310 sat_src
->accept(this);
1311 st_src_reg src
= this->result
;
1313 /* If we generated an expression instruction into a temporary in
1314 * processing the saturate's operand, apply the saturate to that
1315 * instruction. Otherwise, generate a MOV to do the saturate.
1317 * Note that we have to be careful to only do this optimization if
1318 * the instruction in question was what generated src->result. For
1319 * example, ir_dereference_array might generate a MUL instruction
1320 * to create the reladdr, and return us a src reg using that
1321 * reladdr. That MUL result is not the value we're trying to
1324 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1325 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1326 sat_src_expr
->operation
== ir_binop_add
||
1327 sat_src_expr
->operation
== ir_binop_dot
)) {
1328 glsl_to_tgsi_instruction
*new_inst
;
1329 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1330 new_inst
->saturate
= true;
1332 this->result
= get_temp(ir
->type
);
1333 st_dst_reg result_dst
= st_dst_reg(this->result
);
1334 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1335 glsl_to_tgsi_instruction
*inst
;
1336 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1337 inst
->saturate
= true;
1344 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1345 st_src_reg
*reg
, int *num_reladdr
)
1350 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1352 if (*num_reladdr
!= 1) {
1353 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1355 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1363 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1365 unsigned int operand
;
1366 st_src_reg op
[Elements(ir
->operands
)];
1367 st_src_reg result_src
;
1368 st_dst_reg result_dst
;
1370 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1372 if (ir
->operation
== ir_binop_add
) {
1373 if (try_emit_mad(ir
, 1))
1375 if (try_emit_mad(ir
, 0))
1379 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1381 if (ir
->operation
== ir_binop_logic_and
) {
1382 if (try_emit_mad_for_and_not(ir
, 1))
1384 if (try_emit_mad_for_and_not(ir
, 0))
1388 if (try_emit_sat(ir
))
1391 if (ir
->operation
== ir_quadop_vector
)
1392 assert(!"ir_quadop_vector should have been lowered");
1394 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1395 this->result
.file
= PROGRAM_UNDEFINED
;
1396 ir
->operands
[operand
]->accept(this);
1397 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1398 printf("Failed to get tree for expression operand:\n");
1399 ir
->operands
[operand
]->print();
1403 op
[operand
] = this->result
;
1405 /* Matrix expression operands should have been broken down to vector
1406 * operations already.
1408 assert(!ir
->operands
[operand
]->type
->is_matrix());
1411 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1412 if (ir
->operands
[1]) {
1413 vector_elements
= MAX2(vector_elements
,
1414 ir
->operands
[1]->type
->vector_elements
);
1417 this->result
.file
= PROGRAM_UNDEFINED
;
1419 /* Storage for our result. Ideally for an assignment we'd be using
1420 * the actual storage for the result here, instead.
1422 result_src
= get_temp(ir
->type
);
1423 /* convenience for the emit functions below. */
1424 result_dst
= st_dst_reg(result_src
);
1425 /* Limit writes to the channels that will be used by result_src later.
1426 * This does limit this temp's use as a temporary for multi-instruction
1429 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1431 switch (ir
->operation
) {
1432 case ir_unop_logic_not
:
1433 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1434 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1436 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1437 * older GPUs implement SEQ using multiple instructions (i915 uses two
1438 * SGE instructions and a MUL instruction). Since our logic values are
1439 * 0.0 and 1.0, 1-x also implements !x.
1441 op
[0].negate
= ~op
[0].negate
;
1442 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1446 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1447 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1449 op
[0].negate
= ~op
[0].negate
;
1454 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1457 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1460 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1464 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1468 assert(!"not reached: should be handled by ir_explog_to_explog2");
1471 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1474 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1477 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1479 case ir_unop_sin_reduced
:
1480 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1482 case ir_unop_cos_reduced
:
1483 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1487 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1491 /* The X component contains 1 or -1 depending on whether the framebuffer
1492 * is a FBO or the window system buffer, respectively.
1493 * It is then multiplied with the source operand of DDY.
1495 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1496 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1498 unsigned transform_y_index
=
1499 _mesa_add_state_reference(this->prog
->Parameters
,
1502 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1504 glsl_type::vec4_type
);
1505 transform_y
.swizzle
= SWIZZLE_XXXX
;
1507 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1509 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1510 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1514 case ir_unop_noise
: {
1515 /* At some point, a motivated person could add a better
1516 * implementation of noise. Currently not even the nvidia
1517 * binary drivers do anything more than this. In any case, the
1518 * place to do this is in the GL state tracker, not the poor
1521 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1526 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1529 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1533 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1536 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1537 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1539 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1542 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1543 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1545 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1549 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1551 case ir_binop_greater
:
1552 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1554 case ir_binop_lequal
:
1555 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1557 case ir_binop_gequal
:
1558 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1560 case ir_binop_equal
:
1561 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1563 case ir_binop_nequal
:
1564 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1566 case ir_binop_all_equal
:
1567 /* "==" operator producing a scalar boolean. */
1568 if (ir
->operands
[0]->type
->is_vector() ||
1569 ir
->operands
[1]->type
->is_vector()) {
1570 st_src_reg temp
= get_temp(native_integers
?
1571 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1572 glsl_type::vec4_type
);
1574 if (native_integers
) {
1575 st_dst_reg temp_dst
= st_dst_reg(temp
);
1576 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1578 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1580 /* Emit 1-3 AND operations to combine the SEQ results. */
1581 switch (ir
->operands
[0]->type
->vector_elements
) {
1585 temp_dst
.writemask
= WRITEMASK_Y
;
1586 temp1
.swizzle
= SWIZZLE_YYYY
;
1587 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1588 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1591 temp_dst
.writemask
= WRITEMASK_X
;
1592 temp1
.swizzle
= SWIZZLE_XXXX
;
1593 temp2
.swizzle
= SWIZZLE_YYYY
;
1594 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1595 temp_dst
.writemask
= WRITEMASK_Y
;
1596 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1597 temp2
.swizzle
= SWIZZLE_WWWW
;
1598 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1601 temp1
.swizzle
= SWIZZLE_XXXX
;
1602 temp2
.swizzle
= SWIZZLE_YYYY
;
1603 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1605 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1607 /* After the dot-product, the value will be an integer on the
1608 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1610 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1612 /* Negating the result of the dot-product gives values on the range
1613 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1614 * This is achieved using SGE.
1616 st_src_reg sge_src
= result_src
;
1617 sge_src
.negate
= ~sge_src
.negate
;
1618 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1621 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1624 case ir_binop_any_nequal
:
1625 /* "!=" operator producing a scalar boolean. */
1626 if (ir
->operands
[0]->type
->is_vector() ||
1627 ir
->operands
[1]->type
->is_vector()) {
1628 st_src_reg temp
= get_temp(native_integers
?
1629 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1630 glsl_type::vec4_type
);
1631 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1633 if (native_integers
) {
1634 st_dst_reg temp_dst
= st_dst_reg(temp
);
1635 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1637 /* Emit 1-3 OR operations to combine the SNE results. */
1638 switch (ir
->operands
[0]->type
->vector_elements
) {
1642 temp_dst
.writemask
= WRITEMASK_Y
;
1643 temp1
.swizzle
= SWIZZLE_YYYY
;
1644 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1645 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1648 temp_dst
.writemask
= WRITEMASK_X
;
1649 temp1
.swizzle
= SWIZZLE_XXXX
;
1650 temp2
.swizzle
= SWIZZLE_YYYY
;
1651 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1652 temp_dst
.writemask
= WRITEMASK_Y
;
1653 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1654 temp2
.swizzle
= SWIZZLE_WWWW
;
1655 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1658 temp1
.swizzle
= SWIZZLE_XXXX
;
1659 temp2
.swizzle
= SWIZZLE_YYYY
;
1660 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1662 /* After the dot-product, the value will be an integer on the
1663 * range [0,4]. Zero stays zero, and positive values become 1.0.
1665 glsl_to_tgsi_instruction
*const dp
=
1666 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1667 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1668 /* The clamping to [0,1] can be done for free in the fragment
1669 * shader with a saturate.
1671 dp
->saturate
= true;
1673 /* Negating the result of the dot-product gives values on the range
1674 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1675 * achieved using SLT.
1677 st_src_reg slt_src
= result_src
;
1678 slt_src
.negate
= ~slt_src
.negate
;
1679 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1683 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1688 assert(ir
->operands
[0]->type
->is_vector());
1690 /* After the dot-product, the value will be an integer on the
1691 * range [0,4]. Zero stays zero, and positive values become 1.0.
1693 glsl_to_tgsi_instruction
*const dp
=
1694 emit_dp(ir
, result_dst
, op
[0], op
[0],
1695 ir
->operands
[0]->type
->vector_elements
);
1696 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1697 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1698 /* The clamping to [0,1] can be done for free in the fragment
1699 * shader with a saturate.
1701 dp
->saturate
= true;
1702 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1703 /* Negating the result of the dot-product gives values on the range
1704 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1705 * is achieved using SLT.
1707 st_src_reg slt_src
= result_src
;
1708 slt_src
.negate
= ~slt_src
.negate
;
1709 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1712 /* Use SNE 0 if integers are being used as boolean values. */
1713 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1718 case ir_binop_logic_xor
:
1719 if (native_integers
)
1720 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1722 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1725 case ir_binop_logic_or
: {
1726 if (native_integers
) {
1727 /* If integers are used as booleans, we can use an actual "or"
1730 assert(native_integers
);
1731 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1733 /* After the addition, the value will be an integer on the
1734 * range [0,2]. Zero stays zero, and positive values become 1.0.
1736 glsl_to_tgsi_instruction
*add
=
1737 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1738 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1739 /* The clamping to [0,1] can be done for free in the fragment
1740 * shader with a saturate if floats are being used as boolean values.
1742 add
->saturate
= true;
1744 /* Negating the result of the addition gives values on the range
1745 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1746 * is achieved using SLT.
1748 st_src_reg slt_src
= result_src
;
1749 slt_src
.negate
= ~slt_src
.negate
;
1750 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1756 case ir_binop_logic_and
:
1757 /* If native integers are disabled, the bool args are stored as float 0.0
1758 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1759 * actual AND opcode.
1761 if (native_integers
)
1762 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1764 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1768 assert(ir
->operands
[0]->type
->is_vector());
1769 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1770 emit_dp(ir
, result_dst
, op
[0], op
[1],
1771 ir
->operands
[0]->type
->vector_elements
);
1776 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1779 /* sqrt(x) = x * rsq(x). */
1780 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1781 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1782 /* For incoming channels <= 0, set the result to 0. */
1783 op
[0].negate
= ~op
[0].negate
;
1784 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1785 op
[0], result_src
, st_src_reg_for_float(0.0));
1789 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1792 if (native_integers
) {
1793 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1796 /* fallthrough to next case otherwise */
1798 if (native_integers
) {
1799 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1802 /* fallthrough to next case otherwise */
1805 /* Converting between signed and unsigned integers is a no-op. */
1809 if (native_integers
) {
1810 /* Booleans are stored as integers using ~0 for true and 0 for false.
1811 * GLSL requires that int(bool) return 1 for true and 0 for false.
1812 * This conversion is done with AND, but it could be done with NEG.
1814 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1816 /* Booleans and integers are both stored as floats when native
1817 * integers are disabled.
1823 if (native_integers
)
1824 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1826 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1829 if (native_integers
)
1830 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1832 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1834 case ir_unop_bitcast_f2i
:
1835 case ir_unop_bitcast_f2u
:
1836 case ir_unop_bitcast_i2f
:
1837 case ir_unop_bitcast_u2f
:
1841 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1844 if (native_integers
)
1845 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1847 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1850 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1853 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1856 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1858 case ir_unop_round_even
:
1859 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1862 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1866 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1869 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1872 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1875 case ir_unop_bit_not
:
1876 if (native_integers
) {
1877 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1881 if (native_integers
) {
1882 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1885 case ir_binop_lshift
:
1886 if (native_integers
) {
1887 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1890 case ir_binop_rshift
:
1891 if (native_integers
) {
1892 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1895 case ir_binop_bit_and
:
1896 if (native_integers
) {
1897 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1900 case ir_binop_bit_xor
:
1901 if (native_integers
) {
1902 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1905 case ir_binop_bit_or
:
1906 if (native_integers
) {
1907 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1911 assert(!"GLSL 1.30 features unsupported");
1914 case ir_binop_ubo_load
: {
1915 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1916 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1917 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1918 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1921 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1922 cbuf
.file
= PROGRAM_CONSTANT
;
1924 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1925 cbuf
.reladdr
= NULL
;
1928 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1930 if (const_offset_ir
) {
1931 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1933 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1936 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1937 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1938 const_offset
% 16 / 4,
1939 const_offset
% 16 / 4,
1940 const_offset
% 16 / 4);
1942 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1943 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1945 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1946 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1948 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1953 /* note: we have to reorder the three args here */
1954 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1956 case ir_unop_pack_snorm_2x16
:
1957 case ir_unop_pack_unorm_2x16
:
1958 case ir_unop_pack_half_2x16
:
1959 case ir_unop_pack_snorm_4x8
:
1960 case ir_unop_pack_unorm_4x8
:
1961 case ir_unop_unpack_snorm_2x16
:
1962 case ir_unop_unpack_unorm_2x16
:
1963 case ir_unop_unpack_half_2x16
:
1964 case ir_unop_unpack_half_2x16_split_x
:
1965 case ir_unop_unpack_half_2x16_split_y
:
1966 case ir_unop_unpack_snorm_4x8
:
1967 case ir_unop_unpack_unorm_4x8
:
1968 case ir_binop_pack_half_2x16_split
:
1969 case ir_unop_bitfield_reverse
:
1970 case ir_unop_bit_count
:
1971 case ir_unop_find_msb
:
1972 case ir_unop_find_lsb
:
1975 case ir_triop_bitfield_extract
:
1976 case ir_quadop_bitfield_insert
:
1977 case ir_quadop_vector
:
1978 case ir_binop_vector_extract
:
1979 case ir_triop_vector_insert
:
1980 /* This operation is not supported, or should have already been handled.
1982 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1986 this->result
= result_src
;
1991 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1997 /* Note that this is only swizzles in expressions, not those on the left
1998 * hand side of an assignment, which do write masking. See ir_assignment
2002 ir
->val
->accept(this);
2004 assert(src
.file
!= PROGRAM_UNDEFINED
);
2006 for (i
= 0; i
< 4; i
++) {
2007 if (i
< ir
->type
->vector_elements
) {
2010 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2013 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2016 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2019 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2023 /* If the type is smaller than a vec4, replicate the last
2026 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2030 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2036 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2038 variable_storage
*entry
= find_variable_storage(ir
->var
);
2039 ir_variable
*var
= ir
->var
;
2042 switch (var
->mode
) {
2043 case ir_var_uniform
:
2044 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2046 this->variables
.push_tail(entry
);
2048 case ir_var_shader_in
:
2049 /* The linker assigns locations for varyings and attributes,
2050 * including deprecated builtins (like gl_Color), user-assign
2051 * generic attributes (glBindVertexLocation), and
2052 * user-defined varyings.
2054 assert(var
->location
!= -1);
2055 entry
= new(mem_ctx
) variable_storage(var
,
2059 case ir_var_shader_out
:
2060 assert(var
->location
!= -1);
2061 entry
= new(mem_ctx
) variable_storage(var
,
2063 var
->location
+ var
->index
);
2065 case ir_var_system_value
:
2066 entry
= new(mem_ctx
) variable_storage(var
,
2067 PROGRAM_SYSTEM_VALUE
,
2071 case ir_var_temporary
:
2072 st_src_reg src
= get_temp(var
->type
);
2074 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2075 this->variables
.push_tail(entry
);
2081 printf("Failed to make storage for %s\n", var
->name
);
2086 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2087 if (!native_integers
)
2088 this->result
.type
= GLSL_TYPE_FLOAT
;
2092 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2096 int element_size
= type_size(ir
->type
);
2098 index
= ir
->array_index
->constant_expression_value();
2100 ir
->array
->accept(this);
2104 src
.index
+= index
->value
.i
[0] * element_size
;
2106 /* Variable index array dereference. It eats the "vec4" of the
2107 * base of the array and an index that offsets the TGSI register
2110 ir
->array_index
->accept(this);
2112 st_src_reg index_reg
;
2114 if (element_size
== 1) {
2115 index_reg
= this->result
;
2117 index_reg
= get_temp(native_integers
?
2118 glsl_type::int_type
: glsl_type::float_type
);
2120 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2121 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2124 /* If there was already a relative address register involved, add the
2125 * new and the old together to get the new offset.
2127 if (src
.reladdr
!= NULL
) {
2128 st_src_reg accum_reg
= get_temp(native_integers
?
2129 glsl_type::int_type
: glsl_type::float_type
);
2131 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2132 index_reg
, *src
.reladdr
);
2134 index_reg
= accum_reg
;
2137 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2138 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2141 /* If the type is smaller than a vec4, replicate the last channel out. */
2142 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2143 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2145 src
.swizzle
= SWIZZLE_NOOP
;
2147 /* Change the register type to the element type of the array. */
2148 src
.type
= ir
->type
->base_type
;
2154 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2157 const glsl_type
*struct_type
= ir
->record
->type
;
2160 ir
->record
->accept(this);
2162 for (i
= 0; i
< struct_type
->length
; i
++) {
2163 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2165 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2168 /* If the type is smaller than a vec4, replicate the last channel out. */
2169 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2170 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2172 this->result
.swizzle
= SWIZZLE_NOOP
;
2174 this->result
.index
+= offset
;
2175 this->result
.type
= ir
->type
->base_type
;
2179 * We want to be careful in assignment setup to hit the actual storage
2180 * instead of potentially using a temporary like we might with the
2181 * ir_dereference handler.
2184 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2186 /* The LHS must be a dereference. If the LHS is a variable indexed array
2187 * access of a vector, it must be separated into a series conditional moves
2188 * before reaching this point (see ir_vec_index_to_cond_assign).
2190 assert(ir
->as_dereference());
2191 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2193 assert(!deref_array
->array
->type
->is_vector());
2196 /* Use the rvalue deref handler for the most part. We'll ignore
2197 * swizzles in it and write swizzles using writemask, though.
2200 return st_dst_reg(v
->result
);
2204 * Process the condition of a conditional assignment
2206 * Examines the condition of a conditional assignment to generate the optimal
2207 * first operand of a \c CMP instruction. If the condition is a relational
2208 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2209 * used as the source for the \c CMP instruction. Otherwise the comparison
2210 * is processed to a boolean result, and the boolean result is used as the
2211 * operand to the CMP instruction.
2214 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2216 ir_rvalue
*src_ir
= ir
;
2218 bool switch_order
= false;
2220 ir_expression
*const expr
= ir
->as_expression();
2221 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2222 bool zero_on_left
= false;
2224 if (expr
->operands
[0]->is_zero()) {
2225 src_ir
= expr
->operands
[1];
2226 zero_on_left
= true;
2227 } else if (expr
->operands
[1]->is_zero()) {
2228 src_ir
= expr
->operands
[0];
2229 zero_on_left
= false;
2233 * (a < 0) T F F ( a < 0) T F F
2234 * (0 < a) F F T (-a < 0) F F T
2235 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2236 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2237 * (a > 0) F F T (-a < 0) F F T
2238 * (0 > a) T F F ( a < 0) T F F
2239 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2240 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2242 * Note that exchanging the order of 0 and 'a' in the comparison simply
2243 * means that the value of 'a' should be negated.
2246 switch (expr
->operation
) {
2248 switch_order
= false;
2249 negate
= zero_on_left
;
2252 case ir_binop_greater
:
2253 switch_order
= false;
2254 negate
= !zero_on_left
;
2257 case ir_binop_lequal
:
2258 switch_order
= true;
2259 negate
= !zero_on_left
;
2262 case ir_binop_gequal
:
2263 switch_order
= true;
2264 negate
= zero_on_left
;
2268 /* This isn't the right kind of comparison afterall, so make sure
2269 * the whole condition is visited.
2277 src_ir
->accept(this);
2279 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2280 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2281 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2282 * computing the condition.
2285 this->result
.negate
= ~this->result
.negate
;
2287 return switch_order
;
2291 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2292 st_dst_reg
*l
, st_src_reg
*r
)
2294 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2295 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2296 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2301 if (type
->is_array()) {
2302 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2303 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2308 if (type
->is_matrix()) {
2309 const struct glsl_type
*vec_type
;
2311 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2312 type
->vector_elements
, 1);
2314 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2315 emit_block_mov(ir
, vec_type
, l
, r
);
2320 assert(type
->is_scalar() || type
->is_vector());
2322 r
->type
= type
->base_type
;
2323 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2329 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2335 ir
->rhs
->accept(this);
2338 l
= get_assignment_lhs(ir
->lhs
, this);
2340 /* FINISHME: This should really set to the correct maximal writemask for each
2341 * FINISHME: component written (in the loops below). This case can only
2342 * FINISHME: occur for matrices, arrays, and structures.
2344 if (ir
->write_mask
== 0) {
2345 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2346 l
.writemask
= WRITEMASK_XYZW
;
2347 } else if (ir
->lhs
->type
->is_scalar() &&
2348 ir
->lhs
->variable_referenced()->mode
== ir_var_shader_out
) {
2349 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2350 * FINISHME: W component of fragment shader output zero, work correctly.
2352 l
.writemask
= WRITEMASK_XYZW
;
2355 int first_enabled_chan
= 0;
2358 l
.writemask
= ir
->write_mask
;
2360 for (int i
= 0; i
< 4; i
++) {
2361 if (l
.writemask
& (1 << i
)) {
2362 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2367 /* Swizzle a small RHS vector into the channels being written.
2369 * glsl ir treats write_mask as dictating how many channels are
2370 * present on the RHS while TGSI treats write_mask as just
2371 * showing which channels of the vec4 RHS get written.
2373 for (int i
= 0; i
< 4; i
++) {
2374 if (l
.writemask
& (1 << i
))
2375 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2377 swizzles
[i
] = first_enabled_chan
;
2379 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2380 swizzles
[2], swizzles
[3]);
2383 assert(l
.file
!= PROGRAM_UNDEFINED
);
2384 assert(r
.file
!= PROGRAM_UNDEFINED
);
2386 if (ir
->condition
) {
2387 const bool switch_order
= this->process_move_condition(ir
->condition
);
2388 st_src_reg condition
= this->result
;
2390 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2391 st_src_reg l_src
= st_src_reg(l
);
2392 st_src_reg condition_temp
= condition
;
2393 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2395 if (native_integers
) {
2396 /* This is necessary because TGSI's CMP instruction expects the
2397 * condition to be a float, and we store booleans as integers.
2398 * TODO: really want to avoid i2f path and use UCMP. Requires
2399 * changes to process_move_condition though too.
2401 condition_temp
= get_temp(glsl_type::vec4_type
);
2402 condition
.negate
= 0;
2403 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2404 condition_temp
.swizzle
= condition
.swizzle
;
2408 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2410 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2416 } else if (ir
->rhs
->as_expression() &&
2417 this->instructions
.get_tail() &&
2418 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2419 type_size(ir
->lhs
->type
) == 1 &&
2420 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2421 /* To avoid emitting an extra MOV when assigning an expression to a
2422 * variable, emit the last instruction of the expression again, but
2423 * replace the destination register with the target of the assignment.
2424 * Dead code elimination will remove the original instruction.
2426 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2427 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2428 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2429 new_inst
->saturate
= inst
->saturate
;
2430 inst
->dead_mask
= inst
->dst
.writemask
;
2432 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2438 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2441 GLfloat stack_vals
[4] = { 0 };
2442 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2443 GLenum gl_type
= GL_NONE
;
2445 static int in_array
= 0;
2446 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2448 /* Unfortunately, 4 floats is all we can get into
2449 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2450 * aggregate constant and move each constant value into it. If we
2451 * get lucky, copy propagation will eliminate the extra moves.
2453 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2454 st_src_reg temp_base
= get_temp(ir
->type
);
2455 st_dst_reg temp
= st_dst_reg(temp_base
);
2457 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2458 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2459 int size
= type_size(field_value
->type
);
2463 field_value
->accept(this);
2466 for (i
= 0; i
< (unsigned int)size
; i
++) {
2467 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2473 this->result
= temp_base
;
2477 if (ir
->type
->is_array()) {
2478 st_src_reg temp_base
= get_temp(ir
->type
);
2479 st_dst_reg temp
= st_dst_reg(temp_base
);
2480 int size
= type_size(ir
->type
->fields
.array
);
2485 for (i
= 0; i
< ir
->type
->length
; i
++) {
2486 ir
->array_elements
[i
]->accept(this);
2488 for (int j
= 0; j
< size
; j
++) {
2489 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2495 this->result
= temp_base
;
2500 if (ir
->type
->is_matrix()) {
2501 st_src_reg mat
= get_temp(ir
->type
);
2502 st_dst_reg mat_column
= st_dst_reg(mat
);
2504 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2505 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2506 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2508 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2509 src
.index
= add_constant(file
,
2511 ir
->type
->vector_elements
,
2514 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2523 switch (ir
->type
->base_type
) {
2524 case GLSL_TYPE_FLOAT
:
2526 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2527 values
[i
].f
= ir
->value
.f
[i
];
2530 case GLSL_TYPE_UINT
:
2531 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2532 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2533 if (native_integers
)
2534 values
[i
].u
= ir
->value
.u
[i
];
2536 values
[i
].f
= ir
->value
.u
[i
];
2540 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2541 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2542 if (native_integers
)
2543 values
[i
].i
= ir
->value
.i
[i
];
2545 values
[i
].f
= ir
->value
.i
[i
];
2548 case GLSL_TYPE_BOOL
:
2549 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2550 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2551 if (native_integers
)
2552 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2554 values
[i
].f
= ir
->value
.b
[i
];
2558 assert(!"Non-float/uint/int/bool constant");
2561 this->result
= st_src_reg(file
, -1, ir
->type
);
2562 this->result
.index
= add_constant(file
,
2564 ir
->type
->vector_elements
,
2566 &this->result
.swizzle
);
2570 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2572 function_entry
*entry
;
2574 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2575 entry
= (function_entry
*)iter
.get();
2577 if (entry
->sig
== sig
)
2581 entry
= ralloc(mem_ctx
, function_entry
);
2583 entry
->sig_id
= this->next_signature_id
++;
2584 entry
->bgn_inst
= NULL
;
2586 /* Allocate storage for all the parameters. */
2587 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2588 ir_variable
*param
= (ir_variable
*)iter
.get();
2589 variable_storage
*storage
;
2591 storage
= find_variable_storage(param
);
2594 st_src_reg src
= get_temp(param
->type
);
2596 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2597 this->variables
.push_tail(storage
);
2600 if (!sig
->return_type
->is_void()) {
2601 entry
->return_reg
= get_temp(sig
->return_type
);
2603 entry
->return_reg
= undef_src
;
2606 this->function_signatures
.push_tail(entry
);
2611 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2613 glsl_to_tgsi_instruction
*call_inst
;
2614 ir_function_signature
*sig
= ir
->callee
;
2615 function_entry
*entry
= get_function_signature(sig
);
2618 /* Process in parameters. */
2619 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2620 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2621 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2622 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2624 if (param
->mode
== ir_var_function_in
||
2625 param
->mode
== ir_var_function_inout
) {
2626 variable_storage
*storage
= find_variable_storage(param
);
2629 param_rval
->accept(this);
2630 st_src_reg r
= this->result
;
2633 l
.file
= storage
->file
;
2634 l
.index
= storage
->index
;
2636 l
.writemask
= WRITEMASK_XYZW
;
2637 l
.cond_mask
= COND_TR
;
2639 for (i
= 0; i
< type_size(param
->type
); i
++) {
2640 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2648 assert(!sig_iter
.has_next());
2650 /* Emit call instruction */
2651 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2652 call_inst
->function
= entry
;
2654 /* Process out parameters. */
2655 sig_iter
= sig
->parameters
.iterator();
2656 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2657 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2658 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2660 if (param
->mode
== ir_var_function_out
||
2661 param
->mode
== ir_var_function_inout
) {
2662 variable_storage
*storage
= find_variable_storage(param
);
2666 r
.file
= storage
->file
;
2667 r
.index
= storage
->index
;
2669 r
.swizzle
= SWIZZLE_NOOP
;
2672 param_rval
->accept(this);
2673 st_dst_reg l
= st_dst_reg(this->result
);
2675 for (i
= 0; i
< type_size(param
->type
); i
++) {
2676 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2684 assert(!sig_iter
.has_next());
2686 /* Process return value. */
2687 this->result
= entry
->return_reg
;
2691 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2693 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2694 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2695 glsl_to_tgsi_instruction
*inst
= NULL
;
2696 unsigned opcode
= TGSI_OPCODE_NOP
;
2697 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2698 bool is_cube_array
= false;
2700 /* if we are a cube array sampler */
2701 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2702 sampler_type
->sampler_array
)) {
2703 is_cube_array
= true;
2706 if (ir
->coordinate
) {
2707 ir
->coordinate
->accept(this);
2709 /* Put our coords in a temp. We'll need to modify them for shadow,
2710 * projection, or LOD, so the only case we'd use it as is is if
2711 * we're doing plain old texturing. The optimization passes on
2712 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2714 coord
= get_temp(glsl_type::vec4_type
);
2715 coord_dst
= st_dst_reg(coord
);
2716 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2717 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2720 if (ir
->projector
) {
2721 ir
->projector
->accept(this);
2722 projector
= this->result
;
2725 /* Storage for our result. Ideally for an assignment we'd be using
2726 * the actual storage for the result here, instead.
2728 result_src
= get_temp(ir
->type
);
2729 result_dst
= st_dst_reg(result_src
);
2733 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2735 ir
->offset
->accept(this);
2736 offset
= this->result
;
2740 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2741 ir
->lod_info
.bias
->accept(this);
2742 lod_info
= this->result
;
2744 ir
->offset
->accept(this);
2745 offset
= this->result
;
2749 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2750 ir
->lod_info
.lod
->accept(this);
2751 lod_info
= this->result
;
2753 ir
->offset
->accept(this);
2754 offset
= this->result
;
2758 opcode
= TGSI_OPCODE_TXD
;
2759 ir
->lod_info
.grad
.dPdx
->accept(this);
2761 ir
->lod_info
.grad
.dPdy
->accept(this);
2764 ir
->offset
->accept(this);
2765 offset
= this->result
;
2769 opcode
= TGSI_OPCODE_TXQ
;
2770 ir
->lod_info
.lod
->accept(this);
2771 lod_info
= this->result
;
2774 opcode
= TGSI_OPCODE_TXF
;
2775 ir
->lod_info
.lod
->accept(this);
2776 lod_info
= this->result
;
2778 ir
->offset
->accept(this);
2779 offset
= this->result
;
2783 opcode
= TGSI_OPCODE_TXF
;
2784 ir
->lod_info
.sample_index
->accept(this);
2785 sample_index
= this->result
;
2788 assert(!"Unexpected ir_lod opcode");
2792 if (ir
->projector
) {
2793 if (opcode
== TGSI_OPCODE_TEX
) {
2794 /* Slot the projector in as the last component of the coord. */
2795 coord_dst
.writemask
= WRITEMASK_W
;
2796 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2797 coord_dst
.writemask
= WRITEMASK_XYZW
;
2798 opcode
= TGSI_OPCODE_TXP
;
2800 st_src_reg coord_w
= coord
;
2801 coord_w
.swizzle
= SWIZZLE_WWWW
;
2803 /* For the other TEX opcodes there's no projective version
2804 * since the last slot is taken up by LOD info. Do the
2805 * projective divide now.
2807 coord_dst
.writemask
= WRITEMASK_W
;
2808 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2810 /* In the case where we have to project the coordinates "by hand,"
2811 * the shadow comparator value must also be projected.
2813 st_src_reg tmp_src
= coord
;
2814 if (ir
->shadow_comparitor
) {
2815 /* Slot the shadow value in as the second to last component of the
2818 ir
->shadow_comparitor
->accept(this);
2820 tmp_src
= get_temp(glsl_type::vec4_type
);
2821 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2823 /* Projective division not allowed for array samplers. */
2824 assert(!sampler_type
->sampler_array
);
2826 tmp_dst
.writemask
= WRITEMASK_Z
;
2827 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2829 tmp_dst
.writemask
= WRITEMASK_XY
;
2830 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2833 coord_dst
.writemask
= WRITEMASK_XYZ
;
2834 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2836 coord_dst
.writemask
= WRITEMASK_XYZW
;
2837 coord
.swizzle
= SWIZZLE_XYZW
;
2841 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2842 * comparator was put in the correct place (and projected) by the code,
2843 * above, that handles by-hand projection.
2845 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2846 /* Slot the shadow value in as the second to last component of the
2849 ir
->shadow_comparitor
->accept(this);
2851 if (is_cube_array
) {
2852 cube_sc
= get_temp(glsl_type::float_type
);
2853 cube_sc_dst
= st_dst_reg(cube_sc
);
2854 cube_sc_dst
.writemask
= WRITEMASK_X
;
2855 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2856 cube_sc_dst
.writemask
= WRITEMASK_X
;
2859 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2860 sampler_type
->sampler_array
) ||
2861 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2862 coord_dst
.writemask
= WRITEMASK_W
;
2864 coord_dst
.writemask
= WRITEMASK_Z
;
2867 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2868 coord_dst
.writemask
= WRITEMASK_XYZW
;
2872 if (ir
->op
== ir_txf_ms
) {
2873 coord_dst
.writemask
= WRITEMASK_W
;
2874 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2875 coord_dst
.writemask
= WRITEMASK_XYZW
;
2876 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2877 opcode
== TGSI_OPCODE_TXF
) {
2878 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2879 coord_dst
.writemask
= WRITEMASK_W
;
2880 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2881 coord_dst
.writemask
= WRITEMASK_XYZW
;
2884 if (opcode
== TGSI_OPCODE_TXD
)
2885 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2886 else if (opcode
== TGSI_OPCODE_TXQ
)
2887 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2888 else if (opcode
== TGSI_OPCODE_TXF
) {
2889 inst
= emit(ir
, opcode
, result_dst
, coord
);
2890 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2891 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2892 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2893 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2895 inst
= emit(ir
, opcode
, result_dst
, coord
);
2897 if (ir
->shadow_comparitor
)
2898 inst
->tex_shadow
= GL_TRUE
;
2900 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2901 this->shader_program
,
2905 inst
->tex_offset_num_offset
= 1;
2906 inst
->tex_offsets
[0].Index
= offset
.index
;
2907 inst
->tex_offsets
[0].File
= offset
.file
;
2908 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2909 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2910 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2913 switch (sampler_type
->sampler_dimensionality
) {
2914 case GLSL_SAMPLER_DIM_1D
:
2915 inst
->tex_target
= (sampler_type
->sampler_array
)
2916 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2918 case GLSL_SAMPLER_DIM_2D
:
2919 inst
->tex_target
= (sampler_type
->sampler_array
)
2920 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2922 case GLSL_SAMPLER_DIM_3D
:
2923 inst
->tex_target
= TEXTURE_3D_INDEX
;
2925 case GLSL_SAMPLER_DIM_CUBE
:
2926 inst
->tex_target
= (sampler_type
->sampler_array
)
2927 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2929 case GLSL_SAMPLER_DIM_RECT
:
2930 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2932 case GLSL_SAMPLER_DIM_BUF
:
2933 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2935 case GLSL_SAMPLER_DIM_EXTERNAL
:
2936 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2938 case GLSL_SAMPLER_DIM_MS
:
2939 inst
->tex_target
= (sampler_type
->sampler_array
)
2940 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2943 assert(!"Should not get here.");
2946 this->result
= result_src
;
2950 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2952 if (ir
->get_value()) {
2956 assert(current_function
);
2958 ir
->get_value()->accept(this);
2959 st_src_reg r
= this->result
;
2961 l
= st_dst_reg(current_function
->return_reg
);
2963 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2964 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2970 emit(ir
, TGSI_OPCODE_RET
);
2974 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2976 if (ir
->condition
) {
2977 ir
->condition
->accept(this);
2978 this->result
.negate
= ~this->result
.negate
;
2979 emit(ir
, TGSI_OPCODE_KIL
, undef_dst
, this->result
);
2981 /* unconditional kil */
2982 emit(ir
, TGSI_OPCODE_KILP
);
2987 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2990 glsl_to_tgsi_instruction
*if_inst
;
2992 ir
->condition
->accept(this);
2993 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2995 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
2997 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
2999 this->instructions
.push_tail(if_inst
);
3001 visit_exec_list(&ir
->then_instructions
, this);
3003 if (!ir
->else_instructions
.is_empty()) {
3004 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3005 visit_exec_list(&ir
->else_instructions
, this);
3008 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3011 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3013 result
.file
= PROGRAM_UNDEFINED
;
3016 next_signature_id
= 1;
3018 current_function
= NULL
;
3019 num_address_regs
= 0;
3021 indirect_addr_consts
= false;
3023 native_integers
= false;
3024 mem_ctx
= ralloc_context(NULL
);
3027 shader_program
= NULL
;
3031 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3033 ralloc_free(mem_ctx
);
3036 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3043 * Count resources used by the given gpu program (number of texture
3047 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3049 v
->samplers_used
= 0;
3051 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3052 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3054 if (is_tex_instruction(inst
->op
)) {
3055 v
->samplers_used
|= 1 << inst
->sampler
;
3057 if (inst
->tex_shadow
) {
3058 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3063 prog
->SamplersUsed
= v
->samplers_used
;
3065 if (v
->shader_program
!= NULL
)
3066 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3070 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3071 struct gl_shader_program
*shader_program
,
3072 const char *name
, const glsl_type
*type
,
3075 if (type
->is_record()) {
3076 ir_constant
*field_constant
;
3078 field_constant
= (ir_constant
*)val
->components
.get_head();
3080 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3081 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3082 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3083 type
->fields
.structure
[i
].name
);
3084 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3085 field_type
, field_constant
);
3086 field_constant
= (ir_constant
*)field_constant
->next
;
3092 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3094 if (offset
== GL_INVALID_INDEX
) {
3095 fail_link(shader_program
,
3096 "Couldn't find uniform for initializer %s\n", name
);
3099 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3101 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3102 ir_constant
*element
;
3103 const glsl_type
*element_type
;
3104 if (type
->is_array()) {
3105 element
= val
->array_elements
[i
];
3106 element_type
= type
->fields
.array
;
3109 element_type
= type
;
3114 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3115 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3116 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3117 conv
[j
] = element
->value
.b
[j
];
3119 values
= (void *)conv
;
3120 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3121 element_type
->vector_elements
,
3124 values
= &element
->value
;
3127 if (element_type
->is_matrix()) {
3128 _mesa_uniform_matrix(ctx
, shader_program
,
3129 element_type
->matrix_columns
,
3130 element_type
->vector_elements
,
3131 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3133 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3134 values
, element_type
->gl_type
);
3142 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3143 * are read from the given src in this instruction
3146 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3148 int read_mask
= 0, comp
;
3150 /* Now, given the src swizzle and the written channels, find which
3151 * components are actually read
3153 for (comp
= 0; comp
< 4; ++comp
) {
3154 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3156 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3157 read_mask
|= 1 << coord
;
3164 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3165 * instruction is the first instruction to write to register T0. There are
3166 * several lowering passes done in GLSL IR (e.g. branches and
3167 * relative addressing) that create a large number of conditional assignments
3168 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3170 * Here is why this conversion is safe:
3171 * CMP T0, T1 T2 T0 can be expanded to:
3177 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3178 * as the original program. If (T1 < 0.0) evaluates to false, executing
3179 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3180 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3181 * because any instruction that was going to read from T0 after this was going
3182 * to read a garbage value anyway.
3185 glsl_to_tgsi_visitor::simplify_cmp(void)
3187 unsigned *tempWrites
;
3188 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3190 tempWrites
= new unsigned[MAX_TEMPS
];
3194 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3195 memset(outputWrites
, 0, sizeof(outputWrites
));
3197 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3198 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3199 unsigned prevWriteMask
= 0;
3201 /* Give up if we encounter relative addressing or flow control. */
3202 if (inst
->dst
.reladdr
||
3203 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3204 inst
->op
== TGSI_OPCODE_BGNSUB
||
3205 inst
->op
== TGSI_OPCODE_CONT
||
3206 inst
->op
== TGSI_OPCODE_END
||
3207 inst
->op
== TGSI_OPCODE_ENDSUB
||
3208 inst
->op
== TGSI_OPCODE_RET
) {
3212 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3213 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3214 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3215 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3216 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3217 assert(inst
->dst
.index
< MAX_TEMPS
);
3218 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3219 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3223 /* For a CMP to be considered a conditional write, the destination
3224 * register and source register two must be the same. */
3225 if (inst
->op
== TGSI_OPCODE_CMP
3226 && !(inst
->dst
.writemask
& prevWriteMask
)
3227 && inst
->src
[2].file
== inst
->dst
.file
3228 && inst
->src
[2].index
== inst
->dst
.index
3229 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3231 inst
->op
= TGSI_OPCODE_MOV
;
3232 inst
->src
[0] = inst
->src
[1];
3236 delete [] tempWrites
;
3239 /* Replaces all references to a temporary register index with another index. */
3241 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3243 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3244 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3247 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3248 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3249 inst
->src
[j
].index
== index
) {
3250 inst
->src
[j
].index
= new_index
;
3254 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3255 inst
->dst
.index
= new_index
;
3261 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3263 int depth
= 0; /* loop depth */
3264 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3267 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3268 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3270 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3271 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3272 inst
->src
[j
].index
== index
) {
3273 return (depth
== 0) ? i
: loop_start
;
3277 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3280 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3293 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3295 int depth
= 0; /* loop depth */
3296 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3299 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3300 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3302 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3303 return (depth
== 0) ? i
: loop_start
;
3306 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3309 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3322 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3324 int depth
= 0; /* loop depth */
3325 int last
= -1; /* index of last instruction that reads the temporary */
3328 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3329 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3331 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3332 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3333 inst
->src
[j
].index
== index
) {
3334 last
= (depth
== 0) ? i
: -2;
3338 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3340 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3341 if (--depth
== 0 && last
== -2)
3353 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3355 int depth
= 0; /* loop depth */
3356 int last
= -1; /* index of last instruction that writes to the temporary */
3359 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3360 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3362 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3363 last
= (depth
== 0) ? i
: -2;
3365 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3367 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3368 if (--depth
== 0 && last
== -2)
3380 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3381 * channels for copy propagation and updates following instructions to
3382 * use the original versions.
3384 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3385 * will occur. As an example, a TXP production before this pass:
3387 * 0: MOV TEMP[1], INPUT[4].xyyy;
3388 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3389 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3393 * 0: MOV TEMP[1], INPUT[4].xyyy;
3394 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3395 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3397 * which allows for dead code elimination on TEMP[1]'s writes.
3400 glsl_to_tgsi_visitor::copy_propagate(void)
3402 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3403 glsl_to_tgsi_instruction
*,
3404 this->next_temp
* 4);
3405 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3408 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3409 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3411 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3412 || inst
->dst
.index
< this->next_temp
);
3414 /* First, do any copy propagation possible into the src regs. */
3415 for (int r
= 0; r
< 3; r
++) {
3416 glsl_to_tgsi_instruction
*first
= NULL
;
3418 int acp_base
= inst
->src
[r
].index
* 4;
3420 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3421 inst
->src
[r
].reladdr
)
3424 /* See if we can find entries in the ACP consisting of MOVs
3425 * from the same src register for all the swizzled channels
3426 * of this src register reference.
3428 for (int i
= 0; i
< 4; i
++) {
3429 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3430 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3437 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3442 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3443 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3451 /* We've now validated that we can copy-propagate to
3452 * replace this src register reference. Do it.
3454 inst
->src
[r
].file
= first
->src
[0].file
;
3455 inst
->src
[r
].index
= first
->src
[0].index
;
3458 for (int i
= 0; i
< 4; i
++) {
3459 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3460 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3461 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3464 inst
->src
[r
].swizzle
= swizzle
;
3469 case TGSI_OPCODE_BGNLOOP
:
3470 case TGSI_OPCODE_ENDLOOP
:
3471 /* End of a basic block, clear the ACP entirely. */
3472 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3475 case TGSI_OPCODE_IF
:
3476 case TGSI_OPCODE_UIF
:
3480 case TGSI_OPCODE_ENDIF
:
3481 case TGSI_OPCODE_ELSE
:
3482 /* Clear all channels written inside the block from the ACP, but
3483 * leaving those that were not touched.
3485 for (int r
= 0; r
< this->next_temp
; r
++) {
3486 for (int c
= 0; c
< 4; c
++) {
3487 if (!acp
[4 * r
+ c
])
3490 if (acp_level
[4 * r
+ c
] >= level
)
3491 acp
[4 * r
+ c
] = NULL
;
3494 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3499 /* Continuing the block, clear any written channels from
3502 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3503 /* Any temporary might be written, so no copy propagation
3504 * across this instruction.
3506 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3507 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3508 inst
->dst
.reladdr
) {
3509 /* Any output might be written, so no copy propagation
3510 * from outputs across this instruction.
3512 for (int r
= 0; r
< this->next_temp
; r
++) {
3513 for (int c
= 0; c
< 4; c
++) {
3514 if (!acp
[4 * r
+ c
])
3517 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3518 acp
[4 * r
+ c
] = NULL
;
3521 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3522 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3523 /* Clear where it's used as dst. */
3524 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3525 for (int c
= 0; c
< 4; c
++) {
3526 if (inst
->dst
.writemask
& (1 << c
)) {
3527 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3532 /* Clear where it's used as src. */
3533 for (int r
= 0; r
< this->next_temp
; r
++) {
3534 for (int c
= 0; c
< 4; c
++) {
3535 if (!acp
[4 * r
+ c
])
3538 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3540 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3541 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3542 inst
->dst
.writemask
& (1 << src_chan
))
3544 acp
[4 * r
+ c
] = NULL
;
3552 /* If this is a copy, add it to the ACP. */
3553 if (inst
->op
== TGSI_OPCODE_MOV
&&
3554 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3555 !(inst
->dst
.file
== inst
->src
[0].file
&&
3556 inst
->dst
.index
== inst
->src
[0].index
) &&
3557 !inst
->dst
.reladdr
&&
3559 !inst
->src
[0].reladdr
&&
3560 !inst
->src
[0].negate
) {
3561 for (int i
= 0; i
< 4; i
++) {
3562 if (inst
->dst
.writemask
& (1 << i
)) {
3563 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3564 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3570 ralloc_free(acp_level
);
3575 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3577 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3578 * will occur. As an example, a TXP production after copy propagation but
3581 * 0: MOV TEMP[1], INPUT[4].xyyy;
3582 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3583 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3585 * and after this pass:
3587 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3589 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3590 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3593 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3597 for (i
=0; i
< this->next_temp
; i
++) {
3598 int last_read
= get_last_temp_read(i
);
3601 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3602 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3604 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3617 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3618 * code elimination. This is less primitive than eliminate_dead_code(), as it
3619 * is per-channel and can detect consecutive writes without a read between them
3620 * as dead code. However, there is some dead code that can be eliminated by
3621 * eliminate_dead_code() but not this function - for example, this function
3622 * cannot eliminate an instruction writing to a register that is never read and
3623 * is the only instruction writing to that register.
3625 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3629 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3631 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3632 glsl_to_tgsi_instruction
*,
3633 this->next_temp
* 4);
3634 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3638 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3639 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3641 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3642 || inst
->dst
.index
< this->next_temp
);
3645 case TGSI_OPCODE_BGNLOOP
:
3646 case TGSI_OPCODE_ENDLOOP
:
3647 case TGSI_OPCODE_CONT
:
3648 case TGSI_OPCODE_BRK
:
3649 /* End of a basic block, clear the write array entirely.
3651 * This keeps us from killing dead code when the writes are
3652 * on either side of a loop, even when the register isn't touched
3653 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3654 * dead code of this type, so it shouldn't make a difference as long as
3655 * the dead code elimination pass in the GLSL compiler does its job.
3657 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3660 case TGSI_OPCODE_ENDIF
:
3661 case TGSI_OPCODE_ELSE
:
3662 /* Promote the recorded level of all channels written inside the
3663 * preceding if or else block to the level above the if/else block.
3665 for (int r
= 0; r
< this->next_temp
; r
++) {
3666 for (int c
= 0; c
< 4; c
++) {
3667 if (!writes
[4 * r
+ c
])
3670 if (write_level
[4 * r
+ c
] == level
)
3671 write_level
[4 * r
+ c
] = level
-1;
3675 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3680 case TGSI_OPCODE_IF
:
3681 case TGSI_OPCODE_UIF
:
3683 /* fallthrough to default case to mark the condition as read */
3686 /* Continuing the block, clear any channels from the write array that
3687 * are read by this instruction.
3689 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3690 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3691 /* Any temporary might be read, so no dead code elimination
3692 * across this instruction.
3694 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3695 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3696 /* Clear where it's used as src. */
3697 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3698 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3699 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3700 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3702 for (int c
= 0; c
< 4; c
++) {
3703 if (src_chans
& (1 << c
)) {
3704 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3712 /* If this instruction writes to a temporary, add it to the write array.
3713 * If there is already an instruction in the write array for one or more
3714 * of the channels, flag that channel write as dead.
3716 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3717 !inst
->dst
.reladdr
&&
3719 for (int c
= 0; c
< 4; c
++) {
3720 if (inst
->dst
.writemask
& (1 << c
)) {
3721 if (writes
[4 * inst
->dst
.index
+ c
]) {
3722 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3725 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3727 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3728 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3734 /* Anything still in the write array at this point is dead code. */
3735 for (int r
= 0; r
< this->next_temp
; r
++) {
3736 for (int c
= 0; c
< 4; c
++) {
3737 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3739 inst
->dead_mask
|= (1 << c
);
3743 /* Now actually remove the instructions that are completely dead and update
3744 * the writemask of other instructions with dead channels.
3746 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3747 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3749 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3751 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3756 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3759 ralloc_free(write_level
);
3760 ralloc_free(writes
);
3765 /* Merges temporary registers together where possible to reduce the number of
3766 * registers needed to run a program.
3768 * Produces optimal code only after copy propagation and dead code elimination
3771 glsl_to_tgsi_visitor::merge_registers(void)
3773 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3774 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3777 /* Read the indices of the last read and first write to each temp register
3778 * into an array so that we don't have to traverse the instruction list as
3780 for (i
=0; i
< this->next_temp
; i
++) {
3781 last_reads
[i
] = get_last_temp_read(i
);
3782 first_writes
[i
] = get_first_temp_write(i
);
3785 /* Start looking for registers with non-overlapping usages that can be
3786 * merged together. */
3787 for (i
=0; i
< this->next_temp
; i
++) {
3788 /* Don't touch unused registers. */
3789 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3791 for (j
=0; j
< this->next_temp
; j
++) {
3792 /* Don't touch unused registers. */
3793 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3795 /* We can merge the two registers if the first write to j is after or
3796 * in the same instruction as the last read from i. Note that the
3797 * register at index i will always be used earlier or at the same time
3798 * as the register at index j. */
3799 if (first_writes
[i
] <= first_writes
[j
] &&
3800 last_reads
[i
] <= first_writes
[j
])
3802 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3804 /* Update the first_writes and last_reads arrays with the new
3805 * values for the merged register index, and mark the newly unused
3806 * register index as such. */
3807 last_reads
[i
] = last_reads
[j
];
3808 first_writes
[j
] = -1;
3814 ralloc_free(last_reads
);
3815 ralloc_free(first_writes
);
3818 /* Reassign indices to temporary registers by reusing unused indices created
3819 * by optimization passes. */
3821 glsl_to_tgsi_visitor::renumber_registers(void)
3826 for (i
=0; i
< this->next_temp
; i
++) {
3827 if (get_first_temp_read(i
) < 0) continue;
3829 rename_temp_register(i
, new_index
);
3833 this->next_temp
= new_index
;
3837 * Returns a fragment program which implements the current pixel transfer ops.
3838 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3841 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3842 glsl_to_tgsi_visitor
*original
,
3843 int scale_and_bias
, int pixel_maps
)
3845 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3846 struct st_context
*st
= st_context(original
->ctx
);
3847 struct gl_program
*prog
= &fp
->Base
.Base
;
3848 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3849 st_src_reg coord
, src0
;
3851 glsl_to_tgsi_instruction
*inst
;
3853 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3854 v
->ctx
= original
->ctx
;
3856 v
->shader_program
= NULL
;
3857 v
->glsl_version
= original
->glsl_version
;
3858 v
->native_integers
= original
->native_integers
;
3859 v
->options
= original
->options
;
3860 v
->next_temp
= original
->next_temp
;
3861 v
->num_address_regs
= original
->num_address_regs
;
3862 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3863 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3864 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3865 v
->num_immediates
= original
->num_immediates
;
3868 * Get initial pixel color from the texture.
3869 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3871 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3872 src0
= v
->get_temp(glsl_type::vec4_type
);
3873 dst0
= st_dst_reg(src0
);
3874 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3876 inst
->tex_target
= TEXTURE_2D_INDEX
;
3878 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3879 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3880 v
->samplers_used
|= (1 << 0);
3882 if (scale_and_bias
) {
3883 static const gl_state_index scale_state
[STATE_LENGTH
] =
3884 { STATE_INTERNAL
, STATE_PT_SCALE
,
3885 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3886 static const gl_state_index bias_state
[STATE_LENGTH
] =
3887 { STATE_INTERNAL
, STATE_PT_BIAS
,
3888 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3889 GLint scale_p
, bias_p
;
3890 st_src_reg scale
, bias
;
3892 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3893 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3895 /* MAD colorTemp, colorTemp, scale, bias; */
3896 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3897 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3898 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3902 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3903 st_dst_reg temp_dst
= st_dst_reg(temp
);
3905 assert(st
->pixel_xfer
.pixelmap_texture
);
3907 /* With a little effort, we can do four pixel map look-ups with
3908 * two TEX instructions:
3911 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3912 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3913 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3915 inst
->tex_target
= TEXTURE_2D_INDEX
;
3917 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3918 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3919 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3920 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3922 inst
->tex_target
= TEXTURE_2D_INDEX
;
3924 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3925 v
->samplers_used
|= (1 << 1);
3927 /* MOV colorTemp, temp; */
3928 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3931 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3933 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3934 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3935 glsl_to_tgsi_instruction
*newinst
;
3936 st_src_reg src_regs
[3];
3938 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3939 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3941 for (int i
=0; i
<3; i
++) {
3942 src_regs
[i
] = inst
->src
[i
];
3943 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3944 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3946 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3947 src_regs
[i
].index
= src0
.index
;
3949 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3950 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3953 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3954 newinst
->tex_target
= inst
->tex_target
;
3957 /* Make modifications to fragment program info. */
3958 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3959 original
->prog
->Parameters
);
3960 _mesa_free_parameter_list(params
);
3961 count_resources(v
, prog
);
3962 fp
->glsl_to_tgsi
= v
;
3966 * Make fragment program for glBitmap:
3967 * Sample the texture and kill the fragment if the bit is 0.
3968 * This program will be combined with the user's fragment program.
3970 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3973 get_bitmap_visitor(struct st_fragment_program
*fp
,
3974 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3976 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3977 struct st_context
*st
= st_context(original
->ctx
);
3978 struct gl_program
*prog
= &fp
->Base
.Base
;
3979 st_src_reg coord
, src0
;
3981 glsl_to_tgsi_instruction
*inst
;
3983 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3984 v
->ctx
= original
->ctx
;
3986 v
->shader_program
= NULL
;
3987 v
->glsl_version
= original
->glsl_version
;
3988 v
->native_integers
= original
->native_integers
;
3989 v
->options
= original
->options
;
3990 v
->next_temp
= original
->next_temp
;
3991 v
->num_address_regs
= original
->num_address_regs
;
3992 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3993 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3994 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3995 v
->num_immediates
= original
->num_immediates
;
3997 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3998 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3999 src0
= v
->get_temp(glsl_type::vec4_type
);
4000 dst0
= st_dst_reg(src0
);
4001 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4002 inst
->sampler
= samplerIndex
;
4003 inst
->tex_target
= TEXTURE_2D_INDEX
;
4005 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4006 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4007 v
->samplers_used
|= (1 << samplerIndex
);
4009 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4010 src0
.negate
= NEGATE_XYZW
;
4011 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4012 src0
.swizzle
= SWIZZLE_XXXX
;
4013 inst
= v
->emit(NULL
, TGSI_OPCODE_KIL
, undef_dst
, src0
);
4015 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4017 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4018 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4019 glsl_to_tgsi_instruction
*newinst
;
4020 st_src_reg src_regs
[3];
4022 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4023 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4025 for (int i
=0; i
<3; i
++) {
4026 src_regs
[i
] = inst
->src
[i
];
4027 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4028 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4031 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4032 newinst
->tex_target
= inst
->tex_target
;
4035 /* Make modifications to fragment program info. */
4036 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4037 count_resources(v
, prog
);
4038 fp
->glsl_to_tgsi
= v
;
4041 /* ------------------------- TGSI conversion stuff -------------------------- */
4043 unsigned branch_target
;
4048 * Intermediate state used during shader translation.
4050 struct st_translate
{
4051 struct ureg_program
*ureg
;
4053 struct ureg_dst temps
[MAX_TEMPS
];
4054 struct ureg_dst arrays
[MAX_ARRAYS
];
4055 struct ureg_src
*constants
;
4056 struct ureg_src
*immediates
;
4057 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4058 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4059 struct ureg_dst address
[1];
4060 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4061 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4063 unsigned array_sizes
[MAX_ARRAYS
];
4065 const GLuint
*inputMapping
;
4066 const GLuint
*outputMapping
;
4068 /* For every instruction that contains a label (eg CALL), keep
4069 * details so that we can go back afterwards and emit the correct
4070 * tgsi instruction number for each label.
4072 struct label
*labels
;
4073 unsigned labels_size
;
4074 unsigned labels_count
;
4076 /* Keep a record of the tgsi instruction number that each mesa
4077 * instruction starts at, will be used to fix up labels after
4082 unsigned insn_count
;
4084 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4089 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4090 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4092 TGSI_SEMANTIC_VERTEXID
,
4093 TGSI_SEMANTIC_INSTANCEID
4097 * Make note of a branch to a label in the TGSI code.
4098 * After we've emitted all instructions, we'll go over the list
4099 * of labels built here and patch the TGSI code with the actual
4100 * location of each label.
4102 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4106 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4107 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4108 t
->labels
= (struct label
*)realloc(t
->labels
,
4109 t
->labels_size
* sizeof(struct label
));
4110 if (t
->labels
== NULL
) {
4111 static unsigned dummy
;
4117 i
= t
->labels_count
++;
4118 t
->labels
[i
].branch_target
= branch_target
;
4119 return &t
->labels
[i
].token
;
4123 * Called prior to emitting the TGSI code for each instruction.
4124 * Allocate additional space for instructions if needed.
4125 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4126 * the next TGSI instruction.
4128 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4130 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4131 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4132 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4133 if (t
->insn
== NULL
) {
4139 t
->insn
[t
->insn_count
++] = start
;
4143 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4145 static struct ureg_src
4146 emit_immediate(struct st_translate
*t
,
4147 gl_constant_value values
[4],
4150 struct ureg_program
*ureg
= t
->ureg
;
4155 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4157 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4158 case GL_UNSIGNED_INT
:
4160 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4162 assert(!"should not get here - type must be float, int, uint, or bool");
4163 return ureg_src_undef();
4168 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4170 static struct ureg_dst
4171 dst_register(struct st_translate
*t
,
4172 gl_register_file file
,
4178 case PROGRAM_UNDEFINED
:
4179 return ureg_dst_undef();
4181 case PROGRAM_TEMPORARY
:
4183 assert(index
< (int) Elements(t
->temps
));
4185 if (ureg_dst_is_undef(t
->temps
[index
]))
4186 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4188 return t
->temps
[index
];
4191 array
= index
>> 16;
4194 assert(array
< (int) Elements(t
->arrays
));
4196 if (ureg_dst_is_undef(t
->arrays
[array
]))
4197 t
->arrays
[array
] = ureg_DECL_array_temporary(
4198 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4200 return ureg_dst_array_offset(t
->arrays
[array
],
4201 (int)(index
& 0xFFFF) - 0x8000);
4203 case PROGRAM_OUTPUT
:
4204 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4205 assert(index
< VARYING_SLOT_MAX
);
4206 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4207 assert(index
< FRAG_RESULT_MAX
);
4209 assert(index
< VARYING_SLOT_MAX
);
4211 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4213 return t
->outputs
[t
->outputMapping
[index
]];
4215 case PROGRAM_ADDRESS
:
4216 return t
->address
[index
];
4219 assert(!"unknown dst register file");
4220 return ureg_dst_undef();
4225 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4227 static struct ureg_src
4228 src_register(struct st_translate
*t
,
4229 gl_register_file file
,
4230 GLint index
, GLint index2D
)
4233 case PROGRAM_UNDEFINED
:
4234 return ureg_src_undef();
4236 case PROGRAM_TEMPORARY
:
4238 return ureg_src(dst_register(t
, file
, index
));
4240 case PROGRAM_ENV_PARAM
:
4241 case PROGRAM_LOCAL_PARAM
:
4242 case PROGRAM_UNIFORM
:
4244 return t
->constants
[index
];
4245 case PROGRAM_STATE_VAR
:
4246 case PROGRAM_CONSTANT
: /* ie, immediate */
4248 struct ureg_src src
;
4249 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4251 src
.DimensionIndex
= index2D
;
4253 } else if (index
< 0)
4254 return ureg_DECL_constant(t
->ureg
, 0);
4256 return t
->constants
[index
];
4258 case PROGRAM_IMMEDIATE
:
4259 return t
->immediates
[index
];
4262 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4263 return t
->inputs
[t
->inputMapping
[index
]];
4265 case PROGRAM_OUTPUT
:
4266 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4267 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4269 case PROGRAM_ADDRESS
:
4270 return ureg_src(t
->address
[index
]);
4272 case PROGRAM_SYSTEM_VALUE
:
4273 assert(index
< (int) Elements(t
->systemValues
));
4274 return t
->systemValues
[index
];
4277 assert(!"unknown src register file");
4278 return ureg_src_undef();
4283 * Create a TGSI ureg_dst register from an st_dst_reg.
4285 static struct ureg_dst
4286 translate_dst(struct st_translate
*t
,
4287 const st_dst_reg
*dst_reg
,
4288 bool saturate
, bool clamp_color
)
4290 struct ureg_dst dst
= dst_register(t
,
4294 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4297 dst
= ureg_saturate(dst
);
4298 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4299 /* Clamp colors for ARB_color_buffer_float. */
4300 switch (t
->procType
) {
4301 case TGSI_PROCESSOR_VERTEX
:
4302 /* XXX if the geometry shader is present, this must be done there
4303 * instead of here. */
4304 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4305 dst_reg
->index
== VARYING_SLOT_COL1
||
4306 dst_reg
->index
== VARYING_SLOT_BFC0
||
4307 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4308 dst
= ureg_saturate(dst
);
4312 case TGSI_PROCESSOR_FRAGMENT
:
4313 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4314 dst
= ureg_saturate(dst
);
4320 if (dst_reg
->reladdr
!= NULL
) {
4321 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4322 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4329 * Create a TGSI ureg_src register from an st_src_reg.
4331 static struct ureg_src
4332 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4334 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4336 src
= ureg_swizzle(src
,
4337 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4338 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4339 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4340 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4342 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4343 src
= ureg_negate(src
);
4345 if (src_reg
->reladdr
!= NULL
) {
4346 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4347 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4353 static struct tgsi_texture_offset
4354 translate_tex_offset(struct st_translate
*t
,
4355 const struct tgsi_texture_offset
*in_offset
)
4357 struct tgsi_texture_offset offset
;
4358 struct ureg_src imm_src
;
4360 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4361 imm_src
= t
->immediates
[in_offset
->Index
];
4363 offset
.File
= imm_src
.File
;
4364 offset
.Index
= imm_src
.Index
;
4365 offset
.SwizzleX
= imm_src
.SwizzleX
;
4366 offset
.SwizzleY
= imm_src
.SwizzleY
;
4367 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4368 offset
.File
= TGSI_FILE_IMMEDIATE
;
4375 compile_tgsi_instruction(struct st_translate
*t
,
4376 const glsl_to_tgsi_instruction
*inst
,
4377 bool clamp_dst_color_output
)
4379 struct ureg_program
*ureg
= t
->ureg
;
4381 struct ureg_dst dst
[1];
4382 struct ureg_src src
[4];
4383 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4387 unsigned tex_target
;
4389 num_dst
= num_inst_dst_regs(inst
->op
);
4390 num_src
= num_inst_src_regs(inst
->op
);
4393 dst
[0] = translate_dst(t
,
4396 clamp_dst_color_output
);
4398 for (i
= 0; i
< num_src
; i
++)
4399 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4402 case TGSI_OPCODE_BGNLOOP
:
4403 case TGSI_OPCODE_CAL
:
4404 case TGSI_OPCODE_ELSE
:
4405 case TGSI_OPCODE_ENDLOOP
:
4406 case TGSI_OPCODE_IF
:
4407 case TGSI_OPCODE_UIF
:
4408 assert(num_dst
== 0);
4409 ureg_label_insn(ureg
,
4413 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4416 case TGSI_OPCODE_TEX
:
4417 case TGSI_OPCODE_TXB
:
4418 case TGSI_OPCODE_TXD
:
4419 case TGSI_OPCODE_TXL
:
4420 case TGSI_OPCODE_TXP
:
4421 case TGSI_OPCODE_TXQ
:
4422 case TGSI_OPCODE_TXF
:
4423 case TGSI_OPCODE_TEX2
:
4424 case TGSI_OPCODE_TXB2
:
4425 case TGSI_OPCODE_TXL2
:
4426 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4427 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4428 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4430 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4436 texoffsets
, inst
->tex_offset_num_offset
,
4440 case TGSI_OPCODE_SCS
:
4441 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4442 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4455 * Emit the TGSI instructions for inverting and adjusting WPOS.
4456 * This code is unavoidable because it also depends on whether
4457 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4460 emit_wpos_adjustment( struct st_translate
*t
,
4461 const struct gl_program
*program
,
4463 GLfloat adjX
, GLfloat adjY
[2])
4465 struct ureg_program
*ureg
= t
->ureg
;
4467 /* Fragment program uses fragment position input.
4468 * Need to replace instances of INPUT[WPOS] with temp T
4469 * where T = INPUT[WPOS] by y is inverted.
4471 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4472 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4473 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4475 /* XXX: note we are modifying the incoming shader here! Need to
4476 * do this before emitting the constant decls below, or this
4479 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4480 wposTransformState
);
4482 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4483 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4484 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4486 /* First, apply the coordinate shift: */
4487 if (adjX
|| adjY
[0] || adjY
[1]) {
4488 if (adjY
[0] != adjY
[1]) {
4489 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4490 * depending on whether inversion is actually going to be applied
4491 * or not, which is determined by testing against the inversion
4492 * state variable used below, which will be either +1 or -1.
4494 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4496 ureg_CMP(ureg
, adj_temp
,
4497 ureg_scalar(wpostrans
, invert
? 2 : 0),
4498 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4499 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4500 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4502 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4503 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4505 wpos_input
= ureg_src(wpos_temp
);
4507 /* MOV wpos_temp, input[wpos]
4509 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4512 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4513 * inversion/identity, or the other way around if we're drawing to an FBO.
4516 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4519 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4521 ureg_scalar(wpostrans
, 0),
4522 ureg_scalar(wpostrans
, 1));
4524 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4527 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4529 ureg_scalar(wpostrans
, 2),
4530 ureg_scalar(wpostrans
, 3));
4533 /* Use wpos_temp as position input from here on:
4535 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4540 * Emit fragment position/ooordinate code.
4543 emit_wpos(struct st_context
*st
,
4544 struct st_translate
*t
,
4545 const struct gl_program
*program
,
4546 struct ureg_program
*ureg
)
4548 const struct gl_fragment_program
*fp
=
4549 (const struct gl_fragment_program
*) program
;
4550 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4551 GLfloat adjX
= 0.0f
;
4552 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4553 boolean invert
= FALSE
;
4555 /* Query the pixel center conventions supported by the pipe driver and set
4556 * adjX, adjY to help out if it cannot handle the requested one internally.
4558 * The bias of the y-coordinate depends on whether y-inversion takes place
4559 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4560 * drawing to an FBO (causes additional inversion), and whether the the pipe
4561 * driver origin and the requested origin differ (the latter condition is
4562 * stored in the 'invert' variable).
4564 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4566 * center shift only:
4571 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4572 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4573 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4574 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4576 * inversion and center shift:
4577 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4578 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4579 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4580 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4582 if (fp
->OriginUpperLeft
) {
4583 /* Fragment shader wants origin in upper-left */
4584 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4585 /* the driver supports upper-left origin */
4587 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4588 /* the driver supports lower-left origin, need to invert Y */
4589 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4596 /* Fragment shader wants origin in lower-left */
4597 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4598 /* the driver supports lower-left origin */
4599 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4600 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4601 /* the driver supports upper-left origin, need to invert Y */
4607 if (fp
->PixelCenterInteger
) {
4608 /* Fragment shader wants pixel center integer */
4609 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4610 /* the driver supports pixel center integer */
4612 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4614 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4615 /* the driver supports pixel center half integer, need to bias X,Y */
4624 /* Fragment shader wants pixel center half integer */
4625 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4626 /* the driver supports pixel center half integer */
4628 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4629 /* the driver supports pixel center integer, need to bias X,Y */
4630 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4631 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4637 /* we invert after adjustment so that we avoid the MOV to temporary,
4638 * and reuse the adjustment ADD instead */
4639 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4643 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4644 * TGSI uses +1 for front, -1 for back.
4645 * This function converts the TGSI value to the GL value. Simply clamping/
4646 * saturating the value to [0,1] does the job.
4649 emit_face_var(struct st_translate
*t
)
4651 struct ureg_program
*ureg
= t
->ureg
;
4652 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4653 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4655 /* MOV_SAT face_temp, input[face] */
4656 face_temp
= ureg_saturate(face_temp
);
4657 ureg_MOV(ureg
, face_temp
, face_input
);
4659 /* Use face_temp as face input from here on: */
4660 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4664 emit_edgeflags(struct st_translate
*t
)
4666 struct ureg_program
*ureg
= t
->ureg
;
4667 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4668 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4670 ureg_MOV(ureg
, edge_dst
, edge_src
);
4674 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4675 * \param program the program to translate
4676 * \param numInputs number of input registers used
4677 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4679 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4680 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4682 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4683 * \param numOutputs number of output registers used
4684 * \param outputMapping maps Mesa fragment program outputs to TGSI
4686 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4687 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4690 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4692 extern "C" enum pipe_error
4693 st_translate_program(
4694 struct gl_context
*ctx
,
4696 struct ureg_program
*ureg
,
4697 glsl_to_tgsi_visitor
*program
,
4698 const struct gl_program
*proginfo
,
4700 const GLuint inputMapping
[],
4701 const ubyte inputSemanticName
[],
4702 const ubyte inputSemanticIndex
[],
4703 const GLuint interpMode
[],
4704 const GLboolean is_centroid
[],
4706 const GLuint outputMapping
[],
4707 const ubyte outputSemanticName
[],
4708 const ubyte outputSemanticIndex
[],
4709 boolean passthrough_edgeflags
,
4710 boolean clamp_color
)
4712 struct st_translate
*t
;
4714 enum pipe_error ret
= PIPE_OK
;
4716 assert(numInputs
<= Elements(t
->inputs
));
4717 assert(numOutputs
<= Elements(t
->outputs
));
4719 t
= CALLOC_STRUCT(st_translate
);
4721 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4725 memset(t
, 0, sizeof *t
);
4727 t
->procType
= procType
;
4728 t
->inputMapping
= inputMapping
;
4729 t
->outputMapping
= outputMapping
;
4732 if (program
->shader_program
) {
4733 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4734 struct gl_uniform_storage
*const storage
=
4735 &program
->shader_program
->UniformStorage
[i
];
4737 _mesa_uniform_detach_all_driver_storage(storage
);
4742 * Declare input attributes.
4744 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4745 for (i
= 0; i
< numInputs
; i
++) {
4746 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4747 inputSemanticName
[i
],
4748 inputSemanticIndex
[i
],
4753 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4754 /* Must do this after setting up t->inputs, and before
4755 * emitting constant references, below:
4757 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4760 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4764 * Declare output attributes.
4766 for (i
= 0; i
< numOutputs
; i
++) {
4767 switch (outputSemanticName
[i
]) {
4768 case TGSI_SEMANTIC_POSITION
:
4769 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4770 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4771 outputSemanticIndex
[i
]);
4772 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4774 case TGSI_SEMANTIC_STENCIL
:
4775 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4776 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4777 outputSemanticIndex
[i
]);
4778 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4780 case TGSI_SEMANTIC_COLOR
:
4781 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4782 TGSI_SEMANTIC_COLOR
,
4783 outputSemanticIndex
[i
]);
4786 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4787 ret
= PIPE_ERROR_BAD_INPUT
;
4792 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4793 for (i
= 0; i
< numInputs
; i
++) {
4794 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4796 inputSemanticName
[i
],
4797 inputSemanticIndex
[i
]);
4800 for (i
= 0; i
< numOutputs
; i
++) {
4801 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4802 outputSemanticName
[i
],
4803 outputSemanticIndex
[i
]);
4807 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4809 for (i
= 0; i
< numInputs
; i
++) {
4810 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4813 for (i
= 0; i
< numOutputs
; i
++) {
4814 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4815 outputSemanticName
[i
],
4816 outputSemanticIndex
[i
]);
4818 if (passthrough_edgeflags
)
4822 /* Declare address register.
4824 if (program
->num_address_regs
> 0) {
4825 assert(program
->num_address_regs
== 1);
4826 t
->address
[0] = ureg_DECL_address(ureg
);
4829 /* Declare misc input registers
4832 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4833 unsigned numSys
= 0;
4834 for (i
= 0; sysInputs
; i
++) {
4835 if (sysInputs
& (1 << i
)) {
4836 unsigned semName
= mesa_sysval_to_semantic
[i
];
4837 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4838 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4839 semName
== TGSI_SEMANTIC_VERTEXID
) {
4840 /* From Gallium perspective, these system values are always
4841 * integer, and require native integer support. However, if
4842 * native integer is supported on the vertex stage but not the
4843 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4844 * assumes these system values are floats. To resolve the
4845 * inconsistency, we insert a U2F.
4847 struct st_context
*st
= st_context(ctx
);
4848 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4849 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4850 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4851 if (!ctx
->Const
.NativeIntegers
) {
4852 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4853 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4854 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4858 sysInputs
&= ~(1 << i
);
4863 /* Copy over array sizes
4865 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4867 /* Emit constants and uniforms. TGSI uses a single index space for these,
4868 * so we put all the translated regs in t->constants.
4870 if (proginfo
->Parameters
) {
4871 t
->constants
= (struct ureg_src
*)
4872 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4873 if (t
->constants
== NULL
) {
4874 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4878 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4879 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4880 case PROGRAM_ENV_PARAM
:
4881 case PROGRAM_LOCAL_PARAM
:
4882 case PROGRAM_STATE_VAR
:
4883 case PROGRAM_UNIFORM
:
4884 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4887 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4888 * addressing of the const buffer.
4889 * FIXME: Be smarter and recognize param arrays:
4890 * indirect addressing is only valid within the referenced
4893 case PROGRAM_CONSTANT
:
4894 if (program
->indirect_addr_consts
)
4895 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4897 t
->constants
[i
] = emit_immediate(t
,
4898 proginfo
->Parameters
->ParameterValues
[i
],
4899 proginfo
->Parameters
->Parameters
[i
].DataType
,
4908 if (program
->shader_program
) {
4909 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4911 for (i
= 0; i
< num_ubos
; i
++) {
4912 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4916 /* Emit immediate values.
4918 t
->immediates
= (struct ureg_src
*)
4919 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4920 if (t
->immediates
== NULL
) {
4921 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4925 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4926 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4927 assert(i
< program
->num_immediates
);
4928 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4930 assert(i
== program
->num_immediates
);
4932 /* texture samplers */
4933 for (i
= 0; i
< ctx
->Const
.FragmentProgram
.MaxTextureImageUnits
; i
++) {
4934 if (program
->samplers_used
& (1 << i
)) {
4935 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4939 /* Emit each instruction in turn:
4941 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4942 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4943 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4947 /* Fix up all emitted labels:
4949 for (i
= 0; i
< t
->labels_count
; i
++) {
4950 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4951 t
->insn
[t
->labels
[i
].branch_target
]);
4954 if (program
->shader_program
) {
4955 /* This has to be done last. Any operation the can cause
4956 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4957 * program constant) has to happen before creating this linkage.
4959 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4960 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4963 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4964 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4973 free(t
->immediates
);
4976 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
4984 /* ----------------------------- End TGSI code ------------------------------ */
4987 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4988 * generating Mesa IR.
4990 static struct gl_program
*
4991 get_mesa_program(struct gl_context
*ctx
,
4992 struct gl_shader_program
*shader_program
,
4993 struct gl_shader
*shader
)
4995 glsl_to_tgsi_visitor
* v
;
4996 struct gl_program
*prog
;
4999 struct gl_shader_compiler_options
*options
=
5000 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
5001 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5004 switch (shader
->Type
) {
5005 case GL_VERTEX_SHADER
:
5006 target
= GL_VERTEX_PROGRAM_ARB
;
5007 ptarget
= PIPE_SHADER_VERTEX
;
5009 case GL_FRAGMENT_SHADER
:
5010 target
= GL_FRAGMENT_PROGRAM_ARB
;
5011 ptarget
= PIPE_SHADER_FRAGMENT
;
5013 case GL_GEOMETRY_SHADER
:
5014 target
= GL_GEOMETRY_PROGRAM_NV
;
5015 ptarget
= PIPE_SHADER_GEOMETRY
;
5018 assert(!"should not be reached");
5022 validate_ir_tree(shader
->ir
);
5024 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5027 prog
->Parameters
= _mesa_new_parameter_list();
5028 v
= new glsl_to_tgsi_visitor();
5031 v
->shader_program
= shader_program
;
5032 v
->options
= options
;
5033 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5034 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5036 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5037 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5039 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5042 /* Remove reads from output registers. */
5043 lower_output_reads(shader
->ir
);
5045 /* Emit intermediate IR for main(). */
5046 visit_exec_list(shader
->ir
, v
);
5048 /* Now emit bodies for any functions that were used. */
5050 progress
= GL_FALSE
;
5052 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5053 function_entry
*entry
= (function_entry
*)iter
.get();
5055 if (!entry
->bgn_inst
) {
5056 v
->current_function
= entry
;
5058 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5059 entry
->bgn_inst
->function
= entry
;
5061 visit_exec_list(&entry
->sig
->body
, v
);
5063 glsl_to_tgsi_instruction
*last
;
5064 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5065 if (last
->op
!= TGSI_OPCODE_RET
)
5066 v
->emit(NULL
, TGSI_OPCODE_RET
);
5068 glsl_to_tgsi_instruction
*end
;
5069 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5070 end
->function
= entry
;
5078 /* Print out some information (for debugging purposes) used by the
5079 * optimization passes. */
5080 for (i
=0; i
< v
->next_temp
; i
++) {
5081 int fr
= v
->get_first_temp_read(i
);
5082 int fw
= v
->get_first_temp_write(i
);
5083 int lr
= v
->get_last_temp_read(i
);
5084 int lw
= v
->get_last_temp_write(i
);
5086 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5091 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5093 v
->copy_propagate();
5094 while (v
->eliminate_dead_code_advanced());
5096 v
->eliminate_dead_code();
5097 v
->merge_registers();
5098 v
->renumber_registers();
5100 /* Write the END instruction. */
5101 v
->emit(NULL
, TGSI_OPCODE_END
);
5103 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5105 printf("GLSL IR for linked %s program %d:\n",
5106 _mesa_glsl_shader_target_name(shader
->Type
),
5107 shader_program
->Name
);
5108 _mesa_print_ir(shader
->ir
, NULL
);
5114 prog
->Instructions
= NULL
;
5115 prog
->NumInstructions
= 0;
5117 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
5118 count_resources(v
, prog
);
5120 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5122 /* This has to be done last. Any operation the can cause
5123 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5124 * program constant) has to happen before creating this linkage.
5126 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5127 if (!shader_program
->LinkStatus
) {
5131 struct st_vertex_program
*stvp
;
5132 struct st_fragment_program
*stfp
;
5133 struct st_geometry_program
*stgp
;
5135 switch (shader
->Type
) {
5136 case GL_VERTEX_SHADER
:
5137 stvp
= (struct st_vertex_program
*)prog
;
5138 stvp
->glsl_to_tgsi
= v
;
5140 case GL_FRAGMENT_SHADER
:
5141 stfp
= (struct st_fragment_program
*)prog
;
5142 stfp
->glsl_to_tgsi
= v
;
5144 case GL_GEOMETRY_SHADER
:
5145 stgp
= (struct st_geometry_program
*)prog
;
5146 stgp
->glsl_to_tgsi
= v
;
5149 assert(!"should not be reached");
5159 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5161 struct gl_shader
*shader
;
5162 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5163 type
== GL_GEOMETRY_SHADER_ARB
);
5164 shader
= rzalloc(NULL
, struct gl_shader
);
5166 shader
->Type
= type
;
5167 shader
->Name
= name
;
5168 _mesa_init_shader(ctx
, shader
);
5173 struct gl_shader_program
*
5174 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5176 struct gl_shader_program
*shProg
;
5177 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5179 shProg
->Name
= name
;
5180 _mesa_init_shader_program(ctx
, shProg
);
5187 * Called via ctx->Driver.LinkShader()
5188 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5189 * with code lowering and other optimizations.
5192 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5194 assert(prog
->LinkStatus
);
5196 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5197 if (prog
->_LinkedShaders
[i
] == NULL
)
5201 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5202 const struct gl_shader_compiler_options
*options
=
5203 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5205 /* If there are forms of indirect addressing that the driver
5206 * cannot handle, perform the lowering pass.
5208 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5209 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5210 lower_variable_index_to_cond_assign(ir
,
5211 options
->EmitNoIndirectInput
,
5212 options
->EmitNoIndirectOutput
,
5213 options
->EmitNoIndirectTemp
,
5214 options
->EmitNoIndirectUniform
);
5217 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5218 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5219 LOWER_UNPACK_SNORM_2x16
|
5220 LOWER_PACK_UNORM_2x16
|
5221 LOWER_UNPACK_UNORM_2x16
|
5222 LOWER_PACK_SNORM_4x8
|
5223 LOWER_UNPACK_SNORM_4x8
|
5224 LOWER_UNPACK_UNORM_4x8
|
5225 LOWER_PACK_UNORM_4x8
|
5226 LOWER_PACK_HALF_2x16
|
5227 LOWER_UNPACK_HALF_2x16
;
5229 lower_packing_builtins(ir
, lower_inst
);
5232 do_mat_op_to_vec(ir
);
5233 lower_instructions(ir
,
5238 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5239 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5241 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5242 do_vec_index_to_cond_assign(ir
);
5243 lower_vector_insert(ir
, true);
5244 lower_quadop_vector(ir
, false);
5246 if (options
->MaxIfDepth
== 0) {
5253 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5255 progress
= do_common_optimization(ir
, true, true,
5256 options
->MaxUnrollIterations
, options
)
5259 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5263 validate_ir_tree(ir
);
5266 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5267 struct gl_program
*linked_prog
;
5269 if (prog
->_LinkedShaders
[i
] == NULL
)
5272 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5275 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5277 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5278 _mesa_program_index_to_target(i
),
5280 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5282 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5287 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5294 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5295 const GLuint outputMapping
[],
5296 struct pipe_stream_output_info
*so
)
5299 struct gl_transform_feedback_info
*info
=
5300 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5302 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5303 so
->output
[i
].register_index
=
5304 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5305 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5306 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5307 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5308 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5311 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5312 so
->stride
[i
] = info
->BufferStride
[i
];
5314 so
->num_outputs
= info
->NumOutputs
;