2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of temporary registers.
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
83 #define MAX_TEMPS 4096
86 * Maximum number of arrays
88 #define MAX_ARRAYS 256
90 #define MAX_GLSL_TEXTURE_OFFSET 4
95 static int swizzle_for_size(int size
);
98 * This struct is a corresponding struct to TGSI ureg_src.
102 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
106 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
107 this->swizzle
= swizzle_for_size(type
->vector_elements
);
109 this->swizzle
= SWIZZLE_XYZW
;
112 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
113 this->reladdr
= NULL
;
114 this->reladdr2
= NULL
;
115 this->has_index2
= false;
118 st_src_reg(gl_register_file file
, int index
, int type
)
124 this->swizzle
= SWIZZLE_XYZW
;
126 this->reladdr
= NULL
;
127 this->reladdr2
= NULL
;
128 this->has_index2
= false;
131 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
136 this->index2D
= index2D
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= NULL
;
140 this->reladdr2
= NULL
;
141 this->has_index2
= false;
146 this->type
= GLSL_TYPE_ERROR
;
147 this->file
= PROGRAM_UNDEFINED
;
152 this->reladdr
= NULL
;
153 this->reladdr2
= NULL
;
154 this->has_index2
= false;
157 explicit st_src_reg(st_dst_reg reg
);
159 gl_register_file file
; /**< PROGRAM_* from Mesa */
160 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate
; /**< NEGATE_XYZW mask from mesa */
164 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
167 st_src_reg
*reladdr2
;
173 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
177 this->writemask
= writemask
;
178 this->cond_mask
= COND_TR
;
179 this->reladdr
= NULL
;
183 st_dst_reg(gl_register_file file
, int writemask
, int type
)
187 this->writemask
= writemask
;
188 this->cond_mask
= COND_TR
;
189 this->reladdr
= NULL
;
195 this->type
= GLSL_TYPE_ERROR
;
196 this->file
= PROGRAM_UNDEFINED
;
199 this->cond_mask
= COND_TR
;
200 this->reladdr
= NULL
;
203 explicit st_dst_reg(st_src_reg reg
);
205 gl_register_file file
; /**< PROGRAM_* from Mesa */
206 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
209 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
214 st_src_reg::st_src_reg(st_dst_reg reg
)
216 this->type
= reg
.type
;
217 this->file
= reg
.file
;
218 this->index
= reg
.index
;
219 this->swizzle
= SWIZZLE_XYZW
;
221 this->reladdr
= reg
.reladdr
;
223 this->reladdr2
= NULL
;
224 this->has_index2
= false;
227 st_dst_reg::st_dst_reg(st_src_reg reg
)
229 this->type
= reg
.type
;
230 this->file
= reg
.file
;
231 this->index
= reg
.index
;
232 this->writemask
= WRITEMASK_XYZW
;
233 this->cond_mask
= COND_TR
;
234 this->reladdr
= reg
.reladdr
;
237 class glsl_to_tgsi_instruction
: public exec_node
{
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
244 /** Pointer to the ir source this tree came from for debugging */
246 GLboolean cond_update
;
248 int sampler
; /**< sampler index */
249 int tex_target
; /**< One of TEXTURE_*_INDEX */
250 GLboolean tex_shadow
;
252 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
253 unsigned tex_offset_num_offset
;
254 int dead_mask
; /**< Used in dead code elimination */
256 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
259 class variable_storage
: public exec_node
{
261 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
262 : file(file
), index(index
), var(var
)
267 gl_register_file file
;
269 ir_variable
*var
; /* variable that maps to this, if any */
272 class immediate_storage
: public exec_node
{
274 immediate_storage(gl_constant_value
*values
, int size
, int type
)
276 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
281 gl_constant_value values
[4];
282 int size
; /**< Number of components (1-4) */
283 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
286 class function_entry
: public exec_node
{
288 ir_function_signature
*sig
;
291 * identifier of this function signature used by the program.
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
301 * Pointer to first instruction of the function body.
303 * Set during function body emits after main() is processed.
305 glsl_to_tgsi_instruction
*bgn_inst
;
308 * Index of the first instruction of the function body in actual TGSI.
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
314 /** Storage for the return value. */
315 st_src_reg return_reg
;
318 struct glsl_to_tgsi_visitor
: public ir_visitor
{
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
323 function_entry
*current_function
;
325 struct gl_context
*ctx
;
326 struct gl_program
*prog
;
327 struct gl_shader_program
*shader_program
;
328 struct gl_shader_compiler_options
*options
;
332 unsigned array_sizes
[MAX_ARRAYS
];
335 int num_address_regs
;
337 bool indirect_addr_consts
;
340 bool native_integers
;
343 variable_storage
*find_variable_storage(ir_variable
*var
);
345 int add_constant(gl_register_file file
, gl_constant_value values
[4],
346 int size
, int datatype
, GLuint
*swizzle_out
);
348 function_entry
*get_function_signature(ir_function_signature
*sig
);
350 st_src_reg
get_temp(const glsl_type
*type
);
351 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
353 st_src_reg
st_src_reg_for_float(float val
);
354 st_src_reg
st_src_reg_for_int(int val
);
355 st_src_reg
st_src_reg_for_type(int type
, int val
);
358 * \name Visit methods
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
365 virtual void visit(ir_variable
*);
366 virtual void visit(ir_loop
*);
367 virtual void visit(ir_loop_jump
*);
368 virtual void visit(ir_function_signature
*);
369 virtual void visit(ir_function
*);
370 virtual void visit(ir_expression
*);
371 virtual void visit(ir_swizzle
*);
372 virtual void visit(ir_dereference_variable
*);
373 virtual void visit(ir_dereference_array
*);
374 virtual void visit(ir_dereference_record
*);
375 virtual void visit(ir_assignment
*);
376 virtual void visit(ir_constant
*);
377 virtual void visit(ir_call
*);
378 virtual void visit(ir_return
*);
379 virtual void visit(ir_discard
*);
380 virtual void visit(ir_texture
*);
381 virtual void visit(ir_if
*);
382 virtual void visit(ir_emit_vertex
*);
383 virtual void visit(ir_end_primitive
*);
388 /** List of variable_storage */
391 /** List of immediate_storage */
392 exec_list immediates
;
393 unsigned num_immediates
;
395 /** List of function_entry */
396 exec_list function_signatures
;
397 int next_signature_id
;
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions
;
402 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
404 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
405 st_dst_reg dst
, st_src_reg src0
);
407 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
408 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
410 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
412 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
414 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
416 st_src_reg src0
, st_src_reg src1
,
417 st_src_reg src2
, st_src_reg src3
);
419 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
421 st_src_reg src0
, st_src_reg src1
);
424 * Emit the correct dot-product instruction for the type of arguments
426 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
432 void emit_scalar(ir_instruction
*ir
, unsigned op
,
433 st_dst_reg dst
, st_src_reg src0
);
435 void emit_scalar(ir_instruction
*ir
, unsigned op
,
436 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
438 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
440 void emit_scs(ir_instruction
*ir
, unsigned op
,
441 st_dst_reg dst
, const st_src_reg
&src
);
443 bool try_emit_mad(ir_expression
*ir
,
445 bool try_emit_mad_for_and_not(ir_expression
*ir
,
447 bool try_emit_sat(ir_expression
*ir
);
449 void emit_swz(ir_expression
*ir
);
451 bool process_move_condition(ir_rvalue
*ir
);
453 void simplify_cmp(void);
455 void rename_temp_register(int index
, int new_index
);
456 int get_first_temp_read(int index
);
457 int get_first_temp_write(int index
);
458 int get_last_temp_read(int index
);
459 int get_last_temp_write(int index
);
461 void copy_propagate(void);
462 void eliminate_dead_code(void);
463 int eliminate_dead_code_advanced(void);
464 void merge_registers(void);
465 void renumber_registers(void);
467 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
468 st_dst_reg
*l
, st_src_reg
*r
);
473 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
475 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
477 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
478 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
481 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
484 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
488 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
491 prog
->LinkStatus
= GL_FALSE
;
495 swizzle_for_size(int size
)
497 int size_swizzles
[4] = {
498 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
499 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
500 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
501 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
504 assert((size
>= 1) && (size
<= 4));
505 return size_swizzles
[size
- 1];
509 is_tex_instruction(unsigned opcode
)
511 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
516 num_inst_dst_regs(unsigned opcode
)
518 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
519 return info
->num_dst
;
523 num_inst_src_regs(unsigned opcode
)
525 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
526 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
529 glsl_to_tgsi_instruction
*
530 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
532 st_src_reg src0
, st_src_reg src1
,
533 st_src_reg src2
, st_src_reg src3
)
535 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
536 int num_reladdr
= 0, i
;
538 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
540 /* If we have to do relative addressing, we want to load the ARL
541 * reg directly for one of the regs, and preload the other reladdr
542 * sources into temps.
544 num_reladdr
+= dst
.reladdr
!= NULL
;
545 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
546 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
547 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
548 num_reladdr
+= src3
.reladdr
!= NULL
|| src3
.reladdr2
!= NULL
;
550 reladdr_to_temp(ir
, &src3
, &num_reladdr
);
551 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
552 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
553 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
556 emit_arl(ir
, address_reg
, *dst
.reladdr
);
559 assert(num_reladdr
== 0);
570 inst
->function
= NULL
;
572 /* Update indirect addressing status used by TGSI */
575 case PROGRAM_STATE_VAR
:
576 case PROGRAM_CONSTANT
:
577 case PROGRAM_UNIFORM
:
578 this->indirect_addr_consts
= true;
580 case PROGRAM_IMMEDIATE
:
581 assert(!"immediates should not have indirect addressing");
588 for (i
=0; i
<4; i
++) {
589 if(inst
->src
[i
].reladdr
) {
590 switch(inst
->src
[i
].file
) {
591 case PROGRAM_STATE_VAR
:
592 case PROGRAM_CONSTANT
:
593 case PROGRAM_UNIFORM
:
594 this->indirect_addr_consts
= true;
596 case PROGRAM_IMMEDIATE
:
597 assert(!"immediates should not have indirect addressing");
606 this->instructions
.push_tail(inst
);
611 glsl_to_tgsi_instruction
*
612 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
613 st_dst_reg dst
, st_src_reg src0
,
614 st_src_reg src1
, st_src_reg src2
)
616 return emit(ir
, op
, dst
, src0
, src1
, src2
, undef_src
);
619 glsl_to_tgsi_instruction
*
620 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
621 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
623 return emit(ir
, op
, dst
, src0
, src1
, undef_src
, undef_src
);
626 glsl_to_tgsi_instruction
*
627 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
628 st_dst_reg dst
, st_src_reg src0
)
630 assert(dst
.writemask
!= 0);
631 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
, undef_src
);
634 glsl_to_tgsi_instruction
*
635 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
637 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
, undef_src
);
641 * Determines whether to use an integer, unsigned integer, or float opcode
642 * based on the operands and input opcode, then emits the result.
645 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
647 st_src_reg src0
, st_src_reg src1
)
649 int type
= GLSL_TYPE_FLOAT
;
651 if (op
== TGSI_OPCODE_MOV
)
654 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
655 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
656 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
657 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
659 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
660 type
= GLSL_TYPE_FLOAT
;
661 else if (native_integers
)
662 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) \
667 op = TGSI_OPCODE_##i; \
668 else if (type == GLSL_TYPE_UINT) \
669 op = TGSI_OPCODE_##u; \
671 op = TGSI_OPCODE_##f; \
674 #define case3(f, i, u) case4(f, f, i, u)
675 #define case2fi(f, i) case4(f, f, i, i)
676 #define case2iu(i, u) case4(i, LAST, i, u)
678 #define casecomp(c, f, i, u) \
679 case TGSI_OPCODE_##c: \
680 if (type == GLSL_TYPE_INT) \
681 op = TGSI_OPCODE_##i; \
682 else if (type == GLSL_TYPE_UINT) \
683 op = TGSI_OPCODE_##u; \
684 else if (native_integers) \
685 op = TGSI_OPCODE_##f; \
687 op = TGSI_OPCODE_##c; \
694 case3(DIV
, IDIV
, UDIV
);
695 case3(MAX
, IMAX
, UMAX
);
696 case3(MIN
, IMIN
, UMIN
);
699 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
700 casecomp(SNE
, FSNE
, USNE
, USNE
);
701 casecomp(SGE
, FSGE
, ISGE
, USGE
);
702 casecomp(SLT
, FSLT
, ISLT
, USLT
);
707 case3(ABS
, IABS
, IABS
);
711 case2iu(IMUL_HI
, UMUL_HI
);
715 assert(op
!= TGSI_OPCODE_LAST
);
719 glsl_to_tgsi_instruction
*
720 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
721 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
724 static const unsigned dot_opcodes
[] = {
725 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
728 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
732 * Emits TGSI scalar opcodes to produce unique answers across channels.
734 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
735 * channel determines the result across all channels. So to do a vec4
736 * of this operation, we want to emit a scalar per source channel used
737 * to produce dest channels.
740 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
742 st_src_reg orig_src0
, st_src_reg orig_src1
)
745 int done_mask
= ~dst
.writemask
;
747 /* TGSI RCP is a scalar operation splatting results to all channels,
748 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
751 for (i
= 0; i
< 4; i
++) {
752 GLuint this_mask
= (1 << i
);
753 glsl_to_tgsi_instruction
*inst
;
754 st_src_reg src0
= orig_src0
;
755 st_src_reg src1
= orig_src1
;
757 if (done_mask
& this_mask
)
760 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
761 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
762 for (j
= i
+ 1; j
< 4; j
++) {
763 /* If there is another enabled component in the destination that is
764 * derived from the same inputs, generate its value on this pass as
767 if (!(done_mask
& (1 << j
)) &&
768 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
769 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
770 this_mask
|= (1 << j
);
773 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
774 src0_swiz
, src0_swiz
);
775 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
776 src1_swiz
, src1_swiz
);
778 inst
= emit(ir
, op
, dst
, src0
, src1
);
779 inst
->dst
.writemask
= this_mask
;
780 done_mask
|= this_mask
;
785 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
786 st_dst_reg dst
, st_src_reg src0
)
788 st_src_reg undef
= undef_src
;
790 undef
.swizzle
= SWIZZLE_XXXX
;
792 emit_scalar(ir
, op
, dst
, src0
, undef
);
796 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
797 st_dst_reg dst
, st_src_reg src0
)
799 int op
= TGSI_OPCODE_ARL
;
801 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
802 op
= TGSI_OPCODE_UARL
;
804 assert(dst
.file
== PROGRAM_ADDRESS
);
805 if (dst
.index
>= this->num_address_regs
)
806 this->num_address_regs
= dst
.index
+ 1;
808 emit(NULL
, op
, dst
, src0
);
812 * Emit an TGSI_OPCODE_SCS instruction
814 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
815 * Instead of splatting its result across all four components of the
816 * destination, it writes one value to the \c x component and another value to
817 * the \c y component.
819 * \param ir IR instruction being processed
820 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
821 * on which value is desired.
822 * \param dst Destination register
823 * \param src Source register
826 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
828 const st_src_reg
&src
)
830 /* Vertex programs cannot use the SCS opcode.
832 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
833 emit_scalar(ir
, op
, dst
, src
);
837 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
838 const unsigned scs_mask
= (1U << component
);
839 int done_mask
= ~dst
.writemask
;
842 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
844 /* If there are compnents in the destination that differ from the component
845 * that will be written by the SCS instrution, we'll need a temporary.
847 if (scs_mask
!= unsigned(dst
.writemask
)) {
848 tmp
= get_temp(glsl_type::vec4_type
);
851 for (unsigned i
= 0; i
< 4; i
++) {
852 unsigned this_mask
= (1U << i
);
853 st_src_reg src0
= src
;
855 if ((done_mask
& this_mask
) != 0)
858 /* The source swizzle specified which component of the source generates
859 * sine / cosine for the current component in the destination. The SCS
860 * instruction requires that this value be swizzle to the X component.
861 * Replace the current swizzle with a swizzle that puts the source in
864 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
866 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
867 src0_swiz
, src0_swiz
);
868 for (unsigned j
= i
+ 1; j
< 4; j
++) {
869 /* If there is another enabled component in the destination that is
870 * derived from the same inputs, generate its value on this pass as
873 if (!(done_mask
& (1 << j
)) &&
874 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
875 this_mask
|= (1 << j
);
879 if (this_mask
!= scs_mask
) {
880 glsl_to_tgsi_instruction
*inst
;
881 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
883 /* Emit the SCS instruction.
885 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
886 inst
->dst
.writemask
= scs_mask
;
888 /* Move the result of the SCS instruction to the desired location in
891 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
892 component
, component
);
893 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
894 inst
->dst
.writemask
= this_mask
;
896 /* Emit the SCS instruction to write directly to the destination.
898 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
899 inst
->dst
.writemask
= scs_mask
;
902 done_mask
|= this_mask
;
907 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
908 gl_constant_value values
[4], int size
, int datatype
,
911 if (file
== PROGRAM_CONSTANT
) {
912 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
913 size
, datatype
, swizzle_out
);
916 immediate_storage
*entry
;
917 assert(file
== PROGRAM_IMMEDIATE
);
919 /* Search immediate storage to see if we already have an identical
920 * immediate that we can use instead of adding a duplicate entry.
922 foreach_list(node
, &this->immediates
) {
923 entry
= (immediate_storage
*) node
;
925 if (entry
->size
== size
&&
926 entry
->type
== datatype
&&
927 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
933 /* Add this immediate to the list. */
934 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
935 this->immediates
.push_tail(entry
);
936 this->num_immediates
++;
942 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
944 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
945 union gl_constant_value uval
;
948 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
954 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
956 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
957 union gl_constant_value uval
;
959 assert(native_integers
);
962 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
968 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
971 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
972 st_src_reg_for_int(val
);
974 return st_src_reg_for_float(val
);
978 type_size(const struct glsl_type
*type
)
983 switch (type
->base_type
) {
986 case GLSL_TYPE_FLOAT
:
988 if (type
->is_matrix()) {
989 return type
->matrix_columns
;
991 /* Regardless of size of vector, it gets a vec4. This is bad
992 * packing for things like floats, but otherwise arrays become a
993 * mess. Hopefully a later pass over the code can pack scalars
994 * down if appropriate.
998 case GLSL_TYPE_ARRAY
:
999 assert(type
->length
> 0);
1000 return type_size(type
->fields
.array
) * type
->length
;
1001 case GLSL_TYPE_STRUCT
:
1003 for (i
= 0; i
< type
->length
; i
++) {
1004 size
+= type_size(type
->fields
.structure
[i
].type
);
1007 case GLSL_TYPE_SAMPLER
:
1008 case GLSL_TYPE_IMAGE
:
1009 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1013 case GLSL_TYPE_ATOMIC_UINT
:
1014 case GLSL_TYPE_INTERFACE
:
1015 case GLSL_TYPE_VOID
:
1016 case GLSL_TYPE_ERROR
:
1017 assert(!"Invalid type in type_size");
1024 * In the initial pass of codegen, we assign temporary numbers to
1025 * intermediate results. (not SSA -- variable assignments will reuse
1029 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1033 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1037 if (!options
->EmitNoIndirectTemp
&&
1038 (type
->is_array() || type
->is_matrix())) {
1040 src
.file
= PROGRAM_ARRAY
;
1041 src
.index
= next_array
<< 16 | 0x8000;
1042 array_sizes
[next_array
] = type_size(type
);
1046 src
.file
= PROGRAM_TEMPORARY
;
1047 src
.index
= next_temp
;
1048 next_temp
+= type_size(type
);
1051 if (type
->is_array() || type
->is_record()) {
1052 src
.swizzle
= SWIZZLE_NOOP
;
1054 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1061 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1064 variable_storage
*entry
;
1066 foreach_list(node
, &this->variables
) {
1067 entry
= (variable_storage
*) node
;
1069 if (entry
->var
== var
)
1077 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1079 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1080 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1082 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1083 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1086 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1088 const ir_state_slot
*const slots
= ir
->state_slots
;
1089 assert(ir
->state_slots
!= NULL
);
1091 /* Check if this statevar's setup in the STATE file exactly
1092 * matches how we'll want to reference it as a
1093 * struct/array/whatever. If not, then we need to move it into
1094 * temporary storage and hope that it'll get copy-propagated
1097 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1098 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1103 variable_storage
*storage
;
1105 if (i
== ir
->num_state_slots
) {
1106 /* We'll set the index later. */
1107 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1108 this->variables
.push_tail(storage
);
1112 /* The variable_storage constructor allocates slots based on the size
1113 * of the type. However, this had better match the number of state
1114 * elements that we're going to copy into the new temporary.
1116 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1118 dst
= st_dst_reg(get_temp(ir
->type
));
1120 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1122 this->variables
.push_tail(storage
);
1126 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1127 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1128 (gl_state_index
*)slots
[i
].tokens
);
1130 if (storage
->file
== PROGRAM_STATE_VAR
) {
1131 if (storage
->index
== -1) {
1132 storage
->index
= index
;
1134 assert(index
== storage
->index
+ (int)i
);
1137 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1138 * the data being moved since MOV does not care about the type of
1139 * data it is moving, and we don't want to declare registers with
1140 * array or struct types.
1142 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1143 src
.swizzle
= slots
[i
].swizzle
;
1144 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1145 /* even a float takes up a whole vec4 reg in a struct/array. */
1150 if (storage
->file
== PROGRAM_TEMPORARY
&&
1151 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1152 fail_link(this->shader_program
,
1153 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1154 ir
->name
, dst
.index
- storage
->index
,
1155 type_size(ir
->type
));
1161 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1163 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1165 visit_exec_list(&ir
->body_instructions
, this);
1167 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1171 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1174 case ir_loop_jump::jump_break
:
1175 emit(NULL
, TGSI_OPCODE_BRK
);
1177 case ir_loop_jump::jump_continue
:
1178 emit(NULL
, TGSI_OPCODE_CONT
);
1185 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1192 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1194 /* Ignore function bodies other than main() -- we shouldn't see calls to
1195 * them since they should all be inlined before we get to glsl_to_tgsi.
1197 if (strcmp(ir
->name
, "main") == 0) {
1198 const ir_function_signature
*sig
;
1201 sig
= ir
->matching_signature(NULL
, &empty
);
1205 foreach_list(node
, &sig
->body
) {
1206 ir_instruction
*ir
= (ir_instruction
*) node
;
1214 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1216 int nonmul_operand
= 1 - mul_operand
;
1218 st_dst_reg result_dst
;
1220 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1221 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1224 expr
->operands
[0]->accept(this);
1226 expr
->operands
[1]->accept(this);
1228 ir
->operands
[nonmul_operand
]->accept(this);
1231 this->result
= get_temp(ir
->type
);
1232 result_dst
= st_dst_reg(this->result
);
1233 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1234 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1240 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1242 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1243 * implemented using multiplication, and logical-or is implemented using
1244 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1245 * As result, the logical expression (a & !b) can be rewritten as:
1249 * - (a * 1) - (a * b)
1253 * This final expression can be implemented as a single MAD(a, -b, a)
1257 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1259 const int other_operand
= 1 - try_operand
;
1262 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1263 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1266 ir
->operands
[other_operand
]->accept(this);
1268 expr
->operands
[0]->accept(this);
1271 b
.negate
= ~b
.negate
;
1273 this->result
= get_temp(ir
->type
);
1274 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1280 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1282 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1284 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1285 !st_context(this->ctx
)->has_shader_model3
) {
1289 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1293 sat_src
->accept(this);
1294 st_src_reg src
= this->result
;
1296 /* If we generated an expression instruction into a temporary in
1297 * processing the saturate's operand, apply the saturate to that
1298 * instruction. Otherwise, generate a MOV to do the saturate.
1300 * Note that we have to be careful to only do this optimization if
1301 * the instruction in question was what generated src->result. For
1302 * example, ir_dereference_array might generate a MUL instruction
1303 * to create the reladdr, and return us a src reg using that
1304 * reladdr. That MUL result is not the value we're trying to
1307 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1308 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1309 sat_src_expr
->operation
== ir_binop_add
||
1310 sat_src_expr
->operation
== ir_binop_dot
)) {
1311 glsl_to_tgsi_instruction
*new_inst
;
1312 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1313 new_inst
->saturate
= true;
1315 this->result
= get_temp(ir
->type
);
1316 st_dst_reg result_dst
= st_dst_reg(this->result
);
1317 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1318 glsl_to_tgsi_instruction
*inst
;
1319 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1320 inst
->saturate
= true;
1327 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1328 st_src_reg
*reg
, int *num_reladdr
)
1330 if (!reg
->reladdr
&& !reg
->reladdr2
)
1333 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1334 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1336 if (*num_reladdr
!= 1) {
1337 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1339 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1347 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1349 unsigned int operand
;
1350 st_src_reg op
[Elements(ir
->operands
)];
1351 st_src_reg result_src
;
1352 st_dst_reg result_dst
;
1354 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1356 if (ir
->operation
== ir_binop_add
) {
1357 if (try_emit_mad(ir
, 1))
1359 if (try_emit_mad(ir
, 0))
1363 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1365 if (ir
->operation
== ir_binop_logic_and
) {
1366 if (try_emit_mad_for_and_not(ir
, 1))
1368 if (try_emit_mad_for_and_not(ir
, 0))
1372 if (try_emit_sat(ir
))
1375 if (ir
->operation
== ir_quadop_vector
)
1376 assert(!"ir_quadop_vector should have been lowered");
1378 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1379 this->result
.file
= PROGRAM_UNDEFINED
;
1380 ir
->operands
[operand
]->accept(this);
1381 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1382 printf("Failed to get tree for expression operand:\n");
1383 ir
->operands
[operand
]->print();
1387 op
[operand
] = this->result
;
1389 /* Matrix expression operands should have been broken down to vector
1390 * operations already.
1392 assert(!ir
->operands
[operand
]->type
->is_matrix());
1395 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1396 if (ir
->operands
[1]) {
1397 vector_elements
= MAX2(vector_elements
,
1398 ir
->operands
[1]->type
->vector_elements
);
1401 this->result
.file
= PROGRAM_UNDEFINED
;
1403 /* Storage for our result. Ideally for an assignment we'd be using
1404 * the actual storage for the result here, instead.
1406 result_src
= get_temp(ir
->type
);
1407 /* convenience for the emit functions below. */
1408 result_dst
= st_dst_reg(result_src
);
1409 /* Limit writes to the channels that will be used by result_src later.
1410 * This does limit this temp's use as a temporary for multi-instruction
1413 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1415 switch (ir
->operation
) {
1416 case ir_unop_logic_not
:
1417 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1418 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1420 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1421 * older GPUs implement SEQ using multiple instructions (i915 uses two
1422 * SGE instructions and a MUL instruction). Since our logic values are
1423 * 0.0 and 1.0, 1-x also implements !x.
1425 op
[0].negate
= ~op
[0].negate
;
1426 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1430 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1431 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1433 op
[0].negate
= ~op
[0].negate
;
1438 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1441 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1444 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1448 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1452 assert(!"not reached: should be handled by ir_explog_to_explog2");
1455 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1458 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1461 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1463 case ir_unop_sin_reduced
:
1464 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1466 case ir_unop_cos_reduced
:
1467 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1471 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1475 /* The X component contains 1 or -1 depending on whether the framebuffer
1476 * is a FBO or the window system buffer, respectively.
1477 * It is then multiplied with the source operand of DDY.
1479 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1480 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1482 unsigned transform_y_index
=
1483 _mesa_add_state_reference(this->prog
->Parameters
,
1486 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1488 glsl_type::vec4_type
);
1489 transform_y
.swizzle
= SWIZZLE_XXXX
;
1491 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1493 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1494 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1498 case ir_unop_noise
: {
1499 /* At some point, a motivated person could add a better
1500 * implementation of noise. Currently not even the nvidia
1501 * binary drivers do anything more than this. In any case, the
1502 * place to do this is in the GL state tracker, not the poor
1505 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1510 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1513 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1517 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1520 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1521 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1523 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1526 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1527 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1529 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1533 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1535 case ir_binop_greater
:
1536 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1538 case ir_binop_lequal
:
1539 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1541 case ir_binop_gequal
:
1542 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1544 case ir_binop_equal
:
1545 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1547 case ir_binop_nequal
:
1548 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1550 case ir_binop_all_equal
:
1551 /* "==" operator producing a scalar boolean. */
1552 if (ir
->operands
[0]->type
->is_vector() ||
1553 ir
->operands
[1]->type
->is_vector()) {
1554 st_src_reg temp
= get_temp(native_integers
?
1555 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1556 glsl_type::vec4_type
);
1558 if (native_integers
) {
1559 st_dst_reg temp_dst
= st_dst_reg(temp
);
1560 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1562 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1564 /* Emit 1-3 AND operations to combine the SEQ results. */
1565 switch (ir
->operands
[0]->type
->vector_elements
) {
1569 temp_dst
.writemask
= WRITEMASK_Y
;
1570 temp1
.swizzle
= SWIZZLE_YYYY
;
1571 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1572 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1575 temp_dst
.writemask
= WRITEMASK_X
;
1576 temp1
.swizzle
= SWIZZLE_XXXX
;
1577 temp2
.swizzle
= SWIZZLE_YYYY
;
1578 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1579 temp_dst
.writemask
= WRITEMASK_Y
;
1580 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1581 temp2
.swizzle
= SWIZZLE_WWWW
;
1582 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1585 temp1
.swizzle
= SWIZZLE_XXXX
;
1586 temp2
.swizzle
= SWIZZLE_YYYY
;
1587 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1589 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1591 /* After the dot-product, the value will be an integer on the
1592 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1594 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1596 /* Negating the result of the dot-product gives values on the range
1597 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1598 * This is achieved using SGE.
1600 st_src_reg sge_src
= result_src
;
1601 sge_src
.negate
= ~sge_src
.negate
;
1602 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1605 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1608 case ir_binop_any_nequal
:
1609 /* "!=" operator producing a scalar boolean. */
1610 if (ir
->operands
[0]->type
->is_vector() ||
1611 ir
->operands
[1]->type
->is_vector()) {
1612 st_src_reg temp
= get_temp(native_integers
?
1613 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1614 glsl_type::vec4_type
);
1615 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1617 if (native_integers
) {
1618 st_dst_reg temp_dst
= st_dst_reg(temp
);
1619 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1621 /* Emit 1-3 OR operations to combine the SNE results. */
1622 switch (ir
->operands
[0]->type
->vector_elements
) {
1626 temp_dst
.writemask
= WRITEMASK_Y
;
1627 temp1
.swizzle
= SWIZZLE_YYYY
;
1628 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1629 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1632 temp_dst
.writemask
= WRITEMASK_X
;
1633 temp1
.swizzle
= SWIZZLE_XXXX
;
1634 temp2
.swizzle
= SWIZZLE_YYYY
;
1635 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1636 temp_dst
.writemask
= WRITEMASK_Y
;
1637 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1638 temp2
.swizzle
= SWIZZLE_WWWW
;
1639 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1642 temp1
.swizzle
= SWIZZLE_XXXX
;
1643 temp2
.swizzle
= SWIZZLE_YYYY
;
1644 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1646 /* After the dot-product, the value will be an integer on the
1647 * range [0,4]. Zero stays zero, and positive values become 1.0.
1649 glsl_to_tgsi_instruction
*const dp
=
1650 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1651 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1652 /* The clamping to [0,1] can be done for free in the fragment
1653 * shader with a saturate.
1655 dp
->saturate
= true;
1657 /* Negating the result of the dot-product gives values on the range
1658 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1659 * achieved using SLT.
1661 st_src_reg slt_src
= result_src
;
1662 slt_src
.negate
= ~slt_src
.negate
;
1663 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1667 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1672 assert(ir
->operands
[0]->type
->is_vector());
1674 /* After the dot-product, the value will be an integer on the
1675 * range [0,4]. Zero stays zero, and positive values become 1.0.
1677 glsl_to_tgsi_instruction
*const dp
=
1678 emit_dp(ir
, result_dst
, op
[0], op
[0],
1679 ir
->operands
[0]->type
->vector_elements
);
1680 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1681 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1682 /* The clamping to [0,1] can be done for free in the fragment
1683 * shader with a saturate.
1685 dp
->saturate
= true;
1686 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1687 /* Negating the result of the dot-product gives values on the range
1688 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1689 * is achieved using SLT.
1691 st_src_reg slt_src
= result_src
;
1692 slt_src
.negate
= ~slt_src
.negate
;
1693 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1696 /* Use SNE 0 if integers are being used as boolean values. */
1697 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1702 case ir_binop_logic_xor
:
1703 if (native_integers
)
1704 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1706 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1709 case ir_binop_logic_or
: {
1710 if (native_integers
) {
1711 /* If integers are used as booleans, we can use an actual "or"
1714 assert(native_integers
);
1715 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1720 glsl_to_tgsi_instruction
*add
=
1721 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1722 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1726 add
->saturate
= true;
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1732 st_src_reg slt_src
= result_src
;
1733 slt_src
.negate
= ~slt_src
.negate
;
1734 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1740 case ir_binop_logic_and
:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1745 if (native_integers
)
1746 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1748 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1752 assert(ir
->operands
[0]->type
->is_vector());
1753 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1754 emit_dp(ir
, result_dst
, op
[0], op
[1],
1755 ir
->operands
[0]->type
->vector_elements
);
1760 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1765 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op
[0].negate
= ~op
[0].negate
;
1768 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1769 op
[0], result_src
, st_src_reg_for_float(0.0));
1773 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1776 if (native_integers
) {
1777 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1780 /* fallthrough to next case otherwise */
1782 if (native_integers
) {
1783 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1786 /* fallthrough to next case otherwise */
1789 /* Converting between signed and unsigned integers is a no-op. */
1793 if (native_integers
) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1798 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1807 if (native_integers
)
1808 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1810 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1813 if (native_integers
)
1814 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1816 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1818 case ir_unop_bitcast_f2i
:
1820 result_src
.type
= GLSL_TYPE_INT
;
1822 case ir_unop_bitcast_f2u
:
1824 result_src
.type
= GLSL_TYPE_UINT
;
1826 case ir_unop_bitcast_i2f
:
1827 case ir_unop_bitcast_u2f
:
1829 result_src
.type
= GLSL_TYPE_FLOAT
;
1832 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1835 if (native_integers
)
1836 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1838 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1841 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1844 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1847 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1849 case ir_unop_round_even
:
1850 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1853 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1857 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1860 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1863 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1866 case ir_unop_bit_not
:
1867 if (native_integers
) {
1868 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1872 if (native_integers
) {
1873 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1876 case ir_binop_lshift
:
1877 if (native_integers
) {
1878 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1881 case ir_binop_rshift
:
1882 if (native_integers
) {
1883 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1886 case ir_binop_bit_and
:
1887 if (native_integers
) {
1888 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1891 case ir_binop_bit_xor
:
1892 if (native_integers
) {
1893 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1896 case ir_binop_bit_or
:
1897 if (native_integers
) {
1898 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1902 assert(!"GLSL 1.30 features unsupported");
1905 case ir_binop_ubo_load
: {
1906 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1907 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1908 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1909 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1912 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1913 cbuf
.file
= PROGRAM_CONSTANT
;
1915 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1916 cbuf
.reladdr
= NULL
;
1919 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1921 if (const_offset_ir
) {
1922 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1924 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1927 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1928 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1929 const_offset
% 16 / 4,
1930 const_offset
% 16 / 4,
1931 const_offset
% 16 / 4);
1933 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1934 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1936 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1937 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1939 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1944 /* note: we have to reorder the three args here */
1945 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1948 if (this->ctx
->Const
.NativeIntegers
)
1949 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
1951 op
[0].negate
= ~op
[0].negate
;
1952 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1955 case ir_triop_bitfield_extract
:
1956 emit(ir
, TGSI_OPCODE_IBFE
, result_dst
, op
[0], op
[1], op
[2]);
1958 case ir_quadop_bitfield_insert
:
1959 emit(ir
, TGSI_OPCODE_BFI
, result_dst
, op
[0], op
[1], op
[2], op
[3]);
1961 case ir_unop_bitfield_reverse
:
1962 emit(ir
, TGSI_OPCODE_BREV
, result_dst
, op
[0]);
1964 case ir_unop_bit_count
:
1965 emit(ir
, TGSI_OPCODE_POPC
, result_dst
, op
[0]);
1967 case ir_unop_find_msb
:
1968 emit(ir
, TGSI_OPCODE_IMSB
, result_dst
, op
[0]);
1970 case ir_unop_find_lsb
:
1971 emit(ir
, TGSI_OPCODE_LSB
, result_dst
, op
[0]);
1973 case ir_binop_imul_high
:
1974 emit(ir
, TGSI_OPCODE_IMUL_HI
, result_dst
, op
[0], op
[1]);
1977 /* NOTE: Perhaps there should be a special opcode that enforces fused
1978 * mul-add. Just use MAD for now.
1980 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, op
[0], op
[1], op
[2]);
1982 case ir_unop_pack_snorm_2x16
:
1983 case ir_unop_pack_unorm_2x16
:
1984 case ir_unop_pack_half_2x16
:
1985 case ir_unop_pack_snorm_4x8
:
1986 case ir_unop_pack_unorm_4x8
:
1987 case ir_unop_unpack_snorm_2x16
:
1988 case ir_unop_unpack_unorm_2x16
:
1989 case ir_unop_unpack_half_2x16
:
1990 case ir_unop_unpack_half_2x16_split_x
:
1991 case ir_unop_unpack_half_2x16_split_y
:
1992 case ir_unop_unpack_snorm_4x8
:
1993 case ir_unop_unpack_unorm_4x8
:
1994 case ir_binop_pack_half_2x16_split
:
1997 case ir_quadop_vector
:
1998 case ir_binop_vector_extract
:
1999 case ir_triop_vector_insert
:
2000 case ir_binop_ldexp
:
2001 case ir_binop_carry
:
2002 case ir_binop_borrow
:
2003 /* This operation is not supported, or should have already been handled.
2005 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2009 this->result
= result_src
;
2014 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2020 /* Note that this is only swizzles in expressions, not those on the left
2021 * hand side of an assignment, which do write masking. See ir_assignment
2025 ir
->val
->accept(this);
2027 assert(src
.file
!= PROGRAM_UNDEFINED
);
2029 for (i
= 0; i
< 4; i
++) {
2030 if (i
< ir
->type
->vector_elements
) {
2033 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2036 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2039 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2042 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2046 /* If the type is smaller than a vec4, replicate the last
2049 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2053 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2059 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2061 variable_storage
*entry
= find_variable_storage(ir
->var
);
2062 ir_variable
*var
= ir
->var
;
2065 switch (var
->data
.mode
) {
2066 case ir_var_uniform
:
2067 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2068 var
->data
.location
);
2069 this->variables
.push_tail(entry
);
2071 case ir_var_shader_in
:
2072 /* The linker assigns locations for varyings and attributes,
2073 * including deprecated builtins (like gl_Color), user-assign
2074 * generic attributes (glBindVertexLocation), and
2075 * user-defined varyings.
2077 assert(var
->data
.location
!= -1);
2078 entry
= new(mem_ctx
) variable_storage(var
,
2080 var
->data
.location
);
2082 case ir_var_shader_out
:
2083 assert(var
->data
.location
!= -1);
2084 entry
= new(mem_ctx
) variable_storage(var
,
2089 case ir_var_system_value
:
2090 entry
= new(mem_ctx
) variable_storage(var
,
2091 PROGRAM_SYSTEM_VALUE
,
2092 var
->data
.location
);
2095 case ir_var_temporary
:
2096 st_src_reg src
= get_temp(var
->type
);
2098 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2099 this->variables
.push_tail(entry
);
2105 printf("Failed to make storage for %s\n", var
->name
);
2110 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2111 if (!native_integers
)
2112 this->result
.type
= GLSL_TYPE_FLOAT
;
2116 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2120 int element_size
= type_size(ir
->type
);
2123 index
= ir
->array_index
->constant_expression_value();
2125 ir
->array
->accept(this);
2128 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2129 src
.file
== PROGRAM_INPUT
&&
2130 ir
->array
->ir_type
!= ir_type_dereference_array
;
2137 src
.index2D
= index
->value
.i
[0];
2138 src
.has_index2
= true;
2140 src
.index
+= index
->value
.i
[0] * element_size
;
2142 /* Variable index array dereference. It eats the "vec4" of the
2143 * base of the array and an index that offsets the TGSI register
2146 ir
->array_index
->accept(this);
2148 st_src_reg index_reg
;
2150 if (element_size
== 1) {
2151 index_reg
= this->result
;
2153 index_reg
= get_temp(native_integers
?
2154 glsl_type::int_type
: glsl_type::float_type
);
2156 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2157 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2160 /* If there was already a relative address register involved, add the
2161 * new and the old together to get the new offset.
2163 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2164 st_src_reg accum_reg
= get_temp(native_integers
?
2165 glsl_type::int_type
: glsl_type::float_type
);
2167 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2168 index_reg
, *src
.reladdr
);
2170 index_reg
= accum_reg
;
2174 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2175 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2177 src
.has_index2
= true;
2179 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2180 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2184 /* If the type is smaller than a vec4, replicate the last channel out. */
2185 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2186 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2188 src
.swizzle
= SWIZZLE_NOOP
;
2190 /* Change the register type to the element type of the array. */
2191 src
.type
= ir
->type
->base_type
;
2197 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2200 const glsl_type
*struct_type
= ir
->record
->type
;
2203 ir
->record
->accept(this);
2205 for (i
= 0; i
< struct_type
->length
; i
++) {
2206 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2208 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2211 /* If the type is smaller than a vec4, replicate the last channel out. */
2212 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2213 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2215 this->result
.swizzle
= SWIZZLE_NOOP
;
2217 this->result
.index
+= offset
;
2218 this->result
.type
= ir
->type
->base_type
;
2222 * We want to be careful in assignment setup to hit the actual storage
2223 * instead of potentially using a temporary like we might with the
2224 * ir_dereference handler.
2227 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2229 /* The LHS must be a dereference. If the LHS is a variable indexed array
2230 * access of a vector, it must be separated into a series conditional moves
2231 * before reaching this point (see ir_vec_index_to_cond_assign).
2233 assert(ir
->as_dereference());
2234 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2236 assert(!deref_array
->array
->type
->is_vector());
2239 /* Use the rvalue deref handler for the most part. We'll ignore
2240 * swizzles in it and write swizzles using writemask, though.
2243 return st_dst_reg(v
->result
);
2247 * Process the condition of a conditional assignment
2249 * Examines the condition of a conditional assignment to generate the optimal
2250 * first operand of a \c CMP instruction. If the condition is a relational
2251 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2252 * used as the source for the \c CMP instruction. Otherwise the comparison
2253 * is processed to a boolean result, and the boolean result is used as the
2254 * operand to the CMP instruction.
2257 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2259 ir_rvalue
*src_ir
= ir
;
2261 bool switch_order
= false;
2263 ir_expression
*const expr
= ir
->as_expression();
2264 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2265 bool zero_on_left
= false;
2267 if (expr
->operands
[0]->is_zero()) {
2268 src_ir
= expr
->operands
[1];
2269 zero_on_left
= true;
2270 } else if (expr
->operands
[1]->is_zero()) {
2271 src_ir
= expr
->operands
[0];
2272 zero_on_left
= false;
2276 * (a < 0) T F F ( a < 0) T F F
2277 * (0 < a) F F T (-a < 0) F F T
2278 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2279 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2280 * (a > 0) F F T (-a < 0) F F T
2281 * (0 > a) T F F ( a < 0) T F F
2282 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2283 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2285 * Note that exchanging the order of 0 and 'a' in the comparison simply
2286 * means that the value of 'a' should be negated.
2289 switch (expr
->operation
) {
2291 switch_order
= false;
2292 negate
= zero_on_left
;
2295 case ir_binop_greater
:
2296 switch_order
= false;
2297 negate
= !zero_on_left
;
2300 case ir_binop_lequal
:
2301 switch_order
= true;
2302 negate
= !zero_on_left
;
2305 case ir_binop_gequal
:
2306 switch_order
= true;
2307 negate
= zero_on_left
;
2311 /* This isn't the right kind of comparison afterall, so make sure
2312 * the whole condition is visited.
2320 src_ir
->accept(this);
2322 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2323 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2324 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2325 * computing the condition.
2328 this->result
.negate
= ~this->result
.negate
;
2330 return switch_order
;
2334 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2335 st_dst_reg
*l
, st_src_reg
*r
)
2337 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2338 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2339 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2344 if (type
->is_array()) {
2345 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2346 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2351 if (type
->is_matrix()) {
2352 const struct glsl_type
*vec_type
;
2354 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2355 type
->vector_elements
, 1);
2357 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2358 emit_block_mov(ir
, vec_type
, l
, r
);
2363 assert(type
->is_scalar() || type
->is_vector());
2365 r
->type
= type
->base_type
;
2366 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2372 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2378 ir
->rhs
->accept(this);
2381 l
= get_assignment_lhs(ir
->lhs
, this);
2383 /* FINISHME: This should really set to the correct maximal writemask for each
2384 * FINISHME: component written (in the loops below). This case can only
2385 * FINISHME: occur for matrices, arrays, and structures.
2387 if (ir
->write_mask
== 0) {
2388 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2389 l
.writemask
= WRITEMASK_XYZW
;
2390 } else if (ir
->lhs
->type
->is_scalar() &&
2391 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2392 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2393 * FINISHME: W component of fragment shader output zero, work correctly.
2395 l
.writemask
= WRITEMASK_XYZW
;
2398 int first_enabled_chan
= 0;
2401 l
.writemask
= ir
->write_mask
;
2403 for (int i
= 0; i
< 4; i
++) {
2404 if (l
.writemask
& (1 << i
)) {
2405 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2410 /* Swizzle a small RHS vector into the channels being written.
2412 * glsl ir treats write_mask as dictating how many channels are
2413 * present on the RHS while TGSI treats write_mask as just
2414 * showing which channels of the vec4 RHS get written.
2416 for (int i
= 0; i
< 4; i
++) {
2417 if (l
.writemask
& (1 << i
))
2418 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2420 swizzles
[i
] = first_enabled_chan
;
2422 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2423 swizzles
[2], swizzles
[3]);
2426 assert(l
.file
!= PROGRAM_UNDEFINED
);
2427 assert(r
.file
!= PROGRAM_UNDEFINED
);
2429 if (ir
->condition
) {
2430 const bool switch_order
= this->process_move_condition(ir
->condition
);
2431 st_src_reg condition
= this->result
;
2433 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2434 st_src_reg l_src
= st_src_reg(l
);
2435 st_src_reg condition_temp
= condition
;
2436 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2438 if (native_integers
) {
2439 /* This is necessary because TGSI's CMP instruction expects the
2440 * condition to be a float, and we store booleans as integers.
2441 * TODO: really want to avoid i2f path and use UCMP. Requires
2442 * changes to process_move_condition though too.
2444 condition_temp
= get_temp(glsl_type::vec4_type
);
2445 condition
.negate
= 0;
2446 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2447 condition_temp
.swizzle
= condition
.swizzle
;
2451 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2453 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2459 } else if (ir
->rhs
->as_expression() &&
2460 this->instructions
.get_tail() &&
2461 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2462 type_size(ir
->lhs
->type
) == 1 &&
2463 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2464 /* To avoid emitting an extra MOV when assigning an expression to a
2465 * variable, emit the last instruction of the expression again, but
2466 * replace the destination register with the target of the assignment.
2467 * Dead code elimination will remove the original instruction.
2469 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2470 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2471 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2472 new_inst
->saturate
= inst
->saturate
;
2473 inst
->dead_mask
= inst
->dst
.writemask
;
2475 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2481 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2484 GLfloat stack_vals
[4] = { 0 };
2485 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2486 GLenum gl_type
= GL_NONE
;
2488 static int in_array
= 0;
2489 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2491 /* Unfortunately, 4 floats is all we can get into
2492 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2493 * aggregate constant and move each constant value into it. If we
2494 * get lucky, copy propagation will eliminate the extra moves.
2496 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2497 st_src_reg temp_base
= get_temp(ir
->type
);
2498 st_dst_reg temp
= st_dst_reg(temp_base
);
2500 foreach_list(node
, &ir
->components
) {
2501 ir_constant
*field_value
= (ir_constant
*) node
;
2502 int size
= type_size(field_value
->type
);
2506 field_value
->accept(this);
2509 for (i
= 0; i
< (unsigned int)size
; i
++) {
2510 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2516 this->result
= temp_base
;
2520 if (ir
->type
->is_array()) {
2521 st_src_reg temp_base
= get_temp(ir
->type
);
2522 st_dst_reg temp
= st_dst_reg(temp_base
);
2523 int size
= type_size(ir
->type
->fields
.array
);
2528 for (i
= 0; i
< ir
->type
->length
; i
++) {
2529 ir
->array_elements
[i
]->accept(this);
2531 for (int j
= 0; j
< size
; j
++) {
2532 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2538 this->result
= temp_base
;
2543 if (ir
->type
->is_matrix()) {
2544 st_src_reg mat
= get_temp(ir
->type
);
2545 st_dst_reg mat_column
= st_dst_reg(mat
);
2547 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2548 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2549 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2551 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2552 src
.index
= add_constant(file
,
2554 ir
->type
->vector_elements
,
2557 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2566 switch (ir
->type
->base_type
) {
2567 case GLSL_TYPE_FLOAT
:
2569 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2570 values
[i
].f
= ir
->value
.f
[i
];
2573 case GLSL_TYPE_UINT
:
2574 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2575 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2576 if (native_integers
)
2577 values
[i
].u
= ir
->value
.u
[i
];
2579 values
[i
].f
= ir
->value
.u
[i
];
2583 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2584 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2585 if (native_integers
)
2586 values
[i
].i
= ir
->value
.i
[i
];
2588 values
[i
].f
= ir
->value
.i
[i
];
2591 case GLSL_TYPE_BOOL
:
2592 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2593 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2594 if (native_integers
)
2595 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2597 values
[i
].f
= ir
->value
.b
[i
];
2601 assert(!"Non-float/uint/int/bool constant");
2604 this->result
= st_src_reg(file
, -1, ir
->type
);
2605 this->result
.index
= add_constant(file
,
2607 ir
->type
->vector_elements
,
2609 &this->result
.swizzle
);
2613 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2615 function_entry
*entry
;
2617 foreach_list(node
, &this->function_signatures
) {
2618 entry
= (function_entry
*) node
;
2620 if (entry
->sig
== sig
)
2624 entry
= ralloc(mem_ctx
, function_entry
);
2626 entry
->sig_id
= this->next_signature_id
++;
2627 entry
->bgn_inst
= NULL
;
2629 /* Allocate storage for all the parameters. */
2630 foreach_list(node
, &sig
->parameters
) {
2631 ir_variable
*param
= (ir_variable
*) node
;
2632 variable_storage
*storage
;
2634 storage
= find_variable_storage(param
);
2637 st_src_reg src
= get_temp(param
->type
);
2639 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2640 this->variables
.push_tail(storage
);
2643 if (!sig
->return_type
->is_void()) {
2644 entry
->return_reg
= get_temp(sig
->return_type
);
2646 entry
->return_reg
= undef_src
;
2649 this->function_signatures
.push_tail(entry
);
2654 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2656 glsl_to_tgsi_instruction
*call_inst
;
2657 ir_function_signature
*sig
= ir
->callee
;
2658 function_entry
*entry
= get_function_signature(sig
);
2661 /* Process in parameters. */
2662 foreach_two_lists(formal_node
, &sig
->parameters
,
2663 actual_node
, &ir
->actual_parameters
) {
2664 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2665 ir_variable
*param
= (ir_variable
*) formal_node
;
2667 if (param
->data
.mode
== ir_var_function_in
||
2668 param
->data
.mode
== ir_var_function_inout
) {
2669 variable_storage
*storage
= find_variable_storage(param
);
2672 param_rval
->accept(this);
2673 st_src_reg r
= this->result
;
2676 l
.file
= storage
->file
;
2677 l
.index
= storage
->index
;
2679 l
.writemask
= WRITEMASK_XYZW
;
2680 l
.cond_mask
= COND_TR
;
2682 for (i
= 0; i
< type_size(param
->type
); i
++) {
2683 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2690 /* Emit call instruction */
2691 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2692 call_inst
->function
= entry
;
2694 /* Process out parameters. */
2695 foreach_two_lists(formal_node
, &sig
->parameters
,
2696 actual_node
, &ir
->actual_parameters
) {
2697 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2698 ir_variable
*param
= (ir_variable
*) formal_node
;
2700 if (param
->data
.mode
== ir_var_function_out
||
2701 param
->data
.mode
== ir_var_function_inout
) {
2702 variable_storage
*storage
= find_variable_storage(param
);
2706 r
.file
= storage
->file
;
2707 r
.index
= storage
->index
;
2709 r
.swizzle
= SWIZZLE_NOOP
;
2712 param_rval
->accept(this);
2713 st_dst_reg l
= st_dst_reg(this->result
);
2715 for (i
= 0; i
< type_size(param
->type
); i
++) {
2716 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2723 /* Process return value. */
2724 this->result
= entry
->return_reg
;
2728 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2730 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
[MAX_GLSL_TEXTURE_OFFSET
], sample_index
, component
;
2731 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2732 glsl_to_tgsi_instruction
*inst
= NULL
;
2733 unsigned opcode
= TGSI_OPCODE_NOP
;
2734 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2735 bool is_cube_array
= false;
2738 /* if we are a cube array sampler */
2739 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2740 sampler_type
->sampler_array
)) {
2741 is_cube_array
= true;
2744 if (ir
->coordinate
) {
2745 ir
->coordinate
->accept(this);
2747 /* Put our coords in a temp. We'll need to modify them for shadow,
2748 * projection, or LOD, so the only case we'd use it as is is if
2749 * we're doing plain old texturing. The optimization passes on
2750 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2752 coord
= get_temp(glsl_type::vec4_type
);
2753 coord_dst
= st_dst_reg(coord
);
2754 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2755 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2758 if (ir
->projector
) {
2759 ir
->projector
->accept(this);
2760 projector
= this->result
;
2763 /* Storage for our result. Ideally for an assignment we'd be using
2764 * the actual storage for the result here, instead.
2766 result_src
= get_temp(ir
->type
);
2767 result_dst
= st_dst_reg(result_src
);
2771 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2773 ir
->offset
->accept(this);
2774 offset
[0] = this->result
;
2778 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2779 ir
->lod_info
.bias
->accept(this);
2780 lod_info
= this->result
;
2782 ir
->offset
->accept(this);
2783 offset
[0] = this->result
;
2787 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2788 ir
->lod_info
.lod
->accept(this);
2789 lod_info
= this->result
;
2791 ir
->offset
->accept(this);
2792 offset
[0] = this->result
;
2796 opcode
= TGSI_OPCODE_TXD
;
2797 ir
->lod_info
.grad
.dPdx
->accept(this);
2799 ir
->lod_info
.grad
.dPdy
->accept(this);
2802 ir
->offset
->accept(this);
2803 offset
[0] = this->result
;
2807 opcode
= TGSI_OPCODE_TXQ
;
2808 ir
->lod_info
.lod
->accept(this);
2809 lod_info
= this->result
;
2812 opcode
= TGSI_OPCODE_TXF
;
2813 ir
->lod_info
.lod
->accept(this);
2814 lod_info
= this->result
;
2816 ir
->offset
->accept(this);
2817 offset
[0] = this->result
;
2821 opcode
= TGSI_OPCODE_TXF
;
2822 ir
->lod_info
.sample_index
->accept(this);
2823 sample_index
= this->result
;
2826 opcode
= TGSI_OPCODE_TG4
;
2827 ir
->lod_info
.component
->accept(this);
2828 component
= this->result
;
2830 ir
->offset
->accept(this);
2831 if (ir
->offset
->type
->base_type
== GLSL_TYPE_ARRAY
) {
2832 const glsl_type
*elt_type
= ir
->offset
->type
->fields
.array
;
2833 for (i
= 0; i
< ir
->offset
->type
->length
; i
++) {
2834 offset
[i
] = this->result
;
2835 offset
[i
].index
+= i
* type_size(elt_type
);
2836 offset
[i
].type
= elt_type
->base_type
;
2837 offset
[i
].swizzle
= swizzle_for_size(elt_type
->vector_elements
);
2840 offset
[0] = this->result
;
2845 opcode
= TGSI_OPCODE_LODQ
;
2847 case ir_query_levels
:
2848 assert(!"Unexpected ir_query_levels opcode");
2852 if (ir
->projector
) {
2853 if (opcode
== TGSI_OPCODE_TEX
) {
2854 /* Slot the projector in as the last component of the coord. */
2855 coord_dst
.writemask
= WRITEMASK_W
;
2856 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2857 coord_dst
.writemask
= WRITEMASK_XYZW
;
2858 opcode
= TGSI_OPCODE_TXP
;
2860 st_src_reg coord_w
= coord
;
2861 coord_w
.swizzle
= SWIZZLE_WWWW
;
2863 /* For the other TEX opcodes there's no projective version
2864 * since the last slot is taken up by LOD info. Do the
2865 * projective divide now.
2867 coord_dst
.writemask
= WRITEMASK_W
;
2868 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2870 /* In the case where we have to project the coordinates "by hand,"
2871 * the shadow comparator value must also be projected.
2873 st_src_reg tmp_src
= coord
;
2874 if (ir
->shadow_comparitor
) {
2875 /* Slot the shadow value in as the second to last component of the
2878 ir
->shadow_comparitor
->accept(this);
2880 tmp_src
= get_temp(glsl_type::vec4_type
);
2881 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2883 /* Projective division not allowed for array samplers. */
2884 assert(!sampler_type
->sampler_array
);
2886 tmp_dst
.writemask
= WRITEMASK_Z
;
2887 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2889 tmp_dst
.writemask
= WRITEMASK_XY
;
2890 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2893 coord_dst
.writemask
= WRITEMASK_XYZ
;
2894 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2896 coord_dst
.writemask
= WRITEMASK_XYZW
;
2897 coord
.swizzle
= SWIZZLE_XYZW
;
2901 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2902 * comparator was put in the correct place (and projected) by the code,
2903 * above, that handles by-hand projection.
2905 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2906 /* Slot the shadow value in as the second to last component of the
2909 ir
->shadow_comparitor
->accept(this);
2911 if (is_cube_array
) {
2912 cube_sc
= get_temp(glsl_type::float_type
);
2913 cube_sc_dst
= st_dst_reg(cube_sc
);
2914 cube_sc_dst
.writemask
= WRITEMASK_X
;
2915 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2916 cube_sc_dst
.writemask
= WRITEMASK_X
;
2919 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2920 sampler_type
->sampler_array
) ||
2921 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2922 coord_dst
.writemask
= WRITEMASK_W
;
2924 coord_dst
.writemask
= WRITEMASK_Z
;
2927 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2928 coord_dst
.writemask
= WRITEMASK_XYZW
;
2932 if (ir
->op
== ir_txf_ms
) {
2933 coord_dst
.writemask
= WRITEMASK_W
;
2934 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2935 coord_dst
.writemask
= WRITEMASK_XYZW
;
2936 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2937 opcode
== TGSI_OPCODE_TXF
) {
2938 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2939 coord_dst
.writemask
= WRITEMASK_W
;
2940 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2941 coord_dst
.writemask
= WRITEMASK_XYZW
;
2944 if (opcode
== TGSI_OPCODE_TXD
)
2945 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2946 else if (opcode
== TGSI_OPCODE_TXQ
)
2947 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2948 else if (opcode
== TGSI_OPCODE_TXF
) {
2949 inst
= emit(ir
, opcode
, result_dst
, coord
);
2950 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2951 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2952 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2953 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2954 } else if (opcode
== TGSI_OPCODE_TG4
) {
2955 if (is_cube_array
&& ir
->shadow_comparitor
) {
2956 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2958 inst
= emit(ir
, opcode
, result_dst
, coord
, component
);
2961 inst
= emit(ir
, opcode
, result_dst
, coord
);
2963 if (ir
->shadow_comparitor
)
2964 inst
->tex_shadow
= GL_TRUE
;
2966 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2967 this->shader_program
,
2971 for (i
= 0; i
< MAX_GLSL_TEXTURE_OFFSET
&& offset
[i
].file
!= PROGRAM_UNDEFINED
; i
++)
2972 inst
->tex_offsets
[i
] = offset
[i
];
2973 inst
->tex_offset_num_offset
= i
;
2976 switch (sampler_type
->sampler_dimensionality
) {
2977 case GLSL_SAMPLER_DIM_1D
:
2978 inst
->tex_target
= (sampler_type
->sampler_array
)
2979 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2981 case GLSL_SAMPLER_DIM_2D
:
2982 inst
->tex_target
= (sampler_type
->sampler_array
)
2983 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2985 case GLSL_SAMPLER_DIM_3D
:
2986 inst
->tex_target
= TEXTURE_3D_INDEX
;
2988 case GLSL_SAMPLER_DIM_CUBE
:
2989 inst
->tex_target
= (sampler_type
->sampler_array
)
2990 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2992 case GLSL_SAMPLER_DIM_RECT
:
2993 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2995 case GLSL_SAMPLER_DIM_BUF
:
2996 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2998 case GLSL_SAMPLER_DIM_EXTERNAL
:
2999 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
3001 case GLSL_SAMPLER_DIM_MS
:
3002 inst
->tex_target
= (sampler_type
->sampler_array
)
3003 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
3006 assert(!"Should not get here.");
3009 this->result
= result_src
;
3013 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
3015 if (ir
->get_value()) {
3019 assert(current_function
);
3021 ir
->get_value()->accept(this);
3022 st_src_reg r
= this->result
;
3024 l
= st_dst_reg(current_function
->return_reg
);
3026 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
3027 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
3033 emit(ir
, TGSI_OPCODE_RET
);
3037 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
3039 if (ir
->condition
) {
3040 ir
->condition
->accept(this);
3041 this->result
.negate
= ~this->result
.negate
;
3042 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
3044 /* unconditional kil */
3045 emit(ir
, TGSI_OPCODE_KILL
);
3050 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3053 glsl_to_tgsi_instruction
*if_inst
;
3055 ir
->condition
->accept(this);
3056 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3058 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3060 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3062 this->instructions
.push_tail(if_inst
);
3064 visit_exec_list(&ir
->then_instructions
, this);
3066 if (!ir
->else_instructions
.is_empty()) {
3067 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3068 visit_exec_list(&ir
->else_instructions
, this);
3071 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3076 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3078 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3079 emit(ir
, TGSI_OPCODE_EMIT
);
3083 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3085 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3086 emit(ir
, TGSI_OPCODE_ENDPRIM
);
3089 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3091 result
.file
= PROGRAM_UNDEFINED
;
3094 next_signature_id
= 1;
3096 current_function
= NULL
;
3097 num_address_regs
= 0;
3099 indirect_addr_consts
= false;
3101 native_integers
= false;
3102 mem_ctx
= ralloc_context(NULL
);
3105 shader_program
= NULL
;
3109 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3111 ralloc_free(mem_ctx
);
3114 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3121 * Count resources used by the given gpu program (number of texture
3125 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3127 v
->samplers_used
= 0;
3129 foreach_list(node
, &v
->instructions
) {
3130 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3132 if (is_tex_instruction(inst
->op
)) {
3133 v
->samplers_used
|= 1 << inst
->sampler
;
3135 if (inst
->tex_shadow
) {
3136 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3141 prog
->SamplersUsed
= v
->samplers_used
;
3143 if (v
->shader_program
!= NULL
)
3144 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3148 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3149 struct gl_shader_program
*shader_program
,
3150 const char *name
, const glsl_type
*type
,
3153 if (type
->is_record()) {
3154 ir_constant
*field_constant
;
3156 field_constant
= (ir_constant
*)val
->components
.get_head();
3158 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3159 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3160 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3161 type
->fields
.structure
[i
].name
);
3162 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3163 field_type
, field_constant
);
3164 field_constant
= (ir_constant
*)field_constant
->next
;
3170 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3172 if (offset
== GL_INVALID_INDEX
) {
3173 fail_link(shader_program
,
3174 "Couldn't find uniform for initializer %s\n", name
);
3177 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3179 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3180 ir_constant
*element
;
3181 const glsl_type
*element_type
;
3182 if (type
->is_array()) {
3183 element
= val
->array_elements
[i
];
3184 element_type
= type
->fields
.array
;
3187 element_type
= type
;
3192 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3193 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3194 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3195 conv
[j
] = element
->value
.b
[j
];
3197 values
= (void *)conv
;
3198 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3199 element_type
->vector_elements
,
3202 values
= &element
->value
;
3205 if (element_type
->is_matrix()) {
3206 _mesa_uniform_matrix(ctx
, shader_program
,
3207 element_type
->matrix_columns
,
3208 element_type
->vector_elements
,
3209 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3211 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3212 values
, element_type
->gl_type
);
3220 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3221 * are read from the given src in this instruction
3224 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3226 int read_mask
= 0, comp
;
3228 /* Now, given the src swizzle and the written channels, find which
3229 * components are actually read
3231 for (comp
= 0; comp
< 4; ++comp
) {
3232 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3234 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3235 read_mask
|= 1 << coord
;
3242 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3243 * instruction is the first instruction to write to register T0. There are
3244 * several lowering passes done in GLSL IR (e.g. branches and
3245 * relative addressing) that create a large number of conditional assignments
3246 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3248 * Here is why this conversion is safe:
3249 * CMP T0, T1 T2 T0 can be expanded to:
3255 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3256 * as the original program. If (T1 < 0.0) evaluates to false, executing
3257 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3258 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3259 * because any instruction that was going to read from T0 after this was going
3260 * to read a garbage value anyway.
3263 glsl_to_tgsi_visitor::simplify_cmp(void)
3265 unsigned *tempWrites
;
3266 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3268 tempWrites
= new unsigned[MAX_TEMPS
];
3272 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3273 memset(outputWrites
, 0, sizeof(outputWrites
));
3275 foreach_list(node
, &this->instructions
) {
3276 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3277 unsigned prevWriteMask
= 0;
3279 /* Give up if we encounter relative addressing or flow control. */
3280 if (inst
->dst
.reladdr
||
3281 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3282 inst
->op
== TGSI_OPCODE_BGNSUB
||
3283 inst
->op
== TGSI_OPCODE_CONT
||
3284 inst
->op
== TGSI_OPCODE_END
||
3285 inst
->op
== TGSI_OPCODE_ENDSUB
||
3286 inst
->op
== TGSI_OPCODE_RET
) {
3290 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3291 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3292 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3293 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3294 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3295 assert(inst
->dst
.index
< MAX_TEMPS
);
3296 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3297 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3301 /* For a CMP to be considered a conditional write, the destination
3302 * register and source register two must be the same. */
3303 if (inst
->op
== TGSI_OPCODE_CMP
3304 && !(inst
->dst
.writemask
& prevWriteMask
)
3305 && inst
->src
[2].file
== inst
->dst
.file
3306 && inst
->src
[2].index
== inst
->dst
.index
3307 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3309 inst
->op
= TGSI_OPCODE_MOV
;
3310 inst
->src
[0] = inst
->src
[1];
3314 delete [] tempWrites
;
3317 /* Replaces all references to a temporary register index with another index. */
3319 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3321 foreach_list(node
, &this->instructions
) {
3322 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3325 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3326 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3327 inst
->src
[j
].index
== index
) {
3328 inst
->src
[j
].index
= new_index
;
3332 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3333 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3334 inst
->tex_offsets
[j
].index
== index
) {
3335 inst
->tex_offsets
[j
].index
= new_index
;
3339 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3340 inst
->dst
.index
= new_index
;
3346 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3348 int depth
= 0; /* loop depth */
3349 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3352 foreach_list(node
, &this->instructions
) {
3353 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3355 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3356 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3357 inst
->src
[j
].index
== index
) {
3358 return (depth
== 0) ? i
: loop_start
;
3361 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3362 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3363 inst
->tex_offsets
[j
].index
== index
) {
3364 return (depth
== 0) ? i
: loop_start
;
3368 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3371 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3384 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3386 int depth
= 0; /* loop depth */
3387 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3390 foreach_list(node
, &this->instructions
) {
3391 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3393 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3394 return (depth
== 0) ? i
: loop_start
;
3397 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3400 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3413 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3415 int depth
= 0; /* loop depth */
3416 int last
= -1; /* index of last instruction that reads the temporary */
3419 foreach_list(node
, &this->instructions
) {
3420 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3422 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3423 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3424 inst
->src
[j
].index
== index
) {
3425 last
= (depth
== 0) ? i
: -2;
3428 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3429 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3430 inst
->tex_offsets
[j
].index
== index
)
3431 last
= (depth
== 0) ? i
: -2;
3434 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3436 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3437 if (--depth
== 0 && last
== -2)
3449 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3451 int depth
= 0; /* loop depth */
3452 int last
= -1; /* index of last instruction that writes to the temporary */
3455 foreach_list(node
, &this->instructions
) {
3456 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3458 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3459 last
= (depth
== 0) ? i
: -2;
3461 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3463 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3464 if (--depth
== 0 && last
== -2)
3476 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3477 * channels for copy propagation and updates following instructions to
3478 * use the original versions.
3480 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3481 * will occur. As an example, a TXP production before this pass:
3483 * 0: MOV TEMP[1], INPUT[4].xyyy;
3484 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3485 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3489 * 0: MOV TEMP[1], INPUT[4].xyyy;
3490 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3491 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3493 * which allows for dead code elimination on TEMP[1]'s writes.
3496 glsl_to_tgsi_visitor::copy_propagate(void)
3498 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3499 glsl_to_tgsi_instruction
*,
3500 this->next_temp
* 4);
3501 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3504 foreach_list(node
, &this->instructions
) {
3505 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3507 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3508 || inst
->dst
.index
< this->next_temp
);
3510 /* First, do any copy propagation possible into the src regs. */
3511 for (int r
= 0; r
< 3; r
++) {
3512 glsl_to_tgsi_instruction
*first
= NULL
;
3514 int acp_base
= inst
->src
[r
].index
* 4;
3516 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3517 inst
->src
[r
].reladdr
||
3518 inst
->src
[r
].reladdr2
)
3521 /* See if we can find entries in the ACP consisting of MOVs
3522 * from the same src register for all the swizzled channels
3523 * of this src register reference.
3525 for (int i
= 0; i
< 4; i
++) {
3526 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3527 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3534 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3539 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3540 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3548 /* We've now validated that we can copy-propagate to
3549 * replace this src register reference. Do it.
3551 inst
->src
[r
].file
= first
->src
[0].file
;
3552 inst
->src
[r
].index
= first
->src
[0].index
;
3553 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3554 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3557 for (int i
= 0; i
< 4; i
++) {
3558 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3559 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3560 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3563 inst
->src
[r
].swizzle
= swizzle
;
3568 case TGSI_OPCODE_BGNLOOP
:
3569 case TGSI_OPCODE_ENDLOOP
:
3570 /* End of a basic block, clear the ACP entirely. */
3571 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3574 case TGSI_OPCODE_IF
:
3575 case TGSI_OPCODE_UIF
:
3579 case TGSI_OPCODE_ENDIF
:
3580 case TGSI_OPCODE_ELSE
:
3581 /* Clear all channels written inside the block from the ACP, but
3582 * leaving those that were not touched.
3584 for (int r
= 0; r
< this->next_temp
; r
++) {
3585 for (int c
= 0; c
< 4; c
++) {
3586 if (!acp
[4 * r
+ c
])
3589 if (acp_level
[4 * r
+ c
] >= level
)
3590 acp
[4 * r
+ c
] = NULL
;
3593 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3598 /* Continuing the block, clear any written channels from
3601 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3602 /* Any temporary might be written, so no copy propagation
3603 * across this instruction.
3605 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3606 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3607 inst
->dst
.reladdr
) {
3608 /* Any output might be written, so no copy propagation
3609 * from outputs across this instruction.
3611 for (int r
= 0; r
< this->next_temp
; r
++) {
3612 for (int c
= 0; c
< 4; c
++) {
3613 if (!acp
[4 * r
+ c
])
3616 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3617 acp
[4 * r
+ c
] = NULL
;
3620 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3621 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3622 /* Clear where it's used as dst. */
3623 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3624 for (int c
= 0; c
< 4; c
++) {
3625 if (inst
->dst
.writemask
& (1 << c
)) {
3626 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3631 /* Clear where it's used as src. */
3632 for (int r
= 0; r
< this->next_temp
; r
++) {
3633 for (int c
= 0; c
< 4; c
++) {
3634 if (!acp
[4 * r
+ c
])
3637 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3639 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3640 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3641 inst
->dst
.writemask
& (1 << src_chan
))
3643 acp
[4 * r
+ c
] = NULL
;
3651 /* If this is a copy, add it to the ACP. */
3652 if (inst
->op
== TGSI_OPCODE_MOV
&&
3653 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3654 !(inst
->dst
.file
== inst
->src
[0].file
&&
3655 inst
->dst
.index
== inst
->src
[0].index
) &&
3656 !inst
->dst
.reladdr
&&
3658 !inst
->src
[0].reladdr
&&
3659 !inst
->src
[0].reladdr2
&&
3660 !inst
->src
[0].negate
) {
3661 for (int i
= 0; i
< 4; i
++) {
3662 if (inst
->dst
.writemask
& (1 << i
)) {
3663 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3664 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3670 ralloc_free(acp_level
);
3675 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3677 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3678 * will occur. As an example, a TXP production after copy propagation but
3681 * 0: MOV TEMP[1], INPUT[4].xyyy;
3682 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3683 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3685 * and after this pass:
3687 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3689 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3690 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3693 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3697 for (i
=0; i
< this->next_temp
; i
++) {
3698 int last_read
= get_last_temp_read(i
);
3701 foreach_list_safe(node
, &this->instructions
) {
3702 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3704 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3717 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3718 * code elimination. This is less primitive than eliminate_dead_code(), as it
3719 * is per-channel and can detect consecutive writes without a read between them
3720 * as dead code. However, there is some dead code that can be eliminated by
3721 * eliminate_dead_code() but not this function - for example, this function
3722 * cannot eliminate an instruction writing to a register that is never read and
3723 * is the only instruction writing to that register.
3725 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3729 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3731 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3732 glsl_to_tgsi_instruction
*,
3733 this->next_temp
* 4);
3734 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3738 foreach_list(node
, &this->instructions
) {
3739 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3741 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3742 || inst
->dst
.index
< this->next_temp
);
3745 case TGSI_OPCODE_BGNLOOP
:
3746 case TGSI_OPCODE_ENDLOOP
:
3747 case TGSI_OPCODE_CONT
:
3748 case TGSI_OPCODE_BRK
:
3749 /* End of a basic block, clear the write array entirely.
3751 * This keeps us from killing dead code when the writes are
3752 * on either side of a loop, even when the register isn't touched
3753 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3754 * dead code of this type, so it shouldn't make a difference as long as
3755 * the dead code elimination pass in the GLSL compiler does its job.
3757 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3760 case TGSI_OPCODE_ENDIF
:
3761 case TGSI_OPCODE_ELSE
:
3762 /* Promote the recorded level of all channels written inside the
3763 * preceding if or else block to the level above the if/else block.
3765 for (int r
= 0; r
< this->next_temp
; r
++) {
3766 for (int c
= 0; c
< 4; c
++) {
3767 if (!writes
[4 * r
+ c
])
3770 if (write_level
[4 * r
+ c
] == level
)
3771 write_level
[4 * r
+ c
] = level
-1;
3775 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3780 case TGSI_OPCODE_IF
:
3781 case TGSI_OPCODE_UIF
:
3783 /* fallthrough to default case to mark the condition as read */
3786 /* Continuing the block, clear any channels from the write array that
3787 * are read by this instruction.
3789 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3790 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3791 /* Any temporary might be read, so no dead code elimination
3792 * across this instruction.
3794 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3795 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3796 /* Clear where it's used as src. */
3797 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3798 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3799 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3800 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3802 for (int c
= 0; c
< 4; c
++) {
3803 if (src_chans
& (1 << c
)) {
3804 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3809 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
3810 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
3811 /* Any temporary might be read, so no dead code elimination
3812 * across this instruction.
3814 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3815 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
3816 /* Clear where it's used as src. */
3817 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
3818 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
3819 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
3820 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
3822 for (int c
= 0; c
< 4; c
++) {
3823 if (src_chans
& (1 << c
)) {
3824 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
3832 /* If this instruction writes to a temporary, add it to the write array.
3833 * If there is already an instruction in the write array for one or more
3834 * of the channels, flag that channel write as dead.
3836 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3837 !inst
->dst
.reladdr
&&
3839 for (int c
= 0; c
< 4; c
++) {
3840 if (inst
->dst
.writemask
& (1 << c
)) {
3841 if (writes
[4 * inst
->dst
.index
+ c
]) {
3842 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3845 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3847 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3848 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3854 /* Anything still in the write array at this point is dead code. */
3855 for (int r
= 0; r
< this->next_temp
; r
++) {
3856 for (int c
= 0; c
< 4; c
++) {
3857 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3859 inst
->dead_mask
|= (1 << c
);
3863 /* Now actually remove the instructions that are completely dead and update
3864 * the writemask of other instructions with dead channels.
3866 foreach_list_safe(node
, &this->instructions
) {
3867 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3869 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3871 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3876 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3879 ralloc_free(write_level
);
3880 ralloc_free(writes
);
3885 /* Merges temporary registers together where possible to reduce the number of
3886 * registers needed to run a program.
3888 * Produces optimal code only after copy propagation and dead code elimination
3891 glsl_to_tgsi_visitor::merge_registers(void)
3893 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3894 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3897 /* Read the indices of the last read and first write to each temp register
3898 * into an array so that we don't have to traverse the instruction list as
3900 for (i
=0; i
< this->next_temp
; i
++) {
3901 last_reads
[i
] = get_last_temp_read(i
);
3902 first_writes
[i
] = get_first_temp_write(i
);
3905 /* Start looking for registers with non-overlapping usages that can be
3906 * merged together. */
3907 for (i
=0; i
< this->next_temp
; i
++) {
3908 /* Don't touch unused registers. */
3909 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3911 for (j
=0; j
< this->next_temp
; j
++) {
3912 /* Don't touch unused registers. */
3913 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3915 /* We can merge the two registers if the first write to j is after or
3916 * in the same instruction as the last read from i. Note that the
3917 * register at index i will always be used earlier or at the same time
3918 * as the register at index j. */
3919 if (first_writes
[i
] <= first_writes
[j
] &&
3920 last_reads
[i
] <= first_writes
[j
])
3922 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3924 /* Update the first_writes and last_reads arrays with the new
3925 * values for the merged register index, and mark the newly unused
3926 * register index as such. */
3927 last_reads
[i
] = last_reads
[j
];
3928 first_writes
[j
] = -1;
3934 ralloc_free(last_reads
);
3935 ralloc_free(first_writes
);
3938 /* Reassign indices to temporary registers by reusing unused indices created
3939 * by optimization passes. */
3941 glsl_to_tgsi_visitor::renumber_registers(void)
3946 for (i
=0; i
< this->next_temp
; i
++) {
3947 if (get_first_temp_read(i
) < 0) continue;
3949 rename_temp_register(i
, new_index
);
3953 this->next_temp
= new_index
;
3957 * Returns a fragment program which implements the current pixel transfer ops.
3958 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3961 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3962 glsl_to_tgsi_visitor
*original
,
3963 int scale_and_bias
, int pixel_maps
)
3965 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3966 struct st_context
*st
= st_context(original
->ctx
);
3967 struct gl_program
*prog
= &fp
->Base
.Base
;
3968 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3969 st_src_reg coord
, src0
;
3971 glsl_to_tgsi_instruction
*inst
;
3973 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3974 v
->ctx
= original
->ctx
;
3976 v
->shader_program
= NULL
;
3977 v
->glsl_version
= original
->glsl_version
;
3978 v
->native_integers
= original
->native_integers
;
3979 v
->options
= original
->options
;
3980 v
->next_temp
= original
->next_temp
;
3981 v
->num_address_regs
= original
->num_address_regs
;
3982 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3983 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3984 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3985 v
->num_immediates
= original
->num_immediates
;
3988 * Get initial pixel color from the texture.
3989 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3991 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3992 src0
= v
->get_temp(glsl_type::vec4_type
);
3993 dst0
= st_dst_reg(src0
);
3994 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3996 inst
->tex_target
= TEXTURE_2D_INDEX
;
3998 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3999 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
4000 v
->samplers_used
|= (1 << 0);
4002 if (scale_and_bias
) {
4003 static const gl_state_index scale_state
[STATE_LENGTH
] =
4004 { STATE_INTERNAL
, STATE_PT_SCALE
,
4005 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4006 static const gl_state_index bias_state
[STATE_LENGTH
] =
4007 { STATE_INTERNAL
, STATE_PT_BIAS
,
4008 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4009 GLint scale_p
, bias_p
;
4010 st_src_reg scale
, bias
;
4012 scale_p
= _mesa_add_state_reference(params
, scale_state
);
4013 bias_p
= _mesa_add_state_reference(params
, bias_state
);
4015 /* MAD colorTemp, colorTemp, scale, bias; */
4016 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
4017 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
4018 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
4022 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
4023 st_dst_reg temp_dst
= st_dst_reg(temp
);
4025 assert(st
->pixel_xfer
.pixelmap_texture
);
4027 /* With a little effort, we can do four pixel map look-ups with
4028 * two TEX instructions:
4031 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4032 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
4033 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4035 inst
->tex_target
= TEXTURE_2D_INDEX
;
4037 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4038 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
4039 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
4040 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4042 inst
->tex_target
= TEXTURE_2D_INDEX
;
4044 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
4045 v
->samplers_used
|= (1 << 1);
4047 /* MOV colorTemp, temp; */
4048 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4051 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4053 foreach_list(node
, &original
->instructions
) {
4054 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4055 glsl_to_tgsi_instruction
*newinst
;
4056 st_src_reg src_regs
[3];
4058 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4059 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4061 for (int i
=0; i
<3; i
++) {
4062 src_regs
[i
] = inst
->src
[i
];
4063 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4064 src_regs
[i
].index
== VARYING_SLOT_COL0
)
4066 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4067 src_regs
[i
].index
= src0
.index
;
4069 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4070 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4073 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4074 newinst
->tex_target
= inst
->tex_target
;
4077 /* Make modifications to fragment program info. */
4078 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4079 original
->prog
->Parameters
);
4080 _mesa_free_parameter_list(params
);
4081 count_resources(v
, prog
);
4082 fp
->glsl_to_tgsi
= v
;
4086 * Make fragment program for glBitmap:
4087 * Sample the texture and kill the fragment if the bit is 0.
4088 * This program will be combined with the user's fragment program.
4090 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4093 get_bitmap_visitor(struct st_fragment_program
*fp
,
4094 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4096 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4097 struct st_context
*st
= st_context(original
->ctx
);
4098 struct gl_program
*prog
= &fp
->Base
.Base
;
4099 st_src_reg coord
, src0
;
4101 glsl_to_tgsi_instruction
*inst
;
4103 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4104 v
->ctx
= original
->ctx
;
4106 v
->shader_program
= NULL
;
4107 v
->glsl_version
= original
->glsl_version
;
4108 v
->native_integers
= original
->native_integers
;
4109 v
->options
= original
->options
;
4110 v
->next_temp
= original
->next_temp
;
4111 v
->num_address_regs
= original
->num_address_regs
;
4112 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4113 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4114 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4115 v
->num_immediates
= original
->num_immediates
;
4117 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4118 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4119 src0
= v
->get_temp(glsl_type::vec4_type
);
4120 dst0
= st_dst_reg(src0
);
4121 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4122 inst
->sampler
= samplerIndex
;
4123 inst
->tex_target
= TEXTURE_2D_INDEX
;
4125 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4126 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4127 v
->samplers_used
|= (1 << samplerIndex
);
4129 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4130 src0
.negate
= NEGATE_XYZW
;
4131 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4132 src0
.swizzle
= SWIZZLE_XXXX
;
4133 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4135 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4137 foreach_list(node
, &original
->instructions
) {
4138 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4139 glsl_to_tgsi_instruction
*newinst
;
4140 st_src_reg src_regs
[3];
4142 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4143 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4145 for (int i
=0; i
<3; i
++) {
4146 src_regs
[i
] = inst
->src
[i
];
4147 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4148 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4151 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4152 newinst
->tex_target
= inst
->tex_target
;
4155 /* Make modifications to fragment program info. */
4156 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4157 count_resources(v
, prog
);
4158 fp
->glsl_to_tgsi
= v
;
4161 /* ------------------------- TGSI conversion stuff -------------------------- */
4163 unsigned branch_target
;
4168 * Intermediate state used during shader translation.
4170 struct st_translate
{
4171 struct ureg_program
*ureg
;
4173 struct ureg_dst temps
[MAX_TEMPS
];
4174 struct ureg_dst arrays
[MAX_ARRAYS
];
4175 struct ureg_src
*constants
;
4176 struct ureg_src
*immediates
;
4177 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4178 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4179 struct ureg_dst address
[2];
4180 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4181 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4182 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4183 unsigned array_sizes
[MAX_ARRAYS
];
4185 const GLuint
*inputMapping
;
4186 const GLuint
*outputMapping
;
4188 /* For every instruction that contains a label (eg CALL), keep
4189 * details so that we can go back afterwards and emit the correct
4190 * tgsi instruction number for each label.
4192 struct label
*labels
;
4193 unsigned labels_size
;
4194 unsigned labels_count
;
4196 /* Keep a record of the tgsi instruction number that each mesa
4197 * instruction starts at, will be used to fix up labels after
4202 unsigned insn_count
;
4204 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4209 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4210 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4212 TGSI_SEMANTIC_VERTEXID
,
4213 TGSI_SEMANTIC_INSTANCEID
,
4214 TGSI_SEMANTIC_SAMPLEID
,
4215 TGSI_SEMANTIC_SAMPLEPOS
,
4216 TGSI_SEMANTIC_SAMPLEMASK
,
4217 TGSI_SEMANTIC_INVOCATIONID
,
4221 * Make note of a branch to a label in the TGSI code.
4222 * After we've emitted all instructions, we'll go over the list
4223 * of labels built here and patch the TGSI code with the actual
4224 * location of each label.
4226 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4230 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4231 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4232 t
->labels
= (struct label
*)realloc(t
->labels
,
4233 t
->labels_size
* sizeof(struct label
));
4234 if (t
->labels
== NULL
) {
4235 static unsigned dummy
;
4241 i
= t
->labels_count
++;
4242 t
->labels
[i
].branch_target
= branch_target
;
4243 return &t
->labels
[i
].token
;
4247 * Called prior to emitting the TGSI code for each instruction.
4248 * Allocate additional space for instructions if needed.
4249 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4250 * the next TGSI instruction.
4252 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4254 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4255 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4256 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4257 if (t
->insn
== NULL
) {
4263 t
->insn
[t
->insn_count
++] = start
;
4267 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4269 static struct ureg_src
4270 emit_immediate(struct st_translate
*t
,
4271 gl_constant_value values
[4],
4274 struct ureg_program
*ureg
= t
->ureg
;
4279 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4281 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4282 case GL_UNSIGNED_INT
:
4284 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4286 assert(!"should not get here - type must be float, int, uint, or bool");
4287 return ureg_src_undef();
4292 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4294 static struct ureg_dst
4295 dst_register(struct st_translate
*t
,
4296 gl_register_file file
,
4302 case PROGRAM_UNDEFINED
:
4303 return ureg_dst_undef();
4305 case PROGRAM_TEMPORARY
:
4307 assert(index
< (int) Elements(t
->temps
));
4309 if (ureg_dst_is_undef(t
->temps
[index
]))
4310 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4312 return t
->temps
[index
];
4315 array
= index
>> 16;
4318 assert(array
< (int) Elements(t
->arrays
));
4320 if (ureg_dst_is_undef(t
->arrays
[array
]))
4321 t
->arrays
[array
] = ureg_DECL_array_temporary(
4322 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4324 return ureg_dst_array_offset(t
->arrays
[array
],
4325 (int)(index
& 0xFFFF) - 0x8000);
4327 case PROGRAM_OUTPUT
:
4328 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4329 assert(index
< VARYING_SLOT_MAX
);
4330 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4331 assert(index
< FRAG_RESULT_MAX
);
4333 assert(index
< VARYING_SLOT_MAX
);
4335 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4337 return t
->outputs
[t
->outputMapping
[index
]];
4339 case PROGRAM_ADDRESS
:
4340 return t
->address
[index
];
4343 assert(!"unknown dst register file");
4344 return ureg_dst_undef();
4349 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4351 static struct ureg_src
4352 src_register(struct st_translate
*t
,
4353 gl_register_file file
,
4354 GLint index
, GLint index2D
)
4357 case PROGRAM_UNDEFINED
:
4358 return ureg_src_undef();
4360 case PROGRAM_TEMPORARY
:
4362 return ureg_src(dst_register(t
, file
, index
));
4364 case PROGRAM_UNIFORM
:
4366 return t
->constants
[index
];
4367 case PROGRAM_STATE_VAR
:
4368 case PROGRAM_CONSTANT
: /* ie, immediate */
4370 struct ureg_src src
;
4371 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4373 src
.DimensionIndex
= index2D
;
4375 } else if (index
< 0)
4376 return ureg_DECL_constant(t
->ureg
, 0);
4378 return t
->constants
[index
];
4380 case PROGRAM_IMMEDIATE
:
4381 return t
->immediates
[index
];
4384 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4385 return t
->inputs
[t
->inputMapping
[index
]];
4387 case PROGRAM_OUTPUT
:
4388 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4389 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4391 case PROGRAM_ADDRESS
:
4392 return ureg_src(t
->address
[index
]);
4394 case PROGRAM_SYSTEM_VALUE
:
4395 assert(index
< (int) Elements(t
->systemValues
));
4396 return t
->systemValues
[index
];
4399 assert(!"unknown src register file");
4400 return ureg_src_undef();
4405 * Create a TGSI ureg_dst register from an st_dst_reg.
4407 static struct ureg_dst
4408 translate_dst(struct st_translate
*t
,
4409 const st_dst_reg
*dst_reg
,
4410 bool saturate
, bool clamp_color
)
4412 struct ureg_dst dst
= dst_register(t
,
4416 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4419 dst
= ureg_saturate(dst
);
4420 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4421 /* Clamp colors for ARB_color_buffer_float. */
4422 switch (t
->procType
) {
4423 case TGSI_PROCESSOR_VERTEX
:
4424 /* XXX if the geometry shader is present, this must be done there
4425 * instead of here. */
4426 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4427 dst_reg
->index
== VARYING_SLOT_COL1
||
4428 dst_reg
->index
== VARYING_SLOT_BFC0
||
4429 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4430 dst
= ureg_saturate(dst
);
4434 case TGSI_PROCESSOR_FRAGMENT
:
4435 if (dst_reg
->index
== FRAG_RESULT_COLOR
||
4436 dst_reg
->index
>= FRAG_RESULT_DATA0
) {
4437 dst
= ureg_saturate(dst
);
4443 if (dst_reg
->reladdr
!= NULL
) {
4444 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4445 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4452 * Create a TGSI ureg_src register from an st_src_reg.
4454 static struct ureg_src
4455 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4457 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4459 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& src_reg
->has_index2
) {
4460 src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4461 if (src_reg
->reladdr2
)
4462 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4465 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4468 src
= ureg_swizzle(src
,
4469 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4470 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4471 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4472 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4474 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4475 src
= ureg_negate(src
);
4477 if (src_reg
->reladdr
!= NULL
) {
4478 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4479 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4485 static struct tgsi_texture_offset
4486 translate_tex_offset(struct st_translate
*t
,
4487 const st_src_reg
*in_offset
, int idx
)
4489 struct tgsi_texture_offset offset
;
4490 struct ureg_src imm_src
;
4491 struct ureg_dst dst
;
4494 switch (in_offset
->file
) {
4495 case PROGRAM_IMMEDIATE
:
4496 imm_src
= t
->immediates
[in_offset
->index
];
4498 offset
.File
= imm_src
.File
;
4499 offset
.Index
= imm_src
.Index
;
4500 offset
.SwizzleX
= imm_src
.SwizzleX
;
4501 offset
.SwizzleY
= imm_src
.SwizzleY
;
4502 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4505 case PROGRAM_TEMPORARY
:
4506 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4507 offset
.File
= imm_src
.File
;
4508 offset
.Index
= imm_src
.Index
;
4509 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4510 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4511 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4515 array
= in_offset
->index
>> 16;
4518 assert(array
< (int) Elements(t
->arrays
));
4520 dst
= t
->arrays
[array
];
4521 offset
.File
= dst
.File
;
4522 offset
.Index
= dst
.Index
+ (in_offset
->index
& 0xFFFF) - 0x8000;
4523 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4524 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4525 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4535 compile_tgsi_instruction(struct st_translate
*t
,
4536 const glsl_to_tgsi_instruction
*inst
,
4537 bool clamp_dst_color_output
)
4539 struct ureg_program
*ureg
= t
->ureg
;
4541 struct ureg_dst dst
[1];
4542 struct ureg_src src
[4];
4543 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4547 unsigned tex_target
;
4549 num_dst
= num_inst_dst_regs(inst
->op
);
4550 num_src
= num_inst_src_regs(inst
->op
);
4553 dst
[0] = translate_dst(t
,
4556 clamp_dst_color_output
);
4558 for (i
= 0; i
< num_src
; i
++)
4559 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4562 case TGSI_OPCODE_BGNLOOP
:
4563 case TGSI_OPCODE_CAL
:
4564 case TGSI_OPCODE_ELSE
:
4565 case TGSI_OPCODE_ENDLOOP
:
4566 case TGSI_OPCODE_IF
:
4567 case TGSI_OPCODE_UIF
:
4568 assert(num_dst
== 0);
4569 ureg_label_insn(ureg
,
4573 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4576 case TGSI_OPCODE_TEX
:
4577 case TGSI_OPCODE_TXB
:
4578 case TGSI_OPCODE_TXD
:
4579 case TGSI_OPCODE_TXL
:
4580 case TGSI_OPCODE_TXP
:
4581 case TGSI_OPCODE_TXQ
:
4582 case TGSI_OPCODE_TXF
:
4583 case TGSI_OPCODE_TEX2
:
4584 case TGSI_OPCODE_TXB2
:
4585 case TGSI_OPCODE_TXL2
:
4586 case TGSI_OPCODE_TG4
:
4587 case TGSI_OPCODE_LODQ
:
4588 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4589 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4590 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
4592 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4598 texoffsets
, inst
->tex_offset_num_offset
,
4602 case TGSI_OPCODE_SCS
:
4603 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4604 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4617 * Emit the TGSI instructions for inverting and adjusting WPOS.
4618 * This code is unavoidable because it also depends on whether
4619 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4622 emit_wpos_adjustment( struct st_translate
*t
,
4623 const struct gl_program
*program
,
4625 GLfloat adjX
, GLfloat adjY
[2])
4627 struct ureg_program
*ureg
= t
->ureg
;
4629 /* Fragment program uses fragment position input.
4630 * Need to replace instances of INPUT[WPOS] with temp T
4631 * where T = INPUT[WPOS] by y is inverted.
4633 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4634 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4635 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4637 /* XXX: note we are modifying the incoming shader here! Need to
4638 * do this before emitting the constant decls below, or this
4641 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4642 wposTransformState
);
4644 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4645 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4646 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4648 /* First, apply the coordinate shift: */
4649 if (adjX
|| adjY
[0] || adjY
[1]) {
4650 if (adjY
[0] != adjY
[1]) {
4651 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4652 * depending on whether inversion is actually going to be applied
4653 * or not, which is determined by testing against the inversion
4654 * state variable used below, which will be either +1 or -1.
4656 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4658 ureg_CMP(ureg
, adj_temp
,
4659 ureg_scalar(wpostrans
, invert
? 2 : 0),
4660 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4661 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4662 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4664 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4665 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4667 wpos_input
= ureg_src(wpos_temp
);
4669 /* MOV wpos_temp, input[wpos]
4671 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4674 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4675 * inversion/identity, or the other way around if we're drawing to an FBO.
4678 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4681 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4683 ureg_scalar(wpostrans
, 0),
4684 ureg_scalar(wpostrans
, 1));
4686 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4689 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4691 ureg_scalar(wpostrans
, 2),
4692 ureg_scalar(wpostrans
, 3));
4695 /* Use wpos_temp as position input from here on:
4697 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4702 * Emit fragment position/ooordinate code.
4705 emit_wpos(struct st_context
*st
,
4706 struct st_translate
*t
,
4707 const struct gl_program
*program
,
4708 struct ureg_program
*ureg
)
4710 const struct gl_fragment_program
*fp
=
4711 (const struct gl_fragment_program
*) program
;
4712 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4713 GLfloat adjX
= 0.0f
;
4714 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4715 boolean invert
= FALSE
;
4717 /* Query the pixel center conventions supported by the pipe driver and set
4718 * adjX, adjY to help out if it cannot handle the requested one internally.
4720 * The bias of the y-coordinate depends on whether y-inversion takes place
4721 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4722 * drawing to an FBO (causes additional inversion), and whether the the pipe
4723 * driver origin and the requested origin differ (the latter condition is
4724 * stored in the 'invert' variable).
4726 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4728 * center shift only:
4733 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4734 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4735 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4736 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4738 * inversion and center shift:
4739 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4740 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4741 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4742 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4744 if (fp
->OriginUpperLeft
) {
4745 /* Fragment shader wants origin in upper-left */
4746 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4747 /* the driver supports upper-left origin */
4749 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4750 /* the driver supports lower-left origin, need to invert Y */
4751 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4758 /* Fragment shader wants origin in lower-left */
4759 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4760 /* the driver supports lower-left origin */
4761 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4762 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4763 /* the driver supports upper-left origin, need to invert Y */
4769 if (fp
->PixelCenterInteger
) {
4770 /* Fragment shader wants pixel center integer */
4771 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4772 /* the driver supports pixel center integer */
4774 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4776 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4777 /* the driver supports pixel center half integer, need to bias X,Y */
4786 /* Fragment shader wants pixel center half integer */
4787 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4788 /* the driver supports pixel center half integer */
4790 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4791 /* the driver supports pixel center integer, need to bias X,Y */
4792 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4793 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4799 /* we invert after adjustment so that we avoid the MOV to temporary,
4800 * and reuse the adjustment ADD instead */
4801 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4805 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4806 * TGSI uses +1 for front, -1 for back.
4807 * This function converts the TGSI value to the GL value. Simply clamping/
4808 * saturating the value to [0,1] does the job.
4811 emit_face_var(struct st_translate
*t
)
4813 struct ureg_program
*ureg
= t
->ureg
;
4814 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4815 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4817 /* MOV_SAT face_temp, input[face] */
4818 face_temp
= ureg_saturate(face_temp
);
4819 ureg_MOV(ureg
, face_temp
, face_input
);
4821 /* Use face_temp as face input from here on: */
4822 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4826 emit_edgeflags(struct st_translate
*t
)
4828 struct ureg_program
*ureg
= t
->ureg
;
4829 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4830 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4832 ureg_MOV(ureg
, edge_dst
, edge_src
);
4836 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4837 * \param program the program to translate
4838 * \param numInputs number of input registers used
4839 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4841 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4842 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4844 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4845 * \param numOutputs number of output registers used
4846 * \param outputMapping maps Mesa fragment program outputs to TGSI
4848 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4849 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4852 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4854 extern "C" enum pipe_error
4855 st_translate_program(
4856 struct gl_context
*ctx
,
4858 struct ureg_program
*ureg
,
4859 glsl_to_tgsi_visitor
*program
,
4860 const struct gl_program
*proginfo
,
4862 const GLuint inputMapping
[],
4863 const ubyte inputSemanticName
[],
4864 const ubyte inputSemanticIndex
[],
4865 const GLuint interpMode
[],
4866 const GLboolean is_centroid
[],
4868 const GLuint outputMapping
[],
4869 const ubyte outputSemanticName
[],
4870 const ubyte outputSemanticIndex
[],
4871 boolean passthrough_edgeflags
,
4872 boolean clamp_color
)
4874 struct st_translate
*t
;
4876 enum pipe_error ret
= PIPE_OK
;
4878 assert(numInputs
<= Elements(t
->inputs
));
4879 assert(numOutputs
<= Elements(t
->outputs
));
4881 t
= CALLOC_STRUCT(st_translate
);
4883 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4887 memset(t
, 0, sizeof *t
);
4889 t
->procType
= procType
;
4890 t
->inputMapping
= inputMapping
;
4891 t
->outputMapping
= outputMapping
;
4894 if (program
->shader_program
) {
4895 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4896 struct gl_uniform_storage
*const storage
=
4897 &program
->shader_program
->UniformStorage
[i
];
4899 _mesa_uniform_detach_all_driver_storage(storage
);
4904 * Declare input attributes.
4906 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4907 for (i
= 0; i
< numInputs
; i
++) {
4908 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4909 inputSemanticName
[i
],
4910 inputSemanticIndex
[i
],
4915 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4916 /* Must do this after setting up t->inputs, and before
4917 * emitting constant references, below:
4919 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4922 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4926 * Declare output attributes.
4928 for (i
= 0; i
< numOutputs
; i
++) {
4929 switch (outputSemanticName
[i
]) {
4930 case TGSI_SEMANTIC_POSITION
:
4931 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4932 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4933 outputSemanticIndex
[i
]);
4934 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4936 case TGSI_SEMANTIC_STENCIL
:
4937 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4938 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4939 outputSemanticIndex
[i
]);
4940 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4942 case TGSI_SEMANTIC_COLOR
:
4943 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4944 TGSI_SEMANTIC_COLOR
,
4945 outputSemanticIndex
[i
]);
4947 case TGSI_SEMANTIC_SAMPLEMASK
:
4948 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4949 TGSI_SEMANTIC_SAMPLEMASK
,
4950 outputSemanticIndex
[i
]);
4951 /* TODO: If we ever support more than 32 samples, this will have
4952 * to become an array.
4954 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4957 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4958 ret
= PIPE_ERROR_BAD_INPUT
;
4963 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4964 for (i
= 0; i
< numInputs
; i
++) {
4965 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4967 inputSemanticName
[i
],
4968 inputSemanticIndex
[i
]);
4971 for (i
= 0; i
< numOutputs
; i
++) {
4972 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4973 outputSemanticName
[i
],
4974 outputSemanticIndex
[i
]);
4978 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4980 for (i
= 0; i
< numInputs
; i
++) {
4981 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4984 for (i
= 0; i
< numOutputs
; i
++) {
4985 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4986 outputSemanticName
[i
],
4987 outputSemanticIndex
[i
]);
4988 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
4989 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4991 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
4992 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
4993 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4996 if (passthrough_edgeflags
)
5000 /* Declare address register.
5002 if (program
->num_address_regs
> 0) {
5003 assert(program
->num_address_regs
<= 2);
5004 t
->address
[0] = ureg_DECL_address(ureg
);
5005 if (program
->num_address_regs
== 2)
5006 t
->address
[1] = ureg_DECL_address(ureg
);
5009 /* Declare misc input registers
5012 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
5013 unsigned numSys
= 0;
5014 for (i
= 0; sysInputs
; i
++) {
5015 if (sysInputs
& (1 << i
)) {
5016 unsigned semName
= mesa_sysval_to_semantic
[i
];
5017 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
5018 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
5019 semName
== TGSI_SEMANTIC_VERTEXID
) {
5020 /* From Gallium perspective, these system values are always
5021 * integer, and require native integer support. However, if
5022 * native integer is supported on the vertex stage but not the
5023 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5024 * assumes these system values are floats. To resolve the
5025 * inconsistency, we insert a U2F.
5027 struct st_context
*st
= st_context(ctx
);
5028 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5029 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5030 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
5031 if (!ctx
->Const
.NativeIntegers
) {
5032 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
5033 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
5034 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
5038 sysInputs
&= ~(1 << i
);
5043 /* Copy over array sizes
5045 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
5047 /* Emit constants and uniforms. TGSI uses a single index space for these,
5048 * so we put all the translated regs in t->constants.
5050 if (proginfo
->Parameters
) {
5051 t
->constants
= (struct ureg_src
*)
5052 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
5053 if (t
->constants
== NULL
) {
5054 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5058 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
5059 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
5060 case PROGRAM_STATE_VAR
:
5061 case PROGRAM_UNIFORM
:
5062 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5065 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5066 * addressing of the const buffer.
5067 * FIXME: Be smarter and recognize param arrays:
5068 * indirect addressing is only valid within the referenced
5071 case PROGRAM_CONSTANT
:
5072 if (program
->indirect_addr_consts
)
5073 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5075 t
->constants
[i
] = emit_immediate(t
,
5076 proginfo
->Parameters
->ParameterValues
[i
],
5077 proginfo
->Parameters
->Parameters
[i
].DataType
,
5086 if (program
->shader_program
) {
5087 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
5089 for (i
= 0; i
< num_ubos
; i
++) {
5090 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
5094 /* Emit immediate values.
5096 t
->immediates
= (struct ureg_src
*)
5097 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5098 if (t
->immediates
== NULL
) {
5099 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5103 foreach_list(node
, &program
->immediates
) {
5104 immediate_storage
*imm
= (immediate_storage
*) node
;
5105 assert(i
< program
->num_immediates
);
5106 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
5108 assert(i
== program
->num_immediates
);
5110 /* texture samplers */
5111 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5112 if (program
->samplers_used
& (1 << i
)) {
5113 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5117 /* Emit each instruction in turn:
5119 foreach_list(n
, &program
->instructions
) {
5120 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5121 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*) n
, clamp_color
);
5124 /* Fix up all emitted labels:
5126 for (i
= 0; i
< t
->labels_count
; i
++) {
5127 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5128 t
->insn
[t
->labels
[i
].branch_target
]);
5131 if (program
->shader_program
) {
5132 /* This has to be done last. Any operation the can cause
5133 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5134 * program constant) has to happen before creating this linkage.
5136 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5137 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5140 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5141 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5150 free(t
->immediates
);
5153 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5161 /* ----------------------------- End TGSI code ------------------------------ */
5165 shader_stage_to_ptarget(gl_shader_stage stage
)
5168 case MESA_SHADER_VERTEX
:
5169 return PIPE_SHADER_VERTEX
;
5170 case MESA_SHADER_FRAGMENT
:
5171 return PIPE_SHADER_FRAGMENT
;
5172 case MESA_SHADER_GEOMETRY
:
5173 return PIPE_SHADER_GEOMETRY
;
5174 case MESA_SHADER_COMPUTE
:
5175 return PIPE_SHADER_COMPUTE
;
5178 assert(!"should not be reached");
5179 return PIPE_SHADER_VERTEX
;
5184 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5185 * generating Mesa IR.
5187 static struct gl_program
*
5188 get_mesa_program(struct gl_context
*ctx
,
5189 struct gl_shader_program
*shader_program
,
5190 struct gl_shader
*shader
)
5192 glsl_to_tgsi_visitor
* v
;
5193 struct gl_program
*prog
;
5194 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5196 struct gl_shader_compiler_options
*options
=
5197 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5198 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5199 unsigned ptarget
= shader_stage_to_ptarget(shader
->Stage
);
5201 validate_ir_tree(shader
->ir
);
5203 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5206 prog
->Parameters
= _mesa_new_parameter_list();
5207 v
= new glsl_to_tgsi_visitor();
5210 v
->shader_program
= shader_program
;
5211 v
->options
= options
;
5212 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5213 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5215 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5216 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5218 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5221 /* Remove reads from output registers. */
5222 lower_output_reads(shader
->ir
);
5224 /* Emit intermediate IR for main(). */
5225 visit_exec_list(shader
->ir
, v
);
5227 /* Now emit bodies for any functions that were used. */
5229 progress
= GL_FALSE
;
5231 foreach_list(node
, &v
->function_signatures
) {
5232 function_entry
*entry
= (function_entry
*) node
;
5234 if (!entry
->bgn_inst
) {
5235 v
->current_function
= entry
;
5237 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5238 entry
->bgn_inst
->function
= entry
;
5240 visit_exec_list(&entry
->sig
->body
, v
);
5242 glsl_to_tgsi_instruction
*last
;
5243 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5244 if (last
->op
!= TGSI_OPCODE_RET
)
5245 v
->emit(NULL
, TGSI_OPCODE_RET
);
5247 glsl_to_tgsi_instruction
*end
;
5248 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5249 end
->function
= entry
;
5257 /* Print out some information (for debugging purposes) used by the
5258 * optimization passes. */
5259 for (i
=0; i
< v
->next_temp
; i
++) {
5260 int fr
= v
->get_first_temp_read(i
);
5261 int fw
= v
->get_first_temp_write(i
);
5262 int lr
= v
->get_last_temp_read(i
);
5263 int lw
= v
->get_last_temp_write(i
);
5265 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5270 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5272 v
->copy_propagate();
5273 while (v
->eliminate_dead_code_advanced());
5275 v
->eliminate_dead_code();
5276 v
->merge_registers();
5277 v
->renumber_registers();
5279 /* Write the END instruction. */
5280 v
->emit(NULL
, TGSI_OPCODE_END
);
5282 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5284 printf("GLSL IR for linked %s program %d:\n",
5285 _mesa_shader_stage_to_string(shader
->Stage
),
5286 shader_program
->Name
);
5287 _mesa_print_ir(stdout
, shader
->ir
, NULL
);
5293 prog
->Instructions
= NULL
;
5294 prog
->NumInstructions
= 0;
5296 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5297 count_resources(v
, prog
);
5299 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5301 /* This has to be done last. Any operation the can cause
5302 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5303 * program constant) has to happen before creating this linkage.
5305 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5306 if (!shader_program
->LinkStatus
) {
5310 struct st_vertex_program
*stvp
;
5311 struct st_fragment_program
*stfp
;
5312 struct st_geometry_program
*stgp
;
5314 switch (shader
->Type
) {
5315 case GL_VERTEX_SHADER
:
5316 stvp
= (struct st_vertex_program
*)prog
;
5317 stvp
->glsl_to_tgsi
= v
;
5319 case GL_FRAGMENT_SHADER
:
5320 stfp
= (struct st_fragment_program
*)prog
;
5321 stfp
->glsl_to_tgsi
= v
;
5323 case GL_GEOMETRY_SHADER
:
5324 stgp
= (struct st_geometry_program
*)prog
;
5325 stgp
->glsl_to_tgsi
= v
;
5326 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5327 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5328 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5329 stgp
->Base
.Invocations
= shader_program
->Geom
.Invocations
;
5332 assert(!"should not be reached");
5342 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5344 struct gl_shader
*shader
;
5345 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5346 type
== GL_GEOMETRY_SHADER_ARB
);
5347 shader
= rzalloc(NULL
, struct gl_shader
);
5349 shader
->Type
= type
;
5350 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5351 shader
->Name
= name
;
5352 _mesa_init_shader(ctx
, shader
);
5357 struct gl_shader_program
*
5358 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5360 struct gl_shader_program
*shProg
;
5361 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5363 shProg
->Name
= name
;
5364 _mesa_init_shader_program(ctx
, shProg
);
5371 * Called via ctx->Driver.LinkShader()
5372 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5373 * with code lowering and other optimizations.
5376 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5378 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5379 assert(prog
->LinkStatus
);
5381 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5382 if (prog
->_LinkedShaders
[i
] == NULL
)
5386 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5387 const struct gl_shader_compiler_options
*options
=
5388 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5390 /* If there are forms of indirect addressing that the driver
5391 * cannot handle, perform the lowering pass.
5393 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5394 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5395 lower_variable_index_to_cond_assign(ir
,
5396 options
->EmitNoIndirectInput
,
5397 options
->EmitNoIndirectOutput
,
5398 options
->EmitNoIndirectTemp
,
5399 options
->EmitNoIndirectUniform
);
5402 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5403 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5404 LOWER_UNPACK_SNORM_2x16
|
5405 LOWER_PACK_UNORM_2x16
|
5406 LOWER_UNPACK_UNORM_2x16
|
5407 LOWER_PACK_SNORM_4x8
|
5408 LOWER_UNPACK_SNORM_4x8
|
5409 LOWER_UNPACK_UNORM_4x8
|
5410 LOWER_PACK_UNORM_4x8
|
5411 LOWER_PACK_HALF_2x16
|
5412 LOWER_UNPACK_HALF_2x16
;
5414 lower_packing_builtins(ir
, lower_inst
);
5417 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TEXTURE_GATHER_OFFSETS
))
5418 lower_offset_arrays(ir
);
5419 do_mat_op_to_vec(ir
);
5420 lower_instructions(ir
,
5428 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5429 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5431 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5432 do_vec_index_to_cond_assign(ir
);
5433 lower_vector_insert(ir
, true);
5434 lower_quadop_vector(ir
, false);
5436 if (options
->MaxIfDepth
== 0) {
5443 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5445 progress
= do_common_optimization(ir
, true, true, options
,
5446 ctx
->Const
.NativeIntegers
)
5449 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5453 validate_ir_tree(ir
);
5456 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5457 struct gl_program
*linked_prog
;
5459 if (prog
->_LinkedShaders
[i
] == NULL
)
5462 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5465 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5467 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5468 _mesa_shader_stage_to_program(i
),
5470 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5472 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5477 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5484 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5485 const GLuint outputMapping
[],
5486 struct pipe_stream_output_info
*so
)
5489 struct gl_transform_feedback_info
*info
=
5490 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5492 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5493 so
->output
[i
].register_index
=
5494 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5495 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5496 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5497 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5498 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5501 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5502 so
->stride
[i
] = info
->BufferStride
[i
];
5504 so
->num_outputs
= info
->NumOutputs
;