2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
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18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
74 (1 << PROGRAM_ENV_PARAM) | \
75 (1 << PROGRAM_STATE_VAR) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
80 * Maximum number of temporary registers.
82 * It is too big for stack allocated arrays -- it will cause stack overflow on
83 * Windows and likely Mac OS X.
85 #define MAX_TEMPS 4096
88 * Maximum number of arrays
90 #define MAX_ARRAYS 256
92 /* will be 4 for GLSL 4.00 */
93 #define MAX_GLSL_TEXTURE_OFFSET 1
98 static int swizzle_for_size(int size
);
101 * This struct is a corresponding struct to TGSI ureg_src.
105 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
109 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
110 this->swizzle
= swizzle_for_size(type
->vector_elements
);
112 this->swizzle
= SWIZZLE_XYZW
;
115 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
116 this->reladdr
= NULL
;
119 st_src_reg(gl_register_file file
, int index
, int type
)
125 this->swizzle
= SWIZZLE_XYZW
;
127 this->reladdr
= NULL
;
130 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
135 this->index2D
= index2D
;
136 this->swizzle
= SWIZZLE_XYZW
;
138 this->reladdr
= NULL
;
143 this->type
= GLSL_TYPE_ERROR
;
144 this->file
= PROGRAM_UNDEFINED
;
149 this->reladdr
= NULL
;
152 explicit st_src_reg(st_dst_reg reg
);
154 gl_register_file file
; /**< PROGRAM_* from Mesa */
155 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
157 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
158 int negate
; /**< NEGATE_XYZW mask from mesa */
159 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
160 /** Register index should be offset by the integer in this reg. */
166 st_dst_reg(gl_register_file file
, int writemask
, int type
)
170 this->writemask
= writemask
;
171 this->cond_mask
= COND_TR
;
172 this->reladdr
= NULL
;
178 this->type
= GLSL_TYPE_ERROR
;
179 this->file
= PROGRAM_UNDEFINED
;
182 this->cond_mask
= COND_TR
;
183 this->reladdr
= NULL
;
186 explicit st_dst_reg(st_src_reg reg
);
188 gl_register_file file
; /**< PROGRAM_* from Mesa */
189 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
190 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
192 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
193 /** Register index should be offset by the integer in this reg. */
197 st_src_reg::st_src_reg(st_dst_reg reg
)
199 this->type
= reg
.type
;
200 this->file
= reg
.file
;
201 this->index
= reg
.index
;
202 this->swizzle
= SWIZZLE_XYZW
;
204 this->reladdr
= reg
.reladdr
;
208 st_dst_reg::st_dst_reg(st_src_reg reg
)
210 this->type
= reg
.type
;
211 this->file
= reg
.file
;
212 this->index
= reg
.index
;
213 this->writemask
= WRITEMASK_XYZW
;
214 this->cond_mask
= COND_TR
;
215 this->reladdr
= reg
.reladdr
;
218 class glsl_to_tgsi_instruction
: public exec_node
{
220 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
225 /** Pointer to the ir source this tree came from for debugging */
227 GLboolean cond_update
;
229 int sampler
; /**< sampler index */
230 int tex_target
; /**< One of TEXTURE_*_INDEX */
231 GLboolean tex_shadow
;
232 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
233 unsigned tex_offset_num_offset
;
234 int dead_mask
; /**< Used in dead code elimination */
236 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
239 class variable_storage
: public exec_node
{
241 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
242 : file(file
), index(index
), var(var
)
247 gl_register_file file
;
249 ir_variable
*var
; /* variable that maps to this, if any */
252 class immediate_storage
: public exec_node
{
254 immediate_storage(gl_constant_value
*values
, int size
, int type
)
256 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
261 gl_constant_value values
[4];
262 int size
; /**< Number of components (1-4) */
263 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
266 class function_entry
: public exec_node
{
268 ir_function_signature
*sig
;
271 * identifier of this function signature used by the program.
273 * At the point that TGSI instructions for function calls are
274 * generated, we don't know the address of the first instruction of
275 * the function body. So we make the BranchTarget that is called a
276 * small integer and rewrite them during set_branchtargets().
281 * Pointer to first instruction of the function body.
283 * Set during function body emits after main() is processed.
285 glsl_to_tgsi_instruction
*bgn_inst
;
288 * Index of the first instruction of the function body in actual TGSI.
290 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
294 /** Storage for the return value. */
295 st_src_reg return_reg
;
298 struct glsl_to_tgsi_visitor
: public ir_visitor
{
300 glsl_to_tgsi_visitor();
301 ~glsl_to_tgsi_visitor();
303 function_entry
*current_function
;
305 struct gl_context
*ctx
;
306 struct gl_program
*prog
;
307 struct gl_shader_program
*shader_program
;
308 struct gl_shader_compiler_options
*options
;
312 unsigned array_sizes
[MAX_ARRAYS
];
315 int num_address_regs
;
317 bool indirect_addr_consts
;
320 bool native_integers
;
323 variable_storage
*find_variable_storage(ir_variable
*var
);
325 int add_constant(gl_register_file file
, gl_constant_value values
[4],
326 int size
, int datatype
, GLuint
*swizzle_out
);
328 function_entry
*get_function_signature(ir_function_signature
*sig
);
330 st_src_reg
get_temp(const glsl_type
*type
);
331 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
333 st_src_reg
st_src_reg_for_float(float val
);
334 st_src_reg
st_src_reg_for_int(int val
);
335 st_src_reg
st_src_reg_for_type(int type
, int val
);
338 * \name Visit methods
340 * As typical for the visitor pattern, there must be one \c visit method for
341 * each concrete subclass of \c ir_instruction. Virtual base classes within
342 * the hierarchy should not have \c visit methods.
345 virtual void visit(ir_variable
*);
346 virtual void visit(ir_loop
*);
347 virtual void visit(ir_loop_jump
*);
348 virtual void visit(ir_function_signature
*);
349 virtual void visit(ir_function
*);
350 virtual void visit(ir_expression
*);
351 virtual void visit(ir_swizzle
*);
352 virtual void visit(ir_dereference_variable
*);
353 virtual void visit(ir_dereference_array
*);
354 virtual void visit(ir_dereference_record
*);
355 virtual void visit(ir_assignment
*);
356 virtual void visit(ir_constant
*);
357 virtual void visit(ir_call
*);
358 virtual void visit(ir_return
*);
359 virtual void visit(ir_discard
*);
360 virtual void visit(ir_texture
*);
361 virtual void visit(ir_if
*);
362 virtual void visit(ir_emit_vertex
*);
363 virtual void visit(ir_end_primitive
*);
368 /** List of variable_storage */
371 /** List of immediate_storage */
372 exec_list immediates
;
373 unsigned num_immediates
;
375 /** List of function_entry */
376 exec_list function_signatures
;
377 int next_signature_id
;
379 /** List of glsl_to_tgsi_instruction */
380 exec_list instructions
;
382 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
384 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
385 st_dst_reg dst
, st_src_reg src0
);
387 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
388 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
390 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
392 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
394 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
396 st_src_reg src0
, st_src_reg src1
);
399 * Emit the correct dot-product instruction for the type of arguments
401 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
407 void emit_scalar(ir_instruction
*ir
, unsigned op
,
408 st_dst_reg dst
, st_src_reg src0
);
410 void emit_scalar(ir_instruction
*ir
, unsigned op
,
411 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
413 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
415 void emit_scs(ir_instruction
*ir
, unsigned op
,
416 st_dst_reg dst
, const st_src_reg
&src
);
418 bool try_emit_mad(ir_expression
*ir
,
420 bool try_emit_mad_for_and_not(ir_expression
*ir
,
422 bool try_emit_sat(ir_expression
*ir
);
424 void emit_swz(ir_expression
*ir
);
426 bool process_move_condition(ir_rvalue
*ir
);
428 void simplify_cmp(void);
430 void rename_temp_register(int index
, int new_index
);
431 int get_first_temp_read(int index
);
432 int get_first_temp_write(int index
);
433 int get_last_temp_read(int index
);
434 int get_last_temp_write(int index
);
436 void copy_propagate(void);
437 void eliminate_dead_code(void);
438 int eliminate_dead_code_advanced(void);
439 void merge_registers(void);
440 void renumber_registers(void);
442 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
443 st_dst_reg
*l
, st_src_reg
*r
);
448 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
450 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
452 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
455 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
458 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
462 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
465 prog
->LinkStatus
= GL_FALSE
;
469 swizzle_for_size(int size
)
471 int size_swizzles
[4] = {
472 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
473 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
474 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
475 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
478 assert((size
>= 1) && (size
<= 4));
479 return size_swizzles
[size
- 1];
483 is_tex_instruction(unsigned opcode
)
485 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
490 num_inst_dst_regs(unsigned opcode
)
492 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
493 return info
->num_dst
;
497 num_inst_src_regs(unsigned opcode
)
499 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
500 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
503 glsl_to_tgsi_instruction
*
504 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
506 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
508 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
509 int num_reladdr
= 0, i
;
511 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
513 /* If we have to do relative addressing, we want to load the ARL
514 * reg directly for one of the regs, and preload the other reladdr
515 * sources into temps.
517 num_reladdr
+= dst
.reladdr
!= NULL
;
518 num_reladdr
+= src0
.reladdr
!= NULL
;
519 num_reladdr
+= src1
.reladdr
!= NULL
;
520 num_reladdr
+= src2
.reladdr
!= NULL
;
522 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
523 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
524 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
527 emit_arl(ir
, address_reg
, *dst
.reladdr
);
530 assert(num_reladdr
== 0);
540 inst
->function
= NULL
;
542 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
543 this->num_address_regs
= 1;
545 /* Update indirect addressing status used by TGSI */
548 case PROGRAM_LOCAL_PARAM
:
549 case PROGRAM_ENV_PARAM
:
550 case PROGRAM_STATE_VAR
:
551 case PROGRAM_CONSTANT
:
552 case PROGRAM_UNIFORM
:
553 this->indirect_addr_consts
= true;
555 case PROGRAM_IMMEDIATE
:
556 assert(!"immediates should not have indirect addressing");
563 for (i
=0; i
<3; i
++) {
564 if(inst
->src
[i
].reladdr
) {
565 switch(inst
->src
[i
].file
) {
566 case PROGRAM_LOCAL_PARAM
:
567 case PROGRAM_ENV_PARAM
:
568 case PROGRAM_STATE_VAR
:
569 case PROGRAM_CONSTANT
:
570 case PROGRAM_UNIFORM
:
571 this->indirect_addr_consts
= true;
573 case PROGRAM_IMMEDIATE
:
574 assert(!"immediates should not have indirect addressing");
583 this->instructions
.push_tail(inst
);
589 glsl_to_tgsi_instruction
*
590 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
591 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
593 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
596 glsl_to_tgsi_instruction
*
597 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
598 st_dst_reg dst
, st_src_reg src0
)
600 assert(dst
.writemask
!= 0);
601 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
604 glsl_to_tgsi_instruction
*
605 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
607 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
611 * Determines whether to use an integer, unsigned integer, or float opcode
612 * based on the operands and input opcode, then emits the result.
615 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
617 st_src_reg src0
, st_src_reg src1
)
619 int type
= GLSL_TYPE_FLOAT
;
621 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
622 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
623 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
624 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
626 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
627 type
= GLSL_TYPE_FLOAT
;
628 else if (native_integers
)
629 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
631 #define case4(c, f, i, u) \
632 case TGSI_OPCODE_##c: \
633 if (type == GLSL_TYPE_INT) \
634 op = TGSI_OPCODE_##i; \
635 else if (type == GLSL_TYPE_UINT) \
636 op = TGSI_OPCODE_##u; \
638 op = TGSI_OPCODE_##f; \
641 #define case3(f, i, u) case4(f, f, i, u)
642 #define case2fi(f, i) case4(f, f, i, i)
643 #define case2iu(i, u) case4(i, LAST, i, u)
645 #define casecomp(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
651 else if (native_integers) \
652 op = TGSI_OPCODE_##f; \
654 op = TGSI_OPCODE_##c; \
661 case3(DIV
, IDIV
, UDIV
);
662 case3(MAX
, IMAX
, UMAX
);
663 case3(MIN
, IMIN
, UMIN
);
666 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
667 casecomp(SNE
, FSNE
, USNE
, USNE
);
668 casecomp(SGE
, FSGE
, ISGE
, USGE
);
669 casecomp(SLT
, FSLT
, ISLT
, USLT
);
674 case3(ABS
, IABS
, IABS
);
679 assert(op
!= TGSI_OPCODE_LAST
);
683 glsl_to_tgsi_instruction
*
684 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
685 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
688 static const unsigned dot_opcodes
[] = {
689 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
692 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
696 * Emits TGSI scalar opcodes to produce unique answers across channels.
698 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
699 * channel determines the result across all channels. So to do a vec4
700 * of this operation, we want to emit a scalar per source channel used
701 * to produce dest channels.
704 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
706 st_src_reg orig_src0
, st_src_reg orig_src1
)
709 int done_mask
= ~dst
.writemask
;
711 /* TGSI RCP is a scalar operation splatting results to all channels,
712 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
715 for (i
= 0; i
< 4; i
++) {
716 GLuint this_mask
= (1 << i
);
717 glsl_to_tgsi_instruction
*inst
;
718 st_src_reg src0
= orig_src0
;
719 st_src_reg src1
= orig_src1
;
721 if (done_mask
& this_mask
)
724 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
725 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
726 for (j
= i
+ 1; j
< 4; j
++) {
727 /* If there is another enabled component in the destination that is
728 * derived from the same inputs, generate its value on this pass as
731 if (!(done_mask
& (1 << j
)) &&
732 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
733 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
734 this_mask
|= (1 << j
);
737 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
738 src0_swiz
, src0_swiz
);
739 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
740 src1_swiz
, src1_swiz
);
742 inst
= emit(ir
, op
, dst
, src0
, src1
);
743 inst
->dst
.writemask
= this_mask
;
744 done_mask
|= this_mask
;
749 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
750 st_dst_reg dst
, st_src_reg src0
)
752 st_src_reg undef
= undef_src
;
754 undef
.swizzle
= SWIZZLE_XXXX
;
756 emit_scalar(ir
, op
, dst
, src0
, undef
);
760 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
761 st_dst_reg dst
, st_src_reg src0
)
763 int op
= TGSI_OPCODE_ARL
;
765 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
766 op
= TGSI_OPCODE_UARL
;
768 emit(NULL
, op
, dst
, src0
);
772 * Emit an TGSI_OPCODE_SCS instruction
774 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
775 * Instead of splatting its result across all four components of the
776 * destination, it writes one value to the \c x component and another value to
777 * the \c y component.
779 * \param ir IR instruction being processed
780 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
781 * on which value is desired.
782 * \param dst Destination register
783 * \param src Source register
786 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
788 const st_src_reg
&src
)
790 /* Vertex programs cannot use the SCS opcode.
792 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
793 emit_scalar(ir
, op
, dst
, src
);
797 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
798 const unsigned scs_mask
= (1U << component
);
799 int done_mask
= ~dst
.writemask
;
802 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
804 /* If there are compnents in the destination that differ from the component
805 * that will be written by the SCS instrution, we'll need a temporary.
807 if (scs_mask
!= unsigned(dst
.writemask
)) {
808 tmp
= get_temp(glsl_type::vec4_type
);
811 for (unsigned i
= 0; i
< 4; i
++) {
812 unsigned this_mask
= (1U << i
);
813 st_src_reg src0
= src
;
815 if ((done_mask
& this_mask
) != 0)
818 /* The source swizzle specified which component of the source generates
819 * sine / cosine for the current component in the destination. The SCS
820 * instruction requires that this value be swizzle to the X component.
821 * Replace the current swizzle with a swizzle that puts the source in
824 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
826 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
827 src0_swiz
, src0_swiz
);
828 for (unsigned j
= i
+ 1; j
< 4; j
++) {
829 /* If there is another enabled component in the destination that is
830 * derived from the same inputs, generate its value on this pass as
833 if (!(done_mask
& (1 << j
)) &&
834 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
835 this_mask
|= (1 << j
);
839 if (this_mask
!= scs_mask
) {
840 glsl_to_tgsi_instruction
*inst
;
841 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
843 /* Emit the SCS instruction.
845 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
846 inst
->dst
.writemask
= scs_mask
;
848 /* Move the result of the SCS instruction to the desired location in
851 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
852 component
, component
);
853 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
854 inst
->dst
.writemask
= this_mask
;
856 /* Emit the SCS instruction to write directly to the destination.
858 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
859 inst
->dst
.writemask
= scs_mask
;
862 done_mask
|= this_mask
;
867 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
868 gl_constant_value values
[4], int size
, int datatype
,
871 if (file
== PROGRAM_CONSTANT
) {
872 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
873 size
, datatype
, swizzle_out
);
876 immediate_storage
*entry
;
877 assert(file
== PROGRAM_IMMEDIATE
);
879 /* Search immediate storage to see if we already have an identical
880 * immediate that we can use instead of adding a duplicate entry.
882 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
883 entry
= (immediate_storage
*)iter
.get();
885 if (entry
->size
== size
&&
886 entry
->type
== datatype
&&
887 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
893 /* Add this immediate to the list. */
894 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
895 this->immediates
.push_tail(entry
);
896 this->num_immediates
++;
902 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
904 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
905 union gl_constant_value uval
;
908 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
914 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
916 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
917 union gl_constant_value uval
;
919 assert(native_integers
);
922 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
928 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
931 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
932 st_src_reg_for_int(val
);
934 return st_src_reg_for_float(val
);
938 type_size(const struct glsl_type
*type
)
943 switch (type
->base_type
) {
946 case GLSL_TYPE_FLOAT
:
948 if (type
->is_matrix()) {
949 return type
->matrix_columns
;
951 /* Regardless of size of vector, it gets a vec4. This is bad
952 * packing for things like floats, but otherwise arrays become a
953 * mess. Hopefully a later pass over the code can pack scalars
954 * down if appropriate.
958 case GLSL_TYPE_ARRAY
:
959 assert(type
->length
> 0);
960 return type_size(type
->fields
.array
) * type
->length
;
961 case GLSL_TYPE_STRUCT
:
963 for (i
= 0; i
< type
->length
; i
++) {
964 size
+= type_size(type
->fields
.structure
[i
].type
);
967 case GLSL_TYPE_SAMPLER
:
968 /* Samplers take up one slot in UNIFORMS[], but they're baked in
972 case GLSL_TYPE_INTERFACE
:
974 case GLSL_TYPE_ERROR
:
975 assert(!"Invalid type in type_size");
982 * In the initial pass of codegen, we assign temporary numbers to
983 * intermediate results. (not SSA -- variable assignments will reuse
987 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
991 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
995 if (!options
->EmitNoIndirectTemp
&&
996 (type
->is_array() || type
->is_matrix())) {
998 src
.file
= PROGRAM_ARRAY
;
999 src
.index
= next_array
<< 16 | 0x8000;
1000 array_sizes
[next_array
] = type_size(type
);
1004 src
.file
= PROGRAM_TEMPORARY
;
1005 src
.index
= next_temp
;
1006 next_temp
+= type_size(type
);
1009 if (type
->is_array() || type
->is_record()) {
1010 src
.swizzle
= SWIZZLE_NOOP
;
1012 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1019 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1022 variable_storage
*entry
;
1024 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1025 entry
= (variable_storage
*)iter
.get();
1027 if (entry
->var
== var
)
1035 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1037 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1038 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1040 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1041 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1044 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1046 const ir_state_slot
*const slots
= ir
->state_slots
;
1047 assert(ir
->state_slots
!= NULL
);
1049 /* Check if this statevar's setup in the STATE file exactly
1050 * matches how we'll want to reference it as a
1051 * struct/array/whatever. If not, then we need to move it into
1052 * temporary storage and hope that it'll get copy-propagated
1055 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1056 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1061 variable_storage
*storage
;
1063 if (i
== ir
->num_state_slots
) {
1064 /* We'll set the index later. */
1065 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1066 this->variables
.push_tail(storage
);
1070 /* The variable_storage constructor allocates slots based on the size
1071 * of the type. However, this had better match the number of state
1072 * elements that we're going to copy into the new temporary.
1074 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1076 dst
= st_dst_reg(get_temp(ir
->type
));
1078 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1080 this->variables
.push_tail(storage
);
1084 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1085 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1086 (gl_state_index
*)slots
[i
].tokens
);
1088 if (storage
->file
== PROGRAM_STATE_VAR
) {
1089 if (storage
->index
== -1) {
1090 storage
->index
= index
;
1092 assert(index
== storage
->index
+ (int)i
);
1095 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1096 * the data being moved since MOV does not care about the type of
1097 * data it is moving, and we don't want to declare registers with
1098 * array or struct types.
1100 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1101 src
.swizzle
= slots
[i
].swizzle
;
1102 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1103 /* even a float takes up a whole vec4 reg in a struct/array. */
1108 if (storage
->file
== PROGRAM_TEMPORARY
&&
1109 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1110 fail_link(this->shader_program
,
1111 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1112 ir
->name
, dst
.index
- storage
->index
,
1113 type_size(ir
->type
));
1119 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1121 ir_dereference_variable
*counter
= NULL
;
1123 if (ir
->counter
!= NULL
)
1124 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1126 if (ir
->from
!= NULL
) {
1127 assert(ir
->counter
!= NULL
);
1129 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1135 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1139 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1141 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1143 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1145 if_stmt
->then_instructions
.push_tail(brk
);
1147 if_stmt
->accept(this);
1154 visit_exec_list(&ir
->body_instructions
, this);
1156 if (ir
->increment
) {
1158 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1159 counter
, ir
->increment
);
1161 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1168 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1172 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1175 case ir_loop_jump::jump_break
:
1176 emit(NULL
, TGSI_OPCODE_BRK
);
1178 case ir_loop_jump::jump_continue
:
1179 emit(NULL
, TGSI_OPCODE_CONT
);
1186 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1193 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1195 /* Ignore function bodies other than main() -- we shouldn't see calls to
1196 * them since they should all be inlined before we get to glsl_to_tgsi.
1198 if (strcmp(ir
->name
, "main") == 0) {
1199 const ir_function_signature
*sig
;
1202 sig
= ir
->matching_signature(NULL
, &empty
);
1206 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1207 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1215 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1217 int nonmul_operand
= 1 - mul_operand
;
1219 st_dst_reg result_dst
;
1221 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1222 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1225 expr
->operands
[0]->accept(this);
1227 expr
->operands
[1]->accept(this);
1229 ir
->operands
[nonmul_operand
]->accept(this);
1232 this->result
= get_temp(ir
->type
);
1233 result_dst
= st_dst_reg(this->result
);
1234 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1235 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1241 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1243 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1244 * implemented using multiplication, and logical-or is implemented using
1245 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1246 * As result, the logical expression (a & !b) can be rewritten as:
1250 * - (a * 1) - (a * b)
1254 * This final expression can be implemented as a single MAD(a, -b, a)
1258 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1260 const int other_operand
= 1 - try_operand
;
1263 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1264 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1267 ir
->operands
[other_operand
]->accept(this);
1269 expr
->operands
[0]->accept(this);
1272 b
.negate
= ~b
.negate
;
1274 this->result
= get_temp(ir
->type
);
1275 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1281 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1283 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1285 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1286 !st_context(this->ctx
)->has_shader_model3
) {
1290 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1294 sat_src
->accept(this);
1295 st_src_reg src
= this->result
;
1297 /* If we generated an expression instruction into a temporary in
1298 * processing the saturate's operand, apply the saturate to that
1299 * instruction. Otherwise, generate a MOV to do the saturate.
1301 * Note that we have to be careful to only do this optimization if
1302 * the instruction in question was what generated src->result. For
1303 * example, ir_dereference_array might generate a MUL instruction
1304 * to create the reladdr, and return us a src reg using that
1305 * reladdr. That MUL result is not the value we're trying to
1308 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1309 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1310 sat_src_expr
->operation
== ir_binop_add
||
1311 sat_src_expr
->operation
== ir_binop_dot
)) {
1312 glsl_to_tgsi_instruction
*new_inst
;
1313 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1314 new_inst
->saturate
= true;
1316 this->result
= get_temp(ir
->type
);
1317 st_dst_reg result_dst
= st_dst_reg(this->result
);
1318 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1319 glsl_to_tgsi_instruction
*inst
;
1320 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1321 inst
->saturate
= true;
1328 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1329 st_src_reg
*reg
, int *num_reladdr
)
1334 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1336 if (*num_reladdr
!= 1) {
1337 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1339 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1347 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1349 unsigned int operand
;
1350 st_src_reg op
[Elements(ir
->operands
)];
1351 st_src_reg result_src
;
1352 st_dst_reg result_dst
;
1354 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1356 if (ir
->operation
== ir_binop_add
) {
1357 if (try_emit_mad(ir
, 1))
1359 if (try_emit_mad(ir
, 0))
1363 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1365 if (ir
->operation
== ir_binop_logic_and
) {
1366 if (try_emit_mad_for_and_not(ir
, 1))
1368 if (try_emit_mad_for_and_not(ir
, 0))
1372 if (try_emit_sat(ir
))
1375 if (ir
->operation
== ir_quadop_vector
)
1376 assert(!"ir_quadop_vector should have been lowered");
1378 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1379 this->result
.file
= PROGRAM_UNDEFINED
;
1380 ir
->operands
[operand
]->accept(this);
1381 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1382 printf("Failed to get tree for expression operand:\n");
1383 ir
->operands
[operand
]->print();
1387 op
[operand
] = this->result
;
1389 /* Matrix expression operands should have been broken down to vector
1390 * operations already.
1392 assert(!ir
->operands
[operand
]->type
->is_matrix());
1395 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1396 if (ir
->operands
[1]) {
1397 vector_elements
= MAX2(vector_elements
,
1398 ir
->operands
[1]->type
->vector_elements
);
1401 this->result
.file
= PROGRAM_UNDEFINED
;
1403 /* Storage for our result. Ideally for an assignment we'd be using
1404 * the actual storage for the result here, instead.
1406 result_src
= get_temp(ir
->type
);
1407 /* convenience for the emit functions below. */
1408 result_dst
= st_dst_reg(result_src
);
1409 /* Limit writes to the channels that will be used by result_src later.
1410 * This does limit this temp's use as a temporary for multi-instruction
1413 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1415 switch (ir
->operation
) {
1416 case ir_unop_logic_not
:
1417 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1418 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1420 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1421 * older GPUs implement SEQ using multiple instructions (i915 uses two
1422 * SGE instructions and a MUL instruction). Since our logic values are
1423 * 0.0 and 1.0, 1-x also implements !x.
1425 op
[0].negate
= ~op
[0].negate
;
1426 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1430 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1431 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1433 op
[0].negate
= ~op
[0].negate
;
1438 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1441 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1444 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1448 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1452 assert(!"not reached: should be handled by ir_explog_to_explog2");
1455 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1458 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1461 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1463 case ir_unop_sin_reduced
:
1464 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1466 case ir_unop_cos_reduced
:
1467 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1471 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1475 /* The X component contains 1 or -1 depending on whether the framebuffer
1476 * is a FBO or the window system buffer, respectively.
1477 * It is then multiplied with the source operand of DDY.
1479 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1480 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1482 unsigned transform_y_index
=
1483 _mesa_add_state_reference(this->prog
->Parameters
,
1486 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1488 glsl_type::vec4_type
);
1489 transform_y
.swizzle
= SWIZZLE_XXXX
;
1491 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1493 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1494 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1498 case ir_unop_noise
: {
1499 /* At some point, a motivated person could add a better
1500 * implementation of noise. Currently not even the nvidia
1501 * binary drivers do anything more than this. In any case, the
1502 * place to do this is in the GL state tracker, not the poor
1505 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1510 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1513 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1517 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1520 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1521 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1523 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1526 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1527 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1529 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1533 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1535 case ir_binop_greater
:
1536 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1538 case ir_binop_lequal
:
1539 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1541 case ir_binop_gequal
:
1542 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1544 case ir_binop_equal
:
1545 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1547 case ir_binop_nequal
:
1548 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1550 case ir_binop_all_equal
:
1551 /* "==" operator producing a scalar boolean. */
1552 if (ir
->operands
[0]->type
->is_vector() ||
1553 ir
->operands
[1]->type
->is_vector()) {
1554 st_src_reg temp
= get_temp(native_integers
?
1555 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1556 glsl_type::vec4_type
);
1558 if (native_integers
) {
1559 st_dst_reg temp_dst
= st_dst_reg(temp
);
1560 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1562 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1564 /* Emit 1-3 AND operations to combine the SEQ results. */
1565 switch (ir
->operands
[0]->type
->vector_elements
) {
1569 temp_dst
.writemask
= WRITEMASK_Y
;
1570 temp1
.swizzle
= SWIZZLE_YYYY
;
1571 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1572 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1575 temp_dst
.writemask
= WRITEMASK_X
;
1576 temp1
.swizzle
= SWIZZLE_XXXX
;
1577 temp2
.swizzle
= SWIZZLE_YYYY
;
1578 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1579 temp_dst
.writemask
= WRITEMASK_Y
;
1580 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1581 temp2
.swizzle
= SWIZZLE_WWWW
;
1582 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1585 temp1
.swizzle
= SWIZZLE_XXXX
;
1586 temp2
.swizzle
= SWIZZLE_YYYY
;
1587 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1589 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1591 /* After the dot-product, the value will be an integer on the
1592 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1594 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1596 /* Negating the result of the dot-product gives values on the range
1597 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1598 * This is achieved using SGE.
1600 st_src_reg sge_src
= result_src
;
1601 sge_src
.negate
= ~sge_src
.negate
;
1602 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1605 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1608 case ir_binop_any_nequal
:
1609 /* "!=" operator producing a scalar boolean. */
1610 if (ir
->operands
[0]->type
->is_vector() ||
1611 ir
->operands
[1]->type
->is_vector()) {
1612 st_src_reg temp
= get_temp(native_integers
?
1613 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1614 glsl_type::vec4_type
);
1615 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1617 if (native_integers
) {
1618 st_dst_reg temp_dst
= st_dst_reg(temp
);
1619 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1621 /* Emit 1-3 OR operations to combine the SNE results. */
1622 switch (ir
->operands
[0]->type
->vector_elements
) {
1626 temp_dst
.writemask
= WRITEMASK_Y
;
1627 temp1
.swizzle
= SWIZZLE_YYYY
;
1628 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1629 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1632 temp_dst
.writemask
= WRITEMASK_X
;
1633 temp1
.swizzle
= SWIZZLE_XXXX
;
1634 temp2
.swizzle
= SWIZZLE_YYYY
;
1635 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1636 temp_dst
.writemask
= WRITEMASK_Y
;
1637 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1638 temp2
.swizzle
= SWIZZLE_WWWW
;
1639 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1642 temp1
.swizzle
= SWIZZLE_XXXX
;
1643 temp2
.swizzle
= SWIZZLE_YYYY
;
1644 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1646 /* After the dot-product, the value will be an integer on the
1647 * range [0,4]. Zero stays zero, and positive values become 1.0.
1649 glsl_to_tgsi_instruction
*const dp
=
1650 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1651 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1652 /* The clamping to [0,1] can be done for free in the fragment
1653 * shader with a saturate.
1655 dp
->saturate
= true;
1657 /* Negating the result of the dot-product gives values on the range
1658 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1659 * achieved using SLT.
1661 st_src_reg slt_src
= result_src
;
1662 slt_src
.negate
= ~slt_src
.negate
;
1663 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1667 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1672 assert(ir
->operands
[0]->type
->is_vector());
1674 /* After the dot-product, the value will be an integer on the
1675 * range [0,4]. Zero stays zero, and positive values become 1.0.
1677 glsl_to_tgsi_instruction
*const dp
=
1678 emit_dp(ir
, result_dst
, op
[0], op
[0],
1679 ir
->operands
[0]->type
->vector_elements
);
1680 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1681 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1682 /* The clamping to [0,1] can be done for free in the fragment
1683 * shader with a saturate.
1685 dp
->saturate
= true;
1686 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1687 /* Negating the result of the dot-product gives values on the range
1688 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1689 * is achieved using SLT.
1691 st_src_reg slt_src
= result_src
;
1692 slt_src
.negate
= ~slt_src
.negate
;
1693 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1696 /* Use SNE 0 if integers are being used as boolean values. */
1697 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1702 case ir_binop_logic_xor
:
1703 if (native_integers
)
1704 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1706 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1709 case ir_binop_logic_or
: {
1710 if (native_integers
) {
1711 /* If integers are used as booleans, we can use an actual "or"
1714 assert(native_integers
);
1715 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1720 glsl_to_tgsi_instruction
*add
=
1721 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1722 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1726 add
->saturate
= true;
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1732 st_src_reg slt_src
= result_src
;
1733 slt_src
.negate
= ~slt_src
.negate
;
1734 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1740 case ir_binop_logic_and
:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1745 if (native_integers
)
1746 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1748 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1752 assert(ir
->operands
[0]->type
->is_vector());
1753 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1754 emit_dp(ir
, result_dst
, op
[0], op
[1],
1755 ir
->operands
[0]->type
->vector_elements
);
1760 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1765 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op
[0].negate
= ~op
[0].negate
;
1768 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1769 op
[0], result_src
, st_src_reg_for_float(0.0));
1773 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1776 if (native_integers
) {
1777 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1780 /* fallthrough to next case otherwise */
1782 if (native_integers
) {
1783 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1786 /* fallthrough to next case otherwise */
1789 /* Converting between signed and unsigned integers is a no-op. */
1793 if (native_integers
) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1798 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1807 if (native_integers
)
1808 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1810 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1813 if (native_integers
)
1814 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1816 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1818 case ir_unop_bitcast_f2i
:
1820 result_src
.type
= GLSL_TYPE_INT
;
1822 case ir_unop_bitcast_f2u
:
1824 result_src
.type
= GLSL_TYPE_UINT
;
1826 case ir_unop_bitcast_i2f
:
1827 case ir_unop_bitcast_u2f
:
1829 result_src
.type
= GLSL_TYPE_FLOAT
;
1832 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1835 if (native_integers
)
1836 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1838 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1841 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1844 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1847 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1849 case ir_unop_round_even
:
1850 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1853 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1857 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1860 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1863 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1866 case ir_unop_bit_not
:
1867 if (native_integers
) {
1868 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1872 if (native_integers
) {
1873 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1876 case ir_binop_lshift
:
1877 if (native_integers
) {
1878 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1881 case ir_binop_rshift
:
1882 if (native_integers
) {
1883 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1886 case ir_binop_bit_and
:
1887 if (native_integers
) {
1888 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1891 case ir_binop_bit_xor
:
1892 if (native_integers
) {
1893 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1896 case ir_binop_bit_or
:
1897 if (native_integers
) {
1898 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1902 assert(!"GLSL 1.30 features unsupported");
1905 case ir_binop_ubo_load
: {
1906 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1907 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1908 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1909 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1912 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1913 cbuf
.file
= PROGRAM_CONSTANT
;
1915 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1916 cbuf
.reladdr
= NULL
;
1919 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1921 if (const_offset_ir
) {
1922 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1924 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1927 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1928 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1929 const_offset
% 16 / 4,
1930 const_offset
% 16 / 4,
1931 const_offset
% 16 / 4);
1933 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1934 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1936 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1937 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1939 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1944 /* note: we have to reorder the three args here */
1945 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1948 if (this->ctx
->Const
.NativeIntegers
)
1949 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
1951 op
[0].negate
= ~op
[0].negate
;
1952 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1955 case ir_unop_pack_snorm_2x16
:
1956 case ir_unop_pack_unorm_2x16
:
1957 case ir_unop_pack_half_2x16
:
1958 case ir_unop_pack_snorm_4x8
:
1959 case ir_unop_pack_unorm_4x8
:
1960 case ir_unop_unpack_snorm_2x16
:
1961 case ir_unop_unpack_unorm_2x16
:
1962 case ir_unop_unpack_half_2x16
:
1963 case ir_unop_unpack_half_2x16_split_x
:
1964 case ir_unop_unpack_half_2x16_split_y
:
1965 case ir_unop_unpack_snorm_4x8
:
1966 case ir_unop_unpack_unorm_4x8
:
1967 case ir_binop_pack_half_2x16_split
:
1968 case ir_unop_bitfield_reverse
:
1969 case ir_unop_bit_count
:
1970 case ir_unop_find_msb
:
1971 case ir_unop_find_lsb
:
1975 case ir_triop_bitfield_extract
:
1976 case ir_quadop_bitfield_insert
:
1977 case ir_quadop_vector
:
1978 case ir_binop_vector_extract
:
1979 case ir_triop_vector_insert
:
1980 case ir_binop_ldexp
:
1981 /* This operation is not supported, or should have already been handled.
1983 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1987 this->result
= result_src
;
1992 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1998 /* Note that this is only swizzles in expressions, not those on the left
1999 * hand side of an assignment, which do write masking. See ir_assignment
2003 ir
->val
->accept(this);
2005 assert(src
.file
!= PROGRAM_UNDEFINED
);
2007 for (i
= 0; i
< 4; i
++) {
2008 if (i
< ir
->type
->vector_elements
) {
2011 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2014 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2017 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2020 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2024 /* If the type is smaller than a vec4, replicate the last
2027 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2031 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2037 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2039 variable_storage
*entry
= find_variable_storage(ir
->var
);
2040 ir_variable
*var
= ir
->var
;
2043 switch (var
->mode
) {
2044 case ir_var_uniform
:
2045 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2047 this->variables
.push_tail(entry
);
2049 case ir_var_shader_in
:
2050 /* The linker assigns locations for varyings and attributes,
2051 * including deprecated builtins (like gl_Color), user-assign
2052 * generic attributes (glBindVertexLocation), and
2053 * user-defined varyings.
2055 assert(var
->location
!= -1);
2056 entry
= new(mem_ctx
) variable_storage(var
,
2060 case ir_var_shader_out
:
2061 assert(var
->location
!= -1);
2062 entry
= new(mem_ctx
) variable_storage(var
,
2064 var
->location
+ var
->index
);
2066 case ir_var_system_value
:
2067 entry
= new(mem_ctx
) variable_storage(var
,
2068 PROGRAM_SYSTEM_VALUE
,
2072 case ir_var_temporary
:
2073 st_src_reg src
= get_temp(var
->type
);
2075 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2076 this->variables
.push_tail(entry
);
2082 printf("Failed to make storage for %s\n", var
->name
);
2087 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2088 if (!native_integers
)
2089 this->result
.type
= GLSL_TYPE_FLOAT
;
2093 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2097 int element_size
= type_size(ir
->type
);
2099 index
= ir
->array_index
->constant_expression_value();
2101 ir
->array
->accept(this);
2105 src
.index
+= index
->value
.i
[0] * element_size
;
2107 /* Variable index array dereference. It eats the "vec4" of the
2108 * base of the array and an index that offsets the TGSI register
2111 ir
->array_index
->accept(this);
2113 st_src_reg index_reg
;
2115 if (element_size
== 1) {
2116 index_reg
= this->result
;
2118 index_reg
= get_temp(native_integers
?
2119 glsl_type::int_type
: glsl_type::float_type
);
2121 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2122 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2125 /* If there was already a relative address register involved, add the
2126 * new and the old together to get the new offset.
2128 if (src
.reladdr
!= NULL
) {
2129 st_src_reg accum_reg
= get_temp(native_integers
?
2130 glsl_type::int_type
: glsl_type::float_type
);
2132 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2133 index_reg
, *src
.reladdr
);
2135 index_reg
= accum_reg
;
2138 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2139 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2142 /* If the type is smaller than a vec4, replicate the last channel out. */
2143 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2144 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2146 src
.swizzle
= SWIZZLE_NOOP
;
2148 /* Change the register type to the element type of the array. */
2149 src
.type
= ir
->type
->base_type
;
2155 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2158 const glsl_type
*struct_type
= ir
->record
->type
;
2161 ir
->record
->accept(this);
2163 for (i
= 0; i
< struct_type
->length
; i
++) {
2164 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2166 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2169 /* If the type is smaller than a vec4, replicate the last channel out. */
2170 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2171 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2173 this->result
.swizzle
= SWIZZLE_NOOP
;
2175 this->result
.index
+= offset
;
2176 this->result
.type
= ir
->type
->base_type
;
2180 * We want to be careful in assignment setup to hit the actual storage
2181 * instead of potentially using a temporary like we might with the
2182 * ir_dereference handler.
2185 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2187 /* The LHS must be a dereference. If the LHS is a variable indexed array
2188 * access of a vector, it must be separated into a series conditional moves
2189 * before reaching this point (see ir_vec_index_to_cond_assign).
2191 assert(ir
->as_dereference());
2192 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2194 assert(!deref_array
->array
->type
->is_vector());
2197 /* Use the rvalue deref handler for the most part. We'll ignore
2198 * swizzles in it and write swizzles using writemask, though.
2201 return st_dst_reg(v
->result
);
2205 * Process the condition of a conditional assignment
2207 * Examines the condition of a conditional assignment to generate the optimal
2208 * first operand of a \c CMP instruction. If the condition is a relational
2209 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2210 * used as the source for the \c CMP instruction. Otherwise the comparison
2211 * is processed to a boolean result, and the boolean result is used as the
2212 * operand to the CMP instruction.
2215 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2217 ir_rvalue
*src_ir
= ir
;
2219 bool switch_order
= false;
2221 ir_expression
*const expr
= ir
->as_expression();
2222 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2223 bool zero_on_left
= false;
2225 if (expr
->operands
[0]->is_zero()) {
2226 src_ir
= expr
->operands
[1];
2227 zero_on_left
= true;
2228 } else if (expr
->operands
[1]->is_zero()) {
2229 src_ir
= expr
->operands
[0];
2230 zero_on_left
= false;
2234 * (a < 0) T F F ( a < 0) T F F
2235 * (0 < a) F F T (-a < 0) F F T
2236 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2237 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2238 * (a > 0) F F T (-a < 0) F F T
2239 * (0 > a) T F F ( a < 0) T F F
2240 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2241 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2243 * Note that exchanging the order of 0 and 'a' in the comparison simply
2244 * means that the value of 'a' should be negated.
2247 switch (expr
->operation
) {
2249 switch_order
= false;
2250 negate
= zero_on_left
;
2253 case ir_binop_greater
:
2254 switch_order
= false;
2255 negate
= !zero_on_left
;
2258 case ir_binop_lequal
:
2259 switch_order
= true;
2260 negate
= !zero_on_left
;
2263 case ir_binop_gequal
:
2264 switch_order
= true;
2265 negate
= zero_on_left
;
2269 /* This isn't the right kind of comparison afterall, so make sure
2270 * the whole condition is visited.
2278 src_ir
->accept(this);
2280 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2281 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2282 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2283 * computing the condition.
2286 this->result
.negate
= ~this->result
.negate
;
2288 return switch_order
;
2292 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2293 st_dst_reg
*l
, st_src_reg
*r
)
2295 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2296 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2297 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2302 if (type
->is_array()) {
2303 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2304 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2309 if (type
->is_matrix()) {
2310 const struct glsl_type
*vec_type
;
2312 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2313 type
->vector_elements
, 1);
2315 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2316 emit_block_mov(ir
, vec_type
, l
, r
);
2321 assert(type
->is_scalar() || type
->is_vector());
2323 r
->type
= type
->base_type
;
2324 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2330 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2336 ir
->rhs
->accept(this);
2339 l
= get_assignment_lhs(ir
->lhs
, this);
2341 /* FINISHME: This should really set to the correct maximal writemask for each
2342 * FINISHME: component written (in the loops below). This case can only
2343 * FINISHME: occur for matrices, arrays, and structures.
2345 if (ir
->write_mask
== 0) {
2346 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2347 l
.writemask
= WRITEMASK_XYZW
;
2348 } else if (ir
->lhs
->type
->is_scalar() &&
2349 ir
->lhs
->variable_referenced()->mode
== ir_var_shader_out
) {
2350 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2351 * FINISHME: W component of fragment shader output zero, work correctly.
2353 l
.writemask
= WRITEMASK_XYZW
;
2356 int first_enabled_chan
= 0;
2359 l
.writemask
= ir
->write_mask
;
2361 for (int i
= 0; i
< 4; i
++) {
2362 if (l
.writemask
& (1 << i
)) {
2363 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2368 /* Swizzle a small RHS vector into the channels being written.
2370 * glsl ir treats write_mask as dictating how many channels are
2371 * present on the RHS while TGSI treats write_mask as just
2372 * showing which channels of the vec4 RHS get written.
2374 for (int i
= 0; i
< 4; i
++) {
2375 if (l
.writemask
& (1 << i
))
2376 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2378 swizzles
[i
] = first_enabled_chan
;
2380 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2381 swizzles
[2], swizzles
[3]);
2384 assert(l
.file
!= PROGRAM_UNDEFINED
);
2385 assert(r
.file
!= PROGRAM_UNDEFINED
);
2387 if (ir
->condition
) {
2388 const bool switch_order
= this->process_move_condition(ir
->condition
);
2389 st_src_reg condition
= this->result
;
2391 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2392 st_src_reg l_src
= st_src_reg(l
);
2393 st_src_reg condition_temp
= condition
;
2394 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2396 if (native_integers
) {
2397 /* This is necessary because TGSI's CMP instruction expects the
2398 * condition to be a float, and we store booleans as integers.
2399 * TODO: really want to avoid i2f path and use UCMP. Requires
2400 * changes to process_move_condition though too.
2402 condition_temp
= get_temp(glsl_type::vec4_type
);
2403 condition
.negate
= 0;
2404 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2405 condition_temp
.swizzle
= condition
.swizzle
;
2409 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2411 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2417 } else if (ir
->rhs
->as_expression() &&
2418 this->instructions
.get_tail() &&
2419 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2420 type_size(ir
->lhs
->type
) == 1 &&
2421 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2422 /* To avoid emitting an extra MOV when assigning an expression to a
2423 * variable, emit the last instruction of the expression again, but
2424 * replace the destination register with the target of the assignment.
2425 * Dead code elimination will remove the original instruction.
2427 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2428 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2429 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2430 new_inst
->saturate
= inst
->saturate
;
2431 inst
->dead_mask
= inst
->dst
.writemask
;
2433 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2439 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2442 GLfloat stack_vals
[4] = { 0 };
2443 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2444 GLenum gl_type
= GL_NONE
;
2446 static int in_array
= 0;
2447 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2449 /* Unfortunately, 4 floats is all we can get into
2450 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2451 * aggregate constant and move each constant value into it. If we
2452 * get lucky, copy propagation will eliminate the extra moves.
2454 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2455 st_src_reg temp_base
= get_temp(ir
->type
);
2456 st_dst_reg temp
= st_dst_reg(temp_base
);
2458 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2459 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2460 int size
= type_size(field_value
->type
);
2464 field_value
->accept(this);
2467 for (i
= 0; i
< (unsigned int)size
; i
++) {
2468 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2474 this->result
= temp_base
;
2478 if (ir
->type
->is_array()) {
2479 st_src_reg temp_base
= get_temp(ir
->type
);
2480 st_dst_reg temp
= st_dst_reg(temp_base
);
2481 int size
= type_size(ir
->type
->fields
.array
);
2486 for (i
= 0; i
< ir
->type
->length
; i
++) {
2487 ir
->array_elements
[i
]->accept(this);
2489 for (int j
= 0; j
< size
; j
++) {
2490 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2496 this->result
= temp_base
;
2501 if (ir
->type
->is_matrix()) {
2502 st_src_reg mat
= get_temp(ir
->type
);
2503 st_dst_reg mat_column
= st_dst_reg(mat
);
2505 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2506 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2507 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2509 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2510 src
.index
= add_constant(file
,
2512 ir
->type
->vector_elements
,
2515 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2524 switch (ir
->type
->base_type
) {
2525 case GLSL_TYPE_FLOAT
:
2527 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2528 values
[i
].f
= ir
->value
.f
[i
];
2531 case GLSL_TYPE_UINT
:
2532 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2533 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2534 if (native_integers
)
2535 values
[i
].u
= ir
->value
.u
[i
];
2537 values
[i
].f
= ir
->value
.u
[i
];
2541 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2542 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2543 if (native_integers
)
2544 values
[i
].i
= ir
->value
.i
[i
];
2546 values
[i
].f
= ir
->value
.i
[i
];
2549 case GLSL_TYPE_BOOL
:
2550 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2551 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2552 if (native_integers
)
2553 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2555 values
[i
].f
= ir
->value
.b
[i
];
2559 assert(!"Non-float/uint/int/bool constant");
2562 this->result
= st_src_reg(file
, -1, ir
->type
);
2563 this->result
.index
= add_constant(file
,
2565 ir
->type
->vector_elements
,
2567 &this->result
.swizzle
);
2571 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2573 function_entry
*entry
;
2575 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2576 entry
= (function_entry
*)iter
.get();
2578 if (entry
->sig
== sig
)
2582 entry
= ralloc(mem_ctx
, function_entry
);
2584 entry
->sig_id
= this->next_signature_id
++;
2585 entry
->bgn_inst
= NULL
;
2587 /* Allocate storage for all the parameters. */
2588 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2589 ir_variable
*param
= (ir_variable
*)iter
.get();
2590 variable_storage
*storage
;
2592 storage
= find_variable_storage(param
);
2595 st_src_reg src
= get_temp(param
->type
);
2597 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2598 this->variables
.push_tail(storage
);
2601 if (!sig
->return_type
->is_void()) {
2602 entry
->return_reg
= get_temp(sig
->return_type
);
2604 entry
->return_reg
= undef_src
;
2607 this->function_signatures
.push_tail(entry
);
2612 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2614 glsl_to_tgsi_instruction
*call_inst
;
2615 ir_function_signature
*sig
= ir
->callee
;
2616 function_entry
*entry
= get_function_signature(sig
);
2619 /* Process in parameters. */
2620 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2621 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2622 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2623 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2625 if (param
->mode
== ir_var_function_in
||
2626 param
->mode
== ir_var_function_inout
) {
2627 variable_storage
*storage
= find_variable_storage(param
);
2630 param_rval
->accept(this);
2631 st_src_reg r
= this->result
;
2634 l
.file
= storage
->file
;
2635 l
.index
= storage
->index
;
2637 l
.writemask
= WRITEMASK_XYZW
;
2638 l
.cond_mask
= COND_TR
;
2640 for (i
= 0; i
< type_size(param
->type
); i
++) {
2641 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2649 assert(!sig_iter
.has_next());
2651 /* Emit call instruction */
2652 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2653 call_inst
->function
= entry
;
2655 /* Process out parameters. */
2656 sig_iter
= sig
->parameters
.iterator();
2657 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2658 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2659 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2661 if (param
->mode
== ir_var_function_out
||
2662 param
->mode
== ir_var_function_inout
) {
2663 variable_storage
*storage
= find_variable_storage(param
);
2667 r
.file
= storage
->file
;
2668 r
.index
= storage
->index
;
2670 r
.swizzle
= SWIZZLE_NOOP
;
2673 param_rval
->accept(this);
2674 st_dst_reg l
= st_dst_reg(this->result
);
2676 for (i
= 0; i
< type_size(param
->type
); i
++) {
2677 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2685 assert(!sig_iter
.has_next());
2687 /* Process return value. */
2688 this->result
= entry
->return_reg
;
2692 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2694 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2695 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2696 glsl_to_tgsi_instruction
*inst
= NULL
;
2697 unsigned opcode
= TGSI_OPCODE_NOP
;
2698 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2699 bool is_cube_array
= false;
2701 /* if we are a cube array sampler */
2702 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2703 sampler_type
->sampler_array
)) {
2704 is_cube_array
= true;
2707 if (ir
->coordinate
) {
2708 ir
->coordinate
->accept(this);
2710 /* Put our coords in a temp. We'll need to modify them for shadow,
2711 * projection, or LOD, so the only case we'd use it as is is if
2712 * we're doing plain old texturing. The optimization passes on
2713 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2715 coord
= get_temp(glsl_type::vec4_type
);
2716 coord_dst
= st_dst_reg(coord
);
2717 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2718 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2721 if (ir
->projector
) {
2722 ir
->projector
->accept(this);
2723 projector
= this->result
;
2726 /* Storage for our result. Ideally for an assignment we'd be using
2727 * the actual storage for the result here, instead.
2729 result_src
= get_temp(ir
->type
);
2730 result_dst
= st_dst_reg(result_src
);
2734 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2736 ir
->offset
->accept(this);
2737 offset
= this->result
;
2741 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2742 ir
->lod_info
.bias
->accept(this);
2743 lod_info
= this->result
;
2745 ir
->offset
->accept(this);
2746 offset
= this->result
;
2750 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2751 ir
->lod_info
.lod
->accept(this);
2752 lod_info
= this->result
;
2754 ir
->offset
->accept(this);
2755 offset
= this->result
;
2759 opcode
= TGSI_OPCODE_TXD
;
2760 ir
->lod_info
.grad
.dPdx
->accept(this);
2762 ir
->lod_info
.grad
.dPdy
->accept(this);
2765 ir
->offset
->accept(this);
2766 offset
= this->result
;
2770 opcode
= TGSI_OPCODE_TXQ
;
2771 ir
->lod_info
.lod
->accept(this);
2772 lod_info
= this->result
;
2775 opcode
= TGSI_OPCODE_TXF
;
2776 ir
->lod_info
.lod
->accept(this);
2777 lod_info
= this->result
;
2779 ir
->offset
->accept(this);
2780 offset
= this->result
;
2784 opcode
= TGSI_OPCODE_TXF
;
2785 ir
->lod_info
.sample_index
->accept(this);
2786 sample_index
= this->result
;
2789 assert(!"Unexpected ir_lod opcode");
2792 assert(!"Unexpected ir_tg4 opcode");
2796 if (ir
->projector
) {
2797 if (opcode
== TGSI_OPCODE_TEX
) {
2798 /* Slot the projector in as the last component of the coord. */
2799 coord_dst
.writemask
= WRITEMASK_W
;
2800 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2801 coord_dst
.writemask
= WRITEMASK_XYZW
;
2802 opcode
= TGSI_OPCODE_TXP
;
2804 st_src_reg coord_w
= coord
;
2805 coord_w
.swizzle
= SWIZZLE_WWWW
;
2807 /* For the other TEX opcodes there's no projective version
2808 * since the last slot is taken up by LOD info. Do the
2809 * projective divide now.
2811 coord_dst
.writemask
= WRITEMASK_W
;
2812 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2814 /* In the case where we have to project the coordinates "by hand,"
2815 * the shadow comparator value must also be projected.
2817 st_src_reg tmp_src
= coord
;
2818 if (ir
->shadow_comparitor
) {
2819 /* Slot the shadow value in as the second to last component of the
2822 ir
->shadow_comparitor
->accept(this);
2824 tmp_src
= get_temp(glsl_type::vec4_type
);
2825 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2827 /* Projective division not allowed for array samplers. */
2828 assert(!sampler_type
->sampler_array
);
2830 tmp_dst
.writemask
= WRITEMASK_Z
;
2831 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2833 tmp_dst
.writemask
= WRITEMASK_XY
;
2834 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2837 coord_dst
.writemask
= WRITEMASK_XYZ
;
2838 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2840 coord_dst
.writemask
= WRITEMASK_XYZW
;
2841 coord
.swizzle
= SWIZZLE_XYZW
;
2845 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2846 * comparator was put in the correct place (and projected) by the code,
2847 * above, that handles by-hand projection.
2849 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2850 /* Slot the shadow value in as the second to last component of the
2853 ir
->shadow_comparitor
->accept(this);
2855 if (is_cube_array
) {
2856 cube_sc
= get_temp(glsl_type::float_type
);
2857 cube_sc_dst
= st_dst_reg(cube_sc
);
2858 cube_sc_dst
.writemask
= WRITEMASK_X
;
2859 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2860 cube_sc_dst
.writemask
= WRITEMASK_X
;
2863 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2864 sampler_type
->sampler_array
) ||
2865 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2866 coord_dst
.writemask
= WRITEMASK_W
;
2868 coord_dst
.writemask
= WRITEMASK_Z
;
2871 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2872 coord_dst
.writemask
= WRITEMASK_XYZW
;
2876 if (ir
->op
== ir_txf_ms
) {
2877 coord_dst
.writemask
= WRITEMASK_W
;
2878 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2879 coord_dst
.writemask
= WRITEMASK_XYZW
;
2880 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2881 opcode
== TGSI_OPCODE_TXF
) {
2882 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2883 coord_dst
.writemask
= WRITEMASK_W
;
2884 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2885 coord_dst
.writemask
= WRITEMASK_XYZW
;
2888 if (opcode
== TGSI_OPCODE_TXD
)
2889 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2890 else if (opcode
== TGSI_OPCODE_TXQ
)
2891 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2892 else if (opcode
== TGSI_OPCODE_TXF
) {
2893 inst
= emit(ir
, opcode
, result_dst
, coord
);
2894 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2895 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2896 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2897 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2899 inst
= emit(ir
, opcode
, result_dst
, coord
);
2901 if (ir
->shadow_comparitor
)
2902 inst
->tex_shadow
= GL_TRUE
;
2904 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2905 this->shader_program
,
2909 inst
->tex_offset_num_offset
= 1;
2910 inst
->tex_offsets
[0].Index
= offset
.index
;
2911 inst
->tex_offsets
[0].File
= offset
.file
;
2912 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2913 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2914 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2917 switch (sampler_type
->sampler_dimensionality
) {
2918 case GLSL_SAMPLER_DIM_1D
:
2919 inst
->tex_target
= (sampler_type
->sampler_array
)
2920 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2922 case GLSL_SAMPLER_DIM_2D
:
2923 inst
->tex_target
= (sampler_type
->sampler_array
)
2924 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2926 case GLSL_SAMPLER_DIM_3D
:
2927 inst
->tex_target
= TEXTURE_3D_INDEX
;
2929 case GLSL_SAMPLER_DIM_CUBE
:
2930 inst
->tex_target
= (sampler_type
->sampler_array
)
2931 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2933 case GLSL_SAMPLER_DIM_RECT
:
2934 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2936 case GLSL_SAMPLER_DIM_BUF
:
2937 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2939 case GLSL_SAMPLER_DIM_EXTERNAL
:
2940 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2942 case GLSL_SAMPLER_DIM_MS
:
2943 inst
->tex_target
= (sampler_type
->sampler_array
)
2944 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2947 assert(!"Should not get here.");
2950 this->result
= result_src
;
2954 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2956 if (ir
->get_value()) {
2960 assert(current_function
);
2962 ir
->get_value()->accept(this);
2963 st_src_reg r
= this->result
;
2965 l
= st_dst_reg(current_function
->return_reg
);
2967 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2968 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2974 emit(ir
, TGSI_OPCODE_RET
);
2978 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2980 if (ir
->condition
) {
2981 ir
->condition
->accept(this);
2982 this->result
.negate
= ~this->result
.negate
;
2983 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
2985 /* unconditional kil */
2986 emit(ir
, TGSI_OPCODE_KILL
);
2991 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2994 glsl_to_tgsi_instruction
*if_inst
;
2996 ir
->condition
->accept(this);
2997 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2999 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3001 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3003 this->instructions
.push_tail(if_inst
);
3005 visit_exec_list(&ir
->then_instructions
, this);
3007 if (!ir
->else_instructions
.is_empty()) {
3008 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3009 visit_exec_list(&ir
->else_instructions
, this);
3012 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3016 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3018 assert(!"Geometry shaders not supported.");
3022 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3024 assert(!"Geometry shaders not supported.");
3027 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3029 result
.file
= PROGRAM_UNDEFINED
;
3032 next_signature_id
= 1;
3034 current_function
= NULL
;
3035 num_address_regs
= 0;
3037 indirect_addr_consts
= false;
3039 native_integers
= false;
3040 mem_ctx
= ralloc_context(NULL
);
3043 shader_program
= NULL
;
3047 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3049 ralloc_free(mem_ctx
);
3052 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3059 * Count resources used by the given gpu program (number of texture
3063 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3065 v
->samplers_used
= 0;
3067 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3068 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3070 if (is_tex_instruction(inst
->op
)) {
3071 v
->samplers_used
|= 1 << inst
->sampler
;
3073 if (inst
->tex_shadow
) {
3074 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3079 prog
->SamplersUsed
= v
->samplers_used
;
3081 if (v
->shader_program
!= NULL
)
3082 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3086 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3087 struct gl_shader_program
*shader_program
,
3088 const char *name
, const glsl_type
*type
,
3091 if (type
->is_record()) {
3092 ir_constant
*field_constant
;
3094 field_constant
= (ir_constant
*)val
->components
.get_head();
3096 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3097 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3098 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3099 type
->fields
.structure
[i
].name
);
3100 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3101 field_type
, field_constant
);
3102 field_constant
= (ir_constant
*)field_constant
->next
;
3108 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3110 if (offset
== GL_INVALID_INDEX
) {
3111 fail_link(shader_program
,
3112 "Couldn't find uniform for initializer %s\n", name
);
3115 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3117 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3118 ir_constant
*element
;
3119 const glsl_type
*element_type
;
3120 if (type
->is_array()) {
3121 element
= val
->array_elements
[i
];
3122 element_type
= type
->fields
.array
;
3125 element_type
= type
;
3130 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3131 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3132 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3133 conv
[j
] = element
->value
.b
[j
];
3135 values
= (void *)conv
;
3136 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3137 element_type
->vector_elements
,
3140 values
= &element
->value
;
3143 if (element_type
->is_matrix()) {
3144 _mesa_uniform_matrix(ctx
, shader_program
,
3145 element_type
->matrix_columns
,
3146 element_type
->vector_elements
,
3147 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3149 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3150 values
, element_type
->gl_type
);
3158 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3159 * are read from the given src in this instruction
3162 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3164 int read_mask
= 0, comp
;
3166 /* Now, given the src swizzle and the written channels, find which
3167 * components are actually read
3169 for (comp
= 0; comp
< 4; ++comp
) {
3170 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3172 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3173 read_mask
|= 1 << coord
;
3180 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3181 * instruction is the first instruction to write to register T0. There are
3182 * several lowering passes done in GLSL IR (e.g. branches and
3183 * relative addressing) that create a large number of conditional assignments
3184 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3186 * Here is why this conversion is safe:
3187 * CMP T0, T1 T2 T0 can be expanded to:
3193 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3194 * as the original program. If (T1 < 0.0) evaluates to false, executing
3195 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3196 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3197 * because any instruction that was going to read from T0 after this was going
3198 * to read a garbage value anyway.
3201 glsl_to_tgsi_visitor::simplify_cmp(void)
3203 unsigned *tempWrites
;
3204 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3206 tempWrites
= new unsigned[MAX_TEMPS
];
3210 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3211 memset(outputWrites
, 0, sizeof(outputWrites
));
3213 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3214 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3215 unsigned prevWriteMask
= 0;
3217 /* Give up if we encounter relative addressing or flow control. */
3218 if (inst
->dst
.reladdr
||
3219 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3220 inst
->op
== TGSI_OPCODE_BGNSUB
||
3221 inst
->op
== TGSI_OPCODE_CONT
||
3222 inst
->op
== TGSI_OPCODE_END
||
3223 inst
->op
== TGSI_OPCODE_ENDSUB
||
3224 inst
->op
== TGSI_OPCODE_RET
) {
3228 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3229 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3230 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3231 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3232 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3233 assert(inst
->dst
.index
< MAX_TEMPS
);
3234 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3235 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3239 /* For a CMP to be considered a conditional write, the destination
3240 * register and source register two must be the same. */
3241 if (inst
->op
== TGSI_OPCODE_CMP
3242 && !(inst
->dst
.writemask
& prevWriteMask
)
3243 && inst
->src
[2].file
== inst
->dst
.file
3244 && inst
->src
[2].index
== inst
->dst
.index
3245 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3247 inst
->op
= TGSI_OPCODE_MOV
;
3248 inst
->src
[0] = inst
->src
[1];
3252 delete [] tempWrites
;
3255 /* Replaces all references to a temporary register index with another index. */
3257 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3259 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3260 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3263 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3264 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3265 inst
->src
[j
].index
== index
) {
3266 inst
->src
[j
].index
= new_index
;
3270 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3271 inst
->dst
.index
= new_index
;
3277 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3279 int depth
= 0; /* loop depth */
3280 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3283 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3284 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3286 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3287 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3288 inst
->src
[j
].index
== index
) {
3289 return (depth
== 0) ? i
: loop_start
;
3293 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3296 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3309 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3311 int depth
= 0; /* loop depth */
3312 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3315 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3316 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3318 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3319 return (depth
== 0) ? i
: loop_start
;
3322 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3325 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3338 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3340 int depth
= 0; /* loop depth */
3341 int last
= -1; /* index of last instruction that reads the temporary */
3344 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3345 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3347 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3348 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3349 inst
->src
[j
].index
== index
) {
3350 last
= (depth
== 0) ? i
: -2;
3354 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3356 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3357 if (--depth
== 0 && last
== -2)
3369 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3371 int depth
= 0; /* loop depth */
3372 int last
= -1; /* index of last instruction that writes to the temporary */
3375 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3376 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3378 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3379 last
= (depth
== 0) ? i
: -2;
3381 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3383 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3384 if (--depth
== 0 && last
== -2)
3396 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3397 * channels for copy propagation and updates following instructions to
3398 * use the original versions.
3400 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3401 * will occur. As an example, a TXP production before this pass:
3403 * 0: MOV TEMP[1], INPUT[4].xyyy;
3404 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3405 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3409 * 0: MOV TEMP[1], INPUT[4].xyyy;
3410 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3411 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3413 * which allows for dead code elimination on TEMP[1]'s writes.
3416 glsl_to_tgsi_visitor::copy_propagate(void)
3418 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3419 glsl_to_tgsi_instruction
*,
3420 this->next_temp
* 4);
3421 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3424 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3425 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3427 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3428 || inst
->dst
.index
< this->next_temp
);
3430 /* First, do any copy propagation possible into the src regs. */
3431 for (int r
= 0; r
< 3; r
++) {
3432 glsl_to_tgsi_instruction
*first
= NULL
;
3434 int acp_base
= inst
->src
[r
].index
* 4;
3436 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3437 inst
->src
[r
].reladdr
)
3440 /* See if we can find entries in the ACP consisting of MOVs
3441 * from the same src register for all the swizzled channels
3442 * of this src register reference.
3444 for (int i
= 0; i
< 4; i
++) {
3445 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3446 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3453 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3458 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3459 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3467 /* We've now validated that we can copy-propagate to
3468 * replace this src register reference. Do it.
3470 inst
->src
[r
].file
= first
->src
[0].file
;
3471 inst
->src
[r
].index
= first
->src
[0].index
;
3474 for (int i
= 0; i
< 4; i
++) {
3475 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3476 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3477 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3480 inst
->src
[r
].swizzle
= swizzle
;
3485 case TGSI_OPCODE_BGNLOOP
:
3486 case TGSI_OPCODE_ENDLOOP
:
3487 /* End of a basic block, clear the ACP entirely. */
3488 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3491 case TGSI_OPCODE_IF
:
3492 case TGSI_OPCODE_UIF
:
3496 case TGSI_OPCODE_ENDIF
:
3497 case TGSI_OPCODE_ELSE
:
3498 /* Clear all channels written inside the block from the ACP, but
3499 * leaving those that were not touched.
3501 for (int r
= 0; r
< this->next_temp
; r
++) {
3502 for (int c
= 0; c
< 4; c
++) {
3503 if (!acp
[4 * r
+ c
])
3506 if (acp_level
[4 * r
+ c
] >= level
)
3507 acp
[4 * r
+ c
] = NULL
;
3510 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3515 /* Continuing the block, clear any written channels from
3518 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3519 /* Any temporary might be written, so no copy propagation
3520 * across this instruction.
3522 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3523 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3524 inst
->dst
.reladdr
) {
3525 /* Any output might be written, so no copy propagation
3526 * from outputs across this instruction.
3528 for (int r
= 0; r
< this->next_temp
; r
++) {
3529 for (int c
= 0; c
< 4; c
++) {
3530 if (!acp
[4 * r
+ c
])
3533 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3534 acp
[4 * r
+ c
] = NULL
;
3537 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3538 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3539 /* Clear where it's used as dst. */
3540 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3541 for (int c
= 0; c
< 4; c
++) {
3542 if (inst
->dst
.writemask
& (1 << c
)) {
3543 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3548 /* Clear where it's used as src. */
3549 for (int r
= 0; r
< this->next_temp
; r
++) {
3550 for (int c
= 0; c
< 4; c
++) {
3551 if (!acp
[4 * r
+ c
])
3554 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3556 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3557 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3558 inst
->dst
.writemask
& (1 << src_chan
))
3560 acp
[4 * r
+ c
] = NULL
;
3568 /* If this is a copy, add it to the ACP. */
3569 if (inst
->op
== TGSI_OPCODE_MOV
&&
3570 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3571 !(inst
->dst
.file
== inst
->src
[0].file
&&
3572 inst
->dst
.index
== inst
->src
[0].index
) &&
3573 !inst
->dst
.reladdr
&&
3575 !inst
->src
[0].reladdr
&&
3576 !inst
->src
[0].negate
) {
3577 for (int i
= 0; i
< 4; i
++) {
3578 if (inst
->dst
.writemask
& (1 << i
)) {
3579 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3580 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3586 ralloc_free(acp_level
);
3591 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3593 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3594 * will occur. As an example, a TXP production after copy propagation but
3597 * 0: MOV TEMP[1], INPUT[4].xyyy;
3598 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3599 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3601 * and after this pass:
3603 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3605 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3606 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3609 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3613 for (i
=0; i
< this->next_temp
; i
++) {
3614 int last_read
= get_last_temp_read(i
);
3617 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3618 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3620 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3633 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3634 * code elimination. This is less primitive than eliminate_dead_code(), as it
3635 * is per-channel and can detect consecutive writes without a read between them
3636 * as dead code. However, there is some dead code that can be eliminated by
3637 * eliminate_dead_code() but not this function - for example, this function
3638 * cannot eliminate an instruction writing to a register that is never read and
3639 * is the only instruction writing to that register.
3641 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3645 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3647 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3648 glsl_to_tgsi_instruction
*,
3649 this->next_temp
* 4);
3650 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3654 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3655 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3657 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3658 || inst
->dst
.index
< this->next_temp
);
3661 case TGSI_OPCODE_BGNLOOP
:
3662 case TGSI_OPCODE_ENDLOOP
:
3663 case TGSI_OPCODE_CONT
:
3664 case TGSI_OPCODE_BRK
:
3665 /* End of a basic block, clear the write array entirely.
3667 * This keeps us from killing dead code when the writes are
3668 * on either side of a loop, even when the register isn't touched
3669 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3670 * dead code of this type, so it shouldn't make a difference as long as
3671 * the dead code elimination pass in the GLSL compiler does its job.
3673 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3676 case TGSI_OPCODE_ENDIF
:
3677 case TGSI_OPCODE_ELSE
:
3678 /* Promote the recorded level of all channels written inside the
3679 * preceding if or else block to the level above the if/else block.
3681 for (int r
= 0; r
< this->next_temp
; r
++) {
3682 for (int c
= 0; c
< 4; c
++) {
3683 if (!writes
[4 * r
+ c
])
3686 if (write_level
[4 * r
+ c
] == level
)
3687 write_level
[4 * r
+ c
] = level
-1;
3691 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3696 case TGSI_OPCODE_IF
:
3697 case TGSI_OPCODE_UIF
:
3699 /* fallthrough to default case to mark the condition as read */
3702 /* Continuing the block, clear any channels from the write array that
3703 * are read by this instruction.
3705 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3706 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3707 /* Any temporary might be read, so no dead code elimination
3708 * across this instruction.
3710 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3711 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3712 /* Clear where it's used as src. */
3713 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3714 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3715 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3716 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3718 for (int c
= 0; c
< 4; c
++) {
3719 if (src_chans
& (1 << c
)) {
3720 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3728 /* If this instruction writes to a temporary, add it to the write array.
3729 * If there is already an instruction in the write array for one or more
3730 * of the channels, flag that channel write as dead.
3732 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3733 !inst
->dst
.reladdr
&&
3735 for (int c
= 0; c
< 4; c
++) {
3736 if (inst
->dst
.writemask
& (1 << c
)) {
3737 if (writes
[4 * inst
->dst
.index
+ c
]) {
3738 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3741 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3743 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3744 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3750 /* Anything still in the write array at this point is dead code. */
3751 for (int r
= 0; r
< this->next_temp
; r
++) {
3752 for (int c
= 0; c
< 4; c
++) {
3753 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3755 inst
->dead_mask
|= (1 << c
);
3759 /* Now actually remove the instructions that are completely dead and update
3760 * the writemask of other instructions with dead channels.
3762 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3763 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3765 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3767 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3772 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3775 ralloc_free(write_level
);
3776 ralloc_free(writes
);
3781 /* Merges temporary registers together where possible to reduce the number of
3782 * registers needed to run a program.
3784 * Produces optimal code only after copy propagation and dead code elimination
3787 glsl_to_tgsi_visitor::merge_registers(void)
3789 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3790 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3793 /* Read the indices of the last read and first write to each temp register
3794 * into an array so that we don't have to traverse the instruction list as
3796 for (i
=0; i
< this->next_temp
; i
++) {
3797 last_reads
[i
] = get_last_temp_read(i
);
3798 first_writes
[i
] = get_first_temp_write(i
);
3801 /* Start looking for registers with non-overlapping usages that can be
3802 * merged together. */
3803 for (i
=0; i
< this->next_temp
; i
++) {
3804 /* Don't touch unused registers. */
3805 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3807 for (j
=0; j
< this->next_temp
; j
++) {
3808 /* Don't touch unused registers. */
3809 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3811 /* We can merge the two registers if the first write to j is after or
3812 * in the same instruction as the last read from i. Note that the
3813 * register at index i will always be used earlier or at the same time
3814 * as the register at index j. */
3815 if (first_writes
[i
] <= first_writes
[j
] &&
3816 last_reads
[i
] <= first_writes
[j
])
3818 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3820 /* Update the first_writes and last_reads arrays with the new
3821 * values for the merged register index, and mark the newly unused
3822 * register index as such. */
3823 last_reads
[i
] = last_reads
[j
];
3824 first_writes
[j
] = -1;
3830 ralloc_free(last_reads
);
3831 ralloc_free(first_writes
);
3834 /* Reassign indices to temporary registers by reusing unused indices created
3835 * by optimization passes. */
3837 glsl_to_tgsi_visitor::renumber_registers(void)
3842 for (i
=0; i
< this->next_temp
; i
++) {
3843 if (get_first_temp_read(i
) < 0) continue;
3845 rename_temp_register(i
, new_index
);
3849 this->next_temp
= new_index
;
3853 * Returns a fragment program which implements the current pixel transfer ops.
3854 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3857 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3858 glsl_to_tgsi_visitor
*original
,
3859 int scale_and_bias
, int pixel_maps
)
3861 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3862 struct st_context
*st
= st_context(original
->ctx
);
3863 struct gl_program
*prog
= &fp
->Base
.Base
;
3864 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3865 st_src_reg coord
, src0
;
3867 glsl_to_tgsi_instruction
*inst
;
3869 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3870 v
->ctx
= original
->ctx
;
3872 v
->shader_program
= NULL
;
3873 v
->glsl_version
= original
->glsl_version
;
3874 v
->native_integers
= original
->native_integers
;
3875 v
->options
= original
->options
;
3876 v
->next_temp
= original
->next_temp
;
3877 v
->num_address_regs
= original
->num_address_regs
;
3878 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3879 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3880 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3881 v
->num_immediates
= original
->num_immediates
;
3884 * Get initial pixel color from the texture.
3885 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3887 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3888 src0
= v
->get_temp(glsl_type::vec4_type
);
3889 dst0
= st_dst_reg(src0
);
3890 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3892 inst
->tex_target
= TEXTURE_2D_INDEX
;
3894 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3895 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3896 v
->samplers_used
|= (1 << 0);
3898 if (scale_and_bias
) {
3899 static const gl_state_index scale_state
[STATE_LENGTH
] =
3900 { STATE_INTERNAL
, STATE_PT_SCALE
,
3901 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3902 static const gl_state_index bias_state
[STATE_LENGTH
] =
3903 { STATE_INTERNAL
, STATE_PT_BIAS
,
3904 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3905 GLint scale_p
, bias_p
;
3906 st_src_reg scale
, bias
;
3908 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3909 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3911 /* MAD colorTemp, colorTemp, scale, bias; */
3912 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3913 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3914 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3918 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3919 st_dst_reg temp_dst
= st_dst_reg(temp
);
3921 assert(st
->pixel_xfer
.pixelmap_texture
);
3923 /* With a little effort, we can do four pixel map look-ups with
3924 * two TEX instructions:
3927 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3928 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3929 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3931 inst
->tex_target
= TEXTURE_2D_INDEX
;
3933 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3934 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3935 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3936 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3938 inst
->tex_target
= TEXTURE_2D_INDEX
;
3940 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3941 v
->samplers_used
|= (1 << 1);
3943 /* MOV colorTemp, temp; */
3944 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3947 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3949 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3950 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3951 glsl_to_tgsi_instruction
*newinst
;
3952 st_src_reg src_regs
[3];
3954 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3955 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3957 for (int i
=0; i
<3; i
++) {
3958 src_regs
[i
] = inst
->src
[i
];
3959 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3960 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3962 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3963 src_regs
[i
].index
= src0
.index
;
3965 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3966 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3969 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3970 newinst
->tex_target
= inst
->tex_target
;
3973 /* Make modifications to fragment program info. */
3974 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3975 original
->prog
->Parameters
);
3976 _mesa_free_parameter_list(params
);
3977 count_resources(v
, prog
);
3978 fp
->glsl_to_tgsi
= v
;
3982 * Make fragment program for glBitmap:
3983 * Sample the texture and kill the fragment if the bit is 0.
3984 * This program will be combined with the user's fragment program.
3986 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3989 get_bitmap_visitor(struct st_fragment_program
*fp
,
3990 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3992 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3993 struct st_context
*st
= st_context(original
->ctx
);
3994 struct gl_program
*prog
= &fp
->Base
.Base
;
3995 st_src_reg coord
, src0
;
3997 glsl_to_tgsi_instruction
*inst
;
3999 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4000 v
->ctx
= original
->ctx
;
4002 v
->shader_program
= NULL
;
4003 v
->glsl_version
= original
->glsl_version
;
4004 v
->native_integers
= original
->native_integers
;
4005 v
->options
= original
->options
;
4006 v
->next_temp
= original
->next_temp
;
4007 v
->num_address_regs
= original
->num_address_regs
;
4008 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4009 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4010 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4011 v
->num_immediates
= original
->num_immediates
;
4013 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4014 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4015 src0
= v
->get_temp(glsl_type::vec4_type
);
4016 dst0
= st_dst_reg(src0
);
4017 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4018 inst
->sampler
= samplerIndex
;
4019 inst
->tex_target
= TEXTURE_2D_INDEX
;
4021 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4022 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4023 v
->samplers_used
|= (1 << samplerIndex
);
4025 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4026 src0
.negate
= NEGATE_XYZW
;
4027 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4028 src0
.swizzle
= SWIZZLE_XXXX
;
4029 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4031 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4033 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4034 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4035 glsl_to_tgsi_instruction
*newinst
;
4036 st_src_reg src_regs
[3];
4038 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4039 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4041 for (int i
=0; i
<3; i
++) {
4042 src_regs
[i
] = inst
->src
[i
];
4043 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4044 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4047 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4048 newinst
->tex_target
= inst
->tex_target
;
4051 /* Make modifications to fragment program info. */
4052 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4053 count_resources(v
, prog
);
4054 fp
->glsl_to_tgsi
= v
;
4057 /* ------------------------- TGSI conversion stuff -------------------------- */
4059 unsigned branch_target
;
4064 * Intermediate state used during shader translation.
4066 struct st_translate
{
4067 struct ureg_program
*ureg
;
4069 struct ureg_dst temps
[MAX_TEMPS
];
4070 struct ureg_dst arrays
[MAX_ARRAYS
];
4071 struct ureg_src
*constants
;
4072 struct ureg_src
*immediates
;
4073 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4074 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4075 struct ureg_dst address
[1];
4076 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4077 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4079 unsigned array_sizes
[MAX_ARRAYS
];
4081 const GLuint
*inputMapping
;
4082 const GLuint
*outputMapping
;
4084 /* For every instruction that contains a label (eg CALL), keep
4085 * details so that we can go back afterwards and emit the correct
4086 * tgsi instruction number for each label.
4088 struct label
*labels
;
4089 unsigned labels_size
;
4090 unsigned labels_count
;
4092 /* Keep a record of the tgsi instruction number that each mesa
4093 * instruction starts at, will be used to fix up labels after
4098 unsigned insn_count
;
4100 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4105 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4106 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4108 TGSI_SEMANTIC_VERTEXID
,
4109 TGSI_SEMANTIC_INSTANCEID
4113 * Make note of a branch to a label in the TGSI code.
4114 * After we've emitted all instructions, we'll go over the list
4115 * of labels built here and patch the TGSI code with the actual
4116 * location of each label.
4118 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4122 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4123 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4124 t
->labels
= (struct label
*)realloc(t
->labels
,
4125 t
->labels_size
* sizeof(struct label
));
4126 if (t
->labels
== NULL
) {
4127 static unsigned dummy
;
4133 i
= t
->labels_count
++;
4134 t
->labels
[i
].branch_target
= branch_target
;
4135 return &t
->labels
[i
].token
;
4139 * Called prior to emitting the TGSI code for each instruction.
4140 * Allocate additional space for instructions if needed.
4141 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4142 * the next TGSI instruction.
4144 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4146 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4147 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4148 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4149 if (t
->insn
== NULL
) {
4155 t
->insn
[t
->insn_count
++] = start
;
4159 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4161 static struct ureg_src
4162 emit_immediate(struct st_translate
*t
,
4163 gl_constant_value values
[4],
4166 struct ureg_program
*ureg
= t
->ureg
;
4171 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4173 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4174 case GL_UNSIGNED_INT
:
4176 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4178 assert(!"should not get here - type must be float, int, uint, or bool");
4179 return ureg_src_undef();
4184 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4186 static struct ureg_dst
4187 dst_register(struct st_translate
*t
,
4188 gl_register_file file
,
4194 case PROGRAM_UNDEFINED
:
4195 return ureg_dst_undef();
4197 case PROGRAM_TEMPORARY
:
4199 assert(index
< (int) Elements(t
->temps
));
4201 if (ureg_dst_is_undef(t
->temps
[index
]))
4202 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4204 return t
->temps
[index
];
4207 array
= index
>> 16;
4210 assert(array
< (int) Elements(t
->arrays
));
4212 if (ureg_dst_is_undef(t
->arrays
[array
]))
4213 t
->arrays
[array
] = ureg_DECL_array_temporary(
4214 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4216 return ureg_dst_array_offset(t
->arrays
[array
],
4217 (int)(index
& 0xFFFF) - 0x8000);
4219 case PROGRAM_OUTPUT
:
4220 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4221 assert(index
< VARYING_SLOT_MAX
);
4222 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4223 assert(index
< FRAG_RESULT_MAX
);
4225 assert(index
< VARYING_SLOT_MAX
);
4227 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4229 return t
->outputs
[t
->outputMapping
[index
]];
4231 case PROGRAM_ADDRESS
:
4232 return t
->address
[index
];
4235 assert(!"unknown dst register file");
4236 return ureg_dst_undef();
4241 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4243 static struct ureg_src
4244 src_register(struct st_translate
*t
,
4245 gl_register_file file
,
4246 GLint index
, GLint index2D
)
4249 case PROGRAM_UNDEFINED
:
4250 return ureg_src_undef();
4252 case PROGRAM_TEMPORARY
:
4254 return ureg_src(dst_register(t
, file
, index
));
4256 case PROGRAM_ENV_PARAM
:
4257 case PROGRAM_LOCAL_PARAM
:
4258 case PROGRAM_UNIFORM
:
4260 return t
->constants
[index
];
4261 case PROGRAM_STATE_VAR
:
4262 case PROGRAM_CONSTANT
: /* ie, immediate */
4264 struct ureg_src src
;
4265 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4267 src
.DimensionIndex
= index2D
;
4269 } else if (index
< 0)
4270 return ureg_DECL_constant(t
->ureg
, 0);
4272 return t
->constants
[index
];
4274 case PROGRAM_IMMEDIATE
:
4275 return t
->immediates
[index
];
4278 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4279 return t
->inputs
[t
->inputMapping
[index
]];
4281 case PROGRAM_OUTPUT
:
4282 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4283 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4285 case PROGRAM_ADDRESS
:
4286 return ureg_src(t
->address
[index
]);
4288 case PROGRAM_SYSTEM_VALUE
:
4289 assert(index
< (int) Elements(t
->systemValues
));
4290 return t
->systemValues
[index
];
4293 assert(!"unknown src register file");
4294 return ureg_src_undef();
4299 * Create a TGSI ureg_dst register from an st_dst_reg.
4301 static struct ureg_dst
4302 translate_dst(struct st_translate
*t
,
4303 const st_dst_reg
*dst_reg
,
4304 bool saturate
, bool clamp_color
)
4306 struct ureg_dst dst
= dst_register(t
,
4310 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4313 dst
= ureg_saturate(dst
);
4314 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4315 /* Clamp colors for ARB_color_buffer_float. */
4316 switch (t
->procType
) {
4317 case TGSI_PROCESSOR_VERTEX
:
4318 /* XXX if the geometry shader is present, this must be done there
4319 * instead of here. */
4320 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4321 dst_reg
->index
== VARYING_SLOT_COL1
||
4322 dst_reg
->index
== VARYING_SLOT_BFC0
||
4323 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4324 dst
= ureg_saturate(dst
);
4328 case TGSI_PROCESSOR_FRAGMENT
:
4329 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4330 dst
= ureg_saturate(dst
);
4336 if (dst_reg
->reladdr
!= NULL
) {
4337 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4338 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4345 * Create a TGSI ureg_src register from an st_src_reg.
4347 static struct ureg_src
4348 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4350 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4352 src
= ureg_swizzle(src
,
4353 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4354 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4355 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4356 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4358 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4359 src
= ureg_negate(src
);
4361 if (src_reg
->reladdr
!= NULL
) {
4362 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4363 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4369 static struct tgsi_texture_offset
4370 translate_tex_offset(struct st_translate
*t
,
4371 const struct tgsi_texture_offset
*in_offset
)
4373 struct tgsi_texture_offset offset
;
4374 struct ureg_src imm_src
;
4376 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4377 imm_src
= t
->immediates
[in_offset
->Index
];
4379 offset
.File
= imm_src
.File
;
4380 offset
.Index
= imm_src
.Index
;
4381 offset
.SwizzleX
= imm_src
.SwizzleX
;
4382 offset
.SwizzleY
= imm_src
.SwizzleY
;
4383 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4384 offset
.File
= TGSI_FILE_IMMEDIATE
;
4391 compile_tgsi_instruction(struct st_translate
*t
,
4392 const glsl_to_tgsi_instruction
*inst
,
4393 bool clamp_dst_color_output
)
4395 struct ureg_program
*ureg
= t
->ureg
;
4397 struct ureg_dst dst
[1];
4398 struct ureg_src src
[4];
4399 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4403 unsigned tex_target
;
4405 num_dst
= num_inst_dst_regs(inst
->op
);
4406 num_src
= num_inst_src_regs(inst
->op
);
4409 dst
[0] = translate_dst(t
,
4412 clamp_dst_color_output
);
4414 for (i
= 0; i
< num_src
; i
++)
4415 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4418 case TGSI_OPCODE_BGNLOOP
:
4419 case TGSI_OPCODE_CAL
:
4420 case TGSI_OPCODE_ELSE
:
4421 case TGSI_OPCODE_ENDLOOP
:
4422 case TGSI_OPCODE_IF
:
4423 case TGSI_OPCODE_UIF
:
4424 assert(num_dst
== 0);
4425 ureg_label_insn(ureg
,
4429 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4432 case TGSI_OPCODE_TEX
:
4433 case TGSI_OPCODE_TXB
:
4434 case TGSI_OPCODE_TXD
:
4435 case TGSI_OPCODE_TXL
:
4436 case TGSI_OPCODE_TXP
:
4437 case TGSI_OPCODE_TXQ
:
4438 case TGSI_OPCODE_TXF
:
4439 case TGSI_OPCODE_TEX2
:
4440 case TGSI_OPCODE_TXB2
:
4441 case TGSI_OPCODE_TXL2
:
4442 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4443 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4444 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4446 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4452 texoffsets
, inst
->tex_offset_num_offset
,
4456 case TGSI_OPCODE_SCS
:
4457 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4458 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4471 * Emit the TGSI instructions for inverting and adjusting WPOS.
4472 * This code is unavoidable because it also depends on whether
4473 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4476 emit_wpos_adjustment( struct st_translate
*t
,
4477 const struct gl_program
*program
,
4479 GLfloat adjX
, GLfloat adjY
[2])
4481 struct ureg_program
*ureg
= t
->ureg
;
4483 /* Fragment program uses fragment position input.
4484 * Need to replace instances of INPUT[WPOS] with temp T
4485 * where T = INPUT[WPOS] by y is inverted.
4487 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4488 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4489 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4491 /* XXX: note we are modifying the incoming shader here! Need to
4492 * do this before emitting the constant decls below, or this
4495 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4496 wposTransformState
);
4498 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4499 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4500 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4502 /* First, apply the coordinate shift: */
4503 if (adjX
|| adjY
[0] || adjY
[1]) {
4504 if (adjY
[0] != adjY
[1]) {
4505 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4506 * depending on whether inversion is actually going to be applied
4507 * or not, which is determined by testing against the inversion
4508 * state variable used below, which will be either +1 or -1.
4510 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4512 ureg_CMP(ureg
, adj_temp
,
4513 ureg_scalar(wpostrans
, invert
? 2 : 0),
4514 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4515 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4516 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4518 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4519 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4521 wpos_input
= ureg_src(wpos_temp
);
4523 /* MOV wpos_temp, input[wpos]
4525 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4528 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4529 * inversion/identity, or the other way around if we're drawing to an FBO.
4532 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4535 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4537 ureg_scalar(wpostrans
, 0),
4538 ureg_scalar(wpostrans
, 1));
4540 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4543 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4545 ureg_scalar(wpostrans
, 2),
4546 ureg_scalar(wpostrans
, 3));
4549 /* Use wpos_temp as position input from here on:
4551 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4556 * Emit fragment position/ooordinate code.
4559 emit_wpos(struct st_context
*st
,
4560 struct st_translate
*t
,
4561 const struct gl_program
*program
,
4562 struct ureg_program
*ureg
)
4564 const struct gl_fragment_program
*fp
=
4565 (const struct gl_fragment_program
*) program
;
4566 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4567 GLfloat adjX
= 0.0f
;
4568 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4569 boolean invert
= FALSE
;
4571 /* Query the pixel center conventions supported by the pipe driver and set
4572 * adjX, adjY to help out if it cannot handle the requested one internally.
4574 * The bias of the y-coordinate depends on whether y-inversion takes place
4575 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4576 * drawing to an FBO (causes additional inversion), and whether the the pipe
4577 * driver origin and the requested origin differ (the latter condition is
4578 * stored in the 'invert' variable).
4580 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4582 * center shift only:
4587 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4588 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4589 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4590 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4592 * inversion and center shift:
4593 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4594 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4595 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4596 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4598 if (fp
->OriginUpperLeft
) {
4599 /* Fragment shader wants origin in upper-left */
4600 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4601 /* the driver supports upper-left origin */
4603 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4604 /* the driver supports lower-left origin, need to invert Y */
4605 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4612 /* Fragment shader wants origin in lower-left */
4613 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4614 /* the driver supports lower-left origin */
4615 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4616 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4617 /* the driver supports upper-left origin, need to invert Y */
4623 if (fp
->PixelCenterInteger
) {
4624 /* Fragment shader wants pixel center integer */
4625 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4626 /* the driver supports pixel center integer */
4628 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4630 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4631 /* the driver supports pixel center half integer, need to bias X,Y */
4640 /* Fragment shader wants pixel center half integer */
4641 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4642 /* the driver supports pixel center half integer */
4644 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4645 /* the driver supports pixel center integer, need to bias X,Y */
4646 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4647 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4653 /* we invert after adjustment so that we avoid the MOV to temporary,
4654 * and reuse the adjustment ADD instead */
4655 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4659 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4660 * TGSI uses +1 for front, -1 for back.
4661 * This function converts the TGSI value to the GL value. Simply clamping/
4662 * saturating the value to [0,1] does the job.
4665 emit_face_var(struct st_translate
*t
)
4667 struct ureg_program
*ureg
= t
->ureg
;
4668 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4669 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4671 /* MOV_SAT face_temp, input[face] */
4672 face_temp
= ureg_saturate(face_temp
);
4673 ureg_MOV(ureg
, face_temp
, face_input
);
4675 /* Use face_temp as face input from here on: */
4676 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4680 emit_edgeflags(struct st_translate
*t
)
4682 struct ureg_program
*ureg
= t
->ureg
;
4683 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4684 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4686 ureg_MOV(ureg
, edge_dst
, edge_src
);
4690 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4691 * \param program the program to translate
4692 * \param numInputs number of input registers used
4693 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4695 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4696 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4698 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4699 * \param numOutputs number of output registers used
4700 * \param outputMapping maps Mesa fragment program outputs to TGSI
4702 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4703 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4706 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4708 extern "C" enum pipe_error
4709 st_translate_program(
4710 struct gl_context
*ctx
,
4712 struct ureg_program
*ureg
,
4713 glsl_to_tgsi_visitor
*program
,
4714 const struct gl_program
*proginfo
,
4716 const GLuint inputMapping
[],
4717 const ubyte inputSemanticName
[],
4718 const ubyte inputSemanticIndex
[],
4719 const GLuint interpMode
[],
4720 const GLboolean is_centroid
[],
4722 const GLuint outputMapping
[],
4723 const ubyte outputSemanticName
[],
4724 const ubyte outputSemanticIndex
[],
4725 boolean passthrough_edgeflags
,
4726 boolean clamp_color
)
4728 struct st_translate
*t
;
4730 enum pipe_error ret
= PIPE_OK
;
4732 assert(numInputs
<= Elements(t
->inputs
));
4733 assert(numOutputs
<= Elements(t
->outputs
));
4735 t
= CALLOC_STRUCT(st_translate
);
4737 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4741 memset(t
, 0, sizeof *t
);
4743 t
->procType
= procType
;
4744 t
->inputMapping
= inputMapping
;
4745 t
->outputMapping
= outputMapping
;
4748 if (program
->shader_program
) {
4749 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4750 struct gl_uniform_storage
*const storage
=
4751 &program
->shader_program
->UniformStorage
[i
];
4753 _mesa_uniform_detach_all_driver_storage(storage
);
4758 * Declare input attributes.
4760 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4761 for (i
= 0; i
< numInputs
; i
++) {
4762 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4763 inputSemanticName
[i
],
4764 inputSemanticIndex
[i
],
4769 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4770 /* Must do this after setting up t->inputs, and before
4771 * emitting constant references, below:
4773 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4776 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4780 * Declare output attributes.
4782 for (i
= 0; i
< numOutputs
; i
++) {
4783 switch (outputSemanticName
[i
]) {
4784 case TGSI_SEMANTIC_POSITION
:
4785 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4786 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4787 outputSemanticIndex
[i
]);
4788 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4790 case TGSI_SEMANTIC_STENCIL
:
4791 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4792 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4793 outputSemanticIndex
[i
]);
4794 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4796 case TGSI_SEMANTIC_COLOR
:
4797 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4798 TGSI_SEMANTIC_COLOR
,
4799 outputSemanticIndex
[i
]);
4802 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4803 ret
= PIPE_ERROR_BAD_INPUT
;
4808 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4809 for (i
= 0; i
< numInputs
; i
++) {
4810 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4812 inputSemanticName
[i
],
4813 inputSemanticIndex
[i
]);
4816 for (i
= 0; i
< numOutputs
; i
++) {
4817 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4818 outputSemanticName
[i
],
4819 outputSemanticIndex
[i
]);
4823 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4825 for (i
= 0; i
< numInputs
; i
++) {
4826 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4829 for (i
= 0; i
< numOutputs
; i
++) {
4830 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4831 outputSemanticName
[i
],
4832 outputSemanticIndex
[i
]);
4834 if (passthrough_edgeflags
)
4838 /* Declare address register.
4840 if (program
->num_address_regs
> 0) {
4841 assert(program
->num_address_regs
== 1);
4842 t
->address
[0] = ureg_DECL_address(ureg
);
4845 /* Declare misc input registers
4848 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4849 unsigned numSys
= 0;
4850 for (i
= 0; sysInputs
; i
++) {
4851 if (sysInputs
& (1 << i
)) {
4852 unsigned semName
= mesa_sysval_to_semantic
[i
];
4853 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4854 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4855 semName
== TGSI_SEMANTIC_VERTEXID
) {
4856 /* From Gallium perspective, these system values are always
4857 * integer, and require native integer support. However, if
4858 * native integer is supported on the vertex stage but not the
4859 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4860 * assumes these system values are floats. To resolve the
4861 * inconsistency, we insert a U2F.
4863 struct st_context
*st
= st_context(ctx
);
4864 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4865 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4866 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4867 if (!ctx
->Const
.NativeIntegers
) {
4868 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4869 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4870 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4874 sysInputs
&= ~(1 << i
);
4879 /* Copy over array sizes
4881 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4883 /* Emit constants and uniforms. TGSI uses a single index space for these,
4884 * so we put all the translated regs in t->constants.
4886 if (proginfo
->Parameters
) {
4887 t
->constants
= (struct ureg_src
*)
4888 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4889 if (t
->constants
== NULL
) {
4890 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4894 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4895 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4896 case PROGRAM_ENV_PARAM
:
4897 case PROGRAM_LOCAL_PARAM
:
4898 case PROGRAM_STATE_VAR
:
4899 case PROGRAM_UNIFORM
:
4900 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4903 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4904 * addressing of the const buffer.
4905 * FIXME: Be smarter and recognize param arrays:
4906 * indirect addressing is only valid within the referenced
4909 case PROGRAM_CONSTANT
:
4910 if (program
->indirect_addr_consts
)
4911 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4913 t
->constants
[i
] = emit_immediate(t
,
4914 proginfo
->Parameters
->ParameterValues
[i
],
4915 proginfo
->Parameters
->Parameters
[i
].DataType
,
4924 if (program
->shader_program
) {
4925 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4927 for (i
= 0; i
< num_ubos
; i
++) {
4928 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4932 /* Emit immediate values.
4934 t
->immediates
= (struct ureg_src
*)
4935 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4936 if (t
->immediates
== NULL
) {
4937 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4941 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4942 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4943 assert(i
< program
->num_immediates
);
4944 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4946 assert(i
== program
->num_immediates
);
4948 /* texture samplers */
4949 for (i
= 0; i
< ctx
->Const
.FragmentProgram
.MaxTextureImageUnits
; i
++) {
4950 if (program
->samplers_used
& (1 << i
)) {
4951 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4955 /* Emit each instruction in turn:
4957 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4958 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4959 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4963 /* Fix up all emitted labels:
4965 for (i
= 0; i
< t
->labels_count
; i
++) {
4966 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4967 t
->insn
[t
->labels
[i
].branch_target
]);
4970 if (program
->shader_program
) {
4971 /* This has to be done last. Any operation the can cause
4972 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4973 * program constant) has to happen before creating this linkage.
4975 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4976 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4979 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4980 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4989 free(t
->immediates
);
4992 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5000 /* ----------------------------- End TGSI code ------------------------------ */
5003 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5004 * generating Mesa IR.
5006 static struct gl_program
*
5007 get_mesa_program(struct gl_context
*ctx
,
5008 struct gl_shader_program
*shader_program
,
5009 struct gl_shader
*shader
)
5011 glsl_to_tgsi_visitor
* v
;
5012 struct gl_program
*prog
;
5015 struct gl_shader_compiler_options
*options
=
5016 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
5017 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5020 switch (shader
->Type
) {
5021 case GL_VERTEX_SHADER
:
5022 target
= GL_VERTEX_PROGRAM_ARB
;
5023 ptarget
= PIPE_SHADER_VERTEX
;
5025 case GL_FRAGMENT_SHADER
:
5026 target
= GL_FRAGMENT_PROGRAM_ARB
;
5027 ptarget
= PIPE_SHADER_FRAGMENT
;
5029 case GL_GEOMETRY_SHADER
:
5030 target
= GL_GEOMETRY_PROGRAM_NV
;
5031 ptarget
= PIPE_SHADER_GEOMETRY
;
5034 assert(!"should not be reached");
5038 validate_ir_tree(shader
->ir
);
5040 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5043 prog
->Parameters
= _mesa_new_parameter_list();
5044 v
= new glsl_to_tgsi_visitor();
5047 v
->shader_program
= shader_program
;
5048 v
->options
= options
;
5049 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5050 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5052 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5053 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5055 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5058 /* Remove reads from output registers. */
5059 lower_output_reads(shader
->ir
);
5061 /* Emit intermediate IR for main(). */
5062 visit_exec_list(shader
->ir
, v
);
5064 /* Now emit bodies for any functions that were used. */
5066 progress
= GL_FALSE
;
5068 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5069 function_entry
*entry
= (function_entry
*)iter
.get();
5071 if (!entry
->bgn_inst
) {
5072 v
->current_function
= entry
;
5074 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5075 entry
->bgn_inst
->function
= entry
;
5077 visit_exec_list(&entry
->sig
->body
, v
);
5079 glsl_to_tgsi_instruction
*last
;
5080 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5081 if (last
->op
!= TGSI_OPCODE_RET
)
5082 v
->emit(NULL
, TGSI_OPCODE_RET
);
5084 glsl_to_tgsi_instruction
*end
;
5085 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5086 end
->function
= entry
;
5094 /* Print out some information (for debugging purposes) used by the
5095 * optimization passes. */
5096 for (i
=0; i
< v
->next_temp
; i
++) {
5097 int fr
= v
->get_first_temp_read(i
);
5098 int fw
= v
->get_first_temp_write(i
);
5099 int lr
= v
->get_last_temp_read(i
);
5100 int lw
= v
->get_last_temp_write(i
);
5102 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5107 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5109 v
->copy_propagate();
5110 while (v
->eliminate_dead_code_advanced());
5112 v
->eliminate_dead_code();
5113 v
->merge_registers();
5114 v
->renumber_registers();
5116 /* Write the END instruction. */
5117 v
->emit(NULL
, TGSI_OPCODE_END
);
5119 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5121 printf("GLSL IR for linked %s program %d:\n",
5122 _mesa_glsl_shader_target_name(shader
->Type
),
5123 shader_program
->Name
);
5124 _mesa_print_ir(shader
->ir
, NULL
);
5130 prog
->Instructions
= NULL
;
5131 prog
->NumInstructions
= 0;
5133 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
);
5134 count_resources(v
, prog
);
5136 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5138 /* This has to be done last. Any operation the can cause
5139 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5140 * program constant) has to happen before creating this linkage.
5142 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5143 if (!shader_program
->LinkStatus
) {
5147 struct st_vertex_program
*stvp
;
5148 struct st_fragment_program
*stfp
;
5149 struct st_geometry_program
*stgp
;
5151 switch (shader
->Type
) {
5152 case GL_VERTEX_SHADER
:
5153 stvp
= (struct st_vertex_program
*)prog
;
5154 stvp
->glsl_to_tgsi
= v
;
5156 case GL_FRAGMENT_SHADER
:
5157 stfp
= (struct st_fragment_program
*)prog
;
5158 stfp
->glsl_to_tgsi
= v
;
5160 case GL_GEOMETRY_SHADER
:
5161 stgp
= (struct st_geometry_program
*)prog
;
5162 stgp
->glsl_to_tgsi
= v
;
5165 assert(!"should not be reached");
5175 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5177 struct gl_shader
*shader
;
5178 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5179 type
== GL_GEOMETRY_SHADER_ARB
);
5180 shader
= rzalloc(NULL
, struct gl_shader
);
5182 shader
->Type
= type
;
5183 shader
->Name
= name
;
5184 _mesa_init_shader(ctx
, shader
);
5189 struct gl_shader_program
*
5190 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5192 struct gl_shader_program
*shProg
;
5193 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5195 shProg
->Name
= name
;
5196 _mesa_init_shader_program(ctx
, shProg
);
5203 * Called via ctx->Driver.LinkShader()
5204 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5205 * with code lowering and other optimizations.
5208 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5210 assert(prog
->LinkStatus
);
5212 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5213 if (prog
->_LinkedShaders
[i
] == NULL
)
5217 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5218 const struct gl_shader_compiler_options
*options
=
5219 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5221 /* If there are forms of indirect addressing that the driver
5222 * cannot handle, perform the lowering pass.
5224 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5225 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5226 lower_variable_index_to_cond_assign(ir
,
5227 options
->EmitNoIndirectInput
,
5228 options
->EmitNoIndirectOutput
,
5229 options
->EmitNoIndirectTemp
,
5230 options
->EmitNoIndirectUniform
);
5233 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5234 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5235 LOWER_UNPACK_SNORM_2x16
|
5236 LOWER_PACK_UNORM_2x16
|
5237 LOWER_UNPACK_UNORM_2x16
|
5238 LOWER_PACK_SNORM_4x8
|
5239 LOWER_UNPACK_SNORM_4x8
|
5240 LOWER_UNPACK_UNORM_4x8
|
5241 LOWER_PACK_UNORM_4x8
|
5242 LOWER_PACK_HALF_2x16
|
5243 LOWER_UNPACK_HALF_2x16
;
5245 lower_packing_builtins(ir
, lower_inst
);
5248 do_mat_op_to_vec(ir
);
5249 lower_instructions(ir
,
5254 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5255 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5257 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5258 do_vec_index_to_cond_assign(ir
);
5259 lower_vector_insert(ir
, true);
5260 lower_quadop_vector(ir
, false);
5262 if (options
->MaxIfDepth
== 0) {
5269 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5271 progress
= do_common_optimization(ir
, true, true,
5272 options
->MaxUnrollIterations
, options
)
5275 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5279 validate_ir_tree(ir
);
5282 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5283 struct gl_program
*linked_prog
;
5285 if (prog
->_LinkedShaders
[i
] == NULL
)
5288 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5291 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5293 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5294 _mesa_program_index_to_target(i
),
5296 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5298 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5303 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5310 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5311 const GLuint outputMapping
[],
5312 struct pipe_stream_output_info
*so
)
5315 struct gl_transform_feedback_info
*info
=
5316 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5318 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5319 so
->output
[i
].register_index
=
5320 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5321 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5322 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5323 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5324 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5327 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5328 so
->stride
[i
] = info
->BufferStride
[i
];
5330 so
->num_outputs
= info
->NumOutputs
;