glsl_to_tgsi: remove bad assertion
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_NAMED_PARAM) | \
78 (1 << PROGRAM_CONSTANT) | \
79 (1 << PROGRAM_UNIFORM))
80
81 /**
82 * Maximum number of temporary registers.
83 *
84 * It is too big for stack allocated arrays -- it will cause stack overflow on
85 * Windows and likely Mac OS X.
86 */
87 #define MAX_TEMPS 4096
88
89 /* will be 4 for GLSL 4.00 */
90 #define MAX_GLSL_TEXTURE_OFFSET 1
91
92 class st_src_reg;
93 class st_dst_reg;
94
95 static int swizzle_for_size(int size);
96
97 /**
98 * This struct is a corresponding struct to TGSI ureg_src.
99 */
100 class st_src_reg {
101 public:
102 st_src_reg(gl_register_file file, int index, const glsl_type *type)
103 {
104 this->file = file;
105 this->index = index;
106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
107 this->swizzle = swizzle_for_size(type->vector_elements);
108 else
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
112 this->reladdr = NULL;
113 }
114
115 st_src_reg(gl_register_file file, int index, int type)
116 {
117 this->type = type;
118 this->file = file;
119 this->index = index;
120 this->swizzle = SWIZZLE_XYZW;
121 this->negate = 0;
122 this->reladdr = NULL;
123 }
124
125 st_src_reg()
126 {
127 this->type = GLSL_TYPE_ERROR;
128 this->file = PROGRAM_UNDEFINED;
129 this->index = 0;
130 this->swizzle = 0;
131 this->negate = 0;
132 this->reladdr = NULL;
133 }
134
135 explicit st_src_reg(st_dst_reg reg);
136
137 gl_register_file file; /**< PROGRAM_* from Mesa */
138 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
139 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
140 int negate; /**< NEGATE_XYZW mask from mesa */
141 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
142 /** Register index should be offset by the integer in this reg. */
143 st_src_reg *reladdr;
144 };
145
146 class st_dst_reg {
147 public:
148 st_dst_reg(gl_register_file file, int writemask, int type)
149 {
150 this->file = file;
151 this->index = 0;
152 this->writemask = writemask;
153 this->cond_mask = COND_TR;
154 this->reladdr = NULL;
155 this->type = type;
156 }
157
158 st_dst_reg()
159 {
160 this->type = GLSL_TYPE_ERROR;
161 this->file = PROGRAM_UNDEFINED;
162 this->index = 0;
163 this->writemask = 0;
164 this->cond_mask = COND_TR;
165 this->reladdr = NULL;
166 }
167
168 explicit st_dst_reg(st_src_reg reg);
169
170 gl_register_file file; /**< PROGRAM_* from Mesa */
171 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
173 GLuint cond_mask:4;
174 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
175 /** Register index should be offset by the integer in this reg. */
176 st_src_reg *reladdr;
177 };
178
179 st_src_reg::st_src_reg(st_dst_reg reg)
180 {
181 this->type = reg.type;
182 this->file = reg.file;
183 this->index = reg.index;
184 this->swizzle = SWIZZLE_XYZW;
185 this->negate = 0;
186 this->reladdr = reg.reladdr;
187 }
188
189 st_dst_reg::st_dst_reg(st_src_reg reg)
190 {
191 this->type = reg.type;
192 this->file = reg.file;
193 this->index = reg.index;
194 this->writemask = WRITEMASK_XYZW;
195 this->cond_mask = COND_TR;
196 this->reladdr = reg.reladdr;
197 }
198
199 class glsl_to_tgsi_instruction : public exec_node {
200 public:
201 /* Callers of this ralloc-based new need not call delete. It's
202 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
203 static void* operator new(size_t size, void *ctx)
204 {
205 void *node;
206
207 node = rzalloc_size(ctx, size);
208 assert(node != NULL);
209
210 return node;
211 }
212
213 unsigned op;
214 st_dst_reg dst;
215 st_src_reg src[3];
216 /** Pointer to the ir source this tree came from for debugging */
217 ir_instruction *ir;
218 GLboolean cond_update;
219 bool saturate;
220 int sampler; /**< sampler index */
221 int tex_target; /**< One of TEXTURE_*_INDEX */
222 GLboolean tex_shadow;
223 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
224 unsigned tex_offset_num_offset;
225 int dead_mask; /**< Used in dead code elimination */
226
227 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
228 };
229
230 class variable_storage : public exec_node {
231 public:
232 variable_storage(ir_variable *var, gl_register_file file, int index)
233 : file(file), index(index), var(var)
234 {
235 /* empty */
236 }
237
238 gl_register_file file;
239 int index;
240 ir_variable *var; /* variable that maps to this, if any */
241 };
242
243 class immediate_storage : public exec_node {
244 public:
245 immediate_storage(gl_constant_value *values, int size, int type)
246 {
247 memcpy(this->values, values, size * sizeof(gl_constant_value));
248 this->size = size;
249 this->type = type;
250 }
251
252 gl_constant_value values[4];
253 int size; /**< Number of components (1-4) */
254 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
255 };
256
257 class function_entry : public exec_node {
258 public:
259 ir_function_signature *sig;
260
261 /**
262 * identifier of this function signature used by the program.
263 *
264 * At the point that TGSI instructions for function calls are
265 * generated, we don't know the address of the first instruction of
266 * the function body. So we make the BranchTarget that is called a
267 * small integer and rewrite them during set_branchtargets().
268 */
269 int sig_id;
270
271 /**
272 * Pointer to first instruction of the function body.
273 *
274 * Set during function body emits after main() is processed.
275 */
276 glsl_to_tgsi_instruction *bgn_inst;
277
278 /**
279 * Index of the first instruction of the function body in actual TGSI.
280 *
281 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
282 */
283 int inst;
284
285 /** Storage for the return value. */
286 st_src_reg return_reg;
287 };
288
289 class glsl_to_tgsi_visitor : public ir_visitor {
290 public:
291 glsl_to_tgsi_visitor();
292 ~glsl_to_tgsi_visitor();
293
294 function_entry *current_function;
295
296 struct gl_context *ctx;
297 struct gl_program *prog;
298 struct gl_shader_program *shader_program;
299 struct gl_shader_compiler_options *options;
300
301 int next_temp;
302
303 int num_address_regs;
304 int samplers_used;
305 bool indirect_addr_temps;
306 bool indirect_addr_consts;
307 int num_clip_distances;
308
309 int glsl_version;
310 bool native_integers;
311
312 variable_storage *find_variable_storage(ir_variable *var);
313
314 int add_constant(gl_register_file file, gl_constant_value values[4],
315 int size, int datatype, GLuint *swizzle_out);
316
317 function_entry *get_function_signature(ir_function_signature *sig);
318
319 st_src_reg get_temp(const glsl_type *type);
320 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
321
322 st_src_reg st_src_reg_for_float(float val);
323 st_src_reg st_src_reg_for_int(int val);
324 st_src_reg st_src_reg_for_type(int type, int val);
325
326 /**
327 * \name Visit methods
328 *
329 * As typical for the visitor pattern, there must be one \c visit method for
330 * each concrete subclass of \c ir_instruction. Virtual base classes within
331 * the hierarchy should not have \c visit methods.
332 */
333 /*@{*/
334 virtual void visit(ir_variable *);
335 virtual void visit(ir_loop *);
336 virtual void visit(ir_loop_jump *);
337 virtual void visit(ir_function_signature *);
338 virtual void visit(ir_function *);
339 virtual void visit(ir_expression *);
340 virtual void visit(ir_swizzle *);
341 virtual void visit(ir_dereference_variable *);
342 virtual void visit(ir_dereference_array *);
343 virtual void visit(ir_dereference_record *);
344 virtual void visit(ir_assignment *);
345 virtual void visit(ir_constant *);
346 virtual void visit(ir_call *);
347 virtual void visit(ir_return *);
348 virtual void visit(ir_discard *);
349 virtual void visit(ir_texture *);
350 virtual void visit(ir_if *);
351 /*@}*/
352
353 st_src_reg result;
354
355 /** List of variable_storage */
356 exec_list variables;
357
358 /** List of immediate_storage */
359 exec_list immediates;
360 int num_immediates;
361
362 /** List of function_entry */
363 exec_list function_signatures;
364 int next_signature_id;
365
366 /** List of glsl_to_tgsi_instruction */
367 exec_list instructions;
368
369 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
370
371 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
372 st_dst_reg dst, st_src_reg src0);
373
374 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
375 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
376
377 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
378 st_dst_reg dst,
379 st_src_reg src0, st_src_reg src1, st_src_reg src2);
380
381 unsigned get_opcode(ir_instruction *ir, unsigned op,
382 st_dst_reg dst,
383 st_src_reg src0, st_src_reg src1);
384
385 /**
386 * Emit the correct dot-product instruction for the type of arguments
387 */
388 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
389 st_dst_reg dst,
390 st_src_reg src0,
391 st_src_reg src1,
392 unsigned elements);
393
394 void emit_scalar(ir_instruction *ir, unsigned op,
395 st_dst_reg dst, st_src_reg src0);
396
397 void emit_scalar(ir_instruction *ir, unsigned op,
398 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
399
400 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
401
402 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
403
404 void emit_scs(ir_instruction *ir, unsigned op,
405 st_dst_reg dst, const st_src_reg &src);
406
407 bool try_emit_mad(ir_expression *ir,
408 int mul_operand);
409 bool try_emit_mad_for_and_not(ir_expression *ir,
410 int mul_operand);
411 bool try_emit_sat(ir_expression *ir);
412
413 void emit_swz(ir_expression *ir);
414
415 bool process_move_condition(ir_rvalue *ir);
416
417 void simplify_cmp(void);
418
419 void rename_temp_register(int index, int new_index);
420 int get_first_temp_read(int index);
421 int get_first_temp_write(int index);
422 int get_last_temp_read(int index);
423 int get_last_temp_write(int index);
424
425 void copy_propagate(void);
426 void eliminate_dead_code(void);
427 int eliminate_dead_code_advanced(void);
428 void merge_registers(void);
429 void renumber_registers(void);
430
431 void *mem_ctx;
432 };
433
434 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
435
436 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
437
438 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
439
440 static void
441 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
442
443 static void
444 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
445 {
446 va_list args;
447 va_start(args, fmt);
448 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
449 va_end(args);
450
451 prog->LinkStatus = GL_FALSE;
452 }
453
454 static int
455 swizzle_for_size(int size)
456 {
457 int size_swizzles[4] = {
458 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
459 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
460 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
461 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
462 };
463
464 assert((size >= 1) && (size <= 4));
465 return size_swizzles[size - 1];
466 }
467
468 static bool
469 is_tex_instruction(unsigned opcode)
470 {
471 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
472 return info->is_tex;
473 }
474
475 static unsigned
476 num_inst_dst_regs(unsigned opcode)
477 {
478 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
479 return info->num_dst;
480 }
481
482 static unsigned
483 num_inst_src_regs(unsigned opcode)
484 {
485 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
486 return info->is_tex ? info->num_src - 1 : info->num_src;
487 }
488
489 glsl_to_tgsi_instruction *
490 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
491 st_dst_reg dst,
492 st_src_reg src0, st_src_reg src1, st_src_reg src2)
493 {
494 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
495 int num_reladdr = 0, i;
496
497 op = get_opcode(ir, op, dst, src0, src1);
498
499 /* If we have to do relative addressing, we want to load the ARL
500 * reg directly for one of the regs, and preload the other reladdr
501 * sources into temps.
502 */
503 num_reladdr += dst.reladdr != NULL;
504 num_reladdr += src0.reladdr != NULL;
505 num_reladdr += src1.reladdr != NULL;
506 num_reladdr += src2.reladdr != NULL;
507
508 reladdr_to_temp(ir, &src2, &num_reladdr);
509 reladdr_to_temp(ir, &src1, &num_reladdr);
510 reladdr_to_temp(ir, &src0, &num_reladdr);
511
512 if (dst.reladdr) {
513 emit_arl(ir, address_reg, *dst.reladdr);
514 num_reladdr--;
515 }
516 assert(num_reladdr == 0);
517
518 inst->op = op;
519 inst->dst = dst;
520 inst->src[0] = src0;
521 inst->src[1] = src1;
522 inst->src[2] = src2;
523 inst->ir = ir;
524 inst->dead_mask = 0;
525
526 inst->function = NULL;
527
528 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
529 this->num_address_regs = 1;
530
531 /* Update indirect addressing status used by TGSI */
532 if (dst.reladdr) {
533 switch(dst.file) {
534 case PROGRAM_TEMPORARY:
535 this->indirect_addr_temps = true;
536 break;
537 case PROGRAM_LOCAL_PARAM:
538 case PROGRAM_ENV_PARAM:
539 case PROGRAM_STATE_VAR:
540 case PROGRAM_NAMED_PARAM:
541 case PROGRAM_CONSTANT:
542 case PROGRAM_UNIFORM:
543 this->indirect_addr_consts = true;
544 break;
545 case PROGRAM_IMMEDIATE:
546 assert(!"immediates should not have indirect addressing");
547 break;
548 default:
549 break;
550 }
551 }
552 else {
553 for (i=0; i<3; i++) {
554 if(inst->src[i].reladdr) {
555 switch(inst->src[i].file) {
556 case PROGRAM_TEMPORARY:
557 this->indirect_addr_temps = true;
558 break;
559 case PROGRAM_LOCAL_PARAM:
560 case PROGRAM_ENV_PARAM:
561 case PROGRAM_STATE_VAR:
562 case PROGRAM_NAMED_PARAM:
563 case PROGRAM_CONSTANT:
564 case PROGRAM_UNIFORM:
565 this->indirect_addr_consts = true;
566 break;
567 case PROGRAM_IMMEDIATE:
568 assert(!"immediates should not have indirect addressing");
569 break;
570 default:
571 break;
572 }
573 }
574 }
575 }
576
577 this->instructions.push_tail(inst);
578
579 if (native_integers)
580 try_emit_float_set(ir, op, dst);
581
582 return inst;
583 }
584
585
586 glsl_to_tgsi_instruction *
587 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
588 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
589 {
590 return emit(ir, op, dst, src0, src1, undef_src);
591 }
592
593 glsl_to_tgsi_instruction *
594 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
595 st_dst_reg dst, st_src_reg src0)
596 {
597 assert(dst.writemask != 0);
598 return emit(ir, op, dst, src0, undef_src, undef_src);
599 }
600
601 glsl_to_tgsi_instruction *
602 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
603 {
604 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
605 }
606
607 /**
608 * Emits the code to convert the result of float SET instructions to integers.
609 */
610 void
611 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
612 st_dst_reg dst)
613 {
614 if ((op == TGSI_OPCODE_SEQ ||
615 op == TGSI_OPCODE_SNE ||
616 op == TGSI_OPCODE_SGE ||
617 op == TGSI_OPCODE_SLT))
618 {
619 st_src_reg src = st_src_reg(dst);
620 src.negate = ~src.negate;
621 dst.type = GLSL_TYPE_FLOAT;
622 emit(ir, TGSI_OPCODE_F2I, dst, src);
623 }
624 }
625
626 /**
627 * Determines whether to use an integer, unsigned integer, or float opcode
628 * based on the operands and input opcode, then emits the result.
629 */
630 unsigned
631 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
632 st_dst_reg dst,
633 st_src_reg src0, st_src_reg src1)
634 {
635 int type = GLSL_TYPE_FLOAT;
636
637 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
638 type = GLSL_TYPE_FLOAT;
639 else if (native_integers)
640 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
641
642 #define case4(c, f, i, u) \
643 case TGSI_OPCODE_##c: \
644 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
645 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
646 else op = TGSI_OPCODE_##f; \
647 break;
648 #define case3(f, i, u) case4(f, f, i, u)
649 #define case2fi(f, i) case4(f, f, i, i)
650 #define case2iu(i, u) case4(i, LAST, i, u)
651
652 switch(op) {
653 case2fi(ADD, UADD);
654 case2fi(MUL, UMUL);
655 case2fi(MAD, UMAD);
656 case3(DIV, IDIV, UDIV);
657 case3(MAX, IMAX, UMAX);
658 case3(MIN, IMIN, UMIN);
659 case2iu(MOD, UMOD);
660
661 case2fi(SEQ, USEQ);
662 case2fi(SNE, USNE);
663 case3(SGE, ISGE, USGE);
664 case3(SLT, ISLT, USLT);
665
666 case2iu(ISHR, USHR);
667
668 default: break;
669 }
670
671 assert(op != TGSI_OPCODE_LAST);
672 return op;
673 }
674
675 glsl_to_tgsi_instruction *
676 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
677 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
678 unsigned elements)
679 {
680 static const unsigned dot_opcodes[] = {
681 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
682 };
683
684 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
685 }
686
687 /**
688 * Emits TGSI scalar opcodes to produce unique answers across channels.
689 *
690 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
691 * channel determines the result across all channels. So to do a vec4
692 * of this operation, we want to emit a scalar per source channel used
693 * to produce dest channels.
694 */
695 void
696 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
697 st_dst_reg dst,
698 st_src_reg orig_src0, st_src_reg orig_src1)
699 {
700 int i, j;
701 int done_mask = ~dst.writemask;
702
703 /* TGSI RCP is a scalar operation splatting results to all channels,
704 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
705 * dst channels.
706 */
707 for (i = 0; i < 4; i++) {
708 GLuint this_mask = (1 << i);
709 glsl_to_tgsi_instruction *inst;
710 st_src_reg src0 = orig_src0;
711 st_src_reg src1 = orig_src1;
712
713 if (done_mask & this_mask)
714 continue;
715
716 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
717 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
718 for (j = i + 1; j < 4; j++) {
719 /* If there is another enabled component in the destination that is
720 * derived from the same inputs, generate its value on this pass as
721 * well.
722 */
723 if (!(done_mask & (1 << j)) &&
724 GET_SWZ(src0.swizzle, j) == src0_swiz &&
725 GET_SWZ(src1.swizzle, j) == src1_swiz) {
726 this_mask |= (1 << j);
727 }
728 }
729 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
730 src0_swiz, src0_swiz);
731 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
732 src1_swiz, src1_swiz);
733
734 inst = emit(ir, op, dst, src0, src1);
735 inst->dst.writemask = this_mask;
736 done_mask |= this_mask;
737 }
738 }
739
740 void
741 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
742 st_dst_reg dst, st_src_reg src0)
743 {
744 st_src_reg undef = undef_src;
745
746 undef.swizzle = SWIZZLE_XXXX;
747
748 emit_scalar(ir, op, dst, src0, undef);
749 }
750
751 void
752 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
753 st_dst_reg dst, st_src_reg src0)
754 {
755 int op = TGSI_OPCODE_ARL;
756
757 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
758 op = TGSI_OPCODE_UARL;
759
760 emit(NULL, op, dst, src0);
761 }
762
763 /**
764 * Emit an TGSI_OPCODE_SCS instruction
765 *
766 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
767 * Instead of splatting its result across all four components of the
768 * destination, it writes one value to the \c x component and another value to
769 * the \c y component.
770 *
771 * \param ir IR instruction being processed
772 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
773 * on which value is desired.
774 * \param dst Destination register
775 * \param src Source register
776 */
777 void
778 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
779 st_dst_reg dst,
780 const st_src_reg &src)
781 {
782 /* Vertex programs cannot use the SCS opcode.
783 */
784 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
785 emit_scalar(ir, op, dst, src);
786 return;
787 }
788
789 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
790 const unsigned scs_mask = (1U << component);
791 int done_mask = ~dst.writemask;
792 st_src_reg tmp;
793
794 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
795
796 /* If there are compnents in the destination that differ from the component
797 * that will be written by the SCS instrution, we'll need a temporary.
798 */
799 if (scs_mask != unsigned(dst.writemask)) {
800 tmp = get_temp(glsl_type::vec4_type);
801 }
802
803 for (unsigned i = 0; i < 4; i++) {
804 unsigned this_mask = (1U << i);
805 st_src_reg src0 = src;
806
807 if ((done_mask & this_mask) != 0)
808 continue;
809
810 /* The source swizzle specified which component of the source generates
811 * sine / cosine for the current component in the destination. The SCS
812 * instruction requires that this value be swizzle to the X component.
813 * Replace the current swizzle with a swizzle that puts the source in
814 * the X component.
815 */
816 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
817
818 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
819 src0_swiz, src0_swiz);
820 for (unsigned j = i + 1; j < 4; j++) {
821 /* If there is another enabled component in the destination that is
822 * derived from the same inputs, generate its value on this pass as
823 * well.
824 */
825 if (!(done_mask & (1 << j)) &&
826 GET_SWZ(src0.swizzle, j) == src0_swiz) {
827 this_mask |= (1 << j);
828 }
829 }
830
831 if (this_mask != scs_mask) {
832 glsl_to_tgsi_instruction *inst;
833 st_dst_reg tmp_dst = st_dst_reg(tmp);
834
835 /* Emit the SCS instruction.
836 */
837 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
838 inst->dst.writemask = scs_mask;
839
840 /* Move the result of the SCS instruction to the desired location in
841 * the destination.
842 */
843 tmp.swizzle = MAKE_SWIZZLE4(component, component,
844 component, component);
845 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
846 inst->dst.writemask = this_mask;
847 } else {
848 /* Emit the SCS instruction to write directly to the destination.
849 */
850 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
851 inst->dst.writemask = scs_mask;
852 }
853
854 done_mask |= this_mask;
855 }
856 }
857
858 int
859 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
860 gl_constant_value values[4], int size, int datatype,
861 GLuint *swizzle_out)
862 {
863 if (file == PROGRAM_CONSTANT) {
864 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
865 size, datatype, swizzle_out);
866 } else {
867 int index = 0;
868 immediate_storage *entry;
869 assert(file == PROGRAM_IMMEDIATE);
870
871 /* Search immediate storage to see if we already have an identical
872 * immediate that we can use instead of adding a duplicate entry.
873 */
874 foreach_iter(exec_list_iterator, iter, this->immediates) {
875 entry = (immediate_storage *)iter.get();
876
877 if (entry->size == size &&
878 entry->type == datatype &&
879 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
880 return index;
881 }
882 index++;
883 }
884
885 /* Add this immediate to the list. */
886 entry = new(mem_ctx) immediate_storage(values, size, datatype);
887 this->immediates.push_tail(entry);
888 this->num_immediates++;
889 return index;
890 }
891 }
892
893 st_src_reg
894 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
895 {
896 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
897 union gl_constant_value uval;
898
899 uval.f = val;
900 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
901
902 return src;
903 }
904
905 st_src_reg
906 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
907 {
908 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
909 union gl_constant_value uval;
910
911 assert(native_integers);
912
913 uval.i = val;
914 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
915
916 return src;
917 }
918
919 st_src_reg
920 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
921 {
922 if (native_integers)
923 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
924 st_src_reg_for_int(val);
925 else
926 return st_src_reg_for_float(val);
927 }
928
929 static int
930 type_size(const struct glsl_type *type)
931 {
932 unsigned int i;
933 int size;
934
935 switch (type->base_type) {
936 case GLSL_TYPE_UINT:
937 case GLSL_TYPE_INT:
938 case GLSL_TYPE_FLOAT:
939 case GLSL_TYPE_BOOL:
940 if (type->is_matrix()) {
941 return type->matrix_columns;
942 } else {
943 /* Regardless of size of vector, it gets a vec4. This is bad
944 * packing for things like floats, but otherwise arrays become a
945 * mess. Hopefully a later pass over the code can pack scalars
946 * down if appropriate.
947 */
948 return 1;
949 }
950 case GLSL_TYPE_ARRAY:
951 assert(type->length > 0);
952 return type_size(type->fields.array) * type->length;
953 case GLSL_TYPE_STRUCT:
954 size = 0;
955 for (i = 0; i < type->length; i++) {
956 size += type_size(type->fields.structure[i].type);
957 }
958 return size;
959 case GLSL_TYPE_SAMPLER:
960 /* Samplers take up one slot in UNIFORMS[], but they're baked in
961 * at link time.
962 */
963 return 1;
964 default:
965 assert(0);
966 return 0;
967 }
968 }
969
970 /**
971 * In the initial pass of codegen, we assign temporary numbers to
972 * intermediate results. (not SSA -- variable assignments will reuse
973 * storage).
974 */
975 st_src_reg
976 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
977 {
978 st_src_reg src;
979
980 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
981 src.file = PROGRAM_TEMPORARY;
982 src.index = next_temp;
983 src.reladdr = NULL;
984 next_temp += type_size(type);
985
986 if (type->is_array() || type->is_record()) {
987 src.swizzle = SWIZZLE_NOOP;
988 } else {
989 src.swizzle = swizzle_for_size(type->vector_elements);
990 }
991 src.negate = 0;
992
993 return src;
994 }
995
996 variable_storage *
997 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
998 {
999
1000 variable_storage *entry;
1001
1002 foreach_iter(exec_list_iterator, iter, this->variables) {
1003 entry = (variable_storage *)iter.get();
1004
1005 if (entry->var == var)
1006 return entry;
1007 }
1008
1009 return NULL;
1010 }
1011
1012 void
1013 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1014 {
1015 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1016 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1017
1018 fp->OriginUpperLeft = ir->origin_upper_left;
1019 fp->PixelCenterInteger = ir->pixel_center_integer;
1020 }
1021
1022 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1023 unsigned int i;
1024 const ir_state_slot *const slots = ir->state_slots;
1025 assert(ir->state_slots != NULL);
1026
1027 /* Check if this statevar's setup in the STATE file exactly
1028 * matches how we'll want to reference it as a
1029 * struct/array/whatever. If not, then we need to move it into
1030 * temporary storage and hope that it'll get copy-propagated
1031 * out.
1032 */
1033 for (i = 0; i < ir->num_state_slots; i++) {
1034 if (slots[i].swizzle != SWIZZLE_XYZW) {
1035 break;
1036 }
1037 }
1038
1039 variable_storage *storage;
1040 st_dst_reg dst;
1041 if (i == ir->num_state_slots) {
1042 /* We'll set the index later. */
1043 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1044 this->variables.push_tail(storage);
1045
1046 dst = undef_dst;
1047 } else {
1048 /* The variable_storage constructor allocates slots based on the size
1049 * of the type. However, this had better match the number of state
1050 * elements that we're going to copy into the new temporary.
1051 */
1052 assert((int) ir->num_state_slots == type_size(ir->type));
1053
1054 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1055 this->next_temp);
1056 this->variables.push_tail(storage);
1057 this->next_temp += type_size(ir->type);
1058
1059 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1060 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1061 }
1062
1063
1064 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1065 int index = _mesa_add_state_reference(this->prog->Parameters,
1066 (gl_state_index *)slots[i].tokens);
1067
1068 if (storage->file == PROGRAM_STATE_VAR) {
1069 if (storage->index == -1) {
1070 storage->index = index;
1071 } else {
1072 assert(index == storage->index + (int)i);
1073 }
1074 } else {
1075 st_src_reg src(PROGRAM_STATE_VAR, index,
1076 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT);
1077 src.swizzle = slots[i].swizzle;
1078 emit(ir, TGSI_OPCODE_MOV, dst, src);
1079 /* even a float takes up a whole vec4 reg in a struct/array. */
1080 dst.index++;
1081 }
1082 }
1083
1084 if (storage->file == PROGRAM_TEMPORARY &&
1085 dst.index != storage->index + (int) ir->num_state_slots) {
1086 fail_link(this->shader_program,
1087 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1088 ir->name, dst.index - storage->index,
1089 type_size(ir->type));
1090 }
1091 }
1092 }
1093
1094 void
1095 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1096 {
1097 ir_dereference_variable *counter = NULL;
1098
1099 if (ir->counter != NULL)
1100 counter = new(ir) ir_dereference_variable(ir->counter);
1101
1102 if (ir->from != NULL) {
1103 assert(ir->counter != NULL);
1104
1105 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1106
1107 a->accept(this);
1108 delete a;
1109 }
1110
1111 emit(NULL, TGSI_OPCODE_BGNLOOP);
1112
1113 if (ir->to) {
1114 ir_expression *e =
1115 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1116 counter, ir->to);
1117 ir_if *if_stmt = new(ir) ir_if(e);
1118
1119 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1120
1121 if_stmt->then_instructions.push_tail(brk);
1122
1123 if_stmt->accept(this);
1124
1125 delete if_stmt;
1126 delete e;
1127 delete brk;
1128 }
1129
1130 visit_exec_list(&ir->body_instructions, this);
1131
1132 if (ir->increment) {
1133 ir_expression *e =
1134 new(ir) ir_expression(ir_binop_add, counter->type,
1135 counter, ir->increment);
1136
1137 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1138
1139 a->accept(this);
1140 delete a;
1141 delete e;
1142 }
1143
1144 emit(NULL, TGSI_OPCODE_ENDLOOP);
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1149 {
1150 switch (ir->mode) {
1151 case ir_loop_jump::jump_break:
1152 emit(NULL, TGSI_OPCODE_BRK);
1153 break;
1154 case ir_loop_jump::jump_continue:
1155 emit(NULL, TGSI_OPCODE_CONT);
1156 break;
1157 }
1158 }
1159
1160
1161 void
1162 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1163 {
1164 assert(0);
1165 (void)ir;
1166 }
1167
1168 void
1169 glsl_to_tgsi_visitor::visit(ir_function *ir)
1170 {
1171 /* Ignore function bodies other than main() -- we shouldn't see calls to
1172 * them since they should all be inlined before we get to glsl_to_tgsi.
1173 */
1174 if (strcmp(ir->name, "main") == 0) {
1175 const ir_function_signature *sig;
1176 exec_list empty;
1177
1178 sig = ir->matching_signature(&empty);
1179
1180 assert(sig);
1181
1182 foreach_iter(exec_list_iterator, iter, sig->body) {
1183 ir_instruction *ir = (ir_instruction *)iter.get();
1184
1185 ir->accept(this);
1186 }
1187 }
1188 }
1189
1190 bool
1191 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1192 {
1193 int nonmul_operand = 1 - mul_operand;
1194 st_src_reg a, b, c;
1195 st_dst_reg result_dst;
1196
1197 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1198 if (!expr || expr->operation != ir_binop_mul)
1199 return false;
1200
1201 expr->operands[0]->accept(this);
1202 a = this->result;
1203 expr->operands[1]->accept(this);
1204 b = this->result;
1205 ir->operands[nonmul_operand]->accept(this);
1206 c = this->result;
1207
1208 this->result = get_temp(ir->type);
1209 result_dst = st_dst_reg(this->result);
1210 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1211 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1212
1213 return true;
1214 }
1215
1216 /**
1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1218 *
1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1220 * implemented using multiplication, and logical-or is implemented using
1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1222 * As result, the logical expression (a & !b) can be rewritten as:
1223 *
1224 * - a * !b
1225 * - a * (1 - b)
1226 * - (a * 1) - (a * b)
1227 * - a + -(a * b)
1228 * - a + (a * -b)
1229 *
1230 * This final expression can be implemented as a single MAD(a, -b, a)
1231 * instruction.
1232 */
1233 bool
1234 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1235 {
1236 const int other_operand = 1 - try_operand;
1237 st_src_reg a, b;
1238
1239 ir_expression *expr = ir->operands[try_operand]->as_expression();
1240 if (!expr || expr->operation != ir_unop_logic_not)
1241 return false;
1242
1243 ir->operands[other_operand]->accept(this);
1244 a = this->result;
1245 expr->operands[0]->accept(this);
1246 b = this->result;
1247
1248 b.negate = ~b.negate;
1249
1250 this->result = get_temp(ir->type);
1251 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1252
1253 return true;
1254 }
1255
1256 bool
1257 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1258 {
1259 /* Saturates were only introduced to vertex programs in
1260 * NV_vertex_program3, so don't give them to drivers in the VP.
1261 */
1262 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1263 return false;
1264
1265 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1266 if (!sat_src)
1267 return false;
1268
1269 sat_src->accept(this);
1270 st_src_reg src = this->result;
1271
1272 /* If we generated an expression instruction into a temporary in
1273 * processing the saturate's operand, apply the saturate to that
1274 * instruction. Otherwise, generate a MOV to do the saturate.
1275 *
1276 * Note that we have to be careful to only do this optimization if
1277 * the instruction in question was what generated src->result. For
1278 * example, ir_dereference_array might generate a MUL instruction
1279 * to create the reladdr, and return us a src reg using that
1280 * reladdr. That MUL result is not the value we're trying to
1281 * saturate.
1282 */
1283 ir_expression *sat_src_expr = sat_src->as_expression();
1284 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1285 sat_src_expr->operation == ir_binop_add ||
1286 sat_src_expr->operation == ir_binop_dot)) {
1287 glsl_to_tgsi_instruction *new_inst;
1288 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1289 new_inst->saturate = true;
1290 } else {
1291 this->result = get_temp(ir->type);
1292 st_dst_reg result_dst = st_dst_reg(this->result);
1293 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1294 glsl_to_tgsi_instruction *inst;
1295 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1296 inst->saturate = true;
1297 }
1298
1299 return true;
1300 }
1301
1302 void
1303 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1304 st_src_reg *reg, int *num_reladdr)
1305 {
1306 if (!reg->reladdr)
1307 return;
1308
1309 emit_arl(ir, address_reg, *reg->reladdr);
1310
1311 if (*num_reladdr != 1) {
1312 st_src_reg temp = get_temp(glsl_type::vec4_type);
1313
1314 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1315 *reg = temp;
1316 }
1317
1318 (*num_reladdr)--;
1319 }
1320
1321 void
1322 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1323 {
1324 unsigned int operand;
1325 st_src_reg op[Elements(ir->operands)];
1326 st_src_reg result_src;
1327 st_dst_reg result_dst;
1328
1329 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1330 */
1331 if (ir->operation == ir_binop_add) {
1332 if (try_emit_mad(ir, 1))
1333 return;
1334 if (try_emit_mad(ir, 0))
1335 return;
1336 }
1337
1338 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1339 */
1340 if (ir->operation == ir_binop_logic_and) {
1341 if (try_emit_mad_for_and_not(ir, 1))
1342 return;
1343 if (try_emit_mad_for_and_not(ir, 0))
1344 return;
1345 }
1346
1347 if (try_emit_sat(ir))
1348 return;
1349
1350 if (ir->operation == ir_quadop_vector)
1351 assert(!"ir_quadop_vector should have been lowered");
1352
1353 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1354 this->result.file = PROGRAM_UNDEFINED;
1355 ir->operands[operand]->accept(this);
1356 if (this->result.file == PROGRAM_UNDEFINED) {
1357 ir_print_visitor v;
1358 printf("Failed to get tree for expression operand:\n");
1359 ir->operands[operand]->accept(&v);
1360 exit(1);
1361 }
1362 op[operand] = this->result;
1363
1364 /* Matrix expression operands should have been broken down to vector
1365 * operations already.
1366 */
1367 assert(!ir->operands[operand]->type->is_matrix());
1368 }
1369
1370 int vector_elements = ir->operands[0]->type->vector_elements;
1371 if (ir->operands[1]) {
1372 vector_elements = MAX2(vector_elements,
1373 ir->operands[1]->type->vector_elements);
1374 }
1375
1376 this->result.file = PROGRAM_UNDEFINED;
1377
1378 /* Storage for our result. Ideally for an assignment we'd be using
1379 * the actual storage for the result here, instead.
1380 */
1381 result_src = get_temp(ir->type);
1382 /* convenience for the emit functions below. */
1383 result_dst = st_dst_reg(result_src);
1384 /* Limit writes to the channels that will be used by result_src later.
1385 * This does limit this temp's use as a temporary for multi-instruction
1386 * sequences.
1387 */
1388 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1389
1390 switch (ir->operation) {
1391 case ir_unop_logic_not:
1392 if (result_dst.type != GLSL_TYPE_FLOAT)
1393 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1394 else {
1395 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1396 * older GPUs implement SEQ using multiple instructions (i915 uses two
1397 * SGE instructions and a MUL instruction). Since our logic values are
1398 * 0.0 and 1.0, 1-x also implements !x.
1399 */
1400 op[0].negate = ~op[0].negate;
1401 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1402 }
1403 break;
1404 case ir_unop_neg:
1405 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1406 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1407 else {
1408 op[0].negate = ~op[0].negate;
1409 result_src = op[0];
1410 }
1411 break;
1412 case ir_unop_abs:
1413 assert(result_dst.type == GLSL_TYPE_FLOAT);
1414 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1415 break;
1416 case ir_unop_sign:
1417 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1418 break;
1419 case ir_unop_rcp:
1420 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1421 break;
1422
1423 case ir_unop_exp2:
1424 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1425 break;
1426 case ir_unop_exp:
1427 case ir_unop_log:
1428 assert(!"not reached: should be handled by ir_explog_to_explog2");
1429 break;
1430 case ir_unop_log2:
1431 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1432 break;
1433 case ir_unop_sin:
1434 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1435 break;
1436 case ir_unop_cos:
1437 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1438 break;
1439 case ir_unop_sin_reduced:
1440 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1441 break;
1442 case ir_unop_cos_reduced:
1443 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1444 break;
1445
1446 case ir_unop_dFdx:
1447 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1448 break;
1449 case ir_unop_dFdy:
1450 op[0].negate = ~op[0].negate;
1451 emit(ir, TGSI_OPCODE_DDY, result_dst, op[0]);
1452 break;
1453
1454 case ir_unop_noise: {
1455 /* At some point, a motivated person could add a better
1456 * implementation of noise. Currently not even the nvidia
1457 * binary drivers do anything more than this. In any case, the
1458 * place to do this is in the GL state tracker, not the poor
1459 * driver.
1460 */
1461 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1462 break;
1463 }
1464
1465 case ir_binop_add:
1466 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1467 break;
1468 case ir_binop_sub:
1469 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1470 break;
1471
1472 case ir_binop_mul:
1473 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1474 break;
1475 case ir_binop_div:
1476 if (result_dst.type == GLSL_TYPE_FLOAT)
1477 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1478 else
1479 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1480 break;
1481 case ir_binop_mod:
1482 if (result_dst.type == GLSL_TYPE_FLOAT)
1483 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1484 else
1485 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1486 break;
1487
1488 case ir_binop_less:
1489 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1490 break;
1491 case ir_binop_greater:
1492 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1493 break;
1494 case ir_binop_lequal:
1495 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1496 break;
1497 case ir_binop_gequal:
1498 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1499 break;
1500 case ir_binop_equal:
1501 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1502 break;
1503 case ir_binop_nequal:
1504 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1505 break;
1506 case ir_binop_all_equal:
1507 /* "==" operator producing a scalar boolean. */
1508 if (ir->operands[0]->type->is_vector() ||
1509 ir->operands[1]->type->is_vector()) {
1510 st_src_reg temp = get_temp(native_integers ?
1511 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1512 glsl_type::vec4_type);
1513
1514 if (native_integers) {
1515 st_dst_reg temp_dst = st_dst_reg(temp);
1516 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1517
1518 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1519
1520 /* Emit 1-3 AND operations to combine the SEQ results. */
1521 switch (ir->operands[0]->type->vector_elements) {
1522 case 2:
1523 break;
1524 case 3:
1525 temp_dst.writemask = WRITEMASK_Y;
1526 temp1.swizzle = SWIZZLE_YYYY;
1527 temp2.swizzle = SWIZZLE_ZZZZ;
1528 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1529 break;
1530 case 4:
1531 temp_dst.writemask = WRITEMASK_X;
1532 temp1.swizzle = SWIZZLE_XXXX;
1533 temp2.swizzle = SWIZZLE_YYYY;
1534 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1535 temp_dst.writemask = WRITEMASK_Y;
1536 temp1.swizzle = SWIZZLE_ZZZZ;
1537 temp2.swizzle = SWIZZLE_WWWW;
1538 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1539 }
1540
1541 temp1.swizzle = SWIZZLE_XXXX;
1542 temp2.swizzle = SWIZZLE_YYYY;
1543 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1544 } else {
1545 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1546
1547 /* After the dot-product, the value will be an integer on the
1548 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1549 */
1550 emit_dp(ir, result_dst, temp, temp, vector_elements);
1551
1552 /* Negating the result of the dot-product gives values on the range
1553 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1554 * This is achieved using SGE.
1555 */
1556 st_src_reg sge_src = result_src;
1557 sge_src.negate = ~sge_src.negate;
1558 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1559 }
1560 } else {
1561 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1562 }
1563 break;
1564 case ir_binop_any_nequal:
1565 /* "!=" operator producing a scalar boolean. */
1566 if (ir->operands[0]->type->is_vector() ||
1567 ir->operands[1]->type->is_vector()) {
1568 st_src_reg temp = get_temp(native_integers ?
1569 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1570 glsl_type::vec4_type);
1571 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1572
1573 if (native_integers) {
1574 st_dst_reg temp_dst = st_dst_reg(temp);
1575 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1576
1577 /* Emit 1-3 OR operations to combine the SNE results. */
1578 switch (ir->operands[0]->type->vector_elements) {
1579 case 2:
1580 break;
1581 case 3:
1582 temp_dst.writemask = WRITEMASK_Y;
1583 temp1.swizzle = SWIZZLE_YYYY;
1584 temp2.swizzle = SWIZZLE_ZZZZ;
1585 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1586 break;
1587 case 4:
1588 temp_dst.writemask = WRITEMASK_X;
1589 temp1.swizzle = SWIZZLE_XXXX;
1590 temp2.swizzle = SWIZZLE_YYYY;
1591 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1592 temp_dst.writemask = WRITEMASK_Y;
1593 temp1.swizzle = SWIZZLE_ZZZZ;
1594 temp2.swizzle = SWIZZLE_WWWW;
1595 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1596 }
1597
1598 temp1.swizzle = SWIZZLE_XXXX;
1599 temp2.swizzle = SWIZZLE_YYYY;
1600 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1601 } else {
1602 /* After the dot-product, the value will be an integer on the
1603 * range [0,4]. Zero stays zero, and positive values become 1.0.
1604 */
1605 glsl_to_tgsi_instruction *const dp =
1606 emit_dp(ir, result_dst, temp, temp, vector_elements);
1607 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1608 /* The clamping to [0,1] can be done for free in the fragment
1609 * shader with a saturate.
1610 */
1611 dp->saturate = true;
1612 } else {
1613 /* Negating the result of the dot-product gives values on the range
1614 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1615 * achieved using SLT.
1616 */
1617 st_src_reg slt_src = result_src;
1618 slt_src.negate = ~slt_src.negate;
1619 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1620 }
1621 }
1622 } else {
1623 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1624 }
1625 break;
1626
1627 case ir_unop_any: {
1628 assert(ir->operands[0]->type->is_vector());
1629
1630 /* After the dot-product, the value will be an integer on the
1631 * range [0,4]. Zero stays zero, and positive values become 1.0.
1632 */
1633 glsl_to_tgsi_instruction *const dp =
1634 emit_dp(ir, result_dst, op[0], op[0],
1635 ir->operands[0]->type->vector_elements);
1636 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1637 result_dst.type == GLSL_TYPE_FLOAT) {
1638 /* The clamping to [0,1] can be done for free in the fragment
1639 * shader with a saturate.
1640 */
1641 dp->saturate = true;
1642 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1643 /* Negating the result of the dot-product gives values on the range
1644 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1645 * is achieved using SLT.
1646 */
1647 st_src_reg slt_src = result_src;
1648 slt_src.negate = ~slt_src.negate;
1649 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1650 }
1651 else {
1652 /* Use SNE 0 if integers are being used as boolean values. */
1653 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1654 }
1655 break;
1656 }
1657
1658 case ir_binop_logic_xor:
1659 if (native_integers)
1660 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1661 else
1662 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1663 break;
1664
1665 case ir_binop_logic_or: {
1666 if (native_integers) {
1667 /* If integers are used as booleans, we can use an actual "or"
1668 * instruction.
1669 */
1670 assert(native_integers);
1671 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1672 } else {
1673 /* After the addition, the value will be an integer on the
1674 * range [0,2]. Zero stays zero, and positive values become 1.0.
1675 */
1676 glsl_to_tgsi_instruction *add =
1677 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1678 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1679 /* The clamping to [0,1] can be done for free in the fragment
1680 * shader with a saturate if floats are being used as boolean values.
1681 */
1682 add->saturate = true;
1683 } else {
1684 /* Negating the result of the addition gives values on the range
1685 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1686 * is achieved using SLT.
1687 */
1688 st_src_reg slt_src = result_src;
1689 slt_src.negate = ~slt_src.negate;
1690 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1691 }
1692 }
1693 break;
1694 }
1695
1696 case ir_binop_logic_and:
1697 /* If native integers are disabled, the bool args are stored as float 0.0
1698 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1699 * actual AND opcode.
1700 */
1701 if (native_integers)
1702 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1703 else
1704 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1705 break;
1706
1707 case ir_binop_dot:
1708 assert(ir->operands[0]->type->is_vector());
1709 assert(ir->operands[0]->type == ir->operands[1]->type);
1710 emit_dp(ir, result_dst, op[0], op[1],
1711 ir->operands[0]->type->vector_elements);
1712 break;
1713
1714 case ir_unop_sqrt:
1715 /* sqrt(x) = x * rsq(x). */
1716 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1717 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1718 /* For incoming channels <= 0, set the result to 0. */
1719 op[0].negate = ~op[0].negate;
1720 emit(ir, TGSI_OPCODE_CMP, result_dst,
1721 op[0], result_src, st_src_reg_for_float(0.0));
1722 break;
1723 case ir_unop_rsq:
1724 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1725 break;
1726 case ir_unop_i2f:
1727 if (native_integers) {
1728 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1729 break;
1730 }
1731 /* fallthrough to next case otherwise */
1732 case ir_unop_b2f:
1733 if (native_integers) {
1734 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1735 break;
1736 }
1737 /* fallthrough to next case otherwise */
1738 case ir_unop_i2u:
1739 case ir_unop_u2i:
1740 /* Converting between signed and unsigned integers is a no-op. */
1741 result_src = op[0];
1742 break;
1743 case ir_unop_b2i:
1744 if (native_integers) {
1745 /* Booleans are stored as integers using ~0 for true and 0 for false.
1746 * GLSL requires that int(bool) return 1 for true and 0 for false.
1747 * This conversion is done with AND, but it could be done with NEG.
1748 */
1749 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1750 } else {
1751 /* Booleans and integers are both stored as floats when native
1752 * integers are disabled.
1753 */
1754 result_src = op[0];
1755 }
1756 break;
1757 case ir_unop_f2i:
1758 if (native_integers)
1759 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1760 else
1761 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1762 break;
1763 case ir_unop_f2b:
1764 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1765 break;
1766 case ir_unop_i2b:
1767 if (native_integers)
1768 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1769 else
1770 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1771 break;
1772 case ir_unop_trunc:
1773 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1774 break;
1775 case ir_unop_ceil:
1776 op[0].negate = ~op[0].negate;
1777 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1778 result_src.negate = ~result_src.negate;
1779 break;
1780 case ir_unop_floor:
1781 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1782 break;
1783 case ir_unop_round_even:
1784 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1785 break;
1786 case ir_unop_fract:
1787 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1788 break;
1789
1790 case ir_binop_min:
1791 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1792 break;
1793 case ir_binop_max:
1794 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1795 break;
1796 case ir_binop_pow:
1797 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1798 break;
1799
1800 case ir_unop_bit_not:
1801 if (native_integers) {
1802 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1803 break;
1804 }
1805 case ir_unop_u2f:
1806 if (native_integers) {
1807 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1808 break;
1809 }
1810 case ir_binop_lshift:
1811 if (native_integers) {
1812 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1813 break;
1814 }
1815 case ir_binop_rshift:
1816 if (native_integers) {
1817 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1818 break;
1819 }
1820 case ir_binop_bit_and:
1821 if (native_integers) {
1822 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1823 break;
1824 }
1825 case ir_binop_bit_xor:
1826 if (native_integers) {
1827 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1828 break;
1829 }
1830 case ir_binop_bit_or:
1831 if (native_integers) {
1832 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1833 break;
1834 }
1835
1836 assert(!"GLSL 1.30 features unsupported");
1837 break;
1838
1839 case ir_quadop_vector:
1840 /* This operation should have already been handled.
1841 */
1842 assert(!"Should not get here.");
1843 break;
1844 }
1845
1846 this->result = result_src;
1847 }
1848
1849
1850 void
1851 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1852 {
1853 st_src_reg src;
1854 int i;
1855 int swizzle[4];
1856
1857 /* Note that this is only swizzles in expressions, not those on the left
1858 * hand side of an assignment, which do write masking. See ir_assignment
1859 * for that.
1860 */
1861
1862 ir->val->accept(this);
1863 src = this->result;
1864 assert(src.file != PROGRAM_UNDEFINED);
1865
1866 for (i = 0; i < 4; i++) {
1867 if (i < ir->type->vector_elements) {
1868 switch (i) {
1869 case 0:
1870 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1871 break;
1872 case 1:
1873 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1874 break;
1875 case 2:
1876 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1877 break;
1878 case 3:
1879 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1880 break;
1881 }
1882 } else {
1883 /* If the type is smaller than a vec4, replicate the last
1884 * channel out.
1885 */
1886 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1887 }
1888 }
1889
1890 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1891
1892 this->result = src;
1893 }
1894
1895 void
1896 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1897 {
1898 variable_storage *entry = find_variable_storage(ir->var);
1899 ir_variable *var = ir->var;
1900
1901 if (!entry) {
1902 switch (var->mode) {
1903 case ir_var_uniform:
1904 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1905 var->location);
1906 this->variables.push_tail(entry);
1907 break;
1908 case ir_var_in:
1909 case ir_var_inout:
1910 /* The linker assigns locations for varyings and attributes,
1911 * including deprecated builtins (like gl_Color), user-assign
1912 * generic attributes (glBindVertexLocation), and
1913 * user-defined varyings.
1914 *
1915 * FINISHME: We would hit this path for function arguments. Fix!
1916 */
1917 assert(var->location != -1);
1918 entry = new(mem_ctx) variable_storage(var,
1919 PROGRAM_INPUT,
1920 var->location);
1921 break;
1922 case ir_var_out:
1923 assert(var->location != -1);
1924 entry = new(mem_ctx) variable_storage(var,
1925 PROGRAM_OUTPUT,
1926 var->location);
1927 break;
1928 case ir_var_system_value:
1929 entry = new(mem_ctx) variable_storage(var,
1930 PROGRAM_SYSTEM_VALUE,
1931 var->location);
1932 break;
1933 case ir_var_auto:
1934 case ir_var_temporary:
1935 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1936 this->next_temp);
1937 this->variables.push_tail(entry);
1938
1939 next_temp += type_size(var->type);
1940 break;
1941 }
1942
1943 if (!entry) {
1944 printf("Failed to make storage for %s\n", var->name);
1945 exit(1);
1946 }
1947 }
1948
1949 this->result = st_src_reg(entry->file, entry->index, var->type);
1950 if (!native_integers)
1951 this->result.type = GLSL_TYPE_FLOAT;
1952 }
1953
1954 void
1955 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
1956 {
1957 ir_constant *index;
1958 st_src_reg src;
1959 int element_size = type_size(ir->type);
1960
1961 index = ir->array_index->constant_expression_value();
1962
1963 ir->array->accept(this);
1964 src = this->result;
1965
1966 if (index) {
1967 src.index += index->value.i[0] * element_size;
1968 } else {
1969 /* Variable index array dereference. It eats the "vec4" of the
1970 * base of the array and an index that offsets the TGSI register
1971 * index.
1972 */
1973 ir->array_index->accept(this);
1974
1975 st_src_reg index_reg;
1976
1977 if (element_size == 1) {
1978 index_reg = this->result;
1979 } else {
1980 index_reg = get_temp(native_integers ?
1981 glsl_type::int_type : glsl_type::float_type);
1982
1983 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
1984 this->result, st_src_reg_for_type(index_reg.type, element_size));
1985 }
1986
1987 /* If there was already a relative address register involved, add the
1988 * new and the old together to get the new offset.
1989 */
1990 if (src.reladdr != NULL) {
1991 st_src_reg accum_reg = get_temp(native_integers ?
1992 glsl_type::int_type : glsl_type::float_type);
1993
1994 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
1995 index_reg, *src.reladdr);
1996
1997 index_reg = accum_reg;
1998 }
1999
2000 src.reladdr = ralloc(mem_ctx, st_src_reg);
2001 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2002 }
2003
2004 /* If the type is smaller than a vec4, replicate the last channel out. */
2005 if (ir->type->is_scalar() || ir->type->is_vector())
2006 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2007 else
2008 src.swizzle = SWIZZLE_NOOP;
2009
2010 this->result = src;
2011 }
2012
2013 void
2014 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2015 {
2016 unsigned int i;
2017 const glsl_type *struct_type = ir->record->type;
2018 int offset = 0;
2019
2020 ir->record->accept(this);
2021
2022 for (i = 0; i < struct_type->length; i++) {
2023 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2024 break;
2025 offset += type_size(struct_type->fields.structure[i].type);
2026 }
2027
2028 /* If the type is smaller than a vec4, replicate the last channel out. */
2029 if (ir->type->is_scalar() || ir->type->is_vector())
2030 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2031 else
2032 this->result.swizzle = SWIZZLE_NOOP;
2033
2034 this->result.index += offset;
2035 }
2036
2037 /**
2038 * We want to be careful in assignment setup to hit the actual storage
2039 * instead of potentially using a temporary like we might with the
2040 * ir_dereference handler.
2041 */
2042 static st_dst_reg
2043 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2044 {
2045 /* The LHS must be a dereference. If the LHS is a variable indexed array
2046 * access of a vector, it must be separated into a series conditional moves
2047 * before reaching this point (see ir_vec_index_to_cond_assign).
2048 */
2049 assert(ir->as_dereference());
2050 ir_dereference_array *deref_array = ir->as_dereference_array();
2051 if (deref_array) {
2052 assert(!deref_array->array->type->is_vector());
2053 }
2054
2055 /* Use the rvalue deref handler for the most part. We'll ignore
2056 * swizzles in it and write swizzles using writemask, though.
2057 */
2058 ir->accept(v);
2059 return st_dst_reg(v->result);
2060 }
2061
2062 /**
2063 * Process the condition of a conditional assignment
2064 *
2065 * Examines the condition of a conditional assignment to generate the optimal
2066 * first operand of a \c CMP instruction. If the condition is a relational
2067 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2068 * used as the source for the \c CMP instruction. Otherwise the comparison
2069 * is processed to a boolean result, and the boolean result is used as the
2070 * operand to the CMP instruction.
2071 */
2072 bool
2073 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2074 {
2075 ir_rvalue *src_ir = ir;
2076 bool negate = true;
2077 bool switch_order = false;
2078
2079 ir_expression *const expr = ir->as_expression();
2080 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2081 bool zero_on_left = false;
2082
2083 if (expr->operands[0]->is_zero()) {
2084 src_ir = expr->operands[1];
2085 zero_on_left = true;
2086 } else if (expr->operands[1]->is_zero()) {
2087 src_ir = expr->operands[0];
2088 zero_on_left = false;
2089 }
2090
2091 /* a is - 0 + - 0 +
2092 * (a < 0) T F F ( a < 0) T F F
2093 * (0 < a) F F T (-a < 0) F F T
2094 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2095 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2096 * (a > 0) F F T (-a < 0) F F T
2097 * (0 > a) T F F ( a < 0) T F F
2098 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2099 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2100 *
2101 * Note that exchanging the order of 0 and 'a' in the comparison simply
2102 * means that the value of 'a' should be negated.
2103 */
2104 if (src_ir != ir) {
2105 switch (expr->operation) {
2106 case ir_binop_less:
2107 switch_order = false;
2108 negate = zero_on_left;
2109 break;
2110
2111 case ir_binop_greater:
2112 switch_order = false;
2113 negate = !zero_on_left;
2114 break;
2115
2116 case ir_binop_lequal:
2117 switch_order = true;
2118 negate = !zero_on_left;
2119 break;
2120
2121 case ir_binop_gequal:
2122 switch_order = true;
2123 negate = zero_on_left;
2124 break;
2125
2126 default:
2127 /* This isn't the right kind of comparison afterall, so make sure
2128 * the whole condition is visited.
2129 */
2130 src_ir = ir;
2131 break;
2132 }
2133 }
2134 }
2135
2136 src_ir->accept(this);
2137
2138 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2139 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2140 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2141 * computing the condition.
2142 */
2143 if (negate)
2144 this->result.negate = ~this->result.negate;
2145
2146 return switch_order;
2147 }
2148
2149 void
2150 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2151 {
2152 st_dst_reg l;
2153 st_src_reg r;
2154 int i;
2155
2156 ir->rhs->accept(this);
2157 r = this->result;
2158
2159 l = get_assignment_lhs(ir->lhs, this);
2160
2161 /* FINISHME: This should really set to the correct maximal writemask for each
2162 * FINISHME: component written (in the loops below). This case can only
2163 * FINISHME: occur for matrices, arrays, and structures.
2164 */
2165 if (ir->write_mask == 0) {
2166 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2167 l.writemask = WRITEMASK_XYZW;
2168 } else if (ir->lhs->type->is_scalar() &&
2169 ir->lhs->variable_referenced()->mode == ir_var_out) {
2170 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2171 * FINISHME: W component of fragment shader output zero, work correctly.
2172 */
2173 l.writemask = WRITEMASK_XYZW;
2174 } else {
2175 int swizzles[4];
2176 int first_enabled_chan = 0;
2177 int rhs_chan = 0;
2178
2179 l.writemask = ir->write_mask;
2180
2181 for (int i = 0; i < 4; i++) {
2182 if (l.writemask & (1 << i)) {
2183 first_enabled_chan = GET_SWZ(r.swizzle, i);
2184 break;
2185 }
2186 }
2187
2188 /* Swizzle a small RHS vector into the channels being written.
2189 *
2190 * glsl ir treats write_mask as dictating how many channels are
2191 * present on the RHS while TGSI treats write_mask as just
2192 * showing which channels of the vec4 RHS get written.
2193 */
2194 for (int i = 0; i < 4; i++) {
2195 if (l.writemask & (1 << i))
2196 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2197 else
2198 swizzles[i] = first_enabled_chan;
2199 }
2200 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2201 swizzles[2], swizzles[3]);
2202 }
2203
2204 assert(l.file != PROGRAM_UNDEFINED);
2205 assert(r.file != PROGRAM_UNDEFINED);
2206
2207 if (ir->condition) {
2208 const bool switch_order = this->process_move_condition(ir->condition);
2209 st_src_reg condition = this->result;
2210
2211 for (i = 0; i < type_size(ir->lhs->type); i++) {
2212 st_src_reg l_src = st_src_reg(l);
2213 st_src_reg condition_temp = condition;
2214 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2215
2216 if (native_integers) {
2217 /* This is necessary because TGSI's CMP instruction expects the
2218 * condition to be a float, and we store booleans as integers.
2219 * If TGSI had a UCMP instruction or similar, this extra
2220 * instruction would not be necessary.
2221 */
2222 condition_temp = get_temp(glsl_type::vec4_type);
2223 condition.negate = 0;
2224 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2225 condition_temp.swizzle = condition.swizzle;
2226 }
2227
2228 if (switch_order) {
2229 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2230 } else {
2231 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2232 }
2233
2234 l.index++;
2235 r.index++;
2236 }
2237 } else if (ir->rhs->as_expression() &&
2238 this->instructions.get_tail() &&
2239 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2240 type_size(ir->lhs->type) == 1 &&
2241 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2242 /* To avoid emitting an extra MOV when assigning an expression to a
2243 * variable, emit the last instruction of the expression again, but
2244 * replace the destination register with the target of the assignment.
2245 * Dead code elimination will remove the original instruction.
2246 */
2247 glsl_to_tgsi_instruction *inst, *new_inst;
2248 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2249 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2250 new_inst->saturate = inst->saturate;
2251 inst->dead_mask = inst->dst.writemask;
2252 } else {
2253 for (i = 0; i < type_size(ir->lhs->type); i++) {
2254 emit(ir, TGSI_OPCODE_MOV, l, r);
2255 l.index++;
2256 r.index++;
2257 }
2258 }
2259 }
2260
2261
2262 void
2263 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2264 {
2265 st_src_reg src;
2266 GLfloat stack_vals[4] = { 0 };
2267 gl_constant_value *values = (gl_constant_value *) stack_vals;
2268 GLenum gl_type = GL_NONE;
2269 unsigned int i;
2270 static int in_array = 0;
2271 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2272
2273 /* Unfortunately, 4 floats is all we can get into
2274 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2275 * aggregate constant and move each constant value into it. If we
2276 * get lucky, copy propagation will eliminate the extra moves.
2277 */
2278 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2279 st_src_reg temp_base = get_temp(ir->type);
2280 st_dst_reg temp = st_dst_reg(temp_base);
2281
2282 foreach_iter(exec_list_iterator, iter, ir->components) {
2283 ir_constant *field_value = (ir_constant *)iter.get();
2284 int size = type_size(field_value->type);
2285
2286 assert(size > 0);
2287
2288 field_value->accept(this);
2289 src = this->result;
2290
2291 for (i = 0; i < (unsigned int)size; i++) {
2292 emit(ir, TGSI_OPCODE_MOV, temp, src);
2293
2294 src.index++;
2295 temp.index++;
2296 }
2297 }
2298 this->result = temp_base;
2299 return;
2300 }
2301
2302 if (ir->type->is_array()) {
2303 st_src_reg temp_base = get_temp(ir->type);
2304 st_dst_reg temp = st_dst_reg(temp_base);
2305 int size = type_size(ir->type->fields.array);
2306
2307 assert(size > 0);
2308 in_array++;
2309
2310 for (i = 0; i < ir->type->length; i++) {
2311 ir->array_elements[i]->accept(this);
2312 src = this->result;
2313 for (int j = 0; j < size; j++) {
2314 emit(ir, TGSI_OPCODE_MOV, temp, src);
2315
2316 src.index++;
2317 temp.index++;
2318 }
2319 }
2320 this->result = temp_base;
2321 in_array--;
2322 return;
2323 }
2324
2325 if (ir->type->is_matrix()) {
2326 st_src_reg mat = get_temp(ir->type);
2327 st_dst_reg mat_column = st_dst_reg(mat);
2328
2329 for (i = 0; i < ir->type->matrix_columns; i++) {
2330 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2331 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2332
2333 src = st_src_reg(file, -1, ir->type->base_type);
2334 src.index = add_constant(file,
2335 values,
2336 ir->type->vector_elements,
2337 GL_FLOAT,
2338 &src.swizzle);
2339 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2340
2341 mat_column.index++;
2342 }
2343
2344 this->result = mat;
2345 return;
2346 }
2347
2348 switch (ir->type->base_type) {
2349 case GLSL_TYPE_FLOAT:
2350 gl_type = GL_FLOAT;
2351 for (i = 0; i < ir->type->vector_elements; i++) {
2352 values[i].f = ir->value.f[i];
2353 }
2354 break;
2355 case GLSL_TYPE_UINT:
2356 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2357 for (i = 0; i < ir->type->vector_elements; i++) {
2358 if (native_integers)
2359 values[i].u = ir->value.u[i];
2360 else
2361 values[i].f = ir->value.u[i];
2362 }
2363 break;
2364 case GLSL_TYPE_INT:
2365 gl_type = native_integers ? GL_INT : GL_FLOAT;
2366 for (i = 0; i < ir->type->vector_elements; i++) {
2367 if (native_integers)
2368 values[i].i = ir->value.i[i];
2369 else
2370 values[i].f = ir->value.i[i];
2371 }
2372 break;
2373 case GLSL_TYPE_BOOL:
2374 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2375 for (i = 0; i < ir->type->vector_elements; i++) {
2376 if (native_integers)
2377 values[i].b = ir->value.b[i];
2378 else
2379 values[i].f = ir->value.b[i];
2380 }
2381 break;
2382 default:
2383 assert(!"Non-float/uint/int/bool constant");
2384 }
2385
2386 this->result = st_src_reg(file, -1, ir->type);
2387 this->result.index = add_constant(file,
2388 values,
2389 ir->type->vector_elements,
2390 gl_type,
2391 &this->result.swizzle);
2392 }
2393
2394 function_entry *
2395 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2396 {
2397 function_entry *entry;
2398
2399 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2400 entry = (function_entry *)iter.get();
2401
2402 if (entry->sig == sig)
2403 return entry;
2404 }
2405
2406 entry = ralloc(mem_ctx, function_entry);
2407 entry->sig = sig;
2408 entry->sig_id = this->next_signature_id++;
2409 entry->bgn_inst = NULL;
2410
2411 /* Allocate storage for all the parameters. */
2412 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2413 ir_variable *param = (ir_variable *)iter.get();
2414 variable_storage *storage;
2415
2416 storage = find_variable_storage(param);
2417 assert(!storage);
2418
2419 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2420 this->next_temp);
2421 this->variables.push_tail(storage);
2422
2423 this->next_temp += type_size(param->type);
2424 }
2425
2426 if (!sig->return_type->is_void()) {
2427 entry->return_reg = get_temp(sig->return_type);
2428 } else {
2429 entry->return_reg = undef_src;
2430 }
2431
2432 this->function_signatures.push_tail(entry);
2433 return entry;
2434 }
2435
2436 void
2437 glsl_to_tgsi_visitor::visit(ir_call *ir)
2438 {
2439 glsl_to_tgsi_instruction *call_inst;
2440 ir_function_signature *sig = ir->get_callee();
2441 function_entry *entry = get_function_signature(sig);
2442 int i;
2443
2444 /* Process in parameters. */
2445 exec_list_iterator sig_iter = sig->parameters.iterator();
2446 foreach_iter(exec_list_iterator, iter, *ir) {
2447 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2448 ir_variable *param = (ir_variable *)sig_iter.get();
2449
2450 if (param->mode == ir_var_in ||
2451 param->mode == ir_var_inout) {
2452 variable_storage *storage = find_variable_storage(param);
2453 assert(storage);
2454
2455 param_rval->accept(this);
2456 st_src_reg r = this->result;
2457
2458 st_dst_reg l;
2459 l.file = storage->file;
2460 l.index = storage->index;
2461 l.reladdr = NULL;
2462 l.writemask = WRITEMASK_XYZW;
2463 l.cond_mask = COND_TR;
2464
2465 for (i = 0; i < type_size(param->type); i++) {
2466 emit(ir, TGSI_OPCODE_MOV, l, r);
2467 l.index++;
2468 r.index++;
2469 }
2470 }
2471
2472 sig_iter.next();
2473 }
2474 assert(!sig_iter.has_next());
2475
2476 /* Emit call instruction */
2477 call_inst = emit(ir, TGSI_OPCODE_CAL);
2478 call_inst->function = entry;
2479
2480 /* Process out parameters. */
2481 sig_iter = sig->parameters.iterator();
2482 foreach_iter(exec_list_iterator, iter, *ir) {
2483 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2484 ir_variable *param = (ir_variable *)sig_iter.get();
2485
2486 if (param->mode == ir_var_out ||
2487 param->mode == ir_var_inout) {
2488 variable_storage *storage = find_variable_storage(param);
2489 assert(storage);
2490
2491 st_src_reg r;
2492 r.file = storage->file;
2493 r.index = storage->index;
2494 r.reladdr = NULL;
2495 r.swizzle = SWIZZLE_NOOP;
2496 r.negate = 0;
2497
2498 param_rval->accept(this);
2499 st_dst_reg l = st_dst_reg(this->result);
2500
2501 for (i = 0; i < type_size(param->type); i++) {
2502 emit(ir, TGSI_OPCODE_MOV, l, r);
2503 l.index++;
2504 r.index++;
2505 }
2506 }
2507
2508 sig_iter.next();
2509 }
2510 assert(!sig_iter.has_next());
2511
2512 /* Process return value. */
2513 this->result = entry->return_reg;
2514 }
2515
2516 void
2517 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2518 {
2519 st_src_reg result_src, coord, lod_info, projector, dx, dy, offset;
2520 st_dst_reg result_dst, coord_dst;
2521 glsl_to_tgsi_instruction *inst = NULL;
2522 unsigned opcode = TGSI_OPCODE_NOP;
2523
2524 if (ir->coordinate) {
2525 ir->coordinate->accept(this);
2526
2527 /* Put our coords in a temp. We'll need to modify them for shadow,
2528 * projection, or LOD, so the only case we'd use it as is is if
2529 * we're doing plain old texturing. The optimization passes on
2530 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2531 */
2532 coord = get_temp(glsl_type::vec4_type);
2533 coord_dst = st_dst_reg(coord);
2534 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2535 }
2536
2537 if (ir->projector) {
2538 ir->projector->accept(this);
2539 projector = this->result;
2540 }
2541
2542 /* Storage for our result. Ideally for an assignment we'd be using
2543 * the actual storage for the result here, instead.
2544 */
2545 result_src = get_temp(glsl_type::vec4_type);
2546 result_dst = st_dst_reg(result_src);
2547
2548 switch (ir->op) {
2549 case ir_tex:
2550 opcode = TGSI_OPCODE_TEX;
2551 break;
2552 case ir_txb:
2553 opcode = TGSI_OPCODE_TXB;
2554 ir->lod_info.bias->accept(this);
2555 lod_info = this->result;
2556 break;
2557 case ir_txl:
2558 opcode = TGSI_OPCODE_TXL;
2559 ir->lod_info.lod->accept(this);
2560 lod_info = this->result;
2561 break;
2562 case ir_txd:
2563 opcode = TGSI_OPCODE_TXD;
2564 ir->lod_info.grad.dPdx->accept(this);
2565 dx = this->result;
2566 ir->lod_info.grad.dPdy->accept(this);
2567 dy = this->result;
2568 break;
2569 case ir_txs:
2570 opcode = TGSI_OPCODE_TXQ;
2571 ir->lod_info.lod->accept(this);
2572 lod_info = this->result;
2573 break;
2574 case ir_txf:
2575 opcode = TGSI_OPCODE_TXF;
2576 ir->lod_info.lod->accept(this);
2577 lod_info = this->result;
2578 if (ir->offset) {
2579 ir->offset->accept(this);
2580 offset = this->result;
2581 }
2582 break;
2583 }
2584
2585 const glsl_type *sampler_type = ir->sampler->type;
2586
2587 if (ir->projector) {
2588 if (opcode == TGSI_OPCODE_TEX) {
2589 /* Slot the projector in as the last component of the coord. */
2590 coord_dst.writemask = WRITEMASK_W;
2591 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2592 coord_dst.writemask = WRITEMASK_XYZW;
2593 opcode = TGSI_OPCODE_TXP;
2594 } else {
2595 st_src_reg coord_w = coord;
2596 coord_w.swizzle = SWIZZLE_WWWW;
2597
2598 /* For the other TEX opcodes there's no projective version
2599 * since the last slot is taken up by LOD info. Do the
2600 * projective divide now.
2601 */
2602 coord_dst.writemask = WRITEMASK_W;
2603 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2604
2605 /* In the case where we have to project the coordinates "by hand,"
2606 * the shadow comparator value must also be projected.
2607 */
2608 st_src_reg tmp_src = coord;
2609 if (ir->shadow_comparitor) {
2610 /* Slot the shadow value in as the second to last component of the
2611 * coord.
2612 */
2613 ir->shadow_comparitor->accept(this);
2614
2615 tmp_src = get_temp(glsl_type::vec4_type);
2616 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2617
2618 /* Projective division not allowed for array samplers. */
2619 assert(!sampler_type->sampler_array);
2620
2621 tmp_dst.writemask = WRITEMASK_Z;
2622 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2623
2624 tmp_dst.writemask = WRITEMASK_XY;
2625 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2626 }
2627
2628 coord_dst.writemask = WRITEMASK_XYZ;
2629 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2630
2631 coord_dst.writemask = WRITEMASK_XYZW;
2632 coord.swizzle = SWIZZLE_XYZW;
2633 }
2634 }
2635
2636 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2637 * comparator was put in the correct place (and projected) by the code,
2638 * above, that handles by-hand projection.
2639 */
2640 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2641 /* Slot the shadow value in as the second to last component of the
2642 * coord.
2643 */
2644 ir->shadow_comparitor->accept(this);
2645
2646 /* XXX This will need to be updated for cubemap array samplers. */
2647 if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2648 sampler_type->sampler_array) {
2649 coord_dst.writemask = WRITEMASK_W;
2650 } else {
2651 coord_dst.writemask = WRITEMASK_Z;
2652 }
2653
2654 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2655 coord_dst.writemask = WRITEMASK_XYZW;
2656 }
2657
2658 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2659 opcode == TGSI_OPCODE_TXF) {
2660 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2661 coord_dst.writemask = WRITEMASK_W;
2662 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2663 coord_dst.writemask = WRITEMASK_XYZW;
2664 }
2665
2666 if (opcode == TGSI_OPCODE_TXD)
2667 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2668 else if (opcode == TGSI_OPCODE_TXQ)
2669 inst = emit(ir, opcode, result_dst, lod_info);
2670 else if (opcode == TGSI_OPCODE_TXF) {
2671 inst = emit(ir, opcode, result_dst, coord);
2672 } else
2673 inst = emit(ir, opcode, result_dst, coord);
2674
2675 if (ir->shadow_comparitor)
2676 inst->tex_shadow = GL_TRUE;
2677
2678 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2679 this->shader_program,
2680 this->prog);
2681
2682 if (ir->offset) {
2683 inst->tex_offset_num_offset = 1;
2684 inst->tex_offsets[0].Index = offset.index;
2685 inst->tex_offsets[0].File = offset.file;
2686 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2687 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2688 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2689 }
2690
2691 switch (sampler_type->sampler_dimensionality) {
2692 case GLSL_SAMPLER_DIM_1D:
2693 inst->tex_target = (sampler_type->sampler_array)
2694 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2695 break;
2696 case GLSL_SAMPLER_DIM_2D:
2697 inst->tex_target = (sampler_type->sampler_array)
2698 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2699 break;
2700 case GLSL_SAMPLER_DIM_3D:
2701 inst->tex_target = TEXTURE_3D_INDEX;
2702 break;
2703 case GLSL_SAMPLER_DIM_CUBE:
2704 inst->tex_target = TEXTURE_CUBE_INDEX;
2705 break;
2706 case GLSL_SAMPLER_DIM_RECT:
2707 inst->tex_target = TEXTURE_RECT_INDEX;
2708 break;
2709 case GLSL_SAMPLER_DIM_BUF:
2710 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2711 break;
2712 case GLSL_SAMPLER_DIM_EXTERNAL:
2713 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2714 break;
2715 default:
2716 assert(!"Should not get here.");
2717 }
2718
2719 this->result = result_src;
2720 }
2721
2722 void
2723 glsl_to_tgsi_visitor::visit(ir_return *ir)
2724 {
2725 if (ir->get_value()) {
2726 st_dst_reg l;
2727 int i;
2728
2729 assert(current_function);
2730
2731 ir->get_value()->accept(this);
2732 st_src_reg r = this->result;
2733
2734 l = st_dst_reg(current_function->return_reg);
2735
2736 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2737 emit(ir, TGSI_OPCODE_MOV, l, r);
2738 l.index++;
2739 r.index++;
2740 }
2741 }
2742
2743 emit(ir, TGSI_OPCODE_RET);
2744 }
2745
2746 void
2747 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2748 {
2749 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2750
2751 if (ir->condition) {
2752 ir->condition->accept(this);
2753 this->result.negate = ~this->result.negate;
2754 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2755 } else {
2756 emit(ir, TGSI_OPCODE_KILP);
2757 }
2758
2759 fp->UsesKill = GL_TRUE;
2760 }
2761
2762 void
2763 glsl_to_tgsi_visitor::visit(ir_if *ir)
2764 {
2765 glsl_to_tgsi_instruction *cond_inst, *if_inst;
2766 glsl_to_tgsi_instruction *prev_inst;
2767
2768 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2769
2770 ir->condition->accept(this);
2771 assert(this->result.file != PROGRAM_UNDEFINED);
2772
2773 if (this->options->EmitCondCodes) {
2774 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2775
2776 /* See if we actually generated any instruction for generating
2777 * the condition. If not, then cook up a move to a temp so we
2778 * have something to set cond_update on.
2779 */
2780 if (cond_inst == prev_inst) {
2781 st_src_reg temp = get_temp(glsl_type::bool_type);
2782 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result);
2783 }
2784 cond_inst->cond_update = GL_TRUE;
2785
2786 if_inst = emit(ir->condition, TGSI_OPCODE_IF);
2787 if_inst->dst.cond_mask = COND_NE;
2788 } else {
2789 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2790 }
2791
2792 this->instructions.push_tail(if_inst);
2793
2794 visit_exec_list(&ir->then_instructions, this);
2795
2796 if (!ir->else_instructions.is_empty()) {
2797 emit(ir->condition, TGSI_OPCODE_ELSE);
2798 visit_exec_list(&ir->else_instructions, this);
2799 }
2800
2801 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2802 }
2803
2804 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2805 {
2806 result.file = PROGRAM_UNDEFINED;
2807 next_temp = 1;
2808 next_signature_id = 1;
2809 num_immediates = 0;
2810 current_function = NULL;
2811 num_address_regs = 0;
2812 indirect_addr_temps = false;
2813 indirect_addr_consts = false;
2814 mem_ctx = ralloc_context(NULL);
2815 }
2816
2817 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2818 {
2819 ralloc_free(mem_ctx);
2820 }
2821
2822 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2823 {
2824 delete v;
2825 }
2826
2827
2828 /**
2829 * Count resources used by the given gpu program (number of texture
2830 * samplers, etc).
2831 */
2832 static void
2833 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2834 {
2835 v->samplers_used = 0;
2836
2837 foreach_iter(exec_list_iterator, iter, v->instructions) {
2838 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2839
2840 if (is_tex_instruction(inst->op)) {
2841 v->samplers_used |= 1 << inst->sampler;
2842
2843 prog->SamplerTargets[inst->sampler] =
2844 (gl_texture_index)inst->tex_target;
2845 if (inst->tex_shadow) {
2846 prog->ShadowSamplers |= 1 << inst->sampler;
2847 }
2848 }
2849 }
2850
2851 prog->SamplersUsed = v->samplers_used;
2852 _mesa_update_shader_textures_used(prog);
2853 }
2854
2855 static void
2856 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2857 struct gl_shader_program *shader_program,
2858 const char *name, const glsl_type *type,
2859 ir_constant *val)
2860 {
2861 if (type->is_record()) {
2862 ir_constant *field_constant;
2863
2864 field_constant = (ir_constant *)val->components.get_head();
2865
2866 for (unsigned int i = 0; i < type->length; i++) {
2867 const glsl_type *field_type = type->fields.structure[i].type;
2868 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2869 type->fields.structure[i].name);
2870 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2871 field_type, field_constant);
2872 field_constant = (ir_constant *)field_constant->next;
2873 }
2874 return;
2875 }
2876
2877 int loc = _mesa_get_uniform_location(ctx, shader_program, name);
2878
2879 if (loc == -1) {
2880 fail_link(shader_program,
2881 "Couldn't find uniform for initializer %s\n", name);
2882 return;
2883 }
2884
2885 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2886 ir_constant *element;
2887 const glsl_type *element_type;
2888 if (type->is_array()) {
2889 element = val->array_elements[i];
2890 element_type = type->fields.array;
2891 } else {
2892 element = val;
2893 element_type = type;
2894 }
2895
2896 void *values;
2897
2898 if (element_type->base_type == GLSL_TYPE_BOOL) {
2899 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2900 for (unsigned int j = 0; j < element_type->components(); j++) {
2901 conv[j] = element->value.b[j];
2902 }
2903 values = (void *)conv;
2904 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2905 element_type->vector_elements,
2906 1);
2907 } else {
2908 values = &element->value;
2909 }
2910
2911 if (element_type->is_matrix()) {
2912 _mesa_uniform_matrix(ctx, shader_program,
2913 element_type->matrix_columns,
2914 element_type->vector_elements,
2915 loc, 1, GL_FALSE, (GLfloat *)values);
2916 } else {
2917 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2918 values, element_type->gl_type);
2919 }
2920
2921 loc++;
2922 }
2923 }
2924
2925 /**
2926 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
2927 * are read from the given src in this instruction
2928 */
2929 static int
2930 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
2931 {
2932 int read_mask = 0, comp;
2933
2934 /* Now, given the src swizzle and the written channels, find which
2935 * components are actually read
2936 */
2937 for (comp = 0; comp < 4; ++comp) {
2938 const unsigned coord = GET_SWZ(src.swizzle, comp);
2939 ASSERT(coord < 4);
2940 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
2941 read_mask |= 1 << coord;
2942 }
2943
2944 return read_mask;
2945 }
2946
2947 /**
2948 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
2949 * instruction is the first instruction to write to register T0. There are
2950 * several lowering passes done in GLSL IR (e.g. branches and
2951 * relative addressing) that create a large number of conditional assignments
2952 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
2953 *
2954 * Here is why this conversion is safe:
2955 * CMP T0, T1 T2 T0 can be expanded to:
2956 * if (T1 < 0.0)
2957 * MOV T0, T2;
2958 * else
2959 * MOV T0, T0;
2960 *
2961 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
2962 * as the original program. If (T1 < 0.0) evaluates to false, executing
2963 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
2964 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
2965 * because any instruction that was going to read from T0 after this was going
2966 * to read a garbage value anyway.
2967 */
2968 void
2969 glsl_to_tgsi_visitor::simplify_cmp(void)
2970 {
2971 unsigned *tempWrites;
2972 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
2973
2974 tempWrites = new unsigned[MAX_TEMPS];
2975 if (!tempWrites) {
2976 return;
2977 }
2978 memset(tempWrites, 0, sizeof(tempWrites));
2979 memset(outputWrites, 0, sizeof(outputWrites));
2980
2981 foreach_iter(exec_list_iterator, iter, this->instructions) {
2982 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2983 unsigned prevWriteMask = 0;
2984
2985 /* Give up if we encounter relative addressing or flow control. */
2986 if (inst->dst.reladdr ||
2987 tgsi_get_opcode_info(inst->op)->is_branch ||
2988 inst->op == TGSI_OPCODE_BGNSUB ||
2989 inst->op == TGSI_OPCODE_CONT ||
2990 inst->op == TGSI_OPCODE_END ||
2991 inst->op == TGSI_OPCODE_ENDSUB ||
2992 inst->op == TGSI_OPCODE_RET) {
2993 break;
2994 }
2995
2996 if (inst->dst.file == PROGRAM_OUTPUT) {
2997 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
2998 prevWriteMask = outputWrites[inst->dst.index];
2999 outputWrites[inst->dst.index] |= inst->dst.writemask;
3000 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3001 assert(inst->dst.index < MAX_TEMPS);
3002 prevWriteMask = tempWrites[inst->dst.index];
3003 tempWrites[inst->dst.index] |= inst->dst.writemask;
3004 }
3005
3006 /* For a CMP to be considered a conditional write, the destination
3007 * register and source register two must be the same. */
3008 if (inst->op == TGSI_OPCODE_CMP
3009 && !(inst->dst.writemask & prevWriteMask)
3010 && inst->src[2].file == inst->dst.file
3011 && inst->src[2].index == inst->dst.index
3012 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3013
3014 inst->op = TGSI_OPCODE_MOV;
3015 inst->src[0] = inst->src[1];
3016 }
3017 }
3018
3019 delete [] tempWrites;
3020 }
3021
3022 /* Replaces all references to a temporary register index with another index. */
3023 void
3024 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3025 {
3026 foreach_iter(exec_list_iterator, iter, this->instructions) {
3027 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3028 unsigned j;
3029
3030 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3031 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3032 inst->src[j].index == index) {
3033 inst->src[j].index = new_index;
3034 }
3035 }
3036
3037 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3038 inst->dst.index = new_index;
3039 }
3040 }
3041 }
3042
3043 int
3044 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3045 {
3046 int depth = 0; /* loop depth */
3047 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3048 unsigned i = 0, j;
3049
3050 foreach_iter(exec_list_iterator, iter, this->instructions) {
3051 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3052
3053 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3054 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3055 inst->src[j].index == index) {
3056 return (depth == 0) ? i : loop_start;
3057 }
3058 }
3059
3060 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3061 if(depth++ == 0)
3062 loop_start = i;
3063 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3064 if (--depth == 0)
3065 loop_start = -1;
3066 }
3067 assert(depth >= 0);
3068
3069 i++;
3070 }
3071
3072 return -1;
3073 }
3074
3075 int
3076 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3077 {
3078 int depth = 0; /* loop depth */
3079 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3080 int i = 0;
3081
3082 foreach_iter(exec_list_iterator, iter, this->instructions) {
3083 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3084
3085 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3086 return (depth == 0) ? i : loop_start;
3087 }
3088
3089 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3090 if(depth++ == 0)
3091 loop_start = i;
3092 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3093 if (--depth == 0)
3094 loop_start = -1;
3095 }
3096 assert(depth >= 0);
3097
3098 i++;
3099 }
3100
3101 return -1;
3102 }
3103
3104 int
3105 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3106 {
3107 int depth = 0; /* loop depth */
3108 int last = -1; /* index of last instruction that reads the temporary */
3109 unsigned i = 0, j;
3110
3111 foreach_iter(exec_list_iterator, iter, this->instructions) {
3112 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3113
3114 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3115 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3116 inst->src[j].index == index) {
3117 last = (depth == 0) ? i : -2;
3118 }
3119 }
3120
3121 if (inst->op == TGSI_OPCODE_BGNLOOP)
3122 depth++;
3123 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3124 if (--depth == 0 && last == -2)
3125 last = i;
3126 assert(depth >= 0);
3127
3128 i++;
3129 }
3130
3131 assert(last >= -1);
3132 return last;
3133 }
3134
3135 int
3136 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3137 {
3138 int depth = 0; /* loop depth */
3139 int last = -1; /* index of last instruction that writes to the temporary */
3140 int i = 0;
3141
3142 foreach_iter(exec_list_iterator, iter, this->instructions) {
3143 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3144
3145 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3146 last = (depth == 0) ? i : -2;
3147
3148 if (inst->op == TGSI_OPCODE_BGNLOOP)
3149 depth++;
3150 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3151 if (--depth == 0 && last == -2)
3152 last = i;
3153 assert(depth >= 0);
3154
3155 i++;
3156 }
3157
3158 assert(last >= -1);
3159 return last;
3160 }
3161
3162 /*
3163 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3164 * channels for copy propagation and updates following instructions to
3165 * use the original versions.
3166 *
3167 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3168 * will occur. As an example, a TXP production before this pass:
3169 *
3170 * 0: MOV TEMP[1], INPUT[4].xyyy;
3171 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3172 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3173 *
3174 * and after:
3175 *
3176 * 0: MOV TEMP[1], INPUT[4].xyyy;
3177 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3178 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3179 *
3180 * which allows for dead code elimination on TEMP[1]'s writes.
3181 */
3182 void
3183 glsl_to_tgsi_visitor::copy_propagate(void)
3184 {
3185 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3186 glsl_to_tgsi_instruction *,
3187 this->next_temp * 4);
3188 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3189 int level = 0;
3190
3191 foreach_iter(exec_list_iterator, iter, this->instructions) {
3192 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3193
3194 assert(inst->dst.file != PROGRAM_TEMPORARY
3195 || inst->dst.index < this->next_temp);
3196
3197 /* First, do any copy propagation possible into the src regs. */
3198 for (int r = 0; r < 3; r++) {
3199 glsl_to_tgsi_instruction *first = NULL;
3200 bool good = true;
3201 int acp_base = inst->src[r].index * 4;
3202
3203 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3204 inst->src[r].reladdr)
3205 continue;
3206
3207 /* See if we can find entries in the ACP consisting of MOVs
3208 * from the same src register for all the swizzled channels
3209 * of this src register reference.
3210 */
3211 for (int i = 0; i < 4; i++) {
3212 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3213 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3214
3215 if (!copy_chan) {
3216 good = false;
3217 break;
3218 }
3219
3220 assert(acp_level[acp_base + src_chan] <= level);
3221
3222 if (!first) {
3223 first = copy_chan;
3224 } else {
3225 if (first->src[0].file != copy_chan->src[0].file ||
3226 first->src[0].index != copy_chan->src[0].index) {
3227 good = false;
3228 break;
3229 }
3230 }
3231 }
3232
3233 if (good) {
3234 /* We've now validated that we can copy-propagate to
3235 * replace this src register reference. Do it.
3236 */
3237 inst->src[r].file = first->src[0].file;
3238 inst->src[r].index = first->src[0].index;
3239
3240 int swizzle = 0;
3241 for (int i = 0; i < 4; i++) {
3242 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3243 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3244 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3245 (3 * i));
3246 }
3247 inst->src[r].swizzle = swizzle;
3248 }
3249 }
3250
3251 switch (inst->op) {
3252 case TGSI_OPCODE_BGNLOOP:
3253 case TGSI_OPCODE_ENDLOOP:
3254 /* End of a basic block, clear the ACP entirely. */
3255 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3256 break;
3257
3258 case TGSI_OPCODE_IF:
3259 ++level;
3260 break;
3261
3262 case TGSI_OPCODE_ENDIF:
3263 case TGSI_OPCODE_ELSE:
3264 /* Clear all channels written inside the block from the ACP, but
3265 * leaving those that were not touched.
3266 */
3267 for (int r = 0; r < this->next_temp; r++) {
3268 for (int c = 0; c < 4; c++) {
3269 if (!acp[4 * r + c])
3270 continue;
3271
3272 if (acp_level[4 * r + c] >= level)
3273 acp[4 * r + c] = NULL;
3274 }
3275 }
3276 if (inst->op == TGSI_OPCODE_ENDIF)
3277 --level;
3278 break;
3279
3280 default:
3281 /* Continuing the block, clear any written channels from
3282 * the ACP.
3283 */
3284 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3285 /* Any temporary might be written, so no copy propagation
3286 * across this instruction.
3287 */
3288 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3289 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3290 inst->dst.reladdr) {
3291 /* Any output might be written, so no copy propagation
3292 * from outputs across this instruction.
3293 */
3294 for (int r = 0; r < this->next_temp; r++) {
3295 for (int c = 0; c < 4; c++) {
3296 if (!acp[4 * r + c])
3297 continue;
3298
3299 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3300 acp[4 * r + c] = NULL;
3301 }
3302 }
3303 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3304 inst->dst.file == PROGRAM_OUTPUT) {
3305 /* Clear where it's used as dst. */
3306 if (inst->dst.file == PROGRAM_TEMPORARY) {
3307 for (int c = 0; c < 4; c++) {
3308 if (inst->dst.writemask & (1 << c)) {
3309 acp[4 * inst->dst.index + c] = NULL;
3310 }
3311 }
3312 }
3313
3314 /* Clear where it's used as src. */
3315 for (int r = 0; r < this->next_temp; r++) {
3316 for (int c = 0; c < 4; c++) {
3317 if (!acp[4 * r + c])
3318 continue;
3319
3320 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3321
3322 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3323 acp[4 * r + c]->src[0].index == inst->dst.index &&
3324 inst->dst.writemask & (1 << src_chan))
3325 {
3326 acp[4 * r + c] = NULL;
3327 }
3328 }
3329 }
3330 }
3331 break;
3332 }
3333
3334 /* If this is a copy, add it to the ACP. */
3335 if (inst->op == TGSI_OPCODE_MOV &&
3336 inst->dst.file == PROGRAM_TEMPORARY &&
3337 !inst->dst.reladdr &&
3338 !inst->saturate &&
3339 !inst->src[0].reladdr &&
3340 !inst->src[0].negate) {
3341 for (int i = 0; i < 4; i++) {
3342 if (inst->dst.writemask & (1 << i)) {
3343 acp[4 * inst->dst.index + i] = inst;
3344 acp_level[4 * inst->dst.index + i] = level;
3345 }
3346 }
3347 }
3348 }
3349
3350 ralloc_free(acp_level);
3351 ralloc_free(acp);
3352 }
3353
3354 /*
3355 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3356 *
3357 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3358 * will occur. As an example, a TXP production after copy propagation but
3359 * before this pass:
3360 *
3361 * 0: MOV TEMP[1], INPUT[4].xyyy;
3362 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3363 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3364 *
3365 * and after this pass:
3366 *
3367 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3368 *
3369 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3370 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3371 */
3372 void
3373 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3374 {
3375 int i;
3376
3377 for (i=0; i < this->next_temp; i++) {
3378 int last_read = get_last_temp_read(i);
3379 int j = 0;
3380
3381 foreach_iter(exec_list_iterator, iter, this->instructions) {
3382 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3383
3384 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3385 j > last_read)
3386 {
3387 iter.remove();
3388 delete inst;
3389 }
3390
3391 j++;
3392 }
3393 }
3394 }
3395
3396 /*
3397 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3398 * code elimination. This is less primitive than eliminate_dead_code(), as it
3399 * is per-channel and can detect consecutive writes without a read between them
3400 * as dead code. However, there is some dead code that can be eliminated by
3401 * eliminate_dead_code() but not this function - for example, this function
3402 * cannot eliminate an instruction writing to a register that is never read and
3403 * is the only instruction writing to that register.
3404 *
3405 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3406 * will occur.
3407 */
3408 int
3409 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3410 {
3411 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3412 glsl_to_tgsi_instruction *,
3413 this->next_temp * 4);
3414 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3415 int level = 0;
3416 int removed = 0;
3417
3418 foreach_iter(exec_list_iterator, iter, this->instructions) {
3419 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3420
3421 assert(inst->dst.file != PROGRAM_TEMPORARY
3422 || inst->dst.index < this->next_temp);
3423
3424 switch (inst->op) {
3425 case TGSI_OPCODE_BGNLOOP:
3426 case TGSI_OPCODE_ENDLOOP:
3427 case TGSI_OPCODE_CONT:
3428 case TGSI_OPCODE_BRK:
3429 /* End of a basic block, clear the write array entirely.
3430 *
3431 * This keeps us from killing dead code when the writes are
3432 * on either side of a loop, even when the register isn't touched
3433 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3434 * dead code of this type, so it shouldn't make a difference as long as
3435 * the dead code elimination pass in the GLSL compiler does its job.
3436 */
3437 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3438 break;
3439
3440 case TGSI_OPCODE_ENDIF:
3441 case TGSI_OPCODE_ELSE:
3442 /* Promote the recorded level of all channels written inside the
3443 * preceding if or else block to the level above the if/else block.
3444 */
3445 for (int r = 0; r < this->next_temp; r++) {
3446 for (int c = 0; c < 4; c++) {
3447 if (!writes[4 * r + c])
3448 continue;
3449
3450 if (write_level[4 * r + c] == level)
3451 write_level[4 * r + c] = level-1;
3452 }
3453 }
3454
3455 if(inst->op == TGSI_OPCODE_ENDIF)
3456 --level;
3457
3458 break;
3459
3460 case TGSI_OPCODE_IF:
3461 ++level;
3462 /* fallthrough to default case to mark the condition as read */
3463
3464 default:
3465 /* Continuing the block, clear any channels from the write array that
3466 * are read by this instruction.
3467 */
3468 for (unsigned i = 0; i < Elements(inst->src); i++) {
3469 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3470 /* Any temporary might be read, so no dead code elimination
3471 * across this instruction.
3472 */
3473 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3474 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3475 /* Clear where it's used as src. */
3476 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3477 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3478 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3479 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3480
3481 for (int c = 0; c < 4; c++) {
3482 if (src_chans & (1 << c)) {
3483 writes[4 * inst->src[i].index + c] = NULL;
3484 }
3485 }
3486 }
3487 }
3488 break;
3489 }
3490
3491 /* If this instruction writes to a temporary, add it to the write array.
3492 * If there is already an instruction in the write array for one or more
3493 * of the channels, flag that channel write as dead.
3494 */
3495 if (inst->dst.file == PROGRAM_TEMPORARY &&
3496 !inst->dst.reladdr &&
3497 !inst->saturate) {
3498 for (int c = 0; c < 4; c++) {
3499 if (inst->dst.writemask & (1 << c)) {
3500 if (writes[4 * inst->dst.index + c]) {
3501 if (write_level[4 * inst->dst.index + c] < level)
3502 continue;
3503 else
3504 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3505 }
3506 writes[4 * inst->dst.index + c] = inst;
3507 write_level[4 * inst->dst.index + c] = level;
3508 }
3509 }
3510 }
3511 }
3512
3513 /* Anything still in the write array at this point is dead code. */
3514 for (int r = 0; r < this->next_temp; r++) {
3515 for (int c = 0; c < 4; c++) {
3516 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3517 if (inst)
3518 inst->dead_mask |= (1 << c);
3519 }
3520 }
3521
3522 /* Now actually remove the instructions that are completely dead and update
3523 * the writemask of other instructions with dead channels.
3524 */
3525 foreach_iter(exec_list_iterator, iter, this->instructions) {
3526 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3527
3528 if (!inst->dead_mask || !inst->dst.writemask)
3529 continue;
3530 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3531 iter.remove();
3532 delete inst;
3533 removed++;
3534 } else
3535 inst->dst.writemask &= ~(inst->dead_mask);
3536 }
3537
3538 ralloc_free(write_level);
3539 ralloc_free(writes);
3540
3541 return removed;
3542 }
3543
3544 /* Merges temporary registers together where possible to reduce the number of
3545 * registers needed to run a program.
3546 *
3547 * Produces optimal code only after copy propagation and dead code elimination
3548 * have been run. */
3549 void
3550 glsl_to_tgsi_visitor::merge_registers(void)
3551 {
3552 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3553 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3554 int i, j;
3555
3556 /* Read the indices of the last read and first write to each temp register
3557 * into an array so that we don't have to traverse the instruction list as
3558 * much. */
3559 for (i=0; i < this->next_temp; i++) {
3560 last_reads[i] = get_last_temp_read(i);
3561 first_writes[i] = get_first_temp_write(i);
3562 }
3563
3564 /* Start looking for registers with non-overlapping usages that can be
3565 * merged together. */
3566 for (i=0; i < this->next_temp; i++) {
3567 /* Don't touch unused registers. */
3568 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3569
3570 for (j=0; j < this->next_temp; j++) {
3571 /* Don't touch unused registers. */
3572 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3573
3574 /* We can merge the two registers if the first write to j is after or
3575 * in the same instruction as the last read from i. Note that the
3576 * register at index i will always be used earlier or at the same time
3577 * as the register at index j. */
3578 if (first_writes[i] <= first_writes[j] &&
3579 last_reads[i] <= first_writes[j])
3580 {
3581 rename_temp_register(j, i); /* Replace all references to j with i.*/
3582
3583 /* Update the first_writes and last_reads arrays with the new
3584 * values for the merged register index, and mark the newly unused
3585 * register index as such. */
3586 last_reads[i] = last_reads[j];
3587 first_writes[j] = -1;
3588 last_reads[j] = -1;
3589 }
3590 }
3591 }
3592
3593 ralloc_free(last_reads);
3594 ralloc_free(first_writes);
3595 }
3596
3597 /* Reassign indices to temporary registers by reusing unused indices created
3598 * by optimization passes. */
3599 void
3600 glsl_to_tgsi_visitor::renumber_registers(void)
3601 {
3602 int i = 0;
3603 int new_index = 0;
3604
3605 for (i=0; i < this->next_temp; i++) {
3606 if (get_first_temp_read(i) < 0) continue;
3607 if (i != new_index)
3608 rename_temp_register(i, new_index);
3609 new_index++;
3610 }
3611
3612 this->next_temp = new_index;
3613 }
3614
3615 /**
3616 * Returns a fragment program which implements the current pixel transfer ops.
3617 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3618 */
3619 extern "C" void
3620 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3621 glsl_to_tgsi_visitor *original,
3622 int scale_and_bias, int pixel_maps)
3623 {
3624 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3625 struct st_context *st = st_context(original->ctx);
3626 struct gl_program *prog = &fp->Base.Base;
3627 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3628 st_src_reg coord, src0;
3629 st_dst_reg dst0;
3630 glsl_to_tgsi_instruction *inst;
3631
3632 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3633 v->ctx = original->ctx;
3634 v->prog = prog;
3635 v->shader_program = NULL;
3636 v->glsl_version = original->glsl_version;
3637 v->native_integers = original->native_integers;
3638 v->options = original->options;
3639 v->next_temp = original->next_temp;
3640 v->num_address_regs = original->num_address_regs;
3641 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3642 v->indirect_addr_temps = original->indirect_addr_temps;
3643 v->indirect_addr_consts = original->indirect_addr_consts;
3644 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3645
3646 /*
3647 * Get initial pixel color from the texture.
3648 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3649 */
3650 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3651 src0 = v->get_temp(glsl_type::vec4_type);
3652 dst0 = st_dst_reg(src0);
3653 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3654 inst->sampler = 0;
3655 inst->tex_target = TEXTURE_2D_INDEX;
3656
3657 prog->InputsRead |= FRAG_BIT_TEX0;
3658 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3659 v->samplers_used |= (1 << 0);
3660
3661 if (scale_and_bias) {
3662 static const gl_state_index scale_state[STATE_LENGTH] =
3663 { STATE_INTERNAL, STATE_PT_SCALE,
3664 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3665 static const gl_state_index bias_state[STATE_LENGTH] =
3666 { STATE_INTERNAL, STATE_PT_BIAS,
3667 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3668 GLint scale_p, bias_p;
3669 st_src_reg scale, bias;
3670
3671 scale_p = _mesa_add_state_reference(params, scale_state);
3672 bias_p = _mesa_add_state_reference(params, bias_state);
3673
3674 /* MAD colorTemp, colorTemp, scale, bias; */
3675 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3676 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3677 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3678 }
3679
3680 if (pixel_maps) {
3681 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3682 st_dst_reg temp_dst = st_dst_reg(temp);
3683
3684 assert(st->pixel_xfer.pixelmap_texture);
3685
3686 /* With a little effort, we can do four pixel map look-ups with
3687 * two TEX instructions:
3688 */
3689
3690 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3691 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3692 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3693 inst->sampler = 1;
3694 inst->tex_target = TEXTURE_2D_INDEX;
3695
3696 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3697 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3698 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3699 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3700 inst->sampler = 1;
3701 inst->tex_target = TEXTURE_2D_INDEX;
3702
3703 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3704 v->samplers_used |= (1 << 1);
3705
3706 /* MOV colorTemp, temp; */
3707 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3708 }
3709
3710 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3711 * new visitor. */
3712 foreach_iter(exec_list_iterator, iter, original->instructions) {
3713 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3714 glsl_to_tgsi_instruction *newinst;
3715 st_src_reg src_regs[3];
3716
3717 if (inst->dst.file == PROGRAM_OUTPUT)
3718 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3719
3720 for (int i=0; i<3; i++) {
3721 src_regs[i] = inst->src[i];
3722 if (src_regs[i].file == PROGRAM_INPUT &&
3723 src_regs[i].index == FRAG_ATTRIB_COL0)
3724 {
3725 src_regs[i].file = PROGRAM_TEMPORARY;
3726 src_regs[i].index = src0.index;
3727 }
3728 else if (src_regs[i].file == PROGRAM_INPUT)
3729 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3730 }
3731
3732 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3733 newinst->tex_target = inst->tex_target;
3734 }
3735
3736 /* Make modifications to fragment program info. */
3737 prog->Parameters = _mesa_combine_parameter_lists(params,
3738 original->prog->Parameters);
3739 _mesa_free_parameter_list(params);
3740 count_resources(v, prog);
3741 fp->glsl_to_tgsi = v;
3742 }
3743
3744 /**
3745 * Make fragment program for glBitmap:
3746 * Sample the texture and kill the fragment if the bit is 0.
3747 * This program will be combined with the user's fragment program.
3748 *
3749 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3750 */
3751 extern "C" void
3752 get_bitmap_visitor(struct st_fragment_program *fp,
3753 glsl_to_tgsi_visitor *original, int samplerIndex)
3754 {
3755 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3756 struct st_context *st = st_context(original->ctx);
3757 struct gl_program *prog = &fp->Base.Base;
3758 st_src_reg coord, src0;
3759 st_dst_reg dst0;
3760 glsl_to_tgsi_instruction *inst;
3761
3762 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3763 v->ctx = original->ctx;
3764 v->prog = prog;
3765 v->shader_program = NULL;
3766 v->glsl_version = original->glsl_version;
3767 v->native_integers = original->native_integers;
3768 v->options = original->options;
3769 v->next_temp = original->next_temp;
3770 v->num_address_regs = original->num_address_regs;
3771 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3772 v->indirect_addr_temps = original->indirect_addr_temps;
3773 v->indirect_addr_consts = original->indirect_addr_consts;
3774 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3775
3776 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3777 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3778 src0 = v->get_temp(glsl_type::vec4_type);
3779 dst0 = st_dst_reg(src0);
3780 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3781 inst->sampler = samplerIndex;
3782 inst->tex_target = TEXTURE_2D_INDEX;
3783
3784 prog->InputsRead |= FRAG_BIT_TEX0;
3785 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3786 v->samplers_used |= (1 << samplerIndex);
3787
3788 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3789 src0.negate = NEGATE_XYZW;
3790 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3791 src0.swizzle = SWIZZLE_XXXX;
3792 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3793
3794 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3795 * new visitor. */
3796 foreach_iter(exec_list_iterator, iter, original->instructions) {
3797 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3798 glsl_to_tgsi_instruction *newinst;
3799 st_src_reg src_regs[3];
3800
3801 if (inst->dst.file == PROGRAM_OUTPUT)
3802 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3803
3804 for (int i=0; i<3; i++) {
3805 src_regs[i] = inst->src[i];
3806 if (src_regs[i].file == PROGRAM_INPUT)
3807 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3808 }
3809
3810 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3811 newinst->tex_target = inst->tex_target;
3812 }
3813
3814 /* Make modifications to fragment program info. */
3815 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3816 count_resources(v, prog);
3817 fp->glsl_to_tgsi = v;
3818 }
3819
3820 /* ------------------------- TGSI conversion stuff -------------------------- */
3821 struct label {
3822 unsigned branch_target;
3823 unsigned token;
3824 };
3825
3826 /**
3827 * Intermediate state used during shader translation.
3828 */
3829 struct st_translate {
3830 struct ureg_program *ureg;
3831
3832 struct ureg_dst temps[MAX_TEMPS];
3833 struct ureg_src *constants;
3834 struct ureg_src *immediates;
3835 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3836 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3837 struct ureg_dst address[1];
3838 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3839 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3840
3841 /* Extra info for handling point size clamping in vertex shader */
3842 struct ureg_dst pointSizeResult; /**< Actual point size output register */
3843 struct ureg_src pointSizeConst; /**< Point size range constant register */
3844 GLint pointSizeOutIndex; /**< Temp point size output register */
3845 GLboolean prevInstWrotePointSize;
3846
3847 const GLuint *inputMapping;
3848 const GLuint *outputMapping;
3849
3850 /* For every instruction that contains a label (eg CALL), keep
3851 * details so that we can go back afterwards and emit the correct
3852 * tgsi instruction number for each label.
3853 */
3854 struct label *labels;
3855 unsigned labels_size;
3856 unsigned labels_count;
3857
3858 /* Keep a record of the tgsi instruction number that each mesa
3859 * instruction starts at, will be used to fix up labels after
3860 * translation.
3861 */
3862 unsigned *insn;
3863 unsigned insn_size;
3864 unsigned insn_count;
3865
3866 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3867
3868 boolean error;
3869 };
3870
3871 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3872 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
3873 TGSI_SEMANTIC_FACE,
3874 TGSI_SEMANTIC_VERTEXID,
3875 TGSI_SEMANTIC_INSTANCEID
3876 };
3877
3878 /**
3879 * Make note of a branch to a label in the TGSI code.
3880 * After we've emitted all instructions, we'll go over the list
3881 * of labels built here and patch the TGSI code with the actual
3882 * location of each label.
3883 */
3884 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
3885 {
3886 unsigned i;
3887
3888 if (t->labels_count + 1 >= t->labels_size) {
3889 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
3890 t->labels = (struct label *)realloc(t->labels,
3891 t->labels_size * sizeof(struct label));
3892 if (t->labels == NULL) {
3893 static unsigned dummy;
3894 t->error = TRUE;
3895 return &dummy;
3896 }
3897 }
3898
3899 i = t->labels_count++;
3900 t->labels[i].branch_target = branch_target;
3901 return &t->labels[i].token;
3902 }
3903
3904 /**
3905 * Called prior to emitting the TGSI code for each instruction.
3906 * Allocate additional space for instructions if needed.
3907 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
3908 * the next TGSI instruction.
3909 */
3910 static void set_insn_start(struct st_translate *t, unsigned start)
3911 {
3912 if (t->insn_count + 1 >= t->insn_size) {
3913 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
3914 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
3915 if (t->insn == NULL) {
3916 t->error = TRUE;
3917 return;
3918 }
3919 }
3920
3921 t->insn[t->insn_count++] = start;
3922 }
3923
3924 /**
3925 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
3926 */
3927 static struct ureg_src
3928 emit_immediate(struct st_translate *t,
3929 gl_constant_value values[4],
3930 int type, int size)
3931 {
3932 struct ureg_program *ureg = t->ureg;
3933
3934 switch(type)
3935 {
3936 case GL_FLOAT:
3937 return ureg_DECL_immediate(ureg, &values[0].f, size);
3938 case GL_INT:
3939 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
3940 case GL_UNSIGNED_INT:
3941 case GL_BOOL:
3942 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
3943 default:
3944 assert(!"should not get here - type must be float, int, uint, or bool");
3945 return ureg_src_undef();
3946 }
3947 }
3948
3949 /**
3950 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
3951 */
3952 static struct ureg_dst
3953 dst_register(struct st_translate *t,
3954 gl_register_file file,
3955 GLuint index)
3956 {
3957 switch(file) {
3958 case PROGRAM_UNDEFINED:
3959 return ureg_dst_undef();
3960
3961 case PROGRAM_TEMPORARY:
3962 if (ureg_dst_is_undef(t->temps[index]))
3963 t->temps[index] = ureg_DECL_temporary(t->ureg);
3964
3965 return t->temps[index];
3966
3967 case PROGRAM_OUTPUT:
3968 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
3969 t->prevInstWrotePointSize = GL_TRUE;
3970
3971 if (t->procType == TGSI_PROCESSOR_VERTEX)
3972 assert(index < VERT_RESULT_MAX);
3973 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
3974 assert(index < FRAG_RESULT_MAX);
3975 else
3976 assert(index < GEOM_RESULT_MAX);
3977
3978 assert(t->outputMapping[index] < Elements(t->outputs));
3979
3980 return t->outputs[t->outputMapping[index]];
3981
3982 case PROGRAM_ADDRESS:
3983 return t->address[index];
3984
3985 default:
3986 assert(!"unknown dst register file");
3987 return ureg_dst_undef();
3988 }
3989 }
3990
3991 /**
3992 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
3993 */
3994 static struct ureg_src
3995 src_register(struct st_translate *t,
3996 gl_register_file file,
3997 GLuint index)
3998 {
3999 switch(file) {
4000 case PROGRAM_UNDEFINED:
4001 return ureg_src_undef();
4002
4003 case PROGRAM_TEMPORARY:
4004 assert(index >= 0);
4005 assert(index < Elements(t->temps));
4006 if (ureg_dst_is_undef(t->temps[index]))
4007 t->temps[index] = ureg_DECL_temporary(t->ureg);
4008 return ureg_src(t->temps[index]);
4009
4010 case PROGRAM_NAMED_PARAM:
4011 case PROGRAM_ENV_PARAM:
4012 case PROGRAM_LOCAL_PARAM:
4013 case PROGRAM_UNIFORM:
4014 assert(index >= 0);
4015 return t->constants[index];
4016 case PROGRAM_STATE_VAR:
4017 case PROGRAM_CONSTANT: /* ie, immediate */
4018 if (index < 0)
4019 return ureg_DECL_constant(t->ureg, 0);
4020 else
4021 return t->constants[index];
4022
4023 case PROGRAM_IMMEDIATE:
4024 return t->immediates[index];
4025
4026 case PROGRAM_INPUT:
4027 assert(t->inputMapping[index] < Elements(t->inputs));
4028 return t->inputs[t->inputMapping[index]];
4029
4030 case PROGRAM_OUTPUT:
4031 assert(t->outputMapping[index] < Elements(t->outputs));
4032 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4033
4034 case PROGRAM_ADDRESS:
4035 return ureg_src(t->address[index]);
4036
4037 case PROGRAM_SYSTEM_VALUE:
4038 assert(index < Elements(t->systemValues));
4039 return t->systemValues[index];
4040
4041 default:
4042 assert(!"unknown src register file");
4043 return ureg_src_undef();
4044 }
4045 }
4046
4047 /**
4048 * Create a TGSI ureg_dst register from an st_dst_reg.
4049 */
4050 static struct ureg_dst
4051 translate_dst(struct st_translate *t,
4052 const st_dst_reg *dst_reg,
4053 bool saturate)
4054 {
4055 struct ureg_dst dst = dst_register(t,
4056 dst_reg->file,
4057 dst_reg->index);
4058
4059 dst = ureg_writemask(dst, dst_reg->writemask);
4060
4061 if (saturate)
4062 dst = ureg_saturate(dst);
4063
4064 if (dst_reg->reladdr != NULL)
4065 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4066
4067 return dst;
4068 }
4069
4070 /**
4071 * Create a TGSI ureg_src register from an st_src_reg.
4072 */
4073 static struct ureg_src
4074 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4075 {
4076 struct ureg_src src = src_register(t, src_reg->file, src_reg->index);
4077
4078 src = ureg_swizzle(src,
4079 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4080 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4081 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4082 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4083
4084 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4085 src = ureg_negate(src);
4086
4087 if (src_reg->reladdr != NULL) {
4088 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4089 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4090 * set the bit for src.Negate. So we have to do the operation manually
4091 * here to work around the compiler's problems. */
4092 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4093 struct ureg_src addr = ureg_src(t->address[0]);
4094 src.Indirect = 1;
4095 src.IndirectFile = addr.File;
4096 src.IndirectIndex = addr.Index;
4097 src.IndirectSwizzle = addr.SwizzleX;
4098
4099 if (src_reg->file != PROGRAM_INPUT &&
4100 src_reg->file != PROGRAM_OUTPUT) {
4101 /* If src_reg->index was negative, it was set to zero in
4102 * src_register(). Reassign it now. But don't do this
4103 * for input/output regs since they get remapped while
4104 * const buffers don't.
4105 */
4106 src.Index = src_reg->index;
4107 }
4108 }
4109
4110 return src;
4111 }
4112
4113 static struct tgsi_texture_offset
4114 translate_tex_offset(struct st_translate *t,
4115 const struct tgsi_texture_offset *in_offset)
4116 {
4117 struct tgsi_texture_offset offset;
4118
4119 assert(in_offset->File == PROGRAM_IMMEDIATE);
4120
4121 offset.File = TGSI_FILE_IMMEDIATE;
4122 offset.Index = in_offset->Index;
4123 offset.SwizzleX = in_offset->SwizzleX;
4124 offset.SwizzleY = in_offset->SwizzleY;
4125 offset.SwizzleZ = in_offset->SwizzleZ;
4126
4127 return offset;
4128 }
4129
4130 static void
4131 compile_tgsi_instruction(struct st_translate *t,
4132 const glsl_to_tgsi_instruction *inst)
4133 {
4134 struct ureg_program *ureg = t->ureg;
4135 GLuint i;
4136 struct ureg_dst dst[1];
4137 struct ureg_src src[4];
4138 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4139
4140 unsigned num_dst;
4141 unsigned num_src;
4142
4143 num_dst = num_inst_dst_regs(inst->op);
4144 num_src = num_inst_src_regs(inst->op);
4145
4146 if (num_dst)
4147 dst[0] = translate_dst(t,
4148 &inst->dst,
4149 inst->saturate);
4150
4151 for (i = 0; i < num_src; i++)
4152 src[i] = translate_src(t, &inst->src[i]);
4153
4154 switch(inst->op) {
4155 case TGSI_OPCODE_BGNLOOP:
4156 case TGSI_OPCODE_CAL:
4157 case TGSI_OPCODE_ELSE:
4158 case TGSI_OPCODE_ENDLOOP:
4159 case TGSI_OPCODE_IF:
4160 assert(num_dst == 0);
4161 ureg_label_insn(ureg,
4162 inst->op,
4163 src, num_src,
4164 get_label(t,
4165 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4166 return;
4167
4168 case TGSI_OPCODE_TEX:
4169 case TGSI_OPCODE_TXB:
4170 case TGSI_OPCODE_TXD:
4171 case TGSI_OPCODE_TXL:
4172 case TGSI_OPCODE_TXP:
4173 case TGSI_OPCODE_TXQ:
4174 case TGSI_OPCODE_TXF:
4175 src[num_src++] = t->samplers[inst->sampler];
4176 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4177 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4178 }
4179 ureg_tex_insn(ureg,
4180 inst->op,
4181 dst, num_dst,
4182 translate_texture_target(inst->tex_target, inst->tex_shadow),
4183 texoffsets, inst->tex_offset_num_offset,
4184 src, num_src);
4185 return;
4186
4187 case TGSI_OPCODE_SCS:
4188 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4189 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4190 break;
4191
4192 default:
4193 ureg_insn(ureg,
4194 inst->op,
4195 dst, num_dst,
4196 src, num_src);
4197 break;
4198 }
4199 }
4200
4201 /**
4202 * Emit the TGSI instructions for inverting and adjusting WPOS.
4203 * This code is unavoidable because it also depends on whether
4204 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4205 */
4206 static void
4207 emit_wpos_adjustment( struct st_translate *t,
4208 const struct gl_program *program,
4209 boolean invert,
4210 GLfloat adjX, GLfloat adjY[2])
4211 {
4212 struct ureg_program *ureg = t->ureg;
4213
4214 /* Fragment program uses fragment position input.
4215 * Need to replace instances of INPUT[WPOS] with temp T
4216 * where T = INPUT[WPOS] by y is inverted.
4217 */
4218 static const gl_state_index wposTransformState[STATE_LENGTH]
4219 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4220 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4221
4222 /* XXX: note we are modifying the incoming shader here! Need to
4223 * do this before emitting the constant decls below, or this
4224 * will be missed:
4225 */
4226 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4227 wposTransformState);
4228
4229 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4230 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4231 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4232
4233 /* First, apply the coordinate shift: */
4234 if (adjX || adjY[0] || adjY[1]) {
4235 if (adjY[0] != adjY[1]) {
4236 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4237 * depending on whether inversion is actually going to be applied
4238 * or not, which is determined by testing against the inversion
4239 * state variable used below, which will be either +1 or -1.
4240 */
4241 struct ureg_dst adj_temp = ureg_DECL_temporary(ureg);
4242
4243 ureg_CMP(ureg, adj_temp,
4244 ureg_scalar(wpostrans, invert ? 2 : 0),
4245 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4246 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4247 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4248 } else {
4249 ureg_ADD(ureg, wpos_temp, wpos_input,
4250 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4251 }
4252 wpos_input = ureg_src(wpos_temp);
4253 } else {
4254 /* MOV wpos_temp, input[wpos]
4255 */
4256 ureg_MOV( ureg, wpos_temp, wpos_input );
4257 }
4258
4259 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4260 * inversion/identity, or the other way around if we're drawing to an FBO.
4261 */
4262 if (invert) {
4263 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4264 */
4265 ureg_MAD( ureg,
4266 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4267 wpos_input,
4268 ureg_scalar(wpostrans, 0),
4269 ureg_scalar(wpostrans, 1));
4270 } else {
4271 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4272 */
4273 ureg_MAD( ureg,
4274 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4275 wpos_input,
4276 ureg_scalar(wpostrans, 2),
4277 ureg_scalar(wpostrans, 3));
4278 }
4279
4280 /* Use wpos_temp as position input from here on:
4281 */
4282 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4283 }
4284
4285
4286 /**
4287 * Emit fragment position/ooordinate code.
4288 */
4289 static void
4290 emit_wpos(struct st_context *st,
4291 struct st_translate *t,
4292 const struct gl_program *program,
4293 struct ureg_program *ureg)
4294 {
4295 const struct gl_fragment_program *fp =
4296 (const struct gl_fragment_program *) program;
4297 struct pipe_screen *pscreen = st->pipe->screen;
4298 GLfloat adjX = 0.0f;
4299 GLfloat adjY[2] = { 0.0f, 0.0f };
4300 boolean invert = FALSE;
4301
4302 /* Query the pixel center conventions supported by the pipe driver and set
4303 * adjX, adjY to help out if it cannot handle the requested one internally.
4304 *
4305 * The bias of the y-coordinate depends on whether y-inversion takes place
4306 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4307 * drawing to an FBO (causes additional inversion), and whether the the pipe
4308 * driver origin and the requested origin differ (the latter condition is
4309 * stored in the 'invert' variable).
4310 *
4311 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4312 *
4313 * center shift only:
4314 * i -> h: +0.5
4315 * h -> i: -0.5
4316 *
4317 * inversion only:
4318 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4319 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4320 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4321 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4322 *
4323 * inversion and center shift:
4324 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4325 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4326 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4327 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4328 */
4329 if (fp->OriginUpperLeft) {
4330 /* Fragment shader wants origin in upper-left */
4331 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4332 /* the driver supports upper-left origin */
4333 }
4334 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4335 /* the driver supports lower-left origin, need to invert Y */
4336 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4337 invert = TRUE;
4338 }
4339 else
4340 assert(0);
4341 }
4342 else {
4343 /* Fragment shader wants origin in lower-left */
4344 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4345 /* the driver supports lower-left origin */
4346 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4347 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4348 /* the driver supports upper-left origin, need to invert Y */
4349 invert = TRUE;
4350 else
4351 assert(0);
4352 }
4353
4354 if (fp->PixelCenterInteger) {
4355 /* Fragment shader wants pixel center integer */
4356 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4357 /* the driver supports pixel center integer */
4358 adjY[1] = 1.0f;
4359 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4360 }
4361 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4362 /* the driver supports pixel center half integer, need to bias X,Y */
4363 adjX = -0.5f;
4364 adjY[0] = -0.5f;
4365 adjY[1] = 0.5f;
4366 }
4367 else
4368 assert(0);
4369 }
4370 else {
4371 /* Fragment shader wants pixel center half integer */
4372 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4373 /* the driver supports pixel center half integer */
4374 }
4375 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4376 /* the driver supports pixel center integer, need to bias X,Y */
4377 adjX = adjY[0] = adjY[1] = 0.5f;
4378 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4379 }
4380 else
4381 assert(0);
4382 }
4383
4384 /* we invert after adjustment so that we avoid the MOV to temporary,
4385 * and reuse the adjustment ADD instead */
4386 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4387 }
4388
4389 /**
4390 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4391 * TGSI uses +1 for front, -1 for back.
4392 * This function converts the TGSI value to the GL value. Simply clamping/
4393 * saturating the value to [0,1] does the job.
4394 */
4395 static void
4396 emit_face_var(struct st_translate *t)
4397 {
4398 struct ureg_program *ureg = t->ureg;
4399 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4400 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4401
4402 /* MOV_SAT face_temp, input[face] */
4403 face_temp = ureg_saturate(face_temp);
4404 ureg_MOV(ureg, face_temp, face_input);
4405
4406 /* Use face_temp as face input from here on: */
4407 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4408 }
4409
4410 static void
4411 emit_edgeflags(struct st_translate *t)
4412 {
4413 struct ureg_program *ureg = t->ureg;
4414 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4415 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4416
4417 ureg_MOV(ureg, edge_dst, edge_src);
4418 }
4419
4420 /**
4421 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4422 * \param program the program to translate
4423 * \param numInputs number of input registers used
4424 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4425 * input indexes
4426 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4427 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4428 * each input
4429 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4430 * \param numOutputs number of output registers used
4431 * \param outputMapping maps Mesa fragment program outputs to TGSI
4432 * generic outputs
4433 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4434 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4435 * each output
4436 *
4437 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4438 */
4439 extern "C" enum pipe_error
4440 st_translate_program(
4441 struct gl_context *ctx,
4442 uint procType,
4443 struct ureg_program *ureg,
4444 glsl_to_tgsi_visitor *program,
4445 const struct gl_program *proginfo,
4446 GLuint numInputs,
4447 const GLuint inputMapping[],
4448 const ubyte inputSemanticName[],
4449 const ubyte inputSemanticIndex[],
4450 const GLuint interpMode[],
4451 GLuint numOutputs,
4452 const GLuint outputMapping[],
4453 const ubyte outputSemanticName[],
4454 const ubyte outputSemanticIndex[],
4455 boolean passthrough_edgeflags)
4456 {
4457 struct st_translate *t;
4458 unsigned i;
4459 enum pipe_error ret = PIPE_OK;
4460
4461 assert(numInputs <= Elements(t->inputs));
4462 assert(numOutputs <= Elements(t->outputs));
4463
4464 t = CALLOC_STRUCT(st_translate);
4465 if (!t) {
4466 ret = PIPE_ERROR_OUT_OF_MEMORY;
4467 goto out;
4468 }
4469
4470 memset(t, 0, sizeof *t);
4471
4472 t->procType = procType;
4473 t->inputMapping = inputMapping;
4474 t->outputMapping = outputMapping;
4475 t->ureg = ureg;
4476 t->pointSizeOutIndex = -1;
4477 t->prevInstWrotePointSize = GL_FALSE;
4478
4479 if (program->shader_program) {
4480 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4481 struct gl_uniform_storage *const storage =
4482 &program->shader_program->UniformStorage[i];
4483
4484 _mesa_uniform_detach_all_driver_storage(storage);
4485 }
4486 }
4487
4488 /*
4489 * Declare input attributes.
4490 */
4491 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4492 for (i = 0; i < numInputs; i++) {
4493 t->inputs[i] = ureg_DECL_fs_input(ureg,
4494 inputSemanticName[i],
4495 inputSemanticIndex[i],
4496 interpMode[i]);
4497 }
4498
4499 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4500 /* Must do this after setting up t->inputs, and before
4501 * emitting constant references, below:
4502 */
4503 emit_wpos(st_context(ctx), t, proginfo, ureg);
4504 }
4505
4506 if (proginfo->InputsRead & FRAG_BIT_FACE)
4507 emit_face_var(t);
4508
4509 /*
4510 * Declare output attributes.
4511 */
4512 for (i = 0; i < numOutputs; i++) {
4513 switch (outputSemanticName[i]) {
4514 case TGSI_SEMANTIC_POSITION:
4515 t->outputs[i] = ureg_DECL_output(ureg,
4516 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4517 outputSemanticIndex[i]);
4518 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4519 break;
4520 case TGSI_SEMANTIC_STENCIL:
4521 t->outputs[i] = ureg_DECL_output(ureg,
4522 TGSI_SEMANTIC_STENCIL, /* Stencil */
4523 outputSemanticIndex[i]);
4524 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4525 break;
4526 case TGSI_SEMANTIC_COLOR:
4527 t->outputs[i] = ureg_DECL_output(ureg,
4528 TGSI_SEMANTIC_COLOR,
4529 outputSemanticIndex[i]);
4530 break;
4531 default:
4532 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4533 ret = PIPE_ERROR_BAD_INPUT;
4534 goto out;
4535 }
4536 }
4537 }
4538 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4539 for (i = 0; i < numInputs; i++) {
4540 t->inputs[i] = ureg_DECL_gs_input(ureg,
4541 i,
4542 inputSemanticName[i],
4543 inputSemanticIndex[i]);
4544 }
4545
4546 for (i = 0; i < numOutputs; i++) {
4547 t->outputs[i] = ureg_DECL_output(ureg,
4548 outputSemanticName[i],
4549 outputSemanticIndex[i]);
4550 }
4551 }
4552 else {
4553 assert(procType == TGSI_PROCESSOR_VERTEX);
4554
4555 for (i = 0; i < numInputs; i++) {
4556 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4557 }
4558
4559 for (i = 0; i < numOutputs; i++) {
4560 if (outputSemanticName[i] == TGSI_SEMANTIC_CLIPDIST) {
4561 int mask = ((1 << (program->num_clip_distances - 4*outputSemanticIndex[i])) - 1) & TGSI_WRITEMASK_XYZW;
4562 t->outputs[i] = ureg_DECL_output_masked(ureg,
4563 outputSemanticName[i],
4564 outputSemanticIndex[i],
4565 mask);
4566 } else {
4567 t->outputs[i] = ureg_DECL_output(ureg,
4568 outputSemanticName[i],
4569 outputSemanticIndex[i]);
4570 }
4571 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && proginfo->Id) {
4572 /* Writing to the point size result register requires special
4573 * handling to implement clamping.
4574 */
4575 static const gl_state_index pointSizeClampState[STATE_LENGTH]
4576 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4577 /* XXX: note we are modifying the incoming shader here! Need to
4578 * do this before emitting the constant decls below, or this
4579 * will be missed.
4580 */
4581 unsigned pointSizeClampConst =
4582 _mesa_add_state_reference(proginfo->Parameters,
4583 pointSizeClampState);
4584 struct ureg_dst psizregtemp = ureg_DECL_temporary(ureg);
4585 t->pointSizeConst = ureg_DECL_constant(ureg, pointSizeClampConst);
4586 t->pointSizeResult = t->outputs[i];
4587 t->pointSizeOutIndex = i;
4588 t->outputs[i] = psizregtemp;
4589 }
4590 }
4591 if (passthrough_edgeflags)
4592 emit_edgeflags(t);
4593 }
4594
4595 /* Declare address register.
4596 */
4597 if (program->num_address_regs > 0) {
4598 assert(program->num_address_regs == 1);
4599 t->address[0] = ureg_DECL_address(ureg);
4600 }
4601
4602 /* Declare misc input registers
4603 */
4604 {
4605 GLbitfield sysInputs = proginfo->SystemValuesRead;
4606 unsigned numSys = 0;
4607 for (i = 0; sysInputs; i++) {
4608 if (sysInputs & (1 << i)) {
4609 unsigned semName = mesa_sysval_to_semantic[i];
4610 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4611 numSys++;
4612 sysInputs &= ~(1 << i);
4613 }
4614 }
4615 }
4616
4617 if (program->indirect_addr_temps) {
4618 /* If temps are accessed with indirect addressing, declare temporaries
4619 * in sequential order. Else, we declare them on demand elsewhere.
4620 * (Note: the number of temporaries is equal to program->next_temp)
4621 */
4622 for (i = 0; i < (unsigned)program->next_temp; i++) {
4623 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4624 t->temps[i] = ureg_DECL_temporary(t->ureg);
4625 }
4626 }
4627
4628 /* Emit constants and uniforms. TGSI uses a single index space for these,
4629 * so we put all the translated regs in t->constants.
4630 */
4631 if (proginfo->Parameters) {
4632 t->constants = (struct ureg_src *)CALLOC(proginfo->Parameters->NumParameters * sizeof(t->constants[0]));
4633 if (t->constants == NULL) {
4634 ret = PIPE_ERROR_OUT_OF_MEMORY;
4635 goto out;
4636 }
4637
4638 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4639 switch (proginfo->Parameters->Parameters[i].Type) {
4640 case PROGRAM_ENV_PARAM:
4641 case PROGRAM_LOCAL_PARAM:
4642 case PROGRAM_STATE_VAR:
4643 case PROGRAM_NAMED_PARAM:
4644 case PROGRAM_UNIFORM:
4645 t->constants[i] = ureg_DECL_constant(ureg, i);
4646 break;
4647
4648 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4649 * addressing of the const buffer.
4650 * FIXME: Be smarter and recognize param arrays:
4651 * indirect addressing is only valid within the referenced
4652 * array.
4653 */
4654 case PROGRAM_CONSTANT:
4655 if (program->indirect_addr_consts)
4656 t->constants[i] = ureg_DECL_constant(ureg, i);
4657 else
4658 t->constants[i] = emit_immediate(t,
4659 proginfo->Parameters->ParameterValues[i],
4660 proginfo->Parameters->Parameters[i].DataType,
4661 4);
4662 break;
4663 default:
4664 break;
4665 }
4666 }
4667 }
4668
4669 /* Emit immediate values.
4670 */
4671 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src));
4672 if (t->immediates == NULL) {
4673 ret = PIPE_ERROR_OUT_OF_MEMORY;
4674 goto out;
4675 }
4676 i = 0;
4677 foreach_iter(exec_list_iterator, iter, program->immediates) {
4678 immediate_storage *imm = (immediate_storage *)iter.get();
4679 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4680 }
4681
4682 /* texture samplers */
4683 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4684 if (program->samplers_used & (1 << i)) {
4685 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4686 }
4687 }
4688
4689 /* Emit each instruction in turn:
4690 */
4691 foreach_iter(exec_list_iterator, iter, program->instructions) {
4692 set_insn_start(t, ureg_get_instruction_number(ureg));
4693 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get());
4694
4695 if (t->prevInstWrotePointSize && proginfo->Id) {
4696 /* The previous instruction wrote to the (fake) vertex point size
4697 * result register. Now we need to clamp that value to the min/max
4698 * point size range, putting the result into the real point size
4699 * register.
4700 * Note that we can't do this easily at the end of program due to
4701 * possible early return.
4702 */
4703 set_insn_start(t, ureg_get_instruction_number(ureg));
4704 ureg_MAX(t->ureg,
4705 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
4706 ureg_src(t->outputs[t->pointSizeOutIndex]),
4707 ureg_swizzle(t->pointSizeConst, 1,1,1,1));
4708 ureg_MIN(t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
4709 ureg_src(t->outputs[t->pointSizeOutIndex]),
4710 ureg_swizzle(t->pointSizeConst, 2,2,2,2));
4711 }
4712 t->prevInstWrotePointSize = GL_FALSE;
4713 }
4714
4715 /* Fix up all emitted labels:
4716 */
4717 for (i = 0; i < t->labels_count; i++) {
4718 ureg_fixup_label(ureg, t->labels[i].token,
4719 t->insn[t->labels[i].branch_target]);
4720 }
4721
4722 if (program->shader_program) {
4723 /* This has to be done last. Any operation the can cause
4724 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4725 * program constant) has to happen before creating this linkage.
4726 */
4727 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4728 if (program->shader_program->_LinkedShaders[i] == NULL)
4729 continue;
4730
4731 _mesa_associate_uniform_storage(ctx, program->shader_program,
4732 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4733 }
4734 }
4735
4736 out:
4737 if (t) {
4738 FREE(t->insn);
4739 FREE(t->labels);
4740 FREE(t->constants);
4741 FREE(t->immediates);
4742
4743 if (t->error) {
4744 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4745 }
4746
4747 FREE(t);
4748 }
4749
4750 return ret;
4751 }
4752 /* ----------------------------- End TGSI code ------------------------------ */
4753
4754 /**
4755 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4756 * generating Mesa IR.
4757 */
4758 static struct gl_program *
4759 get_mesa_program(struct gl_context *ctx,
4760 struct gl_shader_program *shader_program,
4761 struct gl_shader *shader,
4762 int num_clip_distances)
4763 {
4764 glsl_to_tgsi_visitor* v = new glsl_to_tgsi_visitor();
4765 struct gl_program *prog;
4766 struct pipe_screen * screen = st_context(ctx)->pipe->screen;
4767 unsigned pipe_shader_type;
4768 GLenum target;
4769 const char *target_string;
4770 bool progress;
4771 struct gl_shader_compiler_options *options =
4772 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4773
4774 switch (shader->Type) {
4775 case GL_VERTEX_SHADER:
4776 target = GL_VERTEX_PROGRAM_ARB;
4777 target_string = "vertex";
4778 pipe_shader_type = PIPE_SHADER_VERTEX;
4779 break;
4780 case GL_FRAGMENT_SHADER:
4781 target = GL_FRAGMENT_PROGRAM_ARB;
4782 target_string = "fragment";
4783 pipe_shader_type = PIPE_SHADER_FRAGMENT;
4784 break;
4785 case GL_GEOMETRY_SHADER:
4786 target = GL_GEOMETRY_PROGRAM_NV;
4787 target_string = "geometry";
4788 pipe_shader_type = PIPE_SHADER_GEOMETRY;
4789 break;
4790 default:
4791 assert(!"should not be reached");
4792 return NULL;
4793 }
4794
4795 validate_ir_tree(shader->ir);
4796
4797 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4798 if (!prog)
4799 return NULL;
4800 prog->Parameters = _mesa_new_parameter_list();
4801 v->ctx = ctx;
4802 v->prog = prog;
4803 v->shader_program = shader_program;
4804 v->options = options;
4805 v->glsl_version = ctx->Const.GLSLVersion;
4806 v->native_integers = ctx->Const.NativeIntegers;
4807 v->num_clip_distances = num_clip_distances;
4808
4809 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4810 prog->Parameters);
4811
4812 if (!screen->get_shader_param(screen, pipe_shader_type,
4813 PIPE_SHADER_CAP_OUTPUT_READ)) {
4814 /* Remove reads to output registers, and to varyings in vertex shaders. */
4815 lower_output_reads(shader->ir);
4816 }
4817
4818
4819 /* Emit intermediate IR for main(). */
4820 visit_exec_list(shader->ir, v);
4821
4822 /* Now emit bodies for any functions that were used. */
4823 do {
4824 progress = GL_FALSE;
4825
4826 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4827 function_entry *entry = (function_entry *)iter.get();
4828
4829 if (!entry->bgn_inst) {
4830 v->current_function = entry;
4831
4832 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
4833 entry->bgn_inst->function = entry;
4834
4835 visit_exec_list(&entry->sig->body, v);
4836
4837 glsl_to_tgsi_instruction *last;
4838 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
4839 if (last->op != TGSI_OPCODE_RET)
4840 v->emit(NULL, TGSI_OPCODE_RET);
4841
4842 glsl_to_tgsi_instruction *end;
4843 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
4844 end->function = entry;
4845
4846 progress = GL_TRUE;
4847 }
4848 }
4849 } while (progress);
4850
4851 #if 0
4852 /* Print out some information (for debugging purposes) used by the
4853 * optimization passes. */
4854 for (i=0; i < v->next_temp; i++) {
4855 int fr = v->get_first_temp_read(i);
4856 int fw = v->get_first_temp_write(i);
4857 int lr = v->get_last_temp_read(i);
4858 int lw = v->get_last_temp_write(i);
4859
4860 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
4861 assert(fw <= fr);
4862 }
4863 #endif
4864
4865 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4866 v->simplify_cmp();
4867 v->copy_propagate();
4868 while (v->eliminate_dead_code_advanced());
4869
4870 /* FIXME: These passes to optimize temporary registers don't work when there
4871 * is indirect addressing of the temporary register space. We need proper
4872 * array support so that we don't have to give up these passes in every
4873 * shader that uses arrays.
4874 */
4875 if (!v->indirect_addr_temps) {
4876 v->eliminate_dead_code();
4877 v->merge_registers();
4878 v->renumber_registers();
4879 }
4880
4881 /* Write the END instruction. */
4882 v->emit(NULL, TGSI_OPCODE_END);
4883
4884 if (ctx->Shader.Flags & GLSL_DUMP) {
4885 printf("\n");
4886 printf("GLSL IR for linked %s program %d:\n", target_string,
4887 shader_program->Name);
4888 _mesa_print_ir(shader->ir, NULL);
4889 printf("\n");
4890 printf("\n");
4891 fflush(stdout);
4892 }
4893
4894 prog->Instructions = NULL;
4895 prog->NumInstructions = 0;
4896
4897 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
4898 count_resources(v, prog);
4899
4900 _mesa_reference_program(ctx, &shader->Program, prog);
4901
4902 /* This has to be done last. Any operation the can cause
4903 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4904 * program constant) has to happen before creating this linkage.
4905 */
4906 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
4907 if (!shader_program->LinkStatus) {
4908 return NULL;
4909 }
4910
4911 struct st_vertex_program *stvp;
4912 struct st_fragment_program *stfp;
4913 struct st_geometry_program *stgp;
4914
4915 switch (shader->Type) {
4916 case GL_VERTEX_SHADER:
4917 stvp = (struct st_vertex_program *)prog;
4918 stvp->glsl_to_tgsi = v;
4919 break;
4920 case GL_FRAGMENT_SHADER:
4921 stfp = (struct st_fragment_program *)prog;
4922 stfp->glsl_to_tgsi = v;
4923 break;
4924 case GL_GEOMETRY_SHADER:
4925 stgp = (struct st_geometry_program *)prog;
4926 stgp->glsl_to_tgsi = v;
4927 break;
4928 default:
4929 assert(!"should not be reached");
4930 return NULL;
4931 }
4932
4933 return prog;
4934 }
4935
4936 /**
4937 * Searches through the IR for a declaration of gl_ClipDistance and returns the
4938 * declared size of the gl_ClipDistance array. Returns 0 if gl_ClipDistance is
4939 * not declared in the IR.
4940 */
4941 int get_clip_distance_size(exec_list *ir)
4942 {
4943 foreach_iter (exec_list_iterator, iter, *ir) {
4944 ir_instruction *inst = (ir_instruction *)iter.get();
4945 ir_variable *var = inst->as_variable();
4946 if (var == NULL) continue;
4947 if (!strcmp(var->name, "gl_ClipDistance")) {
4948 return var->type->length;
4949 }
4950 }
4951
4952 return 0;
4953 }
4954
4955 extern "C" {
4956
4957 struct gl_shader *
4958 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
4959 {
4960 struct gl_shader *shader;
4961 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
4962 type == GL_GEOMETRY_SHADER_ARB);
4963 shader = rzalloc(NULL, struct gl_shader);
4964 if (shader) {
4965 shader->Type = type;
4966 shader->Name = name;
4967 _mesa_init_shader(ctx, shader);
4968 }
4969 return shader;
4970 }
4971
4972 struct gl_shader_program *
4973 st_new_shader_program(struct gl_context *ctx, GLuint name)
4974 {
4975 struct gl_shader_program *shProg;
4976 shProg = rzalloc(NULL, struct gl_shader_program);
4977 if (shProg) {
4978 shProg->Name = name;
4979 _mesa_init_shader_program(ctx, shProg);
4980 }
4981 return shProg;
4982 }
4983
4984 /**
4985 * Link a shader.
4986 * Called via ctx->Driver.LinkShader()
4987 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
4988 * with code lowering and other optimizations.
4989 */
4990 GLboolean
4991 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
4992 {
4993 int num_clip_distances[MESA_SHADER_TYPES];
4994 assert(prog->LinkStatus);
4995
4996 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4997 if (prog->_LinkedShaders[i] == NULL)
4998 continue;
4999
5000 bool progress;
5001 exec_list *ir = prog->_LinkedShaders[i]->ir;
5002 const struct gl_shader_compiler_options *options =
5003 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5004
5005 /* We have to determine the length of the gl_ClipDistance array before
5006 * the array is lowered to two vec4s by lower_clip_distance().
5007 */
5008 num_clip_distances[i] = get_clip_distance_size(ir);
5009
5010 do {
5011 progress = false;
5012
5013 /* Lowering */
5014 do_mat_op_to_vec(ir);
5015 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
5016 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP
5017 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
5018
5019 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5020
5021 progress = do_common_optimization(ir, true, true,
5022 options->MaxUnrollIterations)
5023 || progress;
5024
5025 progress = lower_quadop_vector(ir, false) || progress;
5026 progress = lower_clip_distance(ir) || progress;
5027
5028 if (options->MaxIfDepth == 0)
5029 progress = lower_discard(ir) || progress;
5030
5031 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5032
5033 if (options->EmitNoNoise)
5034 progress = lower_noise(ir) || progress;
5035
5036 /* If there are forms of indirect addressing that the driver
5037 * cannot handle, perform the lowering pass.
5038 */
5039 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
5040 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
5041 progress =
5042 lower_variable_index_to_cond_assign(ir,
5043 options->EmitNoIndirectInput,
5044 options->EmitNoIndirectOutput,
5045 options->EmitNoIndirectTemp,
5046 options->EmitNoIndirectUniform)
5047 || progress;
5048
5049 progress = do_vec_index_to_cond_assign(ir) || progress;
5050 } while (progress);
5051
5052 validate_ir_tree(ir);
5053 }
5054
5055 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5056 struct gl_program *linked_prog;
5057
5058 if (prog->_LinkedShaders[i] == NULL)
5059 continue;
5060
5061 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i],
5062 num_clip_distances[i]);
5063
5064 if (linked_prog) {
5065 static const GLenum targets[] = {
5066 GL_VERTEX_PROGRAM_ARB,
5067 GL_FRAGMENT_PROGRAM_ARB,
5068 GL_GEOMETRY_PROGRAM_NV
5069 };
5070
5071 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5072 linked_prog);
5073 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5074 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5075 NULL);
5076 _mesa_reference_program(ctx, &linked_prog, NULL);
5077 return GL_FALSE;
5078 }
5079 }
5080
5081 _mesa_reference_program(ctx, &linked_prog, NULL);
5082 }
5083
5084 return GL_TRUE;
5085 }
5086
5087 void
5088 st_translate_stream_output_info(struct glsl_to_tgsi_visitor *glsl_to_tgsi,
5089 const GLuint outputMapping[],
5090 struct pipe_stream_output_info *so)
5091 {
5092 static unsigned comps_to_mask[] = {
5093 0,
5094 TGSI_WRITEMASK_X,
5095 TGSI_WRITEMASK_XY,
5096 TGSI_WRITEMASK_XYZ,
5097 TGSI_WRITEMASK_XYZW
5098 };
5099 unsigned i;
5100 struct gl_transform_feedback_info *info =
5101 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5102
5103 for (i = 0; i < info->NumOutputs; i++) {
5104 assert(info->Outputs[i].NumComponents < Elements(comps_to_mask));
5105 so->output[i].register_index =
5106 outputMapping[info->Outputs[i].OutputRegister];
5107 so->output[i].register_mask =
5108 comps_to_mask[info->Outputs[i].NumComponents]
5109 << info->Outputs[i].ComponentOffset;
5110 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5111 }
5112 so->num_outputs = info->NumOutputs;
5113 }
5114
5115 } /* extern "C" */