mesa: Eliminate parameters to dd_function_table::Viewport
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 /* will be 4 for GLSL 4.00 */
91 #define MAX_GLSL_TEXTURE_OFFSET 1
92
93 class st_src_reg;
94 class st_dst_reg;
95
96 static int swizzle_for_size(int size);
97
98 /**
99 * This struct is a corresponding struct to TGSI ureg_src.
100 */
101 class st_src_reg {
102 public:
103 st_src_reg(gl_register_file file, int index, const glsl_type *type)
104 {
105 this->file = file;
106 this->index = index;
107 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
108 this->swizzle = swizzle_for_size(type->vector_elements);
109 else
110 this->swizzle = SWIZZLE_XYZW;
111 this->negate = 0;
112 this->index2D = 0;
113 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
114 this->reladdr = NULL;
115 this->reladdr2 = NULL;
116 this->has_index2 = false;
117 }
118
119 st_src_reg(gl_register_file file, int index, int type)
120 {
121 this->type = type;
122 this->file = file;
123 this->index = index;
124 this->index2D = 0;
125 this->swizzle = SWIZZLE_XYZW;
126 this->negate = 0;
127 this->reladdr = NULL;
128 this->reladdr2 = NULL;
129 this->has_index2 = false;
130 }
131
132 st_src_reg(gl_register_file file, int index, int type, int index2D)
133 {
134 this->type = type;
135 this->file = file;
136 this->index = index;
137 this->index2D = index2D;
138 this->swizzle = SWIZZLE_XYZW;
139 this->negate = 0;
140 this->reladdr = NULL;
141 this->reladdr2 = NULL;
142 this->has_index2 = false;
143 }
144
145 st_src_reg()
146 {
147 this->type = GLSL_TYPE_ERROR;
148 this->file = PROGRAM_UNDEFINED;
149 this->index = 0;
150 this->index2D = 0;
151 this->swizzle = 0;
152 this->negate = 0;
153 this->reladdr = NULL;
154 this->reladdr2 = NULL;
155 this->has_index2 = false;
156 }
157
158 explicit st_src_reg(st_dst_reg reg);
159
160 gl_register_file file; /**< PROGRAM_* from Mesa */
161 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 int index2D;
163 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
164 int negate; /**< NEGATE_XYZW mask from mesa */
165 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
166 /** Register index should be offset by the integer in this reg. */
167 st_src_reg *reladdr;
168 st_src_reg *reladdr2;
169 bool has_index2;
170 };
171
172 class st_dst_reg {
173 public:
174 st_dst_reg(gl_register_file file, int writemask, int type, int index)
175 {
176 this->file = file;
177 this->index = index;
178 this->writemask = writemask;
179 this->cond_mask = COND_TR;
180 this->reladdr = NULL;
181 this->type = type;
182 }
183
184 st_dst_reg(gl_register_file file, int writemask, int type)
185 {
186 this->file = file;
187 this->index = 0;
188 this->writemask = writemask;
189 this->cond_mask = COND_TR;
190 this->reladdr = NULL;
191 this->type = type;
192 }
193
194 st_dst_reg()
195 {
196 this->type = GLSL_TYPE_ERROR;
197 this->file = PROGRAM_UNDEFINED;
198 this->index = 0;
199 this->writemask = 0;
200 this->cond_mask = COND_TR;
201 this->reladdr = NULL;
202 }
203
204 explicit st_dst_reg(st_src_reg reg);
205
206 gl_register_file file; /**< PROGRAM_* from Mesa */
207 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
208 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
209 GLuint cond_mask:4;
210 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
211 /** Register index should be offset by the integer in this reg. */
212 st_src_reg *reladdr;
213 };
214
215 st_src_reg::st_src_reg(st_dst_reg reg)
216 {
217 this->type = reg.type;
218 this->file = reg.file;
219 this->index = reg.index;
220 this->swizzle = SWIZZLE_XYZW;
221 this->negate = 0;
222 this->reladdr = reg.reladdr;
223 this->index2D = 0;
224 this->reladdr2 = NULL;
225 this->has_index2 = false;
226 }
227
228 st_dst_reg::st_dst_reg(st_src_reg reg)
229 {
230 this->type = reg.type;
231 this->file = reg.file;
232 this->index = reg.index;
233 this->writemask = WRITEMASK_XYZW;
234 this->cond_mask = COND_TR;
235 this->reladdr = reg.reladdr;
236 }
237
238 class glsl_to_tgsi_instruction : public exec_node {
239 public:
240 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
241
242 unsigned op;
243 st_dst_reg dst;
244 st_src_reg src[3];
245 /** Pointer to the ir source this tree came from for debugging */
246 ir_instruction *ir;
247 GLboolean cond_update;
248 bool saturate;
249 int sampler; /**< sampler index */
250 int tex_target; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow;
252 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
253 unsigned tex_offset_num_offset;
254 int dead_mask; /**< Used in dead code elimination */
255
256 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
257 };
258
259 class variable_storage : public exec_node {
260 public:
261 variable_storage(ir_variable *var, gl_register_file file, int index)
262 : file(file), index(index), var(var)
263 {
264 /* empty */
265 }
266
267 gl_register_file file;
268 int index;
269 ir_variable *var; /* variable that maps to this, if any */
270 };
271
272 class immediate_storage : public exec_node {
273 public:
274 immediate_storage(gl_constant_value *values, int size, int type)
275 {
276 memcpy(this->values, values, size * sizeof(gl_constant_value));
277 this->size = size;
278 this->type = type;
279 }
280
281 gl_constant_value values[4];
282 int size; /**< Number of components (1-4) */
283 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
284 };
285
286 class function_entry : public exec_node {
287 public:
288 ir_function_signature *sig;
289
290 /**
291 * identifier of this function signature used by the program.
292 *
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
297 */
298 int sig_id;
299
300 /**
301 * Pointer to first instruction of the function body.
302 *
303 * Set during function body emits after main() is processed.
304 */
305 glsl_to_tgsi_instruction *bgn_inst;
306
307 /**
308 * Index of the first instruction of the function body in actual TGSI.
309 *
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
311 */
312 int inst;
313
314 /** Storage for the return value. */
315 st_src_reg return_reg;
316 };
317
318 struct glsl_to_tgsi_visitor : public ir_visitor {
319 public:
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
322
323 function_entry *current_function;
324
325 struct gl_context *ctx;
326 struct gl_program *prog;
327 struct gl_shader_program *shader_program;
328 struct gl_shader_compiler_options *options;
329
330 int next_temp;
331
332 unsigned array_sizes[MAX_ARRAYS];
333 unsigned next_array;
334
335 int num_address_regs;
336 int samplers_used;
337 bool indirect_addr_consts;
338
339 int glsl_version;
340 bool native_integers;
341 bool have_sqrt;
342
343 variable_storage *find_variable_storage(ir_variable *var);
344
345 int add_constant(gl_register_file file, gl_constant_value values[4],
346 int size, int datatype, GLuint *swizzle_out);
347
348 function_entry *get_function_signature(ir_function_signature *sig);
349
350 st_src_reg get_temp(const glsl_type *type);
351 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
352
353 st_src_reg st_src_reg_for_float(float val);
354 st_src_reg st_src_reg_for_int(int val);
355 st_src_reg st_src_reg_for_type(int type, int val);
356
357 /**
358 * \name Visit methods
359 *
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
363 */
364 /*@{*/
365 virtual void visit(ir_variable *);
366 virtual void visit(ir_loop *);
367 virtual void visit(ir_loop_jump *);
368 virtual void visit(ir_function_signature *);
369 virtual void visit(ir_function *);
370 virtual void visit(ir_expression *);
371 virtual void visit(ir_swizzle *);
372 virtual void visit(ir_dereference_variable *);
373 virtual void visit(ir_dereference_array *);
374 virtual void visit(ir_dereference_record *);
375 virtual void visit(ir_assignment *);
376 virtual void visit(ir_constant *);
377 virtual void visit(ir_call *);
378 virtual void visit(ir_return *);
379 virtual void visit(ir_discard *);
380 virtual void visit(ir_texture *);
381 virtual void visit(ir_if *);
382 virtual void visit(ir_emit_vertex *);
383 virtual void visit(ir_end_primitive *);
384 /*@}*/
385
386 st_src_reg result;
387
388 /** List of variable_storage */
389 exec_list variables;
390
391 /** List of immediate_storage */
392 exec_list immediates;
393 unsigned num_immediates;
394
395 /** List of function_entry */
396 exec_list function_signatures;
397 int next_signature_id;
398
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions;
401
402 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
405 st_dst_reg dst, st_src_reg src0);
406
407 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
408 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
409
410 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
411 st_dst_reg dst,
412 st_src_reg src0, st_src_reg src1, st_src_reg src2);
413
414 unsigned get_opcode(ir_instruction *ir, unsigned op,
415 st_dst_reg dst,
416 st_src_reg src0, st_src_reg src1);
417
418 /**
419 * Emit the correct dot-product instruction for the type of arguments
420 */
421 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
422 st_dst_reg dst,
423 st_src_reg src0,
424 st_src_reg src1,
425 unsigned elements);
426
427 void emit_scalar(ir_instruction *ir, unsigned op,
428 st_dst_reg dst, st_src_reg src0);
429
430 void emit_scalar(ir_instruction *ir, unsigned op,
431 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
432
433 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
434
435 void emit_scs(ir_instruction *ir, unsigned op,
436 st_dst_reg dst, const st_src_reg &src);
437
438 bool try_emit_mad(ir_expression *ir,
439 int mul_operand);
440 bool try_emit_mad_for_and_not(ir_expression *ir,
441 int mul_operand);
442 bool try_emit_sat(ir_expression *ir);
443
444 void emit_swz(ir_expression *ir);
445
446 bool process_move_condition(ir_rvalue *ir);
447
448 void simplify_cmp(void);
449
450 void rename_temp_register(int index, int new_index);
451 int get_first_temp_read(int index);
452 int get_first_temp_write(int index);
453 int get_last_temp_read(int index);
454 int get_last_temp_write(int index);
455
456 void copy_propagate(void);
457 void eliminate_dead_code(void);
458 int eliminate_dead_code_advanced(void);
459 void merge_registers(void);
460 void renumber_registers(void);
461
462 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
463 st_dst_reg *l, st_src_reg *r);
464
465 void *mem_ctx;
466 };
467
468 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
469
470 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
471
472 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
473 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
474
475 static void
476 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
477
478 static void
479 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
480 {
481 va_list args;
482 va_start(args, fmt);
483 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
484 va_end(args);
485
486 prog->LinkStatus = GL_FALSE;
487 }
488
489 static int
490 swizzle_for_size(int size)
491 {
492 int size_swizzles[4] = {
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
495 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
496 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
497 };
498
499 assert((size >= 1) && (size <= 4));
500 return size_swizzles[size - 1];
501 }
502
503 static bool
504 is_tex_instruction(unsigned opcode)
505 {
506 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
507 return info->is_tex;
508 }
509
510 static unsigned
511 num_inst_dst_regs(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->num_dst;
515 }
516
517 static unsigned
518 num_inst_src_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->is_tex ? info->num_src - 1 : info->num_src;
522 }
523
524 glsl_to_tgsi_instruction *
525 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
526 st_dst_reg dst,
527 st_src_reg src0, st_src_reg src1, st_src_reg src2)
528 {
529 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
530 int num_reladdr = 0, i;
531
532 op = get_opcode(ir, op, dst, src0, src1);
533
534 /* If we have to do relative addressing, we want to load the ARL
535 * reg directly for one of the regs, and preload the other reladdr
536 * sources into temps.
537 */
538 num_reladdr += dst.reladdr != NULL;
539 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
540 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
541 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
542
543 reladdr_to_temp(ir, &src2, &num_reladdr);
544 reladdr_to_temp(ir, &src1, &num_reladdr);
545 reladdr_to_temp(ir, &src0, &num_reladdr);
546
547 if (dst.reladdr) {
548 emit_arl(ir, address_reg, *dst.reladdr);
549 num_reladdr--;
550 }
551 assert(num_reladdr == 0);
552
553 inst->op = op;
554 inst->dst = dst;
555 inst->src[0] = src0;
556 inst->src[1] = src1;
557 inst->src[2] = src2;
558 inst->ir = ir;
559 inst->dead_mask = 0;
560
561 inst->function = NULL;
562
563 /* Update indirect addressing status used by TGSI */
564 if (dst.reladdr) {
565 switch(dst.file) {
566 case PROGRAM_STATE_VAR:
567 case PROGRAM_CONSTANT:
568 case PROGRAM_UNIFORM:
569 this->indirect_addr_consts = true;
570 break;
571 case PROGRAM_IMMEDIATE:
572 assert(!"immediates should not have indirect addressing");
573 break;
574 default:
575 break;
576 }
577 }
578 else {
579 for (i=0; i<3; i++) {
580 if(inst->src[i].reladdr) {
581 switch(inst->src[i].file) {
582 case PROGRAM_STATE_VAR:
583 case PROGRAM_CONSTANT:
584 case PROGRAM_UNIFORM:
585 this->indirect_addr_consts = true;
586 break;
587 case PROGRAM_IMMEDIATE:
588 assert(!"immediates should not have indirect addressing");
589 break;
590 default:
591 break;
592 }
593 }
594 }
595 }
596
597 this->instructions.push_tail(inst);
598
599 return inst;
600 }
601
602
603 glsl_to_tgsi_instruction *
604 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
605 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
606 {
607 return emit(ir, op, dst, src0, src1, undef_src);
608 }
609
610 glsl_to_tgsi_instruction *
611 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
612 st_dst_reg dst, st_src_reg src0)
613 {
614 assert(dst.writemask != 0);
615 return emit(ir, op, dst, src0, undef_src, undef_src);
616 }
617
618 glsl_to_tgsi_instruction *
619 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
620 {
621 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
622 }
623
624 /**
625 * Determines whether to use an integer, unsigned integer, or float opcode
626 * based on the operands and input opcode, then emits the result.
627 */
628 unsigned
629 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
630 st_dst_reg dst,
631 st_src_reg src0, st_src_reg src1)
632 {
633 int type = GLSL_TYPE_FLOAT;
634
635 assert(src0.type != GLSL_TYPE_ARRAY);
636 assert(src0.type != GLSL_TYPE_STRUCT);
637 assert(src1.type != GLSL_TYPE_ARRAY);
638 assert(src1.type != GLSL_TYPE_STRUCT);
639
640 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
641 type = GLSL_TYPE_FLOAT;
642 else if (native_integers)
643 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
644
645 #define case4(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
651 else \
652 op = TGSI_OPCODE_##f; \
653 break;
654
655 #define case3(f, i, u) case4(f, f, i, u)
656 #define case2fi(f, i) case4(f, f, i, i)
657 #define case2iu(i, u) case4(i, LAST, i, u)
658
659 #define casecomp(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) \
662 op = TGSI_OPCODE_##i; \
663 else if (type == GLSL_TYPE_UINT) \
664 op = TGSI_OPCODE_##u; \
665 else if (native_integers) \
666 op = TGSI_OPCODE_##f; \
667 else \
668 op = TGSI_OPCODE_##c; \
669 break;
670
671 switch(op) {
672 case2fi(ADD, UADD);
673 case2fi(MUL, UMUL);
674 case2fi(MAD, UMAD);
675 case3(DIV, IDIV, UDIV);
676 case3(MAX, IMAX, UMAX);
677 case3(MIN, IMIN, UMIN);
678 case2iu(MOD, UMOD);
679
680 casecomp(SEQ, FSEQ, USEQ, USEQ);
681 casecomp(SNE, FSNE, USNE, USNE);
682 casecomp(SGE, FSGE, ISGE, USGE);
683 casecomp(SLT, FSLT, ISLT, USLT);
684
685 case2iu(ISHR, USHR);
686
687 case2fi(SSG, ISSG);
688 case3(ABS, IABS, IABS);
689
690 default: break;
691 }
692
693 assert(op != TGSI_OPCODE_LAST);
694 return op;
695 }
696
697 glsl_to_tgsi_instruction *
698 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
699 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
700 unsigned elements)
701 {
702 static const unsigned dot_opcodes[] = {
703 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
704 };
705
706 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
707 }
708
709 /**
710 * Emits TGSI scalar opcodes to produce unique answers across channels.
711 *
712 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
713 * channel determines the result across all channels. So to do a vec4
714 * of this operation, we want to emit a scalar per source channel used
715 * to produce dest channels.
716 */
717 void
718 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
719 st_dst_reg dst,
720 st_src_reg orig_src0, st_src_reg orig_src1)
721 {
722 int i, j;
723 int done_mask = ~dst.writemask;
724
725 /* TGSI RCP is a scalar operation splatting results to all channels,
726 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
727 * dst channels.
728 */
729 for (i = 0; i < 4; i++) {
730 GLuint this_mask = (1 << i);
731 glsl_to_tgsi_instruction *inst;
732 st_src_reg src0 = orig_src0;
733 st_src_reg src1 = orig_src1;
734
735 if (done_mask & this_mask)
736 continue;
737
738 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
739 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
740 for (j = i + 1; j < 4; j++) {
741 /* If there is another enabled component in the destination that is
742 * derived from the same inputs, generate its value on this pass as
743 * well.
744 */
745 if (!(done_mask & (1 << j)) &&
746 GET_SWZ(src0.swizzle, j) == src0_swiz &&
747 GET_SWZ(src1.swizzle, j) == src1_swiz) {
748 this_mask |= (1 << j);
749 }
750 }
751 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
752 src0_swiz, src0_swiz);
753 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
754 src1_swiz, src1_swiz);
755
756 inst = emit(ir, op, dst, src0, src1);
757 inst->dst.writemask = this_mask;
758 done_mask |= this_mask;
759 }
760 }
761
762 void
763 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
764 st_dst_reg dst, st_src_reg src0)
765 {
766 st_src_reg undef = undef_src;
767
768 undef.swizzle = SWIZZLE_XXXX;
769
770 emit_scalar(ir, op, dst, src0, undef);
771 }
772
773 void
774 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
775 st_dst_reg dst, st_src_reg src0)
776 {
777 int op = TGSI_OPCODE_ARL;
778
779 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
780 op = TGSI_OPCODE_UARL;
781
782 assert(dst.file == PROGRAM_ADDRESS);
783 if (dst.index >= this->num_address_regs)
784 this->num_address_regs = dst.index + 1;
785
786 emit(NULL, op, dst, src0);
787 }
788
789 /**
790 * Emit an TGSI_OPCODE_SCS instruction
791 *
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
796 *
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
802 */
803 void
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
805 st_dst_reg dst,
806 const st_src_reg &src)
807 {
808 /* Vertex programs cannot use the SCS opcode.
809 */
810 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
811 emit_scalar(ir, op, dst, src);
812 return;
813 }
814
815 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
816 const unsigned scs_mask = (1U << component);
817 int done_mask = ~dst.writemask;
818 st_src_reg tmp;
819
820 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
821
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
824 */
825 if (scs_mask != unsigned(dst.writemask)) {
826 tmp = get_temp(glsl_type::vec4_type);
827 }
828
829 for (unsigned i = 0; i < 4; i++) {
830 unsigned this_mask = (1U << i);
831 st_src_reg src0 = src;
832
833 if ((done_mask & this_mask) != 0)
834 continue;
835
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
840 * the X component.
841 */
842 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
843
844 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
845 src0_swiz, src0_swiz);
846 for (unsigned j = i + 1; j < 4; j++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
849 * well.
850 */
851 if (!(done_mask & (1 << j)) &&
852 GET_SWZ(src0.swizzle, j) == src0_swiz) {
853 this_mask |= (1 << j);
854 }
855 }
856
857 if (this_mask != scs_mask) {
858 glsl_to_tgsi_instruction *inst;
859 st_dst_reg tmp_dst = st_dst_reg(tmp);
860
861 /* Emit the SCS instruction.
862 */
863 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
864 inst->dst.writemask = scs_mask;
865
866 /* Move the result of the SCS instruction to the desired location in
867 * the destination.
868 */
869 tmp.swizzle = MAKE_SWIZZLE4(component, component,
870 component, component);
871 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
872 inst->dst.writemask = this_mask;
873 } else {
874 /* Emit the SCS instruction to write directly to the destination.
875 */
876 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
877 inst->dst.writemask = scs_mask;
878 }
879
880 done_mask |= this_mask;
881 }
882 }
883
884 int
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
886 gl_constant_value values[4], int size, int datatype,
887 GLuint *swizzle_out)
888 {
889 if (file == PROGRAM_CONSTANT) {
890 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
891 size, datatype, swizzle_out);
892 } else {
893 int index = 0;
894 immediate_storage *entry;
895 assert(file == PROGRAM_IMMEDIATE);
896
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
899 */
900 foreach_list(node, &this->immediates) {
901 entry = (immediate_storage *) node;
902
903 if (entry->size == size &&
904 entry->type == datatype &&
905 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
906 return index;
907 }
908 index++;
909 }
910
911 /* Add this immediate to the list. */
912 entry = new(mem_ctx) immediate_storage(values, size, datatype);
913 this->immediates.push_tail(entry);
914 this->num_immediates++;
915 return index;
916 }
917 }
918
919 st_src_reg
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
921 {
922 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
923 union gl_constant_value uval;
924
925 uval.f = val;
926 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
927
928 return src;
929 }
930
931 st_src_reg
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
933 {
934 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
935 union gl_constant_value uval;
936
937 assert(native_integers);
938
939 uval.i = val;
940 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
941
942 return src;
943 }
944
945 st_src_reg
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
947 {
948 if (native_integers)
949 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
950 st_src_reg_for_int(val);
951 else
952 return st_src_reg_for_float(val);
953 }
954
955 static int
956 type_size(const struct glsl_type *type)
957 {
958 unsigned int i;
959 int size;
960
961 switch (type->base_type) {
962 case GLSL_TYPE_UINT:
963 case GLSL_TYPE_INT:
964 case GLSL_TYPE_FLOAT:
965 case GLSL_TYPE_BOOL:
966 if (type->is_matrix()) {
967 return type->matrix_columns;
968 } else {
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
973 */
974 return 1;
975 }
976 case GLSL_TYPE_ARRAY:
977 assert(type->length > 0);
978 return type_size(type->fields.array) * type->length;
979 case GLSL_TYPE_STRUCT:
980 size = 0;
981 for (i = 0; i < type->length; i++) {
982 size += type_size(type->fields.structure[i].type);
983 }
984 return size;
985 case GLSL_TYPE_SAMPLER:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
987 * at link time.
988 */
989 return 1;
990 case GLSL_TYPE_ATOMIC_UINT:
991 case GLSL_TYPE_INTERFACE:
992 case GLSL_TYPE_VOID:
993 case GLSL_TYPE_ERROR:
994 assert(!"Invalid type in type_size");
995 break;
996 }
997 return 0;
998 }
999
1000 /**
1001 * In the initial pass of codegen, we assign temporary numbers to
1002 * intermediate results. (not SSA -- variable assignments will reuse
1003 * storage).
1004 */
1005 st_src_reg
1006 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1007 {
1008 st_src_reg src;
1009
1010 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1011 src.reladdr = NULL;
1012 src.negate = 0;
1013
1014 if (!options->EmitNoIndirectTemp &&
1015 (type->is_array() || type->is_matrix())) {
1016
1017 src.file = PROGRAM_ARRAY;
1018 src.index = next_array << 16 | 0x8000;
1019 array_sizes[next_array] = type_size(type);
1020 ++next_array;
1021
1022 } else {
1023 src.file = PROGRAM_TEMPORARY;
1024 src.index = next_temp;
1025 next_temp += type_size(type);
1026 }
1027
1028 if (type->is_array() || type->is_record()) {
1029 src.swizzle = SWIZZLE_NOOP;
1030 } else {
1031 src.swizzle = swizzle_for_size(type->vector_elements);
1032 }
1033
1034 return src;
1035 }
1036
1037 variable_storage *
1038 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1039 {
1040
1041 variable_storage *entry;
1042
1043 foreach_list(node, &this->variables) {
1044 entry = (variable_storage *) node;
1045
1046 if (entry->var == var)
1047 return entry;
1048 }
1049
1050 return NULL;
1051 }
1052
1053 void
1054 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1055 {
1056 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1057 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1058
1059 fp->OriginUpperLeft = ir->data.origin_upper_left;
1060 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1061 }
1062
1063 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1064 unsigned int i;
1065 const ir_state_slot *const slots = ir->state_slots;
1066 assert(ir->state_slots != NULL);
1067
1068 /* Check if this statevar's setup in the STATE file exactly
1069 * matches how we'll want to reference it as a
1070 * struct/array/whatever. If not, then we need to move it into
1071 * temporary storage and hope that it'll get copy-propagated
1072 * out.
1073 */
1074 for (i = 0; i < ir->num_state_slots; i++) {
1075 if (slots[i].swizzle != SWIZZLE_XYZW) {
1076 break;
1077 }
1078 }
1079
1080 variable_storage *storage;
1081 st_dst_reg dst;
1082 if (i == ir->num_state_slots) {
1083 /* We'll set the index later. */
1084 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1085 this->variables.push_tail(storage);
1086
1087 dst = undef_dst;
1088 } else {
1089 /* The variable_storage constructor allocates slots based on the size
1090 * of the type. However, this had better match the number of state
1091 * elements that we're going to copy into the new temporary.
1092 */
1093 assert((int) ir->num_state_slots == type_size(ir->type));
1094
1095 dst = st_dst_reg(get_temp(ir->type));
1096
1097 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1098
1099 this->variables.push_tail(storage);
1100 }
1101
1102
1103 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1104 int index = _mesa_add_state_reference(this->prog->Parameters,
1105 (gl_state_index *)slots[i].tokens);
1106
1107 if (storage->file == PROGRAM_STATE_VAR) {
1108 if (storage->index == -1) {
1109 storage->index = index;
1110 } else {
1111 assert(index == storage->index + (int)i);
1112 }
1113 } else {
1114 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1115 * the data being moved since MOV does not care about the type of
1116 * data it is moving, and we don't want to declare registers with
1117 * array or struct types.
1118 */
1119 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1120 src.swizzle = slots[i].swizzle;
1121 emit(ir, TGSI_OPCODE_MOV, dst, src);
1122 /* even a float takes up a whole vec4 reg in a struct/array. */
1123 dst.index++;
1124 }
1125 }
1126
1127 if (storage->file == PROGRAM_TEMPORARY &&
1128 dst.index != storage->index + (int) ir->num_state_slots) {
1129 fail_link(this->shader_program,
1130 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1131 ir->name, dst.index - storage->index,
1132 type_size(ir->type));
1133 }
1134 }
1135 }
1136
1137 void
1138 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1139 {
1140 emit(NULL, TGSI_OPCODE_BGNLOOP);
1141
1142 visit_exec_list(&ir->body_instructions, this);
1143
1144 emit(NULL, TGSI_OPCODE_ENDLOOP);
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1149 {
1150 switch (ir->mode) {
1151 case ir_loop_jump::jump_break:
1152 emit(NULL, TGSI_OPCODE_BRK);
1153 break;
1154 case ir_loop_jump::jump_continue:
1155 emit(NULL, TGSI_OPCODE_CONT);
1156 break;
1157 }
1158 }
1159
1160
1161 void
1162 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1163 {
1164 assert(0);
1165 (void)ir;
1166 }
1167
1168 void
1169 glsl_to_tgsi_visitor::visit(ir_function *ir)
1170 {
1171 /* Ignore function bodies other than main() -- we shouldn't see calls to
1172 * them since they should all be inlined before we get to glsl_to_tgsi.
1173 */
1174 if (strcmp(ir->name, "main") == 0) {
1175 const ir_function_signature *sig;
1176 exec_list empty;
1177
1178 sig = ir->matching_signature(NULL, &empty);
1179
1180 assert(sig);
1181
1182 foreach_list(node, &sig->body) {
1183 ir_instruction *ir = (ir_instruction *) node;
1184
1185 ir->accept(this);
1186 }
1187 }
1188 }
1189
1190 bool
1191 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1192 {
1193 int nonmul_operand = 1 - mul_operand;
1194 st_src_reg a, b, c;
1195 st_dst_reg result_dst;
1196
1197 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1198 if (!expr || expr->operation != ir_binop_mul)
1199 return false;
1200
1201 expr->operands[0]->accept(this);
1202 a = this->result;
1203 expr->operands[1]->accept(this);
1204 b = this->result;
1205 ir->operands[nonmul_operand]->accept(this);
1206 c = this->result;
1207
1208 this->result = get_temp(ir->type);
1209 result_dst = st_dst_reg(this->result);
1210 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1211 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1212
1213 return true;
1214 }
1215
1216 /**
1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1218 *
1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1220 * implemented using multiplication, and logical-or is implemented using
1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1222 * As result, the logical expression (a & !b) can be rewritten as:
1223 *
1224 * - a * !b
1225 * - a * (1 - b)
1226 * - (a * 1) - (a * b)
1227 * - a + -(a * b)
1228 * - a + (a * -b)
1229 *
1230 * This final expression can be implemented as a single MAD(a, -b, a)
1231 * instruction.
1232 */
1233 bool
1234 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1235 {
1236 const int other_operand = 1 - try_operand;
1237 st_src_reg a, b;
1238
1239 ir_expression *expr = ir->operands[try_operand]->as_expression();
1240 if (!expr || expr->operation != ir_unop_logic_not)
1241 return false;
1242
1243 ir->operands[other_operand]->accept(this);
1244 a = this->result;
1245 expr->operands[0]->accept(this);
1246 b = this->result;
1247
1248 b.negate = ~b.negate;
1249
1250 this->result = get_temp(ir->type);
1251 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1252
1253 return true;
1254 }
1255
1256 bool
1257 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1258 {
1259 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1260 */
1261 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1262 !st_context(this->ctx)->has_shader_model3) {
1263 return false;
1264 }
1265
1266 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1267 if (!sat_src)
1268 return false;
1269
1270 sat_src->accept(this);
1271 st_src_reg src = this->result;
1272
1273 /* If we generated an expression instruction into a temporary in
1274 * processing the saturate's operand, apply the saturate to that
1275 * instruction. Otherwise, generate a MOV to do the saturate.
1276 *
1277 * Note that we have to be careful to only do this optimization if
1278 * the instruction in question was what generated src->result. For
1279 * example, ir_dereference_array might generate a MUL instruction
1280 * to create the reladdr, and return us a src reg using that
1281 * reladdr. That MUL result is not the value we're trying to
1282 * saturate.
1283 */
1284 ir_expression *sat_src_expr = sat_src->as_expression();
1285 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1286 sat_src_expr->operation == ir_binop_add ||
1287 sat_src_expr->operation == ir_binop_dot)) {
1288 glsl_to_tgsi_instruction *new_inst;
1289 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1290 new_inst->saturate = true;
1291 } else {
1292 this->result = get_temp(ir->type);
1293 st_dst_reg result_dst = st_dst_reg(this->result);
1294 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1295 glsl_to_tgsi_instruction *inst;
1296 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1297 inst->saturate = true;
1298 }
1299
1300 return true;
1301 }
1302
1303 void
1304 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1305 st_src_reg *reg, int *num_reladdr)
1306 {
1307 if (!reg->reladdr && !reg->reladdr2)
1308 return;
1309
1310 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1311 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1312
1313 if (*num_reladdr != 1) {
1314 st_src_reg temp = get_temp(glsl_type::vec4_type);
1315
1316 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1317 *reg = temp;
1318 }
1319
1320 (*num_reladdr)--;
1321 }
1322
1323 void
1324 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1325 {
1326 unsigned int operand;
1327 st_src_reg op[Elements(ir->operands)];
1328 st_src_reg result_src;
1329 st_dst_reg result_dst;
1330
1331 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1332 */
1333 if (ir->operation == ir_binop_add) {
1334 if (try_emit_mad(ir, 1))
1335 return;
1336 if (try_emit_mad(ir, 0))
1337 return;
1338 }
1339
1340 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1341 */
1342 if (ir->operation == ir_binop_logic_and) {
1343 if (try_emit_mad_for_and_not(ir, 1))
1344 return;
1345 if (try_emit_mad_for_and_not(ir, 0))
1346 return;
1347 }
1348
1349 if (try_emit_sat(ir))
1350 return;
1351
1352 if (ir->operation == ir_quadop_vector)
1353 assert(!"ir_quadop_vector should have been lowered");
1354
1355 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1356 this->result.file = PROGRAM_UNDEFINED;
1357 ir->operands[operand]->accept(this);
1358 if (this->result.file == PROGRAM_UNDEFINED) {
1359 printf("Failed to get tree for expression operand:\n");
1360 ir->operands[operand]->print();
1361 printf("\n");
1362 exit(1);
1363 }
1364 op[operand] = this->result;
1365
1366 /* Matrix expression operands should have been broken down to vector
1367 * operations already.
1368 */
1369 assert(!ir->operands[operand]->type->is_matrix());
1370 }
1371
1372 int vector_elements = ir->operands[0]->type->vector_elements;
1373 if (ir->operands[1]) {
1374 vector_elements = MAX2(vector_elements,
1375 ir->operands[1]->type->vector_elements);
1376 }
1377
1378 this->result.file = PROGRAM_UNDEFINED;
1379
1380 /* Storage for our result. Ideally for an assignment we'd be using
1381 * the actual storage for the result here, instead.
1382 */
1383 result_src = get_temp(ir->type);
1384 /* convenience for the emit functions below. */
1385 result_dst = st_dst_reg(result_src);
1386 /* Limit writes to the channels that will be used by result_src later.
1387 * This does limit this temp's use as a temporary for multi-instruction
1388 * sequences.
1389 */
1390 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1391
1392 switch (ir->operation) {
1393 case ir_unop_logic_not:
1394 if (result_dst.type != GLSL_TYPE_FLOAT)
1395 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1396 else {
1397 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1398 * older GPUs implement SEQ using multiple instructions (i915 uses two
1399 * SGE instructions and a MUL instruction). Since our logic values are
1400 * 0.0 and 1.0, 1-x also implements !x.
1401 */
1402 op[0].negate = ~op[0].negate;
1403 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1404 }
1405 break;
1406 case ir_unop_neg:
1407 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1408 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1409 else {
1410 op[0].negate = ~op[0].negate;
1411 result_src = op[0];
1412 }
1413 break;
1414 case ir_unop_abs:
1415 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1416 break;
1417 case ir_unop_sign:
1418 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1419 break;
1420 case ir_unop_rcp:
1421 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1422 break;
1423
1424 case ir_unop_exp2:
1425 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1426 break;
1427 case ir_unop_exp:
1428 case ir_unop_log:
1429 assert(!"not reached: should be handled by ir_explog_to_explog2");
1430 break;
1431 case ir_unop_log2:
1432 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1433 break;
1434 case ir_unop_sin:
1435 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1436 break;
1437 case ir_unop_cos:
1438 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1439 break;
1440 case ir_unop_sin_reduced:
1441 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1442 break;
1443 case ir_unop_cos_reduced:
1444 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1445 break;
1446
1447 case ir_unop_dFdx:
1448 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1449 break;
1450 case ir_unop_dFdy:
1451 {
1452 /* The X component contains 1 or -1 depending on whether the framebuffer
1453 * is a FBO or the window system buffer, respectively.
1454 * It is then multiplied with the source operand of DDY.
1455 */
1456 static const gl_state_index transform_y_state[STATE_LENGTH]
1457 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1458
1459 unsigned transform_y_index =
1460 _mesa_add_state_reference(this->prog->Parameters,
1461 transform_y_state);
1462
1463 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1464 transform_y_index,
1465 glsl_type::vec4_type);
1466 transform_y.swizzle = SWIZZLE_XXXX;
1467
1468 st_src_reg temp = get_temp(glsl_type::vec4_type);
1469
1470 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1471 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1472 break;
1473 }
1474
1475 case ir_unop_noise: {
1476 /* At some point, a motivated person could add a better
1477 * implementation of noise. Currently not even the nvidia
1478 * binary drivers do anything more than this. In any case, the
1479 * place to do this is in the GL state tracker, not the poor
1480 * driver.
1481 */
1482 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1483 break;
1484 }
1485
1486 case ir_binop_add:
1487 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1488 break;
1489 case ir_binop_sub:
1490 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1491 break;
1492
1493 case ir_binop_mul:
1494 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1495 break;
1496 case ir_binop_div:
1497 if (result_dst.type == GLSL_TYPE_FLOAT)
1498 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1499 else
1500 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1501 break;
1502 case ir_binop_mod:
1503 if (result_dst.type == GLSL_TYPE_FLOAT)
1504 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1505 else
1506 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1507 break;
1508
1509 case ir_binop_less:
1510 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1511 break;
1512 case ir_binop_greater:
1513 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1514 break;
1515 case ir_binop_lequal:
1516 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1517 break;
1518 case ir_binop_gequal:
1519 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1520 break;
1521 case ir_binop_equal:
1522 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1523 break;
1524 case ir_binop_nequal:
1525 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1526 break;
1527 case ir_binop_all_equal:
1528 /* "==" operator producing a scalar boolean. */
1529 if (ir->operands[0]->type->is_vector() ||
1530 ir->operands[1]->type->is_vector()) {
1531 st_src_reg temp = get_temp(native_integers ?
1532 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1533 glsl_type::vec4_type);
1534
1535 if (native_integers) {
1536 st_dst_reg temp_dst = st_dst_reg(temp);
1537 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1538
1539 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1540
1541 /* Emit 1-3 AND operations to combine the SEQ results. */
1542 switch (ir->operands[0]->type->vector_elements) {
1543 case 2:
1544 break;
1545 case 3:
1546 temp_dst.writemask = WRITEMASK_Y;
1547 temp1.swizzle = SWIZZLE_YYYY;
1548 temp2.swizzle = SWIZZLE_ZZZZ;
1549 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1550 break;
1551 case 4:
1552 temp_dst.writemask = WRITEMASK_X;
1553 temp1.swizzle = SWIZZLE_XXXX;
1554 temp2.swizzle = SWIZZLE_YYYY;
1555 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1556 temp_dst.writemask = WRITEMASK_Y;
1557 temp1.swizzle = SWIZZLE_ZZZZ;
1558 temp2.swizzle = SWIZZLE_WWWW;
1559 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1560 }
1561
1562 temp1.swizzle = SWIZZLE_XXXX;
1563 temp2.swizzle = SWIZZLE_YYYY;
1564 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1565 } else {
1566 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1567
1568 /* After the dot-product, the value will be an integer on the
1569 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1570 */
1571 emit_dp(ir, result_dst, temp, temp, vector_elements);
1572
1573 /* Negating the result of the dot-product gives values on the range
1574 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1575 * This is achieved using SGE.
1576 */
1577 st_src_reg sge_src = result_src;
1578 sge_src.negate = ~sge_src.negate;
1579 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1580 }
1581 } else {
1582 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1583 }
1584 break;
1585 case ir_binop_any_nequal:
1586 /* "!=" operator producing a scalar boolean. */
1587 if (ir->operands[0]->type->is_vector() ||
1588 ir->operands[1]->type->is_vector()) {
1589 st_src_reg temp = get_temp(native_integers ?
1590 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1591 glsl_type::vec4_type);
1592 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1593
1594 if (native_integers) {
1595 st_dst_reg temp_dst = st_dst_reg(temp);
1596 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1597
1598 /* Emit 1-3 OR operations to combine the SNE results. */
1599 switch (ir->operands[0]->type->vector_elements) {
1600 case 2:
1601 break;
1602 case 3:
1603 temp_dst.writemask = WRITEMASK_Y;
1604 temp1.swizzle = SWIZZLE_YYYY;
1605 temp2.swizzle = SWIZZLE_ZZZZ;
1606 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1607 break;
1608 case 4:
1609 temp_dst.writemask = WRITEMASK_X;
1610 temp1.swizzle = SWIZZLE_XXXX;
1611 temp2.swizzle = SWIZZLE_YYYY;
1612 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1613 temp_dst.writemask = WRITEMASK_Y;
1614 temp1.swizzle = SWIZZLE_ZZZZ;
1615 temp2.swizzle = SWIZZLE_WWWW;
1616 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1617 }
1618
1619 temp1.swizzle = SWIZZLE_XXXX;
1620 temp2.swizzle = SWIZZLE_YYYY;
1621 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1622 } else {
1623 /* After the dot-product, the value will be an integer on the
1624 * range [0,4]. Zero stays zero, and positive values become 1.0.
1625 */
1626 glsl_to_tgsi_instruction *const dp =
1627 emit_dp(ir, result_dst, temp, temp, vector_elements);
1628 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1629 /* The clamping to [0,1] can be done for free in the fragment
1630 * shader with a saturate.
1631 */
1632 dp->saturate = true;
1633 } else {
1634 /* Negating the result of the dot-product gives values on the range
1635 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1636 * achieved using SLT.
1637 */
1638 st_src_reg slt_src = result_src;
1639 slt_src.negate = ~slt_src.negate;
1640 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1641 }
1642 }
1643 } else {
1644 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1645 }
1646 break;
1647
1648 case ir_unop_any: {
1649 assert(ir->operands[0]->type->is_vector());
1650
1651 /* After the dot-product, the value will be an integer on the
1652 * range [0,4]. Zero stays zero, and positive values become 1.0.
1653 */
1654 glsl_to_tgsi_instruction *const dp =
1655 emit_dp(ir, result_dst, op[0], op[0],
1656 ir->operands[0]->type->vector_elements);
1657 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1658 result_dst.type == GLSL_TYPE_FLOAT) {
1659 /* The clamping to [0,1] can be done for free in the fragment
1660 * shader with a saturate.
1661 */
1662 dp->saturate = true;
1663 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1666 * is achieved using SLT.
1667 */
1668 st_src_reg slt_src = result_src;
1669 slt_src.negate = ~slt_src.negate;
1670 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1671 }
1672 else {
1673 /* Use SNE 0 if integers are being used as boolean values. */
1674 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1675 }
1676 break;
1677 }
1678
1679 case ir_binop_logic_xor:
1680 if (native_integers)
1681 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1682 else
1683 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1684 break;
1685
1686 case ir_binop_logic_or: {
1687 if (native_integers) {
1688 /* If integers are used as booleans, we can use an actual "or"
1689 * instruction.
1690 */
1691 assert(native_integers);
1692 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1693 } else {
1694 /* After the addition, the value will be an integer on the
1695 * range [0,2]. Zero stays zero, and positive values become 1.0.
1696 */
1697 glsl_to_tgsi_instruction *add =
1698 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1699 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate if floats are being used as boolean values.
1702 */
1703 add->saturate = true;
1704 } else {
1705 /* Negating the result of the addition gives values on the range
1706 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1708 */
1709 st_src_reg slt_src = result_src;
1710 slt_src.negate = ~slt_src.negate;
1711 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1712 }
1713 }
1714 break;
1715 }
1716
1717 case ir_binop_logic_and:
1718 /* If native integers are disabled, the bool args are stored as float 0.0
1719 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1720 * actual AND opcode.
1721 */
1722 if (native_integers)
1723 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1724 else
1725 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1726 break;
1727
1728 case ir_binop_dot:
1729 assert(ir->operands[0]->type->is_vector());
1730 assert(ir->operands[0]->type == ir->operands[1]->type);
1731 emit_dp(ir, result_dst, op[0], op[1],
1732 ir->operands[0]->type->vector_elements);
1733 break;
1734
1735 case ir_unop_sqrt:
1736 if (have_sqrt) {
1737 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1738 }
1739 else {
1740 /* sqrt(x) = x * rsq(x). */
1741 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1742 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1743 /* For incoming channels <= 0, set the result to 0. */
1744 op[0].negate = ~op[0].negate;
1745 emit(ir, TGSI_OPCODE_CMP, result_dst,
1746 op[0], result_src, st_src_reg_for_float(0.0));
1747 }
1748 break;
1749 case ir_unop_rsq:
1750 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1751 break;
1752 case ir_unop_i2f:
1753 if (native_integers) {
1754 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1755 break;
1756 }
1757 /* fallthrough to next case otherwise */
1758 case ir_unop_b2f:
1759 if (native_integers) {
1760 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1761 break;
1762 }
1763 /* fallthrough to next case otherwise */
1764 case ir_unop_i2u:
1765 case ir_unop_u2i:
1766 /* Converting between signed and unsigned integers is a no-op. */
1767 result_src = op[0];
1768 break;
1769 case ir_unop_b2i:
1770 if (native_integers) {
1771 /* Booleans are stored as integers using ~0 for true and 0 for false.
1772 * GLSL requires that int(bool) return 1 for true and 0 for false.
1773 * This conversion is done with AND, but it could be done with NEG.
1774 */
1775 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1776 } else {
1777 /* Booleans and integers are both stored as floats when native
1778 * integers are disabled.
1779 */
1780 result_src = op[0];
1781 }
1782 break;
1783 case ir_unop_f2i:
1784 if (native_integers)
1785 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1786 else
1787 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1788 break;
1789 case ir_unop_f2u:
1790 if (native_integers)
1791 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1792 else
1793 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1794 break;
1795 case ir_unop_bitcast_f2i:
1796 result_src = op[0];
1797 result_src.type = GLSL_TYPE_INT;
1798 break;
1799 case ir_unop_bitcast_f2u:
1800 result_src = op[0];
1801 result_src.type = GLSL_TYPE_UINT;
1802 break;
1803 case ir_unop_bitcast_i2f:
1804 case ir_unop_bitcast_u2f:
1805 result_src = op[0];
1806 result_src.type = GLSL_TYPE_FLOAT;
1807 break;
1808 case ir_unop_f2b:
1809 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1810 break;
1811 case ir_unop_i2b:
1812 if (native_integers)
1813 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1814 else
1815 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1816 break;
1817 case ir_unop_trunc:
1818 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1819 break;
1820 case ir_unop_ceil:
1821 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1822 break;
1823 case ir_unop_floor:
1824 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1825 break;
1826 case ir_unop_round_even:
1827 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1828 break;
1829 case ir_unop_fract:
1830 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1831 break;
1832
1833 case ir_binop_min:
1834 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1835 break;
1836 case ir_binop_max:
1837 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1838 break;
1839 case ir_binop_pow:
1840 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1841 break;
1842
1843 case ir_unop_bit_not:
1844 if (native_integers) {
1845 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1846 break;
1847 }
1848 case ir_unop_u2f:
1849 if (native_integers) {
1850 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1851 break;
1852 }
1853 case ir_binop_lshift:
1854 if (native_integers) {
1855 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1856 break;
1857 }
1858 case ir_binop_rshift:
1859 if (native_integers) {
1860 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1861 break;
1862 }
1863 case ir_binop_bit_and:
1864 if (native_integers) {
1865 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1866 break;
1867 }
1868 case ir_binop_bit_xor:
1869 if (native_integers) {
1870 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1871 break;
1872 }
1873 case ir_binop_bit_or:
1874 if (native_integers) {
1875 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1876 break;
1877 }
1878
1879 assert(!"GLSL 1.30 features unsupported");
1880 break;
1881
1882 case ir_binop_ubo_load: {
1883 ir_constant *uniform_block = ir->operands[0]->as_constant();
1884 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1885 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1886 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1887 st_src_reg cbuf;
1888
1889 cbuf.type = glsl_type::vec4_type->base_type;
1890 cbuf.file = PROGRAM_CONSTANT;
1891 cbuf.index = 0;
1892 cbuf.index2D = uniform_block->value.u[0] + 1;
1893 cbuf.reladdr = NULL;
1894 cbuf.negate = 0;
1895
1896 assert(ir->type->is_vector() || ir->type->is_scalar());
1897
1898 if (const_offset_ir) {
1899 index_reg = st_src_reg_for_int(const_offset / 16);
1900 } else {
1901 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1902 }
1903
1904 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1905 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1906 const_offset % 16 / 4,
1907 const_offset % 16 / 4,
1908 const_offset % 16 / 4);
1909
1910 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1911 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1912
1913 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1914 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1915 } else {
1916 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1917 }
1918 break;
1919 }
1920 case ir_triop_lrp:
1921 /* note: we have to reorder the three args here */
1922 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1923 break;
1924 case ir_triop_csel:
1925 if (this->ctx->Const.NativeIntegers)
1926 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1927 else {
1928 op[0].negate = ~op[0].negate;
1929 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1930 }
1931 break;
1932 case ir_unop_pack_snorm_2x16:
1933 case ir_unop_pack_unorm_2x16:
1934 case ir_unop_pack_half_2x16:
1935 case ir_unop_pack_snorm_4x8:
1936 case ir_unop_pack_unorm_4x8:
1937 case ir_unop_unpack_snorm_2x16:
1938 case ir_unop_unpack_unorm_2x16:
1939 case ir_unop_unpack_half_2x16:
1940 case ir_unop_unpack_half_2x16_split_x:
1941 case ir_unop_unpack_half_2x16_split_y:
1942 case ir_unop_unpack_snorm_4x8:
1943 case ir_unop_unpack_unorm_4x8:
1944 case ir_binop_pack_half_2x16_split:
1945 case ir_unop_bitfield_reverse:
1946 case ir_unop_bit_count:
1947 case ir_unop_find_msb:
1948 case ir_unop_find_lsb:
1949 case ir_binop_bfm:
1950 case ir_triop_fma:
1951 case ir_triop_bfi:
1952 case ir_triop_bitfield_extract:
1953 case ir_quadop_bitfield_insert:
1954 case ir_quadop_vector:
1955 case ir_binop_vector_extract:
1956 case ir_triop_vector_insert:
1957 case ir_binop_ldexp:
1958 case ir_binop_carry:
1959 case ir_binop_borrow:
1960 case ir_binop_imul_high:
1961 /* This operation is not supported, or should have already been handled.
1962 */
1963 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1964 break;
1965 }
1966
1967 this->result = result_src;
1968 }
1969
1970
1971 void
1972 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1973 {
1974 st_src_reg src;
1975 int i;
1976 int swizzle[4];
1977
1978 /* Note that this is only swizzles in expressions, not those on the left
1979 * hand side of an assignment, which do write masking. See ir_assignment
1980 * for that.
1981 */
1982
1983 ir->val->accept(this);
1984 src = this->result;
1985 assert(src.file != PROGRAM_UNDEFINED);
1986
1987 for (i = 0; i < 4; i++) {
1988 if (i < ir->type->vector_elements) {
1989 switch (i) {
1990 case 0:
1991 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1992 break;
1993 case 1:
1994 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1995 break;
1996 case 2:
1997 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1998 break;
1999 case 3:
2000 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2001 break;
2002 }
2003 } else {
2004 /* If the type is smaller than a vec4, replicate the last
2005 * channel out.
2006 */
2007 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2008 }
2009 }
2010
2011 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2012
2013 this->result = src;
2014 }
2015
2016 void
2017 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2018 {
2019 variable_storage *entry = find_variable_storage(ir->var);
2020 ir_variable *var = ir->var;
2021
2022 if (!entry) {
2023 switch (var->data.mode) {
2024 case ir_var_uniform:
2025 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2026 var->data.location);
2027 this->variables.push_tail(entry);
2028 break;
2029 case ir_var_shader_in:
2030 /* The linker assigns locations for varyings and attributes,
2031 * including deprecated builtins (like gl_Color), user-assign
2032 * generic attributes (glBindVertexLocation), and
2033 * user-defined varyings.
2034 */
2035 assert(var->data.location != -1);
2036 entry = new(mem_ctx) variable_storage(var,
2037 PROGRAM_INPUT,
2038 var->data.location);
2039 break;
2040 case ir_var_shader_out:
2041 assert(var->data.location != -1);
2042 entry = new(mem_ctx) variable_storage(var,
2043 PROGRAM_OUTPUT,
2044 var->data.location
2045 + var->data.index);
2046 break;
2047 case ir_var_system_value:
2048 entry = new(mem_ctx) variable_storage(var,
2049 PROGRAM_SYSTEM_VALUE,
2050 var->data.location);
2051 break;
2052 case ir_var_auto:
2053 case ir_var_temporary:
2054 st_src_reg src = get_temp(var->type);
2055
2056 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2057 this->variables.push_tail(entry);
2058
2059 break;
2060 }
2061
2062 if (!entry) {
2063 printf("Failed to make storage for %s\n", var->name);
2064 exit(1);
2065 }
2066 }
2067
2068 this->result = st_src_reg(entry->file, entry->index, var->type);
2069 if (!native_integers)
2070 this->result.type = GLSL_TYPE_FLOAT;
2071 }
2072
2073 void
2074 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2075 {
2076 ir_constant *index;
2077 st_src_reg src;
2078 int element_size = type_size(ir->type);
2079 bool is_2D_input;
2080
2081 index = ir->array_index->constant_expression_value();
2082
2083 ir->array->accept(this);
2084 src = this->result;
2085
2086 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2087 src.file == PROGRAM_INPUT &&
2088 ir->array->ir_type != ir_type_dereference_array;
2089
2090 if (is_2D_input)
2091 element_size = 1;
2092
2093 if (index) {
2094 if (is_2D_input) {
2095 src.index2D = index->value.i[0];
2096 src.has_index2 = true;
2097 } else
2098 src.index += index->value.i[0] * element_size;
2099 } else {
2100 /* Variable index array dereference. It eats the "vec4" of the
2101 * base of the array and an index that offsets the TGSI register
2102 * index.
2103 */
2104 ir->array_index->accept(this);
2105
2106 st_src_reg index_reg;
2107
2108 if (element_size == 1) {
2109 index_reg = this->result;
2110 } else {
2111 index_reg = get_temp(native_integers ?
2112 glsl_type::int_type : glsl_type::float_type);
2113
2114 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2115 this->result, st_src_reg_for_type(index_reg.type, element_size));
2116 }
2117
2118 /* If there was already a relative address register involved, add the
2119 * new and the old together to get the new offset.
2120 */
2121 if (!is_2D_input && src.reladdr != NULL) {
2122 st_src_reg accum_reg = get_temp(native_integers ?
2123 glsl_type::int_type : glsl_type::float_type);
2124
2125 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2126 index_reg, *src.reladdr);
2127
2128 index_reg = accum_reg;
2129 }
2130
2131 if (is_2D_input) {
2132 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2133 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2134 src.index2D = 0;
2135 src.has_index2 = true;
2136 } else {
2137 src.reladdr = ralloc(mem_ctx, st_src_reg);
2138 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2139 }
2140 }
2141
2142 /* If the type is smaller than a vec4, replicate the last channel out. */
2143 if (ir->type->is_scalar() || ir->type->is_vector())
2144 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2145 else
2146 src.swizzle = SWIZZLE_NOOP;
2147
2148 /* Change the register type to the element type of the array. */
2149 src.type = ir->type->base_type;
2150
2151 this->result = src;
2152 }
2153
2154 void
2155 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2156 {
2157 unsigned int i;
2158 const glsl_type *struct_type = ir->record->type;
2159 int offset = 0;
2160
2161 ir->record->accept(this);
2162
2163 for (i = 0; i < struct_type->length; i++) {
2164 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2165 break;
2166 offset += type_size(struct_type->fields.structure[i].type);
2167 }
2168
2169 /* If the type is smaller than a vec4, replicate the last channel out. */
2170 if (ir->type->is_scalar() || ir->type->is_vector())
2171 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2172 else
2173 this->result.swizzle = SWIZZLE_NOOP;
2174
2175 this->result.index += offset;
2176 this->result.type = ir->type->base_type;
2177 }
2178
2179 /**
2180 * We want to be careful in assignment setup to hit the actual storage
2181 * instead of potentially using a temporary like we might with the
2182 * ir_dereference handler.
2183 */
2184 static st_dst_reg
2185 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2186 {
2187 /* The LHS must be a dereference. If the LHS is a variable indexed array
2188 * access of a vector, it must be separated into a series conditional moves
2189 * before reaching this point (see ir_vec_index_to_cond_assign).
2190 */
2191 assert(ir->as_dereference());
2192 ir_dereference_array *deref_array = ir->as_dereference_array();
2193 if (deref_array) {
2194 assert(!deref_array->array->type->is_vector());
2195 }
2196
2197 /* Use the rvalue deref handler for the most part. We'll ignore
2198 * swizzles in it and write swizzles using writemask, though.
2199 */
2200 ir->accept(v);
2201 return st_dst_reg(v->result);
2202 }
2203
2204 /**
2205 * Process the condition of a conditional assignment
2206 *
2207 * Examines the condition of a conditional assignment to generate the optimal
2208 * first operand of a \c CMP instruction. If the condition is a relational
2209 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2210 * used as the source for the \c CMP instruction. Otherwise the comparison
2211 * is processed to a boolean result, and the boolean result is used as the
2212 * operand to the CMP instruction.
2213 */
2214 bool
2215 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2216 {
2217 ir_rvalue *src_ir = ir;
2218 bool negate = true;
2219 bool switch_order = false;
2220
2221 ir_expression *const expr = ir->as_expression();
2222 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2223 bool zero_on_left = false;
2224
2225 if (expr->operands[0]->is_zero()) {
2226 src_ir = expr->operands[1];
2227 zero_on_left = true;
2228 } else if (expr->operands[1]->is_zero()) {
2229 src_ir = expr->operands[0];
2230 zero_on_left = false;
2231 }
2232
2233 /* a is - 0 + - 0 +
2234 * (a < 0) T F F ( a < 0) T F F
2235 * (0 < a) F F T (-a < 0) F F T
2236 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2237 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2238 * (a > 0) F F T (-a < 0) F F T
2239 * (0 > a) T F F ( a < 0) T F F
2240 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2241 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2242 *
2243 * Note that exchanging the order of 0 and 'a' in the comparison simply
2244 * means that the value of 'a' should be negated.
2245 */
2246 if (src_ir != ir) {
2247 switch (expr->operation) {
2248 case ir_binop_less:
2249 switch_order = false;
2250 negate = zero_on_left;
2251 break;
2252
2253 case ir_binop_greater:
2254 switch_order = false;
2255 negate = !zero_on_left;
2256 break;
2257
2258 case ir_binop_lequal:
2259 switch_order = true;
2260 negate = !zero_on_left;
2261 break;
2262
2263 case ir_binop_gequal:
2264 switch_order = true;
2265 negate = zero_on_left;
2266 break;
2267
2268 default:
2269 /* This isn't the right kind of comparison afterall, so make sure
2270 * the whole condition is visited.
2271 */
2272 src_ir = ir;
2273 break;
2274 }
2275 }
2276 }
2277
2278 src_ir->accept(this);
2279
2280 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2281 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2282 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2283 * computing the condition.
2284 */
2285 if (negate)
2286 this->result.negate = ~this->result.negate;
2287
2288 return switch_order;
2289 }
2290
2291 void
2292 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2293 st_dst_reg *l, st_src_reg *r)
2294 {
2295 if (type->base_type == GLSL_TYPE_STRUCT) {
2296 for (unsigned int i = 0; i < type->length; i++) {
2297 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2298 }
2299 return;
2300 }
2301
2302 if (type->is_array()) {
2303 for (unsigned int i = 0; i < type->length; i++) {
2304 emit_block_mov(ir, type->fields.array, l, r);
2305 }
2306 return;
2307 }
2308
2309 if (type->is_matrix()) {
2310 const struct glsl_type *vec_type;
2311
2312 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2313 type->vector_elements, 1);
2314
2315 for (int i = 0; i < type->matrix_columns; i++) {
2316 emit_block_mov(ir, vec_type, l, r);
2317 }
2318 return;
2319 }
2320
2321 assert(type->is_scalar() || type->is_vector());
2322
2323 r->type = type->base_type;
2324 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2325 l->index++;
2326 r->index++;
2327 }
2328
2329 void
2330 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2331 {
2332 st_dst_reg l;
2333 st_src_reg r;
2334 int i;
2335
2336 ir->rhs->accept(this);
2337 r = this->result;
2338
2339 l = get_assignment_lhs(ir->lhs, this);
2340
2341 /* FINISHME: This should really set to the correct maximal writemask for each
2342 * FINISHME: component written (in the loops below). This case can only
2343 * FINISHME: occur for matrices, arrays, and structures.
2344 */
2345 if (ir->write_mask == 0) {
2346 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2347 l.writemask = WRITEMASK_XYZW;
2348 } else if (ir->lhs->type->is_scalar() &&
2349 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2350 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2351 * FINISHME: W component of fragment shader output zero, work correctly.
2352 */
2353 l.writemask = WRITEMASK_XYZW;
2354 } else {
2355 int swizzles[4];
2356 int first_enabled_chan = 0;
2357 int rhs_chan = 0;
2358
2359 l.writemask = ir->write_mask;
2360
2361 for (int i = 0; i < 4; i++) {
2362 if (l.writemask & (1 << i)) {
2363 first_enabled_chan = GET_SWZ(r.swizzle, i);
2364 break;
2365 }
2366 }
2367
2368 /* Swizzle a small RHS vector into the channels being written.
2369 *
2370 * glsl ir treats write_mask as dictating how many channels are
2371 * present on the RHS while TGSI treats write_mask as just
2372 * showing which channels of the vec4 RHS get written.
2373 */
2374 for (int i = 0; i < 4; i++) {
2375 if (l.writemask & (1 << i))
2376 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2377 else
2378 swizzles[i] = first_enabled_chan;
2379 }
2380 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2381 swizzles[2], swizzles[3]);
2382 }
2383
2384 assert(l.file != PROGRAM_UNDEFINED);
2385 assert(r.file != PROGRAM_UNDEFINED);
2386
2387 if (ir->condition) {
2388 const bool switch_order = this->process_move_condition(ir->condition);
2389 st_src_reg condition = this->result;
2390
2391 for (i = 0; i < type_size(ir->lhs->type); i++) {
2392 st_src_reg l_src = st_src_reg(l);
2393 st_src_reg condition_temp = condition;
2394 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2395
2396 if (native_integers) {
2397 /* This is necessary because TGSI's CMP instruction expects the
2398 * condition to be a float, and we store booleans as integers.
2399 * TODO: really want to avoid i2f path and use UCMP. Requires
2400 * changes to process_move_condition though too.
2401 */
2402 condition_temp = get_temp(glsl_type::vec4_type);
2403 condition.negate = 0;
2404 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2405 condition_temp.swizzle = condition.swizzle;
2406 }
2407
2408 if (switch_order) {
2409 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2410 } else {
2411 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2412 }
2413
2414 l.index++;
2415 r.index++;
2416 }
2417 } else if (ir->rhs->as_expression() &&
2418 this->instructions.get_tail() &&
2419 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2420 type_size(ir->lhs->type) == 1 &&
2421 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2422 /* To avoid emitting an extra MOV when assigning an expression to a
2423 * variable, emit the last instruction of the expression again, but
2424 * replace the destination register with the target of the assignment.
2425 * Dead code elimination will remove the original instruction.
2426 */
2427 glsl_to_tgsi_instruction *inst, *new_inst;
2428 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2429 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2430 new_inst->saturate = inst->saturate;
2431 inst->dead_mask = inst->dst.writemask;
2432 } else {
2433 emit_block_mov(ir, ir->rhs->type, &l, &r);
2434 }
2435 }
2436
2437
2438 void
2439 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2440 {
2441 st_src_reg src;
2442 GLfloat stack_vals[4] = { 0 };
2443 gl_constant_value *values = (gl_constant_value *) stack_vals;
2444 GLenum gl_type = GL_NONE;
2445 unsigned int i;
2446 static int in_array = 0;
2447 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2448
2449 /* Unfortunately, 4 floats is all we can get into
2450 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2451 * aggregate constant and move each constant value into it. If we
2452 * get lucky, copy propagation will eliminate the extra moves.
2453 */
2454 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2455 st_src_reg temp_base = get_temp(ir->type);
2456 st_dst_reg temp = st_dst_reg(temp_base);
2457
2458 foreach_list(node, &ir->components) {
2459 ir_constant *field_value = (ir_constant *) node;
2460 int size = type_size(field_value->type);
2461
2462 assert(size > 0);
2463
2464 field_value->accept(this);
2465 src = this->result;
2466
2467 for (i = 0; i < (unsigned int)size; i++) {
2468 emit(ir, TGSI_OPCODE_MOV, temp, src);
2469
2470 src.index++;
2471 temp.index++;
2472 }
2473 }
2474 this->result = temp_base;
2475 return;
2476 }
2477
2478 if (ir->type->is_array()) {
2479 st_src_reg temp_base = get_temp(ir->type);
2480 st_dst_reg temp = st_dst_reg(temp_base);
2481 int size = type_size(ir->type->fields.array);
2482
2483 assert(size > 0);
2484 in_array++;
2485
2486 for (i = 0; i < ir->type->length; i++) {
2487 ir->array_elements[i]->accept(this);
2488 src = this->result;
2489 for (int j = 0; j < size; j++) {
2490 emit(ir, TGSI_OPCODE_MOV, temp, src);
2491
2492 src.index++;
2493 temp.index++;
2494 }
2495 }
2496 this->result = temp_base;
2497 in_array--;
2498 return;
2499 }
2500
2501 if (ir->type->is_matrix()) {
2502 st_src_reg mat = get_temp(ir->type);
2503 st_dst_reg mat_column = st_dst_reg(mat);
2504
2505 for (i = 0; i < ir->type->matrix_columns; i++) {
2506 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2507 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2508
2509 src = st_src_reg(file, -1, ir->type->base_type);
2510 src.index = add_constant(file,
2511 values,
2512 ir->type->vector_elements,
2513 GL_FLOAT,
2514 &src.swizzle);
2515 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2516
2517 mat_column.index++;
2518 }
2519
2520 this->result = mat;
2521 return;
2522 }
2523
2524 switch (ir->type->base_type) {
2525 case GLSL_TYPE_FLOAT:
2526 gl_type = GL_FLOAT;
2527 for (i = 0; i < ir->type->vector_elements; i++) {
2528 values[i].f = ir->value.f[i];
2529 }
2530 break;
2531 case GLSL_TYPE_UINT:
2532 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2533 for (i = 0; i < ir->type->vector_elements; i++) {
2534 if (native_integers)
2535 values[i].u = ir->value.u[i];
2536 else
2537 values[i].f = ir->value.u[i];
2538 }
2539 break;
2540 case GLSL_TYPE_INT:
2541 gl_type = native_integers ? GL_INT : GL_FLOAT;
2542 for (i = 0; i < ir->type->vector_elements; i++) {
2543 if (native_integers)
2544 values[i].i = ir->value.i[i];
2545 else
2546 values[i].f = ir->value.i[i];
2547 }
2548 break;
2549 case GLSL_TYPE_BOOL:
2550 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2551 for (i = 0; i < ir->type->vector_elements; i++) {
2552 if (native_integers)
2553 values[i].u = ir->value.b[i] ? ~0 : 0;
2554 else
2555 values[i].f = ir->value.b[i];
2556 }
2557 break;
2558 default:
2559 assert(!"Non-float/uint/int/bool constant");
2560 }
2561
2562 this->result = st_src_reg(file, -1, ir->type);
2563 this->result.index = add_constant(file,
2564 values,
2565 ir->type->vector_elements,
2566 gl_type,
2567 &this->result.swizzle);
2568 }
2569
2570 function_entry *
2571 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2572 {
2573 function_entry *entry;
2574
2575 foreach_list(node, &this->function_signatures) {
2576 entry = (function_entry *) node;
2577
2578 if (entry->sig == sig)
2579 return entry;
2580 }
2581
2582 entry = ralloc(mem_ctx, function_entry);
2583 entry->sig = sig;
2584 entry->sig_id = this->next_signature_id++;
2585 entry->bgn_inst = NULL;
2586
2587 /* Allocate storage for all the parameters. */
2588 foreach_list(node, &sig->parameters) {
2589 ir_variable *param = (ir_variable *) node;
2590 variable_storage *storage;
2591
2592 storage = find_variable_storage(param);
2593 assert(!storage);
2594
2595 st_src_reg src = get_temp(param->type);
2596
2597 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2598 this->variables.push_tail(storage);
2599 }
2600
2601 if (!sig->return_type->is_void()) {
2602 entry->return_reg = get_temp(sig->return_type);
2603 } else {
2604 entry->return_reg = undef_src;
2605 }
2606
2607 this->function_signatures.push_tail(entry);
2608 return entry;
2609 }
2610
2611 void
2612 glsl_to_tgsi_visitor::visit(ir_call *ir)
2613 {
2614 glsl_to_tgsi_instruction *call_inst;
2615 ir_function_signature *sig = ir->callee;
2616 function_entry *entry = get_function_signature(sig);
2617 int i;
2618
2619 /* Process in parameters. */
2620 foreach_two_lists(formal_node, &sig->parameters,
2621 actual_node, &ir->actual_parameters) {
2622 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2623 ir_variable *param = (ir_variable *) formal_node;
2624
2625 if (param->data.mode == ir_var_function_in ||
2626 param->data.mode == ir_var_function_inout) {
2627 variable_storage *storage = find_variable_storage(param);
2628 assert(storage);
2629
2630 param_rval->accept(this);
2631 st_src_reg r = this->result;
2632
2633 st_dst_reg l;
2634 l.file = storage->file;
2635 l.index = storage->index;
2636 l.reladdr = NULL;
2637 l.writemask = WRITEMASK_XYZW;
2638 l.cond_mask = COND_TR;
2639
2640 for (i = 0; i < type_size(param->type); i++) {
2641 emit(ir, TGSI_OPCODE_MOV, l, r);
2642 l.index++;
2643 r.index++;
2644 }
2645 }
2646 }
2647
2648 /* Emit call instruction */
2649 call_inst = emit(ir, TGSI_OPCODE_CAL);
2650 call_inst->function = entry;
2651
2652 /* Process out parameters. */
2653 foreach_two_lists(formal_node, &sig->parameters,
2654 actual_node, &ir->actual_parameters) {
2655 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2656 ir_variable *param = (ir_variable *) formal_node;
2657
2658 if (param->data.mode == ir_var_function_out ||
2659 param->data.mode == ir_var_function_inout) {
2660 variable_storage *storage = find_variable_storage(param);
2661 assert(storage);
2662
2663 st_src_reg r;
2664 r.file = storage->file;
2665 r.index = storage->index;
2666 r.reladdr = NULL;
2667 r.swizzle = SWIZZLE_NOOP;
2668 r.negate = 0;
2669
2670 param_rval->accept(this);
2671 st_dst_reg l = st_dst_reg(this->result);
2672
2673 for (i = 0; i < type_size(param->type); i++) {
2674 emit(ir, TGSI_OPCODE_MOV, l, r);
2675 l.index++;
2676 r.index++;
2677 }
2678 }
2679 }
2680
2681 /* Process return value. */
2682 this->result = entry->return_reg;
2683 }
2684
2685 void
2686 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2687 {
2688 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset, sample_index;
2689 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2690 glsl_to_tgsi_instruction *inst = NULL;
2691 unsigned opcode = TGSI_OPCODE_NOP;
2692 const glsl_type *sampler_type = ir->sampler->type;
2693 bool is_cube_array = false;
2694
2695 /* if we are a cube array sampler */
2696 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2697 sampler_type->sampler_array)) {
2698 is_cube_array = true;
2699 }
2700
2701 if (ir->coordinate) {
2702 ir->coordinate->accept(this);
2703
2704 /* Put our coords in a temp. We'll need to modify them for shadow,
2705 * projection, or LOD, so the only case we'd use it as is is if
2706 * we're doing plain old texturing. The optimization passes on
2707 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2708 */
2709 coord = get_temp(glsl_type::vec4_type);
2710 coord_dst = st_dst_reg(coord);
2711 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2712 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2713 }
2714
2715 if (ir->projector) {
2716 ir->projector->accept(this);
2717 projector = this->result;
2718 }
2719
2720 /* Storage for our result. Ideally for an assignment we'd be using
2721 * the actual storage for the result here, instead.
2722 */
2723 result_src = get_temp(ir->type);
2724 result_dst = st_dst_reg(result_src);
2725
2726 switch (ir->op) {
2727 case ir_tex:
2728 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2729 if (ir->offset) {
2730 ir->offset->accept(this);
2731 offset = this->result;
2732 }
2733 break;
2734 case ir_txb:
2735 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2736 ir->lod_info.bias->accept(this);
2737 lod_info = this->result;
2738 if (ir->offset) {
2739 ir->offset->accept(this);
2740 offset = this->result;
2741 }
2742 break;
2743 case ir_txl:
2744 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2745 ir->lod_info.lod->accept(this);
2746 lod_info = this->result;
2747 if (ir->offset) {
2748 ir->offset->accept(this);
2749 offset = this->result;
2750 }
2751 break;
2752 case ir_txd:
2753 opcode = TGSI_OPCODE_TXD;
2754 ir->lod_info.grad.dPdx->accept(this);
2755 dx = this->result;
2756 ir->lod_info.grad.dPdy->accept(this);
2757 dy = this->result;
2758 if (ir->offset) {
2759 ir->offset->accept(this);
2760 offset = this->result;
2761 }
2762 break;
2763 case ir_txs:
2764 opcode = TGSI_OPCODE_TXQ;
2765 ir->lod_info.lod->accept(this);
2766 lod_info = this->result;
2767 break;
2768 case ir_txf:
2769 opcode = TGSI_OPCODE_TXF;
2770 ir->lod_info.lod->accept(this);
2771 lod_info = this->result;
2772 if (ir->offset) {
2773 ir->offset->accept(this);
2774 offset = this->result;
2775 }
2776 break;
2777 case ir_txf_ms:
2778 opcode = TGSI_OPCODE_TXF;
2779 ir->lod_info.sample_index->accept(this);
2780 sample_index = this->result;
2781 break;
2782 case ir_lod:
2783 assert(!"Unexpected ir_lod opcode");
2784 break;
2785 case ir_tg4:
2786 assert(!"Unexpected ir_tg4 opcode");
2787 break;
2788 case ir_query_levels:
2789 assert(!"Unexpected ir_query_levels opcode");
2790 break;
2791 }
2792
2793 if (ir->projector) {
2794 if (opcode == TGSI_OPCODE_TEX) {
2795 /* Slot the projector in as the last component of the coord. */
2796 coord_dst.writemask = WRITEMASK_W;
2797 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2798 coord_dst.writemask = WRITEMASK_XYZW;
2799 opcode = TGSI_OPCODE_TXP;
2800 } else {
2801 st_src_reg coord_w = coord;
2802 coord_w.swizzle = SWIZZLE_WWWW;
2803
2804 /* For the other TEX opcodes there's no projective version
2805 * since the last slot is taken up by LOD info. Do the
2806 * projective divide now.
2807 */
2808 coord_dst.writemask = WRITEMASK_W;
2809 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2810
2811 /* In the case where we have to project the coordinates "by hand,"
2812 * the shadow comparator value must also be projected.
2813 */
2814 st_src_reg tmp_src = coord;
2815 if (ir->shadow_comparitor) {
2816 /* Slot the shadow value in as the second to last component of the
2817 * coord.
2818 */
2819 ir->shadow_comparitor->accept(this);
2820
2821 tmp_src = get_temp(glsl_type::vec4_type);
2822 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2823
2824 /* Projective division not allowed for array samplers. */
2825 assert(!sampler_type->sampler_array);
2826
2827 tmp_dst.writemask = WRITEMASK_Z;
2828 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2829
2830 tmp_dst.writemask = WRITEMASK_XY;
2831 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2832 }
2833
2834 coord_dst.writemask = WRITEMASK_XYZ;
2835 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2836
2837 coord_dst.writemask = WRITEMASK_XYZW;
2838 coord.swizzle = SWIZZLE_XYZW;
2839 }
2840 }
2841
2842 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2843 * comparator was put in the correct place (and projected) by the code,
2844 * above, that handles by-hand projection.
2845 */
2846 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2847 /* Slot the shadow value in as the second to last component of the
2848 * coord.
2849 */
2850 ir->shadow_comparitor->accept(this);
2851
2852 if (is_cube_array) {
2853 cube_sc = get_temp(glsl_type::float_type);
2854 cube_sc_dst = st_dst_reg(cube_sc);
2855 cube_sc_dst.writemask = WRITEMASK_X;
2856 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2857 cube_sc_dst.writemask = WRITEMASK_X;
2858 }
2859 else {
2860 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2861 sampler_type->sampler_array) ||
2862 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2863 coord_dst.writemask = WRITEMASK_W;
2864 } else {
2865 coord_dst.writemask = WRITEMASK_Z;
2866 }
2867
2868 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2869 coord_dst.writemask = WRITEMASK_XYZW;
2870 }
2871 }
2872
2873 if (ir->op == ir_txf_ms) {
2874 coord_dst.writemask = WRITEMASK_W;
2875 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2876 coord_dst.writemask = WRITEMASK_XYZW;
2877 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2878 opcode == TGSI_OPCODE_TXF) {
2879 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2880 coord_dst.writemask = WRITEMASK_W;
2881 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2882 coord_dst.writemask = WRITEMASK_XYZW;
2883 }
2884
2885 if (opcode == TGSI_OPCODE_TXD)
2886 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2887 else if (opcode == TGSI_OPCODE_TXQ)
2888 inst = emit(ir, opcode, result_dst, lod_info);
2889 else if (opcode == TGSI_OPCODE_TXF) {
2890 inst = emit(ir, opcode, result_dst, coord);
2891 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2892 inst = emit(ir, opcode, result_dst, coord, lod_info);
2893 } else if (opcode == TGSI_OPCODE_TEX2) {
2894 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2895 } else
2896 inst = emit(ir, opcode, result_dst, coord);
2897
2898 if (ir->shadow_comparitor)
2899 inst->tex_shadow = GL_TRUE;
2900
2901 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2902 this->shader_program,
2903 this->prog);
2904
2905 if (ir->offset) {
2906 inst->tex_offset_num_offset = 1;
2907 inst->tex_offsets[0].Index = offset.index;
2908 inst->tex_offsets[0].File = offset.file;
2909 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2910 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2911 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2912 }
2913
2914 switch (sampler_type->sampler_dimensionality) {
2915 case GLSL_SAMPLER_DIM_1D:
2916 inst->tex_target = (sampler_type->sampler_array)
2917 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2918 break;
2919 case GLSL_SAMPLER_DIM_2D:
2920 inst->tex_target = (sampler_type->sampler_array)
2921 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2922 break;
2923 case GLSL_SAMPLER_DIM_3D:
2924 inst->tex_target = TEXTURE_3D_INDEX;
2925 break;
2926 case GLSL_SAMPLER_DIM_CUBE:
2927 inst->tex_target = (sampler_type->sampler_array)
2928 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2929 break;
2930 case GLSL_SAMPLER_DIM_RECT:
2931 inst->tex_target = TEXTURE_RECT_INDEX;
2932 break;
2933 case GLSL_SAMPLER_DIM_BUF:
2934 inst->tex_target = TEXTURE_BUFFER_INDEX;
2935 break;
2936 case GLSL_SAMPLER_DIM_EXTERNAL:
2937 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2938 break;
2939 case GLSL_SAMPLER_DIM_MS:
2940 inst->tex_target = (sampler_type->sampler_array)
2941 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
2942 break;
2943 default:
2944 assert(!"Should not get here.");
2945 }
2946
2947 this->result = result_src;
2948 }
2949
2950 void
2951 glsl_to_tgsi_visitor::visit(ir_return *ir)
2952 {
2953 if (ir->get_value()) {
2954 st_dst_reg l;
2955 int i;
2956
2957 assert(current_function);
2958
2959 ir->get_value()->accept(this);
2960 st_src_reg r = this->result;
2961
2962 l = st_dst_reg(current_function->return_reg);
2963
2964 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2965 emit(ir, TGSI_OPCODE_MOV, l, r);
2966 l.index++;
2967 r.index++;
2968 }
2969 }
2970
2971 emit(ir, TGSI_OPCODE_RET);
2972 }
2973
2974 void
2975 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2976 {
2977 if (ir->condition) {
2978 ir->condition->accept(this);
2979 this->result.negate = ~this->result.negate;
2980 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
2981 } else {
2982 /* unconditional kil */
2983 emit(ir, TGSI_OPCODE_KILL);
2984 }
2985 }
2986
2987 void
2988 glsl_to_tgsi_visitor::visit(ir_if *ir)
2989 {
2990 unsigned if_opcode;
2991 glsl_to_tgsi_instruction *if_inst;
2992
2993 ir->condition->accept(this);
2994 assert(this->result.file != PROGRAM_UNDEFINED);
2995
2996 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
2997
2998 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
2999
3000 this->instructions.push_tail(if_inst);
3001
3002 visit_exec_list(&ir->then_instructions, this);
3003
3004 if (!ir->else_instructions.is_empty()) {
3005 emit(ir->condition, TGSI_OPCODE_ELSE);
3006 visit_exec_list(&ir->else_instructions, this);
3007 }
3008
3009 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3010 }
3011
3012
3013 void
3014 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3015 {
3016 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3017 emit(ir, TGSI_OPCODE_EMIT);
3018 }
3019
3020 void
3021 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3022 {
3023 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3024 emit(ir, TGSI_OPCODE_ENDPRIM);
3025 }
3026
3027 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3028 {
3029 result.file = PROGRAM_UNDEFINED;
3030 next_temp = 1;
3031 next_array = 0;
3032 next_signature_id = 1;
3033 num_immediates = 0;
3034 current_function = NULL;
3035 num_address_regs = 0;
3036 samplers_used = 0;
3037 indirect_addr_consts = false;
3038 glsl_version = 0;
3039 native_integers = false;
3040 mem_ctx = ralloc_context(NULL);
3041 ctx = NULL;
3042 prog = NULL;
3043 shader_program = NULL;
3044 options = NULL;
3045 }
3046
3047 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3048 {
3049 ralloc_free(mem_ctx);
3050 }
3051
3052 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3053 {
3054 delete v;
3055 }
3056
3057
3058 /**
3059 * Count resources used by the given gpu program (number of texture
3060 * samplers, etc).
3061 */
3062 static void
3063 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3064 {
3065 v->samplers_used = 0;
3066
3067 foreach_list(node, &v->instructions) {
3068 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3069
3070 if (is_tex_instruction(inst->op)) {
3071 v->samplers_used |= 1 << inst->sampler;
3072
3073 if (inst->tex_shadow) {
3074 prog->ShadowSamplers |= 1 << inst->sampler;
3075 }
3076 }
3077 }
3078
3079 prog->SamplersUsed = v->samplers_used;
3080
3081 if (v->shader_program != NULL)
3082 _mesa_update_shader_textures_used(v->shader_program, prog);
3083 }
3084
3085 static void
3086 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3087 struct gl_shader_program *shader_program,
3088 const char *name, const glsl_type *type,
3089 ir_constant *val)
3090 {
3091 if (type->is_record()) {
3092 ir_constant *field_constant;
3093
3094 field_constant = (ir_constant *)val->components.get_head();
3095
3096 for (unsigned int i = 0; i < type->length; i++) {
3097 const glsl_type *field_type = type->fields.structure[i].type;
3098 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3099 type->fields.structure[i].name);
3100 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3101 field_type, field_constant);
3102 field_constant = (ir_constant *)field_constant->next;
3103 }
3104 return;
3105 }
3106
3107 unsigned offset;
3108 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3109 &offset);
3110 if (offset == GL_INVALID_INDEX) {
3111 fail_link(shader_program,
3112 "Couldn't find uniform for initializer %s\n", name);
3113 return;
3114 }
3115 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3116
3117 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3118 ir_constant *element;
3119 const glsl_type *element_type;
3120 if (type->is_array()) {
3121 element = val->array_elements[i];
3122 element_type = type->fields.array;
3123 } else {
3124 element = val;
3125 element_type = type;
3126 }
3127
3128 void *values;
3129
3130 if (element_type->base_type == GLSL_TYPE_BOOL) {
3131 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3132 for (unsigned int j = 0; j < element_type->components(); j++) {
3133 conv[j] = element->value.b[j];
3134 }
3135 values = (void *)conv;
3136 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3137 element_type->vector_elements,
3138 1);
3139 } else {
3140 values = &element->value;
3141 }
3142
3143 if (element_type->is_matrix()) {
3144 _mesa_uniform_matrix(ctx, shader_program,
3145 element_type->matrix_columns,
3146 element_type->vector_elements,
3147 loc, 1, GL_FALSE, (GLfloat *)values);
3148 } else {
3149 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3150 values, element_type->gl_type);
3151 }
3152
3153 loc++;
3154 }
3155 }
3156
3157 /**
3158 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3159 * are read from the given src in this instruction
3160 */
3161 static int
3162 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3163 {
3164 int read_mask = 0, comp;
3165
3166 /* Now, given the src swizzle and the written channels, find which
3167 * components are actually read
3168 */
3169 for (comp = 0; comp < 4; ++comp) {
3170 const unsigned coord = GET_SWZ(src.swizzle, comp);
3171 ASSERT(coord < 4);
3172 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3173 read_mask |= 1 << coord;
3174 }
3175
3176 return read_mask;
3177 }
3178
3179 /**
3180 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3181 * instruction is the first instruction to write to register T0. There are
3182 * several lowering passes done in GLSL IR (e.g. branches and
3183 * relative addressing) that create a large number of conditional assignments
3184 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3185 *
3186 * Here is why this conversion is safe:
3187 * CMP T0, T1 T2 T0 can be expanded to:
3188 * if (T1 < 0.0)
3189 * MOV T0, T2;
3190 * else
3191 * MOV T0, T0;
3192 *
3193 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3194 * as the original program. If (T1 < 0.0) evaluates to false, executing
3195 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3196 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3197 * because any instruction that was going to read from T0 after this was going
3198 * to read a garbage value anyway.
3199 */
3200 void
3201 glsl_to_tgsi_visitor::simplify_cmp(void)
3202 {
3203 unsigned *tempWrites;
3204 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3205
3206 tempWrites = new unsigned[MAX_TEMPS];
3207 if (!tempWrites) {
3208 return;
3209 }
3210 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3211 memset(outputWrites, 0, sizeof(outputWrites));
3212
3213 foreach_list(node, &this->instructions) {
3214 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3215 unsigned prevWriteMask = 0;
3216
3217 /* Give up if we encounter relative addressing or flow control. */
3218 if (inst->dst.reladdr ||
3219 tgsi_get_opcode_info(inst->op)->is_branch ||
3220 inst->op == TGSI_OPCODE_BGNSUB ||
3221 inst->op == TGSI_OPCODE_CONT ||
3222 inst->op == TGSI_OPCODE_END ||
3223 inst->op == TGSI_OPCODE_ENDSUB ||
3224 inst->op == TGSI_OPCODE_RET) {
3225 break;
3226 }
3227
3228 if (inst->dst.file == PROGRAM_OUTPUT) {
3229 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3230 prevWriteMask = outputWrites[inst->dst.index];
3231 outputWrites[inst->dst.index] |= inst->dst.writemask;
3232 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3233 assert(inst->dst.index < MAX_TEMPS);
3234 prevWriteMask = tempWrites[inst->dst.index];
3235 tempWrites[inst->dst.index] |= inst->dst.writemask;
3236 } else
3237 continue;
3238
3239 /* For a CMP to be considered a conditional write, the destination
3240 * register and source register two must be the same. */
3241 if (inst->op == TGSI_OPCODE_CMP
3242 && !(inst->dst.writemask & prevWriteMask)
3243 && inst->src[2].file == inst->dst.file
3244 && inst->src[2].index == inst->dst.index
3245 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3246
3247 inst->op = TGSI_OPCODE_MOV;
3248 inst->src[0] = inst->src[1];
3249 }
3250 }
3251
3252 delete [] tempWrites;
3253 }
3254
3255 /* Replaces all references to a temporary register index with another index. */
3256 void
3257 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3258 {
3259 foreach_list(node, &this->instructions) {
3260 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3261 unsigned j;
3262
3263 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3264 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3265 inst->src[j].index == index) {
3266 inst->src[j].index = new_index;
3267 }
3268 }
3269
3270 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3271 inst->dst.index = new_index;
3272 }
3273 }
3274 }
3275
3276 int
3277 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3278 {
3279 int depth = 0; /* loop depth */
3280 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3281 unsigned i = 0, j;
3282
3283 foreach_list(node, &this->instructions) {
3284 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3285
3286 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3287 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3288 inst->src[j].index == index) {
3289 return (depth == 0) ? i : loop_start;
3290 }
3291 }
3292
3293 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3294 if(depth++ == 0)
3295 loop_start = i;
3296 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3297 if (--depth == 0)
3298 loop_start = -1;
3299 }
3300 assert(depth >= 0);
3301
3302 i++;
3303 }
3304
3305 return -1;
3306 }
3307
3308 int
3309 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3310 {
3311 int depth = 0; /* loop depth */
3312 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3313 int i = 0;
3314
3315 foreach_list(node, &this->instructions) {
3316 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3317
3318 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3319 return (depth == 0) ? i : loop_start;
3320 }
3321
3322 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3323 if(depth++ == 0)
3324 loop_start = i;
3325 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3326 if (--depth == 0)
3327 loop_start = -1;
3328 }
3329 assert(depth >= 0);
3330
3331 i++;
3332 }
3333
3334 return -1;
3335 }
3336
3337 int
3338 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3339 {
3340 int depth = 0; /* loop depth */
3341 int last = -1; /* index of last instruction that reads the temporary */
3342 unsigned i = 0, j;
3343
3344 foreach_list(node, &this->instructions) {
3345 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3346
3347 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3348 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3349 inst->src[j].index == index) {
3350 last = (depth == 0) ? i : -2;
3351 }
3352 }
3353
3354 if (inst->op == TGSI_OPCODE_BGNLOOP)
3355 depth++;
3356 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3357 if (--depth == 0 && last == -2)
3358 last = i;
3359 assert(depth >= 0);
3360
3361 i++;
3362 }
3363
3364 assert(last >= -1);
3365 return last;
3366 }
3367
3368 int
3369 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3370 {
3371 int depth = 0; /* loop depth */
3372 int last = -1; /* index of last instruction that writes to the temporary */
3373 int i = 0;
3374
3375 foreach_list(node, &this->instructions) {
3376 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3377
3378 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3379 last = (depth == 0) ? i : -2;
3380
3381 if (inst->op == TGSI_OPCODE_BGNLOOP)
3382 depth++;
3383 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3384 if (--depth == 0 && last == -2)
3385 last = i;
3386 assert(depth >= 0);
3387
3388 i++;
3389 }
3390
3391 assert(last >= -1);
3392 return last;
3393 }
3394
3395 /*
3396 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3397 * channels for copy propagation and updates following instructions to
3398 * use the original versions.
3399 *
3400 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3401 * will occur. As an example, a TXP production before this pass:
3402 *
3403 * 0: MOV TEMP[1], INPUT[4].xyyy;
3404 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3405 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3406 *
3407 * and after:
3408 *
3409 * 0: MOV TEMP[1], INPUT[4].xyyy;
3410 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3411 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3412 *
3413 * which allows for dead code elimination on TEMP[1]'s writes.
3414 */
3415 void
3416 glsl_to_tgsi_visitor::copy_propagate(void)
3417 {
3418 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3419 glsl_to_tgsi_instruction *,
3420 this->next_temp * 4);
3421 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3422 int level = 0;
3423
3424 foreach_list(node, &this->instructions) {
3425 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3426
3427 assert(inst->dst.file != PROGRAM_TEMPORARY
3428 || inst->dst.index < this->next_temp);
3429
3430 /* First, do any copy propagation possible into the src regs. */
3431 for (int r = 0; r < 3; r++) {
3432 glsl_to_tgsi_instruction *first = NULL;
3433 bool good = true;
3434 int acp_base = inst->src[r].index * 4;
3435
3436 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3437 inst->src[r].reladdr ||
3438 inst->src[r].reladdr2)
3439 continue;
3440
3441 /* See if we can find entries in the ACP consisting of MOVs
3442 * from the same src register for all the swizzled channels
3443 * of this src register reference.
3444 */
3445 for (int i = 0; i < 4; i++) {
3446 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3447 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3448
3449 if (!copy_chan) {
3450 good = false;
3451 break;
3452 }
3453
3454 assert(acp_level[acp_base + src_chan] <= level);
3455
3456 if (!first) {
3457 first = copy_chan;
3458 } else {
3459 if (first->src[0].file != copy_chan->src[0].file ||
3460 first->src[0].index != copy_chan->src[0].index) {
3461 good = false;
3462 break;
3463 }
3464 }
3465 }
3466
3467 if (good) {
3468 /* We've now validated that we can copy-propagate to
3469 * replace this src register reference. Do it.
3470 */
3471 inst->src[r].file = first->src[0].file;
3472 inst->src[r].index = first->src[0].index;
3473 inst->src[r].index2D = first->src[0].index2D;
3474 inst->src[r].has_index2 = first->src[0].has_index2;
3475
3476 int swizzle = 0;
3477 for (int i = 0; i < 4; i++) {
3478 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3479 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3480 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3481 (3 * i));
3482 }
3483 inst->src[r].swizzle = swizzle;
3484 }
3485 }
3486
3487 switch (inst->op) {
3488 case TGSI_OPCODE_BGNLOOP:
3489 case TGSI_OPCODE_ENDLOOP:
3490 /* End of a basic block, clear the ACP entirely. */
3491 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3492 break;
3493
3494 case TGSI_OPCODE_IF:
3495 case TGSI_OPCODE_UIF:
3496 ++level;
3497 break;
3498
3499 case TGSI_OPCODE_ENDIF:
3500 case TGSI_OPCODE_ELSE:
3501 /* Clear all channels written inside the block from the ACP, but
3502 * leaving those that were not touched.
3503 */
3504 for (int r = 0; r < this->next_temp; r++) {
3505 for (int c = 0; c < 4; c++) {
3506 if (!acp[4 * r + c])
3507 continue;
3508
3509 if (acp_level[4 * r + c] >= level)
3510 acp[4 * r + c] = NULL;
3511 }
3512 }
3513 if (inst->op == TGSI_OPCODE_ENDIF)
3514 --level;
3515 break;
3516
3517 default:
3518 /* Continuing the block, clear any written channels from
3519 * the ACP.
3520 */
3521 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3522 /* Any temporary might be written, so no copy propagation
3523 * across this instruction.
3524 */
3525 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3526 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3527 inst->dst.reladdr) {
3528 /* Any output might be written, so no copy propagation
3529 * from outputs across this instruction.
3530 */
3531 for (int r = 0; r < this->next_temp; r++) {
3532 for (int c = 0; c < 4; c++) {
3533 if (!acp[4 * r + c])
3534 continue;
3535
3536 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3537 acp[4 * r + c] = NULL;
3538 }
3539 }
3540 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3541 inst->dst.file == PROGRAM_OUTPUT) {
3542 /* Clear where it's used as dst. */
3543 if (inst->dst.file == PROGRAM_TEMPORARY) {
3544 for (int c = 0; c < 4; c++) {
3545 if (inst->dst.writemask & (1 << c)) {
3546 acp[4 * inst->dst.index + c] = NULL;
3547 }
3548 }
3549 }
3550
3551 /* Clear where it's used as src. */
3552 for (int r = 0; r < this->next_temp; r++) {
3553 for (int c = 0; c < 4; c++) {
3554 if (!acp[4 * r + c])
3555 continue;
3556
3557 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3558
3559 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3560 acp[4 * r + c]->src[0].index == inst->dst.index &&
3561 inst->dst.writemask & (1 << src_chan))
3562 {
3563 acp[4 * r + c] = NULL;
3564 }
3565 }
3566 }
3567 }
3568 break;
3569 }
3570
3571 /* If this is a copy, add it to the ACP. */
3572 if (inst->op == TGSI_OPCODE_MOV &&
3573 inst->dst.file == PROGRAM_TEMPORARY &&
3574 !(inst->dst.file == inst->src[0].file &&
3575 inst->dst.index == inst->src[0].index) &&
3576 !inst->dst.reladdr &&
3577 !inst->saturate &&
3578 !inst->src[0].reladdr &&
3579 !inst->src[0].reladdr2 &&
3580 !inst->src[0].negate) {
3581 for (int i = 0; i < 4; i++) {
3582 if (inst->dst.writemask & (1 << i)) {
3583 acp[4 * inst->dst.index + i] = inst;
3584 acp_level[4 * inst->dst.index + i] = level;
3585 }
3586 }
3587 }
3588 }
3589
3590 ralloc_free(acp_level);
3591 ralloc_free(acp);
3592 }
3593
3594 /*
3595 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3596 *
3597 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3598 * will occur. As an example, a TXP production after copy propagation but
3599 * before this pass:
3600 *
3601 * 0: MOV TEMP[1], INPUT[4].xyyy;
3602 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3603 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3604 *
3605 * and after this pass:
3606 *
3607 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3608 *
3609 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3610 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3611 */
3612 void
3613 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3614 {
3615 int i;
3616
3617 for (i=0; i < this->next_temp; i++) {
3618 int last_read = get_last_temp_read(i);
3619 int j = 0;
3620
3621 foreach_list_safe(node, &this->instructions) {
3622 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3623
3624 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3625 j > last_read)
3626 {
3627 inst->remove();
3628 delete inst;
3629 }
3630
3631 j++;
3632 }
3633 }
3634 }
3635
3636 /*
3637 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3638 * code elimination. This is less primitive than eliminate_dead_code(), as it
3639 * is per-channel and can detect consecutive writes without a read between them
3640 * as dead code. However, there is some dead code that can be eliminated by
3641 * eliminate_dead_code() but not this function - for example, this function
3642 * cannot eliminate an instruction writing to a register that is never read and
3643 * is the only instruction writing to that register.
3644 *
3645 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3646 * will occur.
3647 */
3648 int
3649 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3650 {
3651 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3652 glsl_to_tgsi_instruction *,
3653 this->next_temp * 4);
3654 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3655 int level = 0;
3656 int removed = 0;
3657
3658 foreach_list(node, &this->instructions) {
3659 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3660
3661 assert(inst->dst.file != PROGRAM_TEMPORARY
3662 || inst->dst.index < this->next_temp);
3663
3664 switch (inst->op) {
3665 case TGSI_OPCODE_BGNLOOP:
3666 case TGSI_OPCODE_ENDLOOP:
3667 case TGSI_OPCODE_CONT:
3668 case TGSI_OPCODE_BRK:
3669 /* End of a basic block, clear the write array entirely.
3670 *
3671 * This keeps us from killing dead code when the writes are
3672 * on either side of a loop, even when the register isn't touched
3673 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3674 * dead code of this type, so it shouldn't make a difference as long as
3675 * the dead code elimination pass in the GLSL compiler does its job.
3676 */
3677 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3678 break;
3679
3680 case TGSI_OPCODE_ENDIF:
3681 case TGSI_OPCODE_ELSE:
3682 /* Promote the recorded level of all channels written inside the
3683 * preceding if or else block to the level above the if/else block.
3684 */
3685 for (int r = 0; r < this->next_temp; r++) {
3686 for (int c = 0; c < 4; c++) {
3687 if (!writes[4 * r + c])
3688 continue;
3689
3690 if (write_level[4 * r + c] == level)
3691 write_level[4 * r + c] = level-1;
3692 }
3693 }
3694
3695 if(inst->op == TGSI_OPCODE_ENDIF)
3696 --level;
3697
3698 break;
3699
3700 case TGSI_OPCODE_IF:
3701 case TGSI_OPCODE_UIF:
3702 ++level;
3703 /* fallthrough to default case to mark the condition as read */
3704
3705 default:
3706 /* Continuing the block, clear any channels from the write array that
3707 * are read by this instruction.
3708 */
3709 for (unsigned i = 0; i < Elements(inst->src); i++) {
3710 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3711 /* Any temporary might be read, so no dead code elimination
3712 * across this instruction.
3713 */
3714 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3715 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3716 /* Clear where it's used as src. */
3717 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3718 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3719 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3720 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3721
3722 for (int c = 0; c < 4; c++) {
3723 if (src_chans & (1 << c)) {
3724 writes[4 * inst->src[i].index + c] = NULL;
3725 }
3726 }
3727 }
3728 }
3729 break;
3730 }
3731
3732 /* If this instruction writes to a temporary, add it to the write array.
3733 * If there is already an instruction in the write array for one or more
3734 * of the channels, flag that channel write as dead.
3735 */
3736 if (inst->dst.file == PROGRAM_TEMPORARY &&
3737 !inst->dst.reladdr &&
3738 !inst->saturate) {
3739 for (int c = 0; c < 4; c++) {
3740 if (inst->dst.writemask & (1 << c)) {
3741 if (writes[4 * inst->dst.index + c]) {
3742 if (write_level[4 * inst->dst.index + c] < level)
3743 continue;
3744 else
3745 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3746 }
3747 writes[4 * inst->dst.index + c] = inst;
3748 write_level[4 * inst->dst.index + c] = level;
3749 }
3750 }
3751 }
3752 }
3753
3754 /* Anything still in the write array at this point is dead code. */
3755 for (int r = 0; r < this->next_temp; r++) {
3756 for (int c = 0; c < 4; c++) {
3757 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3758 if (inst)
3759 inst->dead_mask |= (1 << c);
3760 }
3761 }
3762
3763 /* Now actually remove the instructions that are completely dead and update
3764 * the writemask of other instructions with dead channels.
3765 */
3766 foreach_list_safe(node, &this->instructions) {
3767 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3768
3769 if (!inst->dead_mask || !inst->dst.writemask)
3770 continue;
3771 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3772 inst->remove();
3773 delete inst;
3774 removed++;
3775 } else
3776 inst->dst.writemask &= ~(inst->dead_mask);
3777 }
3778
3779 ralloc_free(write_level);
3780 ralloc_free(writes);
3781
3782 return removed;
3783 }
3784
3785 /* Merges temporary registers together where possible to reduce the number of
3786 * registers needed to run a program.
3787 *
3788 * Produces optimal code only after copy propagation and dead code elimination
3789 * have been run. */
3790 void
3791 glsl_to_tgsi_visitor::merge_registers(void)
3792 {
3793 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3794 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3795 int i, j;
3796
3797 /* Read the indices of the last read and first write to each temp register
3798 * into an array so that we don't have to traverse the instruction list as
3799 * much. */
3800 for (i=0; i < this->next_temp; i++) {
3801 last_reads[i] = get_last_temp_read(i);
3802 first_writes[i] = get_first_temp_write(i);
3803 }
3804
3805 /* Start looking for registers with non-overlapping usages that can be
3806 * merged together. */
3807 for (i=0; i < this->next_temp; i++) {
3808 /* Don't touch unused registers. */
3809 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3810
3811 for (j=0; j < this->next_temp; j++) {
3812 /* Don't touch unused registers. */
3813 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3814
3815 /* We can merge the two registers if the first write to j is after or
3816 * in the same instruction as the last read from i. Note that the
3817 * register at index i will always be used earlier or at the same time
3818 * as the register at index j. */
3819 if (first_writes[i] <= first_writes[j] &&
3820 last_reads[i] <= first_writes[j])
3821 {
3822 rename_temp_register(j, i); /* Replace all references to j with i.*/
3823
3824 /* Update the first_writes and last_reads arrays with the new
3825 * values for the merged register index, and mark the newly unused
3826 * register index as such. */
3827 last_reads[i] = last_reads[j];
3828 first_writes[j] = -1;
3829 last_reads[j] = -1;
3830 }
3831 }
3832 }
3833
3834 ralloc_free(last_reads);
3835 ralloc_free(first_writes);
3836 }
3837
3838 /* Reassign indices to temporary registers by reusing unused indices created
3839 * by optimization passes. */
3840 void
3841 glsl_to_tgsi_visitor::renumber_registers(void)
3842 {
3843 int i = 0;
3844 int new_index = 0;
3845
3846 for (i=0; i < this->next_temp; i++) {
3847 if (get_first_temp_read(i) < 0) continue;
3848 if (i != new_index)
3849 rename_temp_register(i, new_index);
3850 new_index++;
3851 }
3852
3853 this->next_temp = new_index;
3854 }
3855
3856 /**
3857 * Returns a fragment program which implements the current pixel transfer ops.
3858 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3859 */
3860 extern "C" void
3861 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3862 glsl_to_tgsi_visitor *original,
3863 int scale_and_bias, int pixel_maps)
3864 {
3865 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3866 struct st_context *st = st_context(original->ctx);
3867 struct gl_program *prog = &fp->Base.Base;
3868 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3869 st_src_reg coord, src0;
3870 st_dst_reg dst0;
3871 glsl_to_tgsi_instruction *inst;
3872
3873 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3874 v->ctx = original->ctx;
3875 v->prog = prog;
3876 v->shader_program = NULL;
3877 v->glsl_version = original->glsl_version;
3878 v->native_integers = original->native_integers;
3879 v->options = original->options;
3880 v->next_temp = original->next_temp;
3881 v->num_address_regs = original->num_address_regs;
3882 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3883 v->indirect_addr_consts = original->indirect_addr_consts;
3884 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3885 v->num_immediates = original->num_immediates;
3886
3887 /*
3888 * Get initial pixel color from the texture.
3889 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3890 */
3891 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3892 src0 = v->get_temp(glsl_type::vec4_type);
3893 dst0 = st_dst_reg(src0);
3894 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3895 inst->sampler = 0;
3896 inst->tex_target = TEXTURE_2D_INDEX;
3897
3898 prog->InputsRead |= VARYING_BIT_TEX0;
3899 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3900 v->samplers_used |= (1 << 0);
3901
3902 if (scale_and_bias) {
3903 static const gl_state_index scale_state[STATE_LENGTH] =
3904 { STATE_INTERNAL, STATE_PT_SCALE,
3905 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3906 static const gl_state_index bias_state[STATE_LENGTH] =
3907 { STATE_INTERNAL, STATE_PT_BIAS,
3908 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3909 GLint scale_p, bias_p;
3910 st_src_reg scale, bias;
3911
3912 scale_p = _mesa_add_state_reference(params, scale_state);
3913 bias_p = _mesa_add_state_reference(params, bias_state);
3914
3915 /* MAD colorTemp, colorTemp, scale, bias; */
3916 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3917 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3918 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3919 }
3920
3921 if (pixel_maps) {
3922 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3923 st_dst_reg temp_dst = st_dst_reg(temp);
3924
3925 assert(st->pixel_xfer.pixelmap_texture);
3926
3927 /* With a little effort, we can do four pixel map look-ups with
3928 * two TEX instructions:
3929 */
3930
3931 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3932 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3933 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3934 inst->sampler = 1;
3935 inst->tex_target = TEXTURE_2D_INDEX;
3936
3937 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3938 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3939 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3940 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3941 inst->sampler = 1;
3942 inst->tex_target = TEXTURE_2D_INDEX;
3943
3944 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3945 v->samplers_used |= (1 << 1);
3946
3947 /* MOV colorTemp, temp; */
3948 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3949 }
3950
3951 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3952 * new visitor. */
3953 foreach_list(node, &original->instructions) {
3954 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
3955 glsl_to_tgsi_instruction *newinst;
3956 st_src_reg src_regs[3];
3957
3958 if (inst->dst.file == PROGRAM_OUTPUT)
3959 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3960
3961 for (int i=0; i<3; i++) {
3962 src_regs[i] = inst->src[i];
3963 if (src_regs[i].file == PROGRAM_INPUT &&
3964 src_regs[i].index == VARYING_SLOT_COL0)
3965 {
3966 src_regs[i].file = PROGRAM_TEMPORARY;
3967 src_regs[i].index = src0.index;
3968 }
3969 else if (src_regs[i].file == PROGRAM_INPUT)
3970 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3971 }
3972
3973 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3974 newinst->tex_target = inst->tex_target;
3975 }
3976
3977 /* Make modifications to fragment program info. */
3978 prog->Parameters = _mesa_combine_parameter_lists(params,
3979 original->prog->Parameters);
3980 _mesa_free_parameter_list(params);
3981 count_resources(v, prog);
3982 fp->glsl_to_tgsi = v;
3983 }
3984
3985 /**
3986 * Make fragment program for glBitmap:
3987 * Sample the texture and kill the fragment if the bit is 0.
3988 * This program will be combined with the user's fragment program.
3989 *
3990 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3991 */
3992 extern "C" void
3993 get_bitmap_visitor(struct st_fragment_program *fp,
3994 glsl_to_tgsi_visitor *original, int samplerIndex)
3995 {
3996 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3997 struct st_context *st = st_context(original->ctx);
3998 struct gl_program *prog = &fp->Base.Base;
3999 st_src_reg coord, src0;
4000 st_dst_reg dst0;
4001 glsl_to_tgsi_instruction *inst;
4002
4003 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4004 v->ctx = original->ctx;
4005 v->prog = prog;
4006 v->shader_program = NULL;
4007 v->glsl_version = original->glsl_version;
4008 v->native_integers = original->native_integers;
4009 v->options = original->options;
4010 v->next_temp = original->next_temp;
4011 v->num_address_regs = original->num_address_regs;
4012 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4013 v->indirect_addr_consts = original->indirect_addr_consts;
4014 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4015 v->num_immediates = original->num_immediates;
4016
4017 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4018 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4019 src0 = v->get_temp(glsl_type::vec4_type);
4020 dst0 = st_dst_reg(src0);
4021 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4022 inst->sampler = samplerIndex;
4023 inst->tex_target = TEXTURE_2D_INDEX;
4024
4025 prog->InputsRead |= VARYING_BIT_TEX0;
4026 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4027 v->samplers_used |= (1 << samplerIndex);
4028
4029 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4030 src0.negate = NEGATE_XYZW;
4031 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4032 src0.swizzle = SWIZZLE_XXXX;
4033 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4034
4035 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4036 * new visitor. */
4037 foreach_list(node, &original->instructions) {
4038 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *) node;
4039 glsl_to_tgsi_instruction *newinst;
4040 st_src_reg src_regs[3];
4041
4042 if (inst->dst.file == PROGRAM_OUTPUT)
4043 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4044
4045 for (int i=0; i<3; i++) {
4046 src_regs[i] = inst->src[i];
4047 if (src_regs[i].file == PROGRAM_INPUT)
4048 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4049 }
4050
4051 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4052 newinst->tex_target = inst->tex_target;
4053 }
4054
4055 /* Make modifications to fragment program info. */
4056 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4057 count_resources(v, prog);
4058 fp->glsl_to_tgsi = v;
4059 }
4060
4061 /* ------------------------- TGSI conversion stuff -------------------------- */
4062 struct label {
4063 unsigned branch_target;
4064 unsigned token;
4065 };
4066
4067 /**
4068 * Intermediate state used during shader translation.
4069 */
4070 struct st_translate {
4071 struct ureg_program *ureg;
4072
4073 struct ureg_dst temps[MAX_TEMPS];
4074 struct ureg_dst arrays[MAX_ARRAYS];
4075 struct ureg_src *constants;
4076 struct ureg_src *immediates;
4077 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4078 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4079 struct ureg_dst address[2];
4080 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4081 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4082
4083 unsigned array_sizes[MAX_ARRAYS];
4084
4085 const GLuint *inputMapping;
4086 const GLuint *outputMapping;
4087
4088 /* For every instruction that contains a label (eg CALL), keep
4089 * details so that we can go back afterwards and emit the correct
4090 * tgsi instruction number for each label.
4091 */
4092 struct label *labels;
4093 unsigned labels_size;
4094 unsigned labels_count;
4095
4096 /* Keep a record of the tgsi instruction number that each mesa
4097 * instruction starts at, will be used to fix up labels after
4098 * translation.
4099 */
4100 unsigned *insn;
4101 unsigned insn_size;
4102 unsigned insn_count;
4103
4104 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4105
4106 boolean error;
4107 };
4108
4109 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4110 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4111 TGSI_SEMANTIC_FACE,
4112 TGSI_SEMANTIC_VERTEXID,
4113 TGSI_SEMANTIC_INSTANCEID
4114 };
4115
4116 /**
4117 * Make note of a branch to a label in the TGSI code.
4118 * After we've emitted all instructions, we'll go over the list
4119 * of labels built here and patch the TGSI code with the actual
4120 * location of each label.
4121 */
4122 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4123 {
4124 unsigned i;
4125
4126 if (t->labels_count + 1 >= t->labels_size) {
4127 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4128 t->labels = (struct label *)realloc(t->labels,
4129 t->labels_size * sizeof(struct label));
4130 if (t->labels == NULL) {
4131 static unsigned dummy;
4132 t->error = TRUE;
4133 return &dummy;
4134 }
4135 }
4136
4137 i = t->labels_count++;
4138 t->labels[i].branch_target = branch_target;
4139 return &t->labels[i].token;
4140 }
4141
4142 /**
4143 * Called prior to emitting the TGSI code for each instruction.
4144 * Allocate additional space for instructions if needed.
4145 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4146 * the next TGSI instruction.
4147 */
4148 static void set_insn_start(struct st_translate *t, unsigned start)
4149 {
4150 if (t->insn_count + 1 >= t->insn_size) {
4151 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4152 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4153 if (t->insn == NULL) {
4154 t->error = TRUE;
4155 return;
4156 }
4157 }
4158
4159 t->insn[t->insn_count++] = start;
4160 }
4161
4162 /**
4163 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4164 */
4165 static struct ureg_src
4166 emit_immediate(struct st_translate *t,
4167 gl_constant_value values[4],
4168 int type, int size)
4169 {
4170 struct ureg_program *ureg = t->ureg;
4171
4172 switch(type)
4173 {
4174 case GL_FLOAT:
4175 return ureg_DECL_immediate(ureg, &values[0].f, size);
4176 case GL_INT:
4177 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4178 case GL_UNSIGNED_INT:
4179 case GL_BOOL:
4180 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4181 default:
4182 assert(!"should not get here - type must be float, int, uint, or bool");
4183 return ureg_src_undef();
4184 }
4185 }
4186
4187 /**
4188 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4189 */
4190 static struct ureg_dst
4191 dst_register(struct st_translate *t,
4192 gl_register_file file,
4193 GLuint index)
4194 {
4195 unsigned array;
4196
4197 switch(file) {
4198 case PROGRAM_UNDEFINED:
4199 return ureg_dst_undef();
4200
4201 case PROGRAM_TEMPORARY:
4202 assert(index >= 0);
4203 assert(index < (int) Elements(t->temps));
4204
4205 if (ureg_dst_is_undef(t->temps[index]))
4206 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4207
4208 return t->temps[index];
4209
4210 case PROGRAM_ARRAY:
4211 array = index >> 16;
4212
4213 assert(array >= 0);
4214 assert(array < (int) Elements(t->arrays));
4215
4216 if (ureg_dst_is_undef(t->arrays[array]))
4217 t->arrays[array] = ureg_DECL_array_temporary(
4218 t->ureg, t->array_sizes[array], TRUE);
4219
4220 return ureg_dst_array_offset(t->arrays[array],
4221 (int)(index & 0xFFFF) - 0x8000);
4222
4223 case PROGRAM_OUTPUT:
4224 if (t->procType == TGSI_PROCESSOR_VERTEX)
4225 assert(index < VARYING_SLOT_MAX);
4226 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4227 assert(index < FRAG_RESULT_MAX);
4228 else
4229 assert(index < VARYING_SLOT_MAX);
4230
4231 assert(t->outputMapping[index] < Elements(t->outputs));
4232
4233 return t->outputs[t->outputMapping[index]];
4234
4235 case PROGRAM_ADDRESS:
4236 return t->address[index];
4237
4238 default:
4239 assert(!"unknown dst register file");
4240 return ureg_dst_undef();
4241 }
4242 }
4243
4244 /**
4245 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4246 */
4247 static struct ureg_src
4248 src_register(struct st_translate *t,
4249 gl_register_file file,
4250 GLint index, GLint index2D)
4251 {
4252 switch(file) {
4253 case PROGRAM_UNDEFINED:
4254 return ureg_src_undef();
4255
4256 case PROGRAM_TEMPORARY:
4257 case PROGRAM_ARRAY:
4258 return ureg_src(dst_register(t, file, index));
4259
4260 case PROGRAM_UNIFORM:
4261 assert(index >= 0);
4262 return t->constants[index];
4263 case PROGRAM_STATE_VAR:
4264 case PROGRAM_CONSTANT: /* ie, immediate */
4265 if (index2D) {
4266 struct ureg_src src;
4267 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4268 src.Dimension = 1;
4269 src.DimensionIndex = index2D;
4270 return src;
4271 } else if (index < 0)
4272 return ureg_DECL_constant(t->ureg, 0);
4273 else
4274 return t->constants[index];
4275
4276 case PROGRAM_IMMEDIATE:
4277 return t->immediates[index];
4278
4279 case PROGRAM_INPUT:
4280 assert(t->inputMapping[index] < Elements(t->inputs));
4281 return t->inputs[t->inputMapping[index]];
4282
4283 case PROGRAM_OUTPUT:
4284 assert(t->outputMapping[index] < Elements(t->outputs));
4285 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4286
4287 case PROGRAM_ADDRESS:
4288 return ureg_src(t->address[index]);
4289
4290 case PROGRAM_SYSTEM_VALUE:
4291 assert(index < (int) Elements(t->systemValues));
4292 return t->systemValues[index];
4293
4294 default:
4295 assert(!"unknown src register file");
4296 return ureg_src_undef();
4297 }
4298 }
4299
4300 /**
4301 * Create a TGSI ureg_dst register from an st_dst_reg.
4302 */
4303 static struct ureg_dst
4304 translate_dst(struct st_translate *t,
4305 const st_dst_reg *dst_reg,
4306 bool saturate, bool clamp_color)
4307 {
4308 struct ureg_dst dst = dst_register(t,
4309 dst_reg->file,
4310 dst_reg->index);
4311
4312 dst = ureg_writemask(dst, dst_reg->writemask);
4313
4314 if (saturate)
4315 dst = ureg_saturate(dst);
4316 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4317 /* Clamp colors for ARB_color_buffer_float. */
4318 switch (t->procType) {
4319 case TGSI_PROCESSOR_VERTEX:
4320 /* XXX if the geometry shader is present, this must be done there
4321 * instead of here. */
4322 if (dst_reg->index == VARYING_SLOT_COL0 ||
4323 dst_reg->index == VARYING_SLOT_COL1 ||
4324 dst_reg->index == VARYING_SLOT_BFC0 ||
4325 dst_reg->index == VARYING_SLOT_BFC1) {
4326 dst = ureg_saturate(dst);
4327 }
4328 break;
4329
4330 case TGSI_PROCESSOR_FRAGMENT:
4331 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4332 dst = ureg_saturate(dst);
4333 }
4334 break;
4335 }
4336 }
4337
4338 if (dst_reg->reladdr != NULL) {
4339 assert(dst_reg->file != PROGRAM_TEMPORARY);
4340 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4341 }
4342
4343 return dst;
4344 }
4345
4346 /**
4347 * Create a TGSI ureg_src register from an st_src_reg.
4348 */
4349 static struct ureg_src
4350 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4351 {
4352 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4353
4354 if (t->procType == TGSI_PROCESSOR_GEOMETRY && src_reg->has_index2) {
4355 src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4356 if (src_reg->reladdr2)
4357 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4358 src_reg->index2D);
4359 else
4360 src = ureg_src_dimension(src, src_reg->index2D);
4361 }
4362
4363 src = ureg_swizzle(src,
4364 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4365 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4366 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4367 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4368
4369 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4370 src = ureg_negate(src);
4371
4372 if (src_reg->reladdr != NULL) {
4373 assert(src_reg->file != PROGRAM_TEMPORARY);
4374 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4375 }
4376
4377 return src;
4378 }
4379
4380 static struct tgsi_texture_offset
4381 translate_tex_offset(struct st_translate *t,
4382 const struct tgsi_texture_offset *in_offset)
4383 {
4384 struct tgsi_texture_offset offset;
4385 struct ureg_src imm_src;
4386
4387 assert(in_offset->File == PROGRAM_IMMEDIATE);
4388 imm_src = t->immediates[in_offset->Index];
4389
4390 offset.File = imm_src.File;
4391 offset.Index = imm_src.Index;
4392 offset.SwizzleX = imm_src.SwizzleX;
4393 offset.SwizzleY = imm_src.SwizzleY;
4394 offset.SwizzleZ = imm_src.SwizzleZ;
4395 offset.File = TGSI_FILE_IMMEDIATE;
4396 offset.Padding = 0;
4397
4398 return offset;
4399 }
4400
4401 static void
4402 compile_tgsi_instruction(struct st_translate *t,
4403 const glsl_to_tgsi_instruction *inst,
4404 bool clamp_dst_color_output)
4405 {
4406 struct ureg_program *ureg = t->ureg;
4407 GLuint i;
4408 struct ureg_dst dst[1];
4409 struct ureg_src src[4];
4410 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4411
4412 unsigned num_dst;
4413 unsigned num_src;
4414 unsigned tex_target;
4415
4416 num_dst = num_inst_dst_regs(inst->op);
4417 num_src = num_inst_src_regs(inst->op);
4418
4419 if (num_dst)
4420 dst[0] = translate_dst(t,
4421 &inst->dst,
4422 inst->saturate,
4423 clamp_dst_color_output);
4424
4425 for (i = 0; i < num_src; i++)
4426 src[i] = translate_src(t, &inst->src[i]);
4427
4428 switch(inst->op) {
4429 case TGSI_OPCODE_BGNLOOP:
4430 case TGSI_OPCODE_CAL:
4431 case TGSI_OPCODE_ELSE:
4432 case TGSI_OPCODE_ENDLOOP:
4433 case TGSI_OPCODE_IF:
4434 case TGSI_OPCODE_UIF:
4435 assert(num_dst == 0);
4436 ureg_label_insn(ureg,
4437 inst->op,
4438 src, num_src,
4439 get_label(t,
4440 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4441 return;
4442
4443 case TGSI_OPCODE_TEX:
4444 case TGSI_OPCODE_TXB:
4445 case TGSI_OPCODE_TXD:
4446 case TGSI_OPCODE_TXL:
4447 case TGSI_OPCODE_TXP:
4448 case TGSI_OPCODE_TXQ:
4449 case TGSI_OPCODE_TXF:
4450 case TGSI_OPCODE_TEX2:
4451 case TGSI_OPCODE_TXB2:
4452 case TGSI_OPCODE_TXL2:
4453 src[num_src++] = t->samplers[inst->sampler];
4454 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4455 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4456 }
4457 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4458
4459 ureg_tex_insn(ureg,
4460 inst->op,
4461 dst, num_dst,
4462 tex_target,
4463 texoffsets, inst->tex_offset_num_offset,
4464 src, num_src);
4465 return;
4466
4467 case TGSI_OPCODE_SCS:
4468 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4469 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4470 break;
4471
4472 default:
4473 ureg_insn(ureg,
4474 inst->op,
4475 dst, num_dst,
4476 src, num_src);
4477 break;
4478 }
4479 }
4480
4481 /**
4482 * Emit the TGSI instructions for inverting and adjusting WPOS.
4483 * This code is unavoidable because it also depends on whether
4484 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4485 */
4486 static void
4487 emit_wpos_adjustment( struct st_translate *t,
4488 const struct gl_program *program,
4489 boolean invert,
4490 GLfloat adjX, GLfloat adjY[2])
4491 {
4492 struct ureg_program *ureg = t->ureg;
4493
4494 /* Fragment program uses fragment position input.
4495 * Need to replace instances of INPUT[WPOS] with temp T
4496 * where T = INPUT[WPOS] by y is inverted.
4497 */
4498 static const gl_state_index wposTransformState[STATE_LENGTH]
4499 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4500 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4501
4502 /* XXX: note we are modifying the incoming shader here! Need to
4503 * do this before emitting the constant decls below, or this
4504 * will be missed:
4505 */
4506 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4507 wposTransformState);
4508
4509 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4510 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4511 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4512
4513 /* First, apply the coordinate shift: */
4514 if (adjX || adjY[0] || adjY[1]) {
4515 if (adjY[0] != adjY[1]) {
4516 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4517 * depending on whether inversion is actually going to be applied
4518 * or not, which is determined by testing against the inversion
4519 * state variable used below, which will be either +1 or -1.
4520 */
4521 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4522
4523 ureg_CMP(ureg, adj_temp,
4524 ureg_scalar(wpostrans, invert ? 2 : 0),
4525 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4526 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4527 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4528 } else {
4529 ureg_ADD(ureg, wpos_temp, wpos_input,
4530 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4531 }
4532 wpos_input = ureg_src(wpos_temp);
4533 } else {
4534 /* MOV wpos_temp, input[wpos]
4535 */
4536 ureg_MOV( ureg, wpos_temp, wpos_input );
4537 }
4538
4539 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4540 * inversion/identity, or the other way around if we're drawing to an FBO.
4541 */
4542 if (invert) {
4543 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4544 */
4545 ureg_MAD( ureg,
4546 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4547 wpos_input,
4548 ureg_scalar(wpostrans, 0),
4549 ureg_scalar(wpostrans, 1));
4550 } else {
4551 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4552 */
4553 ureg_MAD( ureg,
4554 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4555 wpos_input,
4556 ureg_scalar(wpostrans, 2),
4557 ureg_scalar(wpostrans, 3));
4558 }
4559
4560 /* Use wpos_temp as position input from here on:
4561 */
4562 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4563 }
4564
4565
4566 /**
4567 * Emit fragment position/ooordinate code.
4568 */
4569 static void
4570 emit_wpos(struct st_context *st,
4571 struct st_translate *t,
4572 const struct gl_program *program,
4573 struct ureg_program *ureg)
4574 {
4575 const struct gl_fragment_program *fp =
4576 (const struct gl_fragment_program *) program;
4577 struct pipe_screen *pscreen = st->pipe->screen;
4578 GLfloat adjX = 0.0f;
4579 GLfloat adjY[2] = { 0.0f, 0.0f };
4580 boolean invert = FALSE;
4581
4582 /* Query the pixel center conventions supported by the pipe driver and set
4583 * adjX, adjY to help out if it cannot handle the requested one internally.
4584 *
4585 * The bias of the y-coordinate depends on whether y-inversion takes place
4586 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4587 * drawing to an FBO (causes additional inversion), and whether the the pipe
4588 * driver origin and the requested origin differ (the latter condition is
4589 * stored in the 'invert' variable).
4590 *
4591 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4592 *
4593 * center shift only:
4594 * i -> h: +0.5
4595 * h -> i: -0.5
4596 *
4597 * inversion only:
4598 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4599 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4600 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4601 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4602 *
4603 * inversion and center shift:
4604 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4605 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4606 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4607 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4608 */
4609 if (fp->OriginUpperLeft) {
4610 /* Fragment shader wants origin in upper-left */
4611 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4612 /* the driver supports upper-left origin */
4613 }
4614 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4615 /* the driver supports lower-left origin, need to invert Y */
4616 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4617 invert = TRUE;
4618 }
4619 else
4620 assert(0);
4621 }
4622 else {
4623 /* Fragment shader wants origin in lower-left */
4624 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4625 /* the driver supports lower-left origin */
4626 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4627 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4628 /* the driver supports upper-left origin, need to invert Y */
4629 invert = TRUE;
4630 else
4631 assert(0);
4632 }
4633
4634 if (fp->PixelCenterInteger) {
4635 /* Fragment shader wants pixel center integer */
4636 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4637 /* the driver supports pixel center integer */
4638 adjY[1] = 1.0f;
4639 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4640 }
4641 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4642 /* the driver supports pixel center half integer, need to bias X,Y */
4643 adjX = -0.5f;
4644 adjY[0] = -0.5f;
4645 adjY[1] = 0.5f;
4646 }
4647 else
4648 assert(0);
4649 }
4650 else {
4651 /* Fragment shader wants pixel center half integer */
4652 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4653 /* the driver supports pixel center half integer */
4654 }
4655 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4656 /* the driver supports pixel center integer, need to bias X,Y */
4657 adjX = adjY[0] = adjY[1] = 0.5f;
4658 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4659 }
4660 else
4661 assert(0);
4662 }
4663
4664 /* we invert after adjustment so that we avoid the MOV to temporary,
4665 * and reuse the adjustment ADD instead */
4666 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4667 }
4668
4669 /**
4670 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4671 * TGSI uses +1 for front, -1 for back.
4672 * This function converts the TGSI value to the GL value. Simply clamping/
4673 * saturating the value to [0,1] does the job.
4674 */
4675 static void
4676 emit_face_var(struct st_translate *t)
4677 {
4678 struct ureg_program *ureg = t->ureg;
4679 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4680 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4681
4682 /* MOV_SAT face_temp, input[face] */
4683 face_temp = ureg_saturate(face_temp);
4684 ureg_MOV(ureg, face_temp, face_input);
4685
4686 /* Use face_temp as face input from here on: */
4687 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4688 }
4689
4690 static void
4691 emit_edgeflags(struct st_translate *t)
4692 {
4693 struct ureg_program *ureg = t->ureg;
4694 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4695 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4696
4697 ureg_MOV(ureg, edge_dst, edge_src);
4698 }
4699
4700 /**
4701 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4702 * \param program the program to translate
4703 * \param numInputs number of input registers used
4704 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4705 * input indexes
4706 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4707 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4708 * each input
4709 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4710 * \param numOutputs number of output registers used
4711 * \param outputMapping maps Mesa fragment program outputs to TGSI
4712 * generic outputs
4713 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4714 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4715 * each output
4716 *
4717 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4718 */
4719 extern "C" enum pipe_error
4720 st_translate_program(
4721 struct gl_context *ctx,
4722 uint procType,
4723 struct ureg_program *ureg,
4724 glsl_to_tgsi_visitor *program,
4725 const struct gl_program *proginfo,
4726 GLuint numInputs,
4727 const GLuint inputMapping[],
4728 const ubyte inputSemanticName[],
4729 const ubyte inputSemanticIndex[],
4730 const GLuint interpMode[],
4731 const GLboolean is_centroid[],
4732 GLuint numOutputs,
4733 const GLuint outputMapping[],
4734 const ubyte outputSemanticName[],
4735 const ubyte outputSemanticIndex[],
4736 boolean passthrough_edgeflags,
4737 boolean clamp_color)
4738 {
4739 struct st_translate *t;
4740 unsigned i;
4741 enum pipe_error ret = PIPE_OK;
4742
4743 assert(numInputs <= Elements(t->inputs));
4744 assert(numOutputs <= Elements(t->outputs));
4745
4746 t = CALLOC_STRUCT(st_translate);
4747 if (!t) {
4748 ret = PIPE_ERROR_OUT_OF_MEMORY;
4749 goto out;
4750 }
4751
4752 memset(t, 0, sizeof *t);
4753
4754 t->procType = procType;
4755 t->inputMapping = inputMapping;
4756 t->outputMapping = outputMapping;
4757 t->ureg = ureg;
4758
4759 if (program->shader_program) {
4760 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4761 struct gl_uniform_storage *const storage =
4762 &program->shader_program->UniformStorage[i];
4763
4764 _mesa_uniform_detach_all_driver_storage(storage);
4765 }
4766 }
4767
4768 /*
4769 * Declare input attributes.
4770 */
4771 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4772 for (i = 0; i < numInputs; i++) {
4773 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4774 inputSemanticName[i],
4775 inputSemanticIndex[i],
4776 interpMode[i], 0,
4777 is_centroid[i]);
4778 }
4779
4780 if (proginfo->InputsRead & VARYING_BIT_POS) {
4781 /* Must do this after setting up t->inputs, and before
4782 * emitting constant references, below:
4783 */
4784 emit_wpos(st_context(ctx), t, proginfo, ureg);
4785 }
4786
4787 if (proginfo->InputsRead & VARYING_BIT_FACE)
4788 emit_face_var(t);
4789
4790 /*
4791 * Declare output attributes.
4792 */
4793 for (i = 0; i < numOutputs; i++) {
4794 switch (outputSemanticName[i]) {
4795 case TGSI_SEMANTIC_POSITION:
4796 t->outputs[i] = ureg_DECL_output(ureg,
4797 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4798 outputSemanticIndex[i]);
4799 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4800 break;
4801 case TGSI_SEMANTIC_STENCIL:
4802 t->outputs[i] = ureg_DECL_output(ureg,
4803 TGSI_SEMANTIC_STENCIL, /* Stencil */
4804 outputSemanticIndex[i]);
4805 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4806 break;
4807 case TGSI_SEMANTIC_COLOR:
4808 t->outputs[i] = ureg_DECL_output(ureg,
4809 TGSI_SEMANTIC_COLOR,
4810 outputSemanticIndex[i]);
4811 break;
4812 default:
4813 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4814 ret = PIPE_ERROR_BAD_INPUT;
4815 goto out;
4816 }
4817 }
4818 }
4819 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4820 for (i = 0; i < numInputs; i++) {
4821 t->inputs[i] = ureg_DECL_gs_input(ureg,
4822 i,
4823 inputSemanticName[i],
4824 inputSemanticIndex[i]);
4825 }
4826
4827 for (i = 0; i < numOutputs; i++) {
4828 t->outputs[i] = ureg_DECL_output(ureg,
4829 outputSemanticName[i],
4830 outputSemanticIndex[i]);
4831 }
4832 }
4833 else {
4834 assert(procType == TGSI_PROCESSOR_VERTEX);
4835
4836 for (i = 0; i < numInputs; i++) {
4837 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4838 }
4839
4840 for (i = 0; i < numOutputs; i++) {
4841 t->outputs[i] = ureg_DECL_output(ureg,
4842 outputSemanticName[i],
4843 outputSemanticIndex[i]);
4844 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4845 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4846 ureg_MOV(ureg,
4847 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
4848 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
4849 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4850 }
4851 }
4852 if (passthrough_edgeflags)
4853 emit_edgeflags(t);
4854 }
4855
4856 /* Declare address register.
4857 */
4858 if (program->num_address_regs > 0) {
4859 assert(program->num_address_regs <= 2);
4860 t->address[0] = ureg_DECL_address(ureg);
4861 if (program->num_address_regs == 2)
4862 t->address[1] = ureg_DECL_address(ureg);
4863 }
4864
4865 /* Declare misc input registers
4866 */
4867 {
4868 GLbitfield sysInputs = proginfo->SystemValuesRead;
4869 unsigned numSys = 0;
4870 for (i = 0; sysInputs; i++) {
4871 if (sysInputs & (1 << i)) {
4872 unsigned semName = mesa_sysval_to_semantic[i];
4873 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4874 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4875 semName == TGSI_SEMANTIC_VERTEXID) {
4876 /* From Gallium perspective, these system values are always
4877 * integer, and require native integer support. However, if
4878 * native integer is supported on the vertex stage but not the
4879 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4880 * assumes these system values are floats. To resolve the
4881 * inconsistency, we insert a U2F.
4882 */
4883 struct st_context *st = st_context(ctx);
4884 struct pipe_screen *pscreen = st->pipe->screen;
4885 assert(procType == TGSI_PROCESSOR_VERTEX);
4886 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4887 if (!ctx->Const.NativeIntegers) {
4888 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4889 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4890 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4891 }
4892 }
4893 numSys++;
4894 sysInputs &= ~(1 << i);
4895 }
4896 }
4897 }
4898
4899 /* Copy over array sizes
4900 */
4901 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4902
4903 /* Emit constants and uniforms. TGSI uses a single index space for these,
4904 * so we put all the translated regs in t->constants.
4905 */
4906 if (proginfo->Parameters) {
4907 t->constants = (struct ureg_src *)
4908 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4909 if (t->constants == NULL) {
4910 ret = PIPE_ERROR_OUT_OF_MEMORY;
4911 goto out;
4912 }
4913
4914 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4915 switch (proginfo->Parameters->Parameters[i].Type) {
4916 case PROGRAM_STATE_VAR:
4917 case PROGRAM_UNIFORM:
4918 t->constants[i] = ureg_DECL_constant(ureg, i);
4919 break;
4920
4921 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4922 * addressing of the const buffer.
4923 * FIXME: Be smarter and recognize param arrays:
4924 * indirect addressing is only valid within the referenced
4925 * array.
4926 */
4927 case PROGRAM_CONSTANT:
4928 if (program->indirect_addr_consts)
4929 t->constants[i] = ureg_DECL_constant(ureg, i);
4930 else
4931 t->constants[i] = emit_immediate(t,
4932 proginfo->Parameters->ParameterValues[i],
4933 proginfo->Parameters->Parameters[i].DataType,
4934 4);
4935 break;
4936 default:
4937 break;
4938 }
4939 }
4940 }
4941
4942 if (program->shader_program) {
4943 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4944
4945 for (i = 0; i < num_ubos; i++) {
4946 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4947 }
4948 }
4949
4950 /* Emit immediate values.
4951 */
4952 t->immediates = (struct ureg_src *)
4953 calloc(program->num_immediates, sizeof(struct ureg_src));
4954 if (t->immediates == NULL) {
4955 ret = PIPE_ERROR_OUT_OF_MEMORY;
4956 goto out;
4957 }
4958 i = 0;
4959 foreach_list(node, &program->immediates) {
4960 immediate_storage *imm = (immediate_storage *) node;
4961 assert(i < program->num_immediates);
4962 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4963 }
4964 assert(i == program->num_immediates);
4965
4966 /* texture samplers */
4967 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
4968 if (program->samplers_used & (1 << i)) {
4969 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4970 }
4971 }
4972
4973 /* Emit each instruction in turn:
4974 */
4975 foreach_list(n, &program->instructions) {
4976 set_insn_start(t, ureg_get_instruction_number(ureg));
4977 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *) n, clamp_color);
4978 }
4979
4980 /* Fix up all emitted labels:
4981 */
4982 for (i = 0; i < t->labels_count; i++) {
4983 ureg_fixup_label(ureg, t->labels[i].token,
4984 t->insn[t->labels[i].branch_target]);
4985 }
4986
4987 if (program->shader_program) {
4988 /* This has to be done last. Any operation the can cause
4989 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4990 * program constant) has to happen before creating this linkage.
4991 */
4992 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
4993 if (program->shader_program->_LinkedShaders[i] == NULL)
4994 continue;
4995
4996 _mesa_associate_uniform_storage(ctx, program->shader_program,
4997 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4998 }
4999 }
5000
5001 out:
5002 if (t) {
5003 free(t->insn);
5004 free(t->labels);
5005 free(t->constants);
5006 free(t->immediates);
5007
5008 if (t->error) {
5009 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5010 }
5011
5012 free(t);
5013 }
5014
5015 return ret;
5016 }
5017 /* ----------------------------- End TGSI code ------------------------------ */
5018
5019
5020 static unsigned
5021 shader_stage_to_ptarget(gl_shader_stage stage)
5022 {
5023 switch (stage) {
5024 case MESA_SHADER_VERTEX:
5025 return PIPE_SHADER_VERTEX;
5026 case MESA_SHADER_FRAGMENT:
5027 return PIPE_SHADER_FRAGMENT;
5028 case MESA_SHADER_GEOMETRY:
5029 return PIPE_SHADER_GEOMETRY;
5030 }
5031
5032 assert(!"should not be reached");
5033 return PIPE_SHADER_VERTEX;
5034 }
5035
5036
5037 /**
5038 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5039 * generating Mesa IR.
5040 */
5041 static struct gl_program *
5042 get_mesa_program(struct gl_context *ctx,
5043 struct gl_shader_program *shader_program,
5044 struct gl_shader *shader)
5045 {
5046 glsl_to_tgsi_visitor* v;
5047 struct gl_program *prog;
5048 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5049 bool progress;
5050 struct gl_shader_compiler_options *options =
5051 &ctx->ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5052 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5053 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5054
5055 validate_ir_tree(shader->ir);
5056
5057 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5058 if (!prog)
5059 return NULL;
5060 prog->Parameters = _mesa_new_parameter_list();
5061 v = new glsl_to_tgsi_visitor();
5062 v->ctx = ctx;
5063 v->prog = prog;
5064 v->shader_program = shader_program;
5065 v->options = options;
5066 v->glsl_version = ctx->Const.GLSLVersion;
5067 v->native_integers = ctx->Const.NativeIntegers;
5068
5069 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5070 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5071
5072 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5073 prog->Parameters);
5074
5075 /* Remove reads from output registers. */
5076 lower_output_reads(shader->ir);
5077
5078 /* Emit intermediate IR for main(). */
5079 visit_exec_list(shader->ir, v);
5080
5081 /* Now emit bodies for any functions that were used. */
5082 do {
5083 progress = GL_FALSE;
5084
5085 foreach_list(node, &v->function_signatures) {
5086 function_entry *entry = (function_entry *) node;
5087
5088 if (!entry->bgn_inst) {
5089 v->current_function = entry;
5090
5091 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5092 entry->bgn_inst->function = entry;
5093
5094 visit_exec_list(&entry->sig->body, v);
5095
5096 glsl_to_tgsi_instruction *last;
5097 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5098 if (last->op != TGSI_OPCODE_RET)
5099 v->emit(NULL, TGSI_OPCODE_RET);
5100
5101 glsl_to_tgsi_instruction *end;
5102 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5103 end->function = entry;
5104
5105 progress = GL_TRUE;
5106 }
5107 }
5108 } while (progress);
5109
5110 #if 0
5111 /* Print out some information (for debugging purposes) used by the
5112 * optimization passes. */
5113 for (i=0; i < v->next_temp; i++) {
5114 int fr = v->get_first_temp_read(i);
5115 int fw = v->get_first_temp_write(i);
5116 int lr = v->get_last_temp_read(i);
5117 int lw = v->get_last_temp_write(i);
5118
5119 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5120 assert(fw <= fr);
5121 }
5122 #endif
5123
5124 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5125 v->simplify_cmp();
5126 v->copy_propagate();
5127 while (v->eliminate_dead_code_advanced());
5128
5129 v->eliminate_dead_code();
5130 v->merge_registers();
5131 v->renumber_registers();
5132
5133 /* Write the END instruction. */
5134 v->emit(NULL, TGSI_OPCODE_END);
5135
5136 if (ctx->Shader.Flags & GLSL_DUMP) {
5137 printf("\n");
5138 printf("GLSL IR for linked %s program %d:\n",
5139 _mesa_shader_stage_to_string(shader->Stage),
5140 shader_program->Name);
5141 _mesa_print_ir(shader->ir, NULL);
5142 printf("\n");
5143 printf("\n");
5144 fflush(stdout);
5145 }
5146
5147 prog->Instructions = NULL;
5148 prog->NumInstructions = 0;
5149
5150 do_set_program_inouts(shader->ir, prog, shader->Stage);
5151 count_resources(v, prog);
5152
5153 _mesa_reference_program(ctx, &shader->Program, prog);
5154
5155 /* This has to be done last. Any operation the can cause
5156 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5157 * program constant) has to happen before creating this linkage.
5158 */
5159 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5160 if (!shader_program->LinkStatus) {
5161 return NULL;
5162 }
5163
5164 struct st_vertex_program *stvp;
5165 struct st_fragment_program *stfp;
5166 struct st_geometry_program *stgp;
5167
5168 switch (shader->Type) {
5169 case GL_VERTEX_SHADER:
5170 stvp = (struct st_vertex_program *)prog;
5171 stvp->glsl_to_tgsi = v;
5172 break;
5173 case GL_FRAGMENT_SHADER:
5174 stfp = (struct st_fragment_program *)prog;
5175 stfp->glsl_to_tgsi = v;
5176 break;
5177 case GL_GEOMETRY_SHADER:
5178 stgp = (struct st_geometry_program *)prog;
5179 stgp->glsl_to_tgsi = v;
5180 stgp->Base.InputType = shader_program->Geom.InputType;
5181 stgp->Base.OutputType = shader_program->Geom.OutputType;
5182 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5183 break;
5184 default:
5185 assert(!"should not be reached");
5186 return NULL;
5187 }
5188
5189 return prog;
5190 }
5191
5192 extern "C" {
5193
5194 struct gl_shader *
5195 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5196 {
5197 struct gl_shader *shader;
5198 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5199 type == GL_GEOMETRY_SHADER_ARB);
5200 shader = rzalloc(NULL, struct gl_shader);
5201 if (shader) {
5202 shader->Type = type;
5203 shader->Stage = _mesa_shader_enum_to_shader_stage(type);
5204 shader->Name = name;
5205 _mesa_init_shader(ctx, shader);
5206 }
5207 return shader;
5208 }
5209
5210 struct gl_shader_program *
5211 st_new_shader_program(struct gl_context *ctx, GLuint name)
5212 {
5213 struct gl_shader_program *shProg;
5214 shProg = rzalloc(NULL, struct gl_shader_program);
5215 if (shProg) {
5216 shProg->Name = name;
5217 _mesa_init_shader_program(ctx, shProg);
5218 }
5219 return shProg;
5220 }
5221
5222 /**
5223 * Link a shader.
5224 * Called via ctx->Driver.LinkShader()
5225 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5226 * with code lowering and other optimizations.
5227 */
5228 GLboolean
5229 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5230 {
5231 assert(prog->LinkStatus);
5232
5233 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5234 if (prog->_LinkedShaders[i] == NULL)
5235 continue;
5236
5237 bool progress;
5238 exec_list *ir = prog->_LinkedShaders[i]->ir;
5239 const struct gl_shader_compiler_options *options =
5240 &ctx->ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5241
5242 /* If there are forms of indirect addressing that the driver
5243 * cannot handle, perform the lowering pass.
5244 */
5245 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5246 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5247 lower_variable_index_to_cond_assign(ir,
5248 options->EmitNoIndirectInput,
5249 options->EmitNoIndirectOutput,
5250 options->EmitNoIndirectTemp,
5251 options->EmitNoIndirectUniform);
5252 }
5253
5254 if (ctx->Extensions.ARB_shading_language_packing) {
5255 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5256 LOWER_UNPACK_SNORM_2x16 |
5257 LOWER_PACK_UNORM_2x16 |
5258 LOWER_UNPACK_UNORM_2x16 |
5259 LOWER_PACK_SNORM_4x8 |
5260 LOWER_UNPACK_SNORM_4x8 |
5261 LOWER_UNPACK_UNORM_4x8 |
5262 LOWER_PACK_UNORM_4x8 |
5263 LOWER_PACK_HALF_2x16 |
5264 LOWER_UNPACK_HALF_2x16;
5265
5266 lower_packing_builtins(ir, lower_inst);
5267 }
5268
5269 do_mat_op_to_vec(ir);
5270 lower_instructions(ir,
5271 MOD_TO_FRACT |
5272 DIV_TO_MUL_RCP |
5273 EXP_TO_EXP2 |
5274 LOG_TO_LOG2 |
5275 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5276 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5277
5278 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5279 do_vec_index_to_cond_assign(ir);
5280 lower_vector_insert(ir, true);
5281 lower_quadop_vector(ir, false);
5282 lower_noise(ir);
5283 if (options->MaxIfDepth == 0) {
5284 lower_discard(ir);
5285 }
5286
5287 do {
5288 progress = false;
5289
5290 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5291
5292 progress = do_common_optimization(ir, true, true,
5293 options->MaxUnrollIterations, options)
5294 || progress;
5295
5296 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5297
5298 } while (progress);
5299
5300 validate_ir_tree(ir);
5301 }
5302
5303 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5304 struct gl_program *linked_prog;
5305
5306 if (prog->_LinkedShaders[i] == NULL)
5307 continue;
5308
5309 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5310
5311 if (linked_prog) {
5312 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5313 linked_prog);
5314 if (!ctx->Driver.ProgramStringNotify(ctx,
5315 _mesa_program_index_to_target(i),
5316 linked_prog)) {
5317 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5318 NULL);
5319 _mesa_reference_program(ctx, &linked_prog, NULL);
5320 return GL_FALSE;
5321 }
5322 }
5323
5324 _mesa_reference_program(ctx, &linked_prog, NULL);
5325 }
5326
5327 return GL_TRUE;
5328 }
5329
5330 void
5331 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5332 const GLuint outputMapping[],
5333 struct pipe_stream_output_info *so)
5334 {
5335 unsigned i;
5336 struct gl_transform_feedback_info *info =
5337 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5338
5339 for (i = 0; i < info->NumOutputs; i++) {
5340 so->output[i].register_index =
5341 outputMapping[info->Outputs[i].OutputRegister];
5342 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5343 so->output[i].num_components = info->Outputs[i].NumComponents;
5344 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5345 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5346 }
5347
5348 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5349 so->stride[i] = info->BufferStride[i];
5350 }
5351 so->num_outputs = info->NumOutputs;
5352 }
5353
5354 } /* extern "C" */