2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
81 * Maximum number of temporary registers.
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
86 #define MAX_TEMPS 4096
89 * Maximum number of arrays
91 #define MAX_ARRAYS 256
93 /* will be 4 for GLSL 4.00 */
94 #define MAX_GLSL_TEXTURE_OFFSET 1
99 static int swizzle_for_size(int size
);
102 * This struct is a corresponding struct to TGSI ureg_src.
106 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
110 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
111 this->swizzle
= swizzle_for_size(type
->vector_elements
);
113 this->swizzle
= SWIZZLE_XYZW
;
116 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
117 this->reladdr
= NULL
;
120 st_src_reg(gl_register_file file
, int index
, int type
)
126 this->swizzle
= SWIZZLE_XYZW
;
128 this->reladdr
= NULL
;
131 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
136 this->index2D
= index2D
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= NULL
;
144 this->type
= GLSL_TYPE_ERROR
;
145 this->file
= PROGRAM_UNDEFINED
;
150 this->reladdr
= NULL
;
153 explicit st_src_reg(st_dst_reg reg
);
155 gl_register_file file
; /**< PROGRAM_* from Mesa */
156 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
158 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
159 int negate
; /**< NEGATE_XYZW mask from mesa */
160 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
161 /** Register index should be offset by the integer in this reg. */
167 st_dst_reg(gl_register_file file
, int writemask
, int type
)
171 this->writemask
= writemask
;
172 this->cond_mask
= COND_TR
;
173 this->reladdr
= NULL
;
179 this->type
= GLSL_TYPE_ERROR
;
180 this->file
= PROGRAM_UNDEFINED
;
183 this->cond_mask
= COND_TR
;
184 this->reladdr
= NULL
;
187 explicit st_dst_reg(st_src_reg reg
);
189 gl_register_file file
; /**< PROGRAM_* from Mesa */
190 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
191 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
193 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
194 /** Register index should be offset by the integer in this reg. */
198 st_src_reg::st_src_reg(st_dst_reg reg
)
200 this->type
= reg
.type
;
201 this->file
= reg
.file
;
202 this->index
= reg
.index
;
203 this->swizzle
= SWIZZLE_XYZW
;
205 this->reladdr
= reg
.reladdr
;
209 st_dst_reg::st_dst_reg(st_src_reg reg
)
211 this->type
= reg
.type
;
212 this->file
= reg
.file
;
213 this->index
= reg
.index
;
214 this->writemask
= WRITEMASK_XYZW
;
215 this->cond_mask
= COND_TR
;
216 this->reladdr
= reg
.reladdr
;
219 class glsl_to_tgsi_instruction
: public exec_node
{
221 /* Callers of this ralloc-based new need not call delete. It's
222 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
223 static void* operator new(size_t size
, void *ctx
)
227 node
= rzalloc_size(ctx
, size
);
228 assert(node
!= NULL
);
236 /** Pointer to the ir source this tree came from for debugging */
238 GLboolean cond_update
;
240 int sampler
; /**< sampler index */
241 int tex_target
; /**< One of TEXTURE_*_INDEX */
242 GLboolean tex_shadow
;
243 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
244 unsigned tex_offset_num_offset
;
245 int dead_mask
; /**< Used in dead code elimination */
247 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
250 class variable_storage
: public exec_node
{
252 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
253 : file(file
), index(index
), var(var
)
258 gl_register_file file
;
260 ir_variable
*var
; /* variable that maps to this, if any */
263 class immediate_storage
: public exec_node
{
265 immediate_storage(gl_constant_value
*values
, int size
, int type
)
267 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
272 gl_constant_value values
[4];
273 int size
; /**< Number of components (1-4) */
274 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
277 class function_entry
: public exec_node
{
279 ir_function_signature
*sig
;
282 * identifier of this function signature used by the program.
284 * At the point that TGSI instructions for function calls are
285 * generated, we don't know the address of the first instruction of
286 * the function body. So we make the BranchTarget that is called a
287 * small integer and rewrite them during set_branchtargets().
292 * Pointer to first instruction of the function body.
294 * Set during function body emits after main() is processed.
296 glsl_to_tgsi_instruction
*bgn_inst
;
299 * Index of the first instruction of the function body in actual TGSI.
301 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
305 /** Storage for the return value. */
306 st_src_reg return_reg
;
309 struct glsl_to_tgsi_visitor
: public ir_visitor
{
311 glsl_to_tgsi_visitor();
312 ~glsl_to_tgsi_visitor();
314 function_entry
*current_function
;
316 struct gl_context
*ctx
;
317 struct gl_program
*prog
;
318 struct gl_shader_program
*shader_program
;
319 struct gl_shader_compiler_options
*options
;
323 unsigned array_sizes
[MAX_ARRAYS
];
326 int num_address_regs
;
328 bool indirect_addr_consts
;
331 bool native_integers
;
334 variable_storage
*find_variable_storage(ir_variable
*var
);
336 int add_constant(gl_register_file file
, gl_constant_value values
[4],
337 int size
, int datatype
, GLuint
*swizzle_out
);
339 function_entry
*get_function_signature(ir_function_signature
*sig
);
341 st_src_reg
get_temp(const glsl_type
*type
);
342 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
344 st_src_reg
st_src_reg_for_float(float val
);
345 st_src_reg
st_src_reg_for_int(int val
);
346 st_src_reg
st_src_reg_for_type(int type
, int val
);
349 * \name Visit methods
351 * As typical for the visitor pattern, there must be one \c visit method for
352 * each concrete subclass of \c ir_instruction. Virtual base classes within
353 * the hierarchy should not have \c visit methods.
356 virtual void visit(ir_variable
*);
357 virtual void visit(ir_loop
*);
358 virtual void visit(ir_loop_jump
*);
359 virtual void visit(ir_function_signature
*);
360 virtual void visit(ir_function
*);
361 virtual void visit(ir_expression
*);
362 virtual void visit(ir_swizzle
*);
363 virtual void visit(ir_dereference_variable
*);
364 virtual void visit(ir_dereference_array
*);
365 virtual void visit(ir_dereference_record
*);
366 virtual void visit(ir_assignment
*);
367 virtual void visit(ir_constant
*);
368 virtual void visit(ir_call
*);
369 virtual void visit(ir_return
*);
370 virtual void visit(ir_discard
*);
371 virtual void visit(ir_texture
*);
372 virtual void visit(ir_if
*);
377 /** List of variable_storage */
380 /** List of immediate_storage */
381 exec_list immediates
;
382 unsigned num_immediates
;
384 /** List of function_entry */
385 exec_list function_signatures
;
386 int next_signature_id
;
388 /** List of glsl_to_tgsi_instruction */
389 exec_list instructions
;
391 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
393 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
394 st_dst_reg dst
, st_src_reg src0
);
396 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
397 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
399 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
401 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
403 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
405 st_src_reg src0
, st_src_reg src1
);
408 * Emit the correct dot-product instruction for the type of arguments
410 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
416 void emit_scalar(ir_instruction
*ir
, unsigned op
,
417 st_dst_reg dst
, st_src_reg src0
);
419 void emit_scalar(ir_instruction
*ir
, unsigned op
,
420 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
422 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
424 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
426 void emit_scs(ir_instruction
*ir
, unsigned op
,
427 st_dst_reg dst
, const st_src_reg
&src
);
429 bool try_emit_mad(ir_expression
*ir
,
431 bool try_emit_mad_for_and_not(ir_expression
*ir
,
433 bool try_emit_sat(ir_expression
*ir
);
435 void emit_swz(ir_expression
*ir
);
437 bool process_move_condition(ir_rvalue
*ir
);
439 void simplify_cmp(void);
441 void rename_temp_register(int index
, int new_index
);
442 int get_first_temp_read(int index
);
443 int get_first_temp_write(int index
);
444 int get_last_temp_read(int index
);
445 int get_last_temp_write(int index
);
447 void copy_propagate(void);
448 void eliminate_dead_code(void);
449 int eliminate_dead_code_advanced(void);
450 void merge_registers(void);
451 void renumber_registers(void);
453 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
454 st_dst_reg
*l
, st_src_reg
*r
);
459 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
461 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
463 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
466 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
469 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
473 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
476 prog
->LinkStatus
= GL_FALSE
;
480 swizzle_for_size(int size
)
482 int size_swizzles
[4] = {
483 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
484 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
485 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
486 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
489 assert((size
>= 1) && (size
<= 4));
490 return size_swizzles
[size
- 1];
494 is_tex_instruction(unsigned opcode
)
496 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
501 num_inst_dst_regs(unsigned opcode
)
503 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
504 return info
->num_dst
;
508 num_inst_src_regs(unsigned opcode
)
510 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
511 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
514 glsl_to_tgsi_instruction
*
515 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
517 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
519 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
520 int num_reladdr
= 0, i
;
522 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
524 /* If we have to do relative addressing, we want to load the ARL
525 * reg directly for one of the regs, and preload the other reladdr
526 * sources into temps.
528 num_reladdr
+= dst
.reladdr
!= NULL
;
529 num_reladdr
+= src0
.reladdr
!= NULL
;
530 num_reladdr
+= src1
.reladdr
!= NULL
;
531 num_reladdr
+= src2
.reladdr
!= NULL
;
533 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
534 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
535 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
538 emit_arl(ir
, address_reg
, *dst
.reladdr
);
541 assert(num_reladdr
== 0);
551 inst
->function
= NULL
;
553 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
554 this->num_address_regs
= 1;
556 /* Update indirect addressing status used by TGSI */
559 case PROGRAM_LOCAL_PARAM
:
560 case PROGRAM_ENV_PARAM
:
561 case PROGRAM_STATE_VAR
:
562 case PROGRAM_CONSTANT
:
563 case PROGRAM_UNIFORM
:
564 this->indirect_addr_consts
= true;
566 case PROGRAM_IMMEDIATE
:
567 assert(!"immediates should not have indirect addressing");
574 for (i
=0; i
<3; i
++) {
575 if(inst
->src
[i
].reladdr
) {
576 switch(inst
->src
[i
].file
) {
577 case PROGRAM_LOCAL_PARAM
:
578 case PROGRAM_ENV_PARAM
:
579 case PROGRAM_STATE_VAR
:
580 case PROGRAM_CONSTANT
:
581 case PROGRAM_UNIFORM
:
582 this->indirect_addr_consts
= true;
584 case PROGRAM_IMMEDIATE
:
585 assert(!"immediates should not have indirect addressing");
594 this->instructions
.push_tail(inst
);
597 try_emit_float_set(ir
, op
, dst
);
603 glsl_to_tgsi_instruction
*
604 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
605 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
607 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
610 glsl_to_tgsi_instruction
*
611 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
612 st_dst_reg dst
, st_src_reg src0
)
614 assert(dst
.writemask
!= 0);
615 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
618 glsl_to_tgsi_instruction
*
619 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
621 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
625 * Emits the code to convert the result of float SET instructions to integers.
628 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
631 if ((op
== TGSI_OPCODE_SEQ
||
632 op
== TGSI_OPCODE_SNE
||
633 op
== TGSI_OPCODE_SGE
||
634 op
== TGSI_OPCODE_SLT
))
636 st_src_reg src
= st_src_reg(dst
);
637 src
.negate
= ~src
.negate
;
638 dst
.type
= GLSL_TYPE_FLOAT
;
639 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
644 * Determines whether to use an integer, unsigned integer, or float opcode
645 * based on the operands and input opcode, then emits the result.
648 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
650 st_src_reg src0
, st_src_reg src1
)
652 int type
= GLSL_TYPE_FLOAT
;
654 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
655 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
656 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
657 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
659 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
660 type
= GLSL_TYPE_FLOAT
;
661 else if (native_integers
)
662 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
667 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
668 else op = TGSI_OPCODE_##f; \
670 #define case3(f, i, u) case4(f, f, i, u)
671 #define case2fi(f, i) case4(f, f, i, i)
672 #define case2iu(i, u) case4(i, LAST, i, u)
678 case3(DIV
, IDIV
, UDIV
);
679 case3(MAX
, IMAX
, UMAX
);
680 case3(MIN
, IMIN
, UMIN
);
685 case3(SGE
, ISGE
, USGE
);
686 case3(SLT
, ISLT
, USLT
);
691 case3(ABS
, IABS
, IABS
);
696 assert(op
!= TGSI_OPCODE_LAST
);
700 glsl_to_tgsi_instruction
*
701 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
702 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
705 static const unsigned dot_opcodes
[] = {
706 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
709 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
713 * Emits TGSI scalar opcodes to produce unique answers across channels.
715 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
716 * channel determines the result across all channels. So to do a vec4
717 * of this operation, we want to emit a scalar per source channel used
718 * to produce dest channels.
721 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
723 st_src_reg orig_src0
, st_src_reg orig_src1
)
726 int done_mask
= ~dst
.writemask
;
728 /* TGSI RCP is a scalar operation splatting results to all channels,
729 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
732 for (i
= 0; i
< 4; i
++) {
733 GLuint this_mask
= (1 << i
);
734 glsl_to_tgsi_instruction
*inst
;
735 st_src_reg src0
= orig_src0
;
736 st_src_reg src1
= orig_src1
;
738 if (done_mask
& this_mask
)
741 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
742 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
743 for (j
= i
+ 1; j
< 4; j
++) {
744 /* If there is another enabled component in the destination that is
745 * derived from the same inputs, generate its value on this pass as
748 if (!(done_mask
& (1 << j
)) &&
749 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
750 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
751 this_mask
|= (1 << j
);
754 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
755 src0_swiz
, src0_swiz
);
756 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
757 src1_swiz
, src1_swiz
);
759 inst
= emit(ir
, op
, dst
, src0
, src1
);
760 inst
->dst
.writemask
= this_mask
;
761 done_mask
|= this_mask
;
766 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
767 st_dst_reg dst
, st_src_reg src0
)
769 st_src_reg undef
= undef_src
;
771 undef
.swizzle
= SWIZZLE_XXXX
;
773 emit_scalar(ir
, op
, dst
, src0
, undef
);
777 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
778 st_dst_reg dst
, st_src_reg src0
)
780 int op
= TGSI_OPCODE_ARL
;
782 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
783 op
= TGSI_OPCODE_UARL
;
785 emit(NULL
, op
, dst
, src0
);
789 * Emit an TGSI_OPCODE_SCS instruction
791 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
792 * Instead of splatting its result across all four components of the
793 * destination, it writes one value to the \c x component and another value to
794 * the \c y component.
796 * \param ir IR instruction being processed
797 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
798 * on which value is desired.
799 * \param dst Destination register
800 * \param src Source register
803 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
805 const st_src_reg
&src
)
807 /* Vertex programs cannot use the SCS opcode.
809 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
810 emit_scalar(ir
, op
, dst
, src
);
814 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
815 const unsigned scs_mask
= (1U << component
);
816 int done_mask
= ~dst
.writemask
;
819 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
821 /* If there are compnents in the destination that differ from the component
822 * that will be written by the SCS instrution, we'll need a temporary.
824 if (scs_mask
!= unsigned(dst
.writemask
)) {
825 tmp
= get_temp(glsl_type::vec4_type
);
828 for (unsigned i
= 0; i
< 4; i
++) {
829 unsigned this_mask
= (1U << i
);
830 st_src_reg src0
= src
;
832 if ((done_mask
& this_mask
) != 0)
835 /* The source swizzle specified which component of the source generates
836 * sine / cosine for the current component in the destination. The SCS
837 * instruction requires that this value be swizzle to the X component.
838 * Replace the current swizzle with a swizzle that puts the source in
841 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
843 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
844 src0_swiz
, src0_swiz
);
845 for (unsigned j
= i
+ 1; j
< 4; j
++) {
846 /* If there is another enabled component in the destination that is
847 * derived from the same inputs, generate its value on this pass as
850 if (!(done_mask
& (1 << j
)) &&
851 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
852 this_mask
|= (1 << j
);
856 if (this_mask
!= scs_mask
) {
857 glsl_to_tgsi_instruction
*inst
;
858 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
860 /* Emit the SCS instruction.
862 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
863 inst
->dst
.writemask
= scs_mask
;
865 /* Move the result of the SCS instruction to the desired location in
868 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
869 component
, component
);
870 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
871 inst
->dst
.writemask
= this_mask
;
873 /* Emit the SCS instruction to write directly to the destination.
875 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
876 inst
->dst
.writemask
= scs_mask
;
879 done_mask
|= this_mask
;
884 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
885 gl_constant_value values
[4], int size
, int datatype
,
888 if (file
== PROGRAM_CONSTANT
) {
889 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
890 size
, datatype
, swizzle_out
);
893 immediate_storage
*entry
;
894 assert(file
== PROGRAM_IMMEDIATE
);
896 /* Search immediate storage to see if we already have an identical
897 * immediate that we can use instead of adding a duplicate entry.
899 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
900 entry
= (immediate_storage
*)iter
.get();
902 if (entry
->size
== size
&&
903 entry
->type
== datatype
&&
904 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
910 /* Add this immediate to the list. */
911 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
912 this->immediates
.push_tail(entry
);
913 this->num_immediates
++;
919 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
921 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
922 union gl_constant_value uval
;
925 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
931 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
933 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
934 union gl_constant_value uval
;
936 assert(native_integers
);
939 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
945 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
948 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
949 st_src_reg_for_int(val
);
951 return st_src_reg_for_float(val
);
955 type_size(const struct glsl_type
*type
)
960 switch (type
->base_type
) {
963 case GLSL_TYPE_FLOAT
:
965 if (type
->is_matrix()) {
966 return type
->matrix_columns
;
968 /* Regardless of size of vector, it gets a vec4. This is bad
969 * packing for things like floats, but otherwise arrays become a
970 * mess. Hopefully a later pass over the code can pack scalars
971 * down if appropriate.
975 case GLSL_TYPE_ARRAY
:
976 assert(type
->length
> 0);
977 return type_size(type
->fields
.array
) * type
->length
;
978 case GLSL_TYPE_STRUCT
:
980 for (i
= 0; i
< type
->length
; i
++) {
981 size
+= type_size(type
->fields
.structure
[i
].type
);
984 case GLSL_TYPE_SAMPLER
:
985 /* Samplers take up one slot in UNIFORMS[], but they're baked in
989 case GLSL_TYPE_INTERFACE
:
991 case GLSL_TYPE_ERROR
:
992 assert(!"Invalid type in type_size");
999 * In the initial pass of codegen, we assign temporary numbers to
1000 * intermediate results. (not SSA -- variable assignments will reuse
1004 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1008 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1012 if (!options
->EmitNoIndirectTemp
&&
1013 (type
->is_array() || type
->is_matrix())) {
1015 src
.file
= PROGRAM_ARRAY
;
1016 src
.index
= next_array
<< 16 | 0x8000;
1017 array_sizes
[next_array
] = type_size(type
);
1021 src
.file
= PROGRAM_TEMPORARY
;
1022 src
.index
= next_temp
;
1023 next_temp
+= type_size(type
);
1026 if (type
->is_array() || type
->is_record()) {
1027 src
.swizzle
= SWIZZLE_NOOP
;
1029 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1036 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1039 variable_storage
*entry
;
1041 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1042 entry
= (variable_storage
*)iter
.get();
1044 if (entry
->var
== var
)
1052 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1054 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1055 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1057 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1058 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1061 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1063 const ir_state_slot
*const slots
= ir
->state_slots
;
1064 assert(ir
->state_slots
!= NULL
);
1066 /* Check if this statevar's setup in the STATE file exactly
1067 * matches how we'll want to reference it as a
1068 * struct/array/whatever. If not, then we need to move it into
1069 * temporary storage and hope that it'll get copy-propagated
1072 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1073 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1078 variable_storage
*storage
;
1080 if (i
== ir
->num_state_slots
) {
1081 /* We'll set the index later. */
1082 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1083 this->variables
.push_tail(storage
);
1087 /* The variable_storage constructor allocates slots based on the size
1088 * of the type. However, this had better match the number of state
1089 * elements that we're going to copy into the new temporary.
1091 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1093 dst
= st_dst_reg(get_temp(ir
->type
));
1095 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1097 this->variables
.push_tail(storage
);
1101 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1102 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1103 (gl_state_index
*)slots
[i
].tokens
);
1105 if (storage
->file
== PROGRAM_STATE_VAR
) {
1106 if (storage
->index
== -1) {
1107 storage
->index
= index
;
1109 assert(index
== storage
->index
+ (int)i
);
1112 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1113 * the data being moved since MOV does not care about the type of
1114 * data it is moving, and we don't want to declare registers with
1115 * array or struct types.
1117 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1118 src
.swizzle
= slots
[i
].swizzle
;
1119 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1120 /* even a float takes up a whole vec4 reg in a struct/array. */
1125 if (storage
->file
== PROGRAM_TEMPORARY
&&
1126 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1127 fail_link(this->shader_program
,
1128 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1129 ir
->name
, dst
.index
- storage
->index
,
1130 type_size(ir
->type
));
1136 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1138 ir_dereference_variable
*counter
= NULL
;
1140 if (ir
->counter
!= NULL
)
1141 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1143 if (ir
->from
!= NULL
) {
1144 assert(ir
->counter
!= NULL
);
1146 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1152 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1156 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1158 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1160 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1162 if_stmt
->then_instructions
.push_tail(brk
);
1164 if_stmt
->accept(this);
1171 visit_exec_list(&ir
->body_instructions
, this);
1173 if (ir
->increment
) {
1175 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1176 counter
, ir
->increment
);
1178 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1185 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1189 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1192 case ir_loop_jump::jump_break
:
1193 emit(NULL
, TGSI_OPCODE_BRK
);
1195 case ir_loop_jump::jump_continue
:
1196 emit(NULL
, TGSI_OPCODE_CONT
);
1203 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1210 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1212 /* Ignore function bodies other than main() -- we shouldn't see calls to
1213 * them since they should all be inlined before we get to glsl_to_tgsi.
1215 if (strcmp(ir
->name
, "main") == 0) {
1216 const ir_function_signature
*sig
;
1219 sig
= ir
->matching_signature(&empty
);
1223 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1224 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1232 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1234 int nonmul_operand
= 1 - mul_operand
;
1236 st_dst_reg result_dst
;
1238 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1239 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1242 expr
->operands
[0]->accept(this);
1244 expr
->operands
[1]->accept(this);
1246 ir
->operands
[nonmul_operand
]->accept(this);
1249 this->result
= get_temp(ir
->type
);
1250 result_dst
= st_dst_reg(this->result
);
1251 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1252 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1258 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1260 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1261 * implemented using multiplication, and logical-or is implemented using
1262 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1263 * As result, the logical expression (a & !b) can be rewritten as:
1267 * - (a * 1) - (a * b)
1271 * This final expression can be implemented as a single MAD(a, -b, a)
1275 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1277 const int other_operand
= 1 - try_operand
;
1280 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1281 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1284 ir
->operands
[other_operand
]->accept(this);
1286 expr
->operands
[0]->accept(this);
1289 b
.negate
= ~b
.negate
;
1291 this->result
= get_temp(ir
->type
);
1292 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1298 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1300 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1302 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1303 !st_context(this->ctx
)->has_shader_model3
) {
1307 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1311 sat_src
->accept(this);
1312 st_src_reg src
= this->result
;
1314 /* If we generated an expression instruction into a temporary in
1315 * processing the saturate's operand, apply the saturate to that
1316 * instruction. Otherwise, generate a MOV to do the saturate.
1318 * Note that we have to be careful to only do this optimization if
1319 * the instruction in question was what generated src->result. For
1320 * example, ir_dereference_array might generate a MUL instruction
1321 * to create the reladdr, and return us a src reg using that
1322 * reladdr. That MUL result is not the value we're trying to
1325 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1326 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1327 sat_src_expr
->operation
== ir_binop_add
||
1328 sat_src_expr
->operation
== ir_binop_dot
)) {
1329 glsl_to_tgsi_instruction
*new_inst
;
1330 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1331 new_inst
->saturate
= true;
1333 this->result
= get_temp(ir
->type
);
1334 st_dst_reg result_dst
= st_dst_reg(this->result
);
1335 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1336 glsl_to_tgsi_instruction
*inst
;
1337 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1338 inst
->saturate
= true;
1345 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1346 st_src_reg
*reg
, int *num_reladdr
)
1351 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1353 if (*num_reladdr
!= 1) {
1354 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1356 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1364 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1366 unsigned int operand
;
1367 st_src_reg op
[Elements(ir
->operands
)];
1368 st_src_reg result_src
;
1369 st_dst_reg result_dst
;
1371 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1373 if (ir
->operation
== ir_binop_add
) {
1374 if (try_emit_mad(ir
, 1))
1376 if (try_emit_mad(ir
, 0))
1380 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1382 if (ir
->operation
== ir_binop_logic_and
) {
1383 if (try_emit_mad_for_and_not(ir
, 1))
1385 if (try_emit_mad_for_and_not(ir
, 0))
1389 if (try_emit_sat(ir
))
1392 if (ir
->operation
== ir_quadop_vector
)
1393 assert(!"ir_quadop_vector should have been lowered");
1395 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1396 this->result
.file
= PROGRAM_UNDEFINED
;
1397 ir
->operands
[operand
]->accept(this);
1398 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1400 printf("Failed to get tree for expression operand:\n");
1401 ir
->operands
[operand
]->accept(&v
);
1404 op
[operand
] = this->result
;
1406 /* Matrix expression operands should have been broken down to vector
1407 * operations already.
1409 assert(!ir
->operands
[operand
]->type
->is_matrix());
1412 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1413 if (ir
->operands
[1]) {
1414 vector_elements
= MAX2(vector_elements
,
1415 ir
->operands
[1]->type
->vector_elements
);
1418 this->result
.file
= PROGRAM_UNDEFINED
;
1420 /* Storage for our result. Ideally for an assignment we'd be using
1421 * the actual storage for the result here, instead.
1423 result_src
= get_temp(ir
->type
);
1424 /* convenience for the emit functions below. */
1425 result_dst
= st_dst_reg(result_src
);
1426 /* Limit writes to the channels that will be used by result_src later.
1427 * This does limit this temp's use as a temporary for multi-instruction
1430 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1432 switch (ir
->operation
) {
1433 case ir_unop_logic_not
:
1434 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1435 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1437 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1438 * older GPUs implement SEQ using multiple instructions (i915 uses two
1439 * SGE instructions and a MUL instruction). Since our logic values are
1440 * 0.0 and 1.0, 1-x also implements !x.
1442 op
[0].negate
= ~op
[0].negate
;
1443 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1447 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1448 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1450 op
[0].negate
= ~op
[0].negate
;
1455 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1458 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1461 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1465 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1469 assert(!"not reached: should be handled by ir_explog_to_explog2");
1472 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1475 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1478 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1480 case ir_unop_sin_reduced
:
1481 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1483 case ir_unop_cos_reduced
:
1484 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1488 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1492 /* The X component contains 1 or -1 depending on whether the framebuffer
1493 * is a FBO or the window system buffer, respectively.
1494 * It is then multiplied with the source operand of DDY.
1496 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1497 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1499 unsigned transform_y_index
=
1500 _mesa_add_state_reference(this->prog
->Parameters
,
1503 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1505 glsl_type::vec4_type
);
1506 transform_y
.swizzle
= SWIZZLE_XXXX
;
1508 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1510 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1511 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1515 case ir_unop_noise
: {
1516 /* At some point, a motivated person could add a better
1517 * implementation of noise. Currently not even the nvidia
1518 * binary drivers do anything more than this. In any case, the
1519 * place to do this is in the GL state tracker, not the poor
1522 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1527 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1530 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1534 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1537 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1538 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1540 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1543 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1544 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1546 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1550 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1552 case ir_binop_greater
:
1553 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1555 case ir_binop_lequal
:
1556 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1558 case ir_binop_gequal
:
1559 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1561 case ir_binop_equal
:
1562 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1564 case ir_binop_nequal
:
1565 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1567 case ir_binop_all_equal
:
1568 /* "==" operator producing a scalar boolean. */
1569 if (ir
->operands
[0]->type
->is_vector() ||
1570 ir
->operands
[1]->type
->is_vector()) {
1571 st_src_reg temp
= get_temp(native_integers
?
1572 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1573 glsl_type::vec4_type
);
1575 if (native_integers
) {
1576 st_dst_reg temp_dst
= st_dst_reg(temp
);
1577 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1579 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1581 /* Emit 1-3 AND operations to combine the SEQ results. */
1582 switch (ir
->operands
[0]->type
->vector_elements
) {
1586 temp_dst
.writemask
= WRITEMASK_Y
;
1587 temp1
.swizzle
= SWIZZLE_YYYY
;
1588 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1589 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1592 temp_dst
.writemask
= WRITEMASK_X
;
1593 temp1
.swizzle
= SWIZZLE_XXXX
;
1594 temp2
.swizzle
= SWIZZLE_YYYY
;
1595 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1596 temp_dst
.writemask
= WRITEMASK_Y
;
1597 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1598 temp2
.swizzle
= SWIZZLE_WWWW
;
1599 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1602 temp1
.swizzle
= SWIZZLE_XXXX
;
1603 temp2
.swizzle
= SWIZZLE_YYYY
;
1604 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1606 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1608 /* After the dot-product, the value will be an integer on the
1609 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1611 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1613 /* Negating the result of the dot-product gives values on the range
1614 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1615 * This is achieved using SGE.
1617 st_src_reg sge_src
= result_src
;
1618 sge_src
.negate
= ~sge_src
.negate
;
1619 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1622 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1625 case ir_binop_any_nequal
:
1626 /* "!=" operator producing a scalar boolean. */
1627 if (ir
->operands
[0]->type
->is_vector() ||
1628 ir
->operands
[1]->type
->is_vector()) {
1629 st_src_reg temp
= get_temp(native_integers
?
1630 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1631 glsl_type::vec4_type
);
1632 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1634 if (native_integers
) {
1635 st_dst_reg temp_dst
= st_dst_reg(temp
);
1636 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1638 /* Emit 1-3 OR operations to combine the SNE results. */
1639 switch (ir
->operands
[0]->type
->vector_elements
) {
1643 temp_dst
.writemask
= WRITEMASK_Y
;
1644 temp1
.swizzle
= SWIZZLE_YYYY
;
1645 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1646 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1649 temp_dst
.writemask
= WRITEMASK_X
;
1650 temp1
.swizzle
= SWIZZLE_XXXX
;
1651 temp2
.swizzle
= SWIZZLE_YYYY
;
1652 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1653 temp_dst
.writemask
= WRITEMASK_Y
;
1654 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1655 temp2
.swizzle
= SWIZZLE_WWWW
;
1656 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1659 temp1
.swizzle
= SWIZZLE_XXXX
;
1660 temp2
.swizzle
= SWIZZLE_YYYY
;
1661 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1663 /* After the dot-product, the value will be an integer on the
1664 * range [0,4]. Zero stays zero, and positive values become 1.0.
1666 glsl_to_tgsi_instruction
*const dp
=
1667 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1668 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1669 /* The clamping to [0,1] can be done for free in the fragment
1670 * shader with a saturate.
1672 dp
->saturate
= true;
1674 /* Negating the result of the dot-product gives values on the range
1675 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1676 * achieved using SLT.
1678 st_src_reg slt_src
= result_src
;
1679 slt_src
.negate
= ~slt_src
.negate
;
1680 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1684 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1689 assert(ir
->operands
[0]->type
->is_vector());
1691 /* After the dot-product, the value will be an integer on the
1692 * range [0,4]. Zero stays zero, and positive values become 1.0.
1694 glsl_to_tgsi_instruction
*const dp
=
1695 emit_dp(ir
, result_dst
, op
[0], op
[0],
1696 ir
->operands
[0]->type
->vector_elements
);
1697 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1698 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1699 /* The clamping to [0,1] can be done for free in the fragment
1700 * shader with a saturate.
1702 dp
->saturate
= true;
1703 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1704 /* Negating the result of the dot-product gives values on the range
1705 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1706 * is achieved using SLT.
1708 st_src_reg slt_src
= result_src
;
1709 slt_src
.negate
= ~slt_src
.negate
;
1710 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1713 /* Use SNE 0 if integers are being used as boolean values. */
1714 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1719 case ir_binop_logic_xor
:
1720 if (native_integers
)
1721 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1723 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1726 case ir_binop_logic_or
: {
1727 if (native_integers
) {
1728 /* If integers are used as booleans, we can use an actual "or"
1731 assert(native_integers
);
1732 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1734 /* After the addition, the value will be an integer on the
1735 * range [0,2]. Zero stays zero, and positive values become 1.0.
1737 glsl_to_tgsi_instruction
*add
=
1738 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1739 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1740 /* The clamping to [0,1] can be done for free in the fragment
1741 * shader with a saturate if floats are being used as boolean values.
1743 add
->saturate
= true;
1745 /* Negating the result of the addition gives values on the range
1746 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1747 * is achieved using SLT.
1749 st_src_reg slt_src
= result_src
;
1750 slt_src
.negate
= ~slt_src
.negate
;
1751 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1757 case ir_binop_logic_and
:
1758 /* If native integers are disabled, the bool args are stored as float 0.0
1759 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1760 * actual AND opcode.
1762 if (native_integers
)
1763 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1765 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1769 assert(ir
->operands
[0]->type
->is_vector());
1770 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1771 emit_dp(ir
, result_dst
, op
[0], op
[1],
1772 ir
->operands
[0]->type
->vector_elements
);
1777 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1780 /* sqrt(x) = x * rsq(x). */
1781 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1782 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1783 /* For incoming channels <= 0, set the result to 0. */
1784 op
[0].negate
= ~op
[0].negate
;
1785 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1786 op
[0], result_src
, st_src_reg_for_float(0.0));
1790 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1793 if (native_integers
) {
1794 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1797 /* fallthrough to next case otherwise */
1799 if (native_integers
) {
1800 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1803 /* fallthrough to next case otherwise */
1806 /* Converting between signed and unsigned integers is a no-op. */
1810 if (native_integers
) {
1811 /* Booleans are stored as integers using ~0 for true and 0 for false.
1812 * GLSL requires that int(bool) return 1 for true and 0 for false.
1813 * This conversion is done with AND, but it could be done with NEG.
1815 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1817 /* Booleans and integers are both stored as floats when native
1818 * integers are disabled.
1824 if (native_integers
)
1825 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1827 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1830 if (native_integers
)
1831 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1833 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1835 case ir_unop_bitcast_f2i
:
1836 case ir_unop_bitcast_f2u
:
1837 case ir_unop_bitcast_i2f
:
1838 case ir_unop_bitcast_u2f
:
1842 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1845 if (native_integers
)
1846 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1848 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1851 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1854 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1857 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1859 case ir_unop_round_even
:
1860 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1863 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1867 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1870 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1873 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1876 case ir_unop_bit_not
:
1877 if (native_integers
) {
1878 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1882 if (native_integers
) {
1883 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1886 case ir_binop_lshift
:
1887 if (native_integers
) {
1888 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1891 case ir_binop_rshift
:
1892 if (native_integers
) {
1893 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1896 case ir_binop_bit_and
:
1897 if (native_integers
) {
1898 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1901 case ir_binop_bit_xor
:
1902 if (native_integers
) {
1903 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1906 case ir_binop_bit_or
:
1907 if (native_integers
) {
1908 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1912 assert(!"GLSL 1.30 features unsupported");
1915 case ir_binop_ubo_load
: {
1916 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1917 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1918 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1919 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1922 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1923 cbuf
.file
= PROGRAM_CONSTANT
;
1925 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1926 cbuf
.reladdr
= NULL
;
1929 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1931 if (const_offset_ir
) {
1932 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1934 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1937 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1938 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1939 const_offset
% 16 / 4,
1940 const_offset
% 16 / 4,
1941 const_offset
% 16 / 4);
1943 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1944 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1946 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1947 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1948 result_src
.negate
= 1;
1949 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, result_src
, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1951 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1956 /* note: we have to reorder the three args here */
1957 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1959 case ir_unop_pack_snorm_2x16
:
1960 case ir_unop_pack_unorm_2x16
:
1961 case ir_unop_pack_half_2x16
:
1962 case ir_unop_pack_snorm_4x8
:
1963 case ir_unop_pack_unorm_4x8
:
1964 case ir_unop_unpack_snorm_2x16
:
1965 case ir_unop_unpack_unorm_2x16
:
1966 case ir_unop_unpack_half_2x16
:
1967 case ir_unop_unpack_half_2x16_split_x
:
1968 case ir_unop_unpack_half_2x16_split_y
:
1969 case ir_unop_unpack_snorm_4x8
:
1970 case ir_unop_unpack_unorm_4x8
:
1971 case ir_binop_pack_half_2x16_split
:
1972 case ir_quadop_vector
:
1973 /* This operation is not supported, or should have already been handled.
1975 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1979 this->result
= result_src
;
1984 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1990 /* Note that this is only swizzles in expressions, not those on the left
1991 * hand side of an assignment, which do write masking. See ir_assignment
1995 ir
->val
->accept(this);
1997 assert(src
.file
!= PROGRAM_UNDEFINED
);
1999 for (i
= 0; i
< 4; i
++) {
2000 if (i
< ir
->type
->vector_elements
) {
2003 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2006 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2009 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2012 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2016 /* If the type is smaller than a vec4, replicate the last
2019 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2023 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2029 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2031 variable_storage
*entry
= find_variable_storage(ir
->var
);
2032 ir_variable
*var
= ir
->var
;
2035 switch (var
->mode
) {
2036 case ir_var_uniform
:
2037 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2039 this->variables
.push_tail(entry
);
2041 case ir_var_shader_in
:
2042 /* The linker assigns locations for varyings and attributes,
2043 * including deprecated builtins (like gl_Color), user-assign
2044 * generic attributes (glBindVertexLocation), and
2045 * user-defined varyings.
2047 assert(var
->location
!= -1);
2048 entry
= new(mem_ctx
) variable_storage(var
,
2052 case ir_var_shader_out
:
2053 assert(var
->location
!= -1);
2054 entry
= new(mem_ctx
) variable_storage(var
,
2056 var
->location
+ var
->index
);
2058 case ir_var_system_value
:
2059 entry
= new(mem_ctx
) variable_storage(var
,
2060 PROGRAM_SYSTEM_VALUE
,
2064 case ir_var_temporary
:
2065 st_src_reg src
= get_temp(var
->type
);
2067 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2068 this->variables
.push_tail(entry
);
2074 printf("Failed to make storage for %s\n", var
->name
);
2079 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2080 if (!native_integers
)
2081 this->result
.type
= GLSL_TYPE_FLOAT
;
2085 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2089 int element_size
= type_size(ir
->type
);
2091 index
= ir
->array_index
->constant_expression_value();
2093 ir
->array
->accept(this);
2097 src
.index
+= index
->value
.i
[0] * element_size
;
2099 /* Variable index array dereference. It eats the "vec4" of the
2100 * base of the array and an index that offsets the TGSI register
2103 ir
->array_index
->accept(this);
2105 st_src_reg index_reg
;
2107 if (element_size
== 1) {
2108 index_reg
= this->result
;
2110 index_reg
= get_temp(native_integers
?
2111 glsl_type::int_type
: glsl_type::float_type
);
2113 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2114 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2117 /* If there was already a relative address register involved, add the
2118 * new and the old together to get the new offset.
2120 if (src
.reladdr
!= NULL
) {
2121 st_src_reg accum_reg
= get_temp(native_integers
?
2122 glsl_type::int_type
: glsl_type::float_type
);
2124 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2125 index_reg
, *src
.reladdr
);
2127 index_reg
= accum_reg
;
2130 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2131 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2134 /* If the type is smaller than a vec4, replicate the last channel out. */
2135 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2136 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2138 src
.swizzle
= SWIZZLE_NOOP
;
2140 /* Change the register type to the element type of the array. */
2141 src
.type
= ir
->type
->base_type
;
2147 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2150 const glsl_type
*struct_type
= ir
->record
->type
;
2153 ir
->record
->accept(this);
2155 for (i
= 0; i
< struct_type
->length
; i
++) {
2156 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2158 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2161 /* If the type is smaller than a vec4, replicate the last channel out. */
2162 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2163 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2165 this->result
.swizzle
= SWIZZLE_NOOP
;
2167 this->result
.index
+= offset
;
2168 this->result
.type
= ir
->type
->base_type
;
2172 * We want to be careful in assignment setup to hit the actual storage
2173 * instead of potentially using a temporary like we might with the
2174 * ir_dereference handler.
2177 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2179 /* The LHS must be a dereference. If the LHS is a variable indexed array
2180 * access of a vector, it must be separated into a series conditional moves
2181 * before reaching this point (see ir_vec_index_to_cond_assign).
2183 assert(ir
->as_dereference());
2184 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2186 assert(!deref_array
->array
->type
->is_vector());
2189 /* Use the rvalue deref handler for the most part. We'll ignore
2190 * swizzles in it and write swizzles using writemask, though.
2193 return st_dst_reg(v
->result
);
2197 * Process the condition of a conditional assignment
2199 * Examines the condition of a conditional assignment to generate the optimal
2200 * first operand of a \c CMP instruction. If the condition is a relational
2201 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2202 * used as the source for the \c CMP instruction. Otherwise the comparison
2203 * is processed to a boolean result, and the boolean result is used as the
2204 * operand to the CMP instruction.
2207 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2209 ir_rvalue
*src_ir
= ir
;
2211 bool switch_order
= false;
2213 ir_expression
*const expr
= ir
->as_expression();
2214 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2215 bool zero_on_left
= false;
2217 if (expr
->operands
[0]->is_zero()) {
2218 src_ir
= expr
->operands
[1];
2219 zero_on_left
= true;
2220 } else if (expr
->operands
[1]->is_zero()) {
2221 src_ir
= expr
->operands
[0];
2222 zero_on_left
= false;
2226 * (a < 0) T F F ( a < 0) T F F
2227 * (0 < a) F F T (-a < 0) F F T
2228 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2229 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2230 * (a > 0) F F T (-a < 0) F F T
2231 * (0 > a) T F F ( a < 0) T F F
2232 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2233 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2235 * Note that exchanging the order of 0 and 'a' in the comparison simply
2236 * means that the value of 'a' should be negated.
2239 switch (expr
->operation
) {
2241 switch_order
= false;
2242 negate
= zero_on_left
;
2245 case ir_binop_greater
:
2246 switch_order
= false;
2247 negate
= !zero_on_left
;
2250 case ir_binop_lequal
:
2251 switch_order
= true;
2252 negate
= !zero_on_left
;
2255 case ir_binop_gequal
:
2256 switch_order
= true;
2257 negate
= zero_on_left
;
2261 /* This isn't the right kind of comparison afterall, so make sure
2262 * the whole condition is visited.
2270 src_ir
->accept(this);
2272 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2273 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2274 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2275 * computing the condition.
2278 this->result
.negate
= ~this->result
.negate
;
2280 return switch_order
;
2284 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2285 st_dst_reg
*l
, st_src_reg
*r
)
2287 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2288 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2289 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2294 if (type
->is_array()) {
2295 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2296 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2301 if (type
->is_matrix()) {
2302 const struct glsl_type
*vec_type
;
2304 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2305 type
->vector_elements
, 1);
2307 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2308 emit_block_mov(ir
, vec_type
, l
, r
);
2313 assert(type
->is_scalar() || type
->is_vector());
2315 r
->type
= type
->base_type
;
2316 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2322 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2328 ir
->rhs
->accept(this);
2331 l
= get_assignment_lhs(ir
->lhs
, this);
2333 /* FINISHME: This should really set to the correct maximal writemask for each
2334 * FINISHME: component written (in the loops below). This case can only
2335 * FINISHME: occur for matrices, arrays, and structures.
2337 if (ir
->write_mask
== 0) {
2338 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2339 l
.writemask
= WRITEMASK_XYZW
;
2340 } else if (ir
->lhs
->type
->is_scalar() &&
2341 ir
->lhs
->variable_referenced()->mode
== ir_var_shader_out
) {
2342 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2343 * FINISHME: W component of fragment shader output zero, work correctly.
2345 l
.writemask
= WRITEMASK_XYZW
;
2348 int first_enabled_chan
= 0;
2351 l
.writemask
= ir
->write_mask
;
2353 for (int i
= 0; i
< 4; i
++) {
2354 if (l
.writemask
& (1 << i
)) {
2355 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2360 /* Swizzle a small RHS vector into the channels being written.
2362 * glsl ir treats write_mask as dictating how many channels are
2363 * present on the RHS while TGSI treats write_mask as just
2364 * showing which channels of the vec4 RHS get written.
2366 for (int i
= 0; i
< 4; i
++) {
2367 if (l
.writemask
& (1 << i
))
2368 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2370 swizzles
[i
] = first_enabled_chan
;
2372 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2373 swizzles
[2], swizzles
[3]);
2376 assert(l
.file
!= PROGRAM_UNDEFINED
);
2377 assert(r
.file
!= PROGRAM_UNDEFINED
);
2379 if (ir
->condition
) {
2380 const bool switch_order
= this->process_move_condition(ir
->condition
);
2381 st_src_reg condition
= this->result
;
2383 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2384 st_src_reg l_src
= st_src_reg(l
);
2385 st_src_reg condition_temp
= condition
;
2386 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2388 if (native_integers
) {
2389 /* This is necessary because TGSI's CMP instruction expects the
2390 * condition to be a float, and we store booleans as integers.
2391 * If TGSI had a UCMP instruction or similar, this extra
2392 * instruction would not be necessary.
2394 condition_temp
= get_temp(glsl_type::vec4_type
);
2395 condition
.negate
= 0;
2396 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2397 condition_temp
.swizzle
= condition
.swizzle
;
2401 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2403 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2409 } else if (ir
->rhs
->as_expression() &&
2410 this->instructions
.get_tail() &&
2411 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2412 type_size(ir
->lhs
->type
) == 1 &&
2413 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2414 /* To avoid emitting an extra MOV when assigning an expression to a
2415 * variable, emit the last instruction of the expression again, but
2416 * replace the destination register with the target of the assignment.
2417 * Dead code elimination will remove the original instruction.
2419 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2420 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2421 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2422 new_inst
->saturate
= inst
->saturate
;
2423 inst
->dead_mask
= inst
->dst
.writemask
;
2425 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2431 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2434 GLfloat stack_vals
[4] = { 0 };
2435 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2436 GLenum gl_type
= GL_NONE
;
2438 static int in_array
= 0;
2439 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2441 /* Unfortunately, 4 floats is all we can get into
2442 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2443 * aggregate constant and move each constant value into it. If we
2444 * get lucky, copy propagation will eliminate the extra moves.
2446 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2447 st_src_reg temp_base
= get_temp(ir
->type
);
2448 st_dst_reg temp
= st_dst_reg(temp_base
);
2450 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2451 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2452 int size
= type_size(field_value
->type
);
2456 field_value
->accept(this);
2459 for (i
= 0; i
< (unsigned int)size
; i
++) {
2460 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2466 this->result
= temp_base
;
2470 if (ir
->type
->is_array()) {
2471 st_src_reg temp_base
= get_temp(ir
->type
);
2472 st_dst_reg temp
= st_dst_reg(temp_base
);
2473 int size
= type_size(ir
->type
->fields
.array
);
2478 for (i
= 0; i
< ir
->type
->length
; i
++) {
2479 ir
->array_elements
[i
]->accept(this);
2481 for (int j
= 0; j
< size
; j
++) {
2482 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2488 this->result
= temp_base
;
2493 if (ir
->type
->is_matrix()) {
2494 st_src_reg mat
= get_temp(ir
->type
);
2495 st_dst_reg mat_column
= st_dst_reg(mat
);
2497 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2498 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2499 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2501 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2502 src
.index
= add_constant(file
,
2504 ir
->type
->vector_elements
,
2507 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2516 switch (ir
->type
->base_type
) {
2517 case GLSL_TYPE_FLOAT
:
2519 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2520 values
[i
].f
= ir
->value
.f
[i
];
2523 case GLSL_TYPE_UINT
:
2524 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2525 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2526 if (native_integers
)
2527 values
[i
].u
= ir
->value
.u
[i
];
2529 values
[i
].f
= ir
->value
.u
[i
];
2533 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2534 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2535 if (native_integers
)
2536 values
[i
].i
= ir
->value
.i
[i
];
2538 values
[i
].f
= ir
->value
.i
[i
];
2541 case GLSL_TYPE_BOOL
:
2542 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2543 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2544 if (native_integers
)
2545 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2547 values
[i
].f
= ir
->value
.b
[i
];
2551 assert(!"Non-float/uint/int/bool constant");
2554 this->result
= st_src_reg(file
, -1, ir
->type
);
2555 this->result
.index
= add_constant(file
,
2557 ir
->type
->vector_elements
,
2559 &this->result
.swizzle
);
2563 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2565 function_entry
*entry
;
2567 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2568 entry
= (function_entry
*)iter
.get();
2570 if (entry
->sig
== sig
)
2574 entry
= ralloc(mem_ctx
, function_entry
);
2576 entry
->sig_id
= this->next_signature_id
++;
2577 entry
->bgn_inst
= NULL
;
2579 /* Allocate storage for all the parameters. */
2580 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2581 ir_variable
*param
= (ir_variable
*)iter
.get();
2582 variable_storage
*storage
;
2584 storage
= find_variable_storage(param
);
2587 st_src_reg src
= get_temp(param
->type
);
2589 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2590 this->variables
.push_tail(storage
);
2593 if (!sig
->return_type
->is_void()) {
2594 entry
->return_reg
= get_temp(sig
->return_type
);
2596 entry
->return_reg
= undef_src
;
2599 this->function_signatures
.push_tail(entry
);
2604 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2606 glsl_to_tgsi_instruction
*call_inst
;
2607 ir_function_signature
*sig
= ir
->callee
;
2608 function_entry
*entry
= get_function_signature(sig
);
2611 /* Process in parameters. */
2612 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2613 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2614 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2615 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2617 if (param
->mode
== ir_var_function_in
||
2618 param
->mode
== ir_var_function_inout
) {
2619 variable_storage
*storage
= find_variable_storage(param
);
2622 param_rval
->accept(this);
2623 st_src_reg r
= this->result
;
2626 l
.file
= storage
->file
;
2627 l
.index
= storage
->index
;
2629 l
.writemask
= WRITEMASK_XYZW
;
2630 l
.cond_mask
= COND_TR
;
2632 for (i
= 0; i
< type_size(param
->type
); i
++) {
2633 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2641 assert(!sig_iter
.has_next());
2643 /* Emit call instruction */
2644 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2645 call_inst
->function
= entry
;
2647 /* Process out parameters. */
2648 sig_iter
= sig
->parameters
.iterator();
2649 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2650 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2651 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2653 if (param
->mode
== ir_var_function_out
||
2654 param
->mode
== ir_var_function_inout
) {
2655 variable_storage
*storage
= find_variable_storage(param
);
2659 r
.file
= storage
->file
;
2660 r
.index
= storage
->index
;
2662 r
.swizzle
= SWIZZLE_NOOP
;
2665 param_rval
->accept(this);
2666 st_dst_reg l
= st_dst_reg(this->result
);
2668 for (i
= 0; i
< type_size(param
->type
); i
++) {
2669 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2677 assert(!sig_iter
.has_next());
2679 /* Process return value. */
2680 this->result
= entry
->return_reg
;
2684 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2686 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2687 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2688 glsl_to_tgsi_instruction
*inst
= NULL
;
2689 unsigned opcode
= TGSI_OPCODE_NOP
;
2690 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2691 bool is_cube_array
= false;
2693 /* if we are a cube array sampler */
2694 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2695 sampler_type
->sampler_array
)) {
2696 is_cube_array
= true;
2699 if (ir
->coordinate
) {
2700 ir
->coordinate
->accept(this);
2702 /* Put our coords in a temp. We'll need to modify them for shadow,
2703 * projection, or LOD, so the only case we'd use it as is is if
2704 * we're doing plain old texturing. The optimization passes on
2705 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2707 coord
= get_temp(glsl_type::vec4_type
);
2708 coord_dst
= st_dst_reg(coord
);
2709 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2710 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2713 if (ir
->projector
) {
2714 ir
->projector
->accept(this);
2715 projector
= this->result
;
2718 /* Storage for our result. Ideally for an assignment we'd be using
2719 * the actual storage for the result here, instead.
2721 result_src
= get_temp(ir
->type
);
2722 result_dst
= st_dst_reg(result_src
);
2726 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2728 ir
->offset
->accept(this);
2729 offset
= this->result
;
2733 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2734 ir
->lod_info
.bias
->accept(this);
2735 lod_info
= this->result
;
2737 ir
->offset
->accept(this);
2738 offset
= this->result
;
2742 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2743 ir
->lod_info
.lod
->accept(this);
2744 lod_info
= this->result
;
2746 ir
->offset
->accept(this);
2747 offset
= this->result
;
2751 opcode
= TGSI_OPCODE_TXD
;
2752 ir
->lod_info
.grad
.dPdx
->accept(this);
2754 ir
->lod_info
.grad
.dPdy
->accept(this);
2757 ir
->offset
->accept(this);
2758 offset
= this->result
;
2762 opcode
= TGSI_OPCODE_TXQ
;
2763 ir
->lod_info
.lod
->accept(this);
2764 lod_info
= this->result
;
2767 opcode
= TGSI_OPCODE_TXF
;
2768 ir
->lod_info
.lod
->accept(this);
2769 lod_info
= this->result
;
2771 ir
->offset
->accept(this);
2772 offset
= this->result
;
2776 opcode
= TGSI_OPCODE_TXF
;
2777 ir
->lod_info
.sample_index
->accept(this);
2778 sample_index
= this->result
;
2781 assert(!"Unexpected ir_lod opcode");
2785 if (ir
->projector
) {
2786 if (opcode
== TGSI_OPCODE_TEX
) {
2787 /* Slot the projector in as the last component of the coord. */
2788 coord_dst
.writemask
= WRITEMASK_W
;
2789 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2790 coord_dst
.writemask
= WRITEMASK_XYZW
;
2791 opcode
= TGSI_OPCODE_TXP
;
2793 st_src_reg coord_w
= coord
;
2794 coord_w
.swizzle
= SWIZZLE_WWWW
;
2796 /* For the other TEX opcodes there's no projective version
2797 * since the last slot is taken up by LOD info. Do the
2798 * projective divide now.
2800 coord_dst
.writemask
= WRITEMASK_W
;
2801 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2803 /* In the case where we have to project the coordinates "by hand,"
2804 * the shadow comparator value must also be projected.
2806 st_src_reg tmp_src
= coord
;
2807 if (ir
->shadow_comparitor
) {
2808 /* Slot the shadow value in as the second to last component of the
2811 ir
->shadow_comparitor
->accept(this);
2813 tmp_src
= get_temp(glsl_type::vec4_type
);
2814 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2816 /* Projective division not allowed for array samplers. */
2817 assert(!sampler_type
->sampler_array
);
2819 tmp_dst
.writemask
= WRITEMASK_Z
;
2820 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2822 tmp_dst
.writemask
= WRITEMASK_XY
;
2823 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2826 coord_dst
.writemask
= WRITEMASK_XYZ
;
2827 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2829 coord_dst
.writemask
= WRITEMASK_XYZW
;
2830 coord
.swizzle
= SWIZZLE_XYZW
;
2834 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2835 * comparator was put in the correct place (and projected) by the code,
2836 * above, that handles by-hand projection.
2838 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2839 /* Slot the shadow value in as the second to last component of the
2842 ir
->shadow_comparitor
->accept(this);
2844 if (is_cube_array
) {
2845 cube_sc
= get_temp(glsl_type::float_type
);
2846 cube_sc_dst
= st_dst_reg(cube_sc
);
2847 cube_sc_dst
.writemask
= WRITEMASK_X
;
2848 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2849 cube_sc_dst
.writemask
= WRITEMASK_X
;
2852 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2853 sampler_type
->sampler_array
) ||
2854 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2855 coord_dst
.writemask
= WRITEMASK_W
;
2857 coord_dst
.writemask
= WRITEMASK_Z
;
2860 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2861 coord_dst
.writemask
= WRITEMASK_XYZW
;
2865 if (ir
->op
== ir_txf_ms
) {
2866 coord_dst
.writemask
= WRITEMASK_W
;
2867 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2868 coord_dst
.writemask
= WRITEMASK_XYZW
;
2869 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2870 opcode
== TGSI_OPCODE_TXF
) {
2871 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2872 coord_dst
.writemask
= WRITEMASK_W
;
2873 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2874 coord_dst
.writemask
= WRITEMASK_XYZW
;
2877 if (opcode
== TGSI_OPCODE_TXD
)
2878 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2879 else if (opcode
== TGSI_OPCODE_TXQ
)
2880 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2881 else if (opcode
== TGSI_OPCODE_TXF
) {
2882 inst
= emit(ir
, opcode
, result_dst
, coord
);
2883 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2884 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2885 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2886 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2888 inst
= emit(ir
, opcode
, result_dst
, coord
);
2890 if (ir
->shadow_comparitor
)
2891 inst
->tex_shadow
= GL_TRUE
;
2893 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2894 this->shader_program
,
2898 inst
->tex_offset_num_offset
= 1;
2899 inst
->tex_offsets
[0].Index
= offset
.index
;
2900 inst
->tex_offsets
[0].File
= offset
.file
;
2901 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2902 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2903 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2906 switch (sampler_type
->sampler_dimensionality
) {
2907 case GLSL_SAMPLER_DIM_1D
:
2908 inst
->tex_target
= (sampler_type
->sampler_array
)
2909 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2911 case GLSL_SAMPLER_DIM_2D
:
2912 inst
->tex_target
= (sampler_type
->sampler_array
)
2913 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2915 case GLSL_SAMPLER_DIM_3D
:
2916 inst
->tex_target
= TEXTURE_3D_INDEX
;
2918 case GLSL_SAMPLER_DIM_CUBE
:
2919 inst
->tex_target
= (sampler_type
->sampler_array
)
2920 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2922 case GLSL_SAMPLER_DIM_RECT
:
2923 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2925 case GLSL_SAMPLER_DIM_BUF
:
2926 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2928 case GLSL_SAMPLER_DIM_EXTERNAL
:
2929 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2931 case GLSL_SAMPLER_DIM_MS
:
2932 inst
->tex_target
= (sampler_type
->sampler_array
)
2933 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2936 assert(!"Should not get here.");
2939 this->result
= result_src
;
2943 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2945 if (ir
->get_value()) {
2949 assert(current_function
);
2951 ir
->get_value()->accept(this);
2952 st_src_reg r
= this->result
;
2954 l
= st_dst_reg(current_function
->return_reg
);
2956 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2957 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2963 emit(ir
, TGSI_OPCODE_RET
);
2967 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2969 if (ir
->condition
) {
2970 ir
->condition
->accept(this);
2971 this->result
.negate
= ~this->result
.negate
;
2972 emit(ir
, TGSI_OPCODE_KIL
, undef_dst
, this->result
);
2974 emit(ir
, TGSI_OPCODE_KILP
);
2979 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2982 glsl_to_tgsi_instruction
*if_inst
;
2984 ir
->condition
->accept(this);
2985 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2987 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
2989 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
2991 this->instructions
.push_tail(if_inst
);
2993 visit_exec_list(&ir
->then_instructions
, this);
2995 if (!ir
->else_instructions
.is_empty()) {
2996 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
2997 visit_exec_list(&ir
->else_instructions
, this);
3000 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3003 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3005 result
.file
= PROGRAM_UNDEFINED
;
3008 next_signature_id
= 1;
3010 current_function
= NULL
;
3011 num_address_regs
= 0;
3013 indirect_addr_consts
= false;
3015 native_integers
= false;
3016 mem_ctx
= ralloc_context(NULL
);
3019 shader_program
= NULL
;
3023 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3025 ralloc_free(mem_ctx
);
3028 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3035 * Count resources used by the given gpu program (number of texture
3039 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3041 v
->samplers_used
= 0;
3043 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3044 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3046 if (is_tex_instruction(inst
->op
)) {
3047 v
->samplers_used
|= 1 << inst
->sampler
;
3049 if (inst
->tex_shadow
) {
3050 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3055 prog
->SamplersUsed
= v
->samplers_used
;
3057 if (v
->shader_program
!= NULL
)
3058 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3062 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3063 struct gl_shader_program
*shader_program
,
3064 const char *name
, const glsl_type
*type
,
3067 if (type
->is_record()) {
3068 ir_constant
*field_constant
;
3070 field_constant
= (ir_constant
*)val
->components
.get_head();
3072 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3073 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3074 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3075 type
->fields
.structure
[i
].name
);
3076 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3077 field_type
, field_constant
);
3078 field_constant
= (ir_constant
*)field_constant
->next
;
3084 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3086 if (offset
== GL_INVALID_INDEX
) {
3087 fail_link(shader_program
,
3088 "Couldn't find uniform for initializer %s\n", name
);
3091 int loc
= _mesa_uniform_merge_location_offset(index
, offset
);
3093 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3094 ir_constant
*element
;
3095 const glsl_type
*element_type
;
3096 if (type
->is_array()) {
3097 element
= val
->array_elements
[i
];
3098 element_type
= type
->fields
.array
;
3101 element_type
= type
;
3106 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3107 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3108 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3109 conv
[j
] = element
->value
.b
[j
];
3111 values
= (void *)conv
;
3112 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3113 element_type
->vector_elements
,
3116 values
= &element
->value
;
3119 if (element_type
->is_matrix()) {
3120 _mesa_uniform_matrix(ctx
, shader_program
,
3121 element_type
->matrix_columns
,
3122 element_type
->vector_elements
,
3123 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3125 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3126 values
, element_type
->gl_type
);
3134 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3135 * are read from the given src in this instruction
3138 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3140 int read_mask
= 0, comp
;
3142 /* Now, given the src swizzle and the written channels, find which
3143 * components are actually read
3145 for (comp
= 0; comp
< 4; ++comp
) {
3146 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3148 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3149 read_mask
|= 1 << coord
;
3156 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3157 * instruction is the first instruction to write to register T0. There are
3158 * several lowering passes done in GLSL IR (e.g. branches and
3159 * relative addressing) that create a large number of conditional assignments
3160 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3162 * Here is why this conversion is safe:
3163 * CMP T0, T1 T2 T0 can be expanded to:
3169 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3170 * as the original program. If (T1 < 0.0) evaluates to false, executing
3171 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3172 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3173 * because any instruction that was going to read from T0 after this was going
3174 * to read a garbage value anyway.
3177 glsl_to_tgsi_visitor::simplify_cmp(void)
3179 unsigned *tempWrites
;
3180 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3182 tempWrites
= new unsigned[MAX_TEMPS
];
3186 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3187 memset(outputWrites
, 0, sizeof(outputWrites
));
3189 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3190 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3191 unsigned prevWriteMask
= 0;
3193 /* Give up if we encounter relative addressing or flow control. */
3194 if (inst
->dst
.reladdr
||
3195 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3196 inst
->op
== TGSI_OPCODE_BGNSUB
||
3197 inst
->op
== TGSI_OPCODE_CONT
||
3198 inst
->op
== TGSI_OPCODE_END
||
3199 inst
->op
== TGSI_OPCODE_ENDSUB
||
3200 inst
->op
== TGSI_OPCODE_RET
) {
3204 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3205 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3206 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3207 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3208 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3209 assert(inst
->dst
.index
< MAX_TEMPS
);
3210 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3211 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3215 /* For a CMP to be considered a conditional write, the destination
3216 * register and source register two must be the same. */
3217 if (inst
->op
== TGSI_OPCODE_CMP
3218 && !(inst
->dst
.writemask
& prevWriteMask
)
3219 && inst
->src
[2].file
== inst
->dst
.file
3220 && inst
->src
[2].index
== inst
->dst
.index
3221 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3223 inst
->op
= TGSI_OPCODE_MOV
;
3224 inst
->src
[0] = inst
->src
[1];
3228 delete [] tempWrites
;
3231 /* Replaces all references to a temporary register index with another index. */
3233 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3235 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3236 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3239 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3240 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3241 inst
->src
[j
].index
== index
) {
3242 inst
->src
[j
].index
= new_index
;
3246 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3247 inst
->dst
.index
= new_index
;
3253 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3255 int depth
= 0; /* loop depth */
3256 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3259 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3260 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3262 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3263 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3264 inst
->src
[j
].index
== index
) {
3265 return (depth
== 0) ? i
: loop_start
;
3269 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3272 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3285 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3287 int depth
= 0; /* loop depth */
3288 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3291 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3292 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3294 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3295 return (depth
== 0) ? i
: loop_start
;
3298 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3301 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3314 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3316 int depth
= 0; /* loop depth */
3317 int last
= -1; /* index of last instruction that reads the temporary */
3320 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3321 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3323 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3324 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3325 inst
->src
[j
].index
== index
) {
3326 last
= (depth
== 0) ? i
: -2;
3330 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3332 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3333 if (--depth
== 0 && last
== -2)
3345 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3347 int depth
= 0; /* loop depth */
3348 int last
= -1; /* index of last instruction that writes to the temporary */
3351 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3352 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3354 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3355 last
= (depth
== 0) ? i
: -2;
3357 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3359 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3360 if (--depth
== 0 && last
== -2)
3372 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3373 * channels for copy propagation and updates following instructions to
3374 * use the original versions.
3376 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3377 * will occur. As an example, a TXP production before this pass:
3379 * 0: MOV TEMP[1], INPUT[4].xyyy;
3380 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3381 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3385 * 0: MOV TEMP[1], INPUT[4].xyyy;
3386 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3387 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3389 * which allows for dead code elimination on TEMP[1]'s writes.
3392 glsl_to_tgsi_visitor::copy_propagate(void)
3394 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3395 glsl_to_tgsi_instruction
*,
3396 this->next_temp
* 4);
3397 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3400 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3401 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3403 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3404 || inst
->dst
.index
< this->next_temp
);
3406 /* First, do any copy propagation possible into the src regs. */
3407 for (int r
= 0; r
< 3; r
++) {
3408 glsl_to_tgsi_instruction
*first
= NULL
;
3410 int acp_base
= inst
->src
[r
].index
* 4;
3412 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3413 inst
->src
[r
].reladdr
)
3416 /* See if we can find entries in the ACP consisting of MOVs
3417 * from the same src register for all the swizzled channels
3418 * of this src register reference.
3420 for (int i
= 0; i
< 4; i
++) {
3421 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3422 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3429 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3434 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3435 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3443 /* We've now validated that we can copy-propagate to
3444 * replace this src register reference. Do it.
3446 inst
->src
[r
].file
= first
->src
[0].file
;
3447 inst
->src
[r
].index
= first
->src
[0].index
;
3450 for (int i
= 0; i
< 4; i
++) {
3451 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3452 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3453 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3456 inst
->src
[r
].swizzle
= swizzle
;
3461 case TGSI_OPCODE_BGNLOOP
:
3462 case TGSI_OPCODE_ENDLOOP
:
3463 /* End of a basic block, clear the ACP entirely. */
3464 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3467 case TGSI_OPCODE_IF
:
3468 case TGSI_OPCODE_UIF
:
3472 case TGSI_OPCODE_ENDIF
:
3473 case TGSI_OPCODE_ELSE
:
3474 /* Clear all channels written inside the block from the ACP, but
3475 * leaving those that were not touched.
3477 for (int r
= 0; r
< this->next_temp
; r
++) {
3478 for (int c
= 0; c
< 4; c
++) {
3479 if (!acp
[4 * r
+ c
])
3482 if (acp_level
[4 * r
+ c
] >= level
)
3483 acp
[4 * r
+ c
] = NULL
;
3486 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3491 /* Continuing the block, clear any written channels from
3494 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3495 /* Any temporary might be written, so no copy propagation
3496 * across this instruction.
3498 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3499 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3500 inst
->dst
.reladdr
) {
3501 /* Any output might be written, so no copy propagation
3502 * from outputs across this instruction.
3504 for (int r
= 0; r
< this->next_temp
; r
++) {
3505 for (int c
= 0; c
< 4; c
++) {
3506 if (!acp
[4 * r
+ c
])
3509 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3510 acp
[4 * r
+ c
] = NULL
;
3513 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3514 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3515 /* Clear where it's used as dst. */
3516 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3517 for (int c
= 0; c
< 4; c
++) {
3518 if (inst
->dst
.writemask
& (1 << c
)) {
3519 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3524 /* Clear where it's used as src. */
3525 for (int r
= 0; r
< this->next_temp
; r
++) {
3526 for (int c
= 0; c
< 4; c
++) {
3527 if (!acp
[4 * r
+ c
])
3530 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3532 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3533 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3534 inst
->dst
.writemask
& (1 << src_chan
))
3536 acp
[4 * r
+ c
] = NULL
;
3544 /* If this is a copy, add it to the ACP. */
3545 if (inst
->op
== TGSI_OPCODE_MOV
&&
3546 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3547 !inst
->dst
.reladdr
&&
3549 !inst
->src
[0].reladdr
&&
3550 !inst
->src
[0].negate
) {
3551 for (int i
= 0; i
< 4; i
++) {
3552 if (inst
->dst
.writemask
& (1 << i
)) {
3553 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3554 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3560 ralloc_free(acp_level
);
3565 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3567 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3568 * will occur. As an example, a TXP production after copy propagation but
3571 * 0: MOV TEMP[1], INPUT[4].xyyy;
3572 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3573 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3575 * and after this pass:
3577 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3579 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3580 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3583 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3587 for (i
=0; i
< this->next_temp
; i
++) {
3588 int last_read
= get_last_temp_read(i
);
3591 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3592 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3594 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3607 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3608 * code elimination. This is less primitive than eliminate_dead_code(), as it
3609 * is per-channel and can detect consecutive writes without a read between them
3610 * as dead code. However, there is some dead code that can be eliminated by
3611 * eliminate_dead_code() but not this function - for example, this function
3612 * cannot eliminate an instruction writing to a register that is never read and
3613 * is the only instruction writing to that register.
3615 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3619 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3621 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3622 glsl_to_tgsi_instruction
*,
3623 this->next_temp
* 4);
3624 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3628 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3629 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3631 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3632 || inst
->dst
.index
< this->next_temp
);
3635 case TGSI_OPCODE_BGNLOOP
:
3636 case TGSI_OPCODE_ENDLOOP
:
3637 case TGSI_OPCODE_CONT
:
3638 case TGSI_OPCODE_BRK
:
3639 /* End of a basic block, clear the write array entirely.
3641 * This keeps us from killing dead code when the writes are
3642 * on either side of a loop, even when the register isn't touched
3643 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3644 * dead code of this type, so it shouldn't make a difference as long as
3645 * the dead code elimination pass in the GLSL compiler does its job.
3647 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3650 case TGSI_OPCODE_ENDIF
:
3651 case TGSI_OPCODE_ELSE
:
3652 /* Promote the recorded level of all channels written inside the
3653 * preceding if or else block to the level above the if/else block.
3655 for (int r
= 0; r
< this->next_temp
; r
++) {
3656 for (int c
= 0; c
< 4; c
++) {
3657 if (!writes
[4 * r
+ c
])
3660 if (write_level
[4 * r
+ c
] == level
)
3661 write_level
[4 * r
+ c
] = level
-1;
3665 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3670 case TGSI_OPCODE_IF
:
3671 case TGSI_OPCODE_UIF
:
3673 /* fallthrough to default case to mark the condition as read */
3676 /* Continuing the block, clear any channels from the write array that
3677 * are read by this instruction.
3679 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3680 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3681 /* Any temporary might be read, so no dead code elimination
3682 * across this instruction.
3684 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3685 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3686 /* Clear where it's used as src. */
3687 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3688 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3689 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3690 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3692 for (int c
= 0; c
< 4; c
++) {
3693 if (src_chans
& (1 << c
)) {
3694 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3702 /* If this instruction writes to a temporary, add it to the write array.
3703 * If there is already an instruction in the write array for one or more
3704 * of the channels, flag that channel write as dead.
3706 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3707 !inst
->dst
.reladdr
&&
3709 for (int c
= 0; c
< 4; c
++) {
3710 if (inst
->dst
.writemask
& (1 << c
)) {
3711 if (writes
[4 * inst
->dst
.index
+ c
]) {
3712 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3715 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3717 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3718 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3724 /* Anything still in the write array at this point is dead code. */
3725 for (int r
= 0; r
< this->next_temp
; r
++) {
3726 for (int c
= 0; c
< 4; c
++) {
3727 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3729 inst
->dead_mask
|= (1 << c
);
3733 /* Now actually remove the instructions that are completely dead and update
3734 * the writemask of other instructions with dead channels.
3736 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3737 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3739 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3741 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3746 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3749 ralloc_free(write_level
);
3750 ralloc_free(writes
);
3755 /* Merges temporary registers together where possible to reduce the number of
3756 * registers needed to run a program.
3758 * Produces optimal code only after copy propagation and dead code elimination
3761 glsl_to_tgsi_visitor::merge_registers(void)
3763 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3764 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3767 /* Read the indices of the last read and first write to each temp register
3768 * into an array so that we don't have to traverse the instruction list as
3770 for (i
=0; i
< this->next_temp
; i
++) {
3771 last_reads
[i
] = get_last_temp_read(i
);
3772 first_writes
[i
] = get_first_temp_write(i
);
3775 /* Start looking for registers with non-overlapping usages that can be
3776 * merged together. */
3777 for (i
=0; i
< this->next_temp
; i
++) {
3778 /* Don't touch unused registers. */
3779 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3781 for (j
=0; j
< this->next_temp
; j
++) {
3782 /* Don't touch unused registers. */
3783 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3785 /* We can merge the two registers if the first write to j is after or
3786 * in the same instruction as the last read from i. Note that the
3787 * register at index i will always be used earlier or at the same time
3788 * as the register at index j. */
3789 if (first_writes
[i
] <= first_writes
[j
] &&
3790 last_reads
[i
] <= first_writes
[j
])
3792 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3794 /* Update the first_writes and last_reads arrays with the new
3795 * values for the merged register index, and mark the newly unused
3796 * register index as such. */
3797 last_reads
[i
] = last_reads
[j
];
3798 first_writes
[j
] = -1;
3804 ralloc_free(last_reads
);
3805 ralloc_free(first_writes
);
3808 /* Reassign indices to temporary registers by reusing unused indices created
3809 * by optimization passes. */
3811 glsl_to_tgsi_visitor::renumber_registers(void)
3816 for (i
=0; i
< this->next_temp
; i
++) {
3817 if (get_first_temp_read(i
) < 0) continue;
3819 rename_temp_register(i
, new_index
);
3823 this->next_temp
= new_index
;
3827 * Returns a fragment program which implements the current pixel transfer ops.
3828 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3831 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3832 glsl_to_tgsi_visitor
*original
,
3833 int scale_and_bias
, int pixel_maps
)
3835 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3836 struct st_context
*st
= st_context(original
->ctx
);
3837 struct gl_program
*prog
= &fp
->Base
.Base
;
3838 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3839 st_src_reg coord
, src0
;
3841 glsl_to_tgsi_instruction
*inst
;
3843 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3844 v
->ctx
= original
->ctx
;
3846 v
->shader_program
= NULL
;
3847 v
->glsl_version
= original
->glsl_version
;
3848 v
->native_integers
= original
->native_integers
;
3849 v
->options
= original
->options
;
3850 v
->next_temp
= original
->next_temp
;
3851 v
->num_address_regs
= original
->num_address_regs
;
3852 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3853 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3854 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3855 v
->num_immediates
= original
->num_immediates
;
3858 * Get initial pixel color from the texture.
3859 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3861 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3862 src0
= v
->get_temp(glsl_type::vec4_type
);
3863 dst0
= st_dst_reg(src0
);
3864 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3866 inst
->tex_target
= TEXTURE_2D_INDEX
;
3868 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3869 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3870 v
->samplers_used
|= (1 << 0);
3872 if (scale_and_bias
) {
3873 static const gl_state_index scale_state
[STATE_LENGTH
] =
3874 { STATE_INTERNAL
, STATE_PT_SCALE
,
3875 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3876 static const gl_state_index bias_state
[STATE_LENGTH
] =
3877 { STATE_INTERNAL
, STATE_PT_BIAS
,
3878 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3879 GLint scale_p
, bias_p
;
3880 st_src_reg scale
, bias
;
3882 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3883 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3885 /* MAD colorTemp, colorTemp, scale, bias; */
3886 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3887 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3888 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3892 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3893 st_dst_reg temp_dst
= st_dst_reg(temp
);
3895 assert(st
->pixel_xfer
.pixelmap_texture
);
3897 /* With a little effort, we can do four pixel map look-ups with
3898 * two TEX instructions:
3901 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3902 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3903 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3905 inst
->tex_target
= TEXTURE_2D_INDEX
;
3907 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3908 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3909 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3910 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3912 inst
->tex_target
= TEXTURE_2D_INDEX
;
3914 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3915 v
->samplers_used
|= (1 << 1);
3917 /* MOV colorTemp, temp; */
3918 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3921 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3923 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3924 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3925 glsl_to_tgsi_instruction
*newinst
;
3926 st_src_reg src_regs
[3];
3928 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3929 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3931 for (int i
=0; i
<3; i
++) {
3932 src_regs
[i
] = inst
->src
[i
];
3933 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3934 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3936 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3937 src_regs
[i
].index
= src0
.index
;
3939 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3940 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3943 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3944 newinst
->tex_target
= inst
->tex_target
;
3947 /* Make modifications to fragment program info. */
3948 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3949 original
->prog
->Parameters
);
3950 _mesa_free_parameter_list(params
);
3951 count_resources(v
, prog
);
3952 fp
->glsl_to_tgsi
= v
;
3956 * Make fragment program for glBitmap:
3957 * Sample the texture and kill the fragment if the bit is 0.
3958 * This program will be combined with the user's fragment program.
3960 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3963 get_bitmap_visitor(struct st_fragment_program
*fp
,
3964 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3966 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3967 struct st_context
*st
= st_context(original
->ctx
);
3968 struct gl_program
*prog
= &fp
->Base
.Base
;
3969 st_src_reg coord
, src0
;
3971 glsl_to_tgsi_instruction
*inst
;
3973 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3974 v
->ctx
= original
->ctx
;
3976 v
->shader_program
= NULL
;
3977 v
->glsl_version
= original
->glsl_version
;
3978 v
->native_integers
= original
->native_integers
;
3979 v
->options
= original
->options
;
3980 v
->next_temp
= original
->next_temp
;
3981 v
->num_address_regs
= original
->num_address_regs
;
3982 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3983 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3984 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3985 v
->num_immediates
= original
->num_immediates
;
3987 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3988 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3989 src0
= v
->get_temp(glsl_type::vec4_type
);
3990 dst0
= st_dst_reg(src0
);
3991 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3992 inst
->sampler
= samplerIndex
;
3993 inst
->tex_target
= TEXTURE_2D_INDEX
;
3995 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3996 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
3997 v
->samplers_used
|= (1 << samplerIndex
);
3999 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4000 src0
.negate
= NEGATE_XYZW
;
4001 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4002 src0
.swizzle
= SWIZZLE_XXXX
;
4003 inst
= v
->emit(NULL
, TGSI_OPCODE_KIL
, undef_dst
, src0
);
4005 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4007 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4008 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4009 glsl_to_tgsi_instruction
*newinst
;
4010 st_src_reg src_regs
[3];
4012 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4013 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4015 for (int i
=0; i
<3; i
++) {
4016 src_regs
[i
] = inst
->src
[i
];
4017 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4018 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4021 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4022 newinst
->tex_target
= inst
->tex_target
;
4025 /* Make modifications to fragment program info. */
4026 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4027 count_resources(v
, prog
);
4028 fp
->glsl_to_tgsi
= v
;
4031 /* ------------------------- TGSI conversion stuff -------------------------- */
4033 unsigned branch_target
;
4038 * Intermediate state used during shader translation.
4040 struct st_translate
{
4041 struct ureg_program
*ureg
;
4043 struct ureg_dst temps
[MAX_TEMPS
];
4044 struct ureg_dst arrays
[MAX_ARRAYS
];
4045 struct ureg_src
*constants
;
4046 struct ureg_src
*immediates
;
4047 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4048 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4049 struct ureg_dst address
[1];
4050 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4051 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4053 unsigned array_sizes
[MAX_ARRAYS
];
4055 const GLuint
*inputMapping
;
4056 const GLuint
*outputMapping
;
4058 /* For every instruction that contains a label (eg CALL), keep
4059 * details so that we can go back afterwards and emit the correct
4060 * tgsi instruction number for each label.
4062 struct label
*labels
;
4063 unsigned labels_size
;
4064 unsigned labels_count
;
4066 /* Keep a record of the tgsi instruction number that each mesa
4067 * instruction starts at, will be used to fix up labels after
4072 unsigned insn_count
;
4074 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4079 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4080 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4082 TGSI_SEMANTIC_VERTEXID
,
4083 TGSI_SEMANTIC_INSTANCEID
4087 * Make note of a branch to a label in the TGSI code.
4088 * After we've emitted all instructions, we'll go over the list
4089 * of labels built here and patch the TGSI code with the actual
4090 * location of each label.
4092 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4096 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4097 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4098 t
->labels
= (struct label
*)realloc(t
->labels
,
4099 t
->labels_size
* sizeof(struct label
));
4100 if (t
->labels
== NULL
) {
4101 static unsigned dummy
;
4107 i
= t
->labels_count
++;
4108 t
->labels
[i
].branch_target
= branch_target
;
4109 return &t
->labels
[i
].token
;
4113 * Called prior to emitting the TGSI code for each instruction.
4114 * Allocate additional space for instructions if needed.
4115 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4116 * the next TGSI instruction.
4118 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4120 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4121 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4122 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4123 if (t
->insn
== NULL
) {
4129 t
->insn
[t
->insn_count
++] = start
;
4133 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4135 static struct ureg_src
4136 emit_immediate(struct st_translate
*t
,
4137 gl_constant_value values
[4],
4140 struct ureg_program
*ureg
= t
->ureg
;
4145 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4147 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4148 case GL_UNSIGNED_INT
:
4150 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4152 assert(!"should not get here - type must be float, int, uint, or bool");
4153 return ureg_src_undef();
4158 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4160 static struct ureg_dst
4161 dst_register(struct st_translate
*t
,
4162 gl_register_file file
,
4168 case PROGRAM_UNDEFINED
:
4169 return ureg_dst_undef();
4171 case PROGRAM_TEMPORARY
:
4173 assert(index
< (int) Elements(t
->temps
));
4175 if (ureg_dst_is_undef(t
->temps
[index
]))
4176 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4178 return t
->temps
[index
];
4181 array
= index
>> 16;
4184 assert(array
< (int) Elements(t
->arrays
));
4186 if (ureg_dst_is_undef(t
->arrays
[array
]))
4187 t
->arrays
[array
] = ureg_DECL_array_temporary(
4188 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4190 return ureg_dst_array_offset(t
->arrays
[array
],
4191 (int)(index
& 0xFFFF) - 0x8000);
4193 case PROGRAM_OUTPUT
:
4194 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4195 assert(index
< VARYING_SLOT_MAX
);
4196 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4197 assert(index
< FRAG_RESULT_MAX
);
4199 assert(index
< VARYING_SLOT_MAX
);
4201 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4203 return t
->outputs
[t
->outputMapping
[index
]];
4205 case PROGRAM_ADDRESS
:
4206 return t
->address
[index
];
4209 assert(!"unknown dst register file");
4210 return ureg_dst_undef();
4215 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4217 static struct ureg_src
4218 src_register(struct st_translate
*t
,
4219 gl_register_file file
,
4220 GLint index
, GLint index2D
)
4223 case PROGRAM_UNDEFINED
:
4224 return ureg_src_undef();
4226 case PROGRAM_TEMPORARY
:
4228 return ureg_src(dst_register(t
, file
, index
));
4230 case PROGRAM_ENV_PARAM
:
4231 case PROGRAM_LOCAL_PARAM
:
4232 case PROGRAM_UNIFORM
:
4234 return t
->constants
[index
];
4235 case PROGRAM_STATE_VAR
:
4236 case PROGRAM_CONSTANT
: /* ie, immediate */
4238 struct ureg_src src
;
4239 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4241 src
.DimensionIndex
= index2D
;
4243 } else if (index
< 0)
4244 return ureg_DECL_constant(t
->ureg
, 0);
4246 return t
->constants
[index
];
4248 case PROGRAM_IMMEDIATE
:
4249 return t
->immediates
[index
];
4252 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4253 return t
->inputs
[t
->inputMapping
[index
]];
4255 case PROGRAM_OUTPUT
:
4256 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4257 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4259 case PROGRAM_ADDRESS
:
4260 return ureg_src(t
->address
[index
]);
4262 case PROGRAM_SYSTEM_VALUE
:
4263 assert(index
< (int) Elements(t
->systemValues
));
4264 return t
->systemValues
[index
];
4267 assert(!"unknown src register file");
4268 return ureg_src_undef();
4273 * Create a TGSI ureg_dst register from an st_dst_reg.
4275 static struct ureg_dst
4276 translate_dst(struct st_translate
*t
,
4277 const st_dst_reg
*dst_reg
,
4278 bool saturate
, bool clamp_color
)
4280 struct ureg_dst dst
= dst_register(t
,
4284 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4287 dst
= ureg_saturate(dst
);
4288 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4289 /* Clamp colors for ARB_color_buffer_float. */
4290 switch (t
->procType
) {
4291 case TGSI_PROCESSOR_VERTEX
:
4292 /* XXX if the geometry shader is present, this must be done there
4293 * instead of here. */
4294 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4295 dst_reg
->index
== VARYING_SLOT_COL1
||
4296 dst_reg
->index
== VARYING_SLOT_BFC0
||
4297 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4298 dst
= ureg_saturate(dst
);
4302 case TGSI_PROCESSOR_FRAGMENT
:
4303 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4304 dst
= ureg_saturate(dst
);
4310 if (dst_reg
->reladdr
!= NULL
) {
4311 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4312 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4319 * Create a TGSI ureg_src register from an st_src_reg.
4321 static struct ureg_src
4322 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4324 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4326 src
= ureg_swizzle(src
,
4327 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4328 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4329 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4330 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4332 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4333 src
= ureg_negate(src
);
4335 if (src_reg
->reladdr
!= NULL
) {
4336 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4337 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4343 static struct tgsi_texture_offset
4344 translate_tex_offset(struct st_translate
*t
,
4345 const struct tgsi_texture_offset
*in_offset
)
4347 struct tgsi_texture_offset offset
;
4348 struct ureg_src imm_src
;
4350 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4351 imm_src
= t
->immediates
[in_offset
->Index
];
4353 offset
.File
= imm_src
.File
;
4354 offset
.Index
= imm_src
.Index
;
4355 offset
.SwizzleX
= imm_src
.SwizzleX
;
4356 offset
.SwizzleY
= imm_src
.SwizzleY
;
4357 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4358 offset
.File
= TGSI_FILE_IMMEDIATE
;
4365 compile_tgsi_instruction(struct st_translate
*t
,
4366 const glsl_to_tgsi_instruction
*inst
,
4367 bool clamp_dst_color_output
)
4369 struct ureg_program
*ureg
= t
->ureg
;
4371 struct ureg_dst dst
[1];
4372 struct ureg_src src
[4];
4373 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4377 unsigned tex_target
;
4379 num_dst
= num_inst_dst_regs(inst
->op
);
4380 num_src
= num_inst_src_regs(inst
->op
);
4383 dst
[0] = translate_dst(t
,
4386 clamp_dst_color_output
);
4388 for (i
= 0; i
< num_src
; i
++)
4389 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4392 case TGSI_OPCODE_BGNLOOP
:
4393 case TGSI_OPCODE_CAL
:
4394 case TGSI_OPCODE_ELSE
:
4395 case TGSI_OPCODE_ENDLOOP
:
4396 case TGSI_OPCODE_IF
:
4397 case TGSI_OPCODE_UIF
:
4398 assert(num_dst
== 0);
4399 ureg_label_insn(ureg
,
4403 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4406 case TGSI_OPCODE_TEX
:
4407 case TGSI_OPCODE_TXB
:
4408 case TGSI_OPCODE_TXD
:
4409 case TGSI_OPCODE_TXL
:
4410 case TGSI_OPCODE_TXP
:
4411 case TGSI_OPCODE_TXQ
:
4412 case TGSI_OPCODE_TXF
:
4413 case TGSI_OPCODE_TEX2
:
4414 case TGSI_OPCODE_TXB2
:
4415 case TGSI_OPCODE_TXL2
:
4416 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4417 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4418 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4420 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4426 texoffsets
, inst
->tex_offset_num_offset
,
4430 case TGSI_OPCODE_SCS
:
4431 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4432 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4445 * Emit the TGSI instructions for inverting and adjusting WPOS.
4446 * This code is unavoidable because it also depends on whether
4447 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4450 emit_wpos_adjustment( struct st_translate
*t
,
4451 const struct gl_program
*program
,
4453 GLfloat adjX
, GLfloat adjY
[2])
4455 struct ureg_program
*ureg
= t
->ureg
;
4457 /* Fragment program uses fragment position input.
4458 * Need to replace instances of INPUT[WPOS] with temp T
4459 * where T = INPUT[WPOS] by y is inverted.
4461 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4462 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4463 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4465 /* XXX: note we are modifying the incoming shader here! Need to
4466 * do this before emitting the constant decls below, or this
4469 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4470 wposTransformState
);
4472 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4473 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4474 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4476 /* First, apply the coordinate shift: */
4477 if (adjX
|| adjY
[0] || adjY
[1]) {
4478 if (adjY
[0] != adjY
[1]) {
4479 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4480 * depending on whether inversion is actually going to be applied
4481 * or not, which is determined by testing against the inversion
4482 * state variable used below, which will be either +1 or -1.
4484 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4486 ureg_CMP(ureg
, adj_temp
,
4487 ureg_scalar(wpostrans
, invert
? 2 : 0),
4488 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4489 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4490 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4492 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4493 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4495 wpos_input
= ureg_src(wpos_temp
);
4497 /* MOV wpos_temp, input[wpos]
4499 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4502 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4503 * inversion/identity, or the other way around if we're drawing to an FBO.
4506 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4509 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4511 ureg_scalar(wpostrans
, 0),
4512 ureg_scalar(wpostrans
, 1));
4514 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4517 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4519 ureg_scalar(wpostrans
, 2),
4520 ureg_scalar(wpostrans
, 3));
4523 /* Use wpos_temp as position input from here on:
4525 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4530 * Emit fragment position/ooordinate code.
4533 emit_wpos(struct st_context
*st
,
4534 struct st_translate
*t
,
4535 const struct gl_program
*program
,
4536 struct ureg_program
*ureg
)
4538 const struct gl_fragment_program
*fp
=
4539 (const struct gl_fragment_program
*) program
;
4540 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4541 GLfloat adjX
= 0.0f
;
4542 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4543 boolean invert
= FALSE
;
4545 /* Query the pixel center conventions supported by the pipe driver and set
4546 * adjX, adjY to help out if it cannot handle the requested one internally.
4548 * The bias of the y-coordinate depends on whether y-inversion takes place
4549 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4550 * drawing to an FBO (causes additional inversion), and whether the the pipe
4551 * driver origin and the requested origin differ (the latter condition is
4552 * stored in the 'invert' variable).
4554 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4556 * center shift only:
4561 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4562 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4563 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4564 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4566 * inversion and center shift:
4567 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4568 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4569 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4570 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4572 if (fp
->OriginUpperLeft
) {
4573 /* Fragment shader wants origin in upper-left */
4574 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4575 /* the driver supports upper-left origin */
4577 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4578 /* the driver supports lower-left origin, need to invert Y */
4579 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4586 /* Fragment shader wants origin in lower-left */
4587 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4588 /* the driver supports lower-left origin */
4589 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4590 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4591 /* the driver supports upper-left origin, need to invert Y */
4597 if (fp
->PixelCenterInteger
) {
4598 /* Fragment shader wants pixel center integer */
4599 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4600 /* the driver supports pixel center integer */
4602 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4604 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4605 /* the driver supports pixel center half integer, need to bias X,Y */
4614 /* Fragment shader wants pixel center half integer */
4615 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4616 /* the driver supports pixel center half integer */
4618 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4619 /* the driver supports pixel center integer, need to bias X,Y */
4620 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4621 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4627 /* we invert after adjustment so that we avoid the MOV to temporary,
4628 * and reuse the adjustment ADD instead */
4629 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4633 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4634 * TGSI uses +1 for front, -1 for back.
4635 * This function converts the TGSI value to the GL value. Simply clamping/
4636 * saturating the value to [0,1] does the job.
4639 emit_face_var(struct st_translate
*t
)
4641 struct ureg_program
*ureg
= t
->ureg
;
4642 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4643 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4645 /* MOV_SAT face_temp, input[face] */
4646 face_temp
= ureg_saturate(face_temp
);
4647 ureg_MOV(ureg
, face_temp
, face_input
);
4649 /* Use face_temp as face input from here on: */
4650 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4654 emit_edgeflags(struct st_translate
*t
)
4656 struct ureg_program
*ureg
= t
->ureg
;
4657 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4658 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4660 ureg_MOV(ureg
, edge_dst
, edge_src
);
4664 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4665 * \param program the program to translate
4666 * \param numInputs number of input registers used
4667 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4669 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4670 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4672 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4673 * \param numOutputs number of output registers used
4674 * \param outputMapping maps Mesa fragment program outputs to TGSI
4676 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4677 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4680 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4682 extern "C" enum pipe_error
4683 st_translate_program(
4684 struct gl_context
*ctx
,
4686 struct ureg_program
*ureg
,
4687 glsl_to_tgsi_visitor
*program
,
4688 const struct gl_program
*proginfo
,
4690 const GLuint inputMapping
[],
4691 const ubyte inputSemanticName
[],
4692 const ubyte inputSemanticIndex
[],
4693 const GLuint interpMode
[],
4694 const GLboolean is_centroid
[],
4696 const GLuint outputMapping
[],
4697 const ubyte outputSemanticName
[],
4698 const ubyte outputSemanticIndex
[],
4699 boolean passthrough_edgeflags
,
4700 boolean clamp_color
)
4702 struct st_translate
*t
;
4704 enum pipe_error ret
= PIPE_OK
;
4706 assert(numInputs
<= Elements(t
->inputs
));
4707 assert(numOutputs
<= Elements(t
->outputs
));
4709 t
= CALLOC_STRUCT(st_translate
);
4711 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4715 memset(t
, 0, sizeof *t
);
4717 t
->procType
= procType
;
4718 t
->inputMapping
= inputMapping
;
4719 t
->outputMapping
= outputMapping
;
4722 if (program
->shader_program
) {
4723 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4724 struct gl_uniform_storage
*const storage
=
4725 &program
->shader_program
->UniformStorage
[i
];
4727 _mesa_uniform_detach_all_driver_storage(storage
);
4732 * Declare input attributes.
4734 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4735 for (i
= 0; i
< numInputs
; i
++) {
4736 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4737 inputSemanticName
[i
],
4738 inputSemanticIndex
[i
],
4743 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4744 /* Must do this after setting up t->inputs, and before
4745 * emitting constant references, below:
4747 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4750 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4754 * Declare output attributes.
4756 for (i
= 0; i
< numOutputs
; i
++) {
4757 switch (outputSemanticName
[i
]) {
4758 case TGSI_SEMANTIC_POSITION
:
4759 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4760 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4761 outputSemanticIndex
[i
]);
4762 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4764 case TGSI_SEMANTIC_STENCIL
:
4765 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4766 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4767 outputSemanticIndex
[i
]);
4768 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4770 case TGSI_SEMANTIC_COLOR
:
4771 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4772 TGSI_SEMANTIC_COLOR
,
4773 outputSemanticIndex
[i
]);
4776 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4777 ret
= PIPE_ERROR_BAD_INPUT
;
4782 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4783 for (i
= 0; i
< numInputs
; i
++) {
4784 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4786 inputSemanticName
[i
],
4787 inputSemanticIndex
[i
]);
4790 for (i
= 0; i
< numOutputs
; i
++) {
4791 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4792 outputSemanticName
[i
],
4793 outputSemanticIndex
[i
]);
4797 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4799 for (i
= 0; i
< numInputs
; i
++) {
4800 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4803 for (i
= 0; i
< numOutputs
; i
++) {
4804 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4805 outputSemanticName
[i
],
4806 outputSemanticIndex
[i
]);
4808 if (passthrough_edgeflags
)
4812 /* Declare address register.
4814 if (program
->num_address_regs
> 0) {
4815 assert(program
->num_address_regs
== 1);
4816 t
->address
[0] = ureg_DECL_address(ureg
);
4819 /* Declare misc input registers
4822 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4823 unsigned numSys
= 0;
4824 for (i
= 0; sysInputs
; i
++) {
4825 if (sysInputs
& (1 << i
)) {
4826 unsigned semName
= mesa_sysval_to_semantic
[i
];
4827 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4828 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4829 semName
== TGSI_SEMANTIC_VERTEXID
) {
4830 /* From Gallium perspective, these system values are always
4831 * integer, and require native integer support. However, if
4832 * native integer is supported on the vertex stage but not the
4833 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4834 * assumes these system values are floats. To resolve the
4835 * inconsistency, we insert a U2F.
4837 struct st_context
*st
= st_context(ctx
);
4838 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4839 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4840 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4841 if (!ctx
->Const
.NativeIntegers
) {
4842 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4843 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4844 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4848 sysInputs
&= ~(1 << i
);
4853 /* Copy over array sizes
4855 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4857 /* Emit constants and uniforms. TGSI uses a single index space for these,
4858 * so we put all the translated regs in t->constants.
4860 if (proginfo
->Parameters
) {
4861 t
->constants
= (struct ureg_src
*)
4862 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4863 if (t
->constants
== NULL
) {
4864 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4868 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4869 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4870 case PROGRAM_ENV_PARAM
:
4871 case PROGRAM_LOCAL_PARAM
:
4872 case PROGRAM_STATE_VAR
:
4873 case PROGRAM_UNIFORM
:
4874 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4877 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4878 * addressing of the const buffer.
4879 * FIXME: Be smarter and recognize param arrays:
4880 * indirect addressing is only valid within the referenced
4883 case PROGRAM_CONSTANT
:
4884 if (program
->indirect_addr_consts
)
4885 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4887 t
->constants
[i
] = emit_immediate(t
,
4888 proginfo
->Parameters
->ParameterValues
[i
],
4889 proginfo
->Parameters
->Parameters
[i
].DataType
,
4898 if (program
->shader_program
) {
4899 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4901 for (i
= 0; i
< num_ubos
; i
++) {
4902 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4906 /* Emit immediate values.
4908 t
->immediates
= (struct ureg_src
*)
4909 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4910 if (t
->immediates
== NULL
) {
4911 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4915 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4916 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4917 assert(i
< program
->num_immediates
);
4918 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4920 assert(i
== program
->num_immediates
);
4922 /* texture samplers */
4923 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
4924 if (program
->samplers_used
& (1 << i
)) {
4925 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4929 /* Emit each instruction in turn:
4931 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4932 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4933 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4937 /* Fix up all emitted labels:
4939 for (i
= 0; i
< t
->labels_count
; i
++) {
4940 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4941 t
->insn
[t
->labels
[i
].branch_target
]);
4944 if (program
->shader_program
) {
4945 /* This has to be done last. Any operation the can cause
4946 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4947 * program constant) has to happen before creating this linkage.
4949 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4950 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4953 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4954 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4963 free(t
->immediates
);
4966 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
4974 /* ----------------------------- End TGSI code ------------------------------ */
4977 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4978 * generating Mesa IR.
4980 static struct gl_program
*
4981 get_mesa_program(struct gl_context
*ctx
,
4982 struct gl_shader_program
*shader_program
,
4983 struct gl_shader
*shader
)
4985 glsl_to_tgsi_visitor
* v
;
4986 struct gl_program
*prog
;
4988 const char *target_string
;
4990 struct gl_shader_compiler_options
*options
=
4991 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
4992 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
4995 switch (shader
->Type
) {
4996 case GL_VERTEX_SHADER
:
4997 target
= GL_VERTEX_PROGRAM_ARB
;
4998 ptarget
= PIPE_SHADER_VERTEX
;
4999 target_string
= "vertex";
5001 case GL_FRAGMENT_SHADER
:
5002 target
= GL_FRAGMENT_PROGRAM_ARB
;
5003 ptarget
= PIPE_SHADER_FRAGMENT
;
5004 target_string
= "fragment";
5006 case GL_GEOMETRY_SHADER
:
5007 target
= GL_GEOMETRY_PROGRAM_NV
;
5008 ptarget
= PIPE_SHADER_GEOMETRY
;
5009 target_string
= "geometry";
5012 assert(!"should not be reached");
5016 validate_ir_tree(shader
->ir
);
5018 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5021 prog
->Parameters
= _mesa_new_parameter_list();
5022 v
= new glsl_to_tgsi_visitor();
5025 v
->shader_program
= shader_program
;
5026 v
->options
= options
;
5027 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5028 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5030 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5031 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5033 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5036 /* Remove reads from output registers. */
5037 lower_output_reads(shader
->ir
);
5039 /* Emit intermediate IR for main(). */
5040 visit_exec_list(shader
->ir
, v
);
5042 /* Now emit bodies for any functions that were used. */
5044 progress
= GL_FALSE
;
5046 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5047 function_entry
*entry
= (function_entry
*)iter
.get();
5049 if (!entry
->bgn_inst
) {
5050 v
->current_function
= entry
;
5052 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5053 entry
->bgn_inst
->function
= entry
;
5055 visit_exec_list(&entry
->sig
->body
, v
);
5057 glsl_to_tgsi_instruction
*last
;
5058 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5059 if (last
->op
!= TGSI_OPCODE_RET
)
5060 v
->emit(NULL
, TGSI_OPCODE_RET
);
5062 glsl_to_tgsi_instruction
*end
;
5063 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5064 end
->function
= entry
;
5072 /* Print out some information (for debugging purposes) used by the
5073 * optimization passes. */
5074 for (i
=0; i
< v
->next_temp
; i
++) {
5075 int fr
= v
->get_first_temp_read(i
);
5076 int fw
= v
->get_first_temp_write(i
);
5077 int lr
= v
->get_last_temp_read(i
);
5078 int lw
= v
->get_last_temp_write(i
);
5080 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5085 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5087 v
->copy_propagate();
5088 while (v
->eliminate_dead_code_advanced());
5090 v
->eliminate_dead_code();
5091 v
->merge_registers();
5092 v
->renumber_registers();
5094 /* Write the END instruction. */
5095 v
->emit(NULL
, TGSI_OPCODE_END
);
5097 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5099 printf("GLSL IR for linked %s program %d:\n", target_string
,
5100 shader_program
->Name
);
5101 _mesa_print_ir(shader
->ir
, NULL
);
5107 prog
->Instructions
= NULL
;
5108 prog
->NumInstructions
= 0;
5110 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
5111 count_resources(v
, prog
);
5113 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5115 /* This has to be done last. Any operation the can cause
5116 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5117 * program constant) has to happen before creating this linkage.
5119 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5120 if (!shader_program
->LinkStatus
) {
5124 struct st_vertex_program
*stvp
;
5125 struct st_fragment_program
*stfp
;
5126 struct st_geometry_program
*stgp
;
5128 switch (shader
->Type
) {
5129 case GL_VERTEX_SHADER
:
5130 stvp
= (struct st_vertex_program
*)prog
;
5131 stvp
->glsl_to_tgsi
= v
;
5133 case GL_FRAGMENT_SHADER
:
5134 stfp
= (struct st_fragment_program
*)prog
;
5135 stfp
->glsl_to_tgsi
= v
;
5137 case GL_GEOMETRY_SHADER
:
5138 stgp
= (struct st_geometry_program
*)prog
;
5139 stgp
->glsl_to_tgsi
= v
;
5142 assert(!"should not be reached");
5152 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5154 struct gl_shader
*shader
;
5155 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5156 type
== GL_GEOMETRY_SHADER_ARB
);
5157 shader
= rzalloc(NULL
, struct gl_shader
);
5159 shader
->Type
= type
;
5160 shader
->Name
= name
;
5161 _mesa_init_shader(ctx
, shader
);
5166 struct gl_shader_program
*
5167 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5169 struct gl_shader_program
*shProg
;
5170 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5172 shProg
->Name
= name
;
5173 _mesa_init_shader_program(ctx
, shProg
);
5180 * Called via ctx->Driver.LinkShader()
5181 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5182 * with code lowering and other optimizations.
5185 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5187 assert(prog
->LinkStatus
);
5189 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5190 if (prog
->_LinkedShaders
[i
] == NULL
)
5194 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5195 const struct gl_shader_compiler_options
*options
=
5196 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5198 /* If there are forms of indirect addressing that the driver
5199 * cannot handle, perform the lowering pass.
5201 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5202 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5203 lower_variable_index_to_cond_assign(ir
,
5204 options
->EmitNoIndirectInput
,
5205 options
->EmitNoIndirectOutput
,
5206 options
->EmitNoIndirectTemp
,
5207 options
->EmitNoIndirectUniform
);
5210 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5211 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5212 LOWER_UNPACK_SNORM_2x16
|
5213 LOWER_PACK_UNORM_2x16
|
5214 LOWER_UNPACK_UNORM_2x16
|
5215 LOWER_PACK_SNORM_4x8
|
5216 LOWER_UNPACK_SNORM_4x8
|
5217 LOWER_UNPACK_UNORM_4x8
|
5218 LOWER_PACK_UNORM_4x8
|
5219 LOWER_PACK_HALF_2x16
|
5220 LOWER_UNPACK_HALF_2x16
;
5222 lower_packing_builtins(ir
, lower_inst
);
5225 do_mat_op_to_vec(ir
);
5226 lower_instructions(ir
,
5231 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5232 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5234 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5235 do_vec_index_to_cond_assign(ir
);
5236 lower_quadop_vector(ir
, false);
5238 if (options
->MaxIfDepth
== 0) {
5245 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5247 progress
= do_common_optimization(ir
, true, true,
5248 options
->MaxUnrollIterations
)
5251 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5255 validate_ir_tree(ir
);
5258 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5259 struct gl_program
*linked_prog
;
5261 if (prog
->_LinkedShaders
[i
] == NULL
)
5264 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5267 static const GLenum targets
[] = {
5268 GL_VERTEX_PROGRAM_ARB
,
5269 GL_FRAGMENT_PROGRAM_ARB
,
5270 GL_GEOMETRY_PROGRAM_NV
5273 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5275 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
5276 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5278 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5283 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5290 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5291 const GLuint outputMapping
[],
5292 struct pipe_stream_output_info
*so
)
5295 struct gl_transform_feedback_info
*info
=
5296 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5298 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5299 so
->output
[i
].register_index
=
5300 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5301 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5302 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5303 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5304 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5307 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5308 so
->stride
[i
] = info
->BufferStride
[i
];
5310 so
->num_outputs
= info
->NumOutputs
;