mesa: move more format helper functions to glformats.c
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_NAMED_PARAM) | \
78 (1 << PROGRAM_CONSTANT) | \
79 (1 << PROGRAM_UNIFORM))
80
81 /**
82 * Maximum number of temporary registers.
83 *
84 * It is too big for stack allocated arrays -- it will cause stack overflow on
85 * Windows and likely Mac OS X.
86 */
87 #define MAX_TEMPS 4096
88
89 /* will be 4 for GLSL 4.00 */
90 #define MAX_GLSL_TEXTURE_OFFSET 1
91
92 class st_src_reg;
93 class st_dst_reg;
94
95 static int swizzle_for_size(int size);
96
97 /**
98 * This struct is a corresponding struct to TGSI ureg_src.
99 */
100 class st_src_reg {
101 public:
102 st_src_reg(gl_register_file file, int index, const glsl_type *type)
103 {
104 this->file = file;
105 this->index = index;
106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
107 this->swizzle = swizzle_for_size(type->vector_elements);
108 else
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
112 this->reladdr = NULL;
113 }
114
115 st_src_reg(gl_register_file file, int index, int type)
116 {
117 this->type = type;
118 this->file = file;
119 this->index = index;
120 this->swizzle = SWIZZLE_XYZW;
121 this->negate = 0;
122 this->reladdr = NULL;
123 }
124
125 st_src_reg()
126 {
127 this->type = GLSL_TYPE_ERROR;
128 this->file = PROGRAM_UNDEFINED;
129 this->index = 0;
130 this->swizzle = 0;
131 this->negate = 0;
132 this->reladdr = NULL;
133 }
134
135 explicit st_src_reg(st_dst_reg reg);
136
137 gl_register_file file; /**< PROGRAM_* from Mesa */
138 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
139 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
140 int negate; /**< NEGATE_XYZW mask from mesa */
141 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
142 /** Register index should be offset by the integer in this reg. */
143 st_src_reg *reladdr;
144 };
145
146 class st_dst_reg {
147 public:
148 st_dst_reg(gl_register_file file, int writemask, int type)
149 {
150 this->file = file;
151 this->index = 0;
152 this->writemask = writemask;
153 this->cond_mask = COND_TR;
154 this->reladdr = NULL;
155 this->type = type;
156 }
157
158 st_dst_reg()
159 {
160 this->type = GLSL_TYPE_ERROR;
161 this->file = PROGRAM_UNDEFINED;
162 this->index = 0;
163 this->writemask = 0;
164 this->cond_mask = COND_TR;
165 this->reladdr = NULL;
166 }
167
168 explicit st_dst_reg(st_src_reg reg);
169
170 gl_register_file file; /**< PROGRAM_* from Mesa */
171 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
173 GLuint cond_mask:4;
174 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
175 /** Register index should be offset by the integer in this reg. */
176 st_src_reg *reladdr;
177 };
178
179 st_src_reg::st_src_reg(st_dst_reg reg)
180 {
181 this->type = reg.type;
182 this->file = reg.file;
183 this->index = reg.index;
184 this->swizzle = SWIZZLE_XYZW;
185 this->negate = 0;
186 this->reladdr = reg.reladdr;
187 }
188
189 st_dst_reg::st_dst_reg(st_src_reg reg)
190 {
191 this->type = reg.type;
192 this->file = reg.file;
193 this->index = reg.index;
194 this->writemask = WRITEMASK_XYZW;
195 this->cond_mask = COND_TR;
196 this->reladdr = reg.reladdr;
197 }
198
199 class glsl_to_tgsi_instruction : public exec_node {
200 public:
201 /* Callers of this ralloc-based new need not call delete. It's
202 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
203 static void* operator new(size_t size, void *ctx)
204 {
205 void *node;
206
207 node = rzalloc_size(ctx, size);
208 assert(node != NULL);
209
210 return node;
211 }
212
213 unsigned op;
214 st_dst_reg dst;
215 st_src_reg src[3];
216 /** Pointer to the ir source this tree came from for debugging */
217 ir_instruction *ir;
218 GLboolean cond_update;
219 bool saturate;
220 int sampler; /**< sampler index */
221 int tex_target; /**< One of TEXTURE_*_INDEX */
222 GLboolean tex_shadow;
223 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
224 unsigned tex_offset_num_offset;
225 int dead_mask; /**< Used in dead code elimination */
226
227 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
228 };
229
230 class variable_storage : public exec_node {
231 public:
232 variable_storage(ir_variable *var, gl_register_file file, int index)
233 : file(file), index(index), var(var)
234 {
235 /* empty */
236 }
237
238 gl_register_file file;
239 int index;
240 ir_variable *var; /* variable that maps to this, if any */
241 };
242
243 class immediate_storage : public exec_node {
244 public:
245 immediate_storage(gl_constant_value *values, int size, int type)
246 {
247 memcpy(this->values, values, size * sizeof(gl_constant_value));
248 this->size = size;
249 this->type = type;
250 }
251
252 gl_constant_value values[4];
253 int size; /**< Number of components (1-4) */
254 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
255 };
256
257 class function_entry : public exec_node {
258 public:
259 ir_function_signature *sig;
260
261 /**
262 * identifier of this function signature used by the program.
263 *
264 * At the point that TGSI instructions for function calls are
265 * generated, we don't know the address of the first instruction of
266 * the function body. So we make the BranchTarget that is called a
267 * small integer and rewrite them during set_branchtargets().
268 */
269 int sig_id;
270
271 /**
272 * Pointer to first instruction of the function body.
273 *
274 * Set during function body emits after main() is processed.
275 */
276 glsl_to_tgsi_instruction *bgn_inst;
277
278 /**
279 * Index of the first instruction of the function body in actual TGSI.
280 *
281 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
282 */
283 int inst;
284
285 /** Storage for the return value. */
286 st_src_reg return_reg;
287 };
288
289 class glsl_to_tgsi_visitor : public ir_visitor {
290 public:
291 glsl_to_tgsi_visitor();
292 ~glsl_to_tgsi_visitor();
293
294 function_entry *current_function;
295
296 struct gl_context *ctx;
297 struct gl_program *prog;
298 struct gl_shader_program *shader_program;
299 struct gl_shader_compiler_options *options;
300
301 int next_temp;
302
303 int num_address_regs;
304 int samplers_used;
305 bool indirect_addr_temps;
306 bool indirect_addr_consts;
307
308 int glsl_version;
309 bool native_integers;
310
311 variable_storage *find_variable_storage(ir_variable *var);
312
313 int add_constant(gl_register_file file, gl_constant_value values[4],
314 int size, int datatype, GLuint *swizzle_out);
315
316 function_entry *get_function_signature(ir_function_signature *sig);
317
318 st_src_reg get_temp(const glsl_type *type);
319 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
320
321 st_src_reg st_src_reg_for_float(float val);
322 st_src_reg st_src_reg_for_int(int val);
323 st_src_reg st_src_reg_for_type(int type, int val);
324
325 /**
326 * \name Visit methods
327 *
328 * As typical for the visitor pattern, there must be one \c visit method for
329 * each concrete subclass of \c ir_instruction. Virtual base classes within
330 * the hierarchy should not have \c visit methods.
331 */
332 /*@{*/
333 virtual void visit(ir_variable *);
334 virtual void visit(ir_loop *);
335 virtual void visit(ir_loop_jump *);
336 virtual void visit(ir_function_signature *);
337 virtual void visit(ir_function *);
338 virtual void visit(ir_expression *);
339 virtual void visit(ir_swizzle *);
340 virtual void visit(ir_dereference_variable *);
341 virtual void visit(ir_dereference_array *);
342 virtual void visit(ir_dereference_record *);
343 virtual void visit(ir_assignment *);
344 virtual void visit(ir_constant *);
345 virtual void visit(ir_call *);
346 virtual void visit(ir_return *);
347 virtual void visit(ir_discard *);
348 virtual void visit(ir_texture *);
349 virtual void visit(ir_if *);
350 /*@}*/
351
352 st_src_reg result;
353
354 /** List of variable_storage */
355 exec_list variables;
356
357 /** List of immediate_storage */
358 exec_list immediates;
359 unsigned num_immediates;
360
361 /** List of function_entry */
362 exec_list function_signatures;
363 int next_signature_id;
364
365 /** List of glsl_to_tgsi_instruction */
366 exec_list instructions;
367
368 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
369
370 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
371 st_dst_reg dst, st_src_reg src0);
372
373 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
374 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
375
376 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
377 st_dst_reg dst,
378 st_src_reg src0, st_src_reg src1, st_src_reg src2);
379
380 unsigned get_opcode(ir_instruction *ir, unsigned op,
381 st_dst_reg dst,
382 st_src_reg src0, st_src_reg src1);
383
384 /**
385 * Emit the correct dot-product instruction for the type of arguments
386 */
387 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
388 st_dst_reg dst,
389 st_src_reg src0,
390 st_src_reg src1,
391 unsigned elements);
392
393 void emit_scalar(ir_instruction *ir, unsigned op,
394 st_dst_reg dst, st_src_reg src0);
395
396 void emit_scalar(ir_instruction *ir, unsigned op,
397 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
398
399 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
400
401 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
402
403 void emit_scs(ir_instruction *ir, unsigned op,
404 st_dst_reg dst, const st_src_reg &src);
405
406 bool try_emit_mad(ir_expression *ir,
407 int mul_operand);
408 bool try_emit_mad_for_and_not(ir_expression *ir,
409 int mul_operand);
410 bool try_emit_sat(ir_expression *ir);
411
412 void emit_swz(ir_expression *ir);
413
414 bool process_move_condition(ir_rvalue *ir);
415
416 void simplify_cmp(void);
417
418 void rename_temp_register(int index, int new_index);
419 int get_first_temp_read(int index);
420 int get_first_temp_write(int index);
421 int get_last_temp_read(int index);
422 int get_last_temp_write(int index);
423
424 void copy_propagate(void);
425 void eliminate_dead_code(void);
426 int eliminate_dead_code_advanced(void);
427 void merge_registers(void);
428 void renumber_registers(void);
429
430 void *mem_ctx;
431 };
432
433 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
434
435 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
436
437 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
438
439 static void
440 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
441
442 static void
443 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
444 {
445 va_list args;
446 va_start(args, fmt);
447 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
448 va_end(args);
449
450 prog->LinkStatus = GL_FALSE;
451 }
452
453 static int
454 swizzle_for_size(int size)
455 {
456 int size_swizzles[4] = {
457 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
458 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
459 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
460 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
461 };
462
463 assert((size >= 1) && (size <= 4));
464 return size_swizzles[size - 1];
465 }
466
467 static bool
468 is_tex_instruction(unsigned opcode)
469 {
470 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
471 return info->is_tex;
472 }
473
474 static unsigned
475 num_inst_dst_regs(unsigned opcode)
476 {
477 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
478 return info->num_dst;
479 }
480
481 static unsigned
482 num_inst_src_regs(unsigned opcode)
483 {
484 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
485 return info->is_tex ? info->num_src - 1 : info->num_src;
486 }
487
488 glsl_to_tgsi_instruction *
489 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
490 st_dst_reg dst,
491 st_src_reg src0, st_src_reg src1, st_src_reg src2)
492 {
493 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
494 int num_reladdr = 0, i;
495
496 op = get_opcode(ir, op, dst, src0, src1);
497
498 /* If we have to do relative addressing, we want to load the ARL
499 * reg directly for one of the regs, and preload the other reladdr
500 * sources into temps.
501 */
502 num_reladdr += dst.reladdr != NULL;
503 num_reladdr += src0.reladdr != NULL;
504 num_reladdr += src1.reladdr != NULL;
505 num_reladdr += src2.reladdr != NULL;
506
507 reladdr_to_temp(ir, &src2, &num_reladdr);
508 reladdr_to_temp(ir, &src1, &num_reladdr);
509 reladdr_to_temp(ir, &src0, &num_reladdr);
510
511 if (dst.reladdr) {
512 emit_arl(ir, address_reg, *dst.reladdr);
513 num_reladdr--;
514 }
515 assert(num_reladdr == 0);
516
517 inst->op = op;
518 inst->dst = dst;
519 inst->src[0] = src0;
520 inst->src[1] = src1;
521 inst->src[2] = src2;
522 inst->ir = ir;
523 inst->dead_mask = 0;
524
525 inst->function = NULL;
526
527 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
528 this->num_address_regs = 1;
529
530 /* Update indirect addressing status used by TGSI */
531 if (dst.reladdr) {
532 switch(dst.file) {
533 case PROGRAM_TEMPORARY:
534 this->indirect_addr_temps = true;
535 break;
536 case PROGRAM_LOCAL_PARAM:
537 case PROGRAM_ENV_PARAM:
538 case PROGRAM_STATE_VAR:
539 case PROGRAM_NAMED_PARAM:
540 case PROGRAM_CONSTANT:
541 case PROGRAM_UNIFORM:
542 this->indirect_addr_consts = true;
543 break;
544 case PROGRAM_IMMEDIATE:
545 assert(!"immediates should not have indirect addressing");
546 break;
547 default:
548 break;
549 }
550 }
551 else {
552 for (i=0; i<3; i++) {
553 if(inst->src[i].reladdr) {
554 switch(inst->src[i].file) {
555 case PROGRAM_TEMPORARY:
556 this->indirect_addr_temps = true;
557 break;
558 case PROGRAM_LOCAL_PARAM:
559 case PROGRAM_ENV_PARAM:
560 case PROGRAM_STATE_VAR:
561 case PROGRAM_NAMED_PARAM:
562 case PROGRAM_CONSTANT:
563 case PROGRAM_UNIFORM:
564 this->indirect_addr_consts = true;
565 break;
566 case PROGRAM_IMMEDIATE:
567 assert(!"immediates should not have indirect addressing");
568 break;
569 default:
570 break;
571 }
572 }
573 }
574 }
575
576 this->instructions.push_tail(inst);
577
578 if (native_integers)
579 try_emit_float_set(ir, op, dst);
580
581 return inst;
582 }
583
584
585 glsl_to_tgsi_instruction *
586 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
587 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
588 {
589 return emit(ir, op, dst, src0, src1, undef_src);
590 }
591
592 glsl_to_tgsi_instruction *
593 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
594 st_dst_reg dst, st_src_reg src0)
595 {
596 assert(dst.writemask != 0);
597 return emit(ir, op, dst, src0, undef_src, undef_src);
598 }
599
600 glsl_to_tgsi_instruction *
601 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
602 {
603 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
604 }
605
606 /**
607 * Emits the code to convert the result of float SET instructions to integers.
608 */
609 void
610 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
611 st_dst_reg dst)
612 {
613 if ((op == TGSI_OPCODE_SEQ ||
614 op == TGSI_OPCODE_SNE ||
615 op == TGSI_OPCODE_SGE ||
616 op == TGSI_OPCODE_SLT))
617 {
618 st_src_reg src = st_src_reg(dst);
619 src.negate = ~src.negate;
620 dst.type = GLSL_TYPE_FLOAT;
621 emit(ir, TGSI_OPCODE_F2I, dst, src);
622 }
623 }
624
625 /**
626 * Determines whether to use an integer, unsigned integer, or float opcode
627 * based on the operands and input opcode, then emits the result.
628 */
629 unsigned
630 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
631 st_dst_reg dst,
632 st_src_reg src0, st_src_reg src1)
633 {
634 int type = GLSL_TYPE_FLOAT;
635
636 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
637 type = GLSL_TYPE_FLOAT;
638 else if (native_integers)
639 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
640
641 #define case4(c, f, i, u) \
642 case TGSI_OPCODE_##c: \
643 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
644 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
645 else op = TGSI_OPCODE_##f; \
646 break;
647 #define case3(f, i, u) case4(f, f, i, u)
648 #define case2fi(f, i) case4(f, f, i, i)
649 #define case2iu(i, u) case4(i, LAST, i, u)
650
651 switch(op) {
652 case2fi(ADD, UADD);
653 case2fi(MUL, UMUL);
654 case2fi(MAD, UMAD);
655 case3(DIV, IDIV, UDIV);
656 case3(MAX, IMAX, UMAX);
657 case3(MIN, IMIN, UMIN);
658 case2iu(MOD, UMOD);
659
660 case2fi(SEQ, USEQ);
661 case2fi(SNE, USNE);
662 case3(SGE, ISGE, USGE);
663 case3(SLT, ISLT, USLT);
664
665 case2iu(ISHR, USHR);
666
667 case2fi(SSG, ISSG);
668 case3(ABS, IABS, IABS);
669
670 default: break;
671 }
672
673 assert(op != TGSI_OPCODE_LAST);
674 return op;
675 }
676
677 glsl_to_tgsi_instruction *
678 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
679 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
680 unsigned elements)
681 {
682 static const unsigned dot_opcodes[] = {
683 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
684 };
685
686 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
687 }
688
689 /**
690 * Emits TGSI scalar opcodes to produce unique answers across channels.
691 *
692 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
693 * channel determines the result across all channels. So to do a vec4
694 * of this operation, we want to emit a scalar per source channel used
695 * to produce dest channels.
696 */
697 void
698 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
699 st_dst_reg dst,
700 st_src_reg orig_src0, st_src_reg orig_src1)
701 {
702 int i, j;
703 int done_mask = ~dst.writemask;
704
705 /* TGSI RCP is a scalar operation splatting results to all channels,
706 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
707 * dst channels.
708 */
709 for (i = 0; i < 4; i++) {
710 GLuint this_mask = (1 << i);
711 glsl_to_tgsi_instruction *inst;
712 st_src_reg src0 = orig_src0;
713 st_src_reg src1 = orig_src1;
714
715 if (done_mask & this_mask)
716 continue;
717
718 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
719 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
720 for (j = i + 1; j < 4; j++) {
721 /* If there is another enabled component in the destination that is
722 * derived from the same inputs, generate its value on this pass as
723 * well.
724 */
725 if (!(done_mask & (1 << j)) &&
726 GET_SWZ(src0.swizzle, j) == src0_swiz &&
727 GET_SWZ(src1.swizzle, j) == src1_swiz) {
728 this_mask |= (1 << j);
729 }
730 }
731 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
732 src0_swiz, src0_swiz);
733 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
734 src1_swiz, src1_swiz);
735
736 inst = emit(ir, op, dst, src0, src1);
737 inst->dst.writemask = this_mask;
738 done_mask |= this_mask;
739 }
740 }
741
742 void
743 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
744 st_dst_reg dst, st_src_reg src0)
745 {
746 st_src_reg undef = undef_src;
747
748 undef.swizzle = SWIZZLE_XXXX;
749
750 emit_scalar(ir, op, dst, src0, undef);
751 }
752
753 void
754 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
755 st_dst_reg dst, st_src_reg src0)
756 {
757 int op = TGSI_OPCODE_ARL;
758
759 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
760 op = TGSI_OPCODE_UARL;
761
762 emit(NULL, op, dst, src0);
763 }
764
765 /**
766 * Emit an TGSI_OPCODE_SCS instruction
767 *
768 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
769 * Instead of splatting its result across all four components of the
770 * destination, it writes one value to the \c x component and another value to
771 * the \c y component.
772 *
773 * \param ir IR instruction being processed
774 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
775 * on which value is desired.
776 * \param dst Destination register
777 * \param src Source register
778 */
779 void
780 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
781 st_dst_reg dst,
782 const st_src_reg &src)
783 {
784 /* Vertex programs cannot use the SCS opcode.
785 */
786 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
787 emit_scalar(ir, op, dst, src);
788 return;
789 }
790
791 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
792 const unsigned scs_mask = (1U << component);
793 int done_mask = ~dst.writemask;
794 st_src_reg tmp;
795
796 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
797
798 /* If there are compnents in the destination that differ from the component
799 * that will be written by the SCS instrution, we'll need a temporary.
800 */
801 if (scs_mask != unsigned(dst.writemask)) {
802 tmp = get_temp(glsl_type::vec4_type);
803 }
804
805 for (unsigned i = 0; i < 4; i++) {
806 unsigned this_mask = (1U << i);
807 st_src_reg src0 = src;
808
809 if ((done_mask & this_mask) != 0)
810 continue;
811
812 /* The source swizzle specified which component of the source generates
813 * sine / cosine for the current component in the destination. The SCS
814 * instruction requires that this value be swizzle to the X component.
815 * Replace the current swizzle with a swizzle that puts the source in
816 * the X component.
817 */
818 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
819
820 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
821 src0_swiz, src0_swiz);
822 for (unsigned j = i + 1; j < 4; j++) {
823 /* If there is another enabled component in the destination that is
824 * derived from the same inputs, generate its value on this pass as
825 * well.
826 */
827 if (!(done_mask & (1 << j)) &&
828 GET_SWZ(src0.swizzle, j) == src0_swiz) {
829 this_mask |= (1 << j);
830 }
831 }
832
833 if (this_mask != scs_mask) {
834 glsl_to_tgsi_instruction *inst;
835 st_dst_reg tmp_dst = st_dst_reg(tmp);
836
837 /* Emit the SCS instruction.
838 */
839 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
840 inst->dst.writemask = scs_mask;
841
842 /* Move the result of the SCS instruction to the desired location in
843 * the destination.
844 */
845 tmp.swizzle = MAKE_SWIZZLE4(component, component,
846 component, component);
847 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
848 inst->dst.writemask = this_mask;
849 } else {
850 /* Emit the SCS instruction to write directly to the destination.
851 */
852 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
853 inst->dst.writemask = scs_mask;
854 }
855
856 done_mask |= this_mask;
857 }
858 }
859
860 int
861 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
862 gl_constant_value values[4], int size, int datatype,
863 GLuint *swizzle_out)
864 {
865 if (file == PROGRAM_CONSTANT) {
866 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
867 size, datatype, swizzle_out);
868 } else {
869 int index = 0;
870 immediate_storage *entry;
871 assert(file == PROGRAM_IMMEDIATE);
872
873 /* Search immediate storage to see if we already have an identical
874 * immediate that we can use instead of adding a duplicate entry.
875 */
876 foreach_iter(exec_list_iterator, iter, this->immediates) {
877 entry = (immediate_storage *)iter.get();
878
879 if (entry->size == size &&
880 entry->type == datatype &&
881 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
882 return index;
883 }
884 index++;
885 }
886
887 /* Add this immediate to the list. */
888 entry = new(mem_ctx) immediate_storage(values, size, datatype);
889 this->immediates.push_tail(entry);
890 this->num_immediates++;
891 return index;
892 }
893 }
894
895 st_src_reg
896 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
897 {
898 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
899 union gl_constant_value uval;
900
901 uval.f = val;
902 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
903
904 return src;
905 }
906
907 st_src_reg
908 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
909 {
910 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
911 union gl_constant_value uval;
912
913 assert(native_integers);
914
915 uval.i = val;
916 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
917
918 return src;
919 }
920
921 st_src_reg
922 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
923 {
924 if (native_integers)
925 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
926 st_src_reg_for_int(val);
927 else
928 return st_src_reg_for_float(val);
929 }
930
931 static int
932 type_size(const struct glsl_type *type)
933 {
934 unsigned int i;
935 int size;
936
937 switch (type->base_type) {
938 case GLSL_TYPE_UINT:
939 case GLSL_TYPE_INT:
940 case GLSL_TYPE_FLOAT:
941 case GLSL_TYPE_BOOL:
942 if (type->is_matrix()) {
943 return type->matrix_columns;
944 } else {
945 /* Regardless of size of vector, it gets a vec4. This is bad
946 * packing for things like floats, but otherwise arrays become a
947 * mess. Hopefully a later pass over the code can pack scalars
948 * down if appropriate.
949 */
950 return 1;
951 }
952 case GLSL_TYPE_ARRAY:
953 assert(type->length > 0);
954 return type_size(type->fields.array) * type->length;
955 case GLSL_TYPE_STRUCT:
956 size = 0;
957 for (i = 0; i < type->length; i++) {
958 size += type_size(type->fields.structure[i].type);
959 }
960 return size;
961 case GLSL_TYPE_SAMPLER:
962 /* Samplers take up one slot in UNIFORMS[], but they're baked in
963 * at link time.
964 */
965 return 1;
966 default:
967 assert(0);
968 return 0;
969 }
970 }
971
972 /**
973 * In the initial pass of codegen, we assign temporary numbers to
974 * intermediate results. (not SSA -- variable assignments will reuse
975 * storage).
976 */
977 st_src_reg
978 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
979 {
980 st_src_reg src;
981
982 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
983 src.file = PROGRAM_TEMPORARY;
984 src.index = next_temp;
985 src.reladdr = NULL;
986 next_temp += type_size(type);
987
988 if (type->is_array() || type->is_record()) {
989 src.swizzle = SWIZZLE_NOOP;
990 } else {
991 src.swizzle = swizzle_for_size(type->vector_elements);
992 }
993 src.negate = 0;
994
995 return src;
996 }
997
998 variable_storage *
999 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1000 {
1001
1002 variable_storage *entry;
1003
1004 foreach_iter(exec_list_iterator, iter, this->variables) {
1005 entry = (variable_storage *)iter.get();
1006
1007 if (entry->var == var)
1008 return entry;
1009 }
1010
1011 return NULL;
1012 }
1013
1014 void
1015 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1016 {
1017 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1018 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1019
1020 fp->OriginUpperLeft = ir->origin_upper_left;
1021 fp->PixelCenterInteger = ir->pixel_center_integer;
1022 }
1023
1024 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1025 unsigned int i;
1026 const ir_state_slot *const slots = ir->state_slots;
1027 assert(ir->state_slots != NULL);
1028
1029 /* Check if this statevar's setup in the STATE file exactly
1030 * matches how we'll want to reference it as a
1031 * struct/array/whatever. If not, then we need to move it into
1032 * temporary storage and hope that it'll get copy-propagated
1033 * out.
1034 */
1035 for (i = 0; i < ir->num_state_slots; i++) {
1036 if (slots[i].swizzle != SWIZZLE_XYZW) {
1037 break;
1038 }
1039 }
1040
1041 variable_storage *storage;
1042 st_dst_reg dst;
1043 if (i == ir->num_state_slots) {
1044 /* We'll set the index later. */
1045 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1046 this->variables.push_tail(storage);
1047
1048 dst = undef_dst;
1049 } else {
1050 /* The variable_storage constructor allocates slots based on the size
1051 * of the type. However, this had better match the number of state
1052 * elements that we're going to copy into the new temporary.
1053 */
1054 assert((int) ir->num_state_slots == type_size(ir->type));
1055
1056 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1057 this->next_temp);
1058 this->variables.push_tail(storage);
1059 this->next_temp += type_size(ir->type);
1060
1061 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1062 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1063 }
1064
1065
1066 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1067 int index = _mesa_add_state_reference(this->prog->Parameters,
1068 (gl_state_index *)slots[i].tokens);
1069
1070 if (storage->file == PROGRAM_STATE_VAR) {
1071 if (storage->index == -1) {
1072 storage->index = index;
1073 } else {
1074 assert(index == storage->index + (int)i);
1075 }
1076 } else {
1077 st_src_reg src(PROGRAM_STATE_VAR, index,
1078 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT);
1079 src.swizzle = slots[i].swizzle;
1080 emit(ir, TGSI_OPCODE_MOV, dst, src);
1081 /* even a float takes up a whole vec4 reg in a struct/array. */
1082 dst.index++;
1083 }
1084 }
1085
1086 if (storage->file == PROGRAM_TEMPORARY &&
1087 dst.index != storage->index + (int) ir->num_state_slots) {
1088 fail_link(this->shader_program,
1089 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1090 ir->name, dst.index - storage->index,
1091 type_size(ir->type));
1092 }
1093 }
1094 }
1095
1096 void
1097 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1098 {
1099 ir_dereference_variable *counter = NULL;
1100
1101 if (ir->counter != NULL)
1102 counter = new(ir) ir_dereference_variable(ir->counter);
1103
1104 if (ir->from != NULL) {
1105 assert(ir->counter != NULL);
1106
1107 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1108
1109 a->accept(this);
1110 delete a;
1111 }
1112
1113 emit(NULL, TGSI_OPCODE_BGNLOOP);
1114
1115 if (ir->to) {
1116 ir_expression *e =
1117 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1118 counter, ir->to);
1119 ir_if *if_stmt = new(ir) ir_if(e);
1120
1121 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1122
1123 if_stmt->then_instructions.push_tail(brk);
1124
1125 if_stmt->accept(this);
1126
1127 delete if_stmt;
1128 delete e;
1129 delete brk;
1130 }
1131
1132 visit_exec_list(&ir->body_instructions, this);
1133
1134 if (ir->increment) {
1135 ir_expression *e =
1136 new(ir) ir_expression(ir_binop_add, counter->type,
1137 counter, ir->increment);
1138
1139 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1140
1141 a->accept(this);
1142 delete a;
1143 delete e;
1144 }
1145
1146 emit(NULL, TGSI_OPCODE_ENDLOOP);
1147 }
1148
1149 void
1150 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1151 {
1152 switch (ir->mode) {
1153 case ir_loop_jump::jump_break:
1154 emit(NULL, TGSI_OPCODE_BRK);
1155 break;
1156 case ir_loop_jump::jump_continue:
1157 emit(NULL, TGSI_OPCODE_CONT);
1158 break;
1159 }
1160 }
1161
1162
1163 void
1164 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1165 {
1166 assert(0);
1167 (void)ir;
1168 }
1169
1170 void
1171 glsl_to_tgsi_visitor::visit(ir_function *ir)
1172 {
1173 /* Ignore function bodies other than main() -- we shouldn't see calls to
1174 * them since they should all be inlined before we get to glsl_to_tgsi.
1175 */
1176 if (strcmp(ir->name, "main") == 0) {
1177 const ir_function_signature *sig;
1178 exec_list empty;
1179
1180 sig = ir->matching_signature(&empty);
1181
1182 assert(sig);
1183
1184 foreach_iter(exec_list_iterator, iter, sig->body) {
1185 ir_instruction *ir = (ir_instruction *)iter.get();
1186
1187 ir->accept(this);
1188 }
1189 }
1190 }
1191
1192 bool
1193 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1194 {
1195 int nonmul_operand = 1 - mul_operand;
1196 st_src_reg a, b, c;
1197 st_dst_reg result_dst;
1198
1199 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1200 if (!expr || expr->operation != ir_binop_mul)
1201 return false;
1202
1203 expr->operands[0]->accept(this);
1204 a = this->result;
1205 expr->operands[1]->accept(this);
1206 b = this->result;
1207 ir->operands[nonmul_operand]->accept(this);
1208 c = this->result;
1209
1210 this->result = get_temp(ir->type);
1211 result_dst = st_dst_reg(this->result);
1212 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1213 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1214
1215 return true;
1216 }
1217
1218 /**
1219 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1220 *
1221 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1222 * implemented using multiplication, and logical-or is implemented using
1223 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1224 * As result, the logical expression (a & !b) can be rewritten as:
1225 *
1226 * - a * !b
1227 * - a * (1 - b)
1228 * - (a * 1) - (a * b)
1229 * - a + -(a * b)
1230 * - a + (a * -b)
1231 *
1232 * This final expression can be implemented as a single MAD(a, -b, a)
1233 * instruction.
1234 */
1235 bool
1236 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1237 {
1238 const int other_operand = 1 - try_operand;
1239 st_src_reg a, b;
1240
1241 ir_expression *expr = ir->operands[try_operand]->as_expression();
1242 if (!expr || expr->operation != ir_unop_logic_not)
1243 return false;
1244
1245 ir->operands[other_operand]->accept(this);
1246 a = this->result;
1247 expr->operands[0]->accept(this);
1248 b = this->result;
1249
1250 b.negate = ~b.negate;
1251
1252 this->result = get_temp(ir->type);
1253 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1254
1255 return true;
1256 }
1257
1258 bool
1259 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1260 {
1261 /* Saturates were only introduced to vertex programs in
1262 * NV_vertex_program3, so don't give them to drivers in the VP.
1263 */
1264 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1265 return false;
1266
1267 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1268 if (!sat_src)
1269 return false;
1270
1271 sat_src->accept(this);
1272 st_src_reg src = this->result;
1273
1274 /* If we generated an expression instruction into a temporary in
1275 * processing the saturate's operand, apply the saturate to that
1276 * instruction. Otherwise, generate a MOV to do the saturate.
1277 *
1278 * Note that we have to be careful to only do this optimization if
1279 * the instruction in question was what generated src->result. For
1280 * example, ir_dereference_array might generate a MUL instruction
1281 * to create the reladdr, and return us a src reg using that
1282 * reladdr. That MUL result is not the value we're trying to
1283 * saturate.
1284 */
1285 ir_expression *sat_src_expr = sat_src->as_expression();
1286 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1287 sat_src_expr->operation == ir_binop_add ||
1288 sat_src_expr->operation == ir_binop_dot)) {
1289 glsl_to_tgsi_instruction *new_inst;
1290 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1291 new_inst->saturate = true;
1292 } else {
1293 this->result = get_temp(ir->type);
1294 st_dst_reg result_dst = st_dst_reg(this->result);
1295 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1296 glsl_to_tgsi_instruction *inst;
1297 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1298 inst->saturate = true;
1299 }
1300
1301 return true;
1302 }
1303
1304 void
1305 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1306 st_src_reg *reg, int *num_reladdr)
1307 {
1308 if (!reg->reladdr)
1309 return;
1310
1311 emit_arl(ir, address_reg, *reg->reladdr);
1312
1313 if (*num_reladdr != 1) {
1314 st_src_reg temp = get_temp(glsl_type::vec4_type);
1315
1316 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1317 *reg = temp;
1318 }
1319
1320 (*num_reladdr)--;
1321 }
1322
1323 void
1324 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1325 {
1326 unsigned int operand;
1327 st_src_reg op[Elements(ir->operands)];
1328 st_src_reg result_src;
1329 st_dst_reg result_dst;
1330
1331 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1332 */
1333 if (ir->operation == ir_binop_add) {
1334 if (try_emit_mad(ir, 1))
1335 return;
1336 if (try_emit_mad(ir, 0))
1337 return;
1338 }
1339
1340 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1341 */
1342 if (ir->operation == ir_binop_logic_and) {
1343 if (try_emit_mad_for_and_not(ir, 1))
1344 return;
1345 if (try_emit_mad_for_and_not(ir, 0))
1346 return;
1347 }
1348
1349 if (try_emit_sat(ir))
1350 return;
1351
1352 if (ir->operation == ir_quadop_vector)
1353 assert(!"ir_quadop_vector should have been lowered");
1354
1355 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1356 this->result.file = PROGRAM_UNDEFINED;
1357 ir->operands[operand]->accept(this);
1358 if (this->result.file == PROGRAM_UNDEFINED) {
1359 ir_print_visitor v;
1360 printf("Failed to get tree for expression operand:\n");
1361 ir->operands[operand]->accept(&v);
1362 exit(1);
1363 }
1364 op[operand] = this->result;
1365
1366 /* Matrix expression operands should have been broken down to vector
1367 * operations already.
1368 */
1369 assert(!ir->operands[operand]->type->is_matrix());
1370 }
1371
1372 int vector_elements = ir->operands[0]->type->vector_elements;
1373 if (ir->operands[1]) {
1374 vector_elements = MAX2(vector_elements,
1375 ir->operands[1]->type->vector_elements);
1376 }
1377
1378 this->result.file = PROGRAM_UNDEFINED;
1379
1380 /* Storage for our result. Ideally for an assignment we'd be using
1381 * the actual storage for the result here, instead.
1382 */
1383 result_src = get_temp(ir->type);
1384 /* convenience for the emit functions below. */
1385 result_dst = st_dst_reg(result_src);
1386 /* Limit writes to the channels that will be used by result_src later.
1387 * This does limit this temp's use as a temporary for multi-instruction
1388 * sequences.
1389 */
1390 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1391
1392 switch (ir->operation) {
1393 case ir_unop_logic_not:
1394 if (result_dst.type != GLSL_TYPE_FLOAT)
1395 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1396 else {
1397 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1398 * older GPUs implement SEQ using multiple instructions (i915 uses two
1399 * SGE instructions and a MUL instruction). Since our logic values are
1400 * 0.0 and 1.0, 1-x also implements !x.
1401 */
1402 op[0].negate = ~op[0].negate;
1403 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1404 }
1405 break;
1406 case ir_unop_neg:
1407 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1408 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1409 else {
1410 op[0].negate = ~op[0].negate;
1411 result_src = op[0];
1412 }
1413 break;
1414 case ir_unop_abs:
1415 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1416 break;
1417 case ir_unop_sign:
1418 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1419 break;
1420 case ir_unop_rcp:
1421 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1422 break;
1423
1424 case ir_unop_exp2:
1425 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1426 break;
1427 case ir_unop_exp:
1428 case ir_unop_log:
1429 assert(!"not reached: should be handled by ir_explog_to_explog2");
1430 break;
1431 case ir_unop_log2:
1432 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1433 break;
1434 case ir_unop_sin:
1435 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1436 break;
1437 case ir_unop_cos:
1438 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1439 break;
1440 case ir_unop_sin_reduced:
1441 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1442 break;
1443 case ir_unop_cos_reduced:
1444 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1445 break;
1446
1447 case ir_unop_dFdx:
1448 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1449 break;
1450 case ir_unop_dFdy:
1451 {
1452 /* The X component contains 1 or -1 depending on whether the framebuffer
1453 * is a FBO or the window system buffer, respectively.
1454 * It is then multiplied with the source operand of DDY.
1455 */
1456 static const gl_state_index transform_y_state[STATE_LENGTH]
1457 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1458
1459 unsigned transform_y_index =
1460 _mesa_add_state_reference(this->prog->Parameters,
1461 transform_y_state);
1462
1463 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1464 transform_y_index,
1465 glsl_type::vec4_type);
1466 transform_y.swizzle = SWIZZLE_XXXX;
1467
1468 st_src_reg temp = get_temp(glsl_type::vec4_type);
1469
1470 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1471 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1472 break;
1473 }
1474
1475 case ir_unop_noise: {
1476 /* At some point, a motivated person could add a better
1477 * implementation of noise. Currently not even the nvidia
1478 * binary drivers do anything more than this. In any case, the
1479 * place to do this is in the GL state tracker, not the poor
1480 * driver.
1481 */
1482 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1483 break;
1484 }
1485
1486 case ir_binop_add:
1487 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1488 break;
1489 case ir_binop_sub:
1490 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1491 break;
1492
1493 case ir_binop_mul:
1494 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1495 break;
1496 case ir_binop_div:
1497 if (result_dst.type == GLSL_TYPE_FLOAT)
1498 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1499 else
1500 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1501 break;
1502 case ir_binop_mod:
1503 if (result_dst.type == GLSL_TYPE_FLOAT)
1504 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1505 else
1506 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1507 break;
1508
1509 case ir_binop_less:
1510 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1511 break;
1512 case ir_binop_greater:
1513 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1514 break;
1515 case ir_binop_lequal:
1516 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1517 break;
1518 case ir_binop_gequal:
1519 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1520 break;
1521 case ir_binop_equal:
1522 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1523 break;
1524 case ir_binop_nequal:
1525 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1526 break;
1527 case ir_binop_all_equal:
1528 /* "==" operator producing a scalar boolean. */
1529 if (ir->operands[0]->type->is_vector() ||
1530 ir->operands[1]->type->is_vector()) {
1531 st_src_reg temp = get_temp(native_integers ?
1532 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1533 glsl_type::vec4_type);
1534
1535 if (native_integers) {
1536 st_dst_reg temp_dst = st_dst_reg(temp);
1537 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1538
1539 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1540
1541 /* Emit 1-3 AND operations to combine the SEQ results. */
1542 switch (ir->operands[0]->type->vector_elements) {
1543 case 2:
1544 break;
1545 case 3:
1546 temp_dst.writemask = WRITEMASK_Y;
1547 temp1.swizzle = SWIZZLE_YYYY;
1548 temp2.swizzle = SWIZZLE_ZZZZ;
1549 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1550 break;
1551 case 4:
1552 temp_dst.writemask = WRITEMASK_X;
1553 temp1.swizzle = SWIZZLE_XXXX;
1554 temp2.swizzle = SWIZZLE_YYYY;
1555 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1556 temp_dst.writemask = WRITEMASK_Y;
1557 temp1.swizzle = SWIZZLE_ZZZZ;
1558 temp2.swizzle = SWIZZLE_WWWW;
1559 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1560 }
1561
1562 temp1.swizzle = SWIZZLE_XXXX;
1563 temp2.swizzle = SWIZZLE_YYYY;
1564 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1565 } else {
1566 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1567
1568 /* After the dot-product, the value will be an integer on the
1569 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1570 */
1571 emit_dp(ir, result_dst, temp, temp, vector_elements);
1572
1573 /* Negating the result of the dot-product gives values on the range
1574 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1575 * This is achieved using SGE.
1576 */
1577 st_src_reg sge_src = result_src;
1578 sge_src.negate = ~sge_src.negate;
1579 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1580 }
1581 } else {
1582 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1583 }
1584 break;
1585 case ir_binop_any_nequal:
1586 /* "!=" operator producing a scalar boolean. */
1587 if (ir->operands[0]->type->is_vector() ||
1588 ir->operands[1]->type->is_vector()) {
1589 st_src_reg temp = get_temp(native_integers ?
1590 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1591 glsl_type::vec4_type);
1592 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1593
1594 if (native_integers) {
1595 st_dst_reg temp_dst = st_dst_reg(temp);
1596 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1597
1598 /* Emit 1-3 OR operations to combine the SNE results. */
1599 switch (ir->operands[0]->type->vector_elements) {
1600 case 2:
1601 break;
1602 case 3:
1603 temp_dst.writemask = WRITEMASK_Y;
1604 temp1.swizzle = SWIZZLE_YYYY;
1605 temp2.swizzle = SWIZZLE_ZZZZ;
1606 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1607 break;
1608 case 4:
1609 temp_dst.writemask = WRITEMASK_X;
1610 temp1.swizzle = SWIZZLE_XXXX;
1611 temp2.swizzle = SWIZZLE_YYYY;
1612 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1613 temp_dst.writemask = WRITEMASK_Y;
1614 temp1.swizzle = SWIZZLE_ZZZZ;
1615 temp2.swizzle = SWIZZLE_WWWW;
1616 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1617 }
1618
1619 temp1.swizzle = SWIZZLE_XXXX;
1620 temp2.swizzle = SWIZZLE_YYYY;
1621 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1622 } else {
1623 /* After the dot-product, the value will be an integer on the
1624 * range [0,4]. Zero stays zero, and positive values become 1.0.
1625 */
1626 glsl_to_tgsi_instruction *const dp =
1627 emit_dp(ir, result_dst, temp, temp, vector_elements);
1628 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1629 /* The clamping to [0,1] can be done for free in the fragment
1630 * shader with a saturate.
1631 */
1632 dp->saturate = true;
1633 } else {
1634 /* Negating the result of the dot-product gives values on the range
1635 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1636 * achieved using SLT.
1637 */
1638 st_src_reg slt_src = result_src;
1639 slt_src.negate = ~slt_src.negate;
1640 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1641 }
1642 }
1643 } else {
1644 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1645 }
1646 break;
1647
1648 case ir_unop_any: {
1649 assert(ir->operands[0]->type->is_vector());
1650
1651 /* After the dot-product, the value will be an integer on the
1652 * range [0,4]. Zero stays zero, and positive values become 1.0.
1653 */
1654 glsl_to_tgsi_instruction *const dp =
1655 emit_dp(ir, result_dst, op[0], op[0],
1656 ir->operands[0]->type->vector_elements);
1657 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1658 result_dst.type == GLSL_TYPE_FLOAT) {
1659 /* The clamping to [0,1] can be done for free in the fragment
1660 * shader with a saturate.
1661 */
1662 dp->saturate = true;
1663 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1666 * is achieved using SLT.
1667 */
1668 st_src_reg slt_src = result_src;
1669 slt_src.negate = ~slt_src.negate;
1670 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1671 }
1672 else {
1673 /* Use SNE 0 if integers are being used as boolean values. */
1674 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1675 }
1676 break;
1677 }
1678
1679 case ir_binop_logic_xor:
1680 if (native_integers)
1681 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1682 else
1683 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1684 break;
1685
1686 case ir_binop_logic_or: {
1687 if (native_integers) {
1688 /* If integers are used as booleans, we can use an actual "or"
1689 * instruction.
1690 */
1691 assert(native_integers);
1692 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1693 } else {
1694 /* After the addition, the value will be an integer on the
1695 * range [0,2]. Zero stays zero, and positive values become 1.0.
1696 */
1697 glsl_to_tgsi_instruction *add =
1698 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1699 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate if floats are being used as boolean values.
1702 */
1703 add->saturate = true;
1704 } else {
1705 /* Negating the result of the addition gives values on the range
1706 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1708 */
1709 st_src_reg slt_src = result_src;
1710 slt_src.negate = ~slt_src.negate;
1711 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1712 }
1713 }
1714 break;
1715 }
1716
1717 case ir_binop_logic_and:
1718 /* If native integers are disabled, the bool args are stored as float 0.0
1719 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1720 * actual AND opcode.
1721 */
1722 if (native_integers)
1723 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1724 else
1725 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1726 break;
1727
1728 case ir_binop_dot:
1729 assert(ir->operands[0]->type->is_vector());
1730 assert(ir->operands[0]->type == ir->operands[1]->type);
1731 emit_dp(ir, result_dst, op[0], op[1],
1732 ir->operands[0]->type->vector_elements);
1733 break;
1734
1735 case ir_unop_sqrt:
1736 /* sqrt(x) = x * rsq(x). */
1737 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1738 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1739 /* For incoming channels <= 0, set the result to 0. */
1740 op[0].negate = ~op[0].negate;
1741 emit(ir, TGSI_OPCODE_CMP, result_dst,
1742 op[0], result_src, st_src_reg_for_float(0.0));
1743 break;
1744 case ir_unop_rsq:
1745 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1746 break;
1747 case ir_unop_i2f:
1748 if (native_integers) {
1749 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1750 break;
1751 }
1752 /* fallthrough to next case otherwise */
1753 case ir_unop_b2f:
1754 if (native_integers) {
1755 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1756 break;
1757 }
1758 /* fallthrough to next case otherwise */
1759 case ir_unop_i2u:
1760 case ir_unop_u2i:
1761 /* Converting between signed and unsigned integers is a no-op. */
1762 result_src = op[0];
1763 break;
1764 case ir_unop_b2i:
1765 if (native_integers) {
1766 /* Booleans are stored as integers using ~0 for true and 0 for false.
1767 * GLSL requires that int(bool) return 1 for true and 0 for false.
1768 * This conversion is done with AND, but it could be done with NEG.
1769 */
1770 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1771 } else {
1772 /* Booleans and integers are both stored as floats when native
1773 * integers are disabled.
1774 */
1775 result_src = op[0];
1776 }
1777 break;
1778 case ir_unop_f2i:
1779 if (native_integers)
1780 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1781 else
1782 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1783 break;
1784 case ir_unop_f2u:
1785 if (native_integers)
1786 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1787 else
1788 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1789 break;
1790 case ir_unop_bitcast_f2i:
1791 case ir_unop_bitcast_f2u:
1792 case ir_unop_bitcast_i2f:
1793 case ir_unop_bitcast_u2f:
1794 result_src = op[0];
1795 break;
1796 case ir_unop_f2b:
1797 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1798 break;
1799 case ir_unop_i2b:
1800 if (native_integers)
1801 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1802 else
1803 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1804 break;
1805 case ir_unop_trunc:
1806 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1807 break;
1808 case ir_unop_ceil:
1809 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1810 break;
1811 case ir_unop_floor:
1812 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1813 break;
1814 case ir_unop_round_even:
1815 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1816 break;
1817 case ir_unop_fract:
1818 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1819 break;
1820
1821 case ir_binop_min:
1822 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1823 break;
1824 case ir_binop_max:
1825 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1826 break;
1827 case ir_binop_pow:
1828 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1829 break;
1830
1831 case ir_unop_bit_not:
1832 if (native_integers) {
1833 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1834 break;
1835 }
1836 case ir_unop_u2f:
1837 if (native_integers) {
1838 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1839 break;
1840 }
1841 case ir_binop_lshift:
1842 if (native_integers) {
1843 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1844 break;
1845 }
1846 case ir_binop_rshift:
1847 if (native_integers) {
1848 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1849 break;
1850 }
1851 case ir_binop_bit_and:
1852 if (native_integers) {
1853 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1854 break;
1855 }
1856 case ir_binop_bit_xor:
1857 if (native_integers) {
1858 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1859 break;
1860 }
1861 case ir_binop_bit_or:
1862 if (native_integers) {
1863 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1864 break;
1865 }
1866
1867 assert(!"GLSL 1.30 features unsupported");
1868 break;
1869
1870 case ir_quadop_vector:
1871 /* This operation should have already been handled.
1872 */
1873 assert(!"Should not get here.");
1874 break;
1875 }
1876
1877 this->result = result_src;
1878 }
1879
1880
1881 void
1882 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1883 {
1884 st_src_reg src;
1885 int i;
1886 int swizzle[4];
1887
1888 /* Note that this is only swizzles in expressions, not those on the left
1889 * hand side of an assignment, which do write masking. See ir_assignment
1890 * for that.
1891 */
1892
1893 ir->val->accept(this);
1894 src = this->result;
1895 assert(src.file != PROGRAM_UNDEFINED);
1896
1897 for (i = 0; i < 4; i++) {
1898 if (i < ir->type->vector_elements) {
1899 switch (i) {
1900 case 0:
1901 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1902 break;
1903 case 1:
1904 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1905 break;
1906 case 2:
1907 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1908 break;
1909 case 3:
1910 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1911 break;
1912 }
1913 } else {
1914 /* If the type is smaller than a vec4, replicate the last
1915 * channel out.
1916 */
1917 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1918 }
1919 }
1920
1921 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1922
1923 this->result = src;
1924 }
1925
1926 void
1927 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1928 {
1929 variable_storage *entry = find_variable_storage(ir->var);
1930 ir_variable *var = ir->var;
1931
1932 if (!entry) {
1933 switch (var->mode) {
1934 case ir_var_uniform:
1935 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1936 var->location);
1937 this->variables.push_tail(entry);
1938 break;
1939 case ir_var_in:
1940 case ir_var_inout:
1941 /* The linker assigns locations for varyings and attributes,
1942 * including deprecated builtins (like gl_Color), user-assign
1943 * generic attributes (glBindVertexLocation), and
1944 * user-defined varyings.
1945 *
1946 * FINISHME: We would hit this path for function arguments. Fix!
1947 */
1948 assert(var->location != -1);
1949 entry = new(mem_ctx) variable_storage(var,
1950 PROGRAM_INPUT,
1951 var->location);
1952 break;
1953 case ir_var_out:
1954 assert(var->location != -1);
1955 entry = new(mem_ctx) variable_storage(var,
1956 PROGRAM_OUTPUT,
1957 var->location + var->index);
1958 break;
1959 case ir_var_system_value:
1960 entry = new(mem_ctx) variable_storage(var,
1961 PROGRAM_SYSTEM_VALUE,
1962 var->location);
1963 break;
1964 case ir_var_auto:
1965 case ir_var_temporary:
1966 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1967 this->next_temp);
1968 this->variables.push_tail(entry);
1969
1970 next_temp += type_size(var->type);
1971 break;
1972 }
1973
1974 if (!entry) {
1975 printf("Failed to make storage for %s\n", var->name);
1976 exit(1);
1977 }
1978 }
1979
1980 this->result = st_src_reg(entry->file, entry->index, var->type);
1981 if (!native_integers)
1982 this->result.type = GLSL_TYPE_FLOAT;
1983 }
1984
1985 void
1986 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
1987 {
1988 ir_constant *index;
1989 st_src_reg src;
1990 int element_size = type_size(ir->type);
1991
1992 index = ir->array_index->constant_expression_value();
1993
1994 ir->array->accept(this);
1995 src = this->result;
1996
1997 if (index) {
1998 src.index += index->value.i[0] * element_size;
1999 } else {
2000 /* Variable index array dereference. It eats the "vec4" of the
2001 * base of the array and an index that offsets the TGSI register
2002 * index.
2003 */
2004 ir->array_index->accept(this);
2005
2006 st_src_reg index_reg;
2007
2008 if (element_size == 1) {
2009 index_reg = this->result;
2010 } else {
2011 index_reg = get_temp(native_integers ?
2012 glsl_type::int_type : glsl_type::float_type);
2013
2014 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2015 this->result, st_src_reg_for_type(index_reg.type, element_size));
2016 }
2017
2018 /* If there was already a relative address register involved, add the
2019 * new and the old together to get the new offset.
2020 */
2021 if (src.reladdr != NULL) {
2022 st_src_reg accum_reg = get_temp(native_integers ?
2023 glsl_type::int_type : glsl_type::float_type);
2024
2025 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2026 index_reg, *src.reladdr);
2027
2028 index_reg = accum_reg;
2029 }
2030
2031 src.reladdr = ralloc(mem_ctx, st_src_reg);
2032 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2033 }
2034
2035 /* If the type is smaller than a vec4, replicate the last channel out. */
2036 if (ir->type->is_scalar() || ir->type->is_vector())
2037 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2038 else
2039 src.swizzle = SWIZZLE_NOOP;
2040
2041 this->result = src;
2042 }
2043
2044 void
2045 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2046 {
2047 unsigned int i;
2048 const glsl_type *struct_type = ir->record->type;
2049 int offset = 0;
2050
2051 ir->record->accept(this);
2052
2053 for (i = 0; i < struct_type->length; i++) {
2054 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2055 break;
2056 offset += type_size(struct_type->fields.structure[i].type);
2057 }
2058
2059 /* If the type is smaller than a vec4, replicate the last channel out. */
2060 if (ir->type->is_scalar() || ir->type->is_vector())
2061 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2062 else
2063 this->result.swizzle = SWIZZLE_NOOP;
2064
2065 this->result.index += offset;
2066 }
2067
2068 /**
2069 * We want to be careful in assignment setup to hit the actual storage
2070 * instead of potentially using a temporary like we might with the
2071 * ir_dereference handler.
2072 */
2073 static st_dst_reg
2074 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2075 {
2076 /* The LHS must be a dereference. If the LHS is a variable indexed array
2077 * access of a vector, it must be separated into a series conditional moves
2078 * before reaching this point (see ir_vec_index_to_cond_assign).
2079 */
2080 assert(ir->as_dereference());
2081 ir_dereference_array *deref_array = ir->as_dereference_array();
2082 if (deref_array) {
2083 assert(!deref_array->array->type->is_vector());
2084 }
2085
2086 /* Use the rvalue deref handler for the most part. We'll ignore
2087 * swizzles in it and write swizzles using writemask, though.
2088 */
2089 ir->accept(v);
2090 return st_dst_reg(v->result);
2091 }
2092
2093 /**
2094 * Process the condition of a conditional assignment
2095 *
2096 * Examines the condition of a conditional assignment to generate the optimal
2097 * first operand of a \c CMP instruction. If the condition is a relational
2098 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2099 * used as the source for the \c CMP instruction. Otherwise the comparison
2100 * is processed to a boolean result, and the boolean result is used as the
2101 * operand to the CMP instruction.
2102 */
2103 bool
2104 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2105 {
2106 ir_rvalue *src_ir = ir;
2107 bool negate = true;
2108 bool switch_order = false;
2109
2110 ir_expression *const expr = ir->as_expression();
2111 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2112 bool zero_on_left = false;
2113
2114 if (expr->operands[0]->is_zero()) {
2115 src_ir = expr->operands[1];
2116 zero_on_left = true;
2117 } else if (expr->operands[1]->is_zero()) {
2118 src_ir = expr->operands[0];
2119 zero_on_left = false;
2120 }
2121
2122 /* a is - 0 + - 0 +
2123 * (a < 0) T F F ( a < 0) T F F
2124 * (0 < a) F F T (-a < 0) F F T
2125 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2126 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2127 * (a > 0) F F T (-a < 0) F F T
2128 * (0 > a) T F F ( a < 0) T F F
2129 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2130 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2131 *
2132 * Note that exchanging the order of 0 and 'a' in the comparison simply
2133 * means that the value of 'a' should be negated.
2134 */
2135 if (src_ir != ir) {
2136 switch (expr->operation) {
2137 case ir_binop_less:
2138 switch_order = false;
2139 negate = zero_on_left;
2140 break;
2141
2142 case ir_binop_greater:
2143 switch_order = false;
2144 negate = !zero_on_left;
2145 break;
2146
2147 case ir_binop_lequal:
2148 switch_order = true;
2149 negate = !zero_on_left;
2150 break;
2151
2152 case ir_binop_gequal:
2153 switch_order = true;
2154 negate = zero_on_left;
2155 break;
2156
2157 default:
2158 /* This isn't the right kind of comparison afterall, so make sure
2159 * the whole condition is visited.
2160 */
2161 src_ir = ir;
2162 break;
2163 }
2164 }
2165 }
2166
2167 src_ir->accept(this);
2168
2169 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2170 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2171 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2172 * computing the condition.
2173 */
2174 if (negate)
2175 this->result.negate = ~this->result.negate;
2176
2177 return switch_order;
2178 }
2179
2180 void
2181 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2182 {
2183 st_dst_reg l;
2184 st_src_reg r;
2185 int i;
2186
2187 ir->rhs->accept(this);
2188 r = this->result;
2189
2190 l = get_assignment_lhs(ir->lhs, this);
2191
2192 /* FINISHME: This should really set to the correct maximal writemask for each
2193 * FINISHME: component written (in the loops below). This case can only
2194 * FINISHME: occur for matrices, arrays, and structures.
2195 */
2196 if (ir->write_mask == 0) {
2197 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2198 l.writemask = WRITEMASK_XYZW;
2199 } else if (ir->lhs->type->is_scalar() &&
2200 ir->lhs->variable_referenced()->mode == ir_var_out) {
2201 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2202 * FINISHME: W component of fragment shader output zero, work correctly.
2203 */
2204 l.writemask = WRITEMASK_XYZW;
2205 } else {
2206 int swizzles[4];
2207 int first_enabled_chan = 0;
2208 int rhs_chan = 0;
2209
2210 l.writemask = ir->write_mask;
2211
2212 for (int i = 0; i < 4; i++) {
2213 if (l.writemask & (1 << i)) {
2214 first_enabled_chan = GET_SWZ(r.swizzle, i);
2215 break;
2216 }
2217 }
2218
2219 /* Swizzle a small RHS vector into the channels being written.
2220 *
2221 * glsl ir treats write_mask as dictating how many channels are
2222 * present on the RHS while TGSI treats write_mask as just
2223 * showing which channels of the vec4 RHS get written.
2224 */
2225 for (int i = 0; i < 4; i++) {
2226 if (l.writemask & (1 << i))
2227 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2228 else
2229 swizzles[i] = first_enabled_chan;
2230 }
2231 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2232 swizzles[2], swizzles[3]);
2233 }
2234
2235 assert(l.file != PROGRAM_UNDEFINED);
2236 assert(r.file != PROGRAM_UNDEFINED);
2237
2238 if (ir->condition) {
2239 const bool switch_order = this->process_move_condition(ir->condition);
2240 st_src_reg condition = this->result;
2241
2242 for (i = 0; i < type_size(ir->lhs->type); i++) {
2243 st_src_reg l_src = st_src_reg(l);
2244 st_src_reg condition_temp = condition;
2245 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2246
2247 if (native_integers) {
2248 /* This is necessary because TGSI's CMP instruction expects the
2249 * condition to be a float, and we store booleans as integers.
2250 * If TGSI had a UCMP instruction or similar, this extra
2251 * instruction would not be necessary.
2252 */
2253 condition_temp = get_temp(glsl_type::vec4_type);
2254 condition.negate = 0;
2255 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2256 condition_temp.swizzle = condition.swizzle;
2257 }
2258
2259 if (switch_order) {
2260 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2261 } else {
2262 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2263 }
2264
2265 l.index++;
2266 r.index++;
2267 }
2268 } else if (ir->rhs->as_expression() &&
2269 this->instructions.get_tail() &&
2270 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2271 type_size(ir->lhs->type) == 1 &&
2272 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2273 /* To avoid emitting an extra MOV when assigning an expression to a
2274 * variable, emit the last instruction of the expression again, but
2275 * replace the destination register with the target of the assignment.
2276 * Dead code elimination will remove the original instruction.
2277 */
2278 glsl_to_tgsi_instruction *inst, *new_inst;
2279 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2280 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2281 new_inst->saturate = inst->saturate;
2282 inst->dead_mask = inst->dst.writemask;
2283 } else {
2284 for (i = 0; i < type_size(ir->lhs->type); i++) {
2285 emit(ir, TGSI_OPCODE_MOV, l, r);
2286 l.index++;
2287 r.index++;
2288 }
2289 }
2290 }
2291
2292
2293 void
2294 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2295 {
2296 st_src_reg src;
2297 GLfloat stack_vals[4] = { 0 };
2298 gl_constant_value *values = (gl_constant_value *) stack_vals;
2299 GLenum gl_type = GL_NONE;
2300 unsigned int i;
2301 static int in_array = 0;
2302 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2303
2304 /* Unfortunately, 4 floats is all we can get into
2305 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2306 * aggregate constant and move each constant value into it. If we
2307 * get lucky, copy propagation will eliminate the extra moves.
2308 */
2309 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2310 st_src_reg temp_base = get_temp(ir->type);
2311 st_dst_reg temp = st_dst_reg(temp_base);
2312
2313 foreach_iter(exec_list_iterator, iter, ir->components) {
2314 ir_constant *field_value = (ir_constant *)iter.get();
2315 int size = type_size(field_value->type);
2316
2317 assert(size > 0);
2318
2319 field_value->accept(this);
2320 src = this->result;
2321
2322 for (i = 0; i < (unsigned int)size; i++) {
2323 emit(ir, TGSI_OPCODE_MOV, temp, src);
2324
2325 src.index++;
2326 temp.index++;
2327 }
2328 }
2329 this->result = temp_base;
2330 return;
2331 }
2332
2333 if (ir->type->is_array()) {
2334 st_src_reg temp_base = get_temp(ir->type);
2335 st_dst_reg temp = st_dst_reg(temp_base);
2336 int size = type_size(ir->type->fields.array);
2337
2338 assert(size > 0);
2339 in_array++;
2340
2341 for (i = 0; i < ir->type->length; i++) {
2342 ir->array_elements[i]->accept(this);
2343 src = this->result;
2344 for (int j = 0; j < size; j++) {
2345 emit(ir, TGSI_OPCODE_MOV, temp, src);
2346
2347 src.index++;
2348 temp.index++;
2349 }
2350 }
2351 this->result = temp_base;
2352 in_array--;
2353 return;
2354 }
2355
2356 if (ir->type->is_matrix()) {
2357 st_src_reg mat = get_temp(ir->type);
2358 st_dst_reg mat_column = st_dst_reg(mat);
2359
2360 for (i = 0; i < ir->type->matrix_columns; i++) {
2361 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2362 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2363
2364 src = st_src_reg(file, -1, ir->type->base_type);
2365 src.index = add_constant(file,
2366 values,
2367 ir->type->vector_elements,
2368 GL_FLOAT,
2369 &src.swizzle);
2370 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2371
2372 mat_column.index++;
2373 }
2374
2375 this->result = mat;
2376 return;
2377 }
2378
2379 switch (ir->type->base_type) {
2380 case GLSL_TYPE_FLOAT:
2381 gl_type = GL_FLOAT;
2382 for (i = 0; i < ir->type->vector_elements; i++) {
2383 values[i].f = ir->value.f[i];
2384 }
2385 break;
2386 case GLSL_TYPE_UINT:
2387 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2388 for (i = 0; i < ir->type->vector_elements; i++) {
2389 if (native_integers)
2390 values[i].u = ir->value.u[i];
2391 else
2392 values[i].f = ir->value.u[i];
2393 }
2394 break;
2395 case GLSL_TYPE_INT:
2396 gl_type = native_integers ? GL_INT : GL_FLOAT;
2397 for (i = 0; i < ir->type->vector_elements; i++) {
2398 if (native_integers)
2399 values[i].i = ir->value.i[i];
2400 else
2401 values[i].f = ir->value.i[i];
2402 }
2403 break;
2404 case GLSL_TYPE_BOOL:
2405 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2406 for (i = 0; i < ir->type->vector_elements; i++) {
2407 if (native_integers)
2408 values[i].u = ir->value.b[i] ? ~0 : 0;
2409 else
2410 values[i].f = ir->value.b[i];
2411 }
2412 break;
2413 default:
2414 assert(!"Non-float/uint/int/bool constant");
2415 }
2416
2417 this->result = st_src_reg(file, -1, ir->type);
2418 this->result.index = add_constant(file,
2419 values,
2420 ir->type->vector_elements,
2421 gl_type,
2422 &this->result.swizzle);
2423 }
2424
2425 function_entry *
2426 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2427 {
2428 function_entry *entry;
2429
2430 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2431 entry = (function_entry *)iter.get();
2432
2433 if (entry->sig == sig)
2434 return entry;
2435 }
2436
2437 entry = ralloc(mem_ctx, function_entry);
2438 entry->sig = sig;
2439 entry->sig_id = this->next_signature_id++;
2440 entry->bgn_inst = NULL;
2441
2442 /* Allocate storage for all the parameters. */
2443 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2444 ir_variable *param = (ir_variable *)iter.get();
2445 variable_storage *storage;
2446
2447 storage = find_variable_storage(param);
2448 assert(!storage);
2449
2450 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2451 this->next_temp);
2452 this->variables.push_tail(storage);
2453
2454 this->next_temp += type_size(param->type);
2455 }
2456
2457 if (!sig->return_type->is_void()) {
2458 entry->return_reg = get_temp(sig->return_type);
2459 } else {
2460 entry->return_reg = undef_src;
2461 }
2462
2463 this->function_signatures.push_tail(entry);
2464 return entry;
2465 }
2466
2467 void
2468 glsl_to_tgsi_visitor::visit(ir_call *ir)
2469 {
2470 glsl_to_tgsi_instruction *call_inst;
2471 ir_function_signature *sig = ir->callee;
2472 function_entry *entry = get_function_signature(sig);
2473 int i;
2474
2475 /* Process in parameters. */
2476 exec_list_iterator sig_iter = sig->parameters.iterator();
2477 foreach_iter(exec_list_iterator, iter, *ir) {
2478 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2479 ir_variable *param = (ir_variable *)sig_iter.get();
2480
2481 if (param->mode == ir_var_in ||
2482 param->mode == ir_var_inout) {
2483 variable_storage *storage = find_variable_storage(param);
2484 assert(storage);
2485
2486 param_rval->accept(this);
2487 st_src_reg r = this->result;
2488
2489 st_dst_reg l;
2490 l.file = storage->file;
2491 l.index = storage->index;
2492 l.reladdr = NULL;
2493 l.writemask = WRITEMASK_XYZW;
2494 l.cond_mask = COND_TR;
2495
2496 for (i = 0; i < type_size(param->type); i++) {
2497 emit(ir, TGSI_OPCODE_MOV, l, r);
2498 l.index++;
2499 r.index++;
2500 }
2501 }
2502
2503 sig_iter.next();
2504 }
2505 assert(!sig_iter.has_next());
2506
2507 /* Emit call instruction */
2508 call_inst = emit(ir, TGSI_OPCODE_CAL);
2509 call_inst->function = entry;
2510
2511 /* Process out parameters. */
2512 sig_iter = sig->parameters.iterator();
2513 foreach_iter(exec_list_iterator, iter, *ir) {
2514 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2515 ir_variable *param = (ir_variable *)sig_iter.get();
2516
2517 if (param->mode == ir_var_out ||
2518 param->mode == ir_var_inout) {
2519 variable_storage *storage = find_variable_storage(param);
2520 assert(storage);
2521
2522 st_src_reg r;
2523 r.file = storage->file;
2524 r.index = storage->index;
2525 r.reladdr = NULL;
2526 r.swizzle = SWIZZLE_NOOP;
2527 r.negate = 0;
2528
2529 param_rval->accept(this);
2530 st_dst_reg l = st_dst_reg(this->result);
2531
2532 for (i = 0; i < type_size(param->type); i++) {
2533 emit(ir, TGSI_OPCODE_MOV, l, r);
2534 l.index++;
2535 r.index++;
2536 }
2537 }
2538
2539 sig_iter.next();
2540 }
2541 assert(!sig_iter.has_next());
2542
2543 /* Process return value. */
2544 this->result = entry->return_reg;
2545 }
2546
2547 void
2548 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2549 {
2550 st_src_reg result_src, coord, lod_info, projector, dx, dy, offset;
2551 st_dst_reg result_dst, coord_dst;
2552 glsl_to_tgsi_instruction *inst = NULL;
2553 unsigned opcode = TGSI_OPCODE_NOP;
2554
2555 if (ir->coordinate) {
2556 ir->coordinate->accept(this);
2557
2558 /* Put our coords in a temp. We'll need to modify them for shadow,
2559 * projection, or LOD, so the only case we'd use it as is is if
2560 * we're doing plain old texturing. The optimization passes on
2561 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2562 */
2563 coord = get_temp(glsl_type::vec4_type);
2564 coord_dst = st_dst_reg(coord);
2565 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2566 }
2567
2568 if (ir->projector) {
2569 ir->projector->accept(this);
2570 projector = this->result;
2571 }
2572
2573 /* Storage for our result. Ideally for an assignment we'd be using
2574 * the actual storage for the result here, instead.
2575 */
2576 result_src = get_temp(glsl_type::vec4_type);
2577 result_dst = st_dst_reg(result_src);
2578
2579 switch (ir->op) {
2580 case ir_tex:
2581 opcode = TGSI_OPCODE_TEX;
2582 break;
2583 case ir_txb:
2584 opcode = TGSI_OPCODE_TXB;
2585 ir->lod_info.bias->accept(this);
2586 lod_info = this->result;
2587 break;
2588 case ir_txl:
2589 opcode = TGSI_OPCODE_TXL;
2590 ir->lod_info.lod->accept(this);
2591 lod_info = this->result;
2592 break;
2593 case ir_txd:
2594 opcode = TGSI_OPCODE_TXD;
2595 ir->lod_info.grad.dPdx->accept(this);
2596 dx = this->result;
2597 ir->lod_info.grad.dPdy->accept(this);
2598 dy = this->result;
2599 break;
2600 case ir_txs:
2601 opcode = TGSI_OPCODE_TXQ;
2602 ir->lod_info.lod->accept(this);
2603 lod_info = this->result;
2604 break;
2605 case ir_txf:
2606 opcode = TGSI_OPCODE_TXF;
2607 ir->lod_info.lod->accept(this);
2608 lod_info = this->result;
2609 if (ir->offset) {
2610 ir->offset->accept(this);
2611 offset = this->result;
2612 }
2613 break;
2614 }
2615
2616 const glsl_type *sampler_type = ir->sampler->type;
2617
2618 if (ir->projector) {
2619 if (opcode == TGSI_OPCODE_TEX) {
2620 /* Slot the projector in as the last component of the coord. */
2621 coord_dst.writemask = WRITEMASK_W;
2622 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2623 coord_dst.writemask = WRITEMASK_XYZW;
2624 opcode = TGSI_OPCODE_TXP;
2625 } else {
2626 st_src_reg coord_w = coord;
2627 coord_w.swizzle = SWIZZLE_WWWW;
2628
2629 /* For the other TEX opcodes there's no projective version
2630 * since the last slot is taken up by LOD info. Do the
2631 * projective divide now.
2632 */
2633 coord_dst.writemask = WRITEMASK_W;
2634 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2635
2636 /* In the case where we have to project the coordinates "by hand,"
2637 * the shadow comparator value must also be projected.
2638 */
2639 st_src_reg tmp_src = coord;
2640 if (ir->shadow_comparitor) {
2641 /* Slot the shadow value in as the second to last component of the
2642 * coord.
2643 */
2644 ir->shadow_comparitor->accept(this);
2645
2646 tmp_src = get_temp(glsl_type::vec4_type);
2647 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2648
2649 /* Projective division not allowed for array samplers. */
2650 assert(!sampler_type->sampler_array);
2651
2652 tmp_dst.writemask = WRITEMASK_Z;
2653 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2654
2655 tmp_dst.writemask = WRITEMASK_XY;
2656 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2657 }
2658
2659 coord_dst.writemask = WRITEMASK_XYZ;
2660 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2661
2662 coord_dst.writemask = WRITEMASK_XYZW;
2663 coord.swizzle = SWIZZLE_XYZW;
2664 }
2665 }
2666
2667 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2668 * comparator was put in the correct place (and projected) by the code,
2669 * above, that handles by-hand projection.
2670 */
2671 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2672 /* Slot the shadow value in as the second to last component of the
2673 * coord.
2674 */
2675 ir->shadow_comparitor->accept(this);
2676
2677 /* XXX This will need to be updated for cubemap array samplers. */
2678 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2679 sampler_type->sampler_array) ||
2680 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2681 coord_dst.writemask = WRITEMASK_W;
2682 } else {
2683 coord_dst.writemask = WRITEMASK_Z;
2684 }
2685
2686 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2687 coord_dst.writemask = WRITEMASK_XYZW;
2688 }
2689
2690 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2691 opcode == TGSI_OPCODE_TXF) {
2692 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2693 coord_dst.writemask = WRITEMASK_W;
2694 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2695 coord_dst.writemask = WRITEMASK_XYZW;
2696 }
2697
2698 if (opcode == TGSI_OPCODE_TXD)
2699 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2700 else if (opcode == TGSI_OPCODE_TXQ)
2701 inst = emit(ir, opcode, result_dst, lod_info);
2702 else if (opcode == TGSI_OPCODE_TXF) {
2703 inst = emit(ir, opcode, result_dst, coord);
2704 } else
2705 inst = emit(ir, opcode, result_dst, coord);
2706
2707 if (ir->shadow_comparitor)
2708 inst->tex_shadow = GL_TRUE;
2709
2710 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2711 this->shader_program,
2712 this->prog);
2713
2714 if (ir->offset) {
2715 inst->tex_offset_num_offset = 1;
2716 inst->tex_offsets[0].Index = offset.index;
2717 inst->tex_offsets[0].File = offset.file;
2718 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2719 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2720 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2721 }
2722
2723 switch (sampler_type->sampler_dimensionality) {
2724 case GLSL_SAMPLER_DIM_1D:
2725 inst->tex_target = (sampler_type->sampler_array)
2726 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2727 break;
2728 case GLSL_SAMPLER_DIM_2D:
2729 inst->tex_target = (sampler_type->sampler_array)
2730 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2731 break;
2732 case GLSL_SAMPLER_DIM_3D:
2733 inst->tex_target = TEXTURE_3D_INDEX;
2734 break;
2735 case GLSL_SAMPLER_DIM_CUBE:
2736 inst->tex_target = TEXTURE_CUBE_INDEX;
2737 break;
2738 case GLSL_SAMPLER_DIM_RECT:
2739 inst->tex_target = TEXTURE_RECT_INDEX;
2740 break;
2741 case GLSL_SAMPLER_DIM_BUF:
2742 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2743 break;
2744 case GLSL_SAMPLER_DIM_EXTERNAL:
2745 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2746 break;
2747 default:
2748 assert(!"Should not get here.");
2749 }
2750
2751 this->result = result_src;
2752 }
2753
2754 void
2755 glsl_to_tgsi_visitor::visit(ir_return *ir)
2756 {
2757 if (ir->get_value()) {
2758 st_dst_reg l;
2759 int i;
2760
2761 assert(current_function);
2762
2763 ir->get_value()->accept(this);
2764 st_src_reg r = this->result;
2765
2766 l = st_dst_reg(current_function->return_reg);
2767
2768 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2769 emit(ir, TGSI_OPCODE_MOV, l, r);
2770 l.index++;
2771 r.index++;
2772 }
2773 }
2774
2775 emit(ir, TGSI_OPCODE_RET);
2776 }
2777
2778 void
2779 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2780 {
2781 if (ir->condition) {
2782 ir->condition->accept(this);
2783 this->result.negate = ~this->result.negate;
2784 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2785 } else {
2786 emit(ir, TGSI_OPCODE_KILP);
2787 }
2788 }
2789
2790 void
2791 glsl_to_tgsi_visitor::visit(ir_if *ir)
2792 {
2793 glsl_to_tgsi_instruction *cond_inst, *if_inst;
2794 glsl_to_tgsi_instruction *prev_inst;
2795
2796 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2797
2798 ir->condition->accept(this);
2799 assert(this->result.file != PROGRAM_UNDEFINED);
2800
2801 if (this->options->EmitCondCodes) {
2802 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2803
2804 /* See if we actually generated any instruction for generating
2805 * the condition. If not, then cook up a move to a temp so we
2806 * have something to set cond_update on.
2807 */
2808 if (cond_inst == prev_inst) {
2809 st_src_reg temp = get_temp(glsl_type::bool_type);
2810 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result);
2811 }
2812 cond_inst->cond_update = GL_TRUE;
2813
2814 if_inst = emit(ir->condition, TGSI_OPCODE_IF);
2815 if_inst->dst.cond_mask = COND_NE;
2816 } else {
2817 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2818 }
2819
2820 this->instructions.push_tail(if_inst);
2821
2822 visit_exec_list(&ir->then_instructions, this);
2823
2824 if (!ir->else_instructions.is_empty()) {
2825 emit(ir->condition, TGSI_OPCODE_ELSE);
2826 visit_exec_list(&ir->else_instructions, this);
2827 }
2828
2829 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2830 }
2831
2832 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2833 {
2834 result.file = PROGRAM_UNDEFINED;
2835 next_temp = 1;
2836 next_signature_id = 1;
2837 num_immediates = 0;
2838 current_function = NULL;
2839 num_address_regs = 0;
2840 samplers_used = 0;
2841 indirect_addr_temps = false;
2842 indirect_addr_consts = false;
2843 glsl_version = 0;
2844 native_integers = false;
2845 mem_ctx = ralloc_context(NULL);
2846 ctx = NULL;
2847 prog = NULL;
2848 shader_program = NULL;
2849 options = NULL;
2850 }
2851
2852 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2853 {
2854 ralloc_free(mem_ctx);
2855 }
2856
2857 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2858 {
2859 delete v;
2860 }
2861
2862
2863 /**
2864 * Count resources used by the given gpu program (number of texture
2865 * samplers, etc).
2866 */
2867 static void
2868 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2869 {
2870 v->samplers_used = 0;
2871
2872 foreach_iter(exec_list_iterator, iter, v->instructions) {
2873 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2874
2875 if (is_tex_instruction(inst->op)) {
2876 v->samplers_used |= 1 << inst->sampler;
2877
2878 if (inst->tex_shadow) {
2879 prog->ShadowSamplers |= 1 << inst->sampler;
2880 }
2881 }
2882 }
2883
2884 prog->SamplersUsed = v->samplers_used;
2885
2886 if (v->shader_program != NULL)
2887 _mesa_update_shader_textures_used(v->shader_program, prog);
2888 }
2889
2890 static void
2891 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2892 struct gl_shader_program *shader_program,
2893 const char *name, const glsl_type *type,
2894 ir_constant *val)
2895 {
2896 if (type->is_record()) {
2897 ir_constant *field_constant;
2898
2899 field_constant = (ir_constant *)val->components.get_head();
2900
2901 for (unsigned int i = 0; i < type->length; i++) {
2902 const glsl_type *field_type = type->fields.structure[i].type;
2903 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2904 type->fields.structure[i].name);
2905 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2906 field_type, field_constant);
2907 field_constant = (ir_constant *)field_constant->next;
2908 }
2909 return;
2910 }
2911
2912 unsigned offset;
2913 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
2914 &offset);
2915 if (offset == GL_INVALID_INDEX) {
2916 fail_link(shader_program,
2917 "Couldn't find uniform for initializer %s\n", name);
2918 return;
2919 }
2920 int loc = _mesa_uniform_merge_location_offset(index, offset);
2921
2922 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2923 ir_constant *element;
2924 const glsl_type *element_type;
2925 if (type->is_array()) {
2926 element = val->array_elements[i];
2927 element_type = type->fields.array;
2928 } else {
2929 element = val;
2930 element_type = type;
2931 }
2932
2933 void *values;
2934
2935 if (element_type->base_type == GLSL_TYPE_BOOL) {
2936 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2937 for (unsigned int j = 0; j < element_type->components(); j++) {
2938 conv[j] = element->value.b[j];
2939 }
2940 values = (void *)conv;
2941 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2942 element_type->vector_elements,
2943 1);
2944 } else {
2945 values = &element->value;
2946 }
2947
2948 if (element_type->is_matrix()) {
2949 _mesa_uniform_matrix(ctx, shader_program,
2950 element_type->matrix_columns,
2951 element_type->vector_elements,
2952 loc, 1, GL_FALSE, (GLfloat *)values);
2953 } else {
2954 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2955 values, element_type->gl_type);
2956 }
2957
2958 loc++;
2959 }
2960 }
2961
2962 /**
2963 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
2964 * are read from the given src in this instruction
2965 */
2966 static int
2967 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
2968 {
2969 int read_mask = 0, comp;
2970
2971 /* Now, given the src swizzle and the written channels, find which
2972 * components are actually read
2973 */
2974 for (comp = 0; comp < 4; ++comp) {
2975 const unsigned coord = GET_SWZ(src.swizzle, comp);
2976 ASSERT(coord < 4);
2977 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
2978 read_mask |= 1 << coord;
2979 }
2980
2981 return read_mask;
2982 }
2983
2984 /**
2985 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
2986 * instruction is the first instruction to write to register T0. There are
2987 * several lowering passes done in GLSL IR (e.g. branches and
2988 * relative addressing) that create a large number of conditional assignments
2989 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
2990 *
2991 * Here is why this conversion is safe:
2992 * CMP T0, T1 T2 T0 can be expanded to:
2993 * if (T1 < 0.0)
2994 * MOV T0, T2;
2995 * else
2996 * MOV T0, T0;
2997 *
2998 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
2999 * as the original program. If (T1 < 0.0) evaluates to false, executing
3000 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3001 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3002 * because any instruction that was going to read from T0 after this was going
3003 * to read a garbage value anyway.
3004 */
3005 void
3006 glsl_to_tgsi_visitor::simplify_cmp(void)
3007 {
3008 unsigned *tempWrites;
3009 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3010
3011 tempWrites = new unsigned[MAX_TEMPS];
3012 if (!tempWrites) {
3013 return;
3014 }
3015 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3016 memset(outputWrites, 0, sizeof(outputWrites));
3017
3018 foreach_iter(exec_list_iterator, iter, this->instructions) {
3019 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3020 unsigned prevWriteMask = 0;
3021
3022 /* Give up if we encounter relative addressing or flow control. */
3023 if (inst->dst.reladdr ||
3024 tgsi_get_opcode_info(inst->op)->is_branch ||
3025 inst->op == TGSI_OPCODE_BGNSUB ||
3026 inst->op == TGSI_OPCODE_CONT ||
3027 inst->op == TGSI_OPCODE_END ||
3028 inst->op == TGSI_OPCODE_ENDSUB ||
3029 inst->op == TGSI_OPCODE_RET) {
3030 break;
3031 }
3032
3033 if (inst->dst.file == PROGRAM_OUTPUT) {
3034 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3035 prevWriteMask = outputWrites[inst->dst.index];
3036 outputWrites[inst->dst.index] |= inst->dst.writemask;
3037 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3038 assert(inst->dst.index < MAX_TEMPS);
3039 prevWriteMask = tempWrites[inst->dst.index];
3040 tempWrites[inst->dst.index] |= inst->dst.writemask;
3041 }
3042
3043 /* For a CMP to be considered a conditional write, the destination
3044 * register and source register two must be the same. */
3045 if (inst->op == TGSI_OPCODE_CMP
3046 && !(inst->dst.writemask & prevWriteMask)
3047 && inst->src[2].file == inst->dst.file
3048 && inst->src[2].index == inst->dst.index
3049 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3050
3051 inst->op = TGSI_OPCODE_MOV;
3052 inst->src[0] = inst->src[1];
3053 }
3054 }
3055
3056 delete [] tempWrites;
3057 }
3058
3059 /* Replaces all references to a temporary register index with another index. */
3060 void
3061 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3062 {
3063 foreach_iter(exec_list_iterator, iter, this->instructions) {
3064 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3065 unsigned j;
3066
3067 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3068 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3069 inst->src[j].index == index) {
3070 inst->src[j].index = new_index;
3071 }
3072 }
3073
3074 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3075 inst->dst.index = new_index;
3076 }
3077 }
3078 }
3079
3080 int
3081 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3082 {
3083 int depth = 0; /* loop depth */
3084 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3085 unsigned i = 0, j;
3086
3087 foreach_iter(exec_list_iterator, iter, this->instructions) {
3088 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3089
3090 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3091 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3092 inst->src[j].index == index) {
3093 return (depth == 0) ? i : loop_start;
3094 }
3095 }
3096
3097 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3098 if(depth++ == 0)
3099 loop_start = i;
3100 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3101 if (--depth == 0)
3102 loop_start = -1;
3103 }
3104 assert(depth >= 0);
3105
3106 i++;
3107 }
3108
3109 return -1;
3110 }
3111
3112 int
3113 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3114 {
3115 int depth = 0; /* loop depth */
3116 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3117 int i = 0;
3118
3119 foreach_iter(exec_list_iterator, iter, this->instructions) {
3120 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3121
3122 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3123 return (depth == 0) ? i : loop_start;
3124 }
3125
3126 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3127 if(depth++ == 0)
3128 loop_start = i;
3129 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3130 if (--depth == 0)
3131 loop_start = -1;
3132 }
3133 assert(depth >= 0);
3134
3135 i++;
3136 }
3137
3138 return -1;
3139 }
3140
3141 int
3142 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3143 {
3144 int depth = 0; /* loop depth */
3145 int last = -1; /* index of last instruction that reads the temporary */
3146 unsigned i = 0, j;
3147
3148 foreach_iter(exec_list_iterator, iter, this->instructions) {
3149 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3150
3151 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3152 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3153 inst->src[j].index == index) {
3154 last = (depth == 0) ? i : -2;
3155 }
3156 }
3157
3158 if (inst->op == TGSI_OPCODE_BGNLOOP)
3159 depth++;
3160 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3161 if (--depth == 0 && last == -2)
3162 last = i;
3163 assert(depth >= 0);
3164
3165 i++;
3166 }
3167
3168 assert(last >= -1);
3169 return last;
3170 }
3171
3172 int
3173 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3174 {
3175 int depth = 0; /* loop depth */
3176 int last = -1; /* index of last instruction that writes to the temporary */
3177 int i = 0;
3178
3179 foreach_iter(exec_list_iterator, iter, this->instructions) {
3180 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3181
3182 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3183 last = (depth == 0) ? i : -2;
3184
3185 if (inst->op == TGSI_OPCODE_BGNLOOP)
3186 depth++;
3187 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3188 if (--depth == 0 && last == -2)
3189 last = i;
3190 assert(depth >= 0);
3191
3192 i++;
3193 }
3194
3195 assert(last >= -1);
3196 return last;
3197 }
3198
3199 /*
3200 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3201 * channels for copy propagation and updates following instructions to
3202 * use the original versions.
3203 *
3204 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3205 * will occur. As an example, a TXP production before this pass:
3206 *
3207 * 0: MOV TEMP[1], INPUT[4].xyyy;
3208 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3209 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3210 *
3211 * and after:
3212 *
3213 * 0: MOV TEMP[1], INPUT[4].xyyy;
3214 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3215 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3216 *
3217 * which allows for dead code elimination on TEMP[1]'s writes.
3218 */
3219 void
3220 glsl_to_tgsi_visitor::copy_propagate(void)
3221 {
3222 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3223 glsl_to_tgsi_instruction *,
3224 this->next_temp * 4);
3225 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3226 int level = 0;
3227
3228 foreach_iter(exec_list_iterator, iter, this->instructions) {
3229 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3230
3231 assert(inst->dst.file != PROGRAM_TEMPORARY
3232 || inst->dst.index < this->next_temp);
3233
3234 /* First, do any copy propagation possible into the src regs. */
3235 for (int r = 0; r < 3; r++) {
3236 glsl_to_tgsi_instruction *first = NULL;
3237 bool good = true;
3238 int acp_base = inst->src[r].index * 4;
3239
3240 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3241 inst->src[r].reladdr)
3242 continue;
3243
3244 /* See if we can find entries in the ACP consisting of MOVs
3245 * from the same src register for all the swizzled channels
3246 * of this src register reference.
3247 */
3248 for (int i = 0; i < 4; i++) {
3249 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3250 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3251
3252 if (!copy_chan) {
3253 good = false;
3254 break;
3255 }
3256
3257 assert(acp_level[acp_base + src_chan] <= level);
3258
3259 if (!first) {
3260 first = copy_chan;
3261 } else {
3262 if (first->src[0].file != copy_chan->src[0].file ||
3263 first->src[0].index != copy_chan->src[0].index) {
3264 good = false;
3265 break;
3266 }
3267 }
3268 }
3269
3270 if (good) {
3271 /* We've now validated that we can copy-propagate to
3272 * replace this src register reference. Do it.
3273 */
3274 inst->src[r].file = first->src[0].file;
3275 inst->src[r].index = first->src[0].index;
3276
3277 int swizzle = 0;
3278 for (int i = 0; i < 4; i++) {
3279 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3280 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3281 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3282 (3 * i));
3283 }
3284 inst->src[r].swizzle = swizzle;
3285 }
3286 }
3287
3288 switch (inst->op) {
3289 case TGSI_OPCODE_BGNLOOP:
3290 case TGSI_OPCODE_ENDLOOP:
3291 /* End of a basic block, clear the ACP entirely. */
3292 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3293 break;
3294
3295 case TGSI_OPCODE_IF:
3296 ++level;
3297 break;
3298
3299 case TGSI_OPCODE_ENDIF:
3300 case TGSI_OPCODE_ELSE:
3301 /* Clear all channels written inside the block from the ACP, but
3302 * leaving those that were not touched.
3303 */
3304 for (int r = 0; r < this->next_temp; r++) {
3305 for (int c = 0; c < 4; c++) {
3306 if (!acp[4 * r + c])
3307 continue;
3308
3309 if (acp_level[4 * r + c] >= level)
3310 acp[4 * r + c] = NULL;
3311 }
3312 }
3313 if (inst->op == TGSI_OPCODE_ENDIF)
3314 --level;
3315 break;
3316
3317 default:
3318 /* Continuing the block, clear any written channels from
3319 * the ACP.
3320 */
3321 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3322 /* Any temporary might be written, so no copy propagation
3323 * across this instruction.
3324 */
3325 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3326 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3327 inst->dst.reladdr) {
3328 /* Any output might be written, so no copy propagation
3329 * from outputs across this instruction.
3330 */
3331 for (int r = 0; r < this->next_temp; r++) {
3332 for (int c = 0; c < 4; c++) {
3333 if (!acp[4 * r + c])
3334 continue;
3335
3336 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3337 acp[4 * r + c] = NULL;
3338 }
3339 }
3340 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3341 inst->dst.file == PROGRAM_OUTPUT) {
3342 /* Clear where it's used as dst. */
3343 if (inst->dst.file == PROGRAM_TEMPORARY) {
3344 for (int c = 0; c < 4; c++) {
3345 if (inst->dst.writemask & (1 << c)) {
3346 acp[4 * inst->dst.index + c] = NULL;
3347 }
3348 }
3349 }
3350
3351 /* Clear where it's used as src. */
3352 for (int r = 0; r < this->next_temp; r++) {
3353 for (int c = 0; c < 4; c++) {
3354 if (!acp[4 * r + c])
3355 continue;
3356
3357 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3358
3359 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3360 acp[4 * r + c]->src[0].index == inst->dst.index &&
3361 inst->dst.writemask & (1 << src_chan))
3362 {
3363 acp[4 * r + c] = NULL;
3364 }
3365 }
3366 }
3367 }
3368 break;
3369 }
3370
3371 /* If this is a copy, add it to the ACP. */
3372 if (inst->op == TGSI_OPCODE_MOV &&
3373 inst->dst.file == PROGRAM_TEMPORARY &&
3374 !inst->dst.reladdr &&
3375 !inst->saturate &&
3376 !inst->src[0].reladdr &&
3377 !inst->src[0].negate) {
3378 for (int i = 0; i < 4; i++) {
3379 if (inst->dst.writemask & (1 << i)) {
3380 acp[4 * inst->dst.index + i] = inst;
3381 acp_level[4 * inst->dst.index + i] = level;
3382 }
3383 }
3384 }
3385 }
3386
3387 ralloc_free(acp_level);
3388 ralloc_free(acp);
3389 }
3390
3391 /*
3392 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3393 *
3394 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3395 * will occur. As an example, a TXP production after copy propagation but
3396 * before this pass:
3397 *
3398 * 0: MOV TEMP[1], INPUT[4].xyyy;
3399 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3400 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3401 *
3402 * and after this pass:
3403 *
3404 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3405 *
3406 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3407 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3408 */
3409 void
3410 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3411 {
3412 int i;
3413
3414 for (i=0; i < this->next_temp; i++) {
3415 int last_read = get_last_temp_read(i);
3416 int j = 0;
3417
3418 foreach_iter(exec_list_iterator, iter, this->instructions) {
3419 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3420
3421 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3422 j > last_read)
3423 {
3424 iter.remove();
3425 delete inst;
3426 }
3427
3428 j++;
3429 }
3430 }
3431 }
3432
3433 /*
3434 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3435 * code elimination. This is less primitive than eliminate_dead_code(), as it
3436 * is per-channel and can detect consecutive writes without a read between them
3437 * as dead code. However, there is some dead code that can be eliminated by
3438 * eliminate_dead_code() but not this function - for example, this function
3439 * cannot eliminate an instruction writing to a register that is never read and
3440 * is the only instruction writing to that register.
3441 *
3442 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3443 * will occur.
3444 */
3445 int
3446 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3447 {
3448 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3449 glsl_to_tgsi_instruction *,
3450 this->next_temp * 4);
3451 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3452 int level = 0;
3453 int removed = 0;
3454
3455 foreach_iter(exec_list_iterator, iter, this->instructions) {
3456 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3457
3458 assert(inst->dst.file != PROGRAM_TEMPORARY
3459 || inst->dst.index < this->next_temp);
3460
3461 switch (inst->op) {
3462 case TGSI_OPCODE_BGNLOOP:
3463 case TGSI_OPCODE_ENDLOOP:
3464 case TGSI_OPCODE_CONT:
3465 case TGSI_OPCODE_BRK:
3466 /* End of a basic block, clear the write array entirely.
3467 *
3468 * This keeps us from killing dead code when the writes are
3469 * on either side of a loop, even when the register isn't touched
3470 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3471 * dead code of this type, so it shouldn't make a difference as long as
3472 * the dead code elimination pass in the GLSL compiler does its job.
3473 */
3474 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3475 break;
3476
3477 case TGSI_OPCODE_ENDIF:
3478 case TGSI_OPCODE_ELSE:
3479 /* Promote the recorded level of all channels written inside the
3480 * preceding if or else block to the level above the if/else block.
3481 */
3482 for (int r = 0; r < this->next_temp; r++) {
3483 for (int c = 0; c < 4; c++) {
3484 if (!writes[4 * r + c])
3485 continue;
3486
3487 if (write_level[4 * r + c] == level)
3488 write_level[4 * r + c] = level-1;
3489 }
3490 }
3491
3492 if(inst->op == TGSI_OPCODE_ENDIF)
3493 --level;
3494
3495 break;
3496
3497 case TGSI_OPCODE_IF:
3498 ++level;
3499 /* fallthrough to default case to mark the condition as read */
3500
3501 default:
3502 /* Continuing the block, clear any channels from the write array that
3503 * are read by this instruction.
3504 */
3505 for (unsigned i = 0; i < Elements(inst->src); i++) {
3506 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3507 /* Any temporary might be read, so no dead code elimination
3508 * across this instruction.
3509 */
3510 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3511 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3512 /* Clear where it's used as src. */
3513 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3514 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3515 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3516 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3517
3518 for (int c = 0; c < 4; c++) {
3519 if (src_chans & (1 << c)) {
3520 writes[4 * inst->src[i].index + c] = NULL;
3521 }
3522 }
3523 }
3524 }
3525 break;
3526 }
3527
3528 /* If this instruction writes to a temporary, add it to the write array.
3529 * If there is already an instruction in the write array for one or more
3530 * of the channels, flag that channel write as dead.
3531 */
3532 if (inst->dst.file == PROGRAM_TEMPORARY &&
3533 !inst->dst.reladdr &&
3534 !inst->saturate) {
3535 for (int c = 0; c < 4; c++) {
3536 if (inst->dst.writemask & (1 << c)) {
3537 if (writes[4 * inst->dst.index + c]) {
3538 if (write_level[4 * inst->dst.index + c] < level)
3539 continue;
3540 else
3541 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3542 }
3543 writes[4 * inst->dst.index + c] = inst;
3544 write_level[4 * inst->dst.index + c] = level;
3545 }
3546 }
3547 }
3548 }
3549
3550 /* Anything still in the write array at this point is dead code. */
3551 for (int r = 0; r < this->next_temp; r++) {
3552 for (int c = 0; c < 4; c++) {
3553 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3554 if (inst)
3555 inst->dead_mask |= (1 << c);
3556 }
3557 }
3558
3559 /* Now actually remove the instructions that are completely dead and update
3560 * the writemask of other instructions with dead channels.
3561 */
3562 foreach_iter(exec_list_iterator, iter, this->instructions) {
3563 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3564
3565 if (!inst->dead_mask || !inst->dst.writemask)
3566 continue;
3567 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3568 iter.remove();
3569 delete inst;
3570 removed++;
3571 } else
3572 inst->dst.writemask &= ~(inst->dead_mask);
3573 }
3574
3575 ralloc_free(write_level);
3576 ralloc_free(writes);
3577
3578 return removed;
3579 }
3580
3581 /* Merges temporary registers together where possible to reduce the number of
3582 * registers needed to run a program.
3583 *
3584 * Produces optimal code only after copy propagation and dead code elimination
3585 * have been run. */
3586 void
3587 glsl_to_tgsi_visitor::merge_registers(void)
3588 {
3589 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3590 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3591 int i, j;
3592
3593 /* Read the indices of the last read and first write to each temp register
3594 * into an array so that we don't have to traverse the instruction list as
3595 * much. */
3596 for (i=0; i < this->next_temp; i++) {
3597 last_reads[i] = get_last_temp_read(i);
3598 first_writes[i] = get_first_temp_write(i);
3599 }
3600
3601 /* Start looking for registers with non-overlapping usages that can be
3602 * merged together. */
3603 for (i=0; i < this->next_temp; i++) {
3604 /* Don't touch unused registers. */
3605 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3606
3607 for (j=0; j < this->next_temp; j++) {
3608 /* Don't touch unused registers. */
3609 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3610
3611 /* We can merge the two registers if the first write to j is after or
3612 * in the same instruction as the last read from i. Note that the
3613 * register at index i will always be used earlier or at the same time
3614 * as the register at index j. */
3615 if (first_writes[i] <= first_writes[j] &&
3616 last_reads[i] <= first_writes[j])
3617 {
3618 rename_temp_register(j, i); /* Replace all references to j with i.*/
3619
3620 /* Update the first_writes and last_reads arrays with the new
3621 * values for the merged register index, and mark the newly unused
3622 * register index as such. */
3623 last_reads[i] = last_reads[j];
3624 first_writes[j] = -1;
3625 last_reads[j] = -1;
3626 }
3627 }
3628 }
3629
3630 ralloc_free(last_reads);
3631 ralloc_free(first_writes);
3632 }
3633
3634 /* Reassign indices to temporary registers by reusing unused indices created
3635 * by optimization passes. */
3636 void
3637 glsl_to_tgsi_visitor::renumber_registers(void)
3638 {
3639 int i = 0;
3640 int new_index = 0;
3641
3642 for (i=0; i < this->next_temp; i++) {
3643 if (get_first_temp_read(i) < 0) continue;
3644 if (i != new_index)
3645 rename_temp_register(i, new_index);
3646 new_index++;
3647 }
3648
3649 this->next_temp = new_index;
3650 }
3651
3652 /**
3653 * Returns a fragment program which implements the current pixel transfer ops.
3654 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3655 */
3656 extern "C" void
3657 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3658 glsl_to_tgsi_visitor *original,
3659 int scale_and_bias, int pixel_maps)
3660 {
3661 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3662 struct st_context *st = st_context(original->ctx);
3663 struct gl_program *prog = &fp->Base.Base;
3664 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3665 st_src_reg coord, src0;
3666 st_dst_reg dst0;
3667 glsl_to_tgsi_instruction *inst;
3668
3669 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3670 v->ctx = original->ctx;
3671 v->prog = prog;
3672 v->shader_program = NULL;
3673 v->glsl_version = original->glsl_version;
3674 v->native_integers = original->native_integers;
3675 v->options = original->options;
3676 v->next_temp = original->next_temp;
3677 v->num_address_regs = original->num_address_regs;
3678 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3679 v->indirect_addr_temps = original->indirect_addr_temps;
3680 v->indirect_addr_consts = original->indirect_addr_consts;
3681 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3682 v->num_immediates = original->num_immediates;
3683
3684 /*
3685 * Get initial pixel color from the texture.
3686 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3687 */
3688 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3689 src0 = v->get_temp(glsl_type::vec4_type);
3690 dst0 = st_dst_reg(src0);
3691 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3692 inst->sampler = 0;
3693 inst->tex_target = TEXTURE_2D_INDEX;
3694
3695 prog->InputsRead |= FRAG_BIT_TEX0;
3696 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3697 v->samplers_used |= (1 << 0);
3698
3699 if (scale_and_bias) {
3700 static const gl_state_index scale_state[STATE_LENGTH] =
3701 { STATE_INTERNAL, STATE_PT_SCALE,
3702 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3703 static const gl_state_index bias_state[STATE_LENGTH] =
3704 { STATE_INTERNAL, STATE_PT_BIAS,
3705 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3706 GLint scale_p, bias_p;
3707 st_src_reg scale, bias;
3708
3709 scale_p = _mesa_add_state_reference(params, scale_state);
3710 bias_p = _mesa_add_state_reference(params, bias_state);
3711
3712 /* MAD colorTemp, colorTemp, scale, bias; */
3713 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3714 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3715 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3716 }
3717
3718 if (pixel_maps) {
3719 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3720 st_dst_reg temp_dst = st_dst_reg(temp);
3721
3722 assert(st->pixel_xfer.pixelmap_texture);
3723
3724 /* With a little effort, we can do four pixel map look-ups with
3725 * two TEX instructions:
3726 */
3727
3728 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3729 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3730 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3731 inst->sampler = 1;
3732 inst->tex_target = TEXTURE_2D_INDEX;
3733
3734 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3735 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3736 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3737 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3738 inst->sampler = 1;
3739 inst->tex_target = TEXTURE_2D_INDEX;
3740
3741 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3742 v->samplers_used |= (1 << 1);
3743
3744 /* MOV colorTemp, temp; */
3745 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3746 }
3747
3748 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3749 * new visitor. */
3750 foreach_iter(exec_list_iterator, iter, original->instructions) {
3751 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3752 glsl_to_tgsi_instruction *newinst;
3753 st_src_reg src_regs[3];
3754
3755 if (inst->dst.file == PROGRAM_OUTPUT)
3756 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3757
3758 for (int i=0; i<3; i++) {
3759 src_regs[i] = inst->src[i];
3760 if (src_regs[i].file == PROGRAM_INPUT &&
3761 src_regs[i].index == FRAG_ATTRIB_COL0)
3762 {
3763 src_regs[i].file = PROGRAM_TEMPORARY;
3764 src_regs[i].index = src0.index;
3765 }
3766 else if (src_regs[i].file == PROGRAM_INPUT)
3767 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3768 }
3769
3770 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3771 newinst->tex_target = inst->tex_target;
3772 }
3773
3774 /* Make modifications to fragment program info. */
3775 prog->Parameters = _mesa_combine_parameter_lists(params,
3776 original->prog->Parameters);
3777 _mesa_free_parameter_list(params);
3778 count_resources(v, prog);
3779 fp->glsl_to_tgsi = v;
3780 }
3781
3782 /**
3783 * Make fragment program for glBitmap:
3784 * Sample the texture and kill the fragment if the bit is 0.
3785 * This program will be combined with the user's fragment program.
3786 *
3787 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3788 */
3789 extern "C" void
3790 get_bitmap_visitor(struct st_fragment_program *fp,
3791 glsl_to_tgsi_visitor *original, int samplerIndex)
3792 {
3793 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3794 struct st_context *st = st_context(original->ctx);
3795 struct gl_program *prog = &fp->Base.Base;
3796 st_src_reg coord, src0;
3797 st_dst_reg dst0;
3798 glsl_to_tgsi_instruction *inst;
3799
3800 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3801 v->ctx = original->ctx;
3802 v->prog = prog;
3803 v->shader_program = NULL;
3804 v->glsl_version = original->glsl_version;
3805 v->native_integers = original->native_integers;
3806 v->options = original->options;
3807 v->next_temp = original->next_temp;
3808 v->num_address_regs = original->num_address_regs;
3809 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3810 v->indirect_addr_temps = original->indirect_addr_temps;
3811 v->indirect_addr_consts = original->indirect_addr_consts;
3812 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3813 v->num_immediates = original->num_immediates;
3814
3815 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3816 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3817 src0 = v->get_temp(glsl_type::vec4_type);
3818 dst0 = st_dst_reg(src0);
3819 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3820 inst->sampler = samplerIndex;
3821 inst->tex_target = TEXTURE_2D_INDEX;
3822
3823 prog->InputsRead |= FRAG_BIT_TEX0;
3824 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3825 v->samplers_used |= (1 << samplerIndex);
3826
3827 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3828 src0.negate = NEGATE_XYZW;
3829 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3830 src0.swizzle = SWIZZLE_XXXX;
3831 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3832
3833 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3834 * new visitor. */
3835 foreach_iter(exec_list_iterator, iter, original->instructions) {
3836 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3837 glsl_to_tgsi_instruction *newinst;
3838 st_src_reg src_regs[3];
3839
3840 if (inst->dst.file == PROGRAM_OUTPUT)
3841 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3842
3843 for (int i=0; i<3; i++) {
3844 src_regs[i] = inst->src[i];
3845 if (src_regs[i].file == PROGRAM_INPUT)
3846 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3847 }
3848
3849 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3850 newinst->tex_target = inst->tex_target;
3851 }
3852
3853 /* Make modifications to fragment program info. */
3854 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3855 count_resources(v, prog);
3856 fp->glsl_to_tgsi = v;
3857 }
3858
3859 /* ------------------------- TGSI conversion stuff -------------------------- */
3860 struct label {
3861 unsigned branch_target;
3862 unsigned token;
3863 };
3864
3865 /**
3866 * Intermediate state used during shader translation.
3867 */
3868 struct st_translate {
3869 struct ureg_program *ureg;
3870
3871 struct ureg_dst temps[MAX_TEMPS];
3872 struct ureg_src *constants;
3873 struct ureg_src *immediates;
3874 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3875 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3876 struct ureg_dst address[1];
3877 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3878 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3879
3880 const GLuint *inputMapping;
3881 const GLuint *outputMapping;
3882
3883 /* For every instruction that contains a label (eg CALL), keep
3884 * details so that we can go back afterwards and emit the correct
3885 * tgsi instruction number for each label.
3886 */
3887 struct label *labels;
3888 unsigned labels_size;
3889 unsigned labels_count;
3890
3891 /* Keep a record of the tgsi instruction number that each mesa
3892 * instruction starts at, will be used to fix up labels after
3893 * translation.
3894 */
3895 unsigned *insn;
3896 unsigned insn_size;
3897 unsigned insn_count;
3898
3899 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3900
3901 boolean error;
3902 };
3903
3904 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3905 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
3906 TGSI_SEMANTIC_FACE,
3907 TGSI_SEMANTIC_VERTEXID,
3908 TGSI_SEMANTIC_INSTANCEID
3909 };
3910
3911 /**
3912 * Make note of a branch to a label in the TGSI code.
3913 * After we've emitted all instructions, we'll go over the list
3914 * of labels built here and patch the TGSI code with the actual
3915 * location of each label.
3916 */
3917 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
3918 {
3919 unsigned i;
3920
3921 if (t->labels_count + 1 >= t->labels_size) {
3922 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
3923 t->labels = (struct label *)realloc(t->labels,
3924 t->labels_size * sizeof(struct label));
3925 if (t->labels == NULL) {
3926 static unsigned dummy;
3927 t->error = TRUE;
3928 return &dummy;
3929 }
3930 }
3931
3932 i = t->labels_count++;
3933 t->labels[i].branch_target = branch_target;
3934 return &t->labels[i].token;
3935 }
3936
3937 /**
3938 * Called prior to emitting the TGSI code for each instruction.
3939 * Allocate additional space for instructions if needed.
3940 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
3941 * the next TGSI instruction.
3942 */
3943 static void set_insn_start(struct st_translate *t, unsigned start)
3944 {
3945 if (t->insn_count + 1 >= t->insn_size) {
3946 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
3947 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
3948 if (t->insn == NULL) {
3949 t->error = TRUE;
3950 return;
3951 }
3952 }
3953
3954 t->insn[t->insn_count++] = start;
3955 }
3956
3957 /**
3958 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
3959 */
3960 static struct ureg_src
3961 emit_immediate(struct st_translate *t,
3962 gl_constant_value values[4],
3963 int type, int size)
3964 {
3965 struct ureg_program *ureg = t->ureg;
3966
3967 switch(type)
3968 {
3969 case GL_FLOAT:
3970 return ureg_DECL_immediate(ureg, &values[0].f, size);
3971 case GL_INT:
3972 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
3973 case GL_UNSIGNED_INT:
3974 case GL_BOOL:
3975 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
3976 default:
3977 assert(!"should not get here - type must be float, int, uint, or bool");
3978 return ureg_src_undef();
3979 }
3980 }
3981
3982 /**
3983 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
3984 */
3985 static struct ureg_dst
3986 dst_register(struct st_translate *t,
3987 gl_register_file file,
3988 GLuint index)
3989 {
3990 switch(file) {
3991 case PROGRAM_UNDEFINED:
3992 return ureg_dst_undef();
3993
3994 case PROGRAM_TEMPORARY:
3995 if (ureg_dst_is_undef(t->temps[index]))
3996 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
3997
3998 return t->temps[index];
3999
4000 case PROGRAM_OUTPUT:
4001 if (t->procType == TGSI_PROCESSOR_VERTEX)
4002 assert(index < VERT_RESULT_MAX);
4003 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4004 assert(index < FRAG_RESULT_MAX);
4005 else
4006 assert(index < GEOM_RESULT_MAX);
4007
4008 assert(t->outputMapping[index] < Elements(t->outputs));
4009
4010 return t->outputs[t->outputMapping[index]];
4011
4012 case PROGRAM_ADDRESS:
4013 return t->address[index];
4014
4015 default:
4016 assert(!"unknown dst register file");
4017 return ureg_dst_undef();
4018 }
4019 }
4020
4021 /**
4022 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4023 */
4024 static struct ureg_src
4025 src_register(struct st_translate *t,
4026 gl_register_file file,
4027 GLuint index)
4028 {
4029 switch(file) {
4030 case PROGRAM_UNDEFINED:
4031 return ureg_src_undef();
4032
4033 case PROGRAM_TEMPORARY:
4034 assert(index >= 0);
4035 assert(index < Elements(t->temps));
4036 if (ureg_dst_is_undef(t->temps[index]))
4037 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4038 return ureg_src(t->temps[index]);
4039
4040 case PROGRAM_NAMED_PARAM:
4041 case PROGRAM_ENV_PARAM:
4042 case PROGRAM_LOCAL_PARAM:
4043 case PROGRAM_UNIFORM:
4044 assert(index >= 0);
4045 return t->constants[index];
4046 case PROGRAM_STATE_VAR:
4047 case PROGRAM_CONSTANT: /* ie, immediate */
4048 if (index < 0)
4049 return ureg_DECL_constant(t->ureg, 0);
4050 else
4051 return t->constants[index];
4052
4053 case PROGRAM_IMMEDIATE:
4054 return t->immediates[index];
4055
4056 case PROGRAM_INPUT:
4057 assert(t->inputMapping[index] < Elements(t->inputs));
4058 return t->inputs[t->inputMapping[index]];
4059
4060 case PROGRAM_OUTPUT:
4061 assert(t->outputMapping[index] < Elements(t->outputs));
4062 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4063
4064 case PROGRAM_ADDRESS:
4065 return ureg_src(t->address[index]);
4066
4067 case PROGRAM_SYSTEM_VALUE:
4068 assert(index < Elements(t->systemValues));
4069 return t->systemValues[index];
4070
4071 default:
4072 assert(!"unknown src register file");
4073 return ureg_src_undef();
4074 }
4075 }
4076
4077 /**
4078 * Create a TGSI ureg_dst register from an st_dst_reg.
4079 */
4080 static struct ureg_dst
4081 translate_dst(struct st_translate *t,
4082 const st_dst_reg *dst_reg,
4083 bool saturate, bool clamp_color)
4084 {
4085 struct ureg_dst dst = dst_register(t,
4086 dst_reg->file,
4087 dst_reg->index);
4088
4089 dst = ureg_writemask(dst, dst_reg->writemask);
4090
4091 if (saturate)
4092 dst = ureg_saturate(dst);
4093 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4094 /* Clamp colors for ARB_color_buffer_float. */
4095 switch (t->procType) {
4096 case TGSI_PROCESSOR_VERTEX:
4097 /* XXX if the geometry shader is present, this must be done there
4098 * instead of here. */
4099 if (dst_reg->index == VERT_RESULT_COL0 ||
4100 dst_reg->index == VERT_RESULT_COL1 ||
4101 dst_reg->index == VERT_RESULT_BFC0 ||
4102 dst_reg->index == VERT_RESULT_BFC1) {
4103 dst = ureg_saturate(dst);
4104 }
4105 break;
4106
4107 case TGSI_PROCESSOR_FRAGMENT:
4108 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4109 dst = ureg_saturate(dst);
4110 }
4111 break;
4112 }
4113 }
4114
4115 if (dst_reg->reladdr != NULL)
4116 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4117
4118 return dst;
4119 }
4120
4121 /**
4122 * Create a TGSI ureg_src register from an st_src_reg.
4123 */
4124 static struct ureg_src
4125 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4126 {
4127 struct ureg_src src = src_register(t, src_reg->file, src_reg->index);
4128
4129 src = ureg_swizzle(src,
4130 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4131 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4132 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4133 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4134
4135 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4136 src = ureg_negate(src);
4137
4138 if (src_reg->reladdr != NULL) {
4139 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4140 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4141 * set the bit for src.Negate. So we have to do the operation manually
4142 * here to work around the compiler's problems. */
4143 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4144 struct ureg_src addr = ureg_src(t->address[0]);
4145 src.Indirect = 1;
4146 src.IndirectFile = addr.File;
4147 src.IndirectIndex = addr.Index;
4148 src.IndirectSwizzle = addr.SwizzleX;
4149
4150 if (src_reg->file != PROGRAM_INPUT &&
4151 src_reg->file != PROGRAM_OUTPUT) {
4152 /* If src_reg->index was negative, it was set to zero in
4153 * src_register(). Reassign it now. But don't do this
4154 * for input/output regs since they get remapped while
4155 * const buffers don't.
4156 */
4157 src.Index = src_reg->index;
4158 }
4159 }
4160
4161 return src;
4162 }
4163
4164 static struct tgsi_texture_offset
4165 translate_tex_offset(struct st_translate *t,
4166 const struct tgsi_texture_offset *in_offset)
4167 {
4168 struct tgsi_texture_offset offset;
4169
4170 assert(in_offset->File == PROGRAM_IMMEDIATE);
4171
4172 offset.File = TGSI_FILE_IMMEDIATE;
4173 offset.Index = in_offset->Index;
4174 offset.SwizzleX = in_offset->SwizzleX;
4175 offset.SwizzleY = in_offset->SwizzleY;
4176 offset.SwizzleZ = in_offset->SwizzleZ;
4177
4178 return offset;
4179 }
4180
4181 static void
4182 compile_tgsi_instruction(struct st_translate *t,
4183 const glsl_to_tgsi_instruction *inst,
4184 bool clamp_dst_color_output)
4185 {
4186 struct ureg_program *ureg = t->ureg;
4187 GLuint i;
4188 struct ureg_dst dst[1];
4189 struct ureg_src src[4];
4190 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4191
4192 unsigned num_dst;
4193 unsigned num_src;
4194
4195 num_dst = num_inst_dst_regs(inst->op);
4196 num_src = num_inst_src_regs(inst->op);
4197
4198 if (num_dst)
4199 dst[0] = translate_dst(t,
4200 &inst->dst,
4201 inst->saturate,
4202 clamp_dst_color_output);
4203
4204 for (i = 0; i < num_src; i++)
4205 src[i] = translate_src(t, &inst->src[i]);
4206
4207 switch(inst->op) {
4208 case TGSI_OPCODE_BGNLOOP:
4209 case TGSI_OPCODE_CAL:
4210 case TGSI_OPCODE_ELSE:
4211 case TGSI_OPCODE_ENDLOOP:
4212 case TGSI_OPCODE_IF:
4213 assert(num_dst == 0);
4214 ureg_label_insn(ureg,
4215 inst->op,
4216 src, num_src,
4217 get_label(t,
4218 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4219 return;
4220
4221 case TGSI_OPCODE_TEX:
4222 case TGSI_OPCODE_TXB:
4223 case TGSI_OPCODE_TXD:
4224 case TGSI_OPCODE_TXL:
4225 case TGSI_OPCODE_TXP:
4226 case TGSI_OPCODE_TXQ:
4227 case TGSI_OPCODE_TXF:
4228 src[num_src++] = t->samplers[inst->sampler];
4229 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4230 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4231 }
4232 ureg_tex_insn(ureg,
4233 inst->op,
4234 dst, num_dst,
4235 st_translate_texture_target(inst->tex_target, inst->tex_shadow),
4236 texoffsets, inst->tex_offset_num_offset,
4237 src, num_src);
4238 return;
4239
4240 case TGSI_OPCODE_SCS:
4241 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4242 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4243 break;
4244
4245 default:
4246 ureg_insn(ureg,
4247 inst->op,
4248 dst, num_dst,
4249 src, num_src);
4250 break;
4251 }
4252 }
4253
4254 /**
4255 * Emit the TGSI instructions for inverting and adjusting WPOS.
4256 * This code is unavoidable because it also depends on whether
4257 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4258 */
4259 static void
4260 emit_wpos_adjustment( struct st_translate *t,
4261 const struct gl_program *program,
4262 boolean invert,
4263 GLfloat adjX, GLfloat adjY[2])
4264 {
4265 struct ureg_program *ureg = t->ureg;
4266
4267 /* Fragment program uses fragment position input.
4268 * Need to replace instances of INPUT[WPOS] with temp T
4269 * where T = INPUT[WPOS] by y is inverted.
4270 */
4271 static const gl_state_index wposTransformState[STATE_LENGTH]
4272 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4273 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4274
4275 /* XXX: note we are modifying the incoming shader here! Need to
4276 * do this before emitting the constant decls below, or this
4277 * will be missed:
4278 */
4279 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4280 wposTransformState);
4281
4282 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4283 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4284 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4285
4286 /* First, apply the coordinate shift: */
4287 if (adjX || adjY[0] || adjY[1]) {
4288 if (adjY[0] != adjY[1]) {
4289 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4290 * depending on whether inversion is actually going to be applied
4291 * or not, which is determined by testing against the inversion
4292 * state variable used below, which will be either +1 or -1.
4293 */
4294 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4295
4296 ureg_CMP(ureg, adj_temp,
4297 ureg_scalar(wpostrans, invert ? 2 : 0),
4298 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4299 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4300 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4301 } else {
4302 ureg_ADD(ureg, wpos_temp, wpos_input,
4303 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4304 }
4305 wpos_input = ureg_src(wpos_temp);
4306 } else {
4307 /* MOV wpos_temp, input[wpos]
4308 */
4309 ureg_MOV( ureg, wpos_temp, wpos_input );
4310 }
4311
4312 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4313 * inversion/identity, or the other way around if we're drawing to an FBO.
4314 */
4315 if (invert) {
4316 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4317 */
4318 ureg_MAD( ureg,
4319 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4320 wpos_input,
4321 ureg_scalar(wpostrans, 0),
4322 ureg_scalar(wpostrans, 1));
4323 } else {
4324 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4325 */
4326 ureg_MAD( ureg,
4327 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4328 wpos_input,
4329 ureg_scalar(wpostrans, 2),
4330 ureg_scalar(wpostrans, 3));
4331 }
4332
4333 /* Use wpos_temp as position input from here on:
4334 */
4335 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4336 }
4337
4338
4339 /**
4340 * Emit fragment position/ooordinate code.
4341 */
4342 static void
4343 emit_wpos(struct st_context *st,
4344 struct st_translate *t,
4345 const struct gl_program *program,
4346 struct ureg_program *ureg)
4347 {
4348 const struct gl_fragment_program *fp =
4349 (const struct gl_fragment_program *) program;
4350 struct pipe_screen *pscreen = st->pipe->screen;
4351 GLfloat adjX = 0.0f;
4352 GLfloat adjY[2] = { 0.0f, 0.0f };
4353 boolean invert = FALSE;
4354
4355 /* Query the pixel center conventions supported by the pipe driver and set
4356 * adjX, adjY to help out if it cannot handle the requested one internally.
4357 *
4358 * The bias of the y-coordinate depends on whether y-inversion takes place
4359 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4360 * drawing to an FBO (causes additional inversion), and whether the the pipe
4361 * driver origin and the requested origin differ (the latter condition is
4362 * stored in the 'invert' variable).
4363 *
4364 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4365 *
4366 * center shift only:
4367 * i -> h: +0.5
4368 * h -> i: -0.5
4369 *
4370 * inversion only:
4371 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4372 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4373 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4374 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4375 *
4376 * inversion and center shift:
4377 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4378 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4379 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4380 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4381 */
4382 if (fp->OriginUpperLeft) {
4383 /* Fragment shader wants origin in upper-left */
4384 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4385 /* the driver supports upper-left origin */
4386 }
4387 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4388 /* the driver supports lower-left origin, need to invert Y */
4389 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4390 invert = TRUE;
4391 }
4392 else
4393 assert(0);
4394 }
4395 else {
4396 /* Fragment shader wants origin in lower-left */
4397 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4398 /* the driver supports lower-left origin */
4399 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4400 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4401 /* the driver supports upper-left origin, need to invert Y */
4402 invert = TRUE;
4403 else
4404 assert(0);
4405 }
4406
4407 if (fp->PixelCenterInteger) {
4408 /* Fragment shader wants pixel center integer */
4409 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4410 /* the driver supports pixel center integer */
4411 adjY[1] = 1.0f;
4412 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4413 }
4414 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4415 /* the driver supports pixel center half integer, need to bias X,Y */
4416 adjX = -0.5f;
4417 adjY[0] = -0.5f;
4418 adjY[1] = 0.5f;
4419 }
4420 else
4421 assert(0);
4422 }
4423 else {
4424 /* Fragment shader wants pixel center half integer */
4425 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4426 /* the driver supports pixel center half integer */
4427 }
4428 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4429 /* the driver supports pixel center integer, need to bias X,Y */
4430 adjX = adjY[0] = adjY[1] = 0.5f;
4431 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4432 }
4433 else
4434 assert(0);
4435 }
4436
4437 /* we invert after adjustment so that we avoid the MOV to temporary,
4438 * and reuse the adjustment ADD instead */
4439 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4440 }
4441
4442 /**
4443 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4444 * TGSI uses +1 for front, -1 for back.
4445 * This function converts the TGSI value to the GL value. Simply clamping/
4446 * saturating the value to [0,1] does the job.
4447 */
4448 static void
4449 emit_face_var(struct st_translate *t)
4450 {
4451 struct ureg_program *ureg = t->ureg;
4452 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4453 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4454
4455 /* MOV_SAT face_temp, input[face] */
4456 face_temp = ureg_saturate(face_temp);
4457 ureg_MOV(ureg, face_temp, face_input);
4458
4459 /* Use face_temp as face input from here on: */
4460 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4461 }
4462
4463 static void
4464 emit_edgeflags(struct st_translate *t)
4465 {
4466 struct ureg_program *ureg = t->ureg;
4467 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4468 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4469
4470 ureg_MOV(ureg, edge_dst, edge_src);
4471 }
4472
4473 /**
4474 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4475 * \param program the program to translate
4476 * \param numInputs number of input registers used
4477 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4478 * input indexes
4479 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4480 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4481 * each input
4482 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4483 * \param numOutputs number of output registers used
4484 * \param outputMapping maps Mesa fragment program outputs to TGSI
4485 * generic outputs
4486 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4487 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4488 * each output
4489 *
4490 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4491 */
4492 extern "C" enum pipe_error
4493 st_translate_program(
4494 struct gl_context *ctx,
4495 uint procType,
4496 struct ureg_program *ureg,
4497 glsl_to_tgsi_visitor *program,
4498 const struct gl_program *proginfo,
4499 GLuint numInputs,
4500 const GLuint inputMapping[],
4501 const ubyte inputSemanticName[],
4502 const ubyte inputSemanticIndex[],
4503 const GLuint interpMode[],
4504 const GLboolean is_centroid[],
4505 GLuint numOutputs,
4506 const GLuint outputMapping[],
4507 const ubyte outputSemanticName[],
4508 const ubyte outputSemanticIndex[],
4509 boolean passthrough_edgeflags,
4510 boolean clamp_color)
4511 {
4512 struct st_translate *t;
4513 unsigned i;
4514 enum pipe_error ret = PIPE_OK;
4515
4516 assert(numInputs <= Elements(t->inputs));
4517 assert(numOutputs <= Elements(t->outputs));
4518
4519 t = CALLOC_STRUCT(st_translate);
4520 if (!t) {
4521 ret = PIPE_ERROR_OUT_OF_MEMORY;
4522 goto out;
4523 }
4524
4525 memset(t, 0, sizeof *t);
4526
4527 t->procType = procType;
4528 t->inputMapping = inputMapping;
4529 t->outputMapping = outputMapping;
4530 t->ureg = ureg;
4531
4532 if (program->shader_program) {
4533 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4534 struct gl_uniform_storage *const storage =
4535 &program->shader_program->UniformStorage[i];
4536
4537 _mesa_uniform_detach_all_driver_storage(storage);
4538 }
4539 }
4540
4541 /*
4542 * Declare input attributes.
4543 */
4544 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4545 for (i = 0; i < numInputs; i++) {
4546 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4547 inputSemanticName[i],
4548 inputSemanticIndex[i],
4549 interpMode[i], 0,
4550 is_centroid[i]);
4551 }
4552
4553 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4554 /* Must do this after setting up t->inputs, and before
4555 * emitting constant references, below:
4556 */
4557 emit_wpos(st_context(ctx), t, proginfo, ureg);
4558 }
4559
4560 if (proginfo->InputsRead & FRAG_BIT_FACE)
4561 emit_face_var(t);
4562
4563 /*
4564 * Declare output attributes.
4565 */
4566 for (i = 0; i < numOutputs; i++) {
4567 switch (outputSemanticName[i]) {
4568 case TGSI_SEMANTIC_POSITION:
4569 t->outputs[i] = ureg_DECL_output(ureg,
4570 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4571 outputSemanticIndex[i]);
4572 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4573 break;
4574 case TGSI_SEMANTIC_STENCIL:
4575 t->outputs[i] = ureg_DECL_output(ureg,
4576 TGSI_SEMANTIC_STENCIL, /* Stencil */
4577 outputSemanticIndex[i]);
4578 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4579 break;
4580 case TGSI_SEMANTIC_COLOR:
4581 t->outputs[i] = ureg_DECL_output(ureg,
4582 TGSI_SEMANTIC_COLOR,
4583 outputSemanticIndex[i]);
4584 break;
4585 default:
4586 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4587 ret = PIPE_ERROR_BAD_INPUT;
4588 goto out;
4589 }
4590 }
4591 }
4592 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4593 for (i = 0; i < numInputs; i++) {
4594 t->inputs[i] = ureg_DECL_gs_input(ureg,
4595 i,
4596 inputSemanticName[i],
4597 inputSemanticIndex[i]);
4598 }
4599
4600 for (i = 0; i < numOutputs; i++) {
4601 t->outputs[i] = ureg_DECL_output(ureg,
4602 outputSemanticName[i],
4603 outputSemanticIndex[i]);
4604 }
4605 }
4606 else {
4607 assert(procType == TGSI_PROCESSOR_VERTEX);
4608
4609 for (i = 0; i < numInputs; i++) {
4610 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4611 }
4612
4613 for (i = 0; i < numOutputs; i++) {
4614 t->outputs[i] = ureg_DECL_output(ureg,
4615 outputSemanticName[i],
4616 outputSemanticIndex[i]);
4617 }
4618 if (passthrough_edgeflags)
4619 emit_edgeflags(t);
4620 }
4621
4622 /* Declare address register.
4623 */
4624 if (program->num_address_regs > 0) {
4625 assert(program->num_address_regs == 1);
4626 t->address[0] = ureg_DECL_address(ureg);
4627 }
4628
4629 /* Declare misc input registers
4630 */
4631 {
4632 GLbitfield sysInputs = proginfo->SystemValuesRead;
4633 unsigned numSys = 0;
4634 for (i = 0; sysInputs; i++) {
4635 if (sysInputs & (1 << i)) {
4636 unsigned semName = mesa_sysval_to_semantic[i];
4637 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4638 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4639 semName == TGSI_SEMANTIC_VERTEXID) {
4640 /* From Gallium perspective, these system values are always
4641 * integer, and require native integer support. However, if
4642 * native integer is supported on the vertex stage but not the
4643 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4644 * assumes these system values are floats. To resolve the
4645 * inconsistency, we insert a U2F.
4646 */
4647 struct st_context *st = st_context(ctx);
4648 struct pipe_screen *pscreen = st->pipe->screen;
4649 assert(procType == TGSI_PROCESSOR_VERTEX);
4650 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4651 if (!ctx->Const.NativeIntegers) {
4652 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4653 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4654 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4655 }
4656 }
4657 numSys++;
4658 sysInputs &= ~(1 << i);
4659 }
4660 }
4661 }
4662
4663 if (program->indirect_addr_temps) {
4664 /* If temps are accessed with indirect addressing, declare temporaries
4665 * in sequential order. Else, we declare them on demand elsewhere.
4666 * (Note: the number of temporaries is equal to program->next_temp)
4667 */
4668 for (i = 0; i < (unsigned)program->next_temp; i++) {
4669 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4670 t->temps[i] = ureg_DECL_local_temporary(t->ureg);
4671 }
4672 }
4673
4674 /* Emit constants and uniforms. TGSI uses a single index space for these,
4675 * so we put all the translated regs in t->constants.
4676 */
4677 if (proginfo->Parameters) {
4678 t->constants = (struct ureg_src *)CALLOC(proginfo->Parameters->NumParameters * sizeof(t->constants[0]));
4679 if (t->constants == NULL) {
4680 ret = PIPE_ERROR_OUT_OF_MEMORY;
4681 goto out;
4682 }
4683
4684 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4685 switch (proginfo->Parameters->Parameters[i].Type) {
4686 case PROGRAM_ENV_PARAM:
4687 case PROGRAM_LOCAL_PARAM:
4688 case PROGRAM_STATE_VAR:
4689 case PROGRAM_NAMED_PARAM:
4690 case PROGRAM_UNIFORM:
4691 t->constants[i] = ureg_DECL_constant(ureg, i);
4692 break;
4693
4694 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4695 * addressing of the const buffer.
4696 * FIXME: Be smarter and recognize param arrays:
4697 * indirect addressing is only valid within the referenced
4698 * array.
4699 */
4700 case PROGRAM_CONSTANT:
4701 if (program->indirect_addr_consts)
4702 t->constants[i] = ureg_DECL_constant(ureg, i);
4703 else
4704 t->constants[i] = emit_immediate(t,
4705 proginfo->Parameters->ParameterValues[i],
4706 proginfo->Parameters->Parameters[i].DataType,
4707 4);
4708 break;
4709 default:
4710 break;
4711 }
4712 }
4713 }
4714
4715 /* Emit immediate values.
4716 */
4717 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src));
4718 if (t->immediates == NULL) {
4719 ret = PIPE_ERROR_OUT_OF_MEMORY;
4720 goto out;
4721 }
4722 i = 0;
4723 foreach_iter(exec_list_iterator, iter, program->immediates) {
4724 immediate_storage *imm = (immediate_storage *)iter.get();
4725 assert(i < program->num_immediates);
4726 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4727 }
4728 assert(i == program->num_immediates);
4729
4730 /* texture samplers */
4731 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4732 if (program->samplers_used & (1 << i)) {
4733 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4734 }
4735 }
4736
4737 /* Emit each instruction in turn:
4738 */
4739 foreach_iter(exec_list_iterator, iter, program->instructions) {
4740 set_insn_start(t, ureg_get_instruction_number(ureg));
4741 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4742 clamp_color);
4743 }
4744
4745 /* Fix up all emitted labels:
4746 */
4747 for (i = 0; i < t->labels_count; i++) {
4748 ureg_fixup_label(ureg, t->labels[i].token,
4749 t->insn[t->labels[i].branch_target]);
4750 }
4751
4752 if (program->shader_program) {
4753 /* This has to be done last. Any operation the can cause
4754 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4755 * program constant) has to happen before creating this linkage.
4756 */
4757 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4758 if (program->shader_program->_LinkedShaders[i] == NULL)
4759 continue;
4760
4761 _mesa_associate_uniform_storage(ctx, program->shader_program,
4762 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4763 }
4764 }
4765
4766 out:
4767 if (t) {
4768 FREE(t->insn);
4769 FREE(t->labels);
4770 FREE(t->constants);
4771 FREE(t->immediates);
4772
4773 if (t->error) {
4774 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4775 }
4776
4777 FREE(t);
4778 }
4779
4780 return ret;
4781 }
4782 /* ----------------------------- End TGSI code ------------------------------ */
4783
4784 /**
4785 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4786 * generating Mesa IR.
4787 */
4788 static struct gl_program *
4789 get_mesa_program(struct gl_context *ctx,
4790 struct gl_shader_program *shader_program,
4791 struct gl_shader *shader)
4792 {
4793 glsl_to_tgsi_visitor* v = new glsl_to_tgsi_visitor();
4794 struct gl_program *prog;
4795 GLenum target;
4796 const char *target_string;
4797 bool progress;
4798 struct gl_shader_compiler_options *options =
4799 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4800
4801 switch (shader->Type) {
4802 case GL_VERTEX_SHADER:
4803 target = GL_VERTEX_PROGRAM_ARB;
4804 target_string = "vertex";
4805 break;
4806 case GL_FRAGMENT_SHADER:
4807 target = GL_FRAGMENT_PROGRAM_ARB;
4808 target_string = "fragment";
4809 break;
4810 case GL_GEOMETRY_SHADER:
4811 target = GL_GEOMETRY_PROGRAM_NV;
4812 target_string = "geometry";
4813 break;
4814 default:
4815 assert(!"should not be reached");
4816 return NULL;
4817 }
4818
4819 validate_ir_tree(shader->ir);
4820
4821 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4822 if (!prog)
4823 return NULL;
4824 prog->Parameters = _mesa_new_parameter_list();
4825 v->ctx = ctx;
4826 v->prog = prog;
4827 v->shader_program = shader_program;
4828 v->options = options;
4829 v->glsl_version = ctx->Const.GLSLVersion;
4830 v->native_integers = ctx->Const.NativeIntegers;
4831
4832 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4833 prog->Parameters);
4834
4835 /* Remove reads from output registers. */
4836 lower_output_reads(shader->ir);
4837
4838 /* Emit intermediate IR for main(). */
4839 visit_exec_list(shader->ir, v);
4840
4841 /* Now emit bodies for any functions that were used. */
4842 do {
4843 progress = GL_FALSE;
4844
4845 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4846 function_entry *entry = (function_entry *)iter.get();
4847
4848 if (!entry->bgn_inst) {
4849 v->current_function = entry;
4850
4851 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
4852 entry->bgn_inst->function = entry;
4853
4854 visit_exec_list(&entry->sig->body, v);
4855
4856 glsl_to_tgsi_instruction *last;
4857 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
4858 if (last->op != TGSI_OPCODE_RET)
4859 v->emit(NULL, TGSI_OPCODE_RET);
4860
4861 glsl_to_tgsi_instruction *end;
4862 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
4863 end->function = entry;
4864
4865 progress = GL_TRUE;
4866 }
4867 }
4868 } while (progress);
4869
4870 #if 0
4871 /* Print out some information (for debugging purposes) used by the
4872 * optimization passes. */
4873 for (i=0; i < v->next_temp; i++) {
4874 int fr = v->get_first_temp_read(i);
4875 int fw = v->get_first_temp_write(i);
4876 int lr = v->get_last_temp_read(i);
4877 int lw = v->get_last_temp_write(i);
4878
4879 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
4880 assert(fw <= fr);
4881 }
4882 #endif
4883
4884 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4885 v->simplify_cmp();
4886 v->copy_propagate();
4887 while (v->eliminate_dead_code_advanced());
4888
4889 /* FIXME: These passes to optimize temporary registers don't work when there
4890 * is indirect addressing of the temporary register space. We need proper
4891 * array support so that we don't have to give up these passes in every
4892 * shader that uses arrays.
4893 */
4894 if (!v->indirect_addr_temps) {
4895 v->eliminate_dead_code();
4896 v->merge_registers();
4897 v->renumber_registers();
4898 }
4899
4900 /* Write the END instruction. */
4901 v->emit(NULL, TGSI_OPCODE_END);
4902
4903 if (ctx->Shader.Flags & GLSL_DUMP) {
4904 printf("\n");
4905 printf("GLSL IR for linked %s program %d:\n", target_string,
4906 shader_program->Name);
4907 _mesa_print_ir(shader->ir, NULL);
4908 printf("\n");
4909 printf("\n");
4910 fflush(stdout);
4911 }
4912
4913 prog->Instructions = NULL;
4914 prog->NumInstructions = 0;
4915
4916 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
4917 count_resources(v, prog);
4918
4919 _mesa_reference_program(ctx, &shader->Program, prog);
4920
4921 /* This has to be done last. Any operation the can cause
4922 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4923 * program constant) has to happen before creating this linkage.
4924 */
4925 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
4926 if (!shader_program->LinkStatus) {
4927 return NULL;
4928 }
4929
4930 struct st_vertex_program *stvp;
4931 struct st_fragment_program *stfp;
4932 struct st_geometry_program *stgp;
4933
4934 switch (shader->Type) {
4935 case GL_VERTEX_SHADER:
4936 stvp = (struct st_vertex_program *)prog;
4937 stvp->glsl_to_tgsi = v;
4938 break;
4939 case GL_FRAGMENT_SHADER:
4940 stfp = (struct st_fragment_program *)prog;
4941 stfp->glsl_to_tgsi = v;
4942 break;
4943 case GL_GEOMETRY_SHADER:
4944 stgp = (struct st_geometry_program *)prog;
4945 stgp->glsl_to_tgsi = v;
4946 break;
4947 default:
4948 assert(!"should not be reached");
4949 return NULL;
4950 }
4951
4952 return prog;
4953 }
4954
4955 extern "C" {
4956
4957 struct gl_shader *
4958 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
4959 {
4960 struct gl_shader *shader;
4961 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
4962 type == GL_GEOMETRY_SHADER_ARB);
4963 shader = rzalloc(NULL, struct gl_shader);
4964 if (shader) {
4965 shader->Type = type;
4966 shader->Name = name;
4967 _mesa_init_shader(ctx, shader);
4968 }
4969 return shader;
4970 }
4971
4972 struct gl_shader_program *
4973 st_new_shader_program(struct gl_context *ctx, GLuint name)
4974 {
4975 struct gl_shader_program *shProg;
4976 shProg = rzalloc(NULL, struct gl_shader_program);
4977 if (shProg) {
4978 shProg->Name = name;
4979 _mesa_init_shader_program(ctx, shProg);
4980 }
4981 return shProg;
4982 }
4983
4984 /**
4985 * Link a shader.
4986 * Called via ctx->Driver.LinkShader()
4987 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
4988 * with code lowering and other optimizations.
4989 */
4990 GLboolean
4991 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
4992 {
4993 assert(prog->LinkStatus);
4994
4995 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4996 if (prog->_LinkedShaders[i] == NULL)
4997 continue;
4998
4999 bool progress;
5000 exec_list *ir = prog->_LinkedShaders[i]->ir;
5001 const struct gl_shader_compiler_options *options =
5002 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5003
5004 do {
5005 unsigned what_to_lower = MOD_TO_FRACT | DIV_TO_MUL_RCP |
5006 EXP_TO_EXP2 | LOG_TO_LOG2;
5007 if (options->EmitNoPow)
5008 what_to_lower |= POW_TO_EXP2;
5009 if (!ctx->Const.NativeIntegers)
5010 what_to_lower |= INT_DIV_TO_MUL_RCP;
5011
5012 progress = false;
5013
5014 /* Lowering */
5015 do_mat_op_to_vec(ir);
5016 lower_instructions(ir, what_to_lower);
5017
5018 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5019
5020 progress = do_common_optimization(ir, true, true,
5021 options->MaxUnrollIterations)
5022 || progress;
5023
5024 progress = lower_quadop_vector(ir, false) || progress;
5025
5026 if (options->MaxIfDepth == 0)
5027 progress = lower_discard(ir) || progress;
5028
5029 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5030
5031 if (options->EmitNoNoise)
5032 progress = lower_noise(ir) || progress;
5033
5034 /* If there are forms of indirect addressing that the driver
5035 * cannot handle, perform the lowering pass.
5036 */
5037 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
5038 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
5039 progress =
5040 lower_variable_index_to_cond_assign(ir,
5041 options->EmitNoIndirectInput,
5042 options->EmitNoIndirectOutput,
5043 options->EmitNoIndirectTemp,
5044 options->EmitNoIndirectUniform)
5045 || progress;
5046
5047 progress = do_vec_index_to_cond_assign(ir) || progress;
5048 } while (progress);
5049
5050 validate_ir_tree(ir);
5051 }
5052
5053 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5054 struct gl_program *linked_prog;
5055
5056 if (prog->_LinkedShaders[i] == NULL)
5057 continue;
5058
5059 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5060
5061 if (linked_prog) {
5062 static const GLenum targets[] = {
5063 GL_VERTEX_PROGRAM_ARB,
5064 GL_FRAGMENT_PROGRAM_ARB,
5065 GL_GEOMETRY_PROGRAM_NV
5066 };
5067
5068 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5069 linked_prog);
5070 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5071 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5072 NULL);
5073 _mesa_reference_program(ctx, &linked_prog, NULL);
5074 return GL_FALSE;
5075 }
5076 }
5077
5078 _mesa_reference_program(ctx, &linked_prog, NULL);
5079 }
5080
5081 return GL_TRUE;
5082 }
5083
5084 void
5085 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5086 const GLuint outputMapping[],
5087 struct pipe_stream_output_info *so)
5088 {
5089 unsigned i;
5090 struct gl_transform_feedback_info *info =
5091 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5092
5093 for (i = 0; i < info->NumOutputs; i++) {
5094 so->output[i].register_index =
5095 outputMapping[info->Outputs[i].OutputRegister];
5096 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5097 so->output[i].num_components = info->Outputs[i].NumComponents;
5098 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5099 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5100 }
5101
5102 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5103 so->stride[i] = info->BufferStride[i];
5104 }
5105 so->num_outputs = info->NumOutputs;
5106 }
5107
5108 } /* extern "C" */