2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of temporary registers.
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
83 #define MAX_TEMPS 4096
86 * Maximum number of arrays
88 #define MAX_ARRAYS 256
90 #define MAX_GLSL_TEXTURE_OFFSET 4
95 static int swizzle_for_size(int size
);
98 * This struct is a corresponding struct to TGSI ureg_src.
102 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
106 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
107 this->swizzle
= swizzle_for_size(type
->vector_elements
);
109 this->swizzle
= SWIZZLE_XYZW
;
112 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
113 this->reladdr
= NULL
;
114 this->reladdr2
= NULL
;
115 this->has_index2
= false;
118 st_src_reg(gl_register_file file
, int index
, int type
)
124 this->swizzle
= SWIZZLE_XYZW
;
126 this->reladdr
= NULL
;
127 this->reladdr2
= NULL
;
128 this->has_index2
= false;
131 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
136 this->index2D
= index2D
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= NULL
;
140 this->reladdr2
= NULL
;
141 this->has_index2
= false;
146 this->type
= GLSL_TYPE_ERROR
;
147 this->file
= PROGRAM_UNDEFINED
;
152 this->reladdr
= NULL
;
153 this->reladdr2
= NULL
;
154 this->has_index2
= false;
157 explicit st_src_reg(st_dst_reg reg
);
159 gl_register_file file
; /**< PROGRAM_* from Mesa */
160 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate
; /**< NEGATE_XYZW mask from mesa */
164 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
167 st_src_reg
*reladdr2
;
173 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
177 this->writemask
= writemask
;
178 this->cond_mask
= COND_TR
;
179 this->reladdr
= NULL
;
183 st_dst_reg(gl_register_file file
, int writemask
, int type
)
187 this->writemask
= writemask
;
188 this->cond_mask
= COND_TR
;
189 this->reladdr
= NULL
;
195 this->type
= GLSL_TYPE_ERROR
;
196 this->file
= PROGRAM_UNDEFINED
;
199 this->cond_mask
= COND_TR
;
200 this->reladdr
= NULL
;
203 explicit st_dst_reg(st_src_reg reg
);
205 gl_register_file file
; /**< PROGRAM_* from Mesa */
206 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
209 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
214 st_src_reg::st_src_reg(st_dst_reg reg
)
216 this->type
= reg
.type
;
217 this->file
= reg
.file
;
218 this->index
= reg
.index
;
219 this->swizzle
= SWIZZLE_XYZW
;
221 this->reladdr
= reg
.reladdr
;
223 this->reladdr2
= NULL
;
224 this->has_index2
= false;
227 st_dst_reg::st_dst_reg(st_src_reg reg
)
229 this->type
= reg
.type
;
230 this->file
= reg
.file
;
231 this->index
= reg
.index
;
232 this->writemask
= WRITEMASK_XYZW
;
233 this->cond_mask
= COND_TR
;
234 this->reladdr
= reg
.reladdr
;
237 class glsl_to_tgsi_instruction
: public exec_node
{
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
244 /** Pointer to the ir source this tree came from for debugging */
246 GLboolean cond_update
;
248 int sampler
; /**< sampler index */
249 int tex_target
; /**< One of TEXTURE_*_INDEX */
250 GLboolean tex_shadow
;
252 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
253 unsigned tex_offset_num_offset
;
254 int dead_mask
; /**< Used in dead code elimination */
256 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
259 class variable_storage
: public exec_node
{
261 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
262 : file(file
), index(index
), var(var
)
267 gl_register_file file
;
269 ir_variable
*var
; /* variable that maps to this, if any */
272 class immediate_storage
: public exec_node
{
274 immediate_storage(gl_constant_value
*values
, int size
, int type
)
276 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
281 gl_constant_value values
[4];
282 int size
; /**< Number of components (1-4) */
283 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
286 class function_entry
: public exec_node
{
288 ir_function_signature
*sig
;
291 * identifier of this function signature used by the program.
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
301 * Pointer to first instruction of the function body.
303 * Set during function body emits after main() is processed.
305 glsl_to_tgsi_instruction
*bgn_inst
;
308 * Index of the first instruction of the function body in actual TGSI.
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
314 /** Storage for the return value. */
315 st_src_reg return_reg
;
318 struct glsl_to_tgsi_visitor
: public ir_visitor
{
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
323 function_entry
*current_function
;
325 struct gl_context
*ctx
;
326 struct gl_program
*prog
;
327 struct gl_shader_program
*shader_program
;
328 struct gl_shader_compiler_options
*options
;
332 unsigned array_sizes
[MAX_ARRAYS
];
335 int num_address_regs
;
337 bool indirect_addr_consts
;
340 bool native_integers
;
343 variable_storage
*find_variable_storage(ir_variable
*var
);
345 int add_constant(gl_register_file file
, gl_constant_value values
[4],
346 int size
, int datatype
, GLuint
*swizzle_out
);
348 function_entry
*get_function_signature(ir_function_signature
*sig
);
350 st_src_reg
get_temp(const glsl_type
*type
);
351 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
353 st_src_reg
st_src_reg_for_float(float val
);
354 st_src_reg
st_src_reg_for_int(int val
);
355 st_src_reg
st_src_reg_for_type(int type
, int val
);
358 * \name Visit methods
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
365 virtual void visit(ir_variable
*);
366 virtual void visit(ir_loop
*);
367 virtual void visit(ir_loop_jump
*);
368 virtual void visit(ir_function_signature
*);
369 virtual void visit(ir_function
*);
370 virtual void visit(ir_expression
*);
371 virtual void visit(ir_swizzle
*);
372 virtual void visit(ir_dereference_variable
*);
373 virtual void visit(ir_dereference_array
*);
374 virtual void visit(ir_dereference_record
*);
375 virtual void visit(ir_assignment
*);
376 virtual void visit(ir_constant
*);
377 virtual void visit(ir_call
*);
378 virtual void visit(ir_return
*);
379 virtual void visit(ir_discard
*);
380 virtual void visit(ir_texture
*);
381 virtual void visit(ir_if
*);
382 virtual void visit(ir_emit_vertex
*);
383 virtual void visit(ir_end_primitive
*);
388 /** List of variable_storage */
391 /** List of immediate_storage */
392 exec_list immediates
;
393 unsigned num_immediates
;
395 /** List of function_entry */
396 exec_list function_signatures
;
397 int next_signature_id
;
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions
;
402 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
404 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
405 st_dst_reg dst
, st_src_reg src0
);
407 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
408 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
410 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
412 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
414 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
416 st_src_reg src0
, st_src_reg src1
,
417 st_src_reg src2
, st_src_reg src3
);
419 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
421 st_src_reg src0
, st_src_reg src1
);
424 * Emit the correct dot-product instruction for the type of arguments
426 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
432 void emit_scalar(ir_instruction
*ir
, unsigned op
,
433 st_dst_reg dst
, st_src_reg src0
);
435 void emit_scalar(ir_instruction
*ir
, unsigned op
,
436 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
438 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
440 void emit_scs(ir_instruction
*ir
, unsigned op
,
441 st_dst_reg dst
, const st_src_reg
&src
);
443 bool try_emit_mad(ir_expression
*ir
,
445 bool try_emit_mad_for_and_not(ir_expression
*ir
,
447 bool try_emit_sat(ir_expression
*ir
);
449 void emit_swz(ir_expression
*ir
);
451 bool process_move_condition(ir_rvalue
*ir
);
453 void simplify_cmp(void);
455 void rename_temp_register(int index
, int new_index
);
456 int get_first_temp_read(int index
);
457 int get_first_temp_write(int index
);
458 int get_last_temp_read(int index
);
459 int get_last_temp_write(int index
);
461 void copy_propagate(void);
462 int eliminate_dead_code(void);
463 void merge_registers(void);
464 void renumber_registers(void);
466 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
467 st_dst_reg
*l
, st_src_reg
*r
);
472 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
474 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
476 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
477 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
480 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
483 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
487 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
490 prog
->LinkStatus
= GL_FALSE
;
494 swizzle_for_size(int size
)
496 int size_swizzles
[4] = {
497 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
498 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
499 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
500 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
503 assert((size
>= 1) && (size
<= 4));
504 return size_swizzles
[size
- 1];
508 is_tex_instruction(unsigned opcode
)
510 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
515 num_inst_dst_regs(unsigned opcode
)
517 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
518 return info
->num_dst
;
522 num_inst_src_regs(unsigned opcode
)
524 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
525 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
528 glsl_to_tgsi_instruction
*
529 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
531 st_src_reg src0
, st_src_reg src1
,
532 st_src_reg src2
, st_src_reg src3
)
534 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
535 int num_reladdr
= 0, i
;
537 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
539 /* If we have to do relative addressing, we want to load the ARL
540 * reg directly for one of the regs, and preload the other reladdr
541 * sources into temps.
543 num_reladdr
+= dst
.reladdr
!= NULL
;
544 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
545 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
546 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
547 num_reladdr
+= src3
.reladdr
!= NULL
|| src3
.reladdr2
!= NULL
;
549 reladdr_to_temp(ir
, &src3
, &num_reladdr
);
550 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
551 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
552 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
555 emit_arl(ir
, address_reg
, *dst
.reladdr
);
558 assert(num_reladdr
== 0);
569 inst
->function
= NULL
;
571 /* Update indirect addressing status used by TGSI */
574 case PROGRAM_STATE_VAR
:
575 case PROGRAM_CONSTANT
:
576 case PROGRAM_UNIFORM
:
577 this->indirect_addr_consts
= true;
579 case PROGRAM_IMMEDIATE
:
580 assert(!"immediates should not have indirect addressing");
587 for (i
=0; i
<4; i
++) {
588 if(inst
->src
[i
].reladdr
) {
589 switch(inst
->src
[i
].file
) {
590 case PROGRAM_STATE_VAR
:
591 case PROGRAM_CONSTANT
:
592 case PROGRAM_UNIFORM
:
593 this->indirect_addr_consts
= true;
595 case PROGRAM_IMMEDIATE
:
596 assert(!"immediates should not have indirect addressing");
605 this->instructions
.push_tail(inst
);
610 glsl_to_tgsi_instruction
*
611 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
612 st_dst_reg dst
, st_src_reg src0
,
613 st_src_reg src1
, st_src_reg src2
)
615 return emit(ir
, op
, dst
, src0
, src1
, src2
, undef_src
);
618 glsl_to_tgsi_instruction
*
619 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
620 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
622 return emit(ir
, op
, dst
, src0
, src1
, undef_src
, undef_src
);
625 glsl_to_tgsi_instruction
*
626 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
627 st_dst_reg dst
, st_src_reg src0
)
629 assert(dst
.writemask
!= 0);
630 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
, undef_src
);
633 glsl_to_tgsi_instruction
*
634 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
636 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
, undef_src
);
640 * Determines whether to use an integer, unsigned integer, or float opcode
641 * based on the operands and input opcode, then emits the result.
644 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
646 st_src_reg src0
, st_src_reg src1
)
648 int type
= GLSL_TYPE_FLOAT
;
650 if (op
== TGSI_OPCODE_MOV
)
653 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
654 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
655 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
656 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
658 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
659 type
= GLSL_TYPE_FLOAT
;
660 else if (native_integers
)
661 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
663 #define case4(c, f, i, u) \
664 case TGSI_OPCODE_##c: \
665 if (type == GLSL_TYPE_INT) \
666 op = TGSI_OPCODE_##i; \
667 else if (type == GLSL_TYPE_UINT) \
668 op = TGSI_OPCODE_##u; \
670 op = TGSI_OPCODE_##f; \
673 #define case3(f, i, u) case4(f, f, i, u)
674 #define case2fi(f, i) case4(f, f, i, i)
675 #define case2iu(i, u) case4(i, LAST, i, u)
677 #define casecomp(c, f, i, u) \
678 case TGSI_OPCODE_##c: \
679 if (type == GLSL_TYPE_INT) \
680 op = TGSI_OPCODE_##i; \
681 else if (type == GLSL_TYPE_UINT) \
682 op = TGSI_OPCODE_##u; \
683 else if (native_integers) \
684 op = TGSI_OPCODE_##f; \
686 op = TGSI_OPCODE_##c; \
693 case3(DIV
, IDIV
, UDIV
);
694 case3(MAX
, IMAX
, UMAX
);
695 case3(MIN
, IMIN
, UMIN
);
698 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
699 casecomp(SNE
, FSNE
, USNE
, USNE
);
700 casecomp(SGE
, FSGE
, ISGE
, USGE
);
701 casecomp(SLT
, FSLT
, ISLT
, USLT
);
706 case3(ABS
, IABS
, IABS
);
710 case2iu(IMUL_HI
, UMUL_HI
);
714 assert(op
!= TGSI_OPCODE_LAST
);
718 glsl_to_tgsi_instruction
*
719 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
720 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
723 static const unsigned dot_opcodes
[] = {
724 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
727 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
731 * Emits TGSI scalar opcodes to produce unique answers across channels.
733 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
734 * channel determines the result across all channels. So to do a vec4
735 * of this operation, we want to emit a scalar per source channel used
736 * to produce dest channels.
739 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
741 st_src_reg orig_src0
, st_src_reg orig_src1
)
744 int done_mask
= ~dst
.writemask
;
746 /* TGSI RCP is a scalar operation splatting results to all channels,
747 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
750 for (i
= 0; i
< 4; i
++) {
751 GLuint this_mask
= (1 << i
);
752 glsl_to_tgsi_instruction
*inst
;
753 st_src_reg src0
= orig_src0
;
754 st_src_reg src1
= orig_src1
;
756 if (done_mask
& this_mask
)
759 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
760 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
761 for (j
= i
+ 1; j
< 4; j
++) {
762 /* If there is another enabled component in the destination that is
763 * derived from the same inputs, generate its value on this pass as
766 if (!(done_mask
& (1 << j
)) &&
767 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
768 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
769 this_mask
|= (1 << j
);
772 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
773 src0_swiz
, src0_swiz
);
774 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
775 src1_swiz
, src1_swiz
);
777 inst
= emit(ir
, op
, dst
, src0
, src1
);
778 inst
->dst
.writemask
= this_mask
;
779 done_mask
|= this_mask
;
784 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
785 st_dst_reg dst
, st_src_reg src0
)
787 st_src_reg undef
= undef_src
;
789 undef
.swizzle
= SWIZZLE_XXXX
;
791 emit_scalar(ir
, op
, dst
, src0
, undef
);
795 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
796 st_dst_reg dst
, st_src_reg src0
)
798 int op
= TGSI_OPCODE_ARL
;
800 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
801 op
= TGSI_OPCODE_UARL
;
803 assert(dst
.file
== PROGRAM_ADDRESS
);
804 if (dst
.index
>= this->num_address_regs
)
805 this->num_address_regs
= dst
.index
+ 1;
807 emit(NULL
, op
, dst
, src0
);
811 * Emit an TGSI_OPCODE_SCS instruction
813 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
814 * Instead of splatting its result across all four components of the
815 * destination, it writes one value to the \c x component and another value to
816 * the \c y component.
818 * \param ir IR instruction being processed
819 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
820 * on which value is desired.
821 * \param dst Destination register
822 * \param src Source register
825 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
827 const st_src_reg
&src
)
829 /* Vertex programs cannot use the SCS opcode.
831 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
832 emit_scalar(ir
, op
, dst
, src
);
836 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
837 const unsigned scs_mask
= (1U << component
);
838 int done_mask
= ~dst
.writemask
;
841 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
843 /* If there are compnents in the destination that differ from the component
844 * that will be written by the SCS instrution, we'll need a temporary.
846 if (scs_mask
!= unsigned(dst
.writemask
)) {
847 tmp
= get_temp(glsl_type::vec4_type
);
850 for (unsigned i
= 0; i
< 4; i
++) {
851 unsigned this_mask
= (1U << i
);
852 st_src_reg src0
= src
;
854 if ((done_mask
& this_mask
) != 0)
857 /* The source swizzle specified which component of the source generates
858 * sine / cosine for the current component in the destination. The SCS
859 * instruction requires that this value be swizzle to the X component.
860 * Replace the current swizzle with a swizzle that puts the source in
863 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
865 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
866 src0_swiz
, src0_swiz
);
867 for (unsigned j
= i
+ 1; j
< 4; j
++) {
868 /* If there is another enabled component in the destination that is
869 * derived from the same inputs, generate its value on this pass as
872 if (!(done_mask
& (1 << j
)) &&
873 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
874 this_mask
|= (1 << j
);
878 if (this_mask
!= scs_mask
) {
879 glsl_to_tgsi_instruction
*inst
;
880 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
882 /* Emit the SCS instruction.
884 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
885 inst
->dst
.writemask
= scs_mask
;
887 /* Move the result of the SCS instruction to the desired location in
890 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
891 component
, component
);
892 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
893 inst
->dst
.writemask
= this_mask
;
895 /* Emit the SCS instruction to write directly to the destination.
897 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
898 inst
->dst
.writemask
= scs_mask
;
901 done_mask
|= this_mask
;
906 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
907 gl_constant_value values
[4], int size
, int datatype
,
910 if (file
== PROGRAM_CONSTANT
) {
911 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
912 size
, datatype
, swizzle_out
);
915 immediate_storage
*entry
;
916 assert(file
== PROGRAM_IMMEDIATE
);
918 /* Search immediate storage to see if we already have an identical
919 * immediate that we can use instead of adding a duplicate entry.
921 foreach_list(node
, &this->immediates
) {
922 entry
= (immediate_storage
*) node
;
924 if (entry
->size
== size
&&
925 entry
->type
== datatype
&&
926 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
932 /* Add this immediate to the list. */
933 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
934 this->immediates
.push_tail(entry
);
935 this->num_immediates
++;
941 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
943 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
944 union gl_constant_value uval
;
947 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
953 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
955 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
956 union gl_constant_value uval
;
958 assert(native_integers
);
961 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
967 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
970 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
971 st_src_reg_for_int(val
);
973 return st_src_reg_for_float(val
);
977 type_size(const struct glsl_type
*type
)
982 switch (type
->base_type
) {
985 case GLSL_TYPE_FLOAT
:
987 if (type
->is_matrix()) {
988 return type
->matrix_columns
;
990 /* Regardless of size of vector, it gets a vec4. This is bad
991 * packing for things like floats, but otherwise arrays become a
992 * mess. Hopefully a later pass over the code can pack scalars
993 * down if appropriate.
997 case GLSL_TYPE_ARRAY
:
998 assert(type
->length
> 0);
999 return type_size(type
->fields
.array
) * type
->length
;
1000 case GLSL_TYPE_STRUCT
:
1002 for (i
= 0; i
< type
->length
; i
++) {
1003 size
+= type_size(type
->fields
.structure
[i
].type
);
1006 case GLSL_TYPE_SAMPLER
:
1007 case GLSL_TYPE_IMAGE
:
1008 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1012 case GLSL_TYPE_ATOMIC_UINT
:
1013 case GLSL_TYPE_INTERFACE
:
1014 case GLSL_TYPE_VOID
:
1015 case GLSL_TYPE_ERROR
:
1016 assert(!"Invalid type in type_size");
1023 * In the initial pass of codegen, we assign temporary numbers to
1024 * intermediate results. (not SSA -- variable assignments will reuse
1028 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1032 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1036 if (!options
->EmitNoIndirectTemp
&&
1037 (type
->is_array() || type
->is_matrix())) {
1039 src
.file
= PROGRAM_ARRAY
;
1040 src
.index
= next_array
<< 16 | 0x8000;
1041 array_sizes
[next_array
] = type_size(type
);
1045 src
.file
= PROGRAM_TEMPORARY
;
1046 src
.index
= next_temp
;
1047 next_temp
+= type_size(type
);
1050 if (type
->is_array() || type
->is_record()) {
1051 src
.swizzle
= SWIZZLE_NOOP
;
1053 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1060 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1063 variable_storage
*entry
;
1065 foreach_list(node
, &this->variables
) {
1066 entry
= (variable_storage
*) node
;
1068 if (entry
->var
== var
)
1076 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1078 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1079 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1081 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1082 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1085 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1087 const ir_state_slot
*const slots
= ir
->state_slots
;
1088 assert(ir
->state_slots
!= NULL
);
1090 /* Check if this statevar's setup in the STATE file exactly
1091 * matches how we'll want to reference it as a
1092 * struct/array/whatever. If not, then we need to move it into
1093 * temporary storage and hope that it'll get copy-propagated
1096 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1097 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1102 variable_storage
*storage
;
1104 if (i
== ir
->num_state_slots
) {
1105 /* We'll set the index later. */
1106 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1107 this->variables
.push_tail(storage
);
1111 /* The variable_storage constructor allocates slots based on the size
1112 * of the type. However, this had better match the number of state
1113 * elements that we're going to copy into the new temporary.
1115 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1117 dst
= st_dst_reg(get_temp(ir
->type
));
1119 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1121 this->variables
.push_tail(storage
);
1125 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1126 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1127 (gl_state_index
*)slots
[i
].tokens
);
1129 if (storage
->file
== PROGRAM_STATE_VAR
) {
1130 if (storage
->index
== -1) {
1131 storage
->index
= index
;
1133 assert(index
== storage
->index
+ (int)i
);
1136 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1137 * the data being moved since MOV does not care about the type of
1138 * data it is moving, and we don't want to declare registers with
1139 * array or struct types.
1141 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1142 src
.swizzle
= slots
[i
].swizzle
;
1143 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1144 /* even a float takes up a whole vec4 reg in a struct/array. */
1149 if (storage
->file
== PROGRAM_TEMPORARY
&&
1150 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1151 fail_link(this->shader_program
,
1152 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1153 ir
->name
, dst
.index
- storage
->index
,
1154 type_size(ir
->type
));
1160 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1162 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1164 visit_exec_list(&ir
->body_instructions
, this);
1166 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1170 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1173 case ir_loop_jump::jump_break
:
1174 emit(NULL
, TGSI_OPCODE_BRK
);
1176 case ir_loop_jump::jump_continue
:
1177 emit(NULL
, TGSI_OPCODE_CONT
);
1184 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1191 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1193 /* Ignore function bodies other than main() -- we shouldn't see calls to
1194 * them since they should all be inlined before we get to glsl_to_tgsi.
1196 if (strcmp(ir
->name
, "main") == 0) {
1197 const ir_function_signature
*sig
;
1200 sig
= ir
->matching_signature(NULL
, &empty
);
1204 foreach_list(node
, &sig
->body
) {
1205 ir_instruction
*ir
= (ir_instruction
*) node
;
1213 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1215 int nonmul_operand
= 1 - mul_operand
;
1217 st_dst_reg result_dst
;
1219 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1220 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1223 expr
->operands
[0]->accept(this);
1225 expr
->operands
[1]->accept(this);
1227 ir
->operands
[nonmul_operand
]->accept(this);
1230 this->result
= get_temp(ir
->type
);
1231 result_dst
= st_dst_reg(this->result
);
1232 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1233 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1239 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1241 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1242 * implemented using multiplication, and logical-or is implemented using
1243 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1244 * As result, the logical expression (a & !b) can be rewritten as:
1248 * - (a * 1) - (a * b)
1252 * This final expression can be implemented as a single MAD(a, -b, a)
1256 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1258 const int other_operand
= 1 - try_operand
;
1261 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1262 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1265 ir
->operands
[other_operand
]->accept(this);
1267 expr
->operands
[0]->accept(this);
1270 b
.negate
= ~b
.negate
;
1272 this->result
= get_temp(ir
->type
);
1273 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1279 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1281 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1283 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1284 !st_context(this->ctx
)->has_shader_model3
) {
1288 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1292 sat_src
->accept(this);
1293 st_src_reg src
= this->result
;
1295 /* If we generated an expression instruction into a temporary in
1296 * processing the saturate's operand, apply the saturate to that
1297 * instruction. Otherwise, generate a MOV to do the saturate.
1299 * Note that we have to be careful to only do this optimization if
1300 * the instruction in question was what generated src->result. For
1301 * example, ir_dereference_array might generate a MUL instruction
1302 * to create the reladdr, and return us a src reg using that
1303 * reladdr. That MUL result is not the value we're trying to
1306 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1307 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1308 sat_src_expr
->operation
== ir_binop_add
||
1309 sat_src_expr
->operation
== ir_binop_dot
)) {
1310 glsl_to_tgsi_instruction
*new_inst
;
1311 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1312 new_inst
->saturate
= true;
1314 this->result
= get_temp(ir
->type
);
1315 st_dst_reg result_dst
= st_dst_reg(this->result
);
1316 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1317 glsl_to_tgsi_instruction
*inst
;
1318 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1319 inst
->saturate
= true;
1326 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1327 st_src_reg
*reg
, int *num_reladdr
)
1329 if (!reg
->reladdr
&& !reg
->reladdr2
)
1332 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1333 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1335 if (*num_reladdr
!= 1) {
1336 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1338 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1346 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1348 unsigned int operand
;
1349 st_src_reg op
[Elements(ir
->operands
)];
1350 st_src_reg result_src
;
1351 st_dst_reg result_dst
;
1353 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1355 if (ir
->operation
== ir_binop_add
) {
1356 if (try_emit_mad(ir
, 1))
1358 if (try_emit_mad(ir
, 0))
1362 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1364 if (ir
->operation
== ir_binop_logic_and
) {
1365 if (try_emit_mad_for_and_not(ir
, 1))
1367 if (try_emit_mad_for_and_not(ir
, 0))
1371 if (try_emit_sat(ir
))
1374 if (ir
->operation
== ir_quadop_vector
)
1375 assert(!"ir_quadop_vector should have been lowered");
1377 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1378 this->result
.file
= PROGRAM_UNDEFINED
;
1379 ir
->operands
[operand
]->accept(this);
1380 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1381 printf("Failed to get tree for expression operand:\n");
1382 ir
->operands
[operand
]->print();
1386 op
[operand
] = this->result
;
1388 /* Matrix expression operands should have been broken down to vector
1389 * operations already.
1391 assert(!ir
->operands
[operand
]->type
->is_matrix());
1394 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1395 if (ir
->operands
[1]) {
1396 vector_elements
= MAX2(vector_elements
,
1397 ir
->operands
[1]->type
->vector_elements
);
1400 this->result
.file
= PROGRAM_UNDEFINED
;
1402 /* Storage for our result. Ideally for an assignment we'd be using
1403 * the actual storage for the result here, instead.
1405 result_src
= get_temp(ir
->type
);
1406 /* convenience for the emit functions below. */
1407 result_dst
= st_dst_reg(result_src
);
1408 /* Limit writes to the channels that will be used by result_src later.
1409 * This does limit this temp's use as a temporary for multi-instruction
1412 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1414 switch (ir
->operation
) {
1415 case ir_unop_logic_not
:
1416 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1417 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1419 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1420 * older GPUs implement SEQ using multiple instructions (i915 uses two
1421 * SGE instructions and a MUL instruction). Since our logic values are
1422 * 0.0 and 1.0, 1-x also implements !x.
1424 op
[0].negate
= ~op
[0].negate
;
1425 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1429 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1430 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1432 op
[0].negate
= ~op
[0].negate
;
1437 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1440 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1443 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1447 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1451 assert(!"not reached: should be handled by ir_explog_to_explog2");
1454 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1457 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1460 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1462 case ir_unop_sin_reduced
:
1463 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1465 case ir_unop_cos_reduced
:
1466 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1470 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1474 /* The X component contains 1 or -1 depending on whether the framebuffer
1475 * is a FBO or the window system buffer, respectively.
1476 * It is then multiplied with the source operand of DDY.
1478 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1479 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1481 unsigned transform_y_index
=
1482 _mesa_add_state_reference(this->prog
->Parameters
,
1485 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1487 glsl_type::vec4_type
);
1488 transform_y
.swizzle
= SWIZZLE_XXXX
;
1490 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1492 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1493 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1497 case ir_unop_noise
: {
1498 /* At some point, a motivated person could add a better
1499 * implementation of noise. Currently not even the nvidia
1500 * binary drivers do anything more than this. In any case, the
1501 * place to do this is in the GL state tracker, not the poor
1504 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1509 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1512 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1516 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1519 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1520 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1522 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1525 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1526 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1528 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1532 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1534 case ir_binop_greater
:
1535 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1537 case ir_binop_lequal
:
1538 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1540 case ir_binop_gequal
:
1541 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1543 case ir_binop_equal
:
1544 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1546 case ir_binop_nequal
:
1547 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1549 case ir_binop_all_equal
:
1550 /* "==" operator producing a scalar boolean. */
1551 if (ir
->operands
[0]->type
->is_vector() ||
1552 ir
->operands
[1]->type
->is_vector()) {
1553 st_src_reg temp
= get_temp(native_integers
?
1554 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1555 glsl_type::vec4_type
);
1557 if (native_integers
) {
1558 st_dst_reg temp_dst
= st_dst_reg(temp
);
1559 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1561 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1563 /* Emit 1-3 AND operations to combine the SEQ results. */
1564 switch (ir
->operands
[0]->type
->vector_elements
) {
1568 temp_dst
.writemask
= WRITEMASK_Y
;
1569 temp1
.swizzle
= SWIZZLE_YYYY
;
1570 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1571 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1574 temp_dst
.writemask
= WRITEMASK_X
;
1575 temp1
.swizzle
= SWIZZLE_XXXX
;
1576 temp2
.swizzle
= SWIZZLE_YYYY
;
1577 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1578 temp_dst
.writemask
= WRITEMASK_Y
;
1579 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1580 temp2
.swizzle
= SWIZZLE_WWWW
;
1581 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1584 temp1
.swizzle
= SWIZZLE_XXXX
;
1585 temp2
.swizzle
= SWIZZLE_YYYY
;
1586 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1588 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1590 /* After the dot-product, the value will be an integer on the
1591 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1593 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1595 /* Negating the result of the dot-product gives values on the range
1596 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1597 * This is achieved using SGE.
1599 st_src_reg sge_src
= result_src
;
1600 sge_src
.negate
= ~sge_src
.negate
;
1601 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1604 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1607 case ir_binop_any_nequal
:
1608 /* "!=" operator producing a scalar boolean. */
1609 if (ir
->operands
[0]->type
->is_vector() ||
1610 ir
->operands
[1]->type
->is_vector()) {
1611 st_src_reg temp
= get_temp(native_integers
?
1612 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1613 glsl_type::vec4_type
);
1614 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1616 if (native_integers
) {
1617 st_dst_reg temp_dst
= st_dst_reg(temp
);
1618 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1620 /* Emit 1-3 OR operations to combine the SNE results. */
1621 switch (ir
->operands
[0]->type
->vector_elements
) {
1625 temp_dst
.writemask
= WRITEMASK_Y
;
1626 temp1
.swizzle
= SWIZZLE_YYYY
;
1627 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1628 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1631 temp_dst
.writemask
= WRITEMASK_X
;
1632 temp1
.swizzle
= SWIZZLE_XXXX
;
1633 temp2
.swizzle
= SWIZZLE_YYYY
;
1634 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1635 temp_dst
.writemask
= WRITEMASK_Y
;
1636 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1637 temp2
.swizzle
= SWIZZLE_WWWW
;
1638 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1641 temp1
.swizzle
= SWIZZLE_XXXX
;
1642 temp2
.swizzle
= SWIZZLE_YYYY
;
1643 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1645 /* After the dot-product, the value will be an integer on the
1646 * range [0,4]. Zero stays zero, and positive values become 1.0.
1648 glsl_to_tgsi_instruction
*const dp
=
1649 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1650 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1651 /* The clamping to [0,1] can be done for free in the fragment
1652 * shader with a saturate.
1654 dp
->saturate
= true;
1656 /* Negating the result of the dot-product gives values on the range
1657 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1658 * achieved using SLT.
1660 st_src_reg slt_src
= result_src
;
1661 slt_src
.negate
= ~slt_src
.negate
;
1662 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1666 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1671 assert(ir
->operands
[0]->type
->is_vector());
1673 if (native_integers
) {
1674 int dst_swizzle
= 0, op0_swizzle
, i
;
1675 st_src_reg accum
= op
[0];
1677 op0_swizzle
= op
[0].swizzle
;
1678 accum
.swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 0),
1679 GET_SWZ(op0_swizzle
, 0),
1680 GET_SWZ(op0_swizzle
, 0),
1681 GET_SWZ(op0_swizzle
, 0));
1682 for (i
= 0; i
< 4; i
++) {
1683 if (result_dst
.writemask
& (1 << i
)) {
1684 dst_swizzle
= MAKE_SWIZZLE4(i
, i
, i
, i
);
1689 assert(ir
->operands
[0]->type
->is_boolean());
1691 /* OR all the components together, since they should be either 0 or ~0
1693 switch (ir
->operands
[0]->type
->vector_elements
) {
1695 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 3),
1696 GET_SWZ(op0_swizzle
, 3),
1697 GET_SWZ(op0_swizzle
, 3),
1698 GET_SWZ(op0_swizzle
, 3));
1699 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1700 accum
= st_src_reg(result_dst
);
1701 accum
.swizzle
= dst_swizzle
;
1704 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 2),
1705 GET_SWZ(op0_swizzle
, 2),
1706 GET_SWZ(op0_swizzle
, 2),
1707 GET_SWZ(op0_swizzle
, 2));
1708 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1709 accum
= st_src_reg(result_dst
);
1710 accum
.swizzle
= dst_swizzle
;
1713 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 1),
1714 GET_SWZ(op0_swizzle
, 1),
1715 GET_SWZ(op0_swizzle
, 1),
1716 GET_SWZ(op0_swizzle
, 1));
1717 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1720 assert(!"Unexpected vector size");
1724 /* After the dot-product, the value will be an integer on the
1725 * range [0,4]. Zero stays zero, and positive values become 1.0.
1727 glsl_to_tgsi_instruction
*const dp
=
1728 emit_dp(ir
, result_dst
, op
[0], op
[0],
1729 ir
->operands
[0]->type
->vector_elements
);
1730 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1731 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1732 /* The clamping to [0,1] can be done for free in the fragment
1733 * shader with a saturate.
1735 dp
->saturate
= true;
1736 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1737 /* Negating the result of the dot-product gives values on the range
1738 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1739 * is achieved using SLT.
1741 st_src_reg slt_src
= result_src
;
1742 slt_src
.negate
= ~slt_src
.negate
;
1743 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1746 /* Use SNE 0 if integers are being used as boolean values. */
1747 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1753 case ir_binop_logic_xor
:
1754 if (native_integers
)
1755 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1757 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1760 case ir_binop_logic_or
: {
1761 if (native_integers
) {
1762 /* If integers are used as booleans, we can use an actual "or"
1765 assert(native_integers
);
1766 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1768 /* After the addition, the value will be an integer on the
1769 * range [0,2]. Zero stays zero, and positive values become 1.0.
1771 glsl_to_tgsi_instruction
*add
=
1772 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1773 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1774 /* The clamping to [0,1] can be done for free in the fragment
1775 * shader with a saturate if floats are being used as boolean values.
1777 add
->saturate
= true;
1779 /* Negating the result of the addition gives values on the range
1780 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1781 * is achieved using SLT.
1783 st_src_reg slt_src
= result_src
;
1784 slt_src
.negate
= ~slt_src
.negate
;
1785 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1791 case ir_binop_logic_and
:
1792 /* If native integers are disabled, the bool args are stored as float 0.0
1793 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1794 * actual AND opcode.
1796 if (native_integers
)
1797 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1799 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1803 assert(ir
->operands
[0]->type
->is_vector());
1804 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1805 emit_dp(ir
, result_dst
, op
[0], op
[1],
1806 ir
->operands
[0]->type
->vector_elements
);
1811 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1814 /* sqrt(x) = x * rsq(x). */
1815 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1816 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1817 /* For incoming channels <= 0, set the result to 0. */
1818 op
[0].negate
= ~op
[0].negate
;
1819 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1820 op
[0], result_src
, st_src_reg_for_float(0.0));
1824 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1827 if (native_integers
) {
1828 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1831 /* fallthrough to next case otherwise */
1833 if (native_integers
) {
1834 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1837 /* fallthrough to next case otherwise */
1840 /* Converting between signed and unsigned integers is a no-op. */
1844 if (native_integers
) {
1845 /* Booleans are stored as integers using ~0 for true and 0 for false.
1846 * GLSL requires that int(bool) return 1 for true and 0 for false.
1847 * This conversion is done with AND, but it could be done with NEG.
1849 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1851 /* Booleans and integers are both stored as floats when native
1852 * integers are disabled.
1858 if (native_integers
)
1859 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1861 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1864 if (native_integers
)
1865 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1867 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1869 case ir_unop_bitcast_f2i
:
1871 result_src
.type
= GLSL_TYPE_INT
;
1873 case ir_unop_bitcast_f2u
:
1875 result_src
.type
= GLSL_TYPE_UINT
;
1877 case ir_unop_bitcast_i2f
:
1878 case ir_unop_bitcast_u2f
:
1880 result_src
.type
= GLSL_TYPE_FLOAT
;
1883 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1886 if (native_integers
)
1887 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1889 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1892 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1895 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1898 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1900 case ir_unop_round_even
:
1901 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1904 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1908 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1911 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1914 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1917 case ir_unop_bit_not
:
1918 if (native_integers
) {
1919 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1923 if (native_integers
) {
1924 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1927 case ir_binop_lshift
:
1928 if (native_integers
) {
1929 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1932 case ir_binop_rshift
:
1933 if (native_integers
) {
1934 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1937 case ir_binop_bit_and
:
1938 if (native_integers
) {
1939 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1942 case ir_binop_bit_xor
:
1943 if (native_integers
) {
1944 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1947 case ir_binop_bit_or
:
1948 if (native_integers
) {
1949 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1953 assert(!"GLSL 1.30 features unsupported");
1956 case ir_binop_ubo_load
: {
1957 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1958 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1959 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1960 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1963 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1964 cbuf
.file
= PROGRAM_CONSTANT
;
1966 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1967 cbuf
.reladdr
= NULL
;
1970 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1972 if (const_offset_ir
) {
1973 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1975 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1978 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1979 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1980 const_offset
% 16 / 4,
1981 const_offset
% 16 / 4,
1982 const_offset
% 16 / 4);
1984 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1985 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1987 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1988 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1990 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1995 /* note: we have to reorder the three args here */
1996 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1999 if (this->ctx
->Const
.NativeIntegers
)
2000 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
2002 op
[0].negate
= ~op
[0].negate
;
2003 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
2006 case ir_triop_bitfield_extract
:
2007 emit(ir
, TGSI_OPCODE_IBFE
, result_dst
, op
[0], op
[1], op
[2]);
2009 case ir_quadop_bitfield_insert
:
2010 emit(ir
, TGSI_OPCODE_BFI
, result_dst
, op
[0], op
[1], op
[2], op
[3]);
2012 case ir_unop_bitfield_reverse
:
2013 emit(ir
, TGSI_OPCODE_BREV
, result_dst
, op
[0]);
2015 case ir_unop_bit_count
:
2016 emit(ir
, TGSI_OPCODE_POPC
, result_dst
, op
[0]);
2018 case ir_unop_find_msb
:
2019 emit(ir
, TGSI_OPCODE_IMSB
, result_dst
, op
[0]);
2021 case ir_unop_find_lsb
:
2022 emit(ir
, TGSI_OPCODE_LSB
, result_dst
, op
[0]);
2024 case ir_binop_imul_high
:
2025 emit(ir
, TGSI_OPCODE_IMUL_HI
, result_dst
, op
[0], op
[1]);
2028 /* NOTE: Perhaps there should be a special opcode that enforces fused
2029 * mul-add. Just use MAD for now.
2031 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, op
[0], op
[1], op
[2]);
2033 case ir_unop_pack_snorm_2x16
:
2034 case ir_unop_pack_unorm_2x16
:
2035 case ir_unop_pack_half_2x16
:
2036 case ir_unop_pack_snorm_4x8
:
2037 case ir_unop_pack_unorm_4x8
:
2038 case ir_unop_unpack_snorm_2x16
:
2039 case ir_unop_unpack_unorm_2x16
:
2040 case ir_unop_unpack_half_2x16
:
2041 case ir_unop_unpack_half_2x16_split_x
:
2042 case ir_unop_unpack_half_2x16_split_y
:
2043 case ir_unop_unpack_snorm_4x8
:
2044 case ir_unop_unpack_unorm_4x8
:
2045 case ir_binop_pack_half_2x16_split
:
2048 case ir_quadop_vector
:
2049 case ir_binop_vector_extract
:
2050 case ir_triop_vector_insert
:
2051 case ir_binop_ldexp
:
2052 case ir_binop_carry
:
2053 case ir_binop_borrow
:
2054 /* This operation is not supported, or should have already been handled.
2056 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2060 this->result
= result_src
;
2065 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2071 /* Note that this is only swizzles in expressions, not those on the left
2072 * hand side of an assignment, which do write masking. See ir_assignment
2076 ir
->val
->accept(this);
2078 assert(src
.file
!= PROGRAM_UNDEFINED
);
2080 for (i
= 0; i
< 4; i
++) {
2081 if (i
< ir
->type
->vector_elements
) {
2084 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2087 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2090 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2093 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2097 /* If the type is smaller than a vec4, replicate the last
2100 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2104 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2110 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2112 variable_storage
*entry
= find_variable_storage(ir
->var
);
2113 ir_variable
*var
= ir
->var
;
2116 switch (var
->data
.mode
) {
2117 case ir_var_uniform
:
2118 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2119 var
->data
.location
);
2120 this->variables
.push_tail(entry
);
2122 case ir_var_shader_in
:
2123 /* The linker assigns locations for varyings and attributes,
2124 * including deprecated builtins (like gl_Color), user-assign
2125 * generic attributes (glBindVertexLocation), and
2126 * user-defined varyings.
2128 assert(var
->data
.location
!= -1);
2129 entry
= new(mem_ctx
) variable_storage(var
,
2131 var
->data
.location
);
2133 case ir_var_shader_out
:
2134 assert(var
->data
.location
!= -1);
2135 entry
= new(mem_ctx
) variable_storage(var
,
2140 case ir_var_system_value
:
2141 entry
= new(mem_ctx
) variable_storage(var
,
2142 PROGRAM_SYSTEM_VALUE
,
2143 var
->data
.location
);
2146 case ir_var_temporary
:
2147 st_src_reg src
= get_temp(var
->type
);
2149 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2150 this->variables
.push_tail(entry
);
2156 printf("Failed to make storage for %s\n", var
->name
);
2161 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2162 if (!native_integers
)
2163 this->result
.type
= GLSL_TYPE_FLOAT
;
2167 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2171 int element_size
= type_size(ir
->type
);
2174 index
= ir
->array_index
->constant_expression_value();
2176 ir
->array
->accept(this);
2179 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2180 src
.file
== PROGRAM_INPUT
&&
2181 ir
->array
->ir_type
!= ir_type_dereference_array
;
2188 src
.index2D
= index
->value
.i
[0];
2189 src
.has_index2
= true;
2191 src
.index
+= index
->value
.i
[0] * element_size
;
2193 /* Variable index array dereference. It eats the "vec4" of the
2194 * base of the array and an index that offsets the TGSI register
2197 ir
->array_index
->accept(this);
2199 st_src_reg index_reg
;
2201 if (element_size
== 1) {
2202 index_reg
= this->result
;
2204 index_reg
= get_temp(native_integers
?
2205 glsl_type::int_type
: glsl_type::float_type
);
2207 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2208 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2211 /* If there was already a relative address register involved, add the
2212 * new and the old together to get the new offset.
2214 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2215 st_src_reg accum_reg
= get_temp(native_integers
?
2216 glsl_type::int_type
: glsl_type::float_type
);
2218 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2219 index_reg
, *src
.reladdr
);
2221 index_reg
= accum_reg
;
2225 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2226 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2228 src
.has_index2
= true;
2230 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2231 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2235 /* If the type is smaller than a vec4, replicate the last channel out. */
2236 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2237 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2239 src
.swizzle
= SWIZZLE_NOOP
;
2241 /* Change the register type to the element type of the array. */
2242 src
.type
= ir
->type
->base_type
;
2248 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2251 const glsl_type
*struct_type
= ir
->record
->type
;
2254 ir
->record
->accept(this);
2256 for (i
= 0; i
< struct_type
->length
; i
++) {
2257 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2259 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2262 /* If the type is smaller than a vec4, replicate the last channel out. */
2263 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2264 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2266 this->result
.swizzle
= SWIZZLE_NOOP
;
2268 this->result
.index
+= offset
;
2269 this->result
.type
= ir
->type
->base_type
;
2273 * We want to be careful in assignment setup to hit the actual storage
2274 * instead of potentially using a temporary like we might with the
2275 * ir_dereference handler.
2278 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2280 /* The LHS must be a dereference. If the LHS is a variable indexed array
2281 * access of a vector, it must be separated into a series conditional moves
2282 * before reaching this point (see ir_vec_index_to_cond_assign).
2284 assert(ir
->as_dereference());
2285 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2287 assert(!deref_array
->array
->type
->is_vector());
2290 /* Use the rvalue deref handler for the most part. We'll ignore
2291 * swizzles in it and write swizzles using writemask, though.
2294 return st_dst_reg(v
->result
);
2298 * Process the condition of a conditional assignment
2300 * Examines the condition of a conditional assignment to generate the optimal
2301 * first operand of a \c CMP instruction. If the condition is a relational
2302 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2303 * used as the source for the \c CMP instruction. Otherwise the comparison
2304 * is processed to a boolean result, and the boolean result is used as the
2305 * operand to the CMP instruction.
2308 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2310 ir_rvalue
*src_ir
= ir
;
2312 bool switch_order
= false;
2314 ir_expression
*const expr
= ir
->as_expression();
2315 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2316 bool zero_on_left
= false;
2318 if (expr
->operands
[0]->is_zero()) {
2319 src_ir
= expr
->operands
[1];
2320 zero_on_left
= true;
2321 } else if (expr
->operands
[1]->is_zero()) {
2322 src_ir
= expr
->operands
[0];
2323 zero_on_left
= false;
2327 * (a < 0) T F F ( a < 0) T F F
2328 * (0 < a) F F T (-a < 0) F F T
2329 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2330 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2331 * (a > 0) F F T (-a < 0) F F T
2332 * (0 > a) T F F ( a < 0) T F F
2333 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2334 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2336 * Note that exchanging the order of 0 and 'a' in the comparison simply
2337 * means that the value of 'a' should be negated.
2340 switch (expr
->operation
) {
2342 switch_order
= false;
2343 negate
= zero_on_left
;
2346 case ir_binop_greater
:
2347 switch_order
= false;
2348 negate
= !zero_on_left
;
2351 case ir_binop_lequal
:
2352 switch_order
= true;
2353 negate
= !zero_on_left
;
2356 case ir_binop_gequal
:
2357 switch_order
= true;
2358 negate
= zero_on_left
;
2362 /* This isn't the right kind of comparison afterall, so make sure
2363 * the whole condition is visited.
2371 src_ir
->accept(this);
2373 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2374 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2375 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2376 * computing the condition.
2379 this->result
.negate
= ~this->result
.negate
;
2381 return switch_order
;
2385 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2386 st_dst_reg
*l
, st_src_reg
*r
)
2388 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2389 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2390 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2395 if (type
->is_array()) {
2396 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2397 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2402 if (type
->is_matrix()) {
2403 const struct glsl_type
*vec_type
;
2405 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2406 type
->vector_elements
, 1);
2408 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2409 emit_block_mov(ir
, vec_type
, l
, r
);
2414 assert(type
->is_scalar() || type
->is_vector());
2416 r
->type
= type
->base_type
;
2417 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2423 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2429 ir
->rhs
->accept(this);
2432 l
= get_assignment_lhs(ir
->lhs
, this);
2434 /* FINISHME: This should really set to the correct maximal writemask for each
2435 * FINISHME: component written (in the loops below). This case can only
2436 * FINISHME: occur for matrices, arrays, and structures.
2438 if (ir
->write_mask
== 0) {
2439 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2440 l
.writemask
= WRITEMASK_XYZW
;
2441 } else if (ir
->lhs
->type
->is_scalar() &&
2442 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2443 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2444 * FINISHME: W component of fragment shader output zero, work correctly.
2446 l
.writemask
= WRITEMASK_XYZW
;
2449 int first_enabled_chan
= 0;
2452 l
.writemask
= ir
->write_mask
;
2454 for (int i
= 0; i
< 4; i
++) {
2455 if (l
.writemask
& (1 << i
)) {
2456 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2461 /* Swizzle a small RHS vector into the channels being written.
2463 * glsl ir treats write_mask as dictating how many channels are
2464 * present on the RHS while TGSI treats write_mask as just
2465 * showing which channels of the vec4 RHS get written.
2467 for (int i
= 0; i
< 4; i
++) {
2468 if (l
.writemask
& (1 << i
))
2469 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2471 swizzles
[i
] = first_enabled_chan
;
2473 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2474 swizzles
[2], swizzles
[3]);
2477 assert(l
.file
!= PROGRAM_UNDEFINED
);
2478 assert(r
.file
!= PROGRAM_UNDEFINED
);
2480 if (ir
->condition
) {
2481 const bool switch_order
= this->process_move_condition(ir
->condition
);
2482 st_src_reg condition
= this->result
;
2484 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2485 st_src_reg l_src
= st_src_reg(l
);
2486 st_src_reg condition_temp
= condition
;
2487 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2489 if (native_integers
) {
2490 /* This is necessary because TGSI's CMP instruction expects the
2491 * condition to be a float, and we store booleans as integers.
2492 * TODO: really want to avoid i2f path and use UCMP. Requires
2493 * changes to process_move_condition though too.
2495 condition_temp
= get_temp(glsl_type::vec4_type
);
2496 condition
.negate
= 0;
2497 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2498 condition_temp
.swizzle
= condition
.swizzle
;
2502 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2504 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2510 } else if (ir
->rhs
->as_expression() &&
2511 this->instructions
.get_tail() &&
2512 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2513 type_size(ir
->lhs
->type
) == 1 &&
2514 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2515 /* To avoid emitting an extra MOV when assigning an expression to a
2516 * variable, emit the last instruction of the expression again, but
2517 * replace the destination register with the target of the assignment.
2518 * Dead code elimination will remove the original instruction.
2520 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2521 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2522 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2523 new_inst
->saturate
= inst
->saturate
;
2524 inst
->dead_mask
= inst
->dst
.writemask
;
2526 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2532 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2535 GLfloat stack_vals
[4] = { 0 };
2536 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2537 GLenum gl_type
= GL_NONE
;
2539 static int in_array
= 0;
2540 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2542 /* Unfortunately, 4 floats is all we can get into
2543 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2544 * aggregate constant and move each constant value into it. If we
2545 * get lucky, copy propagation will eliminate the extra moves.
2547 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2548 st_src_reg temp_base
= get_temp(ir
->type
);
2549 st_dst_reg temp
= st_dst_reg(temp_base
);
2551 foreach_list(node
, &ir
->components
) {
2552 ir_constant
*field_value
= (ir_constant
*) node
;
2553 int size
= type_size(field_value
->type
);
2557 field_value
->accept(this);
2560 for (i
= 0; i
< (unsigned int)size
; i
++) {
2561 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2567 this->result
= temp_base
;
2571 if (ir
->type
->is_array()) {
2572 st_src_reg temp_base
= get_temp(ir
->type
);
2573 st_dst_reg temp
= st_dst_reg(temp_base
);
2574 int size
= type_size(ir
->type
->fields
.array
);
2579 for (i
= 0; i
< ir
->type
->length
; i
++) {
2580 ir
->array_elements
[i
]->accept(this);
2582 for (int j
= 0; j
< size
; j
++) {
2583 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2589 this->result
= temp_base
;
2594 if (ir
->type
->is_matrix()) {
2595 st_src_reg mat
= get_temp(ir
->type
);
2596 st_dst_reg mat_column
= st_dst_reg(mat
);
2598 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2599 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2600 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2602 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2603 src
.index
= add_constant(file
,
2605 ir
->type
->vector_elements
,
2608 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2617 switch (ir
->type
->base_type
) {
2618 case GLSL_TYPE_FLOAT
:
2620 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2621 values
[i
].f
= ir
->value
.f
[i
];
2624 case GLSL_TYPE_UINT
:
2625 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2626 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2627 if (native_integers
)
2628 values
[i
].u
= ir
->value
.u
[i
];
2630 values
[i
].f
= ir
->value
.u
[i
];
2634 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2635 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2636 if (native_integers
)
2637 values
[i
].i
= ir
->value
.i
[i
];
2639 values
[i
].f
= ir
->value
.i
[i
];
2642 case GLSL_TYPE_BOOL
:
2643 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2644 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2645 if (native_integers
)
2646 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2648 values
[i
].f
= ir
->value
.b
[i
];
2652 assert(!"Non-float/uint/int/bool constant");
2655 this->result
= st_src_reg(file
, -1, ir
->type
);
2656 this->result
.index
= add_constant(file
,
2658 ir
->type
->vector_elements
,
2660 &this->result
.swizzle
);
2664 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2666 function_entry
*entry
;
2668 foreach_list(node
, &this->function_signatures
) {
2669 entry
= (function_entry
*) node
;
2671 if (entry
->sig
== sig
)
2675 entry
= ralloc(mem_ctx
, function_entry
);
2677 entry
->sig_id
= this->next_signature_id
++;
2678 entry
->bgn_inst
= NULL
;
2680 /* Allocate storage for all the parameters. */
2681 foreach_list(node
, &sig
->parameters
) {
2682 ir_variable
*param
= (ir_variable
*) node
;
2683 variable_storage
*storage
;
2685 storage
= find_variable_storage(param
);
2688 st_src_reg src
= get_temp(param
->type
);
2690 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2691 this->variables
.push_tail(storage
);
2694 if (!sig
->return_type
->is_void()) {
2695 entry
->return_reg
= get_temp(sig
->return_type
);
2697 entry
->return_reg
= undef_src
;
2700 this->function_signatures
.push_tail(entry
);
2705 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2707 glsl_to_tgsi_instruction
*call_inst
;
2708 ir_function_signature
*sig
= ir
->callee
;
2709 function_entry
*entry
= get_function_signature(sig
);
2712 /* Process in parameters. */
2713 foreach_two_lists(formal_node
, &sig
->parameters
,
2714 actual_node
, &ir
->actual_parameters
) {
2715 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2716 ir_variable
*param
= (ir_variable
*) formal_node
;
2718 if (param
->data
.mode
== ir_var_function_in
||
2719 param
->data
.mode
== ir_var_function_inout
) {
2720 variable_storage
*storage
= find_variable_storage(param
);
2723 param_rval
->accept(this);
2724 st_src_reg r
= this->result
;
2727 l
.file
= storage
->file
;
2728 l
.index
= storage
->index
;
2730 l
.writemask
= WRITEMASK_XYZW
;
2731 l
.cond_mask
= COND_TR
;
2733 for (i
= 0; i
< type_size(param
->type
); i
++) {
2734 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2741 /* Emit call instruction */
2742 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2743 call_inst
->function
= entry
;
2745 /* Process out parameters. */
2746 foreach_two_lists(formal_node
, &sig
->parameters
,
2747 actual_node
, &ir
->actual_parameters
) {
2748 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2749 ir_variable
*param
= (ir_variable
*) formal_node
;
2751 if (param
->data
.mode
== ir_var_function_out
||
2752 param
->data
.mode
== ir_var_function_inout
) {
2753 variable_storage
*storage
= find_variable_storage(param
);
2757 r
.file
= storage
->file
;
2758 r
.index
= storage
->index
;
2760 r
.swizzle
= SWIZZLE_NOOP
;
2763 param_rval
->accept(this);
2764 st_dst_reg l
= st_dst_reg(this->result
);
2766 for (i
= 0; i
< type_size(param
->type
); i
++) {
2767 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2774 /* Process return value. */
2775 this->result
= entry
->return_reg
;
2779 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2781 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
[MAX_GLSL_TEXTURE_OFFSET
], sample_index
, component
;
2782 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2783 glsl_to_tgsi_instruction
*inst
= NULL
;
2784 unsigned opcode
= TGSI_OPCODE_NOP
;
2785 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2786 bool is_cube_array
= false;
2789 /* if we are a cube array sampler */
2790 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2791 sampler_type
->sampler_array
)) {
2792 is_cube_array
= true;
2795 if (ir
->coordinate
) {
2796 ir
->coordinate
->accept(this);
2798 /* Put our coords in a temp. We'll need to modify them for shadow,
2799 * projection, or LOD, so the only case we'd use it as is is if
2800 * we're doing plain old texturing. The optimization passes on
2801 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2803 coord
= get_temp(glsl_type::vec4_type
);
2804 coord_dst
= st_dst_reg(coord
);
2805 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2806 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2809 if (ir
->projector
) {
2810 ir
->projector
->accept(this);
2811 projector
= this->result
;
2814 /* Storage for our result. Ideally for an assignment we'd be using
2815 * the actual storage for the result here, instead.
2817 result_src
= get_temp(ir
->type
);
2818 result_dst
= st_dst_reg(result_src
);
2822 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2824 ir
->offset
->accept(this);
2825 offset
[0] = this->result
;
2829 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2830 ir
->lod_info
.bias
->accept(this);
2831 lod_info
= this->result
;
2833 ir
->offset
->accept(this);
2834 offset
[0] = this->result
;
2838 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2839 ir
->lod_info
.lod
->accept(this);
2840 lod_info
= this->result
;
2842 ir
->offset
->accept(this);
2843 offset
[0] = this->result
;
2847 opcode
= TGSI_OPCODE_TXD
;
2848 ir
->lod_info
.grad
.dPdx
->accept(this);
2850 ir
->lod_info
.grad
.dPdy
->accept(this);
2853 ir
->offset
->accept(this);
2854 offset
[0] = this->result
;
2858 opcode
= TGSI_OPCODE_TXQ
;
2859 ir
->lod_info
.lod
->accept(this);
2860 lod_info
= this->result
;
2863 opcode
= TGSI_OPCODE_TXF
;
2864 ir
->lod_info
.lod
->accept(this);
2865 lod_info
= this->result
;
2867 ir
->offset
->accept(this);
2868 offset
[0] = this->result
;
2872 opcode
= TGSI_OPCODE_TXF
;
2873 ir
->lod_info
.sample_index
->accept(this);
2874 sample_index
= this->result
;
2877 opcode
= TGSI_OPCODE_TG4
;
2878 ir
->lod_info
.component
->accept(this);
2879 component
= this->result
;
2881 ir
->offset
->accept(this);
2882 if (ir
->offset
->type
->base_type
== GLSL_TYPE_ARRAY
) {
2883 const glsl_type
*elt_type
= ir
->offset
->type
->fields
.array
;
2884 for (i
= 0; i
< ir
->offset
->type
->length
; i
++) {
2885 offset
[i
] = this->result
;
2886 offset
[i
].index
+= i
* type_size(elt_type
);
2887 offset
[i
].type
= elt_type
->base_type
;
2888 offset
[i
].swizzle
= swizzle_for_size(elt_type
->vector_elements
);
2891 offset
[0] = this->result
;
2896 opcode
= TGSI_OPCODE_LODQ
;
2898 case ir_query_levels
:
2899 assert(!"Unexpected ir_query_levels opcode");
2903 if (ir
->projector
) {
2904 if (opcode
== TGSI_OPCODE_TEX
) {
2905 /* Slot the projector in as the last component of the coord. */
2906 coord_dst
.writemask
= WRITEMASK_W
;
2907 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2908 coord_dst
.writemask
= WRITEMASK_XYZW
;
2909 opcode
= TGSI_OPCODE_TXP
;
2911 st_src_reg coord_w
= coord
;
2912 coord_w
.swizzle
= SWIZZLE_WWWW
;
2914 /* For the other TEX opcodes there's no projective version
2915 * since the last slot is taken up by LOD info. Do the
2916 * projective divide now.
2918 coord_dst
.writemask
= WRITEMASK_W
;
2919 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2921 /* In the case where we have to project the coordinates "by hand,"
2922 * the shadow comparator value must also be projected.
2924 st_src_reg tmp_src
= coord
;
2925 if (ir
->shadow_comparitor
) {
2926 /* Slot the shadow value in as the second to last component of the
2929 ir
->shadow_comparitor
->accept(this);
2931 tmp_src
= get_temp(glsl_type::vec4_type
);
2932 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2934 /* Projective division not allowed for array samplers. */
2935 assert(!sampler_type
->sampler_array
);
2937 tmp_dst
.writemask
= WRITEMASK_Z
;
2938 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2940 tmp_dst
.writemask
= WRITEMASK_XY
;
2941 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2944 coord_dst
.writemask
= WRITEMASK_XYZ
;
2945 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2947 coord_dst
.writemask
= WRITEMASK_XYZW
;
2948 coord
.swizzle
= SWIZZLE_XYZW
;
2952 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2953 * comparator was put in the correct place (and projected) by the code,
2954 * above, that handles by-hand projection.
2956 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2957 /* Slot the shadow value in as the second to last component of the
2960 ir
->shadow_comparitor
->accept(this);
2962 if (is_cube_array
) {
2963 cube_sc
= get_temp(glsl_type::float_type
);
2964 cube_sc_dst
= st_dst_reg(cube_sc
);
2965 cube_sc_dst
.writemask
= WRITEMASK_X
;
2966 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2967 cube_sc_dst
.writemask
= WRITEMASK_X
;
2970 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2971 sampler_type
->sampler_array
) ||
2972 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2973 coord_dst
.writemask
= WRITEMASK_W
;
2975 coord_dst
.writemask
= WRITEMASK_Z
;
2978 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2979 coord_dst
.writemask
= WRITEMASK_XYZW
;
2983 if (ir
->op
== ir_txf_ms
) {
2984 coord_dst
.writemask
= WRITEMASK_W
;
2985 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2986 coord_dst
.writemask
= WRITEMASK_XYZW
;
2987 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2988 opcode
== TGSI_OPCODE_TXF
) {
2989 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2990 coord_dst
.writemask
= WRITEMASK_W
;
2991 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2992 coord_dst
.writemask
= WRITEMASK_XYZW
;
2995 if (opcode
== TGSI_OPCODE_TXD
)
2996 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2997 else if (opcode
== TGSI_OPCODE_TXQ
)
2998 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2999 else if (opcode
== TGSI_OPCODE_TXF
) {
3000 inst
= emit(ir
, opcode
, result_dst
, coord
);
3001 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
3002 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
3003 } else if (opcode
== TGSI_OPCODE_TEX2
) {
3004 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
3005 } else if (opcode
== TGSI_OPCODE_TG4
) {
3006 if (is_cube_array
&& ir
->shadow_comparitor
) {
3007 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
3009 inst
= emit(ir
, opcode
, result_dst
, coord
, component
);
3012 inst
= emit(ir
, opcode
, result_dst
, coord
);
3014 if (ir
->shadow_comparitor
)
3015 inst
->tex_shadow
= GL_TRUE
;
3017 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
3018 this->shader_program
,
3022 for (i
= 0; i
< MAX_GLSL_TEXTURE_OFFSET
&& offset
[i
].file
!= PROGRAM_UNDEFINED
; i
++)
3023 inst
->tex_offsets
[i
] = offset
[i
];
3024 inst
->tex_offset_num_offset
= i
;
3027 switch (sampler_type
->sampler_dimensionality
) {
3028 case GLSL_SAMPLER_DIM_1D
:
3029 inst
->tex_target
= (sampler_type
->sampler_array
)
3030 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
3032 case GLSL_SAMPLER_DIM_2D
:
3033 inst
->tex_target
= (sampler_type
->sampler_array
)
3034 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
3036 case GLSL_SAMPLER_DIM_3D
:
3037 inst
->tex_target
= TEXTURE_3D_INDEX
;
3039 case GLSL_SAMPLER_DIM_CUBE
:
3040 inst
->tex_target
= (sampler_type
->sampler_array
)
3041 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
3043 case GLSL_SAMPLER_DIM_RECT
:
3044 inst
->tex_target
= TEXTURE_RECT_INDEX
;
3046 case GLSL_SAMPLER_DIM_BUF
:
3047 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
3049 case GLSL_SAMPLER_DIM_EXTERNAL
:
3050 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
3052 case GLSL_SAMPLER_DIM_MS
:
3053 inst
->tex_target
= (sampler_type
->sampler_array
)
3054 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
3057 assert(!"Should not get here.");
3060 this->result
= result_src
;
3064 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
3066 if (ir
->get_value()) {
3070 assert(current_function
);
3072 ir
->get_value()->accept(this);
3073 st_src_reg r
= this->result
;
3075 l
= st_dst_reg(current_function
->return_reg
);
3077 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
3078 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
3084 emit(ir
, TGSI_OPCODE_RET
);
3088 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
3090 if (ir
->condition
) {
3091 ir
->condition
->accept(this);
3092 this->result
.negate
= ~this->result
.negate
;
3093 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
3095 /* unconditional kil */
3096 emit(ir
, TGSI_OPCODE_KILL
);
3101 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3104 glsl_to_tgsi_instruction
*if_inst
;
3106 ir
->condition
->accept(this);
3107 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3109 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3111 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3113 this->instructions
.push_tail(if_inst
);
3115 visit_exec_list(&ir
->then_instructions
, this);
3117 if (!ir
->else_instructions
.is_empty()) {
3118 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3119 visit_exec_list(&ir
->else_instructions
, this);
3122 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3127 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3129 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3130 emit(ir
, TGSI_OPCODE_EMIT
);
3134 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3136 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3137 emit(ir
, TGSI_OPCODE_ENDPRIM
);
3140 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3142 result
.file
= PROGRAM_UNDEFINED
;
3145 next_signature_id
= 1;
3147 current_function
= NULL
;
3148 num_address_regs
= 0;
3150 indirect_addr_consts
= false;
3152 native_integers
= false;
3153 mem_ctx
= ralloc_context(NULL
);
3156 shader_program
= NULL
;
3160 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3162 ralloc_free(mem_ctx
);
3165 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3172 * Count resources used by the given gpu program (number of texture
3176 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3178 v
->samplers_used
= 0;
3180 foreach_list(node
, &v
->instructions
) {
3181 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3183 if (is_tex_instruction(inst
->op
)) {
3184 v
->samplers_used
|= 1 << inst
->sampler
;
3186 if (inst
->tex_shadow
) {
3187 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3192 prog
->SamplersUsed
= v
->samplers_used
;
3194 if (v
->shader_program
!= NULL
)
3195 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3199 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3200 struct gl_shader_program
*shader_program
,
3201 const char *name
, const glsl_type
*type
,
3204 if (type
->is_record()) {
3205 ir_constant
*field_constant
;
3207 field_constant
= (ir_constant
*)val
->components
.get_head();
3209 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3210 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3211 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3212 type
->fields
.structure
[i
].name
);
3213 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3214 field_type
, field_constant
);
3215 field_constant
= (ir_constant
*)field_constant
->next
;
3221 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3223 if (offset
== GL_INVALID_INDEX
) {
3224 fail_link(shader_program
,
3225 "Couldn't find uniform for initializer %s\n", name
);
3228 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3230 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3231 ir_constant
*element
;
3232 const glsl_type
*element_type
;
3233 if (type
->is_array()) {
3234 element
= val
->array_elements
[i
];
3235 element_type
= type
->fields
.array
;
3238 element_type
= type
;
3243 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3244 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3245 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3246 conv
[j
] = element
->value
.b
[j
];
3248 values
= (void *)conv
;
3249 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3250 element_type
->vector_elements
,
3253 values
= &element
->value
;
3256 if (element_type
->is_matrix()) {
3257 _mesa_uniform_matrix(ctx
, shader_program
,
3258 element_type
->matrix_columns
,
3259 element_type
->vector_elements
,
3260 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3262 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3263 values
, element_type
->gl_type
);
3271 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3272 * are read from the given src in this instruction
3275 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3277 int read_mask
= 0, comp
;
3279 /* Now, given the src swizzle and the written channels, find which
3280 * components are actually read
3282 for (comp
= 0; comp
< 4; ++comp
) {
3283 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3285 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3286 read_mask
|= 1 << coord
;
3293 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3294 * instruction is the first instruction to write to register T0. There are
3295 * several lowering passes done in GLSL IR (e.g. branches and
3296 * relative addressing) that create a large number of conditional assignments
3297 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3299 * Here is why this conversion is safe:
3300 * CMP T0, T1 T2 T0 can be expanded to:
3306 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3307 * as the original program. If (T1 < 0.0) evaluates to false, executing
3308 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3309 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3310 * because any instruction that was going to read from T0 after this was going
3311 * to read a garbage value anyway.
3314 glsl_to_tgsi_visitor::simplify_cmp(void)
3316 unsigned *tempWrites
;
3317 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3319 tempWrites
= new unsigned[MAX_TEMPS
];
3323 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3324 memset(outputWrites
, 0, sizeof(outputWrites
));
3326 foreach_list(node
, &this->instructions
) {
3327 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3328 unsigned prevWriteMask
= 0;
3330 /* Give up if we encounter relative addressing or flow control. */
3331 if (inst
->dst
.reladdr
||
3332 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3333 inst
->op
== TGSI_OPCODE_BGNSUB
||
3334 inst
->op
== TGSI_OPCODE_CONT
||
3335 inst
->op
== TGSI_OPCODE_END
||
3336 inst
->op
== TGSI_OPCODE_ENDSUB
||
3337 inst
->op
== TGSI_OPCODE_RET
) {
3341 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3342 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3343 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3344 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3345 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3346 assert(inst
->dst
.index
< MAX_TEMPS
);
3347 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3348 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3352 /* For a CMP to be considered a conditional write, the destination
3353 * register and source register two must be the same. */
3354 if (inst
->op
== TGSI_OPCODE_CMP
3355 && !(inst
->dst
.writemask
& prevWriteMask
)
3356 && inst
->src
[2].file
== inst
->dst
.file
3357 && inst
->src
[2].index
== inst
->dst
.index
3358 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3360 inst
->op
= TGSI_OPCODE_MOV
;
3361 inst
->src
[0] = inst
->src
[1];
3365 delete [] tempWrites
;
3368 /* Replaces all references to a temporary register index with another index. */
3370 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3372 foreach_list(node
, &this->instructions
) {
3373 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3376 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3377 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3378 inst
->src
[j
].index
== index
) {
3379 inst
->src
[j
].index
= new_index
;
3383 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3384 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3385 inst
->tex_offsets
[j
].index
== index
) {
3386 inst
->tex_offsets
[j
].index
= new_index
;
3390 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3391 inst
->dst
.index
= new_index
;
3397 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3399 int depth
= 0; /* loop depth */
3400 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3403 foreach_list(node
, &this->instructions
) {
3404 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3406 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3407 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3408 inst
->src
[j
].index
== index
) {
3409 return (depth
== 0) ? i
: loop_start
;
3412 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3413 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3414 inst
->tex_offsets
[j
].index
== index
) {
3415 return (depth
== 0) ? i
: loop_start
;
3419 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3422 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3435 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3437 int depth
= 0; /* loop depth */
3438 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3441 foreach_list(node
, &this->instructions
) {
3442 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3444 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3445 return (depth
== 0) ? i
: loop_start
;
3448 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3451 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3464 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3466 int depth
= 0; /* loop depth */
3467 int last
= -1; /* index of last instruction that reads the temporary */
3470 foreach_list(node
, &this->instructions
) {
3471 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3473 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3474 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3475 inst
->src
[j
].index
== index
) {
3476 last
= (depth
== 0) ? i
: -2;
3479 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3480 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3481 inst
->tex_offsets
[j
].index
== index
)
3482 last
= (depth
== 0) ? i
: -2;
3485 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3487 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3488 if (--depth
== 0 && last
== -2)
3500 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3502 int depth
= 0; /* loop depth */
3503 int last
= -1; /* index of last instruction that writes to the temporary */
3506 foreach_list(node
, &this->instructions
) {
3507 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3509 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3510 last
= (depth
== 0) ? i
: -2;
3512 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3514 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3515 if (--depth
== 0 && last
== -2)
3527 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3528 * channels for copy propagation and updates following instructions to
3529 * use the original versions.
3531 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3532 * will occur. As an example, a TXP production before this pass:
3534 * 0: MOV TEMP[1], INPUT[4].xyyy;
3535 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3536 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3540 * 0: MOV TEMP[1], INPUT[4].xyyy;
3541 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3542 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3544 * which allows for dead code elimination on TEMP[1]'s writes.
3547 glsl_to_tgsi_visitor::copy_propagate(void)
3549 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3550 glsl_to_tgsi_instruction
*,
3551 this->next_temp
* 4);
3552 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3555 foreach_list(node
, &this->instructions
) {
3556 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3558 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3559 || inst
->dst
.index
< this->next_temp
);
3561 /* First, do any copy propagation possible into the src regs. */
3562 for (int r
= 0; r
< 3; r
++) {
3563 glsl_to_tgsi_instruction
*first
= NULL
;
3565 int acp_base
= inst
->src
[r
].index
* 4;
3567 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3568 inst
->src
[r
].reladdr
||
3569 inst
->src
[r
].reladdr2
)
3572 /* See if we can find entries in the ACP consisting of MOVs
3573 * from the same src register for all the swizzled channels
3574 * of this src register reference.
3576 for (int i
= 0; i
< 4; i
++) {
3577 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3578 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3585 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3590 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3591 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3599 /* We've now validated that we can copy-propagate to
3600 * replace this src register reference. Do it.
3602 inst
->src
[r
].file
= first
->src
[0].file
;
3603 inst
->src
[r
].index
= first
->src
[0].index
;
3604 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3605 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3608 for (int i
= 0; i
< 4; i
++) {
3609 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3610 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3611 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3614 inst
->src
[r
].swizzle
= swizzle
;
3619 case TGSI_OPCODE_BGNLOOP
:
3620 case TGSI_OPCODE_ENDLOOP
:
3621 /* End of a basic block, clear the ACP entirely. */
3622 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3625 case TGSI_OPCODE_IF
:
3626 case TGSI_OPCODE_UIF
:
3630 case TGSI_OPCODE_ENDIF
:
3631 case TGSI_OPCODE_ELSE
:
3632 /* Clear all channels written inside the block from the ACP, but
3633 * leaving those that were not touched.
3635 for (int r
= 0; r
< this->next_temp
; r
++) {
3636 for (int c
= 0; c
< 4; c
++) {
3637 if (!acp
[4 * r
+ c
])
3640 if (acp_level
[4 * r
+ c
] >= level
)
3641 acp
[4 * r
+ c
] = NULL
;
3644 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3649 /* Continuing the block, clear any written channels from
3652 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3653 /* Any temporary might be written, so no copy propagation
3654 * across this instruction.
3656 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3657 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3658 inst
->dst
.reladdr
) {
3659 /* Any output might be written, so no copy propagation
3660 * from outputs across this instruction.
3662 for (int r
= 0; r
< this->next_temp
; r
++) {
3663 for (int c
= 0; c
< 4; c
++) {
3664 if (!acp
[4 * r
+ c
])
3667 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3668 acp
[4 * r
+ c
] = NULL
;
3671 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3672 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3673 /* Clear where it's used as dst. */
3674 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3675 for (int c
= 0; c
< 4; c
++) {
3676 if (inst
->dst
.writemask
& (1 << c
)) {
3677 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3682 /* Clear where it's used as src. */
3683 for (int r
= 0; r
< this->next_temp
; r
++) {
3684 for (int c
= 0; c
< 4; c
++) {
3685 if (!acp
[4 * r
+ c
])
3688 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3690 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3691 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3692 inst
->dst
.writemask
& (1 << src_chan
))
3694 acp
[4 * r
+ c
] = NULL
;
3702 /* If this is a copy, add it to the ACP. */
3703 if (inst
->op
== TGSI_OPCODE_MOV
&&
3704 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3705 !(inst
->dst
.file
== inst
->src
[0].file
&&
3706 inst
->dst
.index
== inst
->src
[0].index
) &&
3707 !inst
->dst
.reladdr
&&
3709 !inst
->src
[0].reladdr
&&
3710 !inst
->src
[0].reladdr2
&&
3711 !inst
->src
[0].negate
) {
3712 for (int i
= 0; i
< 4; i
++) {
3713 if (inst
->dst
.writemask
& (1 << i
)) {
3714 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3715 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3721 ralloc_free(acp_level
);
3726 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3729 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3730 * will occur. As an example, a TXP production after copy propagation but
3733 * 0: MOV TEMP[1], INPUT[4].xyyy;
3734 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3735 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3737 * and after this pass:
3739 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3742 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3744 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3745 glsl_to_tgsi_instruction
*,
3746 this->next_temp
* 4);
3747 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3751 foreach_list(node
, &this->instructions
) {
3752 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3754 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3755 || inst
->dst
.index
< this->next_temp
);
3758 case TGSI_OPCODE_BGNLOOP
:
3759 case TGSI_OPCODE_ENDLOOP
:
3760 case TGSI_OPCODE_CONT
:
3761 case TGSI_OPCODE_BRK
:
3762 /* End of a basic block, clear the write array entirely.
3764 * This keeps us from killing dead code when the writes are
3765 * on either side of a loop, even when the register isn't touched
3766 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3767 * dead code of this type, so it shouldn't make a difference as long as
3768 * the dead code elimination pass in the GLSL compiler does its job.
3770 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3773 case TGSI_OPCODE_ENDIF
:
3774 case TGSI_OPCODE_ELSE
:
3775 /* Promote the recorded level of all channels written inside the
3776 * preceding if or else block to the level above the if/else block.
3778 for (int r
= 0; r
< this->next_temp
; r
++) {
3779 for (int c
= 0; c
< 4; c
++) {
3780 if (!writes
[4 * r
+ c
])
3783 if (write_level
[4 * r
+ c
] == level
)
3784 write_level
[4 * r
+ c
] = level
-1;
3788 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3793 case TGSI_OPCODE_IF
:
3794 case TGSI_OPCODE_UIF
:
3796 /* fallthrough to default case to mark the condition as read */
3799 /* Continuing the block, clear any channels from the write array that
3800 * are read by this instruction.
3802 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3803 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3804 /* Any temporary might be read, so no dead code elimination
3805 * across this instruction.
3807 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3808 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3809 /* Clear where it's used as src. */
3810 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3811 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3812 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3813 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3815 for (int c
= 0; c
< 4; c
++) {
3816 if (src_chans
& (1 << c
)) {
3817 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3822 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
3823 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
3824 /* Any temporary might be read, so no dead code elimination
3825 * across this instruction.
3827 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3828 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
3829 /* Clear where it's used as src. */
3830 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
3831 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
3832 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
3833 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
3835 for (int c
= 0; c
< 4; c
++) {
3836 if (src_chans
& (1 << c
)) {
3837 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
3845 /* If this instruction writes to a temporary, add it to the write array.
3846 * If there is already an instruction in the write array for one or more
3847 * of the channels, flag that channel write as dead.
3849 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3850 !inst
->dst
.reladdr
&&
3852 for (int c
= 0; c
< 4; c
++) {
3853 if (inst
->dst
.writemask
& (1 << c
)) {
3854 if (writes
[4 * inst
->dst
.index
+ c
]) {
3855 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3858 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3860 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3861 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3867 /* Anything still in the write array at this point is dead code. */
3868 for (int r
= 0; r
< this->next_temp
; r
++) {
3869 for (int c
= 0; c
< 4; c
++) {
3870 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3872 inst
->dead_mask
|= (1 << c
);
3876 /* Now actually remove the instructions that are completely dead and update
3877 * the writemask of other instructions with dead channels.
3879 foreach_list_safe(node
, &this->instructions
) {
3880 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3882 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3884 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3889 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3892 ralloc_free(write_level
);
3893 ralloc_free(writes
);
3898 /* Merges temporary registers together where possible to reduce the number of
3899 * registers needed to run a program.
3901 * Produces optimal code only after copy propagation and dead code elimination
3904 glsl_to_tgsi_visitor::merge_registers(void)
3906 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3907 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3910 /* Read the indices of the last read and first write to each temp register
3911 * into an array so that we don't have to traverse the instruction list as
3913 for (i
=0; i
< this->next_temp
; i
++) {
3914 last_reads
[i
] = get_last_temp_read(i
);
3915 first_writes
[i
] = get_first_temp_write(i
);
3918 /* Start looking for registers with non-overlapping usages that can be
3919 * merged together. */
3920 for (i
=0; i
< this->next_temp
; i
++) {
3921 /* Don't touch unused registers. */
3922 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3924 for (j
=0; j
< this->next_temp
; j
++) {
3925 /* Don't touch unused registers. */
3926 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3928 /* We can merge the two registers if the first write to j is after or
3929 * in the same instruction as the last read from i. Note that the
3930 * register at index i will always be used earlier or at the same time
3931 * as the register at index j. */
3932 if (first_writes
[i
] <= first_writes
[j
] &&
3933 last_reads
[i
] <= first_writes
[j
])
3935 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3937 /* Update the first_writes and last_reads arrays with the new
3938 * values for the merged register index, and mark the newly unused
3939 * register index as such. */
3940 last_reads
[i
] = last_reads
[j
];
3941 first_writes
[j
] = -1;
3947 ralloc_free(last_reads
);
3948 ralloc_free(first_writes
);
3951 /* Reassign indices to temporary registers by reusing unused indices created
3952 * by optimization passes. */
3954 glsl_to_tgsi_visitor::renumber_registers(void)
3959 for (i
=0; i
< this->next_temp
; i
++) {
3960 if (get_first_temp_read(i
) < 0) continue;
3962 rename_temp_register(i
, new_index
);
3966 this->next_temp
= new_index
;
3970 * Returns a fragment program which implements the current pixel transfer ops.
3971 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3974 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3975 glsl_to_tgsi_visitor
*original
,
3976 int scale_and_bias
, int pixel_maps
)
3978 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3979 struct st_context
*st
= st_context(original
->ctx
);
3980 struct gl_program
*prog
= &fp
->Base
.Base
;
3981 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3982 st_src_reg coord
, src0
;
3984 glsl_to_tgsi_instruction
*inst
;
3986 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3987 v
->ctx
= original
->ctx
;
3989 v
->shader_program
= NULL
;
3990 v
->glsl_version
= original
->glsl_version
;
3991 v
->native_integers
= original
->native_integers
;
3992 v
->options
= original
->options
;
3993 v
->next_temp
= original
->next_temp
;
3994 v
->num_address_regs
= original
->num_address_regs
;
3995 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3996 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3997 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3998 v
->num_immediates
= original
->num_immediates
;
4001 * Get initial pixel color from the texture.
4002 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
4004 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4005 src0
= v
->get_temp(glsl_type::vec4_type
);
4006 dst0
= st_dst_reg(src0
);
4007 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4009 inst
->tex_target
= TEXTURE_2D_INDEX
;
4011 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4012 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
4013 v
->samplers_used
|= (1 << 0);
4015 if (scale_and_bias
) {
4016 static const gl_state_index scale_state
[STATE_LENGTH
] =
4017 { STATE_INTERNAL
, STATE_PT_SCALE
,
4018 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4019 static const gl_state_index bias_state
[STATE_LENGTH
] =
4020 { STATE_INTERNAL
, STATE_PT_BIAS
,
4021 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
4022 GLint scale_p
, bias_p
;
4023 st_src_reg scale
, bias
;
4025 scale_p
= _mesa_add_state_reference(params
, scale_state
);
4026 bias_p
= _mesa_add_state_reference(params
, bias_state
);
4028 /* MAD colorTemp, colorTemp, scale, bias; */
4029 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
4030 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
4031 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
4035 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
4036 st_dst_reg temp_dst
= st_dst_reg(temp
);
4038 assert(st
->pixel_xfer
.pixelmap_texture
);
4040 /* With a little effort, we can do four pixel map look-ups with
4041 * two TEX instructions:
4044 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4045 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
4046 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4048 inst
->tex_target
= TEXTURE_2D_INDEX
;
4050 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4051 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
4052 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
4053 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
4055 inst
->tex_target
= TEXTURE_2D_INDEX
;
4057 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
4058 v
->samplers_used
|= (1 << 1);
4060 /* MOV colorTemp, temp; */
4061 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4064 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4066 foreach_list(node
, &original
->instructions
) {
4067 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4068 glsl_to_tgsi_instruction
*newinst
;
4069 st_src_reg src_regs
[3];
4071 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4072 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4074 for (int i
=0; i
<3; i
++) {
4075 src_regs
[i
] = inst
->src
[i
];
4076 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4077 src_regs
[i
].index
== VARYING_SLOT_COL0
)
4079 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4080 src_regs
[i
].index
= src0
.index
;
4082 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4083 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4086 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4087 newinst
->tex_target
= inst
->tex_target
;
4090 /* Make modifications to fragment program info. */
4091 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4092 original
->prog
->Parameters
);
4093 _mesa_free_parameter_list(params
);
4094 count_resources(v
, prog
);
4095 fp
->glsl_to_tgsi
= v
;
4099 * Make fragment program for glBitmap:
4100 * Sample the texture and kill the fragment if the bit is 0.
4101 * This program will be combined with the user's fragment program.
4103 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4106 get_bitmap_visitor(struct st_fragment_program
*fp
,
4107 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4109 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4110 struct st_context
*st
= st_context(original
->ctx
);
4111 struct gl_program
*prog
= &fp
->Base
.Base
;
4112 st_src_reg coord
, src0
;
4114 glsl_to_tgsi_instruction
*inst
;
4116 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4117 v
->ctx
= original
->ctx
;
4119 v
->shader_program
= NULL
;
4120 v
->glsl_version
= original
->glsl_version
;
4121 v
->native_integers
= original
->native_integers
;
4122 v
->options
= original
->options
;
4123 v
->next_temp
= original
->next_temp
;
4124 v
->num_address_regs
= original
->num_address_regs
;
4125 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4126 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4127 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4128 v
->num_immediates
= original
->num_immediates
;
4130 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4131 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4132 src0
= v
->get_temp(glsl_type::vec4_type
);
4133 dst0
= st_dst_reg(src0
);
4134 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4135 inst
->sampler
= samplerIndex
;
4136 inst
->tex_target
= TEXTURE_2D_INDEX
;
4138 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4139 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4140 v
->samplers_used
|= (1 << samplerIndex
);
4142 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4143 src0
.negate
= NEGATE_XYZW
;
4144 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4145 src0
.swizzle
= SWIZZLE_XXXX
;
4146 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4148 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4150 foreach_list(node
, &original
->instructions
) {
4151 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4152 glsl_to_tgsi_instruction
*newinst
;
4153 st_src_reg src_regs
[3];
4155 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4156 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4158 for (int i
=0; i
<3; i
++) {
4159 src_regs
[i
] = inst
->src
[i
];
4160 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4161 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4164 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4165 newinst
->tex_target
= inst
->tex_target
;
4168 /* Make modifications to fragment program info. */
4169 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4170 count_resources(v
, prog
);
4171 fp
->glsl_to_tgsi
= v
;
4174 /* ------------------------- TGSI conversion stuff -------------------------- */
4176 unsigned branch_target
;
4181 * Intermediate state used during shader translation.
4183 struct st_translate
{
4184 struct ureg_program
*ureg
;
4186 struct ureg_dst temps
[MAX_TEMPS
];
4187 struct ureg_dst arrays
[MAX_ARRAYS
];
4188 struct ureg_src
*constants
;
4189 struct ureg_src
*immediates
;
4190 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4191 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4192 struct ureg_dst address
[2];
4193 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4194 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4195 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4196 unsigned array_sizes
[MAX_ARRAYS
];
4198 const GLuint
*inputMapping
;
4199 const GLuint
*outputMapping
;
4201 /* For every instruction that contains a label (eg CALL), keep
4202 * details so that we can go back afterwards and emit the correct
4203 * tgsi instruction number for each label.
4205 struct label
*labels
;
4206 unsigned labels_size
;
4207 unsigned labels_count
;
4209 /* Keep a record of the tgsi instruction number that each mesa
4210 * instruction starts at, will be used to fix up labels after
4215 unsigned insn_count
;
4217 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4222 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4223 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4225 TGSI_SEMANTIC_VERTEXID
,
4226 TGSI_SEMANTIC_INSTANCEID
,
4227 TGSI_SEMANTIC_SAMPLEID
,
4228 TGSI_SEMANTIC_SAMPLEPOS
,
4229 TGSI_SEMANTIC_SAMPLEMASK
,
4230 TGSI_SEMANTIC_INVOCATIONID
,
4234 * Make note of a branch to a label in the TGSI code.
4235 * After we've emitted all instructions, we'll go over the list
4236 * of labels built here and patch the TGSI code with the actual
4237 * location of each label.
4239 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4243 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4244 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4245 t
->labels
= (struct label
*)realloc(t
->labels
,
4246 t
->labels_size
* sizeof(struct label
));
4247 if (t
->labels
== NULL
) {
4248 static unsigned dummy
;
4254 i
= t
->labels_count
++;
4255 t
->labels
[i
].branch_target
= branch_target
;
4256 return &t
->labels
[i
].token
;
4260 * Called prior to emitting the TGSI code for each instruction.
4261 * Allocate additional space for instructions if needed.
4262 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4263 * the next TGSI instruction.
4265 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4267 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4268 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4269 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4270 if (t
->insn
== NULL
) {
4276 t
->insn
[t
->insn_count
++] = start
;
4280 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4282 static struct ureg_src
4283 emit_immediate(struct st_translate
*t
,
4284 gl_constant_value values
[4],
4287 struct ureg_program
*ureg
= t
->ureg
;
4292 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4294 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4295 case GL_UNSIGNED_INT
:
4297 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4299 assert(!"should not get here - type must be float, int, uint, or bool");
4300 return ureg_src_undef();
4305 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4307 static struct ureg_dst
4308 dst_register(struct st_translate
*t
,
4309 gl_register_file file
,
4315 case PROGRAM_UNDEFINED
:
4316 return ureg_dst_undef();
4318 case PROGRAM_TEMPORARY
:
4320 assert(index
< (int) Elements(t
->temps
));
4322 if (ureg_dst_is_undef(t
->temps
[index
]))
4323 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4325 return t
->temps
[index
];
4328 array
= index
>> 16;
4331 assert(array
< (int) Elements(t
->arrays
));
4333 if (ureg_dst_is_undef(t
->arrays
[array
]))
4334 t
->arrays
[array
] = ureg_DECL_array_temporary(
4335 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4337 return ureg_dst_array_offset(t
->arrays
[array
],
4338 (int)(index
& 0xFFFF) - 0x8000);
4340 case PROGRAM_OUTPUT
:
4341 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4342 assert(index
< VARYING_SLOT_MAX
);
4343 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4344 assert(index
< FRAG_RESULT_MAX
);
4346 assert(index
< VARYING_SLOT_MAX
);
4348 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4350 return t
->outputs
[t
->outputMapping
[index
]];
4352 case PROGRAM_ADDRESS
:
4353 return t
->address
[index
];
4356 assert(!"unknown dst register file");
4357 return ureg_dst_undef();
4362 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4364 static struct ureg_src
4365 src_register(struct st_translate
*t
,
4366 gl_register_file file
,
4367 GLint index
, GLint index2D
)
4370 case PROGRAM_UNDEFINED
:
4371 return ureg_src_undef();
4373 case PROGRAM_TEMPORARY
:
4375 return ureg_src(dst_register(t
, file
, index
));
4377 case PROGRAM_UNIFORM
:
4379 return t
->constants
[index
];
4380 case PROGRAM_STATE_VAR
:
4381 case PROGRAM_CONSTANT
: /* ie, immediate */
4383 struct ureg_src src
;
4384 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4386 src
.DimensionIndex
= index2D
;
4388 } else if (index
< 0)
4389 return ureg_DECL_constant(t
->ureg
, 0);
4391 return t
->constants
[index
];
4393 case PROGRAM_IMMEDIATE
:
4394 return t
->immediates
[index
];
4397 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4398 return t
->inputs
[t
->inputMapping
[index
]];
4400 case PROGRAM_OUTPUT
:
4401 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4402 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4404 case PROGRAM_ADDRESS
:
4405 return ureg_src(t
->address
[index
]);
4407 case PROGRAM_SYSTEM_VALUE
:
4408 assert(index
< (int) Elements(t
->systemValues
));
4409 return t
->systemValues
[index
];
4412 assert(!"unknown src register file");
4413 return ureg_src_undef();
4418 * Create a TGSI ureg_dst register from an st_dst_reg.
4420 static struct ureg_dst
4421 translate_dst(struct st_translate
*t
,
4422 const st_dst_reg
*dst_reg
,
4423 bool saturate
, bool clamp_color
)
4425 struct ureg_dst dst
= dst_register(t
,
4429 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4432 dst
= ureg_saturate(dst
);
4433 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4434 /* Clamp colors for ARB_color_buffer_float. */
4435 switch (t
->procType
) {
4436 case TGSI_PROCESSOR_VERTEX
:
4437 /* XXX if the geometry shader is present, this must be done there
4438 * instead of here. */
4439 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4440 dst_reg
->index
== VARYING_SLOT_COL1
||
4441 dst_reg
->index
== VARYING_SLOT_BFC0
||
4442 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4443 dst
= ureg_saturate(dst
);
4447 case TGSI_PROCESSOR_FRAGMENT
:
4448 if (dst_reg
->index
== FRAG_RESULT_COLOR
||
4449 dst_reg
->index
>= FRAG_RESULT_DATA0
) {
4450 dst
= ureg_saturate(dst
);
4456 if (dst_reg
->reladdr
!= NULL
) {
4457 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4458 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4465 * Create a TGSI ureg_src register from an st_src_reg.
4467 static struct ureg_src
4468 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4470 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4472 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& src_reg
->has_index2
) {
4473 src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4474 if (src_reg
->reladdr2
)
4475 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4478 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4481 src
= ureg_swizzle(src
,
4482 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4483 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4484 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4485 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4487 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4488 src
= ureg_negate(src
);
4490 if (src_reg
->reladdr
!= NULL
) {
4491 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4492 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4498 static struct tgsi_texture_offset
4499 translate_tex_offset(struct st_translate
*t
,
4500 const st_src_reg
*in_offset
, int idx
)
4502 struct tgsi_texture_offset offset
;
4503 struct ureg_src imm_src
;
4504 struct ureg_dst dst
;
4507 switch (in_offset
->file
) {
4508 case PROGRAM_IMMEDIATE
:
4509 imm_src
= t
->immediates
[in_offset
->index
];
4511 offset
.File
= imm_src
.File
;
4512 offset
.Index
= imm_src
.Index
;
4513 offset
.SwizzleX
= imm_src
.SwizzleX
;
4514 offset
.SwizzleY
= imm_src
.SwizzleY
;
4515 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4518 case PROGRAM_TEMPORARY
:
4519 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4520 offset
.File
= imm_src
.File
;
4521 offset
.Index
= imm_src
.Index
;
4522 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4523 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4524 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4528 array
= in_offset
->index
>> 16;
4531 assert(array
< (int) Elements(t
->arrays
));
4533 dst
= t
->arrays
[array
];
4534 offset
.File
= dst
.File
;
4535 offset
.Index
= dst
.Index
+ (in_offset
->index
& 0xFFFF) - 0x8000;
4536 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4537 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4538 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4548 compile_tgsi_instruction(struct st_translate
*t
,
4549 const glsl_to_tgsi_instruction
*inst
,
4550 bool clamp_dst_color_output
)
4552 struct ureg_program
*ureg
= t
->ureg
;
4554 struct ureg_dst dst
[1];
4555 struct ureg_src src
[4];
4556 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4560 unsigned tex_target
;
4562 num_dst
= num_inst_dst_regs(inst
->op
);
4563 num_src
= num_inst_src_regs(inst
->op
);
4566 dst
[0] = translate_dst(t
,
4569 clamp_dst_color_output
);
4571 for (i
= 0; i
< num_src
; i
++)
4572 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4575 case TGSI_OPCODE_BGNLOOP
:
4576 case TGSI_OPCODE_CAL
:
4577 case TGSI_OPCODE_ELSE
:
4578 case TGSI_OPCODE_ENDLOOP
:
4579 case TGSI_OPCODE_IF
:
4580 case TGSI_OPCODE_UIF
:
4581 assert(num_dst
== 0);
4582 ureg_label_insn(ureg
,
4586 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4589 case TGSI_OPCODE_TEX
:
4590 case TGSI_OPCODE_TXB
:
4591 case TGSI_OPCODE_TXD
:
4592 case TGSI_OPCODE_TXL
:
4593 case TGSI_OPCODE_TXP
:
4594 case TGSI_OPCODE_TXQ
:
4595 case TGSI_OPCODE_TXF
:
4596 case TGSI_OPCODE_TEX2
:
4597 case TGSI_OPCODE_TXB2
:
4598 case TGSI_OPCODE_TXL2
:
4599 case TGSI_OPCODE_TG4
:
4600 case TGSI_OPCODE_LODQ
:
4601 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4602 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4603 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
4605 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4611 texoffsets
, inst
->tex_offset_num_offset
,
4615 case TGSI_OPCODE_SCS
:
4616 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4617 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4630 * Emit the TGSI instructions for inverting and adjusting WPOS.
4631 * This code is unavoidable because it also depends on whether
4632 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4635 emit_wpos_adjustment( struct st_translate
*t
,
4636 const struct gl_program
*program
,
4638 GLfloat adjX
, GLfloat adjY
[2])
4640 struct ureg_program
*ureg
= t
->ureg
;
4642 /* Fragment program uses fragment position input.
4643 * Need to replace instances of INPUT[WPOS] with temp T
4644 * where T = INPUT[WPOS] by y is inverted.
4646 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4647 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4648 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4650 /* XXX: note we are modifying the incoming shader here! Need to
4651 * do this before emitting the constant decls below, or this
4654 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4655 wposTransformState
);
4657 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4658 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4659 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4661 /* First, apply the coordinate shift: */
4662 if (adjX
|| adjY
[0] || adjY
[1]) {
4663 if (adjY
[0] != adjY
[1]) {
4664 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4665 * depending on whether inversion is actually going to be applied
4666 * or not, which is determined by testing against the inversion
4667 * state variable used below, which will be either +1 or -1.
4669 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4671 ureg_CMP(ureg
, adj_temp
,
4672 ureg_scalar(wpostrans
, invert
? 2 : 0),
4673 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4674 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4675 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4677 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4678 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4680 wpos_input
= ureg_src(wpos_temp
);
4682 /* MOV wpos_temp, input[wpos]
4684 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4687 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4688 * inversion/identity, or the other way around if we're drawing to an FBO.
4691 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4694 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4696 ureg_scalar(wpostrans
, 0),
4697 ureg_scalar(wpostrans
, 1));
4699 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4702 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4704 ureg_scalar(wpostrans
, 2),
4705 ureg_scalar(wpostrans
, 3));
4708 /* Use wpos_temp as position input from here on:
4710 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4715 * Emit fragment position/ooordinate code.
4718 emit_wpos(struct st_context
*st
,
4719 struct st_translate
*t
,
4720 const struct gl_program
*program
,
4721 struct ureg_program
*ureg
)
4723 const struct gl_fragment_program
*fp
=
4724 (const struct gl_fragment_program
*) program
;
4725 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4726 GLfloat adjX
= 0.0f
;
4727 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4728 boolean invert
= FALSE
;
4730 /* Query the pixel center conventions supported by the pipe driver and set
4731 * adjX, adjY to help out if it cannot handle the requested one internally.
4733 * The bias of the y-coordinate depends on whether y-inversion takes place
4734 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4735 * drawing to an FBO (causes additional inversion), and whether the the pipe
4736 * driver origin and the requested origin differ (the latter condition is
4737 * stored in the 'invert' variable).
4739 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4741 * center shift only:
4746 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4747 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4748 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4749 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4751 * inversion and center shift:
4752 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4753 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4754 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4755 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4757 if (fp
->OriginUpperLeft
) {
4758 /* Fragment shader wants origin in upper-left */
4759 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4760 /* the driver supports upper-left origin */
4762 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4763 /* the driver supports lower-left origin, need to invert Y */
4764 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4771 /* Fragment shader wants origin in lower-left */
4772 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4773 /* the driver supports lower-left origin */
4774 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4775 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4776 /* the driver supports upper-left origin, need to invert Y */
4782 if (fp
->PixelCenterInteger
) {
4783 /* Fragment shader wants pixel center integer */
4784 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4785 /* the driver supports pixel center integer */
4787 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4789 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4790 /* the driver supports pixel center half integer, need to bias X,Y */
4799 /* Fragment shader wants pixel center half integer */
4800 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4801 /* the driver supports pixel center half integer */
4803 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4804 /* the driver supports pixel center integer, need to bias X,Y */
4805 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4806 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4812 /* we invert after adjustment so that we avoid the MOV to temporary,
4813 * and reuse the adjustment ADD instead */
4814 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4818 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4819 * TGSI uses +1 for front, -1 for back.
4820 * This function converts the TGSI value to the GL value. Simply clamping/
4821 * saturating the value to [0,1] does the job.
4824 emit_face_var(struct st_translate
*t
)
4826 struct ureg_program
*ureg
= t
->ureg
;
4827 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4828 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4830 /* MOV_SAT face_temp, input[face] */
4831 face_temp
= ureg_saturate(face_temp
);
4832 ureg_MOV(ureg
, face_temp
, face_input
);
4834 /* Use face_temp as face input from here on: */
4835 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4839 emit_edgeflags(struct st_translate
*t
)
4841 struct ureg_program
*ureg
= t
->ureg
;
4842 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4843 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4845 ureg_MOV(ureg
, edge_dst
, edge_src
);
4849 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4850 * \param program the program to translate
4851 * \param numInputs number of input registers used
4852 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4854 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4855 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4857 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4858 * \param numOutputs number of output registers used
4859 * \param outputMapping maps Mesa fragment program outputs to TGSI
4861 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4862 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4865 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4867 extern "C" enum pipe_error
4868 st_translate_program(
4869 struct gl_context
*ctx
,
4871 struct ureg_program
*ureg
,
4872 glsl_to_tgsi_visitor
*program
,
4873 const struct gl_program
*proginfo
,
4875 const GLuint inputMapping
[],
4876 const ubyte inputSemanticName
[],
4877 const ubyte inputSemanticIndex
[],
4878 const GLuint interpMode
[],
4879 const GLboolean is_centroid
[],
4881 const GLuint outputMapping
[],
4882 const ubyte outputSemanticName
[],
4883 const ubyte outputSemanticIndex
[],
4884 boolean passthrough_edgeflags
,
4885 boolean clamp_color
)
4887 struct st_translate
*t
;
4889 enum pipe_error ret
= PIPE_OK
;
4891 assert(numInputs
<= Elements(t
->inputs
));
4892 assert(numOutputs
<= Elements(t
->outputs
));
4894 t
= CALLOC_STRUCT(st_translate
);
4896 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4900 memset(t
, 0, sizeof *t
);
4902 t
->procType
= procType
;
4903 t
->inputMapping
= inputMapping
;
4904 t
->outputMapping
= outputMapping
;
4907 if (program
->shader_program
) {
4908 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4909 struct gl_uniform_storage
*const storage
=
4910 &program
->shader_program
->UniformStorage
[i
];
4912 _mesa_uniform_detach_all_driver_storage(storage
);
4917 * Declare input attributes.
4919 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4920 for (i
= 0; i
< numInputs
; i
++) {
4921 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4922 inputSemanticName
[i
],
4923 inputSemanticIndex
[i
],
4928 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4929 /* Must do this after setting up t->inputs, and before
4930 * emitting constant references, below:
4932 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4935 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4939 * Declare output attributes.
4941 for (i
= 0; i
< numOutputs
; i
++) {
4942 switch (outputSemanticName
[i
]) {
4943 case TGSI_SEMANTIC_POSITION
:
4944 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4945 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4946 outputSemanticIndex
[i
]);
4947 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4949 case TGSI_SEMANTIC_STENCIL
:
4950 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4951 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4952 outputSemanticIndex
[i
]);
4953 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4955 case TGSI_SEMANTIC_COLOR
:
4956 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4957 TGSI_SEMANTIC_COLOR
,
4958 outputSemanticIndex
[i
]);
4960 case TGSI_SEMANTIC_SAMPLEMASK
:
4961 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4962 TGSI_SEMANTIC_SAMPLEMASK
,
4963 outputSemanticIndex
[i
]);
4964 /* TODO: If we ever support more than 32 samples, this will have
4965 * to become an array.
4967 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4970 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4971 ret
= PIPE_ERROR_BAD_INPUT
;
4976 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4977 for (i
= 0; i
< numInputs
; i
++) {
4978 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4980 inputSemanticName
[i
],
4981 inputSemanticIndex
[i
]);
4984 for (i
= 0; i
< numOutputs
; i
++) {
4985 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4986 outputSemanticName
[i
],
4987 outputSemanticIndex
[i
]);
4991 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4993 for (i
= 0; i
< numInputs
; i
++) {
4994 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4997 for (i
= 0; i
< numOutputs
; i
++) {
4998 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4999 outputSemanticName
[i
],
5000 outputSemanticIndex
[i
]);
5001 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
5002 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5004 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
5005 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
5006 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
5009 if (passthrough_edgeflags
)
5013 /* Declare address register.
5015 if (program
->num_address_regs
> 0) {
5016 assert(program
->num_address_regs
<= 2);
5017 t
->address
[0] = ureg_DECL_address(ureg
);
5018 if (program
->num_address_regs
== 2)
5019 t
->address
[1] = ureg_DECL_address(ureg
);
5022 /* Declare misc input registers
5025 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
5026 unsigned numSys
= 0;
5027 for (i
= 0; sysInputs
; i
++) {
5028 if (sysInputs
& (1 << i
)) {
5029 unsigned semName
= mesa_sysval_to_semantic
[i
];
5030 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
5031 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
5032 semName
== TGSI_SEMANTIC_VERTEXID
) {
5033 /* From Gallium perspective, these system values are always
5034 * integer, and require native integer support. However, if
5035 * native integer is supported on the vertex stage but not the
5036 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5037 * assumes these system values are floats. To resolve the
5038 * inconsistency, we insert a U2F.
5040 struct st_context
*st
= st_context(ctx
);
5041 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5042 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5043 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
5044 if (!ctx
->Const
.NativeIntegers
) {
5045 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
5046 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
5047 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
5051 sysInputs
&= ~(1 << i
);
5056 /* Copy over array sizes
5058 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
5060 /* Emit constants and uniforms. TGSI uses a single index space for these,
5061 * so we put all the translated regs in t->constants.
5063 if (proginfo
->Parameters
) {
5064 t
->constants
= (struct ureg_src
*)
5065 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
5066 if (t
->constants
== NULL
) {
5067 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5071 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
5072 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
5073 case PROGRAM_STATE_VAR
:
5074 case PROGRAM_UNIFORM
:
5075 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5078 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5079 * addressing of the const buffer.
5080 * FIXME: Be smarter and recognize param arrays:
5081 * indirect addressing is only valid within the referenced
5084 case PROGRAM_CONSTANT
:
5085 if (program
->indirect_addr_consts
)
5086 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5088 t
->constants
[i
] = emit_immediate(t
,
5089 proginfo
->Parameters
->ParameterValues
[i
],
5090 proginfo
->Parameters
->Parameters
[i
].DataType
,
5099 if (program
->shader_program
) {
5100 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
5102 for (i
= 0; i
< num_ubos
; i
++) {
5103 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
5107 /* Emit immediate values.
5109 t
->immediates
= (struct ureg_src
*)
5110 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5111 if (t
->immediates
== NULL
) {
5112 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5116 foreach_list(node
, &program
->immediates
) {
5117 immediate_storage
*imm
= (immediate_storage
*) node
;
5118 assert(i
< program
->num_immediates
);
5119 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
5121 assert(i
== program
->num_immediates
);
5123 /* texture samplers */
5124 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5125 if (program
->samplers_used
& (1 << i
)) {
5126 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5130 /* Emit each instruction in turn:
5132 foreach_list(n
, &program
->instructions
) {
5133 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5134 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*) n
, clamp_color
);
5137 /* Fix up all emitted labels:
5139 for (i
= 0; i
< t
->labels_count
; i
++) {
5140 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5141 t
->insn
[t
->labels
[i
].branch_target
]);
5144 if (program
->shader_program
) {
5145 /* This has to be done last. Any operation the can cause
5146 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5147 * program constant) has to happen before creating this linkage.
5149 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5150 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5153 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5154 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5163 free(t
->immediates
);
5166 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5174 /* ----------------------------- End TGSI code ------------------------------ */
5178 shader_stage_to_ptarget(gl_shader_stage stage
)
5181 case MESA_SHADER_VERTEX
:
5182 return PIPE_SHADER_VERTEX
;
5183 case MESA_SHADER_FRAGMENT
:
5184 return PIPE_SHADER_FRAGMENT
;
5185 case MESA_SHADER_GEOMETRY
:
5186 return PIPE_SHADER_GEOMETRY
;
5187 case MESA_SHADER_COMPUTE
:
5188 return PIPE_SHADER_COMPUTE
;
5191 assert(!"should not be reached");
5192 return PIPE_SHADER_VERTEX
;
5197 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5198 * generating Mesa IR.
5200 static struct gl_program
*
5201 get_mesa_program(struct gl_context
*ctx
,
5202 struct gl_shader_program
*shader_program
,
5203 struct gl_shader
*shader
)
5205 glsl_to_tgsi_visitor
* v
;
5206 struct gl_program
*prog
;
5207 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5209 struct gl_shader_compiler_options
*options
=
5210 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5211 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5212 unsigned ptarget
= shader_stage_to_ptarget(shader
->Stage
);
5214 validate_ir_tree(shader
->ir
);
5216 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5219 prog
->Parameters
= _mesa_new_parameter_list();
5220 v
= new glsl_to_tgsi_visitor();
5223 v
->shader_program
= shader_program
;
5224 v
->options
= options
;
5225 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5226 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5228 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5229 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5231 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5234 /* Remove reads from output registers. */
5235 lower_output_reads(shader
->ir
);
5237 /* Emit intermediate IR for main(). */
5238 visit_exec_list(shader
->ir
, v
);
5240 /* Now emit bodies for any functions that were used. */
5242 progress
= GL_FALSE
;
5244 foreach_list(node
, &v
->function_signatures
) {
5245 function_entry
*entry
= (function_entry
*) node
;
5247 if (!entry
->bgn_inst
) {
5248 v
->current_function
= entry
;
5250 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5251 entry
->bgn_inst
->function
= entry
;
5253 visit_exec_list(&entry
->sig
->body
, v
);
5255 glsl_to_tgsi_instruction
*last
;
5256 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5257 if (last
->op
!= TGSI_OPCODE_RET
)
5258 v
->emit(NULL
, TGSI_OPCODE_RET
);
5260 glsl_to_tgsi_instruction
*end
;
5261 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5262 end
->function
= entry
;
5270 /* Print out some information (for debugging purposes) used by the
5271 * optimization passes. */
5272 for (i
=0; i
< v
->next_temp
; i
++) {
5273 int fr
= v
->get_first_temp_read(i
);
5274 int fw
= v
->get_first_temp_write(i
);
5275 int lr
= v
->get_last_temp_read(i
);
5276 int lw
= v
->get_last_temp_write(i
);
5278 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5283 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5285 v
->copy_propagate();
5286 while (v
->eliminate_dead_code());
5288 v
->merge_registers();
5289 v
->renumber_registers();
5291 /* Write the END instruction. */
5292 v
->emit(NULL
, TGSI_OPCODE_END
);
5294 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5296 printf("GLSL IR for linked %s program %d:\n",
5297 _mesa_shader_stage_to_string(shader
->Stage
),
5298 shader_program
->Name
);
5299 _mesa_print_ir(stdout
, shader
->ir
, NULL
);
5305 prog
->Instructions
= NULL
;
5306 prog
->NumInstructions
= 0;
5308 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5309 count_resources(v
, prog
);
5311 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5313 /* This has to be done last. Any operation the can cause
5314 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5315 * program constant) has to happen before creating this linkage.
5317 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5318 if (!shader_program
->LinkStatus
) {
5322 struct st_vertex_program
*stvp
;
5323 struct st_fragment_program
*stfp
;
5324 struct st_geometry_program
*stgp
;
5326 switch (shader
->Type
) {
5327 case GL_VERTEX_SHADER
:
5328 stvp
= (struct st_vertex_program
*)prog
;
5329 stvp
->glsl_to_tgsi
= v
;
5331 case GL_FRAGMENT_SHADER
:
5332 stfp
= (struct st_fragment_program
*)prog
;
5333 stfp
->glsl_to_tgsi
= v
;
5335 case GL_GEOMETRY_SHADER
:
5336 stgp
= (struct st_geometry_program
*)prog
;
5337 stgp
->glsl_to_tgsi
= v
;
5338 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5339 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5340 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5341 stgp
->Base
.Invocations
= shader_program
->Geom
.Invocations
;
5344 assert(!"should not be reached");
5354 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5356 struct gl_shader
*shader
;
5357 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5358 type
== GL_GEOMETRY_SHADER_ARB
);
5359 shader
= rzalloc(NULL
, struct gl_shader
);
5361 shader
->Type
= type
;
5362 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5363 shader
->Name
= name
;
5364 _mesa_init_shader(ctx
, shader
);
5369 struct gl_shader_program
*
5370 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5372 struct gl_shader_program
*shProg
;
5373 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5375 shProg
->Name
= name
;
5376 _mesa_init_shader_program(ctx
, shProg
);
5383 * Called via ctx->Driver.LinkShader()
5384 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5385 * with code lowering and other optimizations.
5388 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5390 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5391 assert(prog
->LinkStatus
);
5393 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5394 if (prog
->_LinkedShaders
[i
] == NULL
)
5398 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5399 const struct gl_shader_compiler_options
*options
=
5400 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5402 /* If there are forms of indirect addressing that the driver
5403 * cannot handle, perform the lowering pass.
5405 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5406 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5407 lower_variable_index_to_cond_assign(ir
,
5408 options
->EmitNoIndirectInput
,
5409 options
->EmitNoIndirectOutput
,
5410 options
->EmitNoIndirectTemp
,
5411 options
->EmitNoIndirectUniform
);
5414 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5415 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5416 LOWER_UNPACK_SNORM_2x16
|
5417 LOWER_PACK_UNORM_2x16
|
5418 LOWER_UNPACK_UNORM_2x16
|
5419 LOWER_PACK_SNORM_4x8
|
5420 LOWER_UNPACK_SNORM_4x8
|
5421 LOWER_UNPACK_UNORM_4x8
|
5422 LOWER_PACK_UNORM_4x8
|
5423 LOWER_PACK_HALF_2x16
|
5424 LOWER_UNPACK_HALF_2x16
;
5426 lower_packing_builtins(ir
, lower_inst
);
5429 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TEXTURE_GATHER_OFFSETS
))
5430 lower_offset_arrays(ir
);
5431 do_mat_op_to_vec(ir
);
5432 lower_instructions(ir
,
5440 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5441 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5443 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5444 do_vec_index_to_cond_assign(ir
);
5445 lower_vector_insert(ir
, true);
5446 lower_quadop_vector(ir
, false);
5448 if (options
->MaxIfDepth
== 0) {
5455 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5457 progress
= do_common_optimization(ir
, true, true, options
,
5458 ctx
->Const
.NativeIntegers
)
5461 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5465 validate_ir_tree(ir
);
5468 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5469 struct gl_program
*linked_prog
;
5471 if (prog
->_LinkedShaders
[i
] == NULL
)
5474 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5477 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5479 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5480 _mesa_shader_stage_to_program(i
),
5482 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5484 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5489 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5496 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5497 const GLuint outputMapping
[],
5498 struct pipe_stream_output_info
*so
)
5501 struct gl_transform_feedback_info
*info
=
5502 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5504 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5505 so
->output
[i
].register_index
=
5506 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5507 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5508 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5509 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5510 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5513 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5514 so
->stride
[i
] = info
->BufferStride
[i
];
5516 so
->num_outputs
= info
->NumOutputs
;