st/mesa: add switch case for ir_txf_ms to silence warning
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
79
80 /**
81 * Maximum number of temporary registers.
82 *
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
85 */
86 #define MAX_TEMPS 4096
87
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
90
91 class st_src_reg;
92 class st_dst_reg;
93
94 static int swizzle_for_size(int size);
95
96 /**
97 * This struct is a corresponding struct to TGSI ureg_src.
98 */
99 class st_src_reg {
100 public:
101 st_src_reg(gl_register_file file, int index, const glsl_type *type)
102 {
103 this->file = file;
104 this->index = index;
105 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
106 this->swizzle = swizzle_for_size(type->vector_elements);
107 else
108 this->swizzle = SWIZZLE_XYZW;
109 this->negate = 0;
110 this->index2D = 0;
111 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
112 this->reladdr = NULL;
113 }
114
115 st_src_reg(gl_register_file file, int index, int type)
116 {
117 this->type = type;
118 this->file = file;
119 this->index = index;
120 this->index2D = 0;
121 this->swizzle = SWIZZLE_XYZW;
122 this->negate = 0;
123 this->reladdr = NULL;
124 }
125
126 st_src_reg(gl_register_file file, int index, int type, int index2D)
127 {
128 this->type = type;
129 this->file = file;
130 this->index = index;
131 this->index2D = index2D;
132 this->swizzle = SWIZZLE_XYZW;
133 this->negate = 0;
134 this->reladdr = NULL;
135 }
136
137 st_src_reg()
138 {
139 this->type = GLSL_TYPE_ERROR;
140 this->file = PROGRAM_UNDEFINED;
141 this->index = 0;
142 this->index2D = 0;
143 this->swizzle = 0;
144 this->negate = 0;
145 this->reladdr = NULL;
146 }
147
148 explicit st_src_reg(st_dst_reg reg);
149
150 gl_register_file file; /**< PROGRAM_* from Mesa */
151 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
152 int index2D;
153 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
154 int negate; /**< NEGATE_XYZW mask from mesa */
155 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
156 /** Register index should be offset by the integer in this reg. */
157 st_src_reg *reladdr;
158 };
159
160 class st_dst_reg {
161 public:
162 st_dst_reg(gl_register_file file, int writemask, int type)
163 {
164 this->file = file;
165 this->index = 0;
166 this->writemask = writemask;
167 this->cond_mask = COND_TR;
168 this->reladdr = NULL;
169 this->type = type;
170 }
171
172 st_dst_reg()
173 {
174 this->type = GLSL_TYPE_ERROR;
175 this->file = PROGRAM_UNDEFINED;
176 this->index = 0;
177 this->writemask = 0;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 }
181
182 explicit st_dst_reg(st_src_reg reg);
183
184 gl_register_file file; /**< PROGRAM_* from Mesa */
185 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
186 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
187 GLuint cond_mask:4;
188 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
189 /** Register index should be offset by the integer in this reg. */
190 st_src_reg *reladdr;
191 };
192
193 st_src_reg::st_src_reg(st_dst_reg reg)
194 {
195 this->type = reg.type;
196 this->file = reg.file;
197 this->index = reg.index;
198 this->swizzle = SWIZZLE_XYZW;
199 this->negate = 0;
200 this->reladdr = reg.reladdr;
201 this->index2D = 0;
202 }
203
204 st_dst_reg::st_dst_reg(st_src_reg reg)
205 {
206 this->type = reg.type;
207 this->file = reg.file;
208 this->index = reg.index;
209 this->writemask = WRITEMASK_XYZW;
210 this->cond_mask = COND_TR;
211 this->reladdr = reg.reladdr;
212 }
213
214 class glsl_to_tgsi_instruction : public exec_node {
215 public:
216 /* Callers of this ralloc-based new need not call delete. It's
217 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
218 static void* operator new(size_t size, void *ctx)
219 {
220 void *node;
221
222 node = rzalloc_size(ctx, size);
223 assert(node != NULL);
224
225 return node;
226 }
227
228 unsigned op;
229 st_dst_reg dst;
230 st_src_reg src[3];
231 /** Pointer to the ir source this tree came from for debugging */
232 ir_instruction *ir;
233 GLboolean cond_update;
234 bool saturate;
235 int sampler; /**< sampler index */
236 int tex_target; /**< One of TEXTURE_*_INDEX */
237 GLboolean tex_shadow;
238 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
239 unsigned tex_offset_num_offset;
240 int dead_mask; /**< Used in dead code elimination */
241
242 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
243 };
244
245 class variable_storage : public exec_node {
246 public:
247 variable_storage(ir_variable *var, gl_register_file file, int index)
248 : file(file), index(index), var(var)
249 {
250 /* empty */
251 }
252
253 gl_register_file file;
254 int index;
255 ir_variable *var; /* variable that maps to this, if any */
256 };
257
258 class immediate_storage : public exec_node {
259 public:
260 immediate_storage(gl_constant_value *values, int size, int type)
261 {
262 memcpy(this->values, values, size * sizeof(gl_constant_value));
263 this->size = size;
264 this->type = type;
265 }
266
267 gl_constant_value values[4];
268 int size; /**< Number of components (1-4) */
269 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
270 };
271
272 class function_entry : public exec_node {
273 public:
274 ir_function_signature *sig;
275
276 /**
277 * identifier of this function signature used by the program.
278 *
279 * At the point that TGSI instructions for function calls are
280 * generated, we don't know the address of the first instruction of
281 * the function body. So we make the BranchTarget that is called a
282 * small integer and rewrite them during set_branchtargets().
283 */
284 int sig_id;
285
286 /**
287 * Pointer to first instruction of the function body.
288 *
289 * Set during function body emits after main() is processed.
290 */
291 glsl_to_tgsi_instruction *bgn_inst;
292
293 /**
294 * Index of the first instruction of the function body in actual TGSI.
295 *
296 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
297 */
298 int inst;
299
300 /** Storage for the return value. */
301 st_src_reg return_reg;
302 };
303
304 struct glsl_to_tgsi_visitor : public ir_visitor {
305 public:
306 glsl_to_tgsi_visitor();
307 ~glsl_to_tgsi_visitor();
308
309 function_entry *current_function;
310
311 struct gl_context *ctx;
312 struct gl_program *prog;
313 struct gl_shader_program *shader_program;
314 struct gl_shader_compiler_options *options;
315
316 int next_temp;
317
318 int num_address_regs;
319 int samplers_used;
320 bool indirect_addr_temps;
321 bool indirect_addr_consts;
322
323 int glsl_version;
324 bool native_integers;
325 bool have_sqrt;
326
327 variable_storage *find_variable_storage(ir_variable *var);
328
329 int add_constant(gl_register_file file, gl_constant_value values[4],
330 int size, int datatype, GLuint *swizzle_out);
331
332 function_entry *get_function_signature(ir_function_signature *sig);
333
334 st_src_reg get_temp(const glsl_type *type);
335 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
336
337 st_src_reg st_src_reg_for_float(float val);
338 st_src_reg st_src_reg_for_int(int val);
339 st_src_reg st_src_reg_for_type(int type, int val);
340
341 /**
342 * \name Visit methods
343 *
344 * As typical for the visitor pattern, there must be one \c visit method for
345 * each concrete subclass of \c ir_instruction. Virtual base classes within
346 * the hierarchy should not have \c visit methods.
347 */
348 /*@{*/
349 virtual void visit(ir_variable *);
350 virtual void visit(ir_loop *);
351 virtual void visit(ir_loop_jump *);
352 virtual void visit(ir_function_signature *);
353 virtual void visit(ir_function *);
354 virtual void visit(ir_expression *);
355 virtual void visit(ir_swizzle *);
356 virtual void visit(ir_dereference_variable *);
357 virtual void visit(ir_dereference_array *);
358 virtual void visit(ir_dereference_record *);
359 virtual void visit(ir_assignment *);
360 virtual void visit(ir_constant *);
361 virtual void visit(ir_call *);
362 virtual void visit(ir_return *);
363 virtual void visit(ir_discard *);
364 virtual void visit(ir_texture *);
365 virtual void visit(ir_if *);
366 /*@}*/
367
368 st_src_reg result;
369
370 /** List of variable_storage */
371 exec_list variables;
372
373 /** List of immediate_storage */
374 exec_list immediates;
375 unsigned num_immediates;
376
377 /** List of function_entry */
378 exec_list function_signatures;
379 int next_signature_id;
380
381 /** List of glsl_to_tgsi_instruction */
382 exec_list instructions;
383
384 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
385
386 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
387 st_dst_reg dst, st_src_reg src0);
388
389 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
390 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
391
392 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
393 st_dst_reg dst,
394 st_src_reg src0, st_src_reg src1, st_src_reg src2);
395
396 unsigned get_opcode(ir_instruction *ir, unsigned op,
397 st_dst_reg dst,
398 st_src_reg src0, st_src_reg src1);
399
400 /**
401 * Emit the correct dot-product instruction for the type of arguments
402 */
403 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
404 st_dst_reg dst,
405 st_src_reg src0,
406 st_src_reg src1,
407 unsigned elements);
408
409 void emit_scalar(ir_instruction *ir, unsigned op,
410 st_dst_reg dst, st_src_reg src0);
411
412 void emit_scalar(ir_instruction *ir, unsigned op,
413 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
414
415 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
416
417 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
418
419 void emit_scs(ir_instruction *ir, unsigned op,
420 st_dst_reg dst, const st_src_reg &src);
421
422 bool try_emit_mad(ir_expression *ir,
423 int mul_operand);
424 bool try_emit_mad_for_and_not(ir_expression *ir,
425 int mul_operand);
426 bool try_emit_sat(ir_expression *ir);
427
428 void emit_swz(ir_expression *ir);
429
430 bool process_move_condition(ir_rvalue *ir);
431
432 void simplify_cmp(void);
433
434 void rename_temp_register(int index, int new_index);
435 int get_first_temp_read(int index);
436 int get_first_temp_write(int index);
437 int get_last_temp_read(int index);
438 int get_last_temp_write(int index);
439
440 void copy_propagate(void);
441 void eliminate_dead_code(void);
442 int eliminate_dead_code_advanced(void);
443 void merge_registers(void);
444 void renumber_registers(void);
445
446 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
447 st_dst_reg *l, st_src_reg *r);
448
449 void *mem_ctx;
450 };
451
452 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
453
454 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
455
456 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
457
458 static void
459 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
460
461 static void
462 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
463 {
464 va_list args;
465 va_start(args, fmt);
466 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
467 va_end(args);
468
469 prog->LinkStatus = GL_FALSE;
470 }
471
472 static int
473 swizzle_for_size(int size)
474 {
475 int size_swizzles[4] = {
476 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
477 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
478 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
479 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
480 };
481
482 assert((size >= 1) && (size <= 4));
483 return size_swizzles[size - 1];
484 }
485
486 static bool
487 is_tex_instruction(unsigned opcode)
488 {
489 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
490 return info->is_tex;
491 }
492
493 static unsigned
494 num_inst_dst_regs(unsigned opcode)
495 {
496 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
497 return info->num_dst;
498 }
499
500 static unsigned
501 num_inst_src_regs(unsigned opcode)
502 {
503 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
504 return info->is_tex ? info->num_src - 1 : info->num_src;
505 }
506
507 glsl_to_tgsi_instruction *
508 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
509 st_dst_reg dst,
510 st_src_reg src0, st_src_reg src1, st_src_reg src2)
511 {
512 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
513 int num_reladdr = 0, i;
514
515 op = get_opcode(ir, op, dst, src0, src1);
516
517 /* If we have to do relative addressing, we want to load the ARL
518 * reg directly for one of the regs, and preload the other reladdr
519 * sources into temps.
520 */
521 num_reladdr += dst.reladdr != NULL;
522 num_reladdr += src0.reladdr != NULL;
523 num_reladdr += src1.reladdr != NULL;
524 num_reladdr += src2.reladdr != NULL;
525
526 reladdr_to_temp(ir, &src2, &num_reladdr);
527 reladdr_to_temp(ir, &src1, &num_reladdr);
528 reladdr_to_temp(ir, &src0, &num_reladdr);
529
530 if (dst.reladdr) {
531 emit_arl(ir, address_reg, *dst.reladdr);
532 num_reladdr--;
533 }
534 assert(num_reladdr == 0);
535
536 inst->op = op;
537 inst->dst = dst;
538 inst->src[0] = src0;
539 inst->src[1] = src1;
540 inst->src[2] = src2;
541 inst->ir = ir;
542 inst->dead_mask = 0;
543
544 inst->function = NULL;
545
546 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
547 this->num_address_regs = 1;
548
549 /* Update indirect addressing status used by TGSI */
550 if (dst.reladdr) {
551 switch(dst.file) {
552 case PROGRAM_TEMPORARY:
553 this->indirect_addr_temps = true;
554 break;
555 case PROGRAM_LOCAL_PARAM:
556 case PROGRAM_ENV_PARAM:
557 case PROGRAM_STATE_VAR:
558 case PROGRAM_CONSTANT:
559 case PROGRAM_UNIFORM:
560 this->indirect_addr_consts = true;
561 break;
562 case PROGRAM_IMMEDIATE:
563 assert(!"immediates should not have indirect addressing");
564 break;
565 default:
566 break;
567 }
568 }
569 else {
570 for (i=0; i<3; i++) {
571 if(inst->src[i].reladdr) {
572 switch(inst->src[i].file) {
573 case PROGRAM_TEMPORARY:
574 this->indirect_addr_temps = true;
575 break;
576 case PROGRAM_LOCAL_PARAM:
577 case PROGRAM_ENV_PARAM:
578 case PROGRAM_STATE_VAR:
579 case PROGRAM_CONSTANT:
580 case PROGRAM_UNIFORM:
581 this->indirect_addr_consts = true;
582 break;
583 case PROGRAM_IMMEDIATE:
584 assert(!"immediates should not have indirect addressing");
585 break;
586 default:
587 break;
588 }
589 }
590 }
591 }
592
593 this->instructions.push_tail(inst);
594
595 if (native_integers)
596 try_emit_float_set(ir, op, dst);
597
598 return inst;
599 }
600
601
602 glsl_to_tgsi_instruction *
603 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
604 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
605 {
606 return emit(ir, op, dst, src0, src1, undef_src);
607 }
608
609 glsl_to_tgsi_instruction *
610 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
611 st_dst_reg dst, st_src_reg src0)
612 {
613 assert(dst.writemask != 0);
614 return emit(ir, op, dst, src0, undef_src, undef_src);
615 }
616
617 glsl_to_tgsi_instruction *
618 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
619 {
620 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
621 }
622
623 /**
624 * Emits the code to convert the result of float SET instructions to integers.
625 */
626 void
627 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
628 st_dst_reg dst)
629 {
630 if ((op == TGSI_OPCODE_SEQ ||
631 op == TGSI_OPCODE_SNE ||
632 op == TGSI_OPCODE_SGE ||
633 op == TGSI_OPCODE_SLT))
634 {
635 st_src_reg src = st_src_reg(dst);
636 src.negate = ~src.negate;
637 dst.type = GLSL_TYPE_FLOAT;
638 emit(ir, TGSI_OPCODE_F2I, dst, src);
639 }
640 }
641
642 /**
643 * Determines whether to use an integer, unsigned integer, or float opcode
644 * based on the operands and input opcode, then emits the result.
645 */
646 unsigned
647 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
648 st_dst_reg dst,
649 st_src_reg src0, st_src_reg src1)
650 {
651 int type = GLSL_TYPE_FLOAT;
652
653 assert(src0.type != GLSL_TYPE_ARRAY);
654 assert(src0.type != GLSL_TYPE_STRUCT);
655 assert(src1.type != GLSL_TYPE_ARRAY);
656 assert(src1.type != GLSL_TYPE_STRUCT);
657
658 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
659 type = GLSL_TYPE_FLOAT;
660 else if (native_integers)
661 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
662
663 #define case4(c, f, i, u) \
664 case TGSI_OPCODE_##c: \
665 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
666 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
667 else op = TGSI_OPCODE_##f; \
668 break;
669 #define case3(f, i, u) case4(f, f, i, u)
670 #define case2fi(f, i) case4(f, f, i, i)
671 #define case2iu(i, u) case4(i, LAST, i, u)
672
673 switch(op) {
674 case2fi(ADD, UADD);
675 case2fi(MUL, UMUL);
676 case2fi(MAD, UMAD);
677 case3(DIV, IDIV, UDIV);
678 case3(MAX, IMAX, UMAX);
679 case3(MIN, IMIN, UMIN);
680 case2iu(MOD, UMOD);
681
682 case2fi(SEQ, USEQ);
683 case2fi(SNE, USNE);
684 case3(SGE, ISGE, USGE);
685 case3(SLT, ISLT, USLT);
686
687 case2iu(ISHR, USHR);
688
689 case2fi(SSG, ISSG);
690 case3(ABS, IABS, IABS);
691
692 default: break;
693 }
694
695 assert(op != TGSI_OPCODE_LAST);
696 return op;
697 }
698
699 glsl_to_tgsi_instruction *
700 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
701 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
702 unsigned elements)
703 {
704 static const unsigned dot_opcodes[] = {
705 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
706 };
707
708 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
709 }
710
711 /**
712 * Emits TGSI scalar opcodes to produce unique answers across channels.
713 *
714 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
715 * channel determines the result across all channels. So to do a vec4
716 * of this operation, we want to emit a scalar per source channel used
717 * to produce dest channels.
718 */
719 void
720 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
721 st_dst_reg dst,
722 st_src_reg orig_src0, st_src_reg orig_src1)
723 {
724 int i, j;
725 int done_mask = ~dst.writemask;
726
727 /* TGSI RCP is a scalar operation splatting results to all channels,
728 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
729 * dst channels.
730 */
731 for (i = 0; i < 4; i++) {
732 GLuint this_mask = (1 << i);
733 glsl_to_tgsi_instruction *inst;
734 st_src_reg src0 = orig_src0;
735 st_src_reg src1 = orig_src1;
736
737 if (done_mask & this_mask)
738 continue;
739
740 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
741 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
742 for (j = i + 1; j < 4; j++) {
743 /* If there is another enabled component in the destination that is
744 * derived from the same inputs, generate its value on this pass as
745 * well.
746 */
747 if (!(done_mask & (1 << j)) &&
748 GET_SWZ(src0.swizzle, j) == src0_swiz &&
749 GET_SWZ(src1.swizzle, j) == src1_swiz) {
750 this_mask |= (1 << j);
751 }
752 }
753 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
754 src0_swiz, src0_swiz);
755 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
756 src1_swiz, src1_swiz);
757
758 inst = emit(ir, op, dst, src0, src1);
759 inst->dst.writemask = this_mask;
760 done_mask |= this_mask;
761 }
762 }
763
764 void
765 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
766 st_dst_reg dst, st_src_reg src0)
767 {
768 st_src_reg undef = undef_src;
769
770 undef.swizzle = SWIZZLE_XXXX;
771
772 emit_scalar(ir, op, dst, src0, undef);
773 }
774
775 void
776 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
777 st_dst_reg dst, st_src_reg src0)
778 {
779 int op = TGSI_OPCODE_ARL;
780
781 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
782 op = TGSI_OPCODE_UARL;
783
784 emit(NULL, op, dst, src0);
785 }
786
787 /**
788 * Emit an TGSI_OPCODE_SCS instruction
789 *
790 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
791 * Instead of splatting its result across all four components of the
792 * destination, it writes one value to the \c x component and another value to
793 * the \c y component.
794 *
795 * \param ir IR instruction being processed
796 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
797 * on which value is desired.
798 * \param dst Destination register
799 * \param src Source register
800 */
801 void
802 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
803 st_dst_reg dst,
804 const st_src_reg &src)
805 {
806 /* Vertex programs cannot use the SCS opcode.
807 */
808 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
809 emit_scalar(ir, op, dst, src);
810 return;
811 }
812
813 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
814 const unsigned scs_mask = (1U << component);
815 int done_mask = ~dst.writemask;
816 st_src_reg tmp;
817
818 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
819
820 /* If there are compnents in the destination that differ from the component
821 * that will be written by the SCS instrution, we'll need a temporary.
822 */
823 if (scs_mask != unsigned(dst.writemask)) {
824 tmp = get_temp(glsl_type::vec4_type);
825 }
826
827 for (unsigned i = 0; i < 4; i++) {
828 unsigned this_mask = (1U << i);
829 st_src_reg src0 = src;
830
831 if ((done_mask & this_mask) != 0)
832 continue;
833
834 /* The source swizzle specified which component of the source generates
835 * sine / cosine for the current component in the destination. The SCS
836 * instruction requires that this value be swizzle to the X component.
837 * Replace the current swizzle with a swizzle that puts the source in
838 * the X component.
839 */
840 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
841
842 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
843 src0_swiz, src0_swiz);
844 for (unsigned j = i + 1; j < 4; j++) {
845 /* If there is another enabled component in the destination that is
846 * derived from the same inputs, generate its value on this pass as
847 * well.
848 */
849 if (!(done_mask & (1 << j)) &&
850 GET_SWZ(src0.swizzle, j) == src0_swiz) {
851 this_mask |= (1 << j);
852 }
853 }
854
855 if (this_mask != scs_mask) {
856 glsl_to_tgsi_instruction *inst;
857 st_dst_reg tmp_dst = st_dst_reg(tmp);
858
859 /* Emit the SCS instruction.
860 */
861 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
862 inst->dst.writemask = scs_mask;
863
864 /* Move the result of the SCS instruction to the desired location in
865 * the destination.
866 */
867 tmp.swizzle = MAKE_SWIZZLE4(component, component,
868 component, component);
869 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
870 inst->dst.writemask = this_mask;
871 } else {
872 /* Emit the SCS instruction to write directly to the destination.
873 */
874 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
875 inst->dst.writemask = scs_mask;
876 }
877
878 done_mask |= this_mask;
879 }
880 }
881
882 int
883 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
884 gl_constant_value values[4], int size, int datatype,
885 GLuint *swizzle_out)
886 {
887 if (file == PROGRAM_CONSTANT) {
888 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
889 size, datatype, swizzle_out);
890 } else {
891 int index = 0;
892 immediate_storage *entry;
893 assert(file == PROGRAM_IMMEDIATE);
894
895 /* Search immediate storage to see if we already have an identical
896 * immediate that we can use instead of adding a duplicate entry.
897 */
898 foreach_iter(exec_list_iterator, iter, this->immediates) {
899 entry = (immediate_storage *)iter.get();
900
901 if (entry->size == size &&
902 entry->type == datatype &&
903 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
904 return index;
905 }
906 index++;
907 }
908
909 /* Add this immediate to the list. */
910 entry = new(mem_ctx) immediate_storage(values, size, datatype);
911 this->immediates.push_tail(entry);
912 this->num_immediates++;
913 return index;
914 }
915 }
916
917 st_src_reg
918 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
919 {
920 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
921 union gl_constant_value uval;
922
923 uval.f = val;
924 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
925
926 return src;
927 }
928
929 st_src_reg
930 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
931 {
932 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
933 union gl_constant_value uval;
934
935 assert(native_integers);
936
937 uval.i = val;
938 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
939
940 return src;
941 }
942
943 st_src_reg
944 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
945 {
946 if (native_integers)
947 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
948 st_src_reg_for_int(val);
949 else
950 return st_src_reg_for_float(val);
951 }
952
953 static int
954 type_size(const struct glsl_type *type)
955 {
956 unsigned int i;
957 int size;
958
959 switch (type->base_type) {
960 case GLSL_TYPE_UINT:
961 case GLSL_TYPE_INT:
962 case GLSL_TYPE_FLOAT:
963 case GLSL_TYPE_BOOL:
964 if (type->is_matrix()) {
965 return type->matrix_columns;
966 } else {
967 /* Regardless of size of vector, it gets a vec4. This is bad
968 * packing for things like floats, but otherwise arrays become a
969 * mess. Hopefully a later pass over the code can pack scalars
970 * down if appropriate.
971 */
972 return 1;
973 }
974 case GLSL_TYPE_ARRAY:
975 assert(type->length > 0);
976 return type_size(type->fields.array) * type->length;
977 case GLSL_TYPE_STRUCT:
978 size = 0;
979 for (i = 0; i < type->length; i++) {
980 size += type_size(type->fields.structure[i].type);
981 }
982 return size;
983 case GLSL_TYPE_SAMPLER:
984 /* Samplers take up one slot in UNIFORMS[], but they're baked in
985 * at link time.
986 */
987 return 1;
988 case GLSL_TYPE_INTERFACE:
989 case GLSL_TYPE_VOID:
990 case GLSL_TYPE_ERROR:
991 assert(!"Invalid type in type_size");
992 break;
993 }
994 return 0;
995 }
996
997 /**
998 * In the initial pass of codegen, we assign temporary numbers to
999 * intermediate results. (not SSA -- variable assignments will reuse
1000 * storage).
1001 */
1002 st_src_reg
1003 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1004 {
1005 st_src_reg src;
1006
1007 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1008 src.file = PROGRAM_TEMPORARY;
1009 src.index = next_temp;
1010 src.reladdr = NULL;
1011 next_temp += type_size(type);
1012
1013 if (type->is_array() || type->is_record()) {
1014 src.swizzle = SWIZZLE_NOOP;
1015 } else {
1016 src.swizzle = swizzle_for_size(type->vector_elements);
1017 }
1018 src.negate = 0;
1019
1020 return src;
1021 }
1022
1023 variable_storage *
1024 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1025 {
1026
1027 variable_storage *entry;
1028
1029 foreach_iter(exec_list_iterator, iter, this->variables) {
1030 entry = (variable_storage *)iter.get();
1031
1032 if (entry->var == var)
1033 return entry;
1034 }
1035
1036 return NULL;
1037 }
1038
1039 void
1040 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1041 {
1042 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1043 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1044
1045 fp->OriginUpperLeft = ir->origin_upper_left;
1046 fp->PixelCenterInteger = ir->pixel_center_integer;
1047 }
1048
1049 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1050 unsigned int i;
1051 const ir_state_slot *const slots = ir->state_slots;
1052 assert(ir->state_slots != NULL);
1053
1054 /* Check if this statevar's setup in the STATE file exactly
1055 * matches how we'll want to reference it as a
1056 * struct/array/whatever. If not, then we need to move it into
1057 * temporary storage and hope that it'll get copy-propagated
1058 * out.
1059 */
1060 for (i = 0; i < ir->num_state_slots; i++) {
1061 if (slots[i].swizzle != SWIZZLE_XYZW) {
1062 break;
1063 }
1064 }
1065
1066 variable_storage *storage;
1067 st_dst_reg dst;
1068 if (i == ir->num_state_slots) {
1069 /* We'll set the index later. */
1070 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1071 this->variables.push_tail(storage);
1072
1073 dst = undef_dst;
1074 } else {
1075 /* The variable_storage constructor allocates slots based on the size
1076 * of the type. However, this had better match the number of state
1077 * elements that we're going to copy into the new temporary.
1078 */
1079 assert((int) ir->num_state_slots == type_size(ir->type));
1080
1081 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1082 this->next_temp);
1083 this->variables.push_tail(storage);
1084 this->next_temp += type_size(ir->type);
1085
1086 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1087 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1088 }
1089
1090
1091 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1092 int index = _mesa_add_state_reference(this->prog->Parameters,
1093 (gl_state_index *)slots[i].tokens);
1094
1095 if (storage->file == PROGRAM_STATE_VAR) {
1096 if (storage->index == -1) {
1097 storage->index = index;
1098 } else {
1099 assert(index == storage->index + (int)i);
1100 }
1101 } else {
1102 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1103 * the data being moved since MOV does not care about the type of
1104 * data it is moving, and we don't want to declare registers with
1105 * array or struct types.
1106 */
1107 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1108 src.swizzle = slots[i].swizzle;
1109 emit(ir, TGSI_OPCODE_MOV, dst, src);
1110 /* even a float takes up a whole vec4 reg in a struct/array. */
1111 dst.index++;
1112 }
1113 }
1114
1115 if (storage->file == PROGRAM_TEMPORARY &&
1116 dst.index != storage->index + (int) ir->num_state_slots) {
1117 fail_link(this->shader_program,
1118 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1119 ir->name, dst.index - storage->index,
1120 type_size(ir->type));
1121 }
1122 }
1123 }
1124
1125 void
1126 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1127 {
1128 ir_dereference_variable *counter = NULL;
1129
1130 if (ir->counter != NULL)
1131 counter = new(ir) ir_dereference_variable(ir->counter);
1132
1133 if (ir->from != NULL) {
1134 assert(ir->counter != NULL);
1135
1136 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1137
1138 a->accept(this);
1139 delete a;
1140 }
1141
1142 emit(NULL, TGSI_OPCODE_BGNLOOP);
1143
1144 if (ir->to) {
1145 ir_expression *e =
1146 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1147 counter, ir->to);
1148 ir_if *if_stmt = new(ir) ir_if(e);
1149
1150 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1151
1152 if_stmt->then_instructions.push_tail(brk);
1153
1154 if_stmt->accept(this);
1155
1156 delete if_stmt;
1157 delete e;
1158 delete brk;
1159 }
1160
1161 visit_exec_list(&ir->body_instructions, this);
1162
1163 if (ir->increment) {
1164 ir_expression *e =
1165 new(ir) ir_expression(ir_binop_add, counter->type,
1166 counter, ir->increment);
1167
1168 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1169
1170 a->accept(this);
1171 delete a;
1172 delete e;
1173 }
1174
1175 emit(NULL, TGSI_OPCODE_ENDLOOP);
1176 }
1177
1178 void
1179 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1180 {
1181 switch (ir->mode) {
1182 case ir_loop_jump::jump_break:
1183 emit(NULL, TGSI_OPCODE_BRK);
1184 break;
1185 case ir_loop_jump::jump_continue:
1186 emit(NULL, TGSI_OPCODE_CONT);
1187 break;
1188 }
1189 }
1190
1191
1192 void
1193 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1194 {
1195 assert(0);
1196 (void)ir;
1197 }
1198
1199 void
1200 glsl_to_tgsi_visitor::visit(ir_function *ir)
1201 {
1202 /* Ignore function bodies other than main() -- we shouldn't see calls to
1203 * them since they should all be inlined before we get to glsl_to_tgsi.
1204 */
1205 if (strcmp(ir->name, "main") == 0) {
1206 const ir_function_signature *sig;
1207 exec_list empty;
1208
1209 sig = ir->matching_signature(&empty);
1210
1211 assert(sig);
1212
1213 foreach_iter(exec_list_iterator, iter, sig->body) {
1214 ir_instruction *ir = (ir_instruction *)iter.get();
1215
1216 ir->accept(this);
1217 }
1218 }
1219 }
1220
1221 bool
1222 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1223 {
1224 int nonmul_operand = 1 - mul_operand;
1225 st_src_reg a, b, c;
1226 st_dst_reg result_dst;
1227
1228 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1229 if (!expr || expr->operation != ir_binop_mul)
1230 return false;
1231
1232 expr->operands[0]->accept(this);
1233 a = this->result;
1234 expr->operands[1]->accept(this);
1235 b = this->result;
1236 ir->operands[nonmul_operand]->accept(this);
1237 c = this->result;
1238
1239 this->result = get_temp(ir->type);
1240 result_dst = st_dst_reg(this->result);
1241 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1242 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1243
1244 return true;
1245 }
1246
1247 /**
1248 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1249 *
1250 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1251 * implemented using multiplication, and logical-or is implemented using
1252 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1253 * As result, the logical expression (a & !b) can be rewritten as:
1254 *
1255 * - a * !b
1256 * - a * (1 - b)
1257 * - (a * 1) - (a * b)
1258 * - a + -(a * b)
1259 * - a + (a * -b)
1260 *
1261 * This final expression can be implemented as a single MAD(a, -b, a)
1262 * instruction.
1263 */
1264 bool
1265 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1266 {
1267 const int other_operand = 1 - try_operand;
1268 st_src_reg a, b;
1269
1270 ir_expression *expr = ir->operands[try_operand]->as_expression();
1271 if (!expr || expr->operation != ir_unop_logic_not)
1272 return false;
1273
1274 ir->operands[other_operand]->accept(this);
1275 a = this->result;
1276 expr->operands[0]->accept(this);
1277 b = this->result;
1278
1279 b.negate = ~b.negate;
1280
1281 this->result = get_temp(ir->type);
1282 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1283
1284 return true;
1285 }
1286
1287 bool
1288 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1289 {
1290 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1291 */
1292 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1293 !st_context(this->ctx)->has_shader_model3) {
1294 return false;
1295 }
1296
1297 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1298 if (!sat_src)
1299 return false;
1300
1301 sat_src->accept(this);
1302 st_src_reg src = this->result;
1303
1304 /* If we generated an expression instruction into a temporary in
1305 * processing the saturate's operand, apply the saturate to that
1306 * instruction. Otherwise, generate a MOV to do the saturate.
1307 *
1308 * Note that we have to be careful to only do this optimization if
1309 * the instruction in question was what generated src->result. For
1310 * example, ir_dereference_array might generate a MUL instruction
1311 * to create the reladdr, and return us a src reg using that
1312 * reladdr. That MUL result is not the value we're trying to
1313 * saturate.
1314 */
1315 ir_expression *sat_src_expr = sat_src->as_expression();
1316 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1317 sat_src_expr->operation == ir_binop_add ||
1318 sat_src_expr->operation == ir_binop_dot)) {
1319 glsl_to_tgsi_instruction *new_inst;
1320 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1321 new_inst->saturate = true;
1322 } else {
1323 this->result = get_temp(ir->type);
1324 st_dst_reg result_dst = st_dst_reg(this->result);
1325 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1326 glsl_to_tgsi_instruction *inst;
1327 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1328 inst->saturate = true;
1329 }
1330
1331 return true;
1332 }
1333
1334 void
1335 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1336 st_src_reg *reg, int *num_reladdr)
1337 {
1338 if (!reg->reladdr)
1339 return;
1340
1341 emit_arl(ir, address_reg, *reg->reladdr);
1342
1343 if (*num_reladdr != 1) {
1344 st_src_reg temp = get_temp(glsl_type::vec4_type);
1345
1346 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1347 *reg = temp;
1348 }
1349
1350 (*num_reladdr)--;
1351 }
1352
1353 void
1354 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1355 {
1356 unsigned int operand;
1357 st_src_reg op[Elements(ir->operands)];
1358 st_src_reg result_src;
1359 st_dst_reg result_dst;
1360
1361 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1362 */
1363 if (ir->operation == ir_binop_add) {
1364 if (try_emit_mad(ir, 1))
1365 return;
1366 if (try_emit_mad(ir, 0))
1367 return;
1368 }
1369
1370 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1371 */
1372 if (ir->operation == ir_binop_logic_and) {
1373 if (try_emit_mad_for_and_not(ir, 1))
1374 return;
1375 if (try_emit_mad_for_and_not(ir, 0))
1376 return;
1377 }
1378
1379 if (try_emit_sat(ir))
1380 return;
1381
1382 if (ir->operation == ir_quadop_vector)
1383 assert(!"ir_quadop_vector should have been lowered");
1384
1385 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1386 this->result.file = PROGRAM_UNDEFINED;
1387 ir->operands[operand]->accept(this);
1388 if (this->result.file == PROGRAM_UNDEFINED) {
1389 ir_print_visitor v;
1390 printf("Failed to get tree for expression operand:\n");
1391 ir->operands[operand]->accept(&v);
1392 exit(1);
1393 }
1394 op[operand] = this->result;
1395
1396 /* Matrix expression operands should have been broken down to vector
1397 * operations already.
1398 */
1399 assert(!ir->operands[operand]->type->is_matrix());
1400 }
1401
1402 int vector_elements = ir->operands[0]->type->vector_elements;
1403 if (ir->operands[1]) {
1404 vector_elements = MAX2(vector_elements,
1405 ir->operands[1]->type->vector_elements);
1406 }
1407
1408 this->result.file = PROGRAM_UNDEFINED;
1409
1410 /* Storage for our result. Ideally for an assignment we'd be using
1411 * the actual storage for the result here, instead.
1412 */
1413 result_src = get_temp(ir->type);
1414 /* convenience for the emit functions below. */
1415 result_dst = st_dst_reg(result_src);
1416 /* Limit writes to the channels that will be used by result_src later.
1417 * This does limit this temp's use as a temporary for multi-instruction
1418 * sequences.
1419 */
1420 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1421
1422 switch (ir->operation) {
1423 case ir_unop_logic_not:
1424 if (result_dst.type != GLSL_TYPE_FLOAT)
1425 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1426 else {
1427 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1428 * older GPUs implement SEQ using multiple instructions (i915 uses two
1429 * SGE instructions and a MUL instruction). Since our logic values are
1430 * 0.0 and 1.0, 1-x also implements !x.
1431 */
1432 op[0].negate = ~op[0].negate;
1433 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1434 }
1435 break;
1436 case ir_unop_neg:
1437 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1438 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1439 else {
1440 op[0].negate = ~op[0].negate;
1441 result_src = op[0];
1442 }
1443 break;
1444 case ir_unop_abs:
1445 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1446 break;
1447 case ir_unop_sign:
1448 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1449 break;
1450 case ir_unop_rcp:
1451 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1452 break;
1453
1454 case ir_unop_exp2:
1455 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1456 break;
1457 case ir_unop_exp:
1458 case ir_unop_log:
1459 assert(!"not reached: should be handled by ir_explog_to_explog2");
1460 break;
1461 case ir_unop_log2:
1462 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1463 break;
1464 case ir_unop_sin:
1465 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1466 break;
1467 case ir_unop_cos:
1468 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1469 break;
1470 case ir_unop_sin_reduced:
1471 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1472 break;
1473 case ir_unop_cos_reduced:
1474 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1475 break;
1476
1477 case ir_unop_dFdx:
1478 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1479 break;
1480 case ir_unop_dFdy:
1481 {
1482 /* The X component contains 1 or -1 depending on whether the framebuffer
1483 * is a FBO or the window system buffer, respectively.
1484 * It is then multiplied with the source operand of DDY.
1485 */
1486 static const gl_state_index transform_y_state[STATE_LENGTH]
1487 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1488
1489 unsigned transform_y_index =
1490 _mesa_add_state_reference(this->prog->Parameters,
1491 transform_y_state);
1492
1493 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1494 transform_y_index,
1495 glsl_type::vec4_type);
1496 transform_y.swizzle = SWIZZLE_XXXX;
1497
1498 st_src_reg temp = get_temp(glsl_type::vec4_type);
1499
1500 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1501 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1502 break;
1503 }
1504
1505 case ir_unop_noise: {
1506 /* At some point, a motivated person could add a better
1507 * implementation of noise. Currently not even the nvidia
1508 * binary drivers do anything more than this. In any case, the
1509 * place to do this is in the GL state tracker, not the poor
1510 * driver.
1511 */
1512 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1513 break;
1514 }
1515
1516 case ir_binop_add:
1517 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1518 break;
1519 case ir_binop_sub:
1520 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1521 break;
1522
1523 case ir_binop_mul:
1524 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1525 break;
1526 case ir_binop_div:
1527 if (result_dst.type == GLSL_TYPE_FLOAT)
1528 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1529 else
1530 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1531 break;
1532 case ir_binop_mod:
1533 if (result_dst.type == GLSL_TYPE_FLOAT)
1534 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1535 else
1536 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1537 break;
1538
1539 case ir_binop_less:
1540 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1541 break;
1542 case ir_binop_greater:
1543 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1544 break;
1545 case ir_binop_lequal:
1546 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1547 break;
1548 case ir_binop_gequal:
1549 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1550 break;
1551 case ir_binop_equal:
1552 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1553 break;
1554 case ir_binop_nequal:
1555 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1556 break;
1557 case ir_binop_all_equal:
1558 /* "==" operator producing a scalar boolean. */
1559 if (ir->operands[0]->type->is_vector() ||
1560 ir->operands[1]->type->is_vector()) {
1561 st_src_reg temp = get_temp(native_integers ?
1562 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1563 glsl_type::vec4_type);
1564
1565 if (native_integers) {
1566 st_dst_reg temp_dst = st_dst_reg(temp);
1567 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1568
1569 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1570
1571 /* Emit 1-3 AND operations to combine the SEQ results. */
1572 switch (ir->operands[0]->type->vector_elements) {
1573 case 2:
1574 break;
1575 case 3:
1576 temp_dst.writemask = WRITEMASK_Y;
1577 temp1.swizzle = SWIZZLE_YYYY;
1578 temp2.swizzle = SWIZZLE_ZZZZ;
1579 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1580 break;
1581 case 4:
1582 temp_dst.writemask = WRITEMASK_X;
1583 temp1.swizzle = SWIZZLE_XXXX;
1584 temp2.swizzle = SWIZZLE_YYYY;
1585 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1586 temp_dst.writemask = WRITEMASK_Y;
1587 temp1.swizzle = SWIZZLE_ZZZZ;
1588 temp2.swizzle = SWIZZLE_WWWW;
1589 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1590 }
1591
1592 temp1.swizzle = SWIZZLE_XXXX;
1593 temp2.swizzle = SWIZZLE_YYYY;
1594 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1595 } else {
1596 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1597
1598 /* After the dot-product, the value will be an integer on the
1599 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1600 */
1601 emit_dp(ir, result_dst, temp, temp, vector_elements);
1602
1603 /* Negating the result of the dot-product gives values on the range
1604 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1605 * This is achieved using SGE.
1606 */
1607 st_src_reg sge_src = result_src;
1608 sge_src.negate = ~sge_src.negate;
1609 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1610 }
1611 } else {
1612 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1613 }
1614 break;
1615 case ir_binop_any_nequal:
1616 /* "!=" operator producing a scalar boolean. */
1617 if (ir->operands[0]->type->is_vector() ||
1618 ir->operands[1]->type->is_vector()) {
1619 st_src_reg temp = get_temp(native_integers ?
1620 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1621 glsl_type::vec4_type);
1622 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1623
1624 if (native_integers) {
1625 st_dst_reg temp_dst = st_dst_reg(temp);
1626 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1627
1628 /* Emit 1-3 OR operations to combine the SNE results. */
1629 switch (ir->operands[0]->type->vector_elements) {
1630 case 2:
1631 break;
1632 case 3:
1633 temp_dst.writemask = WRITEMASK_Y;
1634 temp1.swizzle = SWIZZLE_YYYY;
1635 temp2.swizzle = SWIZZLE_ZZZZ;
1636 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1637 break;
1638 case 4:
1639 temp_dst.writemask = WRITEMASK_X;
1640 temp1.swizzle = SWIZZLE_XXXX;
1641 temp2.swizzle = SWIZZLE_YYYY;
1642 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1643 temp_dst.writemask = WRITEMASK_Y;
1644 temp1.swizzle = SWIZZLE_ZZZZ;
1645 temp2.swizzle = SWIZZLE_WWWW;
1646 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1647 }
1648
1649 temp1.swizzle = SWIZZLE_XXXX;
1650 temp2.swizzle = SWIZZLE_YYYY;
1651 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1652 } else {
1653 /* After the dot-product, the value will be an integer on the
1654 * range [0,4]. Zero stays zero, and positive values become 1.0.
1655 */
1656 glsl_to_tgsi_instruction *const dp =
1657 emit_dp(ir, result_dst, temp, temp, vector_elements);
1658 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1659 /* The clamping to [0,1] can be done for free in the fragment
1660 * shader with a saturate.
1661 */
1662 dp->saturate = true;
1663 } else {
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1666 * achieved using SLT.
1667 */
1668 st_src_reg slt_src = result_src;
1669 slt_src.negate = ~slt_src.negate;
1670 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1671 }
1672 }
1673 } else {
1674 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1675 }
1676 break;
1677
1678 case ir_unop_any: {
1679 assert(ir->operands[0]->type->is_vector());
1680
1681 /* After the dot-product, the value will be an integer on the
1682 * range [0,4]. Zero stays zero, and positive values become 1.0.
1683 */
1684 glsl_to_tgsi_instruction *const dp =
1685 emit_dp(ir, result_dst, op[0], op[0],
1686 ir->operands[0]->type->vector_elements);
1687 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1688 result_dst.type == GLSL_TYPE_FLOAT) {
1689 /* The clamping to [0,1] can be done for free in the fragment
1690 * shader with a saturate.
1691 */
1692 dp->saturate = true;
1693 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1694 /* Negating the result of the dot-product gives values on the range
1695 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1696 * is achieved using SLT.
1697 */
1698 st_src_reg slt_src = result_src;
1699 slt_src.negate = ~slt_src.negate;
1700 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1701 }
1702 else {
1703 /* Use SNE 0 if integers are being used as boolean values. */
1704 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1705 }
1706 break;
1707 }
1708
1709 case ir_binop_logic_xor:
1710 if (native_integers)
1711 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1712 else
1713 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1714 break;
1715
1716 case ir_binop_logic_or: {
1717 if (native_integers) {
1718 /* If integers are used as booleans, we can use an actual "or"
1719 * instruction.
1720 */
1721 assert(native_integers);
1722 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1723 } else {
1724 /* After the addition, the value will be an integer on the
1725 * range [0,2]. Zero stays zero, and positive values become 1.0.
1726 */
1727 glsl_to_tgsi_instruction *add =
1728 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1729 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1730 /* The clamping to [0,1] can be done for free in the fragment
1731 * shader with a saturate if floats are being used as boolean values.
1732 */
1733 add->saturate = true;
1734 } else {
1735 /* Negating the result of the addition gives values on the range
1736 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1737 * is achieved using SLT.
1738 */
1739 st_src_reg slt_src = result_src;
1740 slt_src.negate = ~slt_src.negate;
1741 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1742 }
1743 }
1744 break;
1745 }
1746
1747 case ir_binop_logic_and:
1748 /* If native integers are disabled, the bool args are stored as float 0.0
1749 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1750 * actual AND opcode.
1751 */
1752 if (native_integers)
1753 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1754 else
1755 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1756 break;
1757
1758 case ir_binop_dot:
1759 assert(ir->operands[0]->type->is_vector());
1760 assert(ir->operands[0]->type == ir->operands[1]->type);
1761 emit_dp(ir, result_dst, op[0], op[1],
1762 ir->operands[0]->type->vector_elements);
1763 break;
1764
1765 case ir_unop_sqrt:
1766 if (have_sqrt) {
1767 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1768 }
1769 else {
1770 /* sqrt(x) = x * rsq(x). */
1771 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1772 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1773 /* For incoming channels <= 0, set the result to 0. */
1774 op[0].negate = ~op[0].negate;
1775 emit(ir, TGSI_OPCODE_CMP, result_dst,
1776 op[0], result_src, st_src_reg_for_float(0.0));
1777 }
1778 break;
1779 case ir_unop_rsq:
1780 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1781 break;
1782 case ir_unop_i2f:
1783 if (native_integers) {
1784 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1785 break;
1786 }
1787 /* fallthrough to next case otherwise */
1788 case ir_unop_b2f:
1789 if (native_integers) {
1790 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1791 break;
1792 }
1793 /* fallthrough to next case otherwise */
1794 case ir_unop_i2u:
1795 case ir_unop_u2i:
1796 /* Converting between signed and unsigned integers is a no-op. */
1797 result_src = op[0];
1798 break;
1799 case ir_unop_b2i:
1800 if (native_integers) {
1801 /* Booleans are stored as integers using ~0 for true and 0 for false.
1802 * GLSL requires that int(bool) return 1 for true and 0 for false.
1803 * This conversion is done with AND, but it could be done with NEG.
1804 */
1805 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1806 } else {
1807 /* Booleans and integers are both stored as floats when native
1808 * integers are disabled.
1809 */
1810 result_src = op[0];
1811 }
1812 break;
1813 case ir_unop_f2i:
1814 if (native_integers)
1815 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1816 else
1817 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1818 break;
1819 case ir_unop_f2u:
1820 if (native_integers)
1821 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1822 else
1823 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1824 break;
1825 case ir_unop_bitcast_f2i:
1826 case ir_unop_bitcast_f2u:
1827 case ir_unop_bitcast_i2f:
1828 case ir_unop_bitcast_u2f:
1829 result_src = op[0];
1830 break;
1831 case ir_unop_f2b:
1832 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1833 break;
1834 case ir_unop_i2b:
1835 if (native_integers)
1836 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1837 else
1838 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1839 break;
1840 case ir_unop_trunc:
1841 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1842 break;
1843 case ir_unop_ceil:
1844 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1845 break;
1846 case ir_unop_floor:
1847 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1848 break;
1849 case ir_unop_round_even:
1850 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1851 break;
1852 case ir_unop_fract:
1853 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1854 break;
1855
1856 case ir_binop_min:
1857 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1858 break;
1859 case ir_binop_max:
1860 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1861 break;
1862 case ir_binop_pow:
1863 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1864 break;
1865
1866 case ir_unop_bit_not:
1867 if (native_integers) {
1868 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1869 break;
1870 }
1871 case ir_unop_u2f:
1872 if (native_integers) {
1873 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1874 break;
1875 }
1876 case ir_binop_lshift:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1879 break;
1880 }
1881 case ir_binop_rshift:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1884 break;
1885 }
1886 case ir_binop_bit_and:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1889 break;
1890 }
1891 case ir_binop_bit_xor:
1892 if (native_integers) {
1893 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1894 break;
1895 }
1896 case ir_binop_bit_or:
1897 if (native_integers) {
1898 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1899 break;
1900 }
1901
1902 assert(!"GLSL 1.30 features unsupported");
1903 break;
1904
1905 case ir_binop_ubo_load: {
1906 ir_constant *uniform_block = ir->operands[0]->as_constant();
1907 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1908 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1909 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1910 st_src_reg cbuf;
1911
1912 cbuf.type = glsl_type::vec4_type->base_type;
1913 cbuf.file = PROGRAM_CONSTANT;
1914 cbuf.index = 0;
1915 cbuf.index2D = uniform_block->value.u[0] + 1;
1916 cbuf.reladdr = NULL;
1917 cbuf.negate = 0;
1918
1919 assert(ir->type->is_vector() || ir->type->is_scalar());
1920
1921 if (const_offset_ir) {
1922 index_reg = st_src_reg_for_int(const_offset / 16);
1923 } else {
1924 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1925 }
1926
1927 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1928 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1929 const_offset % 16 / 4,
1930 const_offset % 16 / 4,
1931 const_offset % 16 / 4);
1932
1933 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1934 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1935
1936 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1937 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1938 result_src.negate = 1;
1939 emit(ir, TGSI_OPCODE_UCMP, result_dst, result_src, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1940 } else {
1941 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1942 }
1943 break;
1944 }
1945 case ir_triop_lrp:
1946 /* note: we have to reorder the three args here */
1947 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1948 break;
1949 case ir_unop_pack_snorm_2x16:
1950 case ir_unop_pack_unorm_2x16:
1951 case ir_unop_pack_half_2x16:
1952 case ir_unop_pack_snorm_4x8:
1953 case ir_unop_pack_unorm_4x8:
1954 case ir_unop_unpack_snorm_2x16:
1955 case ir_unop_unpack_unorm_2x16:
1956 case ir_unop_unpack_half_2x16:
1957 case ir_unop_unpack_half_2x16_split_x:
1958 case ir_unop_unpack_half_2x16_split_y:
1959 case ir_unop_unpack_snorm_4x8:
1960 case ir_unop_unpack_unorm_4x8:
1961 case ir_binop_pack_half_2x16_split:
1962 case ir_quadop_vector:
1963 /* This operation is not supported, or should have already been handled.
1964 */
1965 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1966 break;
1967 }
1968
1969 this->result = result_src;
1970 }
1971
1972
1973 void
1974 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1975 {
1976 st_src_reg src;
1977 int i;
1978 int swizzle[4];
1979
1980 /* Note that this is only swizzles in expressions, not those on the left
1981 * hand side of an assignment, which do write masking. See ir_assignment
1982 * for that.
1983 */
1984
1985 ir->val->accept(this);
1986 src = this->result;
1987 assert(src.file != PROGRAM_UNDEFINED);
1988
1989 for (i = 0; i < 4; i++) {
1990 if (i < ir->type->vector_elements) {
1991 switch (i) {
1992 case 0:
1993 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1994 break;
1995 case 1:
1996 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1997 break;
1998 case 2:
1999 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2000 break;
2001 case 3:
2002 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2003 break;
2004 }
2005 } else {
2006 /* If the type is smaller than a vec4, replicate the last
2007 * channel out.
2008 */
2009 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2010 }
2011 }
2012
2013 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2014
2015 this->result = src;
2016 }
2017
2018 void
2019 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2020 {
2021 variable_storage *entry = find_variable_storage(ir->var);
2022 ir_variable *var = ir->var;
2023
2024 if (!entry) {
2025 switch (var->mode) {
2026 case ir_var_uniform:
2027 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2028 var->location);
2029 this->variables.push_tail(entry);
2030 break;
2031 case ir_var_shader_in:
2032 /* The linker assigns locations for varyings and attributes,
2033 * including deprecated builtins (like gl_Color), user-assign
2034 * generic attributes (glBindVertexLocation), and
2035 * user-defined varyings.
2036 */
2037 assert(var->location != -1);
2038 entry = new(mem_ctx) variable_storage(var,
2039 PROGRAM_INPUT,
2040 var->location);
2041 break;
2042 case ir_var_shader_out:
2043 assert(var->location != -1);
2044 entry = new(mem_ctx) variable_storage(var,
2045 PROGRAM_OUTPUT,
2046 var->location + var->index);
2047 break;
2048 case ir_var_system_value:
2049 entry = new(mem_ctx) variable_storage(var,
2050 PROGRAM_SYSTEM_VALUE,
2051 var->location);
2052 break;
2053 case ir_var_auto:
2054 case ir_var_temporary:
2055 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
2056 this->next_temp);
2057 this->variables.push_tail(entry);
2058
2059 next_temp += type_size(var->type);
2060 break;
2061 }
2062
2063 if (!entry) {
2064 printf("Failed to make storage for %s\n", var->name);
2065 exit(1);
2066 }
2067 }
2068
2069 this->result = st_src_reg(entry->file, entry->index, var->type);
2070 if (!native_integers)
2071 this->result.type = GLSL_TYPE_FLOAT;
2072 }
2073
2074 void
2075 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2076 {
2077 ir_constant *index;
2078 st_src_reg src;
2079 int element_size = type_size(ir->type);
2080
2081 index = ir->array_index->constant_expression_value();
2082
2083 ir->array->accept(this);
2084 src = this->result;
2085
2086 if (index) {
2087 src.index += index->value.i[0] * element_size;
2088 } else {
2089 /* Variable index array dereference. It eats the "vec4" of the
2090 * base of the array and an index that offsets the TGSI register
2091 * index.
2092 */
2093 ir->array_index->accept(this);
2094
2095 st_src_reg index_reg;
2096
2097 if (element_size == 1) {
2098 index_reg = this->result;
2099 } else {
2100 index_reg = get_temp(native_integers ?
2101 glsl_type::int_type : glsl_type::float_type);
2102
2103 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2104 this->result, st_src_reg_for_type(index_reg.type, element_size));
2105 }
2106
2107 /* If there was already a relative address register involved, add the
2108 * new and the old together to get the new offset.
2109 */
2110 if (src.reladdr != NULL) {
2111 st_src_reg accum_reg = get_temp(native_integers ?
2112 glsl_type::int_type : glsl_type::float_type);
2113
2114 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2115 index_reg, *src.reladdr);
2116
2117 index_reg = accum_reg;
2118 }
2119
2120 src.reladdr = ralloc(mem_ctx, st_src_reg);
2121 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2122 }
2123
2124 /* If the type is smaller than a vec4, replicate the last channel out. */
2125 if (ir->type->is_scalar() || ir->type->is_vector())
2126 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2127 else
2128 src.swizzle = SWIZZLE_NOOP;
2129
2130 /* Change the register type to the element type of the array. */
2131 src.type = ir->type->base_type;
2132
2133 this->result = src;
2134 }
2135
2136 void
2137 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2138 {
2139 unsigned int i;
2140 const glsl_type *struct_type = ir->record->type;
2141 int offset = 0;
2142
2143 ir->record->accept(this);
2144
2145 for (i = 0; i < struct_type->length; i++) {
2146 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2147 break;
2148 offset += type_size(struct_type->fields.structure[i].type);
2149 }
2150
2151 /* If the type is smaller than a vec4, replicate the last channel out. */
2152 if (ir->type->is_scalar() || ir->type->is_vector())
2153 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2154 else
2155 this->result.swizzle = SWIZZLE_NOOP;
2156
2157 this->result.index += offset;
2158 this->result.type = ir->type->base_type;
2159 }
2160
2161 /**
2162 * We want to be careful in assignment setup to hit the actual storage
2163 * instead of potentially using a temporary like we might with the
2164 * ir_dereference handler.
2165 */
2166 static st_dst_reg
2167 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2168 {
2169 /* The LHS must be a dereference. If the LHS is a variable indexed array
2170 * access of a vector, it must be separated into a series conditional moves
2171 * before reaching this point (see ir_vec_index_to_cond_assign).
2172 */
2173 assert(ir->as_dereference());
2174 ir_dereference_array *deref_array = ir->as_dereference_array();
2175 if (deref_array) {
2176 assert(!deref_array->array->type->is_vector());
2177 }
2178
2179 /* Use the rvalue deref handler for the most part. We'll ignore
2180 * swizzles in it and write swizzles using writemask, though.
2181 */
2182 ir->accept(v);
2183 return st_dst_reg(v->result);
2184 }
2185
2186 /**
2187 * Process the condition of a conditional assignment
2188 *
2189 * Examines the condition of a conditional assignment to generate the optimal
2190 * first operand of a \c CMP instruction. If the condition is a relational
2191 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2192 * used as the source for the \c CMP instruction. Otherwise the comparison
2193 * is processed to a boolean result, and the boolean result is used as the
2194 * operand to the CMP instruction.
2195 */
2196 bool
2197 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2198 {
2199 ir_rvalue *src_ir = ir;
2200 bool negate = true;
2201 bool switch_order = false;
2202
2203 ir_expression *const expr = ir->as_expression();
2204 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2205 bool zero_on_left = false;
2206
2207 if (expr->operands[0]->is_zero()) {
2208 src_ir = expr->operands[1];
2209 zero_on_left = true;
2210 } else if (expr->operands[1]->is_zero()) {
2211 src_ir = expr->operands[0];
2212 zero_on_left = false;
2213 }
2214
2215 /* a is - 0 + - 0 +
2216 * (a < 0) T F F ( a < 0) T F F
2217 * (0 < a) F F T (-a < 0) F F T
2218 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2219 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2220 * (a > 0) F F T (-a < 0) F F T
2221 * (0 > a) T F F ( a < 0) T F F
2222 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2223 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2224 *
2225 * Note that exchanging the order of 0 and 'a' in the comparison simply
2226 * means that the value of 'a' should be negated.
2227 */
2228 if (src_ir != ir) {
2229 switch (expr->operation) {
2230 case ir_binop_less:
2231 switch_order = false;
2232 negate = zero_on_left;
2233 break;
2234
2235 case ir_binop_greater:
2236 switch_order = false;
2237 negate = !zero_on_left;
2238 break;
2239
2240 case ir_binop_lequal:
2241 switch_order = true;
2242 negate = !zero_on_left;
2243 break;
2244
2245 case ir_binop_gequal:
2246 switch_order = true;
2247 negate = zero_on_left;
2248 break;
2249
2250 default:
2251 /* This isn't the right kind of comparison afterall, so make sure
2252 * the whole condition is visited.
2253 */
2254 src_ir = ir;
2255 break;
2256 }
2257 }
2258 }
2259
2260 src_ir->accept(this);
2261
2262 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2263 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2264 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2265 * computing the condition.
2266 */
2267 if (negate)
2268 this->result.negate = ~this->result.negate;
2269
2270 return switch_order;
2271 }
2272
2273 void
2274 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2275 st_dst_reg *l, st_src_reg *r)
2276 {
2277 if (type->base_type == GLSL_TYPE_STRUCT) {
2278 for (unsigned int i = 0; i < type->length; i++) {
2279 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2280 }
2281 return;
2282 }
2283
2284 if (type->is_array()) {
2285 for (unsigned int i = 0; i < type->length; i++) {
2286 emit_block_mov(ir, type->fields.array, l, r);
2287 }
2288 return;
2289 }
2290
2291 if (type->is_matrix()) {
2292 const struct glsl_type *vec_type;
2293
2294 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2295 type->vector_elements, 1);
2296
2297 for (int i = 0; i < type->matrix_columns; i++) {
2298 emit_block_mov(ir, vec_type, l, r);
2299 }
2300 return;
2301 }
2302
2303 assert(type->is_scalar() || type->is_vector());
2304
2305 r->type = type->base_type;
2306 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2307 l->index++;
2308 r->index++;
2309 }
2310
2311 void
2312 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2313 {
2314 st_dst_reg l;
2315 st_src_reg r;
2316 int i;
2317
2318 ir->rhs->accept(this);
2319 r = this->result;
2320
2321 l = get_assignment_lhs(ir->lhs, this);
2322
2323 /* FINISHME: This should really set to the correct maximal writemask for each
2324 * FINISHME: component written (in the loops below). This case can only
2325 * FINISHME: occur for matrices, arrays, and structures.
2326 */
2327 if (ir->write_mask == 0) {
2328 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2329 l.writemask = WRITEMASK_XYZW;
2330 } else if (ir->lhs->type->is_scalar() &&
2331 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2332 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2333 * FINISHME: W component of fragment shader output zero, work correctly.
2334 */
2335 l.writemask = WRITEMASK_XYZW;
2336 } else {
2337 int swizzles[4];
2338 int first_enabled_chan = 0;
2339 int rhs_chan = 0;
2340
2341 l.writemask = ir->write_mask;
2342
2343 for (int i = 0; i < 4; i++) {
2344 if (l.writemask & (1 << i)) {
2345 first_enabled_chan = GET_SWZ(r.swizzle, i);
2346 break;
2347 }
2348 }
2349
2350 /* Swizzle a small RHS vector into the channels being written.
2351 *
2352 * glsl ir treats write_mask as dictating how many channels are
2353 * present on the RHS while TGSI treats write_mask as just
2354 * showing which channels of the vec4 RHS get written.
2355 */
2356 for (int i = 0; i < 4; i++) {
2357 if (l.writemask & (1 << i))
2358 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2359 else
2360 swizzles[i] = first_enabled_chan;
2361 }
2362 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2363 swizzles[2], swizzles[3]);
2364 }
2365
2366 assert(l.file != PROGRAM_UNDEFINED);
2367 assert(r.file != PROGRAM_UNDEFINED);
2368
2369 if (ir->condition) {
2370 const bool switch_order = this->process_move_condition(ir->condition);
2371 st_src_reg condition = this->result;
2372
2373 for (i = 0; i < type_size(ir->lhs->type); i++) {
2374 st_src_reg l_src = st_src_reg(l);
2375 st_src_reg condition_temp = condition;
2376 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2377
2378 if (native_integers) {
2379 /* This is necessary because TGSI's CMP instruction expects the
2380 * condition to be a float, and we store booleans as integers.
2381 * If TGSI had a UCMP instruction or similar, this extra
2382 * instruction would not be necessary.
2383 */
2384 condition_temp = get_temp(glsl_type::vec4_type);
2385 condition.negate = 0;
2386 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2387 condition_temp.swizzle = condition.swizzle;
2388 }
2389
2390 if (switch_order) {
2391 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2392 } else {
2393 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2394 }
2395
2396 l.index++;
2397 r.index++;
2398 }
2399 } else if (ir->rhs->as_expression() &&
2400 this->instructions.get_tail() &&
2401 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2402 type_size(ir->lhs->type) == 1 &&
2403 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2404 /* To avoid emitting an extra MOV when assigning an expression to a
2405 * variable, emit the last instruction of the expression again, but
2406 * replace the destination register with the target of the assignment.
2407 * Dead code elimination will remove the original instruction.
2408 */
2409 glsl_to_tgsi_instruction *inst, *new_inst;
2410 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2411 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2412 new_inst->saturate = inst->saturate;
2413 inst->dead_mask = inst->dst.writemask;
2414 } else {
2415 emit_block_mov(ir, ir->rhs->type, &l, &r);
2416 }
2417 }
2418
2419
2420 void
2421 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2422 {
2423 st_src_reg src;
2424 GLfloat stack_vals[4] = { 0 };
2425 gl_constant_value *values = (gl_constant_value *) stack_vals;
2426 GLenum gl_type = GL_NONE;
2427 unsigned int i;
2428 static int in_array = 0;
2429 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2430
2431 /* Unfortunately, 4 floats is all we can get into
2432 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2433 * aggregate constant and move each constant value into it. If we
2434 * get lucky, copy propagation will eliminate the extra moves.
2435 */
2436 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2437 st_src_reg temp_base = get_temp(ir->type);
2438 st_dst_reg temp = st_dst_reg(temp_base);
2439
2440 foreach_iter(exec_list_iterator, iter, ir->components) {
2441 ir_constant *field_value = (ir_constant *)iter.get();
2442 int size = type_size(field_value->type);
2443
2444 assert(size > 0);
2445
2446 field_value->accept(this);
2447 src = this->result;
2448
2449 for (i = 0; i < (unsigned int)size; i++) {
2450 emit(ir, TGSI_OPCODE_MOV, temp, src);
2451
2452 src.index++;
2453 temp.index++;
2454 }
2455 }
2456 this->result = temp_base;
2457 return;
2458 }
2459
2460 if (ir->type->is_array()) {
2461 st_src_reg temp_base = get_temp(ir->type);
2462 st_dst_reg temp = st_dst_reg(temp_base);
2463 int size = type_size(ir->type->fields.array);
2464
2465 assert(size > 0);
2466 in_array++;
2467
2468 for (i = 0; i < ir->type->length; i++) {
2469 ir->array_elements[i]->accept(this);
2470 src = this->result;
2471 for (int j = 0; j < size; j++) {
2472 emit(ir, TGSI_OPCODE_MOV, temp, src);
2473
2474 src.index++;
2475 temp.index++;
2476 }
2477 }
2478 this->result = temp_base;
2479 in_array--;
2480 return;
2481 }
2482
2483 if (ir->type->is_matrix()) {
2484 st_src_reg mat = get_temp(ir->type);
2485 st_dst_reg mat_column = st_dst_reg(mat);
2486
2487 for (i = 0; i < ir->type->matrix_columns; i++) {
2488 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2489 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2490
2491 src = st_src_reg(file, -1, ir->type->base_type);
2492 src.index = add_constant(file,
2493 values,
2494 ir->type->vector_elements,
2495 GL_FLOAT,
2496 &src.swizzle);
2497 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2498
2499 mat_column.index++;
2500 }
2501
2502 this->result = mat;
2503 return;
2504 }
2505
2506 switch (ir->type->base_type) {
2507 case GLSL_TYPE_FLOAT:
2508 gl_type = GL_FLOAT;
2509 for (i = 0; i < ir->type->vector_elements; i++) {
2510 values[i].f = ir->value.f[i];
2511 }
2512 break;
2513 case GLSL_TYPE_UINT:
2514 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2515 for (i = 0; i < ir->type->vector_elements; i++) {
2516 if (native_integers)
2517 values[i].u = ir->value.u[i];
2518 else
2519 values[i].f = ir->value.u[i];
2520 }
2521 break;
2522 case GLSL_TYPE_INT:
2523 gl_type = native_integers ? GL_INT : GL_FLOAT;
2524 for (i = 0; i < ir->type->vector_elements; i++) {
2525 if (native_integers)
2526 values[i].i = ir->value.i[i];
2527 else
2528 values[i].f = ir->value.i[i];
2529 }
2530 break;
2531 case GLSL_TYPE_BOOL:
2532 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2533 for (i = 0; i < ir->type->vector_elements; i++) {
2534 if (native_integers)
2535 values[i].u = ir->value.b[i] ? ~0 : 0;
2536 else
2537 values[i].f = ir->value.b[i];
2538 }
2539 break;
2540 default:
2541 assert(!"Non-float/uint/int/bool constant");
2542 }
2543
2544 this->result = st_src_reg(file, -1, ir->type);
2545 this->result.index = add_constant(file,
2546 values,
2547 ir->type->vector_elements,
2548 gl_type,
2549 &this->result.swizzle);
2550 }
2551
2552 function_entry *
2553 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2554 {
2555 function_entry *entry;
2556
2557 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2558 entry = (function_entry *)iter.get();
2559
2560 if (entry->sig == sig)
2561 return entry;
2562 }
2563
2564 entry = ralloc(mem_ctx, function_entry);
2565 entry->sig = sig;
2566 entry->sig_id = this->next_signature_id++;
2567 entry->bgn_inst = NULL;
2568
2569 /* Allocate storage for all the parameters. */
2570 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2571 ir_variable *param = (ir_variable *)iter.get();
2572 variable_storage *storage;
2573
2574 storage = find_variable_storage(param);
2575 assert(!storage);
2576
2577 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2578 this->next_temp);
2579 this->variables.push_tail(storage);
2580
2581 this->next_temp += type_size(param->type);
2582 }
2583
2584 if (!sig->return_type->is_void()) {
2585 entry->return_reg = get_temp(sig->return_type);
2586 } else {
2587 entry->return_reg = undef_src;
2588 }
2589
2590 this->function_signatures.push_tail(entry);
2591 return entry;
2592 }
2593
2594 void
2595 glsl_to_tgsi_visitor::visit(ir_call *ir)
2596 {
2597 glsl_to_tgsi_instruction *call_inst;
2598 ir_function_signature *sig = ir->callee;
2599 function_entry *entry = get_function_signature(sig);
2600 int i;
2601
2602 /* Process in parameters. */
2603 exec_list_iterator sig_iter = sig->parameters.iterator();
2604 foreach_iter(exec_list_iterator, iter, *ir) {
2605 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2606 ir_variable *param = (ir_variable *)sig_iter.get();
2607
2608 if (param->mode == ir_var_function_in ||
2609 param->mode == ir_var_function_inout) {
2610 variable_storage *storage = find_variable_storage(param);
2611 assert(storage);
2612
2613 param_rval->accept(this);
2614 st_src_reg r = this->result;
2615
2616 st_dst_reg l;
2617 l.file = storage->file;
2618 l.index = storage->index;
2619 l.reladdr = NULL;
2620 l.writemask = WRITEMASK_XYZW;
2621 l.cond_mask = COND_TR;
2622
2623 for (i = 0; i < type_size(param->type); i++) {
2624 emit(ir, TGSI_OPCODE_MOV, l, r);
2625 l.index++;
2626 r.index++;
2627 }
2628 }
2629
2630 sig_iter.next();
2631 }
2632 assert(!sig_iter.has_next());
2633
2634 /* Emit call instruction */
2635 call_inst = emit(ir, TGSI_OPCODE_CAL);
2636 call_inst->function = entry;
2637
2638 /* Process out parameters. */
2639 sig_iter = sig->parameters.iterator();
2640 foreach_iter(exec_list_iterator, iter, *ir) {
2641 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2642 ir_variable *param = (ir_variable *)sig_iter.get();
2643
2644 if (param->mode == ir_var_function_out ||
2645 param->mode == ir_var_function_inout) {
2646 variable_storage *storage = find_variable_storage(param);
2647 assert(storage);
2648
2649 st_src_reg r;
2650 r.file = storage->file;
2651 r.index = storage->index;
2652 r.reladdr = NULL;
2653 r.swizzle = SWIZZLE_NOOP;
2654 r.negate = 0;
2655
2656 param_rval->accept(this);
2657 st_dst_reg l = st_dst_reg(this->result);
2658
2659 for (i = 0; i < type_size(param->type); i++) {
2660 emit(ir, TGSI_OPCODE_MOV, l, r);
2661 l.index++;
2662 r.index++;
2663 }
2664 }
2665
2666 sig_iter.next();
2667 }
2668 assert(!sig_iter.has_next());
2669
2670 /* Process return value. */
2671 this->result = entry->return_reg;
2672 }
2673
2674 void
2675 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2676 {
2677 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset;
2678 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2679 glsl_to_tgsi_instruction *inst = NULL;
2680 unsigned opcode = TGSI_OPCODE_NOP;
2681 const glsl_type *sampler_type = ir->sampler->type;
2682 bool is_cube_array = false;
2683
2684 /* if we are a cube array sampler */
2685 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2686 sampler_type->sampler_array)) {
2687 is_cube_array = true;
2688 }
2689
2690 if (ir->coordinate) {
2691 ir->coordinate->accept(this);
2692
2693 /* Put our coords in a temp. We'll need to modify them for shadow,
2694 * projection, or LOD, so the only case we'd use it as is is if
2695 * we're doing plain old texturing. The optimization passes on
2696 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2697 */
2698 coord = get_temp(glsl_type::vec4_type);
2699 coord_dst = st_dst_reg(coord);
2700 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2701 }
2702
2703 if (ir->projector) {
2704 ir->projector->accept(this);
2705 projector = this->result;
2706 }
2707
2708 /* Storage for our result. Ideally for an assignment we'd be using
2709 * the actual storage for the result here, instead.
2710 */
2711 result_src = get_temp(ir->type);
2712 result_dst = st_dst_reg(result_src);
2713
2714 switch (ir->op) {
2715 case ir_tex:
2716 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2717 break;
2718 case ir_txb:
2719 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2720 ir->lod_info.bias->accept(this);
2721 lod_info = this->result;
2722 break;
2723 case ir_txl:
2724 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2725 ir->lod_info.lod->accept(this);
2726 lod_info = this->result;
2727 break;
2728 case ir_txd:
2729 opcode = TGSI_OPCODE_TXD;
2730 ir->lod_info.grad.dPdx->accept(this);
2731 dx = this->result;
2732 ir->lod_info.grad.dPdy->accept(this);
2733 dy = this->result;
2734 break;
2735 case ir_txs:
2736 opcode = TGSI_OPCODE_TXQ;
2737 ir->lod_info.lod->accept(this);
2738 lod_info = this->result;
2739 break;
2740 case ir_txf:
2741 opcode = TGSI_OPCODE_TXF;
2742 ir->lod_info.lod->accept(this);
2743 lod_info = this->result;
2744 if (ir->offset) {
2745 ir->offset->accept(this);
2746 offset = this->result;
2747 }
2748 break;
2749 case ir_txf_ms:
2750 assert(!"Unexpected ir_txf_ms opcode");
2751 break;
2752 }
2753
2754 if (ir->projector) {
2755 if (opcode == TGSI_OPCODE_TEX) {
2756 /* Slot the projector in as the last component of the coord. */
2757 coord_dst.writemask = WRITEMASK_W;
2758 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2759 coord_dst.writemask = WRITEMASK_XYZW;
2760 opcode = TGSI_OPCODE_TXP;
2761 } else {
2762 st_src_reg coord_w = coord;
2763 coord_w.swizzle = SWIZZLE_WWWW;
2764
2765 /* For the other TEX opcodes there's no projective version
2766 * since the last slot is taken up by LOD info. Do the
2767 * projective divide now.
2768 */
2769 coord_dst.writemask = WRITEMASK_W;
2770 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2771
2772 /* In the case where we have to project the coordinates "by hand,"
2773 * the shadow comparator value must also be projected.
2774 */
2775 st_src_reg tmp_src = coord;
2776 if (ir->shadow_comparitor) {
2777 /* Slot the shadow value in as the second to last component of the
2778 * coord.
2779 */
2780 ir->shadow_comparitor->accept(this);
2781
2782 tmp_src = get_temp(glsl_type::vec4_type);
2783 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2784
2785 /* Projective division not allowed for array samplers. */
2786 assert(!sampler_type->sampler_array);
2787
2788 tmp_dst.writemask = WRITEMASK_Z;
2789 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2790
2791 tmp_dst.writemask = WRITEMASK_XY;
2792 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2793 }
2794
2795 coord_dst.writemask = WRITEMASK_XYZ;
2796 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2797
2798 coord_dst.writemask = WRITEMASK_XYZW;
2799 coord.swizzle = SWIZZLE_XYZW;
2800 }
2801 }
2802
2803 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2804 * comparator was put in the correct place (and projected) by the code,
2805 * above, that handles by-hand projection.
2806 */
2807 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2808 /* Slot the shadow value in as the second to last component of the
2809 * coord.
2810 */
2811 ir->shadow_comparitor->accept(this);
2812
2813 if (is_cube_array) {
2814 cube_sc = get_temp(glsl_type::float_type);
2815 cube_sc_dst = st_dst_reg(cube_sc);
2816 cube_sc_dst.writemask = WRITEMASK_X;
2817 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2818 cube_sc_dst.writemask = WRITEMASK_X;
2819 }
2820 else {
2821 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2822 sampler_type->sampler_array) ||
2823 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2824 coord_dst.writemask = WRITEMASK_W;
2825 } else {
2826 coord_dst.writemask = WRITEMASK_Z;
2827 }
2828
2829 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2830 coord_dst.writemask = WRITEMASK_XYZW;
2831 }
2832 }
2833
2834 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2835 opcode == TGSI_OPCODE_TXF) {
2836 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2837 coord_dst.writemask = WRITEMASK_W;
2838 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2839 coord_dst.writemask = WRITEMASK_XYZW;
2840 }
2841
2842 if (opcode == TGSI_OPCODE_TXD)
2843 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2844 else if (opcode == TGSI_OPCODE_TXQ)
2845 inst = emit(ir, opcode, result_dst, lod_info);
2846 else if (opcode == TGSI_OPCODE_TXF) {
2847 inst = emit(ir, opcode, result_dst, coord);
2848 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2849 inst = emit(ir, opcode, result_dst, coord, lod_info);
2850 } else if (opcode == TGSI_OPCODE_TEX2) {
2851 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2852 } else
2853 inst = emit(ir, opcode, result_dst, coord);
2854
2855 if (ir->shadow_comparitor)
2856 inst->tex_shadow = GL_TRUE;
2857
2858 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2859 this->shader_program,
2860 this->prog);
2861
2862 if (ir->offset) {
2863 inst->tex_offset_num_offset = 1;
2864 inst->tex_offsets[0].Index = offset.index;
2865 inst->tex_offsets[0].File = offset.file;
2866 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2867 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2868 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2869 }
2870
2871 switch (sampler_type->sampler_dimensionality) {
2872 case GLSL_SAMPLER_DIM_1D:
2873 inst->tex_target = (sampler_type->sampler_array)
2874 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2875 break;
2876 case GLSL_SAMPLER_DIM_2D:
2877 inst->tex_target = (sampler_type->sampler_array)
2878 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2879 break;
2880 case GLSL_SAMPLER_DIM_3D:
2881 inst->tex_target = TEXTURE_3D_INDEX;
2882 break;
2883 case GLSL_SAMPLER_DIM_CUBE:
2884 inst->tex_target = (sampler_type->sampler_array)
2885 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2886 break;
2887 case GLSL_SAMPLER_DIM_RECT:
2888 inst->tex_target = TEXTURE_RECT_INDEX;
2889 break;
2890 case GLSL_SAMPLER_DIM_BUF:
2891 inst->tex_target = TEXTURE_BUFFER_INDEX;
2892 break;
2893 case GLSL_SAMPLER_DIM_EXTERNAL:
2894 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2895 break;
2896 default:
2897 assert(!"Should not get here.");
2898 }
2899
2900 this->result = result_src;
2901 }
2902
2903 void
2904 glsl_to_tgsi_visitor::visit(ir_return *ir)
2905 {
2906 if (ir->get_value()) {
2907 st_dst_reg l;
2908 int i;
2909
2910 assert(current_function);
2911
2912 ir->get_value()->accept(this);
2913 st_src_reg r = this->result;
2914
2915 l = st_dst_reg(current_function->return_reg);
2916
2917 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2918 emit(ir, TGSI_OPCODE_MOV, l, r);
2919 l.index++;
2920 r.index++;
2921 }
2922 }
2923
2924 emit(ir, TGSI_OPCODE_RET);
2925 }
2926
2927 void
2928 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2929 {
2930 if (ir->condition) {
2931 ir->condition->accept(this);
2932 this->result.negate = ~this->result.negate;
2933 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2934 } else {
2935 emit(ir, TGSI_OPCODE_KILP);
2936 }
2937 }
2938
2939 void
2940 glsl_to_tgsi_visitor::visit(ir_if *ir)
2941 {
2942 glsl_to_tgsi_instruction *if_inst;
2943
2944 ir->condition->accept(this);
2945 assert(this->result.file != PROGRAM_UNDEFINED);
2946
2947 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2948
2949 this->instructions.push_tail(if_inst);
2950
2951 visit_exec_list(&ir->then_instructions, this);
2952
2953 if (!ir->else_instructions.is_empty()) {
2954 emit(ir->condition, TGSI_OPCODE_ELSE);
2955 visit_exec_list(&ir->else_instructions, this);
2956 }
2957
2958 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2959 }
2960
2961 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2962 {
2963 result.file = PROGRAM_UNDEFINED;
2964 next_temp = 1;
2965 next_signature_id = 1;
2966 num_immediates = 0;
2967 current_function = NULL;
2968 num_address_regs = 0;
2969 samplers_used = 0;
2970 indirect_addr_temps = false;
2971 indirect_addr_consts = false;
2972 glsl_version = 0;
2973 native_integers = false;
2974 mem_ctx = ralloc_context(NULL);
2975 ctx = NULL;
2976 prog = NULL;
2977 shader_program = NULL;
2978 options = NULL;
2979 }
2980
2981 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2982 {
2983 ralloc_free(mem_ctx);
2984 }
2985
2986 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2987 {
2988 delete v;
2989 }
2990
2991
2992 /**
2993 * Count resources used by the given gpu program (number of texture
2994 * samplers, etc).
2995 */
2996 static void
2997 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2998 {
2999 v->samplers_used = 0;
3000
3001 foreach_iter(exec_list_iterator, iter, v->instructions) {
3002 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3003
3004 if (is_tex_instruction(inst->op)) {
3005 v->samplers_used |= 1 << inst->sampler;
3006
3007 if (inst->tex_shadow) {
3008 prog->ShadowSamplers |= 1 << inst->sampler;
3009 }
3010 }
3011 }
3012
3013 prog->SamplersUsed = v->samplers_used;
3014
3015 if (v->shader_program != NULL)
3016 _mesa_update_shader_textures_used(v->shader_program, prog);
3017 }
3018
3019 static void
3020 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3021 struct gl_shader_program *shader_program,
3022 const char *name, const glsl_type *type,
3023 ir_constant *val)
3024 {
3025 if (type->is_record()) {
3026 ir_constant *field_constant;
3027
3028 field_constant = (ir_constant *)val->components.get_head();
3029
3030 for (unsigned int i = 0; i < type->length; i++) {
3031 const glsl_type *field_type = type->fields.structure[i].type;
3032 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3033 type->fields.structure[i].name);
3034 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3035 field_type, field_constant);
3036 field_constant = (ir_constant *)field_constant->next;
3037 }
3038 return;
3039 }
3040
3041 unsigned offset;
3042 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3043 &offset);
3044 if (offset == GL_INVALID_INDEX) {
3045 fail_link(shader_program,
3046 "Couldn't find uniform for initializer %s\n", name);
3047 return;
3048 }
3049 int loc = _mesa_uniform_merge_location_offset(index, offset);
3050
3051 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3052 ir_constant *element;
3053 const glsl_type *element_type;
3054 if (type->is_array()) {
3055 element = val->array_elements[i];
3056 element_type = type->fields.array;
3057 } else {
3058 element = val;
3059 element_type = type;
3060 }
3061
3062 void *values;
3063
3064 if (element_type->base_type == GLSL_TYPE_BOOL) {
3065 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3066 for (unsigned int j = 0; j < element_type->components(); j++) {
3067 conv[j] = element->value.b[j];
3068 }
3069 values = (void *)conv;
3070 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3071 element_type->vector_elements,
3072 1);
3073 } else {
3074 values = &element->value;
3075 }
3076
3077 if (element_type->is_matrix()) {
3078 _mesa_uniform_matrix(ctx, shader_program,
3079 element_type->matrix_columns,
3080 element_type->vector_elements,
3081 loc, 1, GL_FALSE, (GLfloat *)values);
3082 } else {
3083 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3084 values, element_type->gl_type);
3085 }
3086
3087 loc++;
3088 }
3089 }
3090
3091 /**
3092 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3093 * are read from the given src in this instruction
3094 */
3095 static int
3096 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3097 {
3098 int read_mask = 0, comp;
3099
3100 /* Now, given the src swizzle and the written channels, find which
3101 * components are actually read
3102 */
3103 for (comp = 0; comp < 4; ++comp) {
3104 const unsigned coord = GET_SWZ(src.swizzle, comp);
3105 ASSERT(coord < 4);
3106 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3107 read_mask |= 1 << coord;
3108 }
3109
3110 return read_mask;
3111 }
3112
3113 /**
3114 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3115 * instruction is the first instruction to write to register T0. There are
3116 * several lowering passes done in GLSL IR (e.g. branches and
3117 * relative addressing) that create a large number of conditional assignments
3118 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3119 *
3120 * Here is why this conversion is safe:
3121 * CMP T0, T1 T2 T0 can be expanded to:
3122 * if (T1 < 0.0)
3123 * MOV T0, T2;
3124 * else
3125 * MOV T0, T0;
3126 *
3127 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3128 * as the original program. If (T1 < 0.0) evaluates to false, executing
3129 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3130 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3131 * because any instruction that was going to read from T0 after this was going
3132 * to read a garbage value anyway.
3133 */
3134 void
3135 glsl_to_tgsi_visitor::simplify_cmp(void)
3136 {
3137 unsigned *tempWrites;
3138 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3139
3140 tempWrites = new unsigned[MAX_TEMPS];
3141 if (!tempWrites) {
3142 return;
3143 }
3144 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3145 memset(outputWrites, 0, sizeof(outputWrites));
3146
3147 foreach_iter(exec_list_iterator, iter, this->instructions) {
3148 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3149 unsigned prevWriteMask = 0;
3150
3151 /* Give up if we encounter relative addressing or flow control. */
3152 if (inst->dst.reladdr ||
3153 tgsi_get_opcode_info(inst->op)->is_branch ||
3154 inst->op == TGSI_OPCODE_BGNSUB ||
3155 inst->op == TGSI_OPCODE_CONT ||
3156 inst->op == TGSI_OPCODE_END ||
3157 inst->op == TGSI_OPCODE_ENDSUB ||
3158 inst->op == TGSI_OPCODE_RET) {
3159 break;
3160 }
3161
3162 if (inst->dst.file == PROGRAM_OUTPUT) {
3163 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3164 prevWriteMask = outputWrites[inst->dst.index];
3165 outputWrites[inst->dst.index] |= inst->dst.writemask;
3166 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3167 assert(inst->dst.index < MAX_TEMPS);
3168 prevWriteMask = tempWrites[inst->dst.index];
3169 tempWrites[inst->dst.index] |= inst->dst.writemask;
3170 }
3171
3172 /* For a CMP to be considered a conditional write, the destination
3173 * register and source register two must be the same. */
3174 if (inst->op == TGSI_OPCODE_CMP
3175 && !(inst->dst.writemask & prevWriteMask)
3176 && inst->src[2].file == inst->dst.file
3177 && inst->src[2].index == inst->dst.index
3178 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3179
3180 inst->op = TGSI_OPCODE_MOV;
3181 inst->src[0] = inst->src[1];
3182 }
3183 }
3184
3185 delete [] tempWrites;
3186 }
3187
3188 /* Replaces all references to a temporary register index with another index. */
3189 void
3190 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3191 {
3192 foreach_iter(exec_list_iterator, iter, this->instructions) {
3193 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3194 unsigned j;
3195
3196 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3197 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3198 inst->src[j].index == index) {
3199 inst->src[j].index = new_index;
3200 }
3201 }
3202
3203 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3204 inst->dst.index = new_index;
3205 }
3206 }
3207 }
3208
3209 int
3210 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3211 {
3212 int depth = 0; /* loop depth */
3213 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3214 unsigned i = 0, j;
3215
3216 foreach_iter(exec_list_iterator, iter, this->instructions) {
3217 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3218
3219 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3220 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3221 inst->src[j].index == index) {
3222 return (depth == 0) ? i : loop_start;
3223 }
3224 }
3225
3226 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3227 if(depth++ == 0)
3228 loop_start = i;
3229 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3230 if (--depth == 0)
3231 loop_start = -1;
3232 }
3233 assert(depth >= 0);
3234
3235 i++;
3236 }
3237
3238 return -1;
3239 }
3240
3241 int
3242 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3243 {
3244 int depth = 0; /* loop depth */
3245 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3246 int i = 0;
3247
3248 foreach_iter(exec_list_iterator, iter, this->instructions) {
3249 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3250
3251 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3252 return (depth == 0) ? i : loop_start;
3253 }
3254
3255 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3256 if(depth++ == 0)
3257 loop_start = i;
3258 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3259 if (--depth == 0)
3260 loop_start = -1;
3261 }
3262 assert(depth >= 0);
3263
3264 i++;
3265 }
3266
3267 return -1;
3268 }
3269
3270 int
3271 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3272 {
3273 int depth = 0; /* loop depth */
3274 int last = -1; /* index of last instruction that reads the temporary */
3275 unsigned i = 0, j;
3276
3277 foreach_iter(exec_list_iterator, iter, this->instructions) {
3278 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3279
3280 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3281 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3282 inst->src[j].index == index) {
3283 last = (depth == 0) ? i : -2;
3284 }
3285 }
3286
3287 if (inst->op == TGSI_OPCODE_BGNLOOP)
3288 depth++;
3289 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3290 if (--depth == 0 && last == -2)
3291 last = i;
3292 assert(depth >= 0);
3293
3294 i++;
3295 }
3296
3297 assert(last >= -1);
3298 return last;
3299 }
3300
3301 int
3302 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3303 {
3304 int depth = 0; /* loop depth */
3305 int last = -1; /* index of last instruction that writes to the temporary */
3306 int i = 0;
3307
3308 foreach_iter(exec_list_iterator, iter, this->instructions) {
3309 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3310
3311 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3312 last = (depth == 0) ? i : -2;
3313
3314 if (inst->op == TGSI_OPCODE_BGNLOOP)
3315 depth++;
3316 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3317 if (--depth == 0 && last == -2)
3318 last = i;
3319 assert(depth >= 0);
3320
3321 i++;
3322 }
3323
3324 assert(last >= -1);
3325 return last;
3326 }
3327
3328 /*
3329 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3330 * channels for copy propagation and updates following instructions to
3331 * use the original versions.
3332 *
3333 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3334 * will occur. As an example, a TXP production before this pass:
3335 *
3336 * 0: MOV TEMP[1], INPUT[4].xyyy;
3337 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3338 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3339 *
3340 * and after:
3341 *
3342 * 0: MOV TEMP[1], INPUT[4].xyyy;
3343 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3344 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3345 *
3346 * which allows for dead code elimination on TEMP[1]'s writes.
3347 */
3348 void
3349 glsl_to_tgsi_visitor::copy_propagate(void)
3350 {
3351 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3352 glsl_to_tgsi_instruction *,
3353 this->next_temp * 4);
3354 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3355 int level = 0;
3356
3357 foreach_iter(exec_list_iterator, iter, this->instructions) {
3358 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3359
3360 assert(inst->dst.file != PROGRAM_TEMPORARY
3361 || inst->dst.index < this->next_temp);
3362
3363 /* First, do any copy propagation possible into the src regs. */
3364 for (int r = 0; r < 3; r++) {
3365 glsl_to_tgsi_instruction *first = NULL;
3366 bool good = true;
3367 int acp_base = inst->src[r].index * 4;
3368
3369 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3370 inst->src[r].reladdr)
3371 continue;
3372
3373 /* See if we can find entries in the ACP consisting of MOVs
3374 * from the same src register for all the swizzled channels
3375 * of this src register reference.
3376 */
3377 for (int i = 0; i < 4; i++) {
3378 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3379 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3380
3381 if (!copy_chan) {
3382 good = false;
3383 break;
3384 }
3385
3386 assert(acp_level[acp_base + src_chan] <= level);
3387
3388 if (!first) {
3389 first = copy_chan;
3390 } else {
3391 if (first->src[0].file != copy_chan->src[0].file ||
3392 first->src[0].index != copy_chan->src[0].index) {
3393 good = false;
3394 break;
3395 }
3396 }
3397 }
3398
3399 if (good) {
3400 /* We've now validated that we can copy-propagate to
3401 * replace this src register reference. Do it.
3402 */
3403 inst->src[r].file = first->src[0].file;
3404 inst->src[r].index = first->src[0].index;
3405
3406 int swizzle = 0;
3407 for (int i = 0; i < 4; i++) {
3408 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3409 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3410 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3411 (3 * i));
3412 }
3413 inst->src[r].swizzle = swizzle;
3414 }
3415 }
3416
3417 switch (inst->op) {
3418 case TGSI_OPCODE_BGNLOOP:
3419 case TGSI_OPCODE_ENDLOOP:
3420 /* End of a basic block, clear the ACP entirely. */
3421 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3422 break;
3423
3424 case TGSI_OPCODE_IF:
3425 ++level;
3426 break;
3427
3428 case TGSI_OPCODE_ENDIF:
3429 case TGSI_OPCODE_ELSE:
3430 /* Clear all channels written inside the block from the ACP, but
3431 * leaving those that were not touched.
3432 */
3433 for (int r = 0; r < this->next_temp; r++) {
3434 for (int c = 0; c < 4; c++) {
3435 if (!acp[4 * r + c])
3436 continue;
3437
3438 if (acp_level[4 * r + c] >= level)
3439 acp[4 * r + c] = NULL;
3440 }
3441 }
3442 if (inst->op == TGSI_OPCODE_ENDIF)
3443 --level;
3444 break;
3445
3446 default:
3447 /* Continuing the block, clear any written channels from
3448 * the ACP.
3449 */
3450 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3451 /* Any temporary might be written, so no copy propagation
3452 * across this instruction.
3453 */
3454 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3455 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3456 inst->dst.reladdr) {
3457 /* Any output might be written, so no copy propagation
3458 * from outputs across this instruction.
3459 */
3460 for (int r = 0; r < this->next_temp; r++) {
3461 for (int c = 0; c < 4; c++) {
3462 if (!acp[4 * r + c])
3463 continue;
3464
3465 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3466 acp[4 * r + c] = NULL;
3467 }
3468 }
3469 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3470 inst->dst.file == PROGRAM_OUTPUT) {
3471 /* Clear where it's used as dst. */
3472 if (inst->dst.file == PROGRAM_TEMPORARY) {
3473 for (int c = 0; c < 4; c++) {
3474 if (inst->dst.writemask & (1 << c)) {
3475 acp[4 * inst->dst.index + c] = NULL;
3476 }
3477 }
3478 }
3479
3480 /* Clear where it's used as src. */
3481 for (int r = 0; r < this->next_temp; r++) {
3482 for (int c = 0; c < 4; c++) {
3483 if (!acp[4 * r + c])
3484 continue;
3485
3486 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3487
3488 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3489 acp[4 * r + c]->src[0].index == inst->dst.index &&
3490 inst->dst.writemask & (1 << src_chan))
3491 {
3492 acp[4 * r + c] = NULL;
3493 }
3494 }
3495 }
3496 }
3497 break;
3498 }
3499
3500 /* If this is a copy, add it to the ACP. */
3501 if (inst->op == TGSI_OPCODE_MOV &&
3502 inst->dst.file == PROGRAM_TEMPORARY &&
3503 !inst->dst.reladdr &&
3504 !inst->saturate &&
3505 !inst->src[0].reladdr &&
3506 !inst->src[0].negate) {
3507 for (int i = 0; i < 4; i++) {
3508 if (inst->dst.writemask & (1 << i)) {
3509 acp[4 * inst->dst.index + i] = inst;
3510 acp_level[4 * inst->dst.index + i] = level;
3511 }
3512 }
3513 }
3514 }
3515
3516 ralloc_free(acp_level);
3517 ralloc_free(acp);
3518 }
3519
3520 /*
3521 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3522 *
3523 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3524 * will occur. As an example, a TXP production after copy propagation but
3525 * before this pass:
3526 *
3527 * 0: MOV TEMP[1], INPUT[4].xyyy;
3528 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3529 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3530 *
3531 * and after this pass:
3532 *
3533 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3534 *
3535 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3536 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3537 */
3538 void
3539 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3540 {
3541 int i;
3542
3543 for (i=0; i < this->next_temp; i++) {
3544 int last_read = get_last_temp_read(i);
3545 int j = 0;
3546
3547 foreach_iter(exec_list_iterator, iter, this->instructions) {
3548 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3549
3550 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3551 j > last_read)
3552 {
3553 iter.remove();
3554 delete inst;
3555 }
3556
3557 j++;
3558 }
3559 }
3560 }
3561
3562 /*
3563 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3564 * code elimination. This is less primitive than eliminate_dead_code(), as it
3565 * is per-channel and can detect consecutive writes without a read between them
3566 * as dead code. However, there is some dead code that can be eliminated by
3567 * eliminate_dead_code() but not this function - for example, this function
3568 * cannot eliminate an instruction writing to a register that is never read and
3569 * is the only instruction writing to that register.
3570 *
3571 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3572 * will occur.
3573 */
3574 int
3575 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3576 {
3577 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3578 glsl_to_tgsi_instruction *,
3579 this->next_temp * 4);
3580 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3581 int level = 0;
3582 int removed = 0;
3583
3584 foreach_iter(exec_list_iterator, iter, this->instructions) {
3585 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3586
3587 assert(inst->dst.file != PROGRAM_TEMPORARY
3588 || inst->dst.index < this->next_temp);
3589
3590 switch (inst->op) {
3591 case TGSI_OPCODE_BGNLOOP:
3592 case TGSI_OPCODE_ENDLOOP:
3593 case TGSI_OPCODE_CONT:
3594 case TGSI_OPCODE_BRK:
3595 /* End of a basic block, clear the write array entirely.
3596 *
3597 * This keeps us from killing dead code when the writes are
3598 * on either side of a loop, even when the register isn't touched
3599 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3600 * dead code of this type, so it shouldn't make a difference as long as
3601 * the dead code elimination pass in the GLSL compiler does its job.
3602 */
3603 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3604 break;
3605
3606 case TGSI_OPCODE_ENDIF:
3607 case TGSI_OPCODE_ELSE:
3608 /* Promote the recorded level of all channels written inside the
3609 * preceding if or else block to the level above the if/else block.
3610 */
3611 for (int r = 0; r < this->next_temp; r++) {
3612 for (int c = 0; c < 4; c++) {
3613 if (!writes[4 * r + c])
3614 continue;
3615
3616 if (write_level[4 * r + c] == level)
3617 write_level[4 * r + c] = level-1;
3618 }
3619 }
3620
3621 if(inst->op == TGSI_OPCODE_ENDIF)
3622 --level;
3623
3624 break;
3625
3626 case TGSI_OPCODE_IF:
3627 ++level;
3628 /* fallthrough to default case to mark the condition as read */
3629
3630 default:
3631 /* Continuing the block, clear any channels from the write array that
3632 * are read by this instruction.
3633 */
3634 for (unsigned i = 0; i < Elements(inst->src); i++) {
3635 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3636 /* Any temporary might be read, so no dead code elimination
3637 * across this instruction.
3638 */
3639 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3640 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3641 /* Clear where it's used as src. */
3642 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3643 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3644 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3645 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3646
3647 for (int c = 0; c < 4; c++) {
3648 if (src_chans & (1 << c)) {
3649 writes[4 * inst->src[i].index + c] = NULL;
3650 }
3651 }
3652 }
3653 }
3654 break;
3655 }
3656
3657 /* If this instruction writes to a temporary, add it to the write array.
3658 * If there is already an instruction in the write array for one or more
3659 * of the channels, flag that channel write as dead.
3660 */
3661 if (inst->dst.file == PROGRAM_TEMPORARY &&
3662 !inst->dst.reladdr &&
3663 !inst->saturate) {
3664 for (int c = 0; c < 4; c++) {
3665 if (inst->dst.writemask & (1 << c)) {
3666 if (writes[4 * inst->dst.index + c]) {
3667 if (write_level[4 * inst->dst.index + c] < level)
3668 continue;
3669 else
3670 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3671 }
3672 writes[4 * inst->dst.index + c] = inst;
3673 write_level[4 * inst->dst.index + c] = level;
3674 }
3675 }
3676 }
3677 }
3678
3679 /* Anything still in the write array at this point is dead code. */
3680 for (int r = 0; r < this->next_temp; r++) {
3681 for (int c = 0; c < 4; c++) {
3682 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3683 if (inst)
3684 inst->dead_mask |= (1 << c);
3685 }
3686 }
3687
3688 /* Now actually remove the instructions that are completely dead and update
3689 * the writemask of other instructions with dead channels.
3690 */
3691 foreach_iter(exec_list_iterator, iter, this->instructions) {
3692 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3693
3694 if (!inst->dead_mask || !inst->dst.writemask)
3695 continue;
3696 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3697 iter.remove();
3698 delete inst;
3699 removed++;
3700 } else
3701 inst->dst.writemask &= ~(inst->dead_mask);
3702 }
3703
3704 ralloc_free(write_level);
3705 ralloc_free(writes);
3706
3707 return removed;
3708 }
3709
3710 /* Merges temporary registers together where possible to reduce the number of
3711 * registers needed to run a program.
3712 *
3713 * Produces optimal code only after copy propagation and dead code elimination
3714 * have been run. */
3715 void
3716 glsl_to_tgsi_visitor::merge_registers(void)
3717 {
3718 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3719 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3720 int i, j;
3721
3722 /* Read the indices of the last read and first write to each temp register
3723 * into an array so that we don't have to traverse the instruction list as
3724 * much. */
3725 for (i=0; i < this->next_temp; i++) {
3726 last_reads[i] = get_last_temp_read(i);
3727 first_writes[i] = get_first_temp_write(i);
3728 }
3729
3730 /* Start looking for registers with non-overlapping usages that can be
3731 * merged together. */
3732 for (i=0; i < this->next_temp; i++) {
3733 /* Don't touch unused registers. */
3734 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3735
3736 for (j=0; j < this->next_temp; j++) {
3737 /* Don't touch unused registers. */
3738 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3739
3740 /* We can merge the two registers if the first write to j is after or
3741 * in the same instruction as the last read from i. Note that the
3742 * register at index i will always be used earlier or at the same time
3743 * as the register at index j. */
3744 if (first_writes[i] <= first_writes[j] &&
3745 last_reads[i] <= first_writes[j])
3746 {
3747 rename_temp_register(j, i); /* Replace all references to j with i.*/
3748
3749 /* Update the first_writes and last_reads arrays with the new
3750 * values for the merged register index, and mark the newly unused
3751 * register index as such. */
3752 last_reads[i] = last_reads[j];
3753 first_writes[j] = -1;
3754 last_reads[j] = -1;
3755 }
3756 }
3757 }
3758
3759 ralloc_free(last_reads);
3760 ralloc_free(first_writes);
3761 }
3762
3763 /* Reassign indices to temporary registers by reusing unused indices created
3764 * by optimization passes. */
3765 void
3766 glsl_to_tgsi_visitor::renumber_registers(void)
3767 {
3768 int i = 0;
3769 int new_index = 0;
3770
3771 for (i=0; i < this->next_temp; i++) {
3772 if (get_first_temp_read(i) < 0) continue;
3773 if (i != new_index)
3774 rename_temp_register(i, new_index);
3775 new_index++;
3776 }
3777
3778 this->next_temp = new_index;
3779 }
3780
3781 /**
3782 * Returns a fragment program which implements the current pixel transfer ops.
3783 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3784 */
3785 extern "C" void
3786 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3787 glsl_to_tgsi_visitor *original,
3788 int scale_and_bias, int pixel_maps)
3789 {
3790 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3791 struct st_context *st = st_context(original->ctx);
3792 struct gl_program *prog = &fp->Base.Base;
3793 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3794 st_src_reg coord, src0;
3795 st_dst_reg dst0;
3796 glsl_to_tgsi_instruction *inst;
3797
3798 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3799 v->ctx = original->ctx;
3800 v->prog = prog;
3801 v->shader_program = NULL;
3802 v->glsl_version = original->glsl_version;
3803 v->native_integers = original->native_integers;
3804 v->options = original->options;
3805 v->next_temp = original->next_temp;
3806 v->num_address_regs = original->num_address_regs;
3807 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3808 v->indirect_addr_temps = original->indirect_addr_temps;
3809 v->indirect_addr_consts = original->indirect_addr_consts;
3810 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3811 v->num_immediates = original->num_immediates;
3812
3813 /*
3814 * Get initial pixel color from the texture.
3815 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3816 */
3817 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3818 src0 = v->get_temp(glsl_type::vec4_type);
3819 dst0 = st_dst_reg(src0);
3820 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3821 inst->sampler = 0;
3822 inst->tex_target = TEXTURE_2D_INDEX;
3823
3824 prog->InputsRead |= FRAG_BIT_TEX0;
3825 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3826 v->samplers_used |= (1 << 0);
3827
3828 if (scale_and_bias) {
3829 static const gl_state_index scale_state[STATE_LENGTH] =
3830 { STATE_INTERNAL, STATE_PT_SCALE,
3831 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3832 static const gl_state_index bias_state[STATE_LENGTH] =
3833 { STATE_INTERNAL, STATE_PT_BIAS,
3834 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3835 GLint scale_p, bias_p;
3836 st_src_reg scale, bias;
3837
3838 scale_p = _mesa_add_state_reference(params, scale_state);
3839 bias_p = _mesa_add_state_reference(params, bias_state);
3840
3841 /* MAD colorTemp, colorTemp, scale, bias; */
3842 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3843 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3844 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3845 }
3846
3847 if (pixel_maps) {
3848 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3849 st_dst_reg temp_dst = st_dst_reg(temp);
3850
3851 assert(st->pixel_xfer.pixelmap_texture);
3852
3853 /* With a little effort, we can do four pixel map look-ups with
3854 * two TEX instructions:
3855 */
3856
3857 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3858 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3859 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3860 inst->sampler = 1;
3861 inst->tex_target = TEXTURE_2D_INDEX;
3862
3863 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3864 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3865 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3866 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3867 inst->sampler = 1;
3868 inst->tex_target = TEXTURE_2D_INDEX;
3869
3870 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3871 v->samplers_used |= (1 << 1);
3872
3873 /* MOV colorTemp, temp; */
3874 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3875 }
3876
3877 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3878 * new visitor. */
3879 foreach_iter(exec_list_iterator, iter, original->instructions) {
3880 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3881 glsl_to_tgsi_instruction *newinst;
3882 st_src_reg src_regs[3];
3883
3884 if (inst->dst.file == PROGRAM_OUTPUT)
3885 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3886
3887 for (int i=0; i<3; i++) {
3888 src_regs[i] = inst->src[i];
3889 if (src_regs[i].file == PROGRAM_INPUT &&
3890 src_regs[i].index == FRAG_ATTRIB_COL0)
3891 {
3892 src_regs[i].file = PROGRAM_TEMPORARY;
3893 src_regs[i].index = src0.index;
3894 }
3895 else if (src_regs[i].file == PROGRAM_INPUT)
3896 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3897 }
3898
3899 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3900 newinst->tex_target = inst->tex_target;
3901 }
3902
3903 /* Make modifications to fragment program info. */
3904 prog->Parameters = _mesa_combine_parameter_lists(params,
3905 original->prog->Parameters);
3906 _mesa_free_parameter_list(params);
3907 count_resources(v, prog);
3908 fp->glsl_to_tgsi = v;
3909 }
3910
3911 /**
3912 * Make fragment program for glBitmap:
3913 * Sample the texture and kill the fragment if the bit is 0.
3914 * This program will be combined with the user's fragment program.
3915 *
3916 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3917 */
3918 extern "C" void
3919 get_bitmap_visitor(struct st_fragment_program *fp,
3920 glsl_to_tgsi_visitor *original, int samplerIndex)
3921 {
3922 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3923 struct st_context *st = st_context(original->ctx);
3924 struct gl_program *prog = &fp->Base.Base;
3925 st_src_reg coord, src0;
3926 st_dst_reg dst0;
3927 glsl_to_tgsi_instruction *inst;
3928
3929 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3930 v->ctx = original->ctx;
3931 v->prog = prog;
3932 v->shader_program = NULL;
3933 v->glsl_version = original->glsl_version;
3934 v->native_integers = original->native_integers;
3935 v->options = original->options;
3936 v->next_temp = original->next_temp;
3937 v->num_address_regs = original->num_address_regs;
3938 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3939 v->indirect_addr_temps = original->indirect_addr_temps;
3940 v->indirect_addr_consts = original->indirect_addr_consts;
3941 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3942 v->num_immediates = original->num_immediates;
3943
3944 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3945 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3946 src0 = v->get_temp(glsl_type::vec4_type);
3947 dst0 = st_dst_reg(src0);
3948 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3949 inst->sampler = samplerIndex;
3950 inst->tex_target = TEXTURE_2D_INDEX;
3951
3952 prog->InputsRead |= FRAG_BIT_TEX0;
3953 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3954 v->samplers_used |= (1 << samplerIndex);
3955
3956 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3957 src0.negate = NEGATE_XYZW;
3958 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3959 src0.swizzle = SWIZZLE_XXXX;
3960 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3961
3962 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3963 * new visitor. */
3964 foreach_iter(exec_list_iterator, iter, original->instructions) {
3965 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3966 glsl_to_tgsi_instruction *newinst;
3967 st_src_reg src_regs[3];
3968
3969 if (inst->dst.file == PROGRAM_OUTPUT)
3970 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3971
3972 for (int i=0; i<3; i++) {
3973 src_regs[i] = inst->src[i];
3974 if (src_regs[i].file == PROGRAM_INPUT)
3975 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3976 }
3977
3978 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3979 newinst->tex_target = inst->tex_target;
3980 }
3981
3982 /* Make modifications to fragment program info. */
3983 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3984 count_resources(v, prog);
3985 fp->glsl_to_tgsi = v;
3986 }
3987
3988 /* ------------------------- TGSI conversion stuff -------------------------- */
3989 struct label {
3990 unsigned branch_target;
3991 unsigned token;
3992 };
3993
3994 /**
3995 * Intermediate state used during shader translation.
3996 */
3997 struct st_translate {
3998 struct ureg_program *ureg;
3999
4000 struct ureg_dst temps[MAX_TEMPS];
4001 struct ureg_src *constants;
4002 struct ureg_src *immediates;
4003 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4004 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4005 struct ureg_dst address[1];
4006 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4007 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4008
4009 const GLuint *inputMapping;
4010 const GLuint *outputMapping;
4011
4012 /* For every instruction that contains a label (eg CALL), keep
4013 * details so that we can go back afterwards and emit the correct
4014 * tgsi instruction number for each label.
4015 */
4016 struct label *labels;
4017 unsigned labels_size;
4018 unsigned labels_count;
4019
4020 /* Keep a record of the tgsi instruction number that each mesa
4021 * instruction starts at, will be used to fix up labels after
4022 * translation.
4023 */
4024 unsigned *insn;
4025 unsigned insn_size;
4026 unsigned insn_count;
4027
4028 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4029
4030 boolean error;
4031 };
4032
4033 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4034 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4035 TGSI_SEMANTIC_FACE,
4036 TGSI_SEMANTIC_VERTEXID,
4037 TGSI_SEMANTIC_INSTANCEID
4038 };
4039
4040 /**
4041 * Make note of a branch to a label in the TGSI code.
4042 * After we've emitted all instructions, we'll go over the list
4043 * of labels built here and patch the TGSI code with the actual
4044 * location of each label.
4045 */
4046 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4047 {
4048 unsigned i;
4049
4050 if (t->labels_count + 1 >= t->labels_size) {
4051 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4052 t->labels = (struct label *)realloc(t->labels,
4053 t->labels_size * sizeof(struct label));
4054 if (t->labels == NULL) {
4055 static unsigned dummy;
4056 t->error = TRUE;
4057 return &dummy;
4058 }
4059 }
4060
4061 i = t->labels_count++;
4062 t->labels[i].branch_target = branch_target;
4063 return &t->labels[i].token;
4064 }
4065
4066 /**
4067 * Called prior to emitting the TGSI code for each instruction.
4068 * Allocate additional space for instructions if needed.
4069 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4070 * the next TGSI instruction.
4071 */
4072 static void set_insn_start(struct st_translate *t, unsigned start)
4073 {
4074 if (t->insn_count + 1 >= t->insn_size) {
4075 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4076 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4077 if (t->insn == NULL) {
4078 t->error = TRUE;
4079 return;
4080 }
4081 }
4082
4083 t->insn[t->insn_count++] = start;
4084 }
4085
4086 /**
4087 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4088 */
4089 static struct ureg_src
4090 emit_immediate(struct st_translate *t,
4091 gl_constant_value values[4],
4092 int type, int size)
4093 {
4094 struct ureg_program *ureg = t->ureg;
4095
4096 switch(type)
4097 {
4098 case GL_FLOAT:
4099 return ureg_DECL_immediate(ureg, &values[0].f, size);
4100 case GL_INT:
4101 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4102 case GL_UNSIGNED_INT:
4103 case GL_BOOL:
4104 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4105 default:
4106 assert(!"should not get here - type must be float, int, uint, or bool");
4107 return ureg_src_undef();
4108 }
4109 }
4110
4111 /**
4112 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4113 */
4114 static struct ureg_dst
4115 dst_register(struct st_translate *t,
4116 gl_register_file file,
4117 GLuint index)
4118 {
4119 switch(file) {
4120 case PROGRAM_UNDEFINED:
4121 return ureg_dst_undef();
4122
4123 case PROGRAM_TEMPORARY:
4124 if (ureg_dst_is_undef(t->temps[index]))
4125 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4126
4127 return t->temps[index];
4128
4129 case PROGRAM_OUTPUT:
4130 if (t->procType == TGSI_PROCESSOR_VERTEX)
4131 assert(index < VERT_RESULT_MAX);
4132 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4133 assert(index < FRAG_RESULT_MAX);
4134 else
4135 assert(index < GEOM_RESULT_MAX);
4136
4137 assert(t->outputMapping[index] < Elements(t->outputs));
4138
4139 return t->outputs[t->outputMapping[index]];
4140
4141 case PROGRAM_ADDRESS:
4142 return t->address[index];
4143
4144 default:
4145 assert(!"unknown dst register file");
4146 return ureg_dst_undef();
4147 }
4148 }
4149
4150 /**
4151 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4152 */
4153 static struct ureg_src
4154 src_register(struct st_translate *t,
4155 gl_register_file file,
4156 GLint index, GLint index2D)
4157 {
4158 switch(file) {
4159 case PROGRAM_UNDEFINED:
4160 return ureg_src_undef();
4161
4162 case PROGRAM_TEMPORARY:
4163 assert(index >= 0);
4164 assert(index < (int) Elements(t->temps));
4165 if (ureg_dst_is_undef(t->temps[index]))
4166 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4167 return ureg_src(t->temps[index]);
4168
4169 case PROGRAM_ENV_PARAM:
4170 case PROGRAM_LOCAL_PARAM:
4171 case PROGRAM_UNIFORM:
4172 assert(index >= 0);
4173 return t->constants[index];
4174 case PROGRAM_STATE_VAR:
4175 case PROGRAM_CONSTANT: /* ie, immediate */
4176 if (index2D) {
4177 struct ureg_src src;
4178 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4179 src.Dimension = 1;
4180 src.DimensionIndex = index2D;
4181 return src;
4182 } else if (index < 0)
4183 return ureg_DECL_constant(t->ureg, 0);
4184 else
4185 return t->constants[index];
4186
4187 case PROGRAM_IMMEDIATE:
4188 return t->immediates[index];
4189
4190 case PROGRAM_INPUT:
4191 assert(t->inputMapping[index] < Elements(t->inputs));
4192 return t->inputs[t->inputMapping[index]];
4193
4194 case PROGRAM_OUTPUT:
4195 assert(t->outputMapping[index] < Elements(t->outputs));
4196 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4197
4198 case PROGRAM_ADDRESS:
4199 return ureg_src(t->address[index]);
4200
4201 case PROGRAM_SYSTEM_VALUE:
4202 assert(index < (int) Elements(t->systemValues));
4203 return t->systemValues[index];
4204
4205 default:
4206 assert(!"unknown src register file");
4207 return ureg_src_undef();
4208 }
4209 }
4210
4211 /**
4212 * Create a TGSI ureg_dst register from an st_dst_reg.
4213 */
4214 static struct ureg_dst
4215 translate_dst(struct st_translate *t,
4216 const st_dst_reg *dst_reg,
4217 bool saturate, bool clamp_color)
4218 {
4219 struct ureg_dst dst = dst_register(t,
4220 dst_reg->file,
4221 dst_reg->index);
4222
4223 dst = ureg_writemask(dst, dst_reg->writemask);
4224
4225 if (saturate)
4226 dst = ureg_saturate(dst);
4227 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4228 /* Clamp colors for ARB_color_buffer_float. */
4229 switch (t->procType) {
4230 case TGSI_PROCESSOR_VERTEX:
4231 /* XXX if the geometry shader is present, this must be done there
4232 * instead of here. */
4233 if (dst_reg->index == VERT_RESULT_COL0 ||
4234 dst_reg->index == VERT_RESULT_COL1 ||
4235 dst_reg->index == VERT_RESULT_BFC0 ||
4236 dst_reg->index == VERT_RESULT_BFC1) {
4237 dst = ureg_saturate(dst);
4238 }
4239 break;
4240
4241 case TGSI_PROCESSOR_FRAGMENT:
4242 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4243 dst = ureg_saturate(dst);
4244 }
4245 break;
4246 }
4247 }
4248
4249 if (dst_reg->reladdr != NULL)
4250 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4251
4252 return dst;
4253 }
4254
4255 /**
4256 * Create a TGSI ureg_src register from an st_src_reg.
4257 */
4258 static struct ureg_src
4259 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4260 {
4261 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4262
4263 src = ureg_swizzle(src,
4264 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4265 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4266 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4267 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4268
4269 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4270 src = ureg_negate(src);
4271
4272 if (src_reg->reladdr != NULL) {
4273 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4274 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4275 * set the bit for src.Negate. So we have to do the operation manually
4276 * here to work around the compiler's problems. */
4277 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4278 struct ureg_src addr = ureg_src(t->address[0]);
4279 src.Indirect = 1;
4280 src.IndirectFile = addr.File;
4281 src.IndirectIndex = addr.Index;
4282 src.IndirectSwizzle = addr.SwizzleX;
4283
4284 if (src_reg->file != PROGRAM_INPUT &&
4285 src_reg->file != PROGRAM_OUTPUT) {
4286 /* If src_reg->index was negative, it was set to zero in
4287 * src_register(). Reassign it now. But don't do this
4288 * for input/output regs since they get remapped while
4289 * const buffers don't.
4290 */
4291 src.Index = src_reg->index;
4292 }
4293 }
4294
4295 return src;
4296 }
4297
4298 static struct tgsi_texture_offset
4299 translate_tex_offset(struct st_translate *t,
4300 const struct tgsi_texture_offset *in_offset)
4301 {
4302 struct tgsi_texture_offset offset;
4303 struct ureg_src imm_src;
4304
4305 assert(in_offset->File == PROGRAM_IMMEDIATE);
4306 imm_src = t->immediates[in_offset->Index];
4307
4308 offset.File = imm_src.File;
4309 offset.Index = imm_src.Index;
4310 offset.SwizzleX = imm_src.SwizzleX;
4311 offset.SwizzleY = imm_src.SwizzleY;
4312 offset.SwizzleZ = imm_src.SwizzleZ;
4313 offset.File = TGSI_FILE_IMMEDIATE;
4314 offset.Padding = 0;
4315
4316 return offset;
4317 }
4318
4319 static void
4320 compile_tgsi_instruction(struct st_translate *t,
4321 const glsl_to_tgsi_instruction *inst,
4322 bool clamp_dst_color_output)
4323 {
4324 struct ureg_program *ureg = t->ureg;
4325 GLuint i;
4326 struct ureg_dst dst[1];
4327 struct ureg_src src[4];
4328 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4329
4330 unsigned num_dst;
4331 unsigned num_src;
4332 unsigned tex_target;
4333
4334 num_dst = num_inst_dst_regs(inst->op);
4335 num_src = num_inst_src_regs(inst->op);
4336
4337 if (num_dst)
4338 dst[0] = translate_dst(t,
4339 &inst->dst,
4340 inst->saturate,
4341 clamp_dst_color_output);
4342
4343 for (i = 0; i < num_src; i++)
4344 src[i] = translate_src(t, &inst->src[i]);
4345
4346 switch(inst->op) {
4347 case TGSI_OPCODE_BGNLOOP:
4348 case TGSI_OPCODE_CAL:
4349 case TGSI_OPCODE_ELSE:
4350 case TGSI_OPCODE_ENDLOOP:
4351 case TGSI_OPCODE_IF:
4352 assert(num_dst == 0);
4353 ureg_label_insn(ureg,
4354 inst->op,
4355 src, num_src,
4356 get_label(t,
4357 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4358 return;
4359
4360 case TGSI_OPCODE_TEX:
4361 case TGSI_OPCODE_TXB:
4362 case TGSI_OPCODE_TXD:
4363 case TGSI_OPCODE_TXL:
4364 case TGSI_OPCODE_TXP:
4365 case TGSI_OPCODE_TXQ:
4366 case TGSI_OPCODE_TXF:
4367 case TGSI_OPCODE_TEX2:
4368 case TGSI_OPCODE_TXB2:
4369 case TGSI_OPCODE_TXL2:
4370 src[num_src++] = t->samplers[inst->sampler];
4371 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4372 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4373 }
4374 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4375
4376 ureg_tex_insn(ureg,
4377 inst->op,
4378 dst, num_dst,
4379 tex_target,
4380 texoffsets, inst->tex_offset_num_offset,
4381 src, num_src);
4382 return;
4383
4384 case TGSI_OPCODE_SCS:
4385 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4386 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4387 break;
4388
4389 default:
4390 ureg_insn(ureg,
4391 inst->op,
4392 dst, num_dst,
4393 src, num_src);
4394 break;
4395 }
4396 }
4397
4398 /**
4399 * Emit the TGSI instructions for inverting and adjusting WPOS.
4400 * This code is unavoidable because it also depends on whether
4401 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4402 */
4403 static void
4404 emit_wpos_adjustment( struct st_translate *t,
4405 const struct gl_program *program,
4406 boolean invert,
4407 GLfloat adjX, GLfloat adjY[2])
4408 {
4409 struct ureg_program *ureg = t->ureg;
4410
4411 /* Fragment program uses fragment position input.
4412 * Need to replace instances of INPUT[WPOS] with temp T
4413 * where T = INPUT[WPOS] by y is inverted.
4414 */
4415 static const gl_state_index wposTransformState[STATE_LENGTH]
4416 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4417 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4418
4419 /* XXX: note we are modifying the incoming shader here! Need to
4420 * do this before emitting the constant decls below, or this
4421 * will be missed:
4422 */
4423 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4424 wposTransformState);
4425
4426 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4427 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4428 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4429
4430 /* First, apply the coordinate shift: */
4431 if (adjX || adjY[0] || adjY[1]) {
4432 if (adjY[0] != adjY[1]) {
4433 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4434 * depending on whether inversion is actually going to be applied
4435 * or not, which is determined by testing against the inversion
4436 * state variable used below, which will be either +1 or -1.
4437 */
4438 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4439
4440 ureg_CMP(ureg, adj_temp,
4441 ureg_scalar(wpostrans, invert ? 2 : 0),
4442 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4443 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4444 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4445 } else {
4446 ureg_ADD(ureg, wpos_temp, wpos_input,
4447 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4448 }
4449 wpos_input = ureg_src(wpos_temp);
4450 } else {
4451 /* MOV wpos_temp, input[wpos]
4452 */
4453 ureg_MOV( ureg, wpos_temp, wpos_input );
4454 }
4455
4456 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4457 * inversion/identity, or the other way around if we're drawing to an FBO.
4458 */
4459 if (invert) {
4460 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4461 */
4462 ureg_MAD( ureg,
4463 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4464 wpos_input,
4465 ureg_scalar(wpostrans, 0),
4466 ureg_scalar(wpostrans, 1));
4467 } else {
4468 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4469 */
4470 ureg_MAD( ureg,
4471 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4472 wpos_input,
4473 ureg_scalar(wpostrans, 2),
4474 ureg_scalar(wpostrans, 3));
4475 }
4476
4477 /* Use wpos_temp as position input from here on:
4478 */
4479 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4480 }
4481
4482
4483 /**
4484 * Emit fragment position/ooordinate code.
4485 */
4486 static void
4487 emit_wpos(struct st_context *st,
4488 struct st_translate *t,
4489 const struct gl_program *program,
4490 struct ureg_program *ureg)
4491 {
4492 const struct gl_fragment_program *fp =
4493 (const struct gl_fragment_program *) program;
4494 struct pipe_screen *pscreen = st->pipe->screen;
4495 GLfloat adjX = 0.0f;
4496 GLfloat adjY[2] = { 0.0f, 0.0f };
4497 boolean invert = FALSE;
4498
4499 /* Query the pixel center conventions supported by the pipe driver and set
4500 * adjX, adjY to help out if it cannot handle the requested one internally.
4501 *
4502 * The bias of the y-coordinate depends on whether y-inversion takes place
4503 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4504 * drawing to an FBO (causes additional inversion), and whether the the pipe
4505 * driver origin and the requested origin differ (the latter condition is
4506 * stored in the 'invert' variable).
4507 *
4508 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4509 *
4510 * center shift only:
4511 * i -> h: +0.5
4512 * h -> i: -0.5
4513 *
4514 * inversion only:
4515 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4516 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4517 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4518 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4519 *
4520 * inversion and center shift:
4521 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4522 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4523 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4524 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4525 */
4526 if (fp->OriginUpperLeft) {
4527 /* Fragment shader wants origin in upper-left */
4528 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4529 /* the driver supports upper-left origin */
4530 }
4531 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4532 /* the driver supports lower-left origin, need to invert Y */
4533 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4534 invert = TRUE;
4535 }
4536 else
4537 assert(0);
4538 }
4539 else {
4540 /* Fragment shader wants origin in lower-left */
4541 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4542 /* the driver supports lower-left origin */
4543 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4544 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4545 /* the driver supports upper-left origin, need to invert Y */
4546 invert = TRUE;
4547 else
4548 assert(0);
4549 }
4550
4551 if (fp->PixelCenterInteger) {
4552 /* Fragment shader wants pixel center integer */
4553 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4554 /* the driver supports pixel center integer */
4555 adjY[1] = 1.0f;
4556 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4557 }
4558 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4559 /* the driver supports pixel center half integer, need to bias X,Y */
4560 adjX = -0.5f;
4561 adjY[0] = -0.5f;
4562 adjY[1] = 0.5f;
4563 }
4564 else
4565 assert(0);
4566 }
4567 else {
4568 /* Fragment shader wants pixel center half integer */
4569 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4570 /* the driver supports pixel center half integer */
4571 }
4572 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4573 /* the driver supports pixel center integer, need to bias X,Y */
4574 adjX = adjY[0] = adjY[1] = 0.5f;
4575 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4576 }
4577 else
4578 assert(0);
4579 }
4580
4581 /* we invert after adjustment so that we avoid the MOV to temporary,
4582 * and reuse the adjustment ADD instead */
4583 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4584 }
4585
4586 /**
4587 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4588 * TGSI uses +1 for front, -1 for back.
4589 * This function converts the TGSI value to the GL value. Simply clamping/
4590 * saturating the value to [0,1] does the job.
4591 */
4592 static void
4593 emit_face_var(struct st_translate *t)
4594 {
4595 struct ureg_program *ureg = t->ureg;
4596 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4597 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4598
4599 /* MOV_SAT face_temp, input[face] */
4600 face_temp = ureg_saturate(face_temp);
4601 ureg_MOV(ureg, face_temp, face_input);
4602
4603 /* Use face_temp as face input from here on: */
4604 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4605 }
4606
4607 static void
4608 emit_edgeflags(struct st_translate *t)
4609 {
4610 struct ureg_program *ureg = t->ureg;
4611 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4612 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4613
4614 ureg_MOV(ureg, edge_dst, edge_src);
4615 }
4616
4617 /**
4618 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4619 * \param program the program to translate
4620 * \param numInputs number of input registers used
4621 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4622 * input indexes
4623 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4624 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4625 * each input
4626 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4627 * \param numOutputs number of output registers used
4628 * \param outputMapping maps Mesa fragment program outputs to TGSI
4629 * generic outputs
4630 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4631 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4632 * each output
4633 *
4634 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4635 */
4636 extern "C" enum pipe_error
4637 st_translate_program(
4638 struct gl_context *ctx,
4639 uint procType,
4640 struct ureg_program *ureg,
4641 glsl_to_tgsi_visitor *program,
4642 const struct gl_program *proginfo,
4643 GLuint numInputs,
4644 const GLuint inputMapping[],
4645 const ubyte inputSemanticName[],
4646 const ubyte inputSemanticIndex[],
4647 const GLuint interpMode[],
4648 const GLboolean is_centroid[],
4649 GLuint numOutputs,
4650 const GLuint outputMapping[],
4651 const ubyte outputSemanticName[],
4652 const ubyte outputSemanticIndex[],
4653 boolean passthrough_edgeflags,
4654 boolean clamp_color)
4655 {
4656 struct st_translate *t;
4657 unsigned i;
4658 enum pipe_error ret = PIPE_OK;
4659
4660 assert(numInputs <= Elements(t->inputs));
4661 assert(numOutputs <= Elements(t->outputs));
4662
4663 t = CALLOC_STRUCT(st_translate);
4664 if (!t) {
4665 ret = PIPE_ERROR_OUT_OF_MEMORY;
4666 goto out;
4667 }
4668
4669 memset(t, 0, sizeof *t);
4670
4671 t->procType = procType;
4672 t->inputMapping = inputMapping;
4673 t->outputMapping = outputMapping;
4674 t->ureg = ureg;
4675
4676 if (program->shader_program) {
4677 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4678 struct gl_uniform_storage *const storage =
4679 &program->shader_program->UniformStorage[i];
4680
4681 _mesa_uniform_detach_all_driver_storage(storage);
4682 }
4683 }
4684
4685 /*
4686 * Declare input attributes.
4687 */
4688 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4689 for (i = 0; i < numInputs; i++) {
4690 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4691 inputSemanticName[i],
4692 inputSemanticIndex[i],
4693 interpMode[i], 0,
4694 is_centroid[i]);
4695 }
4696
4697 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4698 /* Must do this after setting up t->inputs, and before
4699 * emitting constant references, below:
4700 */
4701 emit_wpos(st_context(ctx), t, proginfo, ureg);
4702 }
4703
4704 if (proginfo->InputsRead & FRAG_BIT_FACE)
4705 emit_face_var(t);
4706
4707 /*
4708 * Declare output attributes.
4709 */
4710 for (i = 0; i < numOutputs; i++) {
4711 switch (outputSemanticName[i]) {
4712 case TGSI_SEMANTIC_POSITION:
4713 t->outputs[i] = ureg_DECL_output(ureg,
4714 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4715 outputSemanticIndex[i]);
4716 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4717 break;
4718 case TGSI_SEMANTIC_STENCIL:
4719 t->outputs[i] = ureg_DECL_output(ureg,
4720 TGSI_SEMANTIC_STENCIL, /* Stencil */
4721 outputSemanticIndex[i]);
4722 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4723 break;
4724 case TGSI_SEMANTIC_COLOR:
4725 t->outputs[i] = ureg_DECL_output(ureg,
4726 TGSI_SEMANTIC_COLOR,
4727 outputSemanticIndex[i]);
4728 break;
4729 default:
4730 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4731 ret = PIPE_ERROR_BAD_INPUT;
4732 goto out;
4733 }
4734 }
4735 }
4736 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4737 for (i = 0; i < numInputs; i++) {
4738 t->inputs[i] = ureg_DECL_gs_input(ureg,
4739 i,
4740 inputSemanticName[i],
4741 inputSemanticIndex[i]);
4742 }
4743
4744 for (i = 0; i < numOutputs; i++) {
4745 t->outputs[i] = ureg_DECL_output(ureg,
4746 outputSemanticName[i],
4747 outputSemanticIndex[i]);
4748 }
4749 }
4750 else {
4751 assert(procType == TGSI_PROCESSOR_VERTEX);
4752
4753 for (i = 0; i < numInputs; i++) {
4754 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4755 }
4756
4757 for (i = 0; i < numOutputs; i++) {
4758 t->outputs[i] = ureg_DECL_output(ureg,
4759 outputSemanticName[i],
4760 outputSemanticIndex[i]);
4761 }
4762 if (passthrough_edgeflags)
4763 emit_edgeflags(t);
4764 }
4765
4766 /* Declare address register.
4767 */
4768 if (program->num_address_regs > 0) {
4769 assert(program->num_address_regs == 1);
4770 t->address[0] = ureg_DECL_address(ureg);
4771 }
4772
4773 /* Declare misc input registers
4774 */
4775 {
4776 GLbitfield sysInputs = proginfo->SystemValuesRead;
4777 unsigned numSys = 0;
4778 for (i = 0; sysInputs; i++) {
4779 if (sysInputs & (1 << i)) {
4780 unsigned semName = mesa_sysval_to_semantic[i];
4781 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4782 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4783 semName == TGSI_SEMANTIC_VERTEXID) {
4784 /* From Gallium perspective, these system values are always
4785 * integer, and require native integer support. However, if
4786 * native integer is supported on the vertex stage but not the
4787 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4788 * assumes these system values are floats. To resolve the
4789 * inconsistency, we insert a U2F.
4790 */
4791 struct st_context *st = st_context(ctx);
4792 struct pipe_screen *pscreen = st->pipe->screen;
4793 assert(procType == TGSI_PROCESSOR_VERTEX);
4794 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4795 if (!ctx->Const.NativeIntegers) {
4796 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4797 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4798 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4799 }
4800 }
4801 numSys++;
4802 sysInputs &= ~(1 << i);
4803 }
4804 }
4805 }
4806
4807 if (program->indirect_addr_temps) {
4808 /* If temps are accessed with indirect addressing, declare temporaries
4809 * in sequential order. Else, we declare them on demand elsewhere.
4810 * (Note: the number of temporaries is equal to program->next_temp)
4811 */
4812 for (i = 0; i < (unsigned)program->next_temp; i++) {
4813 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4814 t->temps[i] = ureg_DECL_local_temporary(t->ureg);
4815 }
4816 }
4817
4818 /* Emit constants and uniforms. TGSI uses a single index space for these,
4819 * so we put all the translated regs in t->constants.
4820 */
4821 if (proginfo->Parameters) {
4822 t->constants = (struct ureg_src *)
4823 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4824 if (t->constants == NULL) {
4825 ret = PIPE_ERROR_OUT_OF_MEMORY;
4826 goto out;
4827 }
4828
4829 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4830 switch (proginfo->Parameters->Parameters[i].Type) {
4831 case PROGRAM_ENV_PARAM:
4832 case PROGRAM_LOCAL_PARAM:
4833 case PROGRAM_STATE_VAR:
4834 case PROGRAM_UNIFORM:
4835 t->constants[i] = ureg_DECL_constant(ureg, i);
4836 break;
4837
4838 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4839 * addressing of the const buffer.
4840 * FIXME: Be smarter and recognize param arrays:
4841 * indirect addressing is only valid within the referenced
4842 * array.
4843 */
4844 case PROGRAM_CONSTANT:
4845 if (program->indirect_addr_consts)
4846 t->constants[i] = ureg_DECL_constant(ureg, i);
4847 else
4848 t->constants[i] = emit_immediate(t,
4849 proginfo->Parameters->ParameterValues[i],
4850 proginfo->Parameters->Parameters[i].DataType,
4851 4);
4852 break;
4853 default:
4854 break;
4855 }
4856 }
4857 }
4858
4859 if (program->shader_program) {
4860 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4861
4862 for (i = 0; i < num_ubos; i++) {
4863 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4864 }
4865 }
4866
4867 /* Emit immediate values.
4868 */
4869 t->immediates = (struct ureg_src *)
4870 calloc(program->num_immediates, sizeof(struct ureg_src));
4871 if (t->immediates == NULL) {
4872 ret = PIPE_ERROR_OUT_OF_MEMORY;
4873 goto out;
4874 }
4875 i = 0;
4876 foreach_iter(exec_list_iterator, iter, program->immediates) {
4877 immediate_storage *imm = (immediate_storage *)iter.get();
4878 assert(i < program->num_immediates);
4879 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4880 }
4881 assert(i == program->num_immediates);
4882
4883 /* texture samplers */
4884 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4885 if (program->samplers_used & (1 << i)) {
4886 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4887 }
4888 }
4889
4890 /* Emit each instruction in turn:
4891 */
4892 foreach_iter(exec_list_iterator, iter, program->instructions) {
4893 set_insn_start(t, ureg_get_instruction_number(ureg));
4894 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4895 clamp_color);
4896 }
4897
4898 /* Fix up all emitted labels:
4899 */
4900 for (i = 0; i < t->labels_count; i++) {
4901 ureg_fixup_label(ureg, t->labels[i].token,
4902 t->insn[t->labels[i].branch_target]);
4903 }
4904
4905 if (program->shader_program) {
4906 /* This has to be done last. Any operation the can cause
4907 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4908 * program constant) has to happen before creating this linkage.
4909 */
4910 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4911 if (program->shader_program->_LinkedShaders[i] == NULL)
4912 continue;
4913
4914 _mesa_associate_uniform_storage(ctx, program->shader_program,
4915 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4916 }
4917 }
4918
4919 out:
4920 if (t) {
4921 free(t->insn);
4922 free(t->labels);
4923 free(t->constants);
4924 free(t->immediates);
4925
4926 if (t->error) {
4927 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4928 }
4929
4930 free(t);
4931 }
4932
4933 return ret;
4934 }
4935 /* ----------------------------- End TGSI code ------------------------------ */
4936
4937 /**
4938 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4939 * generating Mesa IR.
4940 */
4941 static struct gl_program *
4942 get_mesa_program(struct gl_context *ctx,
4943 struct gl_shader_program *shader_program,
4944 struct gl_shader *shader)
4945 {
4946 glsl_to_tgsi_visitor* v;
4947 struct gl_program *prog;
4948 GLenum target;
4949 const char *target_string;
4950 bool progress;
4951 struct gl_shader_compiler_options *options =
4952 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4953 struct pipe_screen *pscreen = ctx->st->pipe->screen;
4954 unsigned ptarget;
4955
4956 switch (shader->Type) {
4957 case GL_VERTEX_SHADER:
4958 target = GL_VERTEX_PROGRAM_ARB;
4959 ptarget = PIPE_SHADER_VERTEX;
4960 target_string = "vertex";
4961 break;
4962 case GL_FRAGMENT_SHADER:
4963 target = GL_FRAGMENT_PROGRAM_ARB;
4964 ptarget = PIPE_SHADER_FRAGMENT;
4965 target_string = "fragment";
4966 break;
4967 case GL_GEOMETRY_SHADER:
4968 target = GL_GEOMETRY_PROGRAM_NV;
4969 ptarget = PIPE_SHADER_GEOMETRY;
4970 target_string = "geometry";
4971 break;
4972 default:
4973 assert(!"should not be reached");
4974 return NULL;
4975 }
4976
4977 validate_ir_tree(shader->ir);
4978
4979 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4980 if (!prog)
4981 return NULL;
4982 prog->Parameters = _mesa_new_parameter_list();
4983 v = new glsl_to_tgsi_visitor();
4984 v->ctx = ctx;
4985 v->prog = prog;
4986 v->shader_program = shader_program;
4987 v->options = options;
4988 v->glsl_version = ctx->Const.GLSLVersion;
4989 v->native_integers = ctx->Const.NativeIntegers;
4990
4991 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
4992 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
4993
4994 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4995 prog->Parameters);
4996
4997 /* Remove reads from output registers. */
4998 lower_output_reads(shader->ir);
4999
5000 /* Emit intermediate IR for main(). */
5001 visit_exec_list(shader->ir, v);
5002
5003 /* Now emit bodies for any functions that were used. */
5004 do {
5005 progress = GL_FALSE;
5006
5007 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5008 function_entry *entry = (function_entry *)iter.get();
5009
5010 if (!entry->bgn_inst) {
5011 v->current_function = entry;
5012
5013 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5014 entry->bgn_inst->function = entry;
5015
5016 visit_exec_list(&entry->sig->body, v);
5017
5018 glsl_to_tgsi_instruction *last;
5019 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5020 if (last->op != TGSI_OPCODE_RET)
5021 v->emit(NULL, TGSI_OPCODE_RET);
5022
5023 glsl_to_tgsi_instruction *end;
5024 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5025 end->function = entry;
5026
5027 progress = GL_TRUE;
5028 }
5029 }
5030 } while (progress);
5031
5032 #if 0
5033 /* Print out some information (for debugging purposes) used by the
5034 * optimization passes. */
5035 for (i=0; i < v->next_temp; i++) {
5036 int fr = v->get_first_temp_read(i);
5037 int fw = v->get_first_temp_write(i);
5038 int lr = v->get_last_temp_read(i);
5039 int lw = v->get_last_temp_write(i);
5040
5041 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5042 assert(fw <= fr);
5043 }
5044 #endif
5045
5046 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5047 v->simplify_cmp();
5048 v->copy_propagate();
5049 while (v->eliminate_dead_code_advanced());
5050
5051 /* FIXME: These passes to optimize temporary registers don't work when there
5052 * is indirect addressing of the temporary register space. We need proper
5053 * array support so that we don't have to give up these passes in every
5054 * shader that uses arrays.
5055 */
5056 if (!v->indirect_addr_temps) {
5057 v->eliminate_dead_code();
5058 v->merge_registers();
5059 v->renumber_registers();
5060 }
5061
5062 /* Write the END instruction. */
5063 v->emit(NULL, TGSI_OPCODE_END);
5064
5065 if (ctx->Shader.Flags & GLSL_DUMP) {
5066 printf("\n");
5067 printf("GLSL IR for linked %s program %d:\n", target_string,
5068 shader_program->Name);
5069 _mesa_print_ir(shader->ir, NULL);
5070 printf("\n");
5071 printf("\n");
5072 fflush(stdout);
5073 }
5074
5075 prog->Instructions = NULL;
5076 prog->NumInstructions = 0;
5077
5078 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
5079 count_resources(v, prog);
5080
5081 _mesa_reference_program(ctx, &shader->Program, prog);
5082
5083 /* This has to be done last. Any operation the can cause
5084 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5085 * program constant) has to happen before creating this linkage.
5086 */
5087 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5088 if (!shader_program->LinkStatus) {
5089 return NULL;
5090 }
5091
5092 struct st_vertex_program *stvp;
5093 struct st_fragment_program *stfp;
5094 struct st_geometry_program *stgp;
5095
5096 switch (shader->Type) {
5097 case GL_VERTEX_SHADER:
5098 stvp = (struct st_vertex_program *)prog;
5099 stvp->glsl_to_tgsi = v;
5100 break;
5101 case GL_FRAGMENT_SHADER:
5102 stfp = (struct st_fragment_program *)prog;
5103 stfp->glsl_to_tgsi = v;
5104 break;
5105 case GL_GEOMETRY_SHADER:
5106 stgp = (struct st_geometry_program *)prog;
5107 stgp->glsl_to_tgsi = v;
5108 break;
5109 default:
5110 assert(!"should not be reached");
5111 return NULL;
5112 }
5113
5114 return prog;
5115 }
5116
5117 extern "C" {
5118
5119 struct gl_shader *
5120 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5121 {
5122 struct gl_shader *shader;
5123 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5124 type == GL_GEOMETRY_SHADER_ARB);
5125 shader = rzalloc(NULL, struct gl_shader);
5126 if (shader) {
5127 shader->Type = type;
5128 shader->Name = name;
5129 _mesa_init_shader(ctx, shader);
5130 }
5131 return shader;
5132 }
5133
5134 struct gl_shader_program *
5135 st_new_shader_program(struct gl_context *ctx, GLuint name)
5136 {
5137 struct gl_shader_program *shProg;
5138 shProg = rzalloc(NULL, struct gl_shader_program);
5139 if (shProg) {
5140 shProg->Name = name;
5141 _mesa_init_shader_program(ctx, shProg);
5142 }
5143 return shProg;
5144 }
5145
5146 /**
5147 * Link a shader.
5148 * Called via ctx->Driver.LinkShader()
5149 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5150 * with code lowering and other optimizations.
5151 */
5152 GLboolean
5153 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5154 {
5155 assert(prog->LinkStatus);
5156
5157 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5158 if (prog->_LinkedShaders[i] == NULL)
5159 continue;
5160
5161 bool progress;
5162 exec_list *ir = prog->_LinkedShaders[i]->ir;
5163 const struct gl_shader_compiler_options *options =
5164 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5165
5166 /* If there are forms of indirect addressing that the driver
5167 * cannot handle, perform the lowering pass.
5168 */
5169 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5170 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5171 lower_variable_index_to_cond_assign(ir,
5172 options->EmitNoIndirectInput,
5173 options->EmitNoIndirectOutput,
5174 options->EmitNoIndirectTemp,
5175 options->EmitNoIndirectUniform);
5176 }
5177
5178 if (ctx->Extensions.ARB_shading_language_packing) {
5179 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5180 LOWER_UNPACK_SNORM_2x16 |
5181 LOWER_PACK_UNORM_2x16 |
5182 LOWER_UNPACK_UNORM_2x16 |
5183 LOWER_PACK_SNORM_4x8 |
5184 LOWER_UNPACK_SNORM_4x8 |
5185 LOWER_UNPACK_UNORM_4x8 |
5186 LOWER_PACK_UNORM_4x8 |
5187 LOWER_PACK_HALF_2x16 |
5188 LOWER_UNPACK_HALF_2x16;
5189
5190 lower_packing_builtins(ir, lower_inst);
5191 }
5192
5193 do_mat_op_to_vec(ir);
5194 lower_instructions(ir,
5195 MOD_TO_FRACT |
5196 DIV_TO_MUL_RCP |
5197 EXP_TO_EXP2 |
5198 LOG_TO_LOG2 |
5199 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5200 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5201
5202 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5203 do_vec_index_to_cond_assign(ir);
5204 lower_quadop_vector(ir, false);
5205 lower_noise(ir);
5206 if (options->MaxIfDepth == 0) {
5207 lower_discard(ir);
5208 }
5209
5210 do {
5211 progress = false;
5212
5213 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5214
5215 progress = do_common_optimization(ir, true, true,
5216 options->MaxUnrollIterations)
5217 || progress;
5218
5219 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5220
5221 } while (progress);
5222
5223 validate_ir_tree(ir);
5224 }
5225
5226 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5227 struct gl_program *linked_prog;
5228
5229 if (prog->_LinkedShaders[i] == NULL)
5230 continue;
5231
5232 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5233
5234 if (linked_prog) {
5235 static const GLenum targets[] = {
5236 GL_VERTEX_PROGRAM_ARB,
5237 GL_FRAGMENT_PROGRAM_ARB,
5238 GL_GEOMETRY_PROGRAM_NV
5239 };
5240
5241 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5242 linked_prog);
5243 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5244 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5245 NULL);
5246 _mesa_reference_program(ctx, &linked_prog, NULL);
5247 return GL_FALSE;
5248 }
5249 }
5250
5251 _mesa_reference_program(ctx, &linked_prog, NULL);
5252 }
5253
5254 return GL_TRUE;
5255 }
5256
5257 void
5258 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5259 const GLuint outputMapping[],
5260 struct pipe_stream_output_info *so)
5261 {
5262 unsigned i;
5263 struct gl_transform_feedback_info *info =
5264 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5265
5266 for (i = 0; i < info->NumOutputs; i++) {
5267 so->output[i].register_index =
5268 outputMapping[info->Outputs[i].OutputRegister];
5269 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5270 so->output[i].num_components = info->Outputs[i].NumComponents;
5271 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5272 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5273 }
5274
5275 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5276 so->stride[i] = info->BufferStride[i];
5277 }
5278 so->num_outputs = info->NumOutputs;
5279 }
5280
5281 } /* extern "C" */