glsl_to_tgsi: avoid creating arrays if driver doesn't support them
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
79
80 /**
81 * Maximum number of temporary registers.
82 *
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
85 */
86 #define MAX_TEMPS 4096
87
88 /**
89 * Maximum number of arrays
90 */
91 #define MAX_ARRAYS 256
92
93 /* will be 4 for GLSL 4.00 */
94 #define MAX_GLSL_TEXTURE_OFFSET 1
95
96 class st_src_reg;
97 class st_dst_reg;
98
99 static int swizzle_for_size(int size);
100
101 /**
102 * This struct is a corresponding struct to TGSI ureg_src.
103 */
104 class st_src_reg {
105 public:
106 st_src_reg(gl_register_file file, int index, const glsl_type *type)
107 {
108 this->file = file;
109 this->index = index;
110 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
111 this->swizzle = swizzle_for_size(type->vector_elements);
112 else
113 this->swizzle = SWIZZLE_XYZW;
114 this->negate = 0;
115 this->index2D = 0;
116 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
117 this->reladdr = NULL;
118 }
119
120 st_src_reg(gl_register_file file, int index, int type)
121 {
122 this->type = type;
123 this->file = file;
124 this->index = index;
125 this->index2D = 0;
126 this->swizzle = SWIZZLE_XYZW;
127 this->negate = 0;
128 this->reladdr = NULL;
129 }
130
131 st_src_reg(gl_register_file file, int index, int type, int index2D)
132 {
133 this->type = type;
134 this->file = file;
135 this->index = index;
136 this->index2D = index2D;
137 this->swizzle = SWIZZLE_XYZW;
138 this->negate = 0;
139 this->reladdr = NULL;
140 }
141
142 st_src_reg()
143 {
144 this->type = GLSL_TYPE_ERROR;
145 this->file = PROGRAM_UNDEFINED;
146 this->index = 0;
147 this->index2D = 0;
148 this->swizzle = 0;
149 this->negate = 0;
150 this->reladdr = NULL;
151 }
152
153 explicit st_src_reg(st_dst_reg reg);
154
155 gl_register_file file; /**< PROGRAM_* from Mesa */
156 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
157 int index2D;
158 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
159 int negate; /**< NEGATE_XYZW mask from mesa */
160 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
161 /** Register index should be offset by the integer in this reg. */
162 st_src_reg *reladdr;
163 };
164
165 class st_dst_reg {
166 public:
167 st_dst_reg(gl_register_file file, int writemask, int type)
168 {
169 this->file = file;
170 this->index = 0;
171 this->writemask = writemask;
172 this->cond_mask = COND_TR;
173 this->reladdr = NULL;
174 this->type = type;
175 }
176
177 st_dst_reg()
178 {
179 this->type = GLSL_TYPE_ERROR;
180 this->file = PROGRAM_UNDEFINED;
181 this->index = 0;
182 this->writemask = 0;
183 this->cond_mask = COND_TR;
184 this->reladdr = NULL;
185 }
186
187 explicit st_dst_reg(st_src_reg reg);
188
189 gl_register_file file; /**< PROGRAM_* from Mesa */
190 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
191 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
192 GLuint cond_mask:4;
193 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
194 /** Register index should be offset by the integer in this reg. */
195 st_src_reg *reladdr;
196 };
197
198 st_src_reg::st_src_reg(st_dst_reg reg)
199 {
200 this->type = reg.type;
201 this->file = reg.file;
202 this->index = reg.index;
203 this->swizzle = SWIZZLE_XYZW;
204 this->negate = 0;
205 this->reladdr = reg.reladdr;
206 this->index2D = 0;
207 }
208
209 st_dst_reg::st_dst_reg(st_src_reg reg)
210 {
211 this->type = reg.type;
212 this->file = reg.file;
213 this->index = reg.index;
214 this->writemask = WRITEMASK_XYZW;
215 this->cond_mask = COND_TR;
216 this->reladdr = reg.reladdr;
217 }
218
219 class glsl_to_tgsi_instruction : public exec_node {
220 public:
221 /* Callers of this ralloc-based new need not call delete. It's
222 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
223 static void* operator new(size_t size, void *ctx)
224 {
225 void *node;
226
227 node = rzalloc_size(ctx, size);
228 assert(node != NULL);
229
230 return node;
231 }
232
233 unsigned op;
234 st_dst_reg dst;
235 st_src_reg src[3];
236 /** Pointer to the ir source this tree came from for debugging */
237 ir_instruction *ir;
238 GLboolean cond_update;
239 bool saturate;
240 int sampler; /**< sampler index */
241 int tex_target; /**< One of TEXTURE_*_INDEX */
242 GLboolean tex_shadow;
243 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
244 unsigned tex_offset_num_offset;
245 int dead_mask; /**< Used in dead code elimination */
246
247 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
248 };
249
250 class variable_storage : public exec_node {
251 public:
252 variable_storage(ir_variable *var, gl_register_file file, int index)
253 : file(file), index(index), var(var)
254 {
255 /* empty */
256 }
257
258 gl_register_file file;
259 int index;
260 ir_variable *var; /* variable that maps to this, if any */
261 };
262
263 class immediate_storage : public exec_node {
264 public:
265 immediate_storage(gl_constant_value *values, int size, int type)
266 {
267 memcpy(this->values, values, size * sizeof(gl_constant_value));
268 this->size = size;
269 this->type = type;
270 }
271
272 gl_constant_value values[4];
273 int size; /**< Number of components (1-4) */
274 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
275 };
276
277 class function_entry : public exec_node {
278 public:
279 ir_function_signature *sig;
280
281 /**
282 * identifier of this function signature used by the program.
283 *
284 * At the point that TGSI instructions for function calls are
285 * generated, we don't know the address of the first instruction of
286 * the function body. So we make the BranchTarget that is called a
287 * small integer and rewrite them during set_branchtargets().
288 */
289 int sig_id;
290
291 /**
292 * Pointer to first instruction of the function body.
293 *
294 * Set during function body emits after main() is processed.
295 */
296 glsl_to_tgsi_instruction *bgn_inst;
297
298 /**
299 * Index of the first instruction of the function body in actual TGSI.
300 *
301 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
302 */
303 int inst;
304
305 /** Storage for the return value. */
306 st_src_reg return_reg;
307 };
308
309 struct glsl_to_tgsi_visitor : public ir_visitor {
310 public:
311 glsl_to_tgsi_visitor();
312 ~glsl_to_tgsi_visitor();
313
314 function_entry *current_function;
315
316 struct gl_context *ctx;
317 struct gl_program *prog;
318 struct gl_shader_program *shader_program;
319 struct gl_shader_compiler_options *options;
320
321 int next_temp;
322
323 unsigned array_sizes[MAX_ARRAYS];
324 unsigned next_array;
325
326 int num_address_regs;
327 int samplers_used;
328 bool indirect_addr_consts;
329
330 int glsl_version;
331 bool native_integers;
332 bool have_sqrt;
333
334 variable_storage *find_variable_storage(ir_variable *var);
335
336 int add_constant(gl_register_file file, gl_constant_value values[4],
337 int size, int datatype, GLuint *swizzle_out);
338
339 function_entry *get_function_signature(ir_function_signature *sig);
340
341 st_src_reg get_temp(const glsl_type *type);
342 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
343
344 st_src_reg st_src_reg_for_float(float val);
345 st_src_reg st_src_reg_for_int(int val);
346 st_src_reg st_src_reg_for_type(int type, int val);
347
348 /**
349 * \name Visit methods
350 *
351 * As typical for the visitor pattern, there must be one \c visit method for
352 * each concrete subclass of \c ir_instruction. Virtual base classes within
353 * the hierarchy should not have \c visit methods.
354 */
355 /*@{*/
356 virtual void visit(ir_variable *);
357 virtual void visit(ir_loop *);
358 virtual void visit(ir_loop_jump *);
359 virtual void visit(ir_function_signature *);
360 virtual void visit(ir_function *);
361 virtual void visit(ir_expression *);
362 virtual void visit(ir_swizzle *);
363 virtual void visit(ir_dereference_variable *);
364 virtual void visit(ir_dereference_array *);
365 virtual void visit(ir_dereference_record *);
366 virtual void visit(ir_assignment *);
367 virtual void visit(ir_constant *);
368 virtual void visit(ir_call *);
369 virtual void visit(ir_return *);
370 virtual void visit(ir_discard *);
371 virtual void visit(ir_texture *);
372 virtual void visit(ir_if *);
373 /*@}*/
374
375 st_src_reg result;
376
377 /** List of variable_storage */
378 exec_list variables;
379
380 /** List of immediate_storage */
381 exec_list immediates;
382 unsigned num_immediates;
383
384 /** List of function_entry */
385 exec_list function_signatures;
386 int next_signature_id;
387
388 /** List of glsl_to_tgsi_instruction */
389 exec_list instructions;
390
391 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
392
393 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
394 st_dst_reg dst, st_src_reg src0);
395
396 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
397 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
398
399 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
400 st_dst_reg dst,
401 st_src_reg src0, st_src_reg src1, st_src_reg src2);
402
403 unsigned get_opcode(ir_instruction *ir, unsigned op,
404 st_dst_reg dst,
405 st_src_reg src0, st_src_reg src1);
406
407 /**
408 * Emit the correct dot-product instruction for the type of arguments
409 */
410 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
411 st_dst_reg dst,
412 st_src_reg src0,
413 st_src_reg src1,
414 unsigned elements);
415
416 void emit_scalar(ir_instruction *ir, unsigned op,
417 st_dst_reg dst, st_src_reg src0);
418
419 void emit_scalar(ir_instruction *ir, unsigned op,
420 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
421
422 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
423
424 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
425
426 void emit_scs(ir_instruction *ir, unsigned op,
427 st_dst_reg dst, const st_src_reg &src);
428
429 bool try_emit_mad(ir_expression *ir,
430 int mul_operand);
431 bool try_emit_mad_for_and_not(ir_expression *ir,
432 int mul_operand);
433 bool try_emit_sat(ir_expression *ir);
434
435 void emit_swz(ir_expression *ir);
436
437 bool process_move_condition(ir_rvalue *ir);
438
439 void simplify_cmp(void);
440
441 void rename_temp_register(int index, int new_index);
442 int get_first_temp_read(int index);
443 int get_first_temp_write(int index);
444 int get_last_temp_read(int index);
445 int get_last_temp_write(int index);
446
447 void copy_propagate(void);
448 void eliminate_dead_code(void);
449 int eliminate_dead_code_advanced(void);
450 void merge_registers(void);
451 void renumber_registers(void);
452
453 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
454 st_dst_reg *l, st_src_reg *r);
455
456 void *mem_ctx;
457 };
458
459 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
460
461 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
462
463 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
464
465 static void
466 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
467
468 static void
469 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
470 {
471 va_list args;
472 va_start(args, fmt);
473 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
474 va_end(args);
475
476 prog->LinkStatus = GL_FALSE;
477 }
478
479 static int
480 swizzle_for_size(int size)
481 {
482 int size_swizzles[4] = {
483 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
484 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
485 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
486 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
487 };
488
489 assert((size >= 1) && (size <= 4));
490 return size_swizzles[size - 1];
491 }
492
493 static bool
494 is_tex_instruction(unsigned opcode)
495 {
496 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
497 return info->is_tex;
498 }
499
500 static unsigned
501 num_inst_dst_regs(unsigned opcode)
502 {
503 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
504 return info->num_dst;
505 }
506
507 static unsigned
508 num_inst_src_regs(unsigned opcode)
509 {
510 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
511 return info->is_tex ? info->num_src - 1 : info->num_src;
512 }
513
514 glsl_to_tgsi_instruction *
515 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
516 st_dst_reg dst,
517 st_src_reg src0, st_src_reg src1, st_src_reg src2)
518 {
519 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
520 int num_reladdr = 0, i;
521
522 op = get_opcode(ir, op, dst, src0, src1);
523
524 /* If we have to do relative addressing, we want to load the ARL
525 * reg directly for one of the regs, and preload the other reladdr
526 * sources into temps.
527 */
528 num_reladdr += dst.reladdr != NULL;
529 num_reladdr += src0.reladdr != NULL;
530 num_reladdr += src1.reladdr != NULL;
531 num_reladdr += src2.reladdr != NULL;
532
533 reladdr_to_temp(ir, &src2, &num_reladdr);
534 reladdr_to_temp(ir, &src1, &num_reladdr);
535 reladdr_to_temp(ir, &src0, &num_reladdr);
536
537 if (dst.reladdr) {
538 emit_arl(ir, address_reg, *dst.reladdr);
539 num_reladdr--;
540 }
541 assert(num_reladdr == 0);
542
543 inst->op = op;
544 inst->dst = dst;
545 inst->src[0] = src0;
546 inst->src[1] = src1;
547 inst->src[2] = src2;
548 inst->ir = ir;
549 inst->dead_mask = 0;
550
551 inst->function = NULL;
552
553 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
554 this->num_address_regs = 1;
555
556 /* Update indirect addressing status used by TGSI */
557 if (dst.reladdr) {
558 switch(dst.file) {
559 case PROGRAM_LOCAL_PARAM:
560 case PROGRAM_ENV_PARAM:
561 case PROGRAM_STATE_VAR:
562 case PROGRAM_CONSTANT:
563 case PROGRAM_UNIFORM:
564 this->indirect_addr_consts = true;
565 break;
566 case PROGRAM_IMMEDIATE:
567 assert(!"immediates should not have indirect addressing");
568 break;
569 default:
570 break;
571 }
572 }
573 else {
574 for (i=0; i<3; i++) {
575 if(inst->src[i].reladdr) {
576 switch(inst->src[i].file) {
577 case PROGRAM_LOCAL_PARAM:
578 case PROGRAM_ENV_PARAM:
579 case PROGRAM_STATE_VAR:
580 case PROGRAM_CONSTANT:
581 case PROGRAM_UNIFORM:
582 this->indirect_addr_consts = true;
583 break;
584 case PROGRAM_IMMEDIATE:
585 assert(!"immediates should not have indirect addressing");
586 break;
587 default:
588 break;
589 }
590 }
591 }
592 }
593
594 this->instructions.push_tail(inst);
595
596 if (native_integers)
597 try_emit_float_set(ir, op, dst);
598
599 return inst;
600 }
601
602
603 glsl_to_tgsi_instruction *
604 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
605 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
606 {
607 return emit(ir, op, dst, src0, src1, undef_src);
608 }
609
610 glsl_to_tgsi_instruction *
611 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
612 st_dst_reg dst, st_src_reg src0)
613 {
614 assert(dst.writemask != 0);
615 return emit(ir, op, dst, src0, undef_src, undef_src);
616 }
617
618 glsl_to_tgsi_instruction *
619 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
620 {
621 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
622 }
623
624 /**
625 * Emits the code to convert the result of float SET instructions to integers.
626 */
627 void
628 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
629 st_dst_reg dst)
630 {
631 if ((op == TGSI_OPCODE_SEQ ||
632 op == TGSI_OPCODE_SNE ||
633 op == TGSI_OPCODE_SGE ||
634 op == TGSI_OPCODE_SLT))
635 {
636 st_src_reg src = st_src_reg(dst);
637 src.negate = ~src.negate;
638 dst.type = GLSL_TYPE_FLOAT;
639 emit(ir, TGSI_OPCODE_F2I, dst, src);
640 }
641 }
642
643 /**
644 * Determines whether to use an integer, unsigned integer, or float opcode
645 * based on the operands and input opcode, then emits the result.
646 */
647 unsigned
648 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
649 st_dst_reg dst,
650 st_src_reg src0, st_src_reg src1)
651 {
652 int type = GLSL_TYPE_FLOAT;
653
654 assert(src0.type != GLSL_TYPE_ARRAY);
655 assert(src0.type != GLSL_TYPE_STRUCT);
656 assert(src1.type != GLSL_TYPE_ARRAY);
657 assert(src1.type != GLSL_TYPE_STRUCT);
658
659 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
660 type = GLSL_TYPE_FLOAT;
661 else if (native_integers)
662 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
663
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
667 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
668 else op = TGSI_OPCODE_##f; \
669 break;
670 #define case3(f, i, u) case4(f, f, i, u)
671 #define case2fi(f, i) case4(f, f, i, i)
672 #define case2iu(i, u) case4(i, LAST, i, u)
673
674 switch(op) {
675 case2fi(ADD, UADD);
676 case2fi(MUL, UMUL);
677 case2fi(MAD, UMAD);
678 case3(DIV, IDIV, UDIV);
679 case3(MAX, IMAX, UMAX);
680 case3(MIN, IMIN, UMIN);
681 case2iu(MOD, UMOD);
682
683 case2fi(SEQ, USEQ);
684 case2fi(SNE, USNE);
685 case3(SGE, ISGE, USGE);
686 case3(SLT, ISLT, USLT);
687
688 case2iu(ISHR, USHR);
689
690 case2fi(SSG, ISSG);
691 case3(ABS, IABS, IABS);
692
693 default: break;
694 }
695
696 assert(op != TGSI_OPCODE_LAST);
697 return op;
698 }
699
700 glsl_to_tgsi_instruction *
701 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
702 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
703 unsigned elements)
704 {
705 static const unsigned dot_opcodes[] = {
706 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
707 };
708
709 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
710 }
711
712 /**
713 * Emits TGSI scalar opcodes to produce unique answers across channels.
714 *
715 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
716 * channel determines the result across all channels. So to do a vec4
717 * of this operation, we want to emit a scalar per source channel used
718 * to produce dest channels.
719 */
720 void
721 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
722 st_dst_reg dst,
723 st_src_reg orig_src0, st_src_reg orig_src1)
724 {
725 int i, j;
726 int done_mask = ~dst.writemask;
727
728 /* TGSI RCP is a scalar operation splatting results to all channels,
729 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
730 * dst channels.
731 */
732 for (i = 0; i < 4; i++) {
733 GLuint this_mask = (1 << i);
734 glsl_to_tgsi_instruction *inst;
735 st_src_reg src0 = orig_src0;
736 st_src_reg src1 = orig_src1;
737
738 if (done_mask & this_mask)
739 continue;
740
741 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
742 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
743 for (j = i + 1; j < 4; j++) {
744 /* If there is another enabled component in the destination that is
745 * derived from the same inputs, generate its value on this pass as
746 * well.
747 */
748 if (!(done_mask & (1 << j)) &&
749 GET_SWZ(src0.swizzle, j) == src0_swiz &&
750 GET_SWZ(src1.swizzle, j) == src1_swiz) {
751 this_mask |= (1 << j);
752 }
753 }
754 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
755 src0_swiz, src0_swiz);
756 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
757 src1_swiz, src1_swiz);
758
759 inst = emit(ir, op, dst, src0, src1);
760 inst->dst.writemask = this_mask;
761 done_mask |= this_mask;
762 }
763 }
764
765 void
766 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
767 st_dst_reg dst, st_src_reg src0)
768 {
769 st_src_reg undef = undef_src;
770
771 undef.swizzle = SWIZZLE_XXXX;
772
773 emit_scalar(ir, op, dst, src0, undef);
774 }
775
776 void
777 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
778 st_dst_reg dst, st_src_reg src0)
779 {
780 int op = TGSI_OPCODE_ARL;
781
782 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
783 op = TGSI_OPCODE_UARL;
784
785 emit(NULL, op, dst, src0);
786 }
787
788 /**
789 * Emit an TGSI_OPCODE_SCS instruction
790 *
791 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
792 * Instead of splatting its result across all four components of the
793 * destination, it writes one value to the \c x component and another value to
794 * the \c y component.
795 *
796 * \param ir IR instruction being processed
797 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
798 * on which value is desired.
799 * \param dst Destination register
800 * \param src Source register
801 */
802 void
803 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
804 st_dst_reg dst,
805 const st_src_reg &src)
806 {
807 /* Vertex programs cannot use the SCS opcode.
808 */
809 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
810 emit_scalar(ir, op, dst, src);
811 return;
812 }
813
814 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
815 const unsigned scs_mask = (1U << component);
816 int done_mask = ~dst.writemask;
817 st_src_reg tmp;
818
819 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
820
821 /* If there are compnents in the destination that differ from the component
822 * that will be written by the SCS instrution, we'll need a temporary.
823 */
824 if (scs_mask != unsigned(dst.writemask)) {
825 tmp = get_temp(glsl_type::vec4_type);
826 }
827
828 for (unsigned i = 0; i < 4; i++) {
829 unsigned this_mask = (1U << i);
830 st_src_reg src0 = src;
831
832 if ((done_mask & this_mask) != 0)
833 continue;
834
835 /* The source swizzle specified which component of the source generates
836 * sine / cosine for the current component in the destination. The SCS
837 * instruction requires that this value be swizzle to the X component.
838 * Replace the current swizzle with a swizzle that puts the source in
839 * the X component.
840 */
841 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
842
843 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
844 src0_swiz, src0_swiz);
845 for (unsigned j = i + 1; j < 4; j++) {
846 /* If there is another enabled component in the destination that is
847 * derived from the same inputs, generate its value on this pass as
848 * well.
849 */
850 if (!(done_mask & (1 << j)) &&
851 GET_SWZ(src0.swizzle, j) == src0_swiz) {
852 this_mask |= (1 << j);
853 }
854 }
855
856 if (this_mask != scs_mask) {
857 glsl_to_tgsi_instruction *inst;
858 st_dst_reg tmp_dst = st_dst_reg(tmp);
859
860 /* Emit the SCS instruction.
861 */
862 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
863 inst->dst.writemask = scs_mask;
864
865 /* Move the result of the SCS instruction to the desired location in
866 * the destination.
867 */
868 tmp.swizzle = MAKE_SWIZZLE4(component, component,
869 component, component);
870 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
871 inst->dst.writemask = this_mask;
872 } else {
873 /* Emit the SCS instruction to write directly to the destination.
874 */
875 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
876 inst->dst.writemask = scs_mask;
877 }
878
879 done_mask |= this_mask;
880 }
881 }
882
883 int
884 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
885 gl_constant_value values[4], int size, int datatype,
886 GLuint *swizzle_out)
887 {
888 if (file == PROGRAM_CONSTANT) {
889 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
890 size, datatype, swizzle_out);
891 } else {
892 int index = 0;
893 immediate_storage *entry;
894 assert(file == PROGRAM_IMMEDIATE);
895
896 /* Search immediate storage to see if we already have an identical
897 * immediate that we can use instead of adding a duplicate entry.
898 */
899 foreach_iter(exec_list_iterator, iter, this->immediates) {
900 entry = (immediate_storage *)iter.get();
901
902 if (entry->size == size &&
903 entry->type == datatype &&
904 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
905 return index;
906 }
907 index++;
908 }
909
910 /* Add this immediate to the list. */
911 entry = new(mem_ctx) immediate_storage(values, size, datatype);
912 this->immediates.push_tail(entry);
913 this->num_immediates++;
914 return index;
915 }
916 }
917
918 st_src_reg
919 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
920 {
921 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
922 union gl_constant_value uval;
923
924 uval.f = val;
925 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
926
927 return src;
928 }
929
930 st_src_reg
931 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
932 {
933 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
934 union gl_constant_value uval;
935
936 assert(native_integers);
937
938 uval.i = val;
939 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
940
941 return src;
942 }
943
944 st_src_reg
945 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
946 {
947 if (native_integers)
948 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
949 st_src_reg_for_int(val);
950 else
951 return st_src_reg_for_float(val);
952 }
953
954 static int
955 type_size(const struct glsl_type *type)
956 {
957 unsigned int i;
958 int size;
959
960 switch (type->base_type) {
961 case GLSL_TYPE_UINT:
962 case GLSL_TYPE_INT:
963 case GLSL_TYPE_FLOAT:
964 case GLSL_TYPE_BOOL:
965 if (type->is_matrix()) {
966 return type->matrix_columns;
967 } else {
968 /* Regardless of size of vector, it gets a vec4. This is bad
969 * packing for things like floats, but otherwise arrays become a
970 * mess. Hopefully a later pass over the code can pack scalars
971 * down if appropriate.
972 */
973 return 1;
974 }
975 case GLSL_TYPE_ARRAY:
976 assert(type->length > 0);
977 return type_size(type->fields.array) * type->length;
978 case GLSL_TYPE_STRUCT:
979 size = 0;
980 for (i = 0; i < type->length; i++) {
981 size += type_size(type->fields.structure[i].type);
982 }
983 return size;
984 case GLSL_TYPE_SAMPLER:
985 /* Samplers take up one slot in UNIFORMS[], but they're baked in
986 * at link time.
987 */
988 return 1;
989 case GLSL_TYPE_INTERFACE:
990 case GLSL_TYPE_VOID:
991 case GLSL_TYPE_ERROR:
992 assert(!"Invalid type in type_size");
993 break;
994 }
995 return 0;
996 }
997
998 /**
999 * In the initial pass of codegen, we assign temporary numbers to
1000 * intermediate results. (not SSA -- variable assignments will reuse
1001 * storage).
1002 */
1003 st_src_reg
1004 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1005 {
1006 st_src_reg src;
1007
1008 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1009 src.reladdr = NULL;
1010 src.negate = 0;
1011
1012 if (!options->EmitNoIndirectTemp &&
1013 (type->is_array() || type->is_matrix())) {
1014
1015 src.file = PROGRAM_ARRAY;
1016 src.index = next_array << 16 | 0x8000;
1017 array_sizes[next_array] = type_size(type);
1018 ++next_array;
1019
1020 } else {
1021 src.file = PROGRAM_TEMPORARY;
1022 src.index = next_temp;
1023 next_temp += type_size(type);
1024 }
1025
1026 if (type->is_array() || type->is_record()) {
1027 src.swizzle = SWIZZLE_NOOP;
1028 } else {
1029 src.swizzle = swizzle_for_size(type->vector_elements);
1030 }
1031
1032 return src;
1033 }
1034
1035 variable_storage *
1036 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1037 {
1038
1039 variable_storage *entry;
1040
1041 foreach_iter(exec_list_iterator, iter, this->variables) {
1042 entry = (variable_storage *)iter.get();
1043
1044 if (entry->var == var)
1045 return entry;
1046 }
1047
1048 return NULL;
1049 }
1050
1051 void
1052 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1053 {
1054 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1055 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1056
1057 fp->OriginUpperLeft = ir->origin_upper_left;
1058 fp->PixelCenterInteger = ir->pixel_center_integer;
1059 }
1060
1061 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1062 unsigned int i;
1063 const ir_state_slot *const slots = ir->state_slots;
1064 assert(ir->state_slots != NULL);
1065
1066 /* Check if this statevar's setup in the STATE file exactly
1067 * matches how we'll want to reference it as a
1068 * struct/array/whatever. If not, then we need to move it into
1069 * temporary storage and hope that it'll get copy-propagated
1070 * out.
1071 */
1072 for (i = 0; i < ir->num_state_slots; i++) {
1073 if (slots[i].swizzle != SWIZZLE_XYZW) {
1074 break;
1075 }
1076 }
1077
1078 variable_storage *storage;
1079 st_dst_reg dst;
1080 if (i == ir->num_state_slots) {
1081 /* We'll set the index later. */
1082 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1083 this->variables.push_tail(storage);
1084
1085 dst = undef_dst;
1086 } else {
1087 /* The variable_storage constructor allocates slots based on the size
1088 * of the type. However, this had better match the number of state
1089 * elements that we're going to copy into the new temporary.
1090 */
1091 assert((int) ir->num_state_slots == type_size(ir->type));
1092
1093 dst = st_dst_reg(get_temp(ir->type));
1094
1095 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1096
1097 this->variables.push_tail(storage);
1098 }
1099
1100
1101 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1102 int index = _mesa_add_state_reference(this->prog->Parameters,
1103 (gl_state_index *)slots[i].tokens);
1104
1105 if (storage->file == PROGRAM_STATE_VAR) {
1106 if (storage->index == -1) {
1107 storage->index = index;
1108 } else {
1109 assert(index == storage->index + (int)i);
1110 }
1111 } else {
1112 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1113 * the data being moved since MOV does not care about the type of
1114 * data it is moving, and we don't want to declare registers with
1115 * array or struct types.
1116 */
1117 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1118 src.swizzle = slots[i].swizzle;
1119 emit(ir, TGSI_OPCODE_MOV, dst, src);
1120 /* even a float takes up a whole vec4 reg in a struct/array. */
1121 dst.index++;
1122 }
1123 }
1124
1125 if (storage->file == PROGRAM_TEMPORARY &&
1126 dst.index != storage->index + (int) ir->num_state_slots) {
1127 fail_link(this->shader_program,
1128 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1129 ir->name, dst.index - storage->index,
1130 type_size(ir->type));
1131 }
1132 }
1133 }
1134
1135 void
1136 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1137 {
1138 ir_dereference_variable *counter = NULL;
1139
1140 if (ir->counter != NULL)
1141 counter = new(ir) ir_dereference_variable(ir->counter);
1142
1143 if (ir->from != NULL) {
1144 assert(ir->counter != NULL);
1145
1146 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1147
1148 a->accept(this);
1149 delete a;
1150 }
1151
1152 emit(NULL, TGSI_OPCODE_BGNLOOP);
1153
1154 if (ir->to) {
1155 ir_expression *e =
1156 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1157 counter, ir->to);
1158 ir_if *if_stmt = new(ir) ir_if(e);
1159
1160 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1161
1162 if_stmt->then_instructions.push_tail(brk);
1163
1164 if_stmt->accept(this);
1165
1166 delete if_stmt;
1167 delete e;
1168 delete brk;
1169 }
1170
1171 visit_exec_list(&ir->body_instructions, this);
1172
1173 if (ir->increment) {
1174 ir_expression *e =
1175 new(ir) ir_expression(ir_binop_add, counter->type,
1176 counter, ir->increment);
1177
1178 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1179
1180 a->accept(this);
1181 delete a;
1182 delete e;
1183 }
1184
1185 emit(NULL, TGSI_OPCODE_ENDLOOP);
1186 }
1187
1188 void
1189 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1190 {
1191 switch (ir->mode) {
1192 case ir_loop_jump::jump_break:
1193 emit(NULL, TGSI_OPCODE_BRK);
1194 break;
1195 case ir_loop_jump::jump_continue:
1196 emit(NULL, TGSI_OPCODE_CONT);
1197 break;
1198 }
1199 }
1200
1201
1202 void
1203 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1204 {
1205 assert(0);
1206 (void)ir;
1207 }
1208
1209 void
1210 glsl_to_tgsi_visitor::visit(ir_function *ir)
1211 {
1212 /* Ignore function bodies other than main() -- we shouldn't see calls to
1213 * them since they should all be inlined before we get to glsl_to_tgsi.
1214 */
1215 if (strcmp(ir->name, "main") == 0) {
1216 const ir_function_signature *sig;
1217 exec_list empty;
1218
1219 sig = ir->matching_signature(&empty);
1220
1221 assert(sig);
1222
1223 foreach_iter(exec_list_iterator, iter, sig->body) {
1224 ir_instruction *ir = (ir_instruction *)iter.get();
1225
1226 ir->accept(this);
1227 }
1228 }
1229 }
1230
1231 bool
1232 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1233 {
1234 int nonmul_operand = 1 - mul_operand;
1235 st_src_reg a, b, c;
1236 st_dst_reg result_dst;
1237
1238 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1239 if (!expr || expr->operation != ir_binop_mul)
1240 return false;
1241
1242 expr->operands[0]->accept(this);
1243 a = this->result;
1244 expr->operands[1]->accept(this);
1245 b = this->result;
1246 ir->operands[nonmul_operand]->accept(this);
1247 c = this->result;
1248
1249 this->result = get_temp(ir->type);
1250 result_dst = st_dst_reg(this->result);
1251 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1252 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1253
1254 return true;
1255 }
1256
1257 /**
1258 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1259 *
1260 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1261 * implemented using multiplication, and logical-or is implemented using
1262 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1263 * As result, the logical expression (a & !b) can be rewritten as:
1264 *
1265 * - a * !b
1266 * - a * (1 - b)
1267 * - (a * 1) - (a * b)
1268 * - a + -(a * b)
1269 * - a + (a * -b)
1270 *
1271 * This final expression can be implemented as a single MAD(a, -b, a)
1272 * instruction.
1273 */
1274 bool
1275 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1276 {
1277 const int other_operand = 1 - try_operand;
1278 st_src_reg a, b;
1279
1280 ir_expression *expr = ir->operands[try_operand]->as_expression();
1281 if (!expr || expr->operation != ir_unop_logic_not)
1282 return false;
1283
1284 ir->operands[other_operand]->accept(this);
1285 a = this->result;
1286 expr->operands[0]->accept(this);
1287 b = this->result;
1288
1289 b.negate = ~b.negate;
1290
1291 this->result = get_temp(ir->type);
1292 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1293
1294 return true;
1295 }
1296
1297 bool
1298 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1299 {
1300 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1301 */
1302 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1303 !st_context(this->ctx)->has_shader_model3) {
1304 return false;
1305 }
1306
1307 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1308 if (!sat_src)
1309 return false;
1310
1311 sat_src->accept(this);
1312 st_src_reg src = this->result;
1313
1314 /* If we generated an expression instruction into a temporary in
1315 * processing the saturate's operand, apply the saturate to that
1316 * instruction. Otherwise, generate a MOV to do the saturate.
1317 *
1318 * Note that we have to be careful to only do this optimization if
1319 * the instruction in question was what generated src->result. For
1320 * example, ir_dereference_array might generate a MUL instruction
1321 * to create the reladdr, and return us a src reg using that
1322 * reladdr. That MUL result is not the value we're trying to
1323 * saturate.
1324 */
1325 ir_expression *sat_src_expr = sat_src->as_expression();
1326 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1327 sat_src_expr->operation == ir_binop_add ||
1328 sat_src_expr->operation == ir_binop_dot)) {
1329 glsl_to_tgsi_instruction *new_inst;
1330 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1331 new_inst->saturate = true;
1332 } else {
1333 this->result = get_temp(ir->type);
1334 st_dst_reg result_dst = st_dst_reg(this->result);
1335 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1336 glsl_to_tgsi_instruction *inst;
1337 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1338 inst->saturate = true;
1339 }
1340
1341 return true;
1342 }
1343
1344 void
1345 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1346 st_src_reg *reg, int *num_reladdr)
1347 {
1348 if (!reg->reladdr)
1349 return;
1350
1351 emit_arl(ir, address_reg, *reg->reladdr);
1352
1353 if (*num_reladdr != 1) {
1354 st_src_reg temp = get_temp(glsl_type::vec4_type);
1355
1356 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1357 *reg = temp;
1358 }
1359
1360 (*num_reladdr)--;
1361 }
1362
1363 void
1364 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1365 {
1366 unsigned int operand;
1367 st_src_reg op[Elements(ir->operands)];
1368 st_src_reg result_src;
1369 st_dst_reg result_dst;
1370
1371 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1372 */
1373 if (ir->operation == ir_binop_add) {
1374 if (try_emit_mad(ir, 1))
1375 return;
1376 if (try_emit_mad(ir, 0))
1377 return;
1378 }
1379
1380 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1381 */
1382 if (ir->operation == ir_binop_logic_and) {
1383 if (try_emit_mad_for_and_not(ir, 1))
1384 return;
1385 if (try_emit_mad_for_and_not(ir, 0))
1386 return;
1387 }
1388
1389 if (try_emit_sat(ir))
1390 return;
1391
1392 if (ir->operation == ir_quadop_vector)
1393 assert(!"ir_quadop_vector should have been lowered");
1394
1395 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1396 this->result.file = PROGRAM_UNDEFINED;
1397 ir->operands[operand]->accept(this);
1398 if (this->result.file == PROGRAM_UNDEFINED) {
1399 ir_print_visitor v;
1400 printf("Failed to get tree for expression operand:\n");
1401 ir->operands[operand]->accept(&v);
1402 exit(1);
1403 }
1404 op[operand] = this->result;
1405
1406 /* Matrix expression operands should have been broken down to vector
1407 * operations already.
1408 */
1409 assert(!ir->operands[operand]->type->is_matrix());
1410 }
1411
1412 int vector_elements = ir->operands[0]->type->vector_elements;
1413 if (ir->operands[1]) {
1414 vector_elements = MAX2(vector_elements,
1415 ir->operands[1]->type->vector_elements);
1416 }
1417
1418 this->result.file = PROGRAM_UNDEFINED;
1419
1420 /* Storage for our result. Ideally for an assignment we'd be using
1421 * the actual storage for the result here, instead.
1422 */
1423 result_src = get_temp(ir->type);
1424 /* convenience for the emit functions below. */
1425 result_dst = st_dst_reg(result_src);
1426 /* Limit writes to the channels that will be used by result_src later.
1427 * This does limit this temp's use as a temporary for multi-instruction
1428 * sequences.
1429 */
1430 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1431
1432 switch (ir->operation) {
1433 case ir_unop_logic_not:
1434 if (result_dst.type != GLSL_TYPE_FLOAT)
1435 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1436 else {
1437 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1438 * older GPUs implement SEQ using multiple instructions (i915 uses two
1439 * SGE instructions and a MUL instruction). Since our logic values are
1440 * 0.0 and 1.0, 1-x also implements !x.
1441 */
1442 op[0].negate = ~op[0].negate;
1443 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1444 }
1445 break;
1446 case ir_unop_neg:
1447 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1448 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1449 else {
1450 op[0].negate = ~op[0].negate;
1451 result_src = op[0];
1452 }
1453 break;
1454 case ir_unop_abs:
1455 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1456 break;
1457 case ir_unop_sign:
1458 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1459 break;
1460 case ir_unop_rcp:
1461 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1462 break;
1463
1464 case ir_unop_exp2:
1465 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1466 break;
1467 case ir_unop_exp:
1468 case ir_unop_log:
1469 assert(!"not reached: should be handled by ir_explog_to_explog2");
1470 break;
1471 case ir_unop_log2:
1472 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1473 break;
1474 case ir_unop_sin:
1475 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1476 break;
1477 case ir_unop_cos:
1478 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1479 break;
1480 case ir_unop_sin_reduced:
1481 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1482 break;
1483 case ir_unop_cos_reduced:
1484 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1485 break;
1486
1487 case ir_unop_dFdx:
1488 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1489 break;
1490 case ir_unop_dFdy:
1491 {
1492 /* The X component contains 1 or -1 depending on whether the framebuffer
1493 * is a FBO or the window system buffer, respectively.
1494 * It is then multiplied with the source operand of DDY.
1495 */
1496 static const gl_state_index transform_y_state[STATE_LENGTH]
1497 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1498
1499 unsigned transform_y_index =
1500 _mesa_add_state_reference(this->prog->Parameters,
1501 transform_y_state);
1502
1503 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1504 transform_y_index,
1505 glsl_type::vec4_type);
1506 transform_y.swizzle = SWIZZLE_XXXX;
1507
1508 st_src_reg temp = get_temp(glsl_type::vec4_type);
1509
1510 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1511 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1512 break;
1513 }
1514
1515 case ir_unop_noise: {
1516 /* At some point, a motivated person could add a better
1517 * implementation of noise. Currently not even the nvidia
1518 * binary drivers do anything more than this. In any case, the
1519 * place to do this is in the GL state tracker, not the poor
1520 * driver.
1521 */
1522 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1523 break;
1524 }
1525
1526 case ir_binop_add:
1527 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1528 break;
1529 case ir_binop_sub:
1530 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1531 break;
1532
1533 case ir_binop_mul:
1534 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1535 break;
1536 case ir_binop_div:
1537 if (result_dst.type == GLSL_TYPE_FLOAT)
1538 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1539 else
1540 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1541 break;
1542 case ir_binop_mod:
1543 if (result_dst.type == GLSL_TYPE_FLOAT)
1544 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1545 else
1546 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1547 break;
1548
1549 case ir_binop_less:
1550 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1551 break;
1552 case ir_binop_greater:
1553 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1554 break;
1555 case ir_binop_lequal:
1556 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1557 break;
1558 case ir_binop_gequal:
1559 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1560 break;
1561 case ir_binop_equal:
1562 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1563 break;
1564 case ir_binop_nequal:
1565 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1566 break;
1567 case ir_binop_all_equal:
1568 /* "==" operator producing a scalar boolean. */
1569 if (ir->operands[0]->type->is_vector() ||
1570 ir->operands[1]->type->is_vector()) {
1571 st_src_reg temp = get_temp(native_integers ?
1572 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1573 glsl_type::vec4_type);
1574
1575 if (native_integers) {
1576 st_dst_reg temp_dst = st_dst_reg(temp);
1577 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1578
1579 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1580
1581 /* Emit 1-3 AND operations to combine the SEQ results. */
1582 switch (ir->operands[0]->type->vector_elements) {
1583 case 2:
1584 break;
1585 case 3:
1586 temp_dst.writemask = WRITEMASK_Y;
1587 temp1.swizzle = SWIZZLE_YYYY;
1588 temp2.swizzle = SWIZZLE_ZZZZ;
1589 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1590 break;
1591 case 4:
1592 temp_dst.writemask = WRITEMASK_X;
1593 temp1.swizzle = SWIZZLE_XXXX;
1594 temp2.swizzle = SWIZZLE_YYYY;
1595 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1596 temp_dst.writemask = WRITEMASK_Y;
1597 temp1.swizzle = SWIZZLE_ZZZZ;
1598 temp2.swizzle = SWIZZLE_WWWW;
1599 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1600 }
1601
1602 temp1.swizzle = SWIZZLE_XXXX;
1603 temp2.swizzle = SWIZZLE_YYYY;
1604 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1605 } else {
1606 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1607
1608 /* After the dot-product, the value will be an integer on the
1609 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1610 */
1611 emit_dp(ir, result_dst, temp, temp, vector_elements);
1612
1613 /* Negating the result of the dot-product gives values on the range
1614 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1615 * This is achieved using SGE.
1616 */
1617 st_src_reg sge_src = result_src;
1618 sge_src.negate = ~sge_src.negate;
1619 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1620 }
1621 } else {
1622 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1623 }
1624 break;
1625 case ir_binop_any_nequal:
1626 /* "!=" operator producing a scalar boolean. */
1627 if (ir->operands[0]->type->is_vector() ||
1628 ir->operands[1]->type->is_vector()) {
1629 st_src_reg temp = get_temp(native_integers ?
1630 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1631 glsl_type::vec4_type);
1632 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1633
1634 if (native_integers) {
1635 st_dst_reg temp_dst = st_dst_reg(temp);
1636 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1637
1638 /* Emit 1-3 OR operations to combine the SNE results. */
1639 switch (ir->operands[0]->type->vector_elements) {
1640 case 2:
1641 break;
1642 case 3:
1643 temp_dst.writemask = WRITEMASK_Y;
1644 temp1.swizzle = SWIZZLE_YYYY;
1645 temp2.swizzle = SWIZZLE_ZZZZ;
1646 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1647 break;
1648 case 4:
1649 temp_dst.writemask = WRITEMASK_X;
1650 temp1.swizzle = SWIZZLE_XXXX;
1651 temp2.swizzle = SWIZZLE_YYYY;
1652 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1653 temp_dst.writemask = WRITEMASK_Y;
1654 temp1.swizzle = SWIZZLE_ZZZZ;
1655 temp2.swizzle = SWIZZLE_WWWW;
1656 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1657 }
1658
1659 temp1.swizzle = SWIZZLE_XXXX;
1660 temp2.swizzle = SWIZZLE_YYYY;
1661 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1662 } else {
1663 /* After the dot-product, the value will be an integer on the
1664 * range [0,4]. Zero stays zero, and positive values become 1.0.
1665 */
1666 glsl_to_tgsi_instruction *const dp =
1667 emit_dp(ir, result_dst, temp, temp, vector_elements);
1668 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1669 /* The clamping to [0,1] can be done for free in the fragment
1670 * shader with a saturate.
1671 */
1672 dp->saturate = true;
1673 } else {
1674 /* Negating the result of the dot-product gives values on the range
1675 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1676 * achieved using SLT.
1677 */
1678 st_src_reg slt_src = result_src;
1679 slt_src.negate = ~slt_src.negate;
1680 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1681 }
1682 }
1683 } else {
1684 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1685 }
1686 break;
1687
1688 case ir_unop_any: {
1689 assert(ir->operands[0]->type->is_vector());
1690
1691 /* After the dot-product, the value will be an integer on the
1692 * range [0,4]. Zero stays zero, and positive values become 1.0.
1693 */
1694 glsl_to_tgsi_instruction *const dp =
1695 emit_dp(ir, result_dst, op[0], op[0],
1696 ir->operands[0]->type->vector_elements);
1697 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1698 result_dst.type == GLSL_TYPE_FLOAT) {
1699 /* The clamping to [0,1] can be done for free in the fragment
1700 * shader with a saturate.
1701 */
1702 dp->saturate = true;
1703 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1704 /* Negating the result of the dot-product gives values on the range
1705 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1706 * is achieved using SLT.
1707 */
1708 st_src_reg slt_src = result_src;
1709 slt_src.negate = ~slt_src.negate;
1710 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1711 }
1712 else {
1713 /* Use SNE 0 if integers are being used as boolean values. */
1714 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1715 }
1716 break;
1717 }
1718
1719 case ir_binop_logic_xor:
1720 if (native_integers)
1721 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1722 else
1723 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1724 break;
1725
1726 case ir_binop_logic_or: {
1727 if (native_integers) {
1728 /* If integers are used as booleans, we can use an actual "or"
1729 * instruction.
1730 */
1731 assert(native_integers);
1732 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1733 } else {
1734 /* After the addition, the value will be an integer on the
1735 * range [0,2]. Zero stays zero, and positive values become 1.0.
1736 */
1737 glsl_to_tgsi_instruction *add =
1738 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1739 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1740 /* The clamping to [0,1] can be done for free in the fragment
1741 * shader with a saturate if floats are being used as boolean values.
1742 */
1743 add->saturate = true;
1744 } else {
1745 /* Negating the result of the addition gives values on the range
1746 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1747 * is achieved using SLT.
1748 */
1749 st_src_reg slt_src = result_src;
1750 slt_src.negate = ~slt_src.negate;
1751 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1752 }
1753 }
1754 break;
1755 }
1756
1757 case ir_binop_logic_and:
1758 /* If native integers are disabled, the bool args are stored as float 0.0
1759 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1760 * actual AND opcode.
1761 */
1762 if (native_integers)
1763 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1764 else
1765 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1766 break;
1767
1768 case ir_binop_dot:
1769 assert(ir->operands[0]->type->is_vector());
1770 assert(ir->operands[0]->type == ir->operands[1]->type);
1771 emit_dp(ir, result_dst, op[0], op[1],
1772 ir->operands[0]->type->vector_elements);
1773 break;
1774
1775 case ir_unop_sqrt:
1776 if (have_sqrt) {
1777 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1778 }
1779 else {
1780 /* sqrt(x) = x * rsq(x). */
1781 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1782 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1783 /* For incoming channels <= 0, set the result to 0. */
1784 op[0].negate = ~op[0].negate;
1785 emit(ir, TGSI_OPCODE_CMP, result_dst,
1786 op[0], result_src, st_src_reg_for_float(0.0));
1787 }
1788 break;
1789 case ir_unop_rsq:
1790 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1791 break;
1792 case ir_unop_i2f:
1793 if (native_integers) {
1794 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1795 break;
1796 }
1797 /* fallthrough to next case otherwise */
1798 case ir_unop_b2f:
1799 if (native_integers) {
1800 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1801 break;
1802 }
1803 /* fallthrough to next case otherwise */
1804 case ir_unop_i2u:
1805 case ir_unop_u2i:
1806 /* Converting between signed and unsigned integers is a no-op. */
1807 result_src = op[0];
1808 break;
1809 case ir_unop_b2i:
1810 if (native_integers) {
1811 /* Booleans are stored as integers using ~0 for true and 0 for false.
1812 * GLSL requires that int(bool) return 1 for true and 0 for false.
1813 * This conversion is done with AND, but it could be done with NEG.
1814 */
1815 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1816 } else {
1817 /* Booleans and integers are both stored as floats when native
1818 * integers are disabled.
1819 */
1820 result_src = op[0];
1821 }
1822 break;
1823 case ir_unop_f2i:
1824 if (native_integers)
1825 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1826 else
1827 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1828 break;
1829 case ir_unop_f2u:
1830 if (native_integers)
1831 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1832 else
1833 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1834 break;
1835 case ir_unop_bitcast_f2i:
1836 case ir_unop_bitcast_f2u:
1837 case ir_unop_bitcast_i2f:
1838 case ir_unop_bitcast_u2f:
1839 result_src = op[0];
1840 break;
1841 case ir_unop_f2b:
1842 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1843 break;
1844 case ir_unop_i2b:
1845 if (native_integers)
1846 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1847 else
1848 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1849 break;
1850 case ir_unop_trunc:
1851 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1852 break;
1853 case ir_unop_ceil:
1854 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1855 break;
1856 case ir_unop_floor:
1857 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1858 break;
1859 case ir_unop_round_even:
1860 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1861 break;
1862 case ir_unop_fract:
1863 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1864 break;
1865
1866 case ir_binop_min:
1867 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1868 break;
1869 case ir_binop_max:
1870 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1871 break;
1872 case ir_binop_pow:
1873 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1874 break;
1875
1876 case ir_unop_bit_not:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1879 break;
1880 }
1881 case ir_unop_u2f:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1884 break;
1885 }
1886 case ir_binop_lshift:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1889 break;
1890 }
1891 case ir_binop_rshift:
1892 if (native_integers) {
1893 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1894 break;
1895 }
1896 case ir_binop_bit_and:
1897 if (native_integers) {
1898 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1899 break;
1900 }
1901 case ir_binop_bit_xor:
1902 if (native_integers) {
1903 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1904 break;
1905 }
1906 case ir_binop_bit_or:
1907 if (native_integers) {
1908 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1909 break;
1910 }
1911
1912 assert(!"GLSL 1.30 features unsupported");
1913 break;
1914
1915 case ir_binop_ubo_load: {
1916 ir_constant *uniform_block = ir->operands[0]->as_constant();
1917 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1918 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1919 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1920 st_src_reg cbuf;
1921
1922 cbuf.type = glsl_type::vec4_type->base_type;
1923 cbuf.file = PROGRAM_CONSTANT;
1924 cbuf.index = 0;
1925 cbuf.index2D = uniform_block->value.u[0] + 1;
1926 cbuf.reladdr = NULL;
1927 cbuf.negate = 0;
1928
1929 assert(ir->type->is_vector() || ir->type->is_scalar());
1930
1931 if (const_offset_ir) {
1932 index_reg = st_src_reg_for_int(const_offset / 16);
1933 } else {
1934 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1935 }
1936
1937 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1938 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1939 const_offset % 16 / 4,
1940 const_offset % 16 / 4,
1941 const_offset % 16 / 4);
1942
1943 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1944 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1945
1946 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1947 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1948 result_src.negate = 1;
1949 emit(ir, TGSI_OPCODE_UCMP, result_dst, result_src, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1950 } else {
1951 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1952 }
1953 break;
1954 }
1955 case ir_triop_lrp:
1956 /* note: we have to reorder the three args here */
1957 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1958 break;
1959 case ir_unop_pack_snorm_2x16:
1960 case ir_unop_pack_unorm_2x16:
1961 case ir_unop_pack_half_2x16:
1962 case ir_unop_pack_snorm_4x8:
1963 case ir_unop_pack_unorm_4x8:
1964 case ir_unop_unpack_snorm_2x16:
1965 case ir_unop_unpack_unorm_2x16:
1966 case ir_unop_unpack_half_2x16:
1967 case ir_unop_unpack_half_2x16_split_x:
1968 case ir_unop_unpack_half_2x16_split_y:
1969 case ir_unop_unpack_snorm_4x8:
1970 case ir_unop_unpack_unorm_4x8:
1971 case ir_binop_pack_half_2x16_split:
1972 case ir_quadop_vector:
1973 /* This operation is not supported, or should have already been handled.
1974 */
1975 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1976 break;
1977 }
1978
1979 this->result = result_src;
1980 }
1981
1982
1983 void
1984 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1985 {
1986 st_src_reg src;
1987 int i;
1988 int swizzle[4];
1989
1990 /* Note that this is only swizzles in expressions, not those on the left
1991 * hand side of an assignment, which do write masking. See ir_assignment
1992 * for that.
1993 */
1994
1995 ir->val->accept(this);
1996 src = this->result;
1997 assert(src.file != PROGRAM_UNDEFINED);
1998
1999 for (i = 0; i < 4; i++) {
2000 if (i < ir->type->vector_elements) {
2001 switch (i) {
2002 case 0:
2003 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2004 break;
2005 case 1:
2006 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2007 break;
2008 case 2:
2009 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2010 break;
2011 case 3:
2012 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2013 break;
2014 }
2015 } else {
2016 /* If the type is smaller than a vec4, replicate the last
2017 * channel out.
2018 */
2019 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2020 }
2021 }
2022
2023 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2024
2025 this->result = src;
2026 }
2027
2028 void
2029 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2030 {
2031 variable_storage *entry = find_variable_storage(ir->var);
2032 ir_variable *var = ir->var;
2033
2034 if (!entry) {
2035 switch (var->mode) {
2036 case ir_var_uniform:
2037 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2038 var->location);
2039 this->variables.push_tail(entry);
2040 break;
2041 case ir_var_shader_in:
2042 /* The linker assigns locations for varyings and attributes,
2043 * including deprecated builtins (like gl_Color), user-assign
2044 * generic attributes (glBindVertexLocation), and
2045 * user-defined varyings.
2046 */
2047 assert(var->location != -1);
2048 entry = new(mem_ctx) variable_storage(var,
2049 PROGRAM_INPUT,
2050 var->location);
2051 break;
2052 case ir_var_shader_out:
2053 assert(var->location != -1);
2054 entry = new(mem_ctx) variable_storage(var,
2055 PROGRAM_OUTPUT,
2056 var->location + var->index);
2057 break;
2058 case ir_var_system_value:
2059 entry = new(mem_ctx) variable_storage(var,
2060 PROGRAM_SYSTEM_VALUE,
2061 var->location);
2062 break;
2063 case ir_var_auto:
2064 case ir_var_temporary:
2065 st_src_reg src = get_temp(var->type);
2066
2067 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2068 this->variables.push_tail(entry);
2069
2070 break;
2071 }
2072
2073 if (!entry) {
2074 printf("Failed to make storage for %s\n", var->name);
2075 exit(1);
2076 }
2077 }
2078
2079 this->result = st_src_reg(entry->file, entry->index, var->type);
2080 if (!native_integers)
2081 this->result.type = GLSL_TYPE_FLOAT;
2082 }
2083
2084 void
2085 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2086 {
2087 ir_constant *index;
2088 st_src_reg src;
2089 int element_size = type_size(ir->type);
2090
2091 index = ir->array_index->constant_expression_value();
2092
2093 ir->array->accept(this);
2094 src = this->result;
2095
2096 if (index) {
2097 src.index += index->value.i[0] * element_size;
2098 } else {
2099 /* Variable index array dereference. It eats the "vec4" of the
2100 * base of the array and an index that offsets the TGSI register
2101 * index.
2102 */
2103 ir->array_index->accept(this);
2104
2105 st_src_reg index_reg;
2106
2107 if (element_size == 1) {
2108 index_reg = this->result;
2109 } else {
2110 index_reg = get_temp(native_integers ?
2111 glsl_type::int_type : glsl_type::float_type);
2112
2113 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2114 this->result, st_src_reg_for_type(index_reg.type, element_size));
2115 }
2116
2117 /* If there was already a relative address register involved, add the
2118 * new and the old together to get the new offset.
2119 */
2120 if (src.reladdr != NULL) {
2121 st_src_reg accum_reg = get_temp(native_integers ?
2122 glsl_type::int_type : glsl_type::float_type);
2123
2124 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2125 index_reg, *src.reladdr);
2126
2127 index_reg = accum_reg;
2128 }
2129
2130 src.reladdr = ralloc(mem_ctx, st_src_reg);
2131 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2132 }
2133
2134 /* If the type is smaller than a vec4, replicate the last channel out. */
2135 if (ir->type->is_scalar() || ir->type->is_vector())
2136 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2137 else
2138 src.swizzle = SWIZZLE_NOOP;
2139
2140 /* Change the register type to the element type of the array. */
2141 src.type = ir->type->base_type;
2142
2143 this->result = src;
2144 }
2145
2146 void
2147 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2148 {
2149 unsigned int i;
2150 const glsl_type *struct_type = ir->record->type;
2151 int offset = 0;
2152
2153 ir->record->accept(this);
2154
2155 for (i = 0; i < struct_type->length; i++) {
2156 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2157 break;
2158 offset += type_size(struct_type->fields.structure[i].type);
2159 }
2160
2161 /* If the type is smaller than a vec4, replicate the last channel out. */
2162 if (ir->type->is_scalar() || ir->type->is_vector())
2163 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2164 else
2165 this->result.swizzle = SWIZZLE_NOOP;
2166
2167 this->result.index += offset;
2168 this->result.type = ir->type->base_type;
2169 }
2170
2171 /**
2172 * We want to be careful in assignment setup to hit the actual storage
2173 * instead of potentially using a temporary like we might with the
2174 * ir_dereference handler.
2175 */
2176 static st_dst_reg
2177 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2178 {
2179 /* The LHS must be a dereference. If the LHS is a variable indexed array
2180 * access of a vector, it must be separated into a series conditional moves
2181 * before reaching this point (see ir_vec_index_to_cond_assign).
2182 */
2183 assert(ir->as_dereference());
2184 ir_dereference_array *deref_array = ir->as_dereference_array();
2185 if (deref_array) {
2186 assert(!deref_array->array->type->is_vector());
2187 }
2188
2189 /* Use the rvalue deref handler for the most part. We'll ignore
2190 * swizzles in it and write swizzles using writemask, though.
2191 */
2192 ir->accept(v);
2193 return st_dst_reg(v->result);
2194 }
2195
2196 /**
2197 * Process the condition of a conditional assignment
2198 *
2199 * Examines the condition of a conditional assignment to generate the optimal
2200 * first operand of a \c CMP instruction. If the condition is a relational
2201 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2202 * used as the source for the \c CMP instruction. Otherwise the comparison
2203 * is processed to a boolean result, and the boolean result is used as the
2204 * operand to the CMP instruction.
2205 */
2206 bool
2207 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2208 {
2209 ir_rvalue *src_ir = ir;
2210 bool negate = true;
2211 bool switch_order = false;
2212
2213 ir_expression *const expr = ir->as_expression();
2214 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2215 bool zero_on_left = false;
2216
2217 if (expr->operands[0]->is_zero()) {
2218 src_ir = expr->operands[1];
2219 zero_on_left = true;
2220 } else if (expr->operands[1]->is_zero()) {
2221 src_ir = expr->operands[0];
2222 zero_on_left = false;
2223 }
2224
2225 /* a is - 0 + - 0 +
2226 * (a < 0) T F F ( a < 0) T F F
2227 * (0 < a) F F T (-a < 0) F F T
2228 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2229 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2230 * (a > 0) F F T (-a < 0) F F T
2231 * (0 > a) T F F ( a < 0) T F F
2232 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2233 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2234 *
2235 * Note that exchanging the order of 0 and 'a' in the comparison simply
2236 * means that the value of 'a' should be negated.
2237 */
2238 if (src_ir != ir) {
2239 switch (expr->operation) {
2240 case ir_binop_less:
2241 switch_order = false;
2242 negate = zero_on_left;
2243 break;
2244
2245 case ir_binop_greater:
2246 switch_order = false;
2247 negate = !zero_on_left;
2248 break;
2249
2250 case ir_binop_lequal:
2251 switch_order = true;
2252 negate = !zero_on_left;
2253 break;
2254
2255 case ir_binop_gequal:
2256 switch_order = true;
2257 negate = zero_on_left;
2258 break;
2259
2260 default:
2261 /* This isn't the right kind of comparison afterall, so make sure
2262 * the whole condition is visited.
2263 */
2264 src_ir = ir;
2265 break;
2266 }
2267 }
2268 }
2269
2270 src_ir->accept(this);
2271
2272 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2273 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2274 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2275 * computing the condition.
2276 */
2277 if (negate)
2278 this->result.negate = ~this->result.negate;
2279
2280 return switch_order;
2281 }
2282
2283 void
2284 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2285 st_dst_reg *l, st_src_reg *r)
2286 {
2287 if (type->base_type == GLSL_TYPE_STRUCT) {
2288 for (unsigned int i = 0; i < type->length; i++) {
2289 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2290 }
2291 return;
2292 }
2293
2294 if (type->is_array()) {
2295 for (unsigned int i = 0; i < type->length; i++) {
2296 emit_block_mov(ir, type->fields.array, l, r);
2297 }
2298 return;
2299 }
2300
2301 if (type->is_matrix()) {
2302 const struct glsl_type *vec_type;
2303
2304 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2305 type->vector_elements, 1);
2306
2307 for (int i = 0; i < type->matrix_columns; i++) {
2308 emit_block_mov(ir, vec_type, l, r);
2309 }
2310 return;
2311 }
2312
2313 assert(type->is_scalar() || type->is_vector());
2314
2315 r->type = type->base_type;
2316 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2317 l->index++;
2318 r->index++;
2319 }
2320
2321 void
2322 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2323 {
2324 st_dst_reg l;
2325 st_src_reg r;
2326 int i;
2327
2328 ir->rhs->accept(this);
2329 r = this->result;
2330
2331 l = get_assignment_lhs(ir->lhs, this);
2332
2333 /* FINISHME: This should really set to the correct maximal writemask for each
2334 * FINISHME: component written (in the loops below). This case can only
2335 * FINISHME: occur for matrices, arrays, and structures.
2336 */
2337 if (ir->write_mask == 0) {
2338 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2339 l.writemask = WRITEMASK_XYZW;
2340 } else if (ir->lhs->type->is_scalar() &&
2341 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2342 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2343 * FINISHME: W component of fragment shader output zero, work correctly.
2344 */
2345 l.writemask = WRITEMASK_XYZW;
2346 } else {
2347 int swizzles[4];
2348 int first_enabled_chan = 0;
2349 int rhs_chan = 0;
2350
2351 l.writemask = ir->write_mask;
2352
2353 for (int i = 0; i < 4; i++) {
2354 if (l.writemask & (1 << i)) {
2355 first_enabled_chan = GET_SWZ(r.swizzle, i);
2356 break;
2357 }
2358 }
2359
2360 /* Swizzle a small RHS vector into the channels being written.
2361 *
2362 * glsl ir treats write_mask as dictating how many channels are
2363 * present on the RHS while TGSI treats write_mask as just
2364 * showing which channels of the vec4 RHS get written.
2365 */
2366 for (int i = 0; i < 4; i++) {
2367 if (l.writemask & (1 << i))
2368 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2369 else
2370 swizzles[i] = first_enabled_chan;
2371 }
2372 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2373 swizzles[2], swizzles[3]);
2374 }
2375
2376 assert(l.file != PROGRAM_UNDEFINED);
2377 assert(r.file != PROGRAM_UNDEFINED);
2378
2379 if (ir->condition) {
2380 const bool switch_order = this->process_move_condition(ir->condition);
2381 st_src_reg condition = this->result;
2382
2383 for (i = 0; i < type_size(ir->lhs->type); i++) {
2384 st_src_reg l_src = st_src_reg(l);
2385 st_src_reg condition_temp = condition;
2386 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2387
2388 if (native_integers) {
2389 /* This is necessary because TGSI's CMP instruction expects the
2390 * condition to be a float, and we store booleans as integers.
2391 * If TGSI had a UCMP instruction or similar, this extra
2392 * instruction would not be necessary.
2393 */
2394 condition_temp = get_temp(glsl_type::vec4_type);
2395 condition.negate = 0;
2396 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2397 condition_temp.swizzle = condition.swizzle;
2398 }
2399
2400 if (switch_order) {
2401 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2402 } else {
2403 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2404 }
2405
2406 l.index++;
2407 r.index++;
2408 }
2409 } else if (ir->rhs->as_expression() &&
2410 this->instructions.get_tail() &&
2411 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2412 type_size(ir->lhs->type) == 1 &&
2413 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2414 /* To avoid emitting an extra MOV when assigning an expression to a
2415 * variable, emit the last instruction of the expression again, but
2416 * replace the destination register with the target of the assignment.
2417 * Dead code elimination will remove the original instruction.
2418 */
2419 glsl_to_tgsi_instruction *inst, *new_inst;
2420 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2421 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2422 new_inst->saturate = inst->saturate;
2423 inst->dead_mask = inst->dst.writemask;
2424 } else {
2425 emit_block_mov(ir, ir->rhs->type, &l, &r);
2426 }
2427 }
2428
2429
2430 void
2431 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2432 {
2433 st_src_reg src;
2434 GLfloat stack_vals[4] = { 0 };
2435 gl_constant_value *values = (gl_constant_value *) stack_vals;
2436 GLenum gl_type = GL_NONE;
2437 unsigned int i;
2438 static int in_array = 0;
2439 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2440
2441 /* Unfortunately, 4 floats is all we can get into
2442 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2443 * aggregate constant and move each constant value into it. If we
2444 * get lucky, copy propagation will eliminate the extra moves.
2445 */
2446 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2447 st_src_reg temp_base = get_temp(ir->type);
2448 st_dst_reg temp = st_dst_reg(temp_base);
2449
2450 foreach_iter(exec_list_iterator, iter, ir->components) {
2451 ir_constant *field_value = (ir_constant *)iter.get();
2452 int size = type_size(field_value->type);
2453
2454 assert(size > 0);
2455
2456 field_value->accept(this);
2457 src = this->result;
2458
2459 for (i = 0; i < (unsigned int)size; i++) {
2460 emit(ir, TGSI_OPCODE_MOV, temp, src);
2461
2462 src.index++;
2463 temp.index++;
2464 }
2465 }
2466 this->result = temp_base;
2467 return;
2468 }
2469
2470 if (ir->type->is_array()) {
2471 st_src_reg temp_base = get_temp(ir->type);
2472 st_dst_reg temp = st_dst_reg(temp_base);
2473 int size = type_size(ir->type->fields.array);
2474
2475 assert(size > 0);
2476 in_array++;
2477
2478 for (i = 0; i < ir->type->length; i++) {
2479 ir->array_elements[i]->accept(this);
2480 src = this->result;
2481 for (int j = 0; j < size; j++) {
2482 emit(ir, TGSI_OPCODE_MOV, temp, src);
2483
2484 src.index++;
2485 temp.index++;
2486 }
2487 }
2488 this->result = temp_base;
2489 in_array--;
2490 return;
2491 }
2492
2493 if (ir->type->is_matrix()) {
2494 st_src_reg mat = get_temp(ir->type);
2495 st_dst_reg mat_column = st_dst_reg(mat);
2496
2497 for (i = 0; i < ir->type->matrix_columns; i++) {
2498 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2499 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2500
2501 src = st_src_reg(file, -1, ir->type->base_type);
2502 src.index = add_constant(file,
2503 values,
2504 ir->type->vector_elements,
2505 GL_FLOAT,
2506 &src.swizzle);
2507 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2508
2509 mat_column.index++;
2510 }
2511
2512 this->result = mat;
2513 return;
2514 }
2515
2516 switch (ir->type->base_type) {
2517 case GLSL_TYPE_FLOAT:
2518 gl_type = GL_FLOAT;
2519 for (i = 0; i < ir->type->vector_elements; i++) {
2520 values[i].f = ir->value.f[i];
2521 }
2522 break;
2523 case GLSL_TYPE_UINT:
2524 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2525 for (i = 0; i < ir->type->vector_elements; i++) {
2526 if (native_integers)
2527 values[i].u = ir->value.u[i];
2528 else
2529 values[i].f = ir->value.u[i];
2530 }
2531 break;
2532 case GLSL_TYPE_INT:
2533 gl_type = native_integers ? GL_INT : GL_FLOAT;
2534 for (i = 0; i < ir->type->vector_elements; i++) {
2535 if (native_integers)
2536 values[i].i = ir->value.i[i];
2537 else
2538 values[i].f = ir->value.i[i];
2539 }
2540 break;
2541 case GLSL_TYPE_BOOL:
2542 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2543 for (i = 0; i < ir->type->vector_elements; i++) {
2544 if (native_integers)
2545 values[i].u = ir->value.b[i] ? ~0 : 0;
2546 else
2547 values[i].f = ir->value.b[i];
2548 }
2549 break;
2550 default:
2551 assert(!"Non-float/uint/int/bool constant");
2552 }
2553
2554 this->result = st_src_reg(file, -1, ir->type);
2555 this->result.index = add_constant(file,
2556 values,
2557 ir->type->vector_elements,
2558 gl_type,
2559 &this->result.swizzle);
2560 }
2561
2562 function_entry *
2563 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2564 {
2565 function_entry *entry;
2566
2567 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2568 entry = (function_entry *)iter.get();
2569
2570 if (entry->sig == sig)
2571 return entry;
2572 }
2573
2574 entry = ralloc(mem_ctx, function_entry);
2575 entry->sig = sig;
2576 entry->sig_id = this->next_signature_id++;
2577 entry->bgn_inst = NULL;
2578
2579 /* Allocate storage for all the parameters. */
2580 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2581 ir_variable *param = (ir_variable *)iter.get();
2582 variable_storage *storage;
2583
2584 storage = find_variable_storage(param);
2585 assert(!storage);
2586
2587 st_src_reg src = get_temp(param->type);
2588
2589 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2590 this->variables.push_tail(storage);
2591 }
2592
2593 if (!sig->return_type->is_void()) {
2594 entry->return_reg = get_temp(sig->return_type);
2595 } else {
2596 entry->return_reg = undef_src;
2597 }
2598
2599 this->function_signatures.push_tail(entry);
2600 return entry;
2601 }
2602
2603 void
2604 glsl_to_tgsi_visitor::visit(ir_call *ir)
2605 {
2606 glsl_to_tgsi_instruction *call_inst;
2607 ir_function_signature *sig = ir->callee;
2608 function_entry *entry = get_function_signature(sig);
2609 int i;
2610
2611 /* Process in parameters. */
2612 exec_list_iterator sig_iter = sig->parameters.iterator();
2613 foreach_iter(exec_list_iterator, iter, *ir) {
2614 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2615 ir_variable *param = (ir_variable *)sig_iter.get();
2616
2617 if (param->mode == ir_var_function_in ||
2618 param->mode == ir_var_function_inout) {
2619 variable_storage *storage = find_variable_storage(param);
2620 assert(storage);
2621
2622 param_rval->accept(this);
2623 st_src_reg r = this->result;
2624
2625 st_dst_reg l;
2626 l.file = storage->file;
2627 l.index = storage->index;
2628 l.reladdr = NULL;
2629 l.writemask = WRITEMASK_XYZW;
2630 l.cond_mask = COND_TR;
2631
2632 for (i = 0; i < type_size(param->type); i++) {
2633 emit(ir, TGSI_OPCODE_MOV, l, r);
2634 l.index++;
2635 r.index++;
2636 }
2637 }
2638
2639 sig_iter.next();
2640 }
2641 assert(!sig_iter.has_next());
2642
2643 /* Emit call instruction */
2644 call_inst = emit(ir, TGSI_OPCODE_CAL);
2645 call_inst->function = entry;
2646
2647 /* Process out parameters. */
2648 sig_iter = sig->parameters.iterator();
2649 foreach_iter(exec_list_iterator, iter, *ir) {
2650 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2651 ir_variable *param = (ir_variable *)sig_iter.get();
2652
2653 if (param->mode == ir_var_function_out ||
2654 param->mode == ir_var_function_inout) {
2655 variable_storage *storage = find_variable_storage(param);
2656 assert(storage);
2657
2658 st_src_reg r;
2659 r.file = storage->file;
2660 r.index = storage->index;
2661 r.reladdr = NULL;
2662 r.swizzle = SWIZZLE_NOOP;
2663 r.negate = 0;
2664
2665 param_rval->accept(this);
2666 st_dst_reg l = st_dst_reg(this->result);
2667
2668 for (i = 0; i < type_size(param->type); i++) {
2669 emit(ir, TGSI_OPCODE_MOV, l, r);
2670 l.index++;
2671 r.index++;
2672 }
2673 }
2674
2675 sig_iter.next();
2676 }
2677 assert(!sig_iter.has_next());
2678
2679 /* Process return value. */
2680 this->result = entry->return_reg;
2681 }
2682
2683 void
2684 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2685 {
2686 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset;
2687 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2688 glsl_to_tgsi_instruction *inst = NULL;
2689 unsigned opcode = TGSI_OPCODE_NOP;
2690 const glsl_type *sampler_type = ir->sampler->type;
2691 bool is_cube_array = false;
2692
2693 /* if we are a cube array sampler */
2694 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2695 sampler_type->sampler_array)) {
2696 is_cube_array = true;
2697 }
2698
2699 if (ir->coordinate) {
2700 ir->coordinate->accept(this);
2701
2702 /* Put our coords in a temp. We'll need to modify them for shadow,
2703 * projection, or LOD, so the only case we'd use it as is is if
2704 * we're doing plain old texturing. The optimization passes on
2705 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2706 */
2707 coord = get_temp(glsl_type::vec4_type);
2708 coord_dst = st_dst_reg(coord);
2709 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2710 }
2711
2712 if (ir->projector) {
2713 ir->projector->accept(this);
2714 projector = this->result;
2715 }
2716
2717 /* Storage for our result. Ideally for an assignment we'd be using
2718 * the actual storage for the result here, instead.
2719 */
2720 result_src = get_temp(ir->type);
2721 result_dst = st_dst_reg(result_src);
2722
2723 switch (ir->op) {
2724 case ir_tex:
2725 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2726 if (ir->offset) {
2727 ir->offset->accept(this);
2728 offset = this->result;
2729 }
2730 break;
2731 case ir_txb:
2732 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2733 ir->lod_info.bias->accept(this);
2734 lod_info = this->result;
2735 if (ir->offset) {
2736 ir->offset->accept(this);
2737 offset = this->result;
2738 }
2739 break;
2740 case ir_txl:
2741 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2742 ir->lod_info.lod->accept(this);
2743 lod_info = this->result;
2744 if (ir->offset) {
2745 ir->offset->accept(this);
2746 offset = this->result;
2747 }
2748 break;
2749 case ir_txd:
2750 opcode = TGSI_OPCODE_TXD;
2751 ir->lod_info.grad.dPdx->accept(this);
2752 dx = this->result;
2753 ir->lod_info.grad.dPdy->accept(this);
2754 dy = this->result;
2755 if (ir->offset) {
2756 ir->offset->accept(this);
2757 offset = this->result;
2758 }
2759 break;
2760 case ir_txs:
2761 opcode = TGSI_OPCODE_TXQ;
2762 ir->lod_info.lod->accept(this);
2763 lod_info = this->result;
2764 break;
2765 case ir_txf:
2766 opcode = TGSI_OPCODE_TXF;
2767 ir->lod_info.lod->accept(this);
2768 lod_info = this->result;
2769 if (ir->offset) {
2770 ir->offset->accept(this);
2771 offset = this->result;
2772 }
2773 break;
2774 case ir_txf_ms:
2775 assert(!"Unexpected ir_txf_ms opcode");
2776 break;
2777 }
2778
2779 if (ir->projector) {
2780 if (opcode == TGSI_OPCODE_TEX) {
2781 /* Slot the projector in as the last component of the coord. */
2782 coord_dst.writemask = WRITEMASK_W;
2783 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2784 coord_dst.writemask = WRITEMASK_XYZW;
2785 opcode = TGSI_OPCODE_TXP;
2786 } else {
2787 st_src_reg coord_w = coord;
2788 coord_w.swizzle = SWIZZLE_WWWW;
2789
2790 /* For the other TEX opcodes there's no projective version
2791 * since the last slot is taken up by LOD info. Do the
2792 * projective divide now.
2793 */
2794 coord_dst.writemask = WRITEMASK_W;
2795 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2796
2797 /* In the case where we have to project the coordinates "by hand,"
2798 * the shadow comparator value must also be projected.
2799 */
2800 st_src_reg tmp_src = coord;
2801 if (ir->shadow_comparitor) {
2802 /* Slot the shadow value in as the second to last component of the
2803 * coord.
2804 */
2805 ir->shadow_comparitor->accept(this);
2806
2807 tmp_src = get_temp(glsl_type::vec4_type);
2808 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2809
2810 /* Projective division not allowed for array samplers. */
2811 assert(!sampler_type->sampler_array);
2812
2813 tmp_dst.writemask = WRITEMASK_Z;
2814 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2815
2816 tmp_dst.writemask = WRITEMASK_XY;
2817 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2818 }
2819
2820 coord_dst.writemask = WRITEMASK_XYZ;
2821 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2822
2823 coord_dst.writemask = WRITEMASK_XYZW;
2824 coord.swizzle = SWIZZLE_XYZW;
2825 }
2826 }
2827
2828 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2829 * comparator was put in the correct place (and projected) by the code,
2830 * above, that handles by-hand projection.
2831 */
2832 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2833 /* Slot the shadow value in as the second to last component of the
2834 * coord.
2835 */
2836 ir->shadow_comparitor->accept(this);
2837
2838 if (is_cube_array) {
2839 cube_sc = get_temp(glsl_type::float_type);
2840 cube_sc_dst = st_dst_reg(cube_sc);
2841 cube_sc_dst.writemask = WRITEMASK_X;
2842 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2843 cube_sc_dst.writemask = WRITEMASK_X;
2844 }
2845 else {
2846 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2847 sampler_type->sampler_array) ||
2848 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2849 coord_dst.writemask = WRITEMASK_W;
2850 } else {
2851 coord_dst.writemask = WRITEMASK_Z;
2852 }
2853
2854 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2855 coord_dst.writemask = WRITEMASK_XYZW;
2856 }
2857 }
2858
2859 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2860 opcode == TGSI_OPCODE_TXF) {
2861 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2862 coord_dst.writemask = WRITEMASK_W;
2863 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2864 coord_dst.writemask = WRITEMASK_XYZW;
2865 }
2866
2867 if (opcode == TGSI_OPCODE_TXD)
2868 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2869 else if (opcode == TGSI_OPCODE_TXQ)
2870 inst = emit(ir, opcode, result_dst, lod_info);
2871 else if (opcode == TGSI_OPCODE_TXF) {
2872 inst = emit(ir, opcode, result_dst, coord);
2873 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2874 inst = emit(ir, opcode, result_dst, coord, lod_info);
2875 } else if (opcode == TGSI_OPCODE_TEX2) {
2876 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2877 } else
2878 inst = emit(ir, opcode, result_dst, coord);
2879
2880 if (ir->shadow_comparitor)
2881 inst->tex_shadow = GL_TRUE;
2882
2883 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2884 this->shader_program,
2885 this->prog);
2886
2887 if (ir->offset) {
2888 inst->tex_offset_num_offset = 1;
2889 inst->tex_offsets[0].Index = offset.index;
2890 inst->tex_offsets[0].File = offset.file;
2891 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2892 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2893 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2894 }
2895
2896 switch (sampler_type->sampler_dimensionality) {
2897 case GLSL_SAMPLER_DIM_1D:
2898 inst->tex_target = (sampler_type->sampler_array)
2899 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2900 break;
2901 case GLSL_SAMPLER_DIM_2D:
2902 inst->tex_target = (sampler_type->sampler_array)
2903 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2904 break;
2905 case GLSL_SAMPLER_DIM_3D:
2906 inst->tex_target = TEXTURE_3D_INDEX;
2907 break;
2908 case GLSL_SAMPLER_DIM_CUBE:
2909 inst->tex_target = (sampler_type->sampler_array)
2910 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2911 break;
2912 case GLSL_SAMPLER_DIM_RECT:
2913 inst->tex_target = TEXTURE_RECT_INDEX;
2914 break;
2915 case GLSL_SAMPLER_DIM_BUF:
2916 inst->tex_target = TEXTURE_BUFFER_INDEX;
2917 break;
2918 case GLSL_SAMPLER_DIM_EXTERNAL:
2919 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2920 break;
2921 default:
2922 assert(!"Should not get here.");
2923 }
2924
2925 this->result = result_src;
2926 }
2927
2928 void
2929 glsl_to_tgsi_visitor::visit(ir_return *ir)
2930 {
2931 if (ir->get_value()) {
2932 st_dst_reg l;
2933 int i;
2934
2935 assert(current_function);
2936
2937 ir->get_value()->accept(this);
2938 st_src_reg r = this->result;
2939
2940 l = st_dst_reg(current_function->return_reg);
2941
2942 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2943 emit(ir, TGSI_OPCODE_MOV, l, r);
2944 l.index++;
2945 r.index++;
2946 }
2947 }
2948
2949 emit(ir, TGSI_OPCODE_RET);
2950 }
2951
2952 void
2953 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2954 {
2955 if (ir->condition) {
2956 ir->condition->accept(this);
2957 this->result.negate = ~this->result.negate;
2958 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2959 } else {
2960 emit(ir, TGSI_OPCODE_KILP);
2961 }
2962 }
2963
2964 void
2965 glsl_to_tgsi_visitor::visit(ir_if *ir)
2966 {
2967 glsl_to_tgsi_instruction *if_inst;
2968
2969 ir->condition->accept(this);
2970 assert(this->result.file != PROGRAM_UNDEFINED);
2971
2972 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2973
2974 this->instructions.push_tail(if_inst);
2975
2976 visit_exec_list(&ir->then_instructions, this);
2977
2978 if (!ir->else_instructions.is_empty()) {
2979 emit(ir->condition, TGSI_OPCODE_ELSE);
2980 visit_exec_list(&ir->else_instructions, this);
2981 }
2982
2983 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2984 }
2985
2986 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2987 {
2988 result.file = PROGRAM_UNDEFINED;
2989 next_temp = 1;
2990 next_array = 0;
2991 next_signature_id = 1;
2992 num_immediates = 0;
2993 current_function = NULL;
2994 num_address_regs = 0;
2995 samplers_used = 0;
2996 indirect_addr_consts = false;
2997 glsl_version = 0;
2998 native_integers = false;
2999 mem_ctx = ralloc_context(NULL);
3000 ctx = NULL;
3001 prog = NULL;
3002 shader_program = NULL;
3003 options = NULL;
3004 }
3005
3006 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3007 {
3008 ralloc_free(mem_ctx);
3009 }
3010
3011 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3012 {
3013 delete v;
3014 }
3015
3016
3017 /**
3018 * Count resources used by the given gpu program (number of texture
3019 * samplers, etc).
3020 */
3021 static void
3022 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3023 {
3024 v->samplers_used = 0;
3025
3026 foreach_iter(exec_list_iterator, iter, v->instructions) {
3027 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3028
3029 if (is_tex_instruction(inst->op)) {
3030 v->samplers_used |= 1 << inst->sampler;
3031
3032 if (inst->tex_shadow) {
3033 prog->ShadowSamplers |= 1 << inst->sampler;
3034 }
3035 }
3036 }
3037
3038 prog->SamplersUsed = v->samplers_used;
3039
3040 if (v->shader_program != NULL)
3041 _mesa_update_shader_textures_used(v->shader_program, prog);
3042 }
3043
3044 static void
3045 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3046 struct gl_shader_program *shader_program,
3047 const char *name, const glsl_type *type,
3048 ir_constant *val)
3049 {
3050 if (type->is_record()) {
3051 ir_constant *field_constant;
3052
3053 field_constant = (ir_constant *)val->components.get_head();
3054
3055 for (unsigned int i = 0; i < type->length; i++) {
3056 const glsl_type *field_type = type->fields.structure[i].type;
3057 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3058 type->fields.structure[i].name);
3059 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3060 field_type, field_constant);
3061 field_constant = (ir_constant *)field_constant->next;
3062 }
3063 return;
3064 }
3065
3066 unsigned offset;
3067 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3068 &offset);
3069 if (offset == GL_INVALID_INDEX) {
3070 fail_link(shader_program,
3071 "Couldn't find uniform for initializer %s\n", name);
3072 return;
3073 }
3074 int loc = _mesa_uniform_merge_location_offset(index, offset);
3075
3076 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3077 ir_constant *element;
3078 const glsl_type *element_type;
3079 if (type->is_array()) {
3080 element = val->array_elements[i];
3081 element_type = type->fields.array;
3082 } else {
3083 element = val;
3084 element_type = type;
3085 }
3086
3087 void *values;
3088
3089 if (element_type->base_type == GLSL_TYPE_BOOL) {
3090 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3091 for (unsigned int j = 0; j < element_type->components(); j++) {
3092 conv[j] = element->value.b[j];
3093 }
3094 values = (void *)conv;
3095 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3096 element_type->vector_elements,
3097 1);
3098 } else {
3099 values = &element->value;
3100 }
3101
3102 if (element_type->is_matrix()) {
3103 _mesa_uniform_matrix(ctx, shader_program,
3104 element_type->matrix_columns,
3105 element_type->vector_elements,
3106 loc, 1, GL_FALSE, (GLfloat *)values);
3107 } else {
3108 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3109 values, element_type->gl_type);
3110 }
3111
3112 loc++;
3113 }
3114 }
3115
3116 /**
3117 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3118 * are read from the given src in this instruction
3119 */
3120 static int
3121 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3122 {
3123 int read_mask = 0, comp;
3124
3125 /* Now, given the src swizzle and the written channels, find which
3126 * components are actually read
3127 */
3128 for (comp = 0; comp < 4; ++comp) {
3129 const unsigned coord = GET_SWZ(src.swizzle, comp);
3130 ASSERT(coord < 4);
3131 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3132 read_mask |= 1 << coord;
3133 }
3134
3135 return read_mask;
3136 }
3137
3138 /**
3139 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3140 * instruction is the first instruction to write to register T0. There are
3141 * several lowering passes done in GLSL IR (e.g. branches and
3142 * relative addressing) that create a large number of conditional assignments
3143 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3144 *
3145 * Here is why this conversion is safe:
3146 * CMP T0, T1 T2 T0 can be expanded to:
3147 * if (T1 < 0.0)
3148 * MOV T0, T2;
3149 * else
3150 * MOV T0, T0;
3151 *
3152 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3153 * as the original program. If (T1 < 0.0) evaluates to false, executing
3154 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3155 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3156 * because any instruction that was going to read from T0 after this was going
3157 * to read a garbage value anyway.
3158 */
3159 void
3160 glsl_to_tgsi_visitor::simplify_cmp(void)
3161 {
3162 unsigned *tempWrites;
3163 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3164
3165 tempWrites = new unsigned[MAX_TEMPS];
3166 if (!tempWrites) {
3167 return;
3168 }
3169 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3170 memset(outputWrites, 0, sizeof(outputWrites));
3171
3172 foreach_iter(exec_list_iterator, iter, this->instructions) {
3173 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3174 unsigned prevWriteMask = 0;
3175
3176 /* Give up if we encounter relative addressing or flow control. */
3177 if (inst->dst.reladdr ||
3178 tgsi_get_opcode_info(inst->op)->is_branch ||
3179 inst->op == TGSI_OPCODE_BGNSUB ||
3180 inst->op == TGSI_OPCODE_CONT ||
3181 inst->op == TGSI_OPCODE_END ||
3182 inst->op == TGSI_OPCODE_ENDSUB ||
3183 inst->op == TGSI_OPCODE_RET) {
3184 break;
3185 }
3186
3187 if (inst->dst.file == PROGRAM_OUTPUT) {
3188 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3189 prevWriteMask = outputWrites[inst->dst.index];
3190 outputWrites[inst->dst.index] |= inst->dst.writemask;
3191 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3192 assert(inst->dst.index < MAX_TEMPS);
3193 prevWriteMask = tempWrites[inst->dst.index];
3194 tempWrites[inst->dst.index] |= inst->dst.writemask;
3195 } else
3196 continue;
3197
3198 /* For a CMP to be considered a conditional write, the destination
3199 * register and source register two must be the same. */
3200 if (inst->op == TGSI_OPCODE_CMP
3201 && !(inst->dst.writemask & prevWriteMask)
3202 && inst->src[2].file == inst->dst.file
3203 && inst->src[2].index == inst->dst.index
3204 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3205
3206 inst->op = TGSI_OPCODE_MOV;
3207 inst->src[0] = inst->src[1];
3208 }
3209 }
3210
3211 delete [] tempWrites;
3212 }
3213
3214 /* Replaces all references to a temporary register index with another index. */
3215 void
3216 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3217 {
3218 foreach_iter(exec_list_iterator, iter, this->instructions) {
3219 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3220 unsigned j;
3221
3222 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3223 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3224 inst->src[j].index == index) {
3225 inst->src[j].index = new_index;
3226 }
3227 }
3228
3229 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3230 inst->dst.index = new_index;
3231 }
3232 }
3233 }
3234
3235 int
3236 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3237 {
3238 int depth = 0; /* loop depth */
3239 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3240 unsigned i = 0, j;
3241
3242 foreach_iter(exec_list_iterator, iter, this->instructions) {
3243 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3244
3245 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3246 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3247 inst->src[j].index == index) {
3248 return (depth == 0) ? i : loop_start;
3249 }
3250 }
3251
3252 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3253 if(depth++ == 0)
3254 loop_start = i;
3255 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3256 if (--depth == 0)
3257 loop_start = -1;
3258 }
3259 assert(depth >= 0);
3260
3261 i++;
3262 }
3263
3264 return -1;
3265 }
3266
3267 int
3268 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3269 {
3270 int depth = 0; /* loop depth */
3271 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3272 int i = 0;
3273
3274 foreach_iter(exec_list_iterator, iter, this->instructions) {
3275 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3276
3277 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3278 return (depth == 0) ? i : loop_start;
3279 }
3280
3281 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3282 if(depth++ == 0)
3283 loop_start = i;
3284 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3285 if (--depth == 0)
3286 loop_start = -1;
3287 }
3288 assert(depth >= 0);
3289
3290 i++;
3291 }
3292
3293 return -1;
3294 }
3295
3296 int
3297 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3298 {
3299 int depth = 0; /* loop depth */
3300 int last = -1; /* index of last instruction that reads the temporary */
3301 unsigned i = 0, j;
3302
3303 foreach_iter(exec_list_iterator, iter, this->instructions) {
3304 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3305
3306 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3307 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3308 inst->src[j].index == index) {
3309 last = (depth == 0) ? i : -2;
3310 }
3311 }
3312
3313 if (inst->op == TGSI_OPCODE_BGNLOOP)
3314 depth++;
3315 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3316 if (--depth == 0 && last == -2)
3317 last = i;
3318 assert(depth >= 0);
3319
3320 i++;
3321 }
3322
3323 assert(last >= -1);
3324 return last;
3325 }
3326
3327 int
3328 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3329 {
3330 int depth = 0; /* loop depth */
3331 int last = -1; /* index of last instruction that writes to the temporary */
3332 int i = 0;
3333
3334 foreach_iter(exec_list_iterator, iter, this->instructions) {
3335 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3336
3337 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3338 last = (depth == 0) ? i : -2;
3339
3340 if (inst->op == TGSI_OPCODE_BGNLOOP)
3341 depth++;
3342 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3343 if (--depth == 0 && last == -2)
3344 last = i;
3345 assert(depth >= 0);
3346
3347 i++;
3348 }
3349
3350 assert(last >= -1);
3351 return last;
3352 }
3353
3354 /*
3355 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3356 * channels for copy propagation and updates following instructions to
3357 * use the original versions.
3358 *
3359 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3360 * will occur. As an example, a TXP production before this pass:
3361 *
3362 * 0: MOV TEMP[1], INPUT[4].xyyy;
3363 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3364 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3365 *
3366 * and after:
3367 *
3368 * 0: MOV TEMP[1], INPUT[4].xyyy;
3369 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3370 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3371 *
3372 * which allows for dead code elimination on TEMP[1]'s writes.
3373 */
3374 void
3375 glsl_to_tgsi_visitor::copy_propagate(void)
3376 {
3377 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3378 glsl_to_tgsi_instruction *,
3379 this->next_temp * 4);
3380 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3381 int level = 0;
3382
3383 foreach_iter(exec_list_iterator, iter, this->instructions) {
3384 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3385
3386 assert(inst->dst.file != PROGRAM_TEMPORARY
3387 || inst->dst.index < this->next_temp);
3388
3389 /* First, do any copy propagation possible into the src regs. */
3390 for (int r = 0; r < 3; r++) {
3391 glsl_to_tgsi_instruction *first = NULL;
3392 bool good = true;
3393 int acp_base = inst->src[r].index * 4;
3394
3395 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3396 inst->src[r].reladdr)
3397 continue;
3398
3399 /* See if we can find entries in the ACP consisting of MOVs
3400 * from the same src register for all the swizzled channels
3401 * of this src register reference.
3402 */
3403 for (int i = 0; i < 4; i++) {
3404 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3405 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3406
3407 if (!copy_chan) {
3408 good = false;
3409 break;
3410 }
3411
3412 assert(acp_level[acp_base + src_chan] <= level);
3413
3414 if (!first) {
3415 first = copy_chan;
3416 } else {
3417 if (first->src[0].file != copy_chan->src[0].file ||
3418 first->src[0].index != copy_chan->src[0].index) {
3419 good = false;
3420 break;
3421 }
3422 }
3423 }
3424
3425 if (good) {
3426 /* We've now validated that we can copy-propagate to
3427 * replace this src register reference. Do it.
3428 */
3429 inst->src[r].file = first->src[0].file;
3430 inst->src[r].index = first->src[0].index;
3431
3432 int swizzle = 0;
3433 for (int i = 0; i < 4; i++) {
3434 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3435 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3436 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3437 (3 * i));
3438 }
3439 inst->src[r].swizzle = swizzle;
3440 }
3441 }
3442
3443 switch (inst->op) {
3444 case TGSI_OPCODE_BGNLOOP:
3445 case TGSI_OPCODE_ENDLOOP:
3446 /* End of a basic block, clear the ACP entirely. */
3447 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3448 break;
3449
3450 case TGSI_OPCODE_IF:
3451 ++level;
3452 break;
3453
3454 case TGSI_OPCODE_ENDIF:
3455 case TGSI_OPCODE_ELSE:
3456 /* Clear all channels written inside the block from the ACP, but
3457 * leaving those that were not touched.
3458 */
3459 for (int r = 0; r < this->next_temp; r++) {
3460 for (int c = 0; c < 4; c++) {
3461 if (!acp[4 * r + c])
3462 continue;
3463
3464 if (acp_level[4 * r + c] >= level)
3465 acp[4 * r + c] = NULL;
3466 }
3467 }
3468 if (inst->op == TGSI_OPCODE_ENDIF)
3469 --level;
3470 break;
3471
3472 default:
3473 /* Continuing the block, clear any written channels from
3474 * the ACP.
3475 */
3476 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3477 /* Any temporary might be written, so no copy propagation
3478 * across this instruction.
3479 */
3480 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3481 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3482 inst->dst.reladdr) {
3483 /* Any output might be written, so no copy propagation
3484 * from outputs across this instruction.
3485 */
3486 for (int r = 0; r < this->next_temp; r++) {
3487 for (int c = 0; c < 4; c++) {
3488 if (!acp[4 * r + c])
3489 continue;
3490
3491 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3492 acp[4 * r + c] = NULL;
3493 }
3494 }
3495 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3496 inst->dst.file == PROGRAM_OUTPUT) {
3497 /* Clear where it's used as dst. */
3498 if (inst->dst.file == PROGRAM_TEMPORARY) {
3499 for (int c = 0; c < 4; c++) {
3500 if (inst->dst.writemask & (1 << c)) {
3501 acp[4 * inst->dst.index + c] = NULL;
3502 }
3503 }
3504 }
3505
3506 /* Clear where it's used as src. */
3507 for (int r = 0; r < this->next_temp; r++) {
3508 for (int c = 0; c < 4; c++) {
3509 if (!acp[4 * r + c])
3510 continue;
3511
3512 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3513
3514 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3515 acp[4 * r + c]->src[0].index == inst->dst.index &&
3516 inst->dst.writemask & (1 << src_chan))
3517 {
3518 acp[4 * r + c] = NULL;
3519 }
3520 }
3521 }
3522 }
3523 break;
3524 }
3525
3526 /* If this is a copy, add it to the ACP. */
3527 if (inst->op == TGSI_OPCODE_MOV &&
3528 inst->dst.file == PROGRAM_TEMPORARY &&
3529 !inst->dst.reladdr &&
3530 !inst->saturate &&
3531 !inst->src[0].reladdr &&
3532 !inst->src[0].negate) {
3533 for (int i = 0; i < 4; i++) {
3534 if (inst->dst.writemask & (1 << i)) {
3535 acp[4 * inst->dst.index + i] = inst;
3536 acp_level[4 * inst->dst.index + i] = level;
3537 }
3538 }
3539 }
3540 }
3541
3542 ralloc_free(acp_level);
3543 ralloc_free(acp);
3544 }
3545
3546 /*
3547 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3548 *
3549 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3550 * will occur. As an example, a TXP production after copy propagation but
3551 * before this pass:
3552 *
3553 * 0: MOV TEMP[1], INPUT[4].xyyy;
3554 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3555 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3556 *
3557 * and after this pass:
3558 *
3559 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3560 *
3561 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3562 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3563 */
3564 void
3565 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3566 {
3567 int i;
3568
3569 for (i=0; i < this->next_temp; i++) {
3570 int last_read = get_last_temp_read(i);
3571 int j = 0;
3572
3573 foreach_iter(exec_list_iterator, iter, this->instructions) {
3574 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3575
3576 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3577 j > last_read)
3578 {
3579 iter.remove();
3580 delete inst;
3581 }
3582
3583 j++;
3584 }
3585 }
3586 }
3587
3588 /*
3589 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3590 * code elimination. This is less primitive than eliminate_dead_code(), as it
3591 * is per-channel and can detect consecutive writes without a read between them
3592 * as dead code. However, there is some dead code that can be eliminated by
3593 * eliminate_dead_code() but not this function - for example, this function
3594 * cannot eliminate an instruction writing to a register that is never read and
3595 * is the only instruction writing to that register.
3596 *
3597 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3598 * will occur.
3599 */
3600 int
3601 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3602 {
3603 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3604 glsl_to_tgsi_instruction *,
3605 this->next_temp * 4);
3606 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3607 int level = 0;
3608 int removed = 0;
3609
3610 foreach_iter(exec_list_iterator, iter, this->instructions) {
3611 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3612
3613 assert(inst->dst.file != PROGRAM_TEMPORARY
3614 || inst->dst.index < this->next_temp);
3615
3616 switch (inst->op) {
3617 case TGSI_OPCODE_BGNLOOP:
3618 case TGSI_OPCODE_ENDLOOP:
3619 case TGSI_OPCODE_CONT:
3620 case TGSI_OPCODE_BRK:
3621 /* End of a basic block, clear the write array entirely.
3622 *
3623 * This keeps us from killing dead code when the writes are
3624 * on either side of a loop, even when the register isn't touched
3625 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3626 * dead code of this type, so it shouldn't make a difference as long as
3627 * the dead code elimination pass in the GLSL compiler does its job.
3628 */
3629 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3630 break;
3631
3632 case TGSI_OPCODE_ENDIF:
3633 case TGSI_OPCODE_ELSE:
3634 /* Promote the recorded level of all channels written inside the
3635 * preceding if or else block to the level above the if/else block.
3636 */
3637 for (int r = 0; r < this->next_temp; r++) {
3638 for (int c = 0; c < 4; c++) {
3639 if (!writes[4 * r + c])
3640 continue;
3641
3642 if (write_level[4 * r + c] == level)
3643 write_level[4 * r + c] = level-1;
3644 }
3645 }
3646
3647 if(inst->op == TGSI_OPCODE_ENDIF)
3648 --level;
3649
3650 break;
3651
3652 case TGSI_OPCODE_IF:
3653 ++level;
3654 /* fallthrough to default case to mark the condition as read */
3655
3656 default:
3657 /* Continuing the block, clear any channels from the write array that
3658 * are read by this instruction.
3659 */
3660 for (unsigned i = 0; i < Elements(inst->src); i++) {
3661 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3662 /* Any temporary might be read, so no dead code elimination
3663 * across this instruction.
3664 */
3665 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3666 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3667 /* Clear where it's used as src. */
3668 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3669 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3670 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3671 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3672
3673 for (int c = 0; c < 4; c++) {
3674 if (src_chans & (1 << c)) {
3675 writes[4 * inst->src[i].index + c] = NULL;
3676 }
3677 }
3678 }
3679 }
3680 break;
3681 }
3682
3683 /* If this instruction writes to a temporary, add it to the write array.
3684 * If there is already an instruction in the write array for one or more
3685 * of the channels, flag that channel write as dead.
3686 */
3687 if (inst->dst.file == PROGRAM_TEMPORARY &&
3688 !inst->dst.reladdr &&
3689 !inst->saturate) {
3690 for (int c = 0; c < 4; c++) {
3691 if (inst->dst.writemask & (1 << c)) {
3692 if (writes[4 * inst->dst.index + c]) {
3693 if (write_level[4 * inst->dst.index + c] < level)
3694 continue;
3695 else
3696 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3697 }
3698 writes[4 * inst->dst.index + c] = inst;
3699 write_level[4 * inst->dst.index + c] = level;
3700 }
3701 }
3702 }
3703 }
3704
3705 /* Anything still in the write array at this point is dead code. */
3706 for (int r = 0; r < this->next_temp; r++) {
3707 for (int c = 0; c < 4; c++) {
3708 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3709 if (inst)
3710 inst->dead_mask |= (1 << c);
3711 }
3712 }
3713
3714 /* Now actually remove the instructions that are completely dead and update
3715 * the writemask of other instructions with dead channels.
3716 */
3717 foreach_iter(exec_list_iterator, iter, this->instructions) {
3718 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3719
3720 if (!inst->dead_mask || !inst->dst.writemask)
3721 continue;
3722 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3723 iter.remove();
3724 delete inst;
3725 removed++;
3726 } else
3727 inst->dst.writemask &= ~(inst->dead_mask);
3728 }
3729
3730 ralloc_free(write_level);
3731 ralloc_free(writes);
3732
3733 return removed;
3734 }
3735
3736 /* Merges temporary registers together where possible to reduce the number of
3737 * registers needed to run a program.
3738 *
3739 * Produces optimal code only after copy propagation and dead code elimination
3740 * have been run. */
3741 void
3742 glsl_to_tgsi_visitor::merge_registers(void)
3743 {
3744 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3745 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3746 int i, j;
3747
3748 /* Read the indices of the last read and first write to each temp register
3749 * into an array so that we don't have to traverse the instruction list as
3750 * much. */
3751 for (i=0; i < this->next_temp; i++) {
3752 last_reads[i] = get_last_temp_read(i);
3753 first_writes[i] = get_first_temp_write(i);
3754 }
3755
3756 /* Start looking for registers with non-overlapping usages that can be
3757 * merged together. */
3758 for (i=0; i < this->next_temp; i++) {
3759 /* Don't touch unused registers. */
3760 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3761
3762 for (j=0; j < this->next_temp; j++) {
3763 /* Don't touch unused registers. */
3764 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3765
3766 /* We can merge the two registers if the first write to j is after or
3767 * in the same instruction as the last read from i. Note that the
3768 * register at index i will always be used earlier or at the same time
3769 * as the register at index j. */
3770 if (first_writes[i] <= first_writes[j] &&
3771 last_reads[i] <= first_writes[j])
3772 {
3773 rename_temp_register(j, i); /* Replace all references to j with i.*/
3774
3775 /* Update the first_writes and last_reads arrays with the new
3776 * values for the merged register index, and mark the newly unused
3777 * register index as such. */
3778 last_reads[i] = last_reads[j];
3779 first_writes[j] = -1;
3780 last_reads[j] = -1;
3781 }
3782 }
3783 }
3784
3785 ralloc_free(last_reads);
3786 ralloc_free(first_writes);
3787 }
3788
3789 /* Reassign indices to temporary registers by reusing unused indices created
3790 * by optimization passes. */
3791 void
3792 glsl_to_tgsi_visitor::renumber_registers(void)
3793 {
3794 int i = 0;
3795 int new_index = 0;
3796
3797 for (i=0; i < this->next_temp; i++) {
3798 if (get_first_temp_read(i) < 0) continue;
3799 if (i != new_index)
3800 rename_temp_register(i, new_index);
3801 new_index++;
3802 }
3803
3804 this->next_temp = new_index;
3805 }
3806
3807 /**
3808 * Returns a fragment program which implements the current pixel transfer ops.
3809 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3810 */
3811 extern "C" void
3812 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3813 glsl_to_tgsi_visitor *original,
3814 int scale_and_bias, int pixel_maps)
3815 {
3816 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3817 struct st_context *st = st_context(original->ctx);
3818 struct gl_program *prog = &fp->Base.Base;
3819 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3820 st_src_reg coord, src0;
3821 st_dst_reg dst0;
3822 glsl_to_tgsi_instruction *inst;
3823
3824 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3825 v->ctx = original->ctx;
3826 v->prog = prog;
3827 v->shader_program = NULL;
3828 v->glsl_version = original->glsl_version;
3829 v->native_integers = original->native_integers;
3830 v->options = original->options;
3831 v->next_temp = original->next_temp;
3832 v->num_address_regs = original->num_address_regs;
3833 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3834 v->indirect_addr_consts = original->indirect_addr_consts;
3835 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3836 v->num_immediates = original->num_immediates;
3837
3838 /*
3839 * Get initial pixel color from the texture.
3840 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3841 */
3842 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3843 src0 = v->get_temp(glsl_type::vec4_type);
3844 dst0 = st_dst_reg(src0);
3845 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3846 inst->sampler = 0;
3847 inst->tex_target = TEXTURE_2D_INDEX;
3848
3849 prog->InputsRead |= VARYING_BIT_TEX0;
3850 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3851 v->samplers_used |= (1 << 0);
3852
3853 if (scale_and_bias) {
3854 static const gl_state_index scale_state[STATE_LENGTH] =
3855 { STATE_INTERNAL, STATE_PT_SCALE,
3856 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3857 static const gl_state_index bias_state[STATE_LENGTH] =
3858 { STATE_INTERNAL, STATE_PT_BIAS,
3859 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3860 GLint scale_p, bias_p;
3861 st_src_reg scale, bias;
3862
3863 scale_p = _mesa_add_state_reference(params, scale_state);
3864 bias_p = _mesa_add_state_reference(params, bias_state);
3865
3866 /* MAD colorTemp, colorTemp, scale, bias; */
3867 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3868 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3869 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3870 }
3871
3872 if (pixel_maps) {
3873 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3874 st_dst_reg temp_dst = st_dst_reg(temp);
3875
3876 assert(st->pixel_xfer.pixelmap_texture);
3877
3878 /* With a little effort, we can do four pixel map look-ups with
3879 * two TEX instructions:
3880 */
3881
3882 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3883 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3884 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3885 inst->sampler = 1;
3886 inst->tex_target = TEXTURE_2D_INDEX;
3887
3888 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3889 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3890 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3891 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3892 inst->sampler = 1;
3893 inst->tex_target = TEXTURE_2D_INDEX;
3894
3895 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3896 v->samplers_used |= (1 << 1);
3897
3898 /* MOV colorTemp, temp; */
3899 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3900 }
3901
3902 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3903 * new visitor. */
3904 foreach_iter(exec_list_iterator, iter, original->instructions) {
3905 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3906 glsl_to_tgsi_instruction *newinst;
3907 st_src_reg src_regs[3];
3908
3909 if (inst->dst.file == PROGRAM_OUTPUT)
3910 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3911
3912 for (int i=0; i<3; i++) {
3913 src_regs[i] = inst->src[i];
3914 if (src_regs[i].file == PROGRAM_INPUT &&
3915 src_regs[i].index == VARYING_SLOT_COL0)
3916 {
3917 src_regs[i].file = PROGRAM_TEMPORARY;
3918 src_regs[i].index = src0.index;
3919 }
3920 else if (src_regs[i].file == PROGRAM_INPUT)
3921 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3922 }
3923
3924 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3925 newinst->tex_target = inst->tex_target;
3926 }
3927
3928 /* Make modifications to fragment program info. */
3929 prog->Parameters = _mesa_combine_parameter_lists(params,
3930 original->prog->Parameters);
3931 _mesa_free_parameter_list(params);
3932 count_resources(v, prog);
3933 fp->glsl_to_tgsi = v;
3934 }
3935
3936 /**
3937 * Make fragment program for glBitmap:
3938 * Sample the texture and kill the fragment if the bit is 0.
3939 * This program will be combined with the user's fragment program.
3940 *
3941 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3942 */
3943 extern "C" void
3944 get_bitmap_visitor(struct st_fragment_program *fp,
3945 glsl_to_tgsi_visitor *original, int samplerIndex)
3946 {
3947 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3948 struct st_context *st = st_context(original->ctx);
3949 struct gl_program *prog = &fp->Base.Base;
3950 st_src_reg coord, src0;
3951 st_dst_reg dst0;
3952 glsl_to_tgsi_instruction *inst;
3953
3954 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3955 v->ctx = original->ctx;
3956 v->prog = prog;
3957 v->shader_program = NULL;
3958 v->glsl_version = original->glsl_version;
3959 v->native_integers = original->native_integers;
3960 v->options = original->options;
3961 v->next_temp = original->next_temp;
3962 v->num_address_regs = original->num_address_regs;
3963 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3964 v->indirect_addr_consts = original->indirect_addr_consts;
3965 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3966 v->num_immediates = original->num_immediates;
3967
3968 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3969 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3970 src0 = v->get_temp(glsl_type::vec4_type);
3971 dst0 = st_dst_reg(src0);
3972 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3973 inst->sampler = samplerIndex;
3974 inst->tex_target = TEXTURE_2D_INDEX;
3975
3976 prog->InputsRead |= VARYING_BIT_TEX0;
3977 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3978 v->samplers_used |= (1 << samplerIndex);
3979
3980 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3981 src0.negate = NEGATE_XYZW;
3982 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3983 src0.swizzle = SWIZZLE_XXXX;
3984 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3985
3986 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3987 * new visitor. */
3988 foreach_iter(exec_list_iterator, iter, original->instructions) {
3989 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3990 glsl_to_tgsi_instruction *newinst;
3991 st_src_reg src_regs[3];
3992
3993 if (inst->dst.file == PROGRAM_OUTPUT)
3994 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3995
3996 for (int i=0; i<3; i++) {
3997 src_regs[i] = inst->src[i];
3998 if (src_regs[i].file == PROGRAM_INPUT)
3999 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4000 }
4001
4002 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4003 newinst->tex_target = inst->tex_target;
4004 }
4005
4006 /* Make modifications to fragment program info. */
4007 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4008 count_resources(v, prog);
4009 fp->glsl_to_tgsi = v;
4010 }
4011
4012 /* ------------------------- TGSI conversion stuff -------------------------- */
4013 struct label {
4014 unsigned branch_target;
4015 unsigned token;
4016 };
4017
4018 /**
4019 * Intermediate state used during shader translation.
4020 */
4021 struct st_translate {
4022 struct ureg_program *ureg;
4023
4024 struct ureg_dst temps[MAX_TEMPS];
4025 struct ureg_dst arrays[MAX_ARRAYS];
4026 struct ureg_src *constants;
4027 struct ureg_src *immediates;
4028 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4029 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4030 struct ureg_dst address[1];
4031 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4032 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4033
4034 unsigned array_sizes[MAX_ARRAYS];
4035
4036 const GLuint *inputMapping;
4037 const GLuint *outputMapping;
4038
4039 /* For every instruction that contains a label (eg CALL), keep
4040 * details so that we can go back afterwards and emit the correct
4041 * tgsi instruction number for each label.
4042 */
4043 struct label *labels;
4044 unsigned labels_size;
4045 unsigned labels_count;
4046
4047 /* Keep a record of the tgsi instruction number that each mesa
4048 * instruction starts at, will be used to fix up labels after
4049 * translation.
4050 */
4051 unsigned *insn;
4052 unsigned insn_size;
4053 unsigned insn_count;
4054
4055 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4056
4057 boolean error;
4058 };
4059
4060 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4061 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4062 TGSI_SEMANTIC_FACE,
4063 TGSI_SEMANTIC_VERTEXID,
4064 TGSI_SEMANTIC_INSTANCEID
4065 };
4066
4067 /**
4068 * Make note of a branch to a label in the TGSI code.
4069 * After we've emitted all instructions, we'll go over the list
4070 * of labels built here and patch the TGSI code with the actual
4071 * location of each label.
4072 */
4073 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4074 {
4075 unsigned i;
4076
4077 if (t->labels_count + 1 >= t->labels_size) {
4078 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4079 t->labels = (struct label *)realloc(t->labels,
4080 t->labels_size * sizeof(struct label));
4081 if (t->labels == NULL) {
4082 static unsigned dummy;
4083 t->error = TRUE;
4084 return &dummy;
4085 }
4086 }
4087
4088 i = t->labels_count++;
4089 t->labels[i].branch_target = branch_target;
4090 return &t->labels[i].token;
4091 }
4092
4093 /**
4094 * Called prior to emitting the TGSI code for each instruction.
4095 * Allocate additional space for instructions if needed.
4096 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4097 * the next TGSI instruction.
4098 */
4099 static void set_insn_start(struct st_translate *t, unsigned start)
4100 {
4101 if (t->insn_count + 1 >= t->insn_size) {
4102 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4103 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4104 if (t->insn == NULL) {
4105 t->error = TRUE;
4106 return;
4107 }
4108 }
4109
4110 t->insn[t->insn_count++] = start;
4111 }
4112
4113 /**
4114 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4115 */
4116 static struct ureg_src
4117 emit_immediate(struct st_translate *t,
4118 gl_constant_value values[4],
4119 int type, int size)
4120 {
4121 struct ureg_program *ureg = t->ureg;
4122
4123 switch(type)
4124 {
4125 case GL_FLOAT:
4126 return ureg_DECL_immediate(ureg, &values[0].f, size);
4127 case GL_INT:
4128 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4129 case GL_UNSIGNED_INT:
4130 case GL_BOOL:
4131 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4132 default:
4133 assert(!"should not get here - type must be float, int, uint, or bool");
4134 return ureg_src_undef();
4135 }
4136 }
4137
4138 /**
4139 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4140 */
4141 static struct ureg_dst
4142 dst_register(struct st_translate *t,
4143 gl_register_file file,
4144 GLuint index)
4145 {
4146 unsigned array;
4147
4148 switch(file) {
4149 case PROGRAM_UNDEFINED:
4150 return ureg_dst_undef();
4151
4152 case PROGRAM_TEMPORARY:
4153 assert(index >= 0);
4154 assert(index < (int) Elements(t->temps));
4155
4156 if (ureg_dst_is_undef(t->temps[index]))
4157 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4158
4159 return t->temps[index];
4160
4161 case PROGRAM_ARRAY:
4162 array = index >> 16;
4163
4164 assert(array >= 0);
4165 assert(array < (int) Elements(t->arrays));
4166
4167 if (ureg_dst_is_undef(t->arrays[array]))
4168 t->arrays[array] = ureg_DECL_array_temporary(
4169 t->ureg, t->array_sizes[array], TRUE);
4170
4171 return ureg_dst_array_offset(t->arrays[array],
4172 (int)(index & 0xFFFF) - 0x8000);
4173
4174 case PROGRAM_OUTPUT:
4175 if (t->procType == TGSI_PROCESSOR_VERTEX)
4176 assert(index < VARYING_SLOT_MAX);
4177 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4178 assert(index < FRAG_RESULT_MAX);
4179 else
4180 assert(index < VARYING_SLOT_MAX);
4181
4182 assert(t->outputMapping[index] < Elements(t->outputs));
4183
4184 return t->outputs[t->outputMapping[index]];
4185
4186 case PROGRAM_ADDRESS:
4187 return t->address[index];
4188
4189 default:
4190 assert(!"unknown dst register file");
4191 return ureg_dst_undef();
4192 }
4193 }
4194
4195 /**
4196 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4197 */
4198 static struct ureg_src
4199 src_register(struct st_translate *t,
4200 gl_register_file file,
4201 GLint index, GLint index2D)
4202 {
4203 switch(file) {
4204 case PROGRAM_UNDEFINED:
4205 return ureg_src_undef();
4206
4207 case PROGRAM_TEMPORARY:
4208 case PROGRAM_ARRAY:
4209 return ureg_src(dst_register(t, file, index));
4210
4211 case PROGRAM_ENV_PARAM:
4212 case PROGRAM_LOCAL_PARAM:
4213 case PROGRAM_UNIFORM:
4214 assert(index >= 0);
4215 return t->constants[index];
4216 case PROGRAM_STATE_VAR:
4217 case PROGRAM_CONSTANT: /* ie, immediate */
4218 if (index2D) {
4219 struct ureg_src src;
4220 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4221 src.Dimension = 1;
4222 src.DimensionIndex = index2D;
4223 return src;
4224 } else if (index < 0)
4225 return ureg_DECL_constant(t->ureg, 0);
4226 else
4227 return t->constants[index];
4228
4229 case PROGRAM_IMMEDIATE:
4230 return t->immediates[index];
4231
4232 case PROGRAM_INPUT:
4233 assert(t->inputMapping[index] < Elements(t->inputs));
4234 return t->inputs[t->inputMapping[index]];
4235
4236 case PROGRAM_OUTPUT:
4237 assert(t->outputMapping[index] < Elements(t->outputs));
4238 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4239
4240 case PROGRAM_ADDRESS:
4241 return ureg_src(t->address[index]);
4242
4243 case PROGRAM_SYSTEM_VALUE:
4244 assert(index < (int) Elements(t->systemValues));
4245 return t->systemValues[index];
4246
4247 default:
4248 assert(!"unknown src register file");
4249 return ureg_src_undef();
4250 }
4251 }
4252
4253 /**
4254 * Create a TGSI ureg_dst register from an st_dst_reg.
4255 */
4256 static struct ureg_dst
4257 translate_dst(struct st_translate *t,
4258 const st_dst_reg *dst_reg,
4259 bool saturate, bool clamp_color)
4260 {
4261 struct ureg_dst dst = dst_register(t,
4262 dst_reg->file,
4263 dst_reg->index);
4264
4265 dst = ureg_writemask(dst, dst_reg->writemask);
4266
4267 if (saturate)
4268 dst = ureg_saturate(dst);
4269 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4270 /* Clamp colors for ARB_color_buffer_float. */
4271 switch (t->procType) {
4272 case TGSI_PROCESSOR_VERTEX:
4273 /* XXX if the geometry shader is present, this must be done there
4274 * instead of here. */
4275 if (dst_reg->index == VARYING_SLOT_COL0 ||
4276 dst_reg->index == VARYING_SLOT_COL1 ||
4277 dst_reg->index == VARYING_SLOT_BFC0 ||
4278 dst_reg->index == VARYING_SLOT_BFC1) {
4279 dst = ureg_saturate(dst);
4280 }
4281 break;
4282
4283 case TGSI_PROCESSOR_FRAGMENT:
4284 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4285 dst = ureg_saturate(dst);
4286 }
4287 break;
4288 }
4289 }
4290
4291 if (dst_reg->reladdr != NULL) {
4292 assert(dst_reg->file != PROGRAM_TEMPORARY);
4293 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4294 }
4295
4296 return dst;
4297 }
4298
4299 /**
4300 * Create a TGSI ureg_src register from an st_src_reg.
4301 */
4302 static struct ureg_src
4303 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4304 {
4305 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4306
4307 src = ureg_swizzle(src,
4308 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4309 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4310 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4311 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4312
4313 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4314 src = ureg_negate(src);
4315
4316 if (src_reg->reladdr != NULL) {
4317 assert(src_reg->file != PROGRAM_TEMPORARY);
4318 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4319 }
4320
4321 return src;
4322 }
4323
4324 static struct tgsi_texture_offset
4325 translate_tex_offset(struct st_translate *t,
4326 const struct tgsi_texture_offset *in_offset)
4327 {
4328 struct tgsi_texture_offset offset;
4329 struct ureg_src imm_src;
4330
4331 assert(in_offset->File == PROGRAM_IMMEDIATE);
4332 imm_src = t->immediates[in_offset->Index];
4333
4334 offset.File = imm_src.File;
4335 offset.Index = imm_src.Index;
4336 offset.SwizzleX = imm_src.SwizzleX;
4337 offset.SwizzleY = imm_src.SwizzleY;
4338 offset.SwizzleZ = imm_src.SwizzleZ;
4339 offset.File = TGSI_FILE_IMMEDIATE;
4340 offset.Padding = 0;
4341
4342 return offset;
4343 }
4344
4345 static void
4346 compile_tgsi_instruction(struct st_translate *t,
4347 const glsl_to_tgsi_instruction *inst,
4348 bool clamp_dst_color_output)
4349 {
4350 struct ureg_program *ureg = t->ureg;
4351 GLuint i;
4352 struct ureg_dst dst[1];
4353 struct ureg_src src[4];
4354 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4355
4356 unsigned num_dst;
4357 unsigned num_src;
4358 unsigned tex_target;
4359
4360 num_dst = num_inst_dst_regs(inst->op);
4361 num_src = num_inst_src_regs(inst->op);
4362
4363 if (num_dst)
4364 dst[0] = translate_dst(t,
4365 &inst->dst,
4366 inst->saturate,
4367 clamp_dst_color_output);
4368
4369 for (i = 0; i < num_src; i++)
4370 src[i] = translate_src(t, &inst->src[i]);
4371
4372 switch(inst->op) {
4373 case TGSI_OPCODE_BGNLOOP:
4374 case TGSI_OPCODE_CAL:
4375 case TGSI_OPCODE_ELSE:
4376 case TGSI_OPCODE_ENDLOOP:
4377 case TGSI_OPCODE_IF:
4378 assert(num_dst == 0);
4379 ureg_label_insn(ureg,
4380 inst->op,
4381 src, num_src,
4382 get_label(t,
4383 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4384 return;
4385
4386 case TGSI_OPCODE_TEX:
4387 case TGSI_OPCODE_TXB:
4388 case TGSI_OPCODE_TXD:
4389 case TGSI_OPCODE_TXL:
4390 case TGSI_OPCODE_TXP:
4391 case TGSI_OPCODE_TXQ:
4392 case TGSI_OPCODE_TXF:
4393 case TGSI_OPCODE_TEX2:
4394 case TGSI_OPCODE_TXB2:
4395 case TGSI_OPCODE_TXL2:
4396 src[num_src++] = t->samplers[inst->sampler];
4397 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4398 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4399 }
4400 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4401
4402 ureg_tex_insn(ureg,
4403 inst->op,
4404 dst, num_dst,
4405 tex_target,
4406 texoffsets, inst->tex_offset_num_offset,
4407 src, num_src);
4408 return;
4409
4410 case TGSI_OPCODE_SCS:
4411 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4412 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4413 break;
4414
4415 default:
4416 ureg_insn(ureg,
4417 inst->op,
4418 dst, num_dst,
4419 src, num_src);
4420 break;
4421 }
4422 }
4423
4424 /**
4425 * Emit the TGSI instructions for inverting and adjusting WPOS.
4426 * This code is unavoidable because it also depends on whether
4427 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4428 */
4429 static void
4430 emit_wpos_adjustment( struct st_translate *t,
4431 const struct gl_program *program,
4432 boolean invert,
4433 GLfloat adjX, GLfloat adjY[2])
4434 {
4435 struct ureg_program *ureg = t->ureg;
4436
4437 /* Fragment program uses fragment position input.
4438 * Need to replace instances of INPUT[WPOS] with temp T
4439 * where T = INPUT[WPOS] by y is inverted.
4440 */
4441 static const gl_state_index wposTransformState[STATE_LENGTH]
4442 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4443 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4444
4445 /* XXX: note we are modifying the incoming shader here! Need to
4446 * do this before emitting the constant decls below, or this
4447 * will be missed:
4448 */
4449 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4450 wposTransformState);
4451
4452 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4453 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4454 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4455
4456 /* First, apply the coordinate shift: */
4457 if (adjX || adjY[0] || adjY[1]) {
4458 if (adjY[0] != adjY[1]) {
4459 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4460 * depending on whether inversion is actually going to be applied
4461 * or not, which is determined by testing against the inversion
4462 * state variable used below, which will be either +1 or -1.
4463 */
4464 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4465
4466 ureg_CMP(ureg, adj_temp,
4467 ureg_scalar(wpostrans, invert ? 2 : 0),
4468 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4469 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4470 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4471 } else {
4472 ureg_ADD(ureg, wpos_temp, wpos_input,
4473 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4474 }
4475 wpos_input = ureg_src(wpos_temp);
4476 } else {
4477 /* MOV wpos_temp, input[wpos]
4478 */
4479 ureg_MOV( ureg, wpos_temp, wpos_input );
4480 }
4481
4482 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4483 * inversion/identity, or the other way around if we're drawing to an FBO.
4484 */
4485 if (invert) {
4486 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4487 */
4488 ureg_MAD( ureg,
4489 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4490 wpos_input,
4491 ureg_scalar(wpostrans, 0),
4492 ureg_scalar(wpostrans, 1));
4493 } else {
4494 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4495 */
4496 ureg_MAD( ureg,
4497 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4498 wpos_input,
4499 ureg_scalar(wpostrans, 2),
4500 ureg_scalar(wpostrans, 3));
4501 }
4502
4503 /* Use wpos_temp as position input from here on:
4504 */
4505 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4506 }
4507
4508
4509 /**
4510 * Emit fragment position/ooordinate code.
4511 */
4512 static void
4513 emit_wpos(struct st_context *st,
4514 struct st_translate *t,
4515 const struct gl_program *program,
4516 struct ureg_program *ureg)
4517 {
4518 const struct gl_fragment_program *fp =
4519 (const struct gl_fragment_program *) program;
4520 struct pipe_screen *pscreen = st->pipe->screen;
4521 GLfloat adjX = 0.0f;
4522 GLfloat adjY[2] = { 0.0f, 0.0f };
4523 boolean invert = FALSE;
4524
4525 /* Query the pixel center conventions supported by the pipe driver and set
4526 * adjX, adjY to help out if it cannot handle the requested one internally.
4527 *
4528 * The bias of the y-coordinate depends on whether y-inversion takes place
4529 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4530 * drawing to an FBO (causes additional inversion), and whether the the pipe
4531 * driver origin and the requested origin differ (the latter condition is
4532 * stored in the 'invert' variable).
4533 *
4534 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4535 *
4536 * center shift only:
4537 * i -> h: +0.5
4538 * h -> i: -0.5
4539 *
4540 * inversion only:
4541 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4542 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4543 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4544 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4545 *
4546 * inversion and center shift:
4547 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4548 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4549 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4550 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4551 */
4552 if (fp->OriginUpperLeft) {
4553 /* Fragment shader wants origin in upper-left */
4554 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4555 /* the driver supports upper-left origin */
4556 }
4557 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4558 /* the driver supports lower-left origin, need to invert Y */
4559 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4560 invert = TRUE;
4561 }
4562 else
4563 assert(0);
4564 }
4565 else {
4566 /* Fragment shader wants origin in lower-left */
4567 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4568 /* the driver supports lower-left origin */
4569 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4570 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4571 /* the driver supports upper-left origin, need to invert Y */
4572 invert = TRUE;
4573 else
4574 assert(0);
4575 }
4576
4577 if (fp->PixelCenterInteger) {
4578 /* Fragment shader wants pixel center integer */
4579 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4580 /* the driver supports pixel center integer */
4581 adjY[1] = 1.0f;
4582 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4583 }
4584 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4585 /* the driver supports pixel center half integer, need to bias X,Y */
4586 adjX = -0.5f;
4587 adjY[0] = -0.5f;
4588 adjY[1] = 0.5f;
4589 }
4590 else
4591 assert(0);
4592 }
4593 else {
4594 /* Fragment shader wants pixel center half integer */
4595 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4596 /* the driver supports pixel center half integer */
4597 }
4598 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4599 /* the driver supports pixel center integer, need to bias X,Y */
4600 adjX = adjY[0] = adjY[1] = 0.5f;
4601 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4602 }
4603 else
4604 assert(0);
4605 }
4606
4607 /* we invert after adjustment so that we avoid the MOV to temporary,
4608 * and reuse the adjustment ADD instead */
4609 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4610 }
4611
4612 /**
4613 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4614 * TGSI uses +1 for front, -1 for back.
4615 * This function converts the TGSI value to the GL value. Simply clamping/
4616 * saturating the value to [0,1] does the job.
4617 */
4618 static void
4619 emit_face_var(struct st_translate *t)
4620 {
4621 struct ureg_program *ureg = t->ureg;
4622 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4623 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4624
4625 /* MOV_SAT face_temp, input[face] */
4626 face_temp = ureg_saturate(face_temp);
4627 ureg_MOV(ureg, face_temp, face_input);
4628
4629 /* Use face_temp as face input from here on: */
4630 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4631 }
4632
4633 static void
4634 emit_edgeflags(struct st_translate *t)
4635 {
4636 struct ureg_program *ureg = t->ureg;
4637 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4638 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4639
4640 ureg_MOV(ureg, edge_dst, edge_src);
4641 }
4642
4643 /**
4644 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4645 * \param program the program to translate
4646 * \param numInputs number of input registers used
4647 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4648 * input indexes
4649 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4650 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4651 * each input
4652 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4653 * \param numOutputs number of output registers used
4654 * \param outputMapping maps Mesa fragment program outputs to TGSI
4655 * generic outputs
4656 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4657 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4658 * each output
4659 *
4660 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4661 */
4662 extern "C" enum pipe_error
4663 st_translate_program(
4664 struct gl_context *ctx,
4665 uint procType,
4666 struct ureg_program *ureg,
4667 glsl_to_tgsi_visitor *program,
4668 const struct gl_program *proginfo,
4669 GLuint numInputs,
4670 const GLuint inputMapping[],
4671 const ubyte inputSemanticName[],
4672 const ubyte inputSemanticIndex[],
4673 const GLuint interpMode[],
4674 const GLboolean is_centroid[],
4675 GLuint numOutputs,
4676 const GLuint outputMapping[],
4677 const ubyte outputSemanticName[],
4678 const ubyte outputSemanticIndex[],
4679 boolean passthrough_edgeflags,
4680 boolean clamp_color)
4681 {
4682 struct st_translate *t;
4683 unsigned i;
4684 enum pipe_error ret = PIPE_OK;
4685
4686 assert(numInputs <= Elements(t->inputs));
4687 assert(numOutputs <= Elements(t->outputs));
4688
4689 t = CALLOC_STRUCT(st_translate);
4690 if (!t) {
4691 ret = PIPE_ERROR_OUT_OF_MEMORY;
4692 goto out;
4693 }
4694
4695 memset(t, 0, sizeof *t);
4696
4697 t->procType = procType;
4698 t->inputMapping = inputMapping;
4699 t->outputMapping = outputMapping;
4700 t->ureg = ureg;
4701
4702 if (program->shader_program) {
4703 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4704 struct gl_uniform_storage *const storage =
4705 &program->shader_program->UniformStorage[i];
4706
4707 _mesa_uniform_detach_all_driver_storage(storage);
4708 }
4709 }
4710
4711 /*
4712 * Declare input attributes.
4713 */
4714 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4715 for (i = 0; i < numInputs; i++) {
4716 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4717 inputSemanticName[i],
4718 inputSemanticIndex[i],
4719 interpMode[i], 0,
4720 is_centroid[i]);
4721 }
4722
4723 if (proginfo->InputsRead & VARYING_BIT_POS) {
4724 /* Must do this after setting up t->inputs, and before
4725 * emitting constant references, below:
4726 */
4727 emit_wpos(st_context(ctx), t, proginfo, ureg);
4728 }
4729
4730 if (proginfo->InputsRead & VARYING_BIT_FACE)
4731 emit_face_var(t);
4732
4733 /*
4734 * Declare output attributes.
4735 */
4736 for (i = 0; i < numOutputs; i++) {
4737 switch (outputSemanticName[i]) {
4738 case TGSI_SEMANTIC_POSITION:
4739 t->outputs[i] = ureg_DECL_output(ureg,
4740 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4741 outputSemanticIndex[i]);
4742 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4743 break;
4744 case TGSI_SEMANTIC_STENCIL:
4745 t->outputs[i] = ureg_DECL_output(ureg,
4746 TGSI_SEMANTIC_STENCIL, /* Stencil */
4747 outputSemanticIndex[i]);
4748 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4749 break;
4750 case TGSI_SEMANTIC_COLOR:
4751 t->outputs[i] = ureg_DECL_output(ureg,
4752 TGSI_SEMANTIC_COLOR,
4753 outputSemanticIndex[i]);
4754 break;
4755 default:
4756 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4757 ret = PIPE_ERROR_BAD_INPUT;
4758 goto out;
4759 }
4760 }
4761 }
4762 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4763 for (i = 0; i < numInputs; i++) {
4764 t->inputs[i] = ureg_DECL_gs_input(ureg,
4765 i,
4766 inputSemanticName[i],
4767 inputSemanticIndex[i]);
4768 }
4769
4770 for (i = 0; i < numOutputs; i++) {
4771 t->outputs[i] = ureg_DECL_output(ureg,
4772 outputSemanticName[i],
4773 outputSemanticIndex[i]);
4774 }
4775 }
4776 else {
4777 assert(procType == TGSI_PROCESSOR_VERTEX);
4778
4779 for (i = 0; i < numInputs; i++) {
4780 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4781 }
4782
4783 for (i = 0; i < numOutputs; i++) {
4784 t->outputs[i] = ureg_DECL_output(ureg,
4785 outputSemanticName[i],
4786 outputSemanticIndex[i]);
4787 }
4788 if (passthrough_edgeflags)
4789 emit_edgeflags(t);
4790 }
4791
4792 /* Declare address register.
4793 */
4794 if (program->num_address_regs > 0) {
4795 assert(program->num_address_regs == 1);
4796 t->address[0] = ureg_DECL_address(ureg);
4797 }
4798
4799 /* Declare misc input registers
4800 */
4801 {
4802 GLbitfield sysInputs = proginfo->SystemValuesRead;
4803 unsigned numSys = 0;
4804 for (i = 0; sysInputs; i++) {
4805 if (sysInputs & (1 << i)) {
4806 unsigned semName = mesa_sysval_to_semantic[i];
4807 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4808 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4809 semName == TGSI_SEMANTIC_VERTEXID) {
4810 /* From Gallium perspective, these system values are always
4811 * integer, and require native integer support. However, if
4812 * native integer is supported on the vertex stage but not the
4813 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4814 * assumes these system values are floats. To resolve the
4815 * inconsistency, we insert a U2F.
4816 */
4817 struct st_context *st = st_context(ctx);
4818 struct pipe_screen *pscreen = st->pipe->screen;
4819 assert(procType == TGSI_PROCESSOR_VERTEX);
4820 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4821 if (!ctx->Const.NativeIntegers) {
4822 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4823 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4824 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4825 }
4826 }
4827 numSys++;
4828 sysInputs &= ~(1 << i);
4829 }
4830 }
4831 }
4832
4833 /* Copy over array sizes
4834 */
4835 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4836
4837 /* Emit constants and uniforms. TGSI uses a single index space for these,
4838 * so we put all the translated regs in t->constants.
4839 */
4840 if (proginfo->Parameters) {
4841 t->constants = (struct ureg_src *)
4842 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4843 if (t->constants == NULL) {
4844 ret = PIPE_ERROR_OUT_OF_MEMORY;
4845 goto out;
4846 }
4847
4848 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4849 switch (proginfo->Parameters->Parameters[i].Type) {
4850 case PROGRAM_ENV_PARAM:
4851 case PROGRAM_LOCAL_PARAM:
4852 case PROGRAM_STATE_VAR:
4853 case PROGRAM_UNIFORM:
4854 t->constants[i] = ureg_DECL_constant(ureg, i);
4855 break;
4856
4857 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4858 * addressing of the const buffer.
4859 * FIXME: Be smarter and recognize param arrays:
4860 * indirect addressing is only valid within the referenced
4861 * array.
4862 */
4863 case PROGRAM_CONSTANT:
4864 if (program->indirect_addr_consts)
4865 t->constants[i] = ureg_DECL_constant(ureg, i);
4866 else
4867 t->constants[i] = emit_immediate(t,
4868 proginfo->Parameters->ParameterValues[i],
4869 proginfo->Parameters->Parameters[i].DataType,
4870 4);
4871 break;
4872 default:
4873 break;
4874 }
4875 }
4876 }
4877
4878 if (program->shader_program) {
4879 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4880
4881 for (i = 0; i < num_ubos; i++) {
4882 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4883 }
4884 }
4885
4886 /* Emit immediate values.
4887 */
4888 t->immediates = (struct ureg_src *)
4889 calloc(program->num_immediates, sizeof(struct ureg_src));
4890 if (t->immediates == NULL) {
4891 ret = PIPE_ERROR_OUT_OF_MEMORY;
4892 goto out;
4893 }
4894 i = 0;
4895 foreach_iter(exec_list_iterator, iter, program->immediates) {
4896 immediate_storage *imm = (immediate_storage *)iter.get();
4897 assert(i < program->num_immediates);
4898 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4899 }
4900 assert(i == program->num_immediates);
4901
4902 /* texture samplers */
4903 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4904 if (program->samplers_used & (1 << i)) {
4905 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4906 }
4907 }
4908
4909 /* Emit each instruction in turn:
4910 */
4911 foreach_iter(exec_list_iterator, iter, program->instructions) {
4912 set_insn_start(t, ureg_get_instruction_number(ureg));
4913 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4914 clamp_color);
4915 }
4916
4917 /* Fix up all emitted labels:
4918 */
4919 for (i = 0; i < t->labels_count; i++) {
4920 ureg_fixup_label(ureg, t->labels[i].token,
4921 t->insn[t->labels[i].branch_target]);
4922 }
4923
4924 if (program->shader_program) {
4925 /* This has to be done last. Any operation the can cause
4926 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4927 * program constant) has to happen before creating this linkage.
4928 */
4929 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4930 if (program->shader_program->_LinkedShaders[i] == NULL)
4931 continue;
4932
4933 _mesa_associate_uniform_storage(ctx, program->shader_program,
4934 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4935 }
4936 }
4937
4938 out:
4939 if (t) {
4940 free(t->insn);
4941 free(t->labels);
4942 free(t->constants);
4943 free(t->immediates);
4944
4945 if (t->error) {
4946 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4947 }
4948
4949 free(t);
4950 }
4951
4952 return ret;
4953 }
4954 /* ----------------------------- End TGSI code ------------------------------ */
4955
4956 /**
4957 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4958 * generating Mesa IR.
4959 */
4960 static struct gl_program *
4961 get_mesa_program(struct gl_context *ctx,
4962 struct gl_shader_program *shader_program,
4963 struct gl_shader *shader)
4964 {
4965 glsl_to_tgsi_visitor* v;
4966 struct gl_program *prog;
4967 GLenum target;
4968 const char *target_string;
4969 bool progress;
4970 struct gl_shader_compiler_options *options =
4971 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4972 struct pipe_screen *pscreen = ctx->st->pipe->screen;
4973 unsigned ptarget;
4974
4975 switch (shader->Type) {
4976 case GL_VERTEX_SHADER:
4977 target = GL_VERTEX_PROGRAM_ARB;
4978 ptarget = PIPE_SHADER_VERTEX;
4979 target_string = "vertex";
4980 break;
4981 case GL_FRAGMENT_SHADER:
4982 target = GL_FRAGMENT_PROGRAM_ARB;
4983 ptarget = PIPE_SHADER_FRAGMENT;
4984 target_string = "fragment";
4985 break;
4986 case GL_GEOMETRY_SHADER:
4987 target = GL_GEOMETRY_PROGRAM_NV;
4988 ptarget = PIPE_SHADER_GEOMETRY;
4989 target_string = "geometry";
4990 break;
4991 default:
4992 assert(!"should not be reached");
4993 return NULL;
4994 }
4995
4996 validate_ir_tree(shader->ir);
4997
4998 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4999 if (!prog)
5000 return NULL;
5001 prog->Parameters = _mesa_new_parameter_list();
5002 v = new glsl_to_tgsi_visitor();
5003 v->ctx = ctx;
5004 v->prog = prog;
5005 v->shader_program = shader_program;
5006 v->options = options;
5007 v->glsl_version = ctx->Const.GLSLVersion;
5008 v->native_integers = ctx->Const.NativeIntegers;
5009
5010 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5011 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5012
5013 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5014 prog->Parameters);
5015
5016 /* Remove reads from output registers. */
5017 lower_output_reads(shader->ir);
5018
5019 /* Emit intermediate IR for main(). */
5020 visit_exec_list(shader->ir, v);
5021
5022 /* Now emit bodies for any functions that were used. */
5023 do {
5024 progress = GL_FALSE;
5025
5026 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5027 function_entry *entry = (function_entry *)iter.get();
5028
5029 if (!entry->bgn_inst) {
5030 v->current_function = entry;
5031
5032 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5033 entry->bgn_inst->function = entry;
5034
5035 visit_exec_list(&entry->sig->body, v);
5036
5037 glsl_to_tgsi_instruction *last;
5038 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5039 if (last->op != TGSI_OPCODE_RET)
5040 v->emit(NULL, TGSI_OPCODE_RET);
5041
5042 glsl_to_tgsi_instruction *end;
5043 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5044 end->function = entry;
5045
5046 progress = GL_TRUE;
5047 }
5048 }
5049 } while (progress);
5050
5051 #if 0
5052 /* Print out some information (for debugging purposes) used by the
5053 * optimization passes. */
5054 for (i=0; i < v->next_temp; i++) {
5055 int fr = v->get_first_temp_read(i);
5056 int fw = v->get_first_temp_write(i);
5057 int lr = v->get_last_temp_read(i);
5058 int lw = v->get_last_temp_write(i);
5059
5060 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5061 assert(fw <= fr);
5062 }
5063 #endif
5064
5065 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5066 v->simplify_cmp();
5067 v->copy_propagate();
5068 while (v->eliminate_dead_code_advanced());
5069
5070 v->eliminate_dead_code();
5071 v->merge_registers();
5072 v->renumber_registers();
5073
5074 /* Write the END instruction. */
5075 v->emit(NULL, TGSI_OPCODE_END);
5076
5077 if (ctx->Shader.Flags & GLSL_DUMP) {
5078 printf("\n");
5079 printf("GLSL IR for linked %s program %d:\n", target_string,
5080 shader_program->Name);
5081 _mesa_print_ir(shader->ir, NULL);
5082 printf("\n");
5083 printf("\n");
5084 fflush(stdout);
5085 }
5086
5087 prog->Instructions = NULL;
5088 prog->NumInstructions = 0;
5089
5090 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
5091 count_resources(v, prog);
5092
5093 _mesa_reference_program(ctx, &shader->Program, prog);
5094
5095 /* This has to be done last. Any operation the can cause
5096 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5097 * program constant) has to happen before creating this linkage.
5098 */
5099 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5100 if (!shader_program->LinkStatus) {
5101 return NULL;
5102 }
5103
5104 struct st_vertex_program *stvp;
5105 struct st_fragment_program *stfp;
5106 struct st_geometry_program *stgp;
5107
5108 switch (shader->Type) {
5109 case GL_VERTEX_SHADER:
5110 stvp = (struct st_vertex_program *)prog;
5111 stvp->glsl_to_tgsi = v;
5112 break;
5113 case GL_FRAGMENT_SHADER:
5114 stfp = (struct st_fragment_program *)prog;
5115 stfp->glsl_to_tgsi = v;
5116 break;
5117 case GL_GEOMETRY_SHADER:
5118 stgp = (struct st_geometry_program *)prog;
5119 stgp->glsl_to_tgsi = v;
5120 break;
5121 default:
5122 assert(!"should not be reached");
5123 return NULL;
5124 }
5125
5126 return prog;
5127 }
5128
5129 extern "C" {
5130
5131 struct gl_shader *
5132 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5133 {
5134 struct gl_shader *shader;
5135 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5136 type == GL_GEOMETRY_SHADER_ARB);
5137 shader = rzalloc(NULL, struct gl_shader);
5138 if (shader) {
5139 shader->Type = type;
5140 shader->Name = name;
5141 _mesa_init_shader(ctx, shader);
5142 }
5143 return shader;
5144 }
5145
5146 struct gl_shader_program *
5147 st_new_shader_program(struct gl_context *ctx, GLuint name)
5148 {
5149 struct gl_shader_program *shProg;
5150 shProg = rzalloc(NULL, struct gl_shader_program);
5151 if (shProg) {
5152 shProg->Name = name;
5153 _mesa_init_shader_program(ctx, shProg);
5154 }
5155 return shProg;
5156 }
5157
5158 /**
5159 * Link a shader.
5160 * Called via ctx->Driver.LinkShader()
5161 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5162 * with code lowering and other optimizations.
5163 */
5164 GLboolean
5165 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5166 {
5167 assert(prog->LinkStatus);
5168
5169 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5170 if (prog->_LinkedShaders[i] == NULL)
5171 continue;
5172
5173 bool progress;
5174 exec_list *ir = prog->_LinkedShaders[i]->ir;
5175 const struct gl_shader_compiler_options *options =
5176 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5177
5178 /* If there are forms of indirect addressing that the driver
5179 * cannot handle, perform the lowering pass.
5180 */
5181 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5182 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5183 lower_variable_index_to_cond_assign(ir,
5184 options->EmitNoIndirectInput,
5185 options->EmitNoIndirectOutput,
5186 options->EmitNoIndirectTemp,
5187 options->EmitNoIndirectUniform);
5188 }
5189
5190 if (ctx->Extensions.ARB_shading_language_packing) {
5191 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5192 LOWER_UNPACK_SNORM_2x16 |
5193 LOWER_PACK_UNORM_2x16 |
5194 LOWER_UNPACK_UNORM_2x16 |
5195 LOWER_PACK_SNORM_4x8 |
5196 LOWER_UNPACK_SNORM_4x8 |
5197 LOWER_UNPACK_UNORM_4x8 |
5198 LOWER_PACK_UNORM_4x8 |
5199 LOWER_PACK_HALF_2x16 |
5200 LOWER_UNPACK_HALF_2x16;
5201
5202 lower_packing_builtins(ir, lower_inst);
5203 }
5204
5205 do_mat_op_to_vec(ir);
5206 lower_instructions(ir,
5207 MOD_TO_FRACT |
5208 DIV_TO_MUL_RCP |
5209 EXP_TO_EXP2 |
5210 LOG_TO_LOG2 |
5211 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5212 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5213
5214 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5215 do_vec_index_to_cond_assign(ir);
5216 lower_quadop_vector(ir, false);
5217 lower_noise(ir);
5218 if (options->MaxIfDepth == 0) {
5219 lower_discard(ir);
5220 }
5221
5222 do {
5223 progress = false;
5224
5225 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5226
5227 progress = do_common_optimization(ir, true, true,
5228 options->MaxUnrollIterations)
5229 || progress;
5230
5231 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5232
5233 } while (progress);
5234
5235 validate_ir_tree(ir);
5236 }
5237
5238 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5239 struct gl_program *linked_prog;
5240
5241 if (prog->_LinkedShaders[i] == NULL)
5242 continue;
5243
5244 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5245
5246 if (linked_prog) {
5247 static const GLenum targets[] = {
5248 GL_VERTEX_PROGRAM_ARB,
5249 GL_FRAGMENT_PROGRAM_ARB,
5250 GL_GEOMETRY_PROGRAM_NV
5251 };
5252
5253 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5254 linked_prog);
5255 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5256 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5257 NULL);
5258 _mesa_reference_program(ctx, &linked_prog, NULL);
5259 return GL_FALSE;
5260 }
5261 }
5262
5263 _mesa_reference_program(ctx, &linked_prog, NULL);
5264 }
5265
5266 return GL_TRUE;
5267 }
5268
5269 void
5270 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5271 const GLuint outputMapping[],
5272 struct pipe_stream_output_info *so)
5273 {
5274 unsigned i;
5275 struct gl_transform_feedback_info *info =
5276 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5277
5278 for (i = 0; i < info->NumOutputs; i++) {
5279 so->output[i].register_index =
5280 outputMapping[info->Outputs[i].OutputRegister];
5281 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5282 so->output[i].num_components = info->Outputs[i].NumComponents;
5283 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5284 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5285 }
5286
5287 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5288 so->stride[i] = info->BufferStride[i];
5289 }
5290 so->num_outputs = info->NumOutputs;
5291 }
5292
5293 } /* extern "C" */