st_glsl_to_tgsi: fix ubo bools.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
79
80 /**
81 * Maximum number of temporary registers.
82 *
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
85 */
86 #define MAX_TEMPS 4096
87
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
90
91 class st_src_reg;
92 class st_dst_reg;
93
94 static int swizzle_for_size(int size);
95
96 /**
97 * This struct is a corresponding struct to TGSI ureg_src.
98 */
99 class st_src_reg {
100 public:
101 st_src_reg(gl_register_file file, int index, const glsl_type *type)
102 {
103 this->file = file;
104 this->index = index;
105 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
106 this->swizzle = swizzle_for_size(type->vector_elements);
107 else
108 this->swizzle = SWIZZLE_XYZW;
109 this->negate = 0;
110 this->index2D = 0;
111 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
112 this->reladdr = NULL;
113 }
114
115 st_src_reg(gl_register_file file, int index, int type)
116 {
117 this->type = type;
118 this->file = file;
119 this->index = index;
120 this->index2D = 0;
121 this->swizzle = SWIZZLE_XYZW;
122 this->negate = 0;
123 this->reladdr = NULL;
124 }
125
126 st_src_reg(gl_register_file file, int index, int type, int index2D)
127 {
128 this->type = type;
129 this->file = file;
130 this->index = index;
131 this->index2D = index2D;
132 this->swizzle = SWIZZLE_XYZW;
133 this->negate = 0;
134 this->reladdr = NULL;
135 }
136
137 st_src_reg()
138 {
139 this->type = GLSL_TYPE_ERROR;
140 this->file = PROGRAM_UNDEFINED;
141 this->index = 0;
142 this->index2D = 0;
143 this->swizzle = 0;
144 this->negate = 0;
145 this->reladdr = NULL;
146 }
147
148 explicit st_src_reg(st_dst_reg reg);
149
150 gl_register_file file; /**< PROGRAM_* from Mesa */
151 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
152 int index2D;
153 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
154 int negate; /**< NEGATE_XYZW mask from mesa */
155 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
156 /** Register index should be offset by the integer in this reg. */
157 st_src_reg *reladdr;
158 };
159
160 class st_dst_reg {
161 public:
162 st_dst_reg(gl_register_file file, int writemask, int type)
163 {
164 this->file = file;
165 this->index = 0;
166 this->writemask = writemask;
167 this->cond_mask = COND_TR;
168 this->reladdr = NULL;
169 this->type = type;
170 }
171
172 st_dst_reg()
173 {
174 this->type = GLSL_TYPE_ERROR;
175 this->file = PROGRAM_UNDEFINED;
176 this->index = 0;
177 this->writemask = 0;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 }
181
182 explicit st_dst_reg(st_src_reg reg);
183
184 gl_register_file file; /**< PROGRAM_* from Mesa */
185 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
186 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
187 GLuint cond_mask:4;
188 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
189 /** Register index should be offset by the integer in this reg. */
190 st_src_reg *reladdr;
191 };
192
193 st_src_reg::st_src_reg(st_dst_reg reg)
194 {
195 this->type = reg.type;
196 this->file = reg.file;
197 this->index = reg.index;
198 this->swizzle = SWIZZLE_XYZW;
199 this->negate = 0;
200 this->reladdr = reg.reladdr;
201 this->index2D = 0;
202 }
203
204 st_dst_reg::st_dst_reg(st_src_reg reg)
205 {
206 this->type = reg.type;
207 this->file = reg.file;
208 this->index = reg.index;
209 this->writemask = WRITEMASK_XYZW;
210 this->cond_mask = COND_TR;
211 this->reladdr = reg.reladdr;
212 }
213
214 class glsl_to_tgsi_instruction : public exec_node {
215 public:
216 /* Callers of this ralloc-based new need not call delete. It's
217 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
218 static void* operator new(size_t size, void *ctx)
219 {
220 void *node;
221
222 node = rzalloc_size(ctx, size);
223 assert(node != NULL);
224
225 return node;
226 }
227
228 unsigned op;
229 st_dst_reg dst;
230 st_src_reg src[3];
231 /** Pointer to the ir source this tree came from for debugging */
232 ir_instruction *ir;
233 GLboolean cond_update;
234 bool saturate;
235 int sampler; /**< sampler index */
236 int tex_target; /**< One of TEXTURE_*_INDEX */
237 GLboolean tex_shadow;
238 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
239 unsigned tex_offset_num_offset;
240 int dead_mask; /**< Used in dead code elimination */
241
242 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
243 };
244
245 class variable_storage : public exec_node {
246 public:
247 variable_storage(ir_variable *var, gl_register_file file, int index)
248 : file(file), index(index), var(var)
249 {
250 /* empty */
251 }
252
253 gl_register_file file;
254 int index;
255 ir_variable *var; /* variable that maps to this, if any */
256 };
257
258 class immediate_storage : public exec_node {
259 public:
260 immediate_storage(gl_constant_value *values, int size, int type)
261 {
262 memcpy(this->values, values, size * sizeof(gl_constant_value));
263 this->size = size;
264 this->type = type;
265 }
266
267 gl_constant_value values[4];
268 int size; /**< Number of components (1-4) */
269 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
270 };
271
272 class function_entry : public exec_node {
273 public:
274 ir_function_signature *sig;
275
276 /**
277 * identifier of this function signature used by the program.
278 *
279 * At the point that TGSI instructions for function calls are
280 * generated, we don't know the address of the first instruction of
281 * the function body. So we make the BranchTarget that is called a
282 * small integer and rewrite them during set_branchtargets().
283 */
284 int sig_id;
285
286 /**
287 * Pointer to first instruction of the function body.
288 *
289 * Set during function body emits after main() is processed.
290 */
291 glsl_to_tgsi_instruction *bgn_inst;
292
293 /**
294 * Index of the first instruction of the function body in actual TGSI.
295 *
296 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
297 */
298 int inst;
299
300 /** Storage for the return value. */
301 st_src_reg return_reg;
302 };
303
304 struct glsl_to_tgsi_visitor : public ir_visitor {
305 public:
306 glsl_to_tgsi_visitor();
307 ~glsl_to_tgsi_visitor();
308
309 function_entry *current_function;
310
311 struct gl_context *ctx;
312 struct gl_program *prog;
313 struct gl_shader_program *shader_program;
314 struct gl_shader_compiler_options *options;
315
316 int next_temp;
317
318 int num_address_regs;
319 int samplers_used;
320 bool indirect_addr_temps;
321 bool indirect_addr_consts;
322
323 int glsl_version;
324 bool native_integers;
325
326 variable_storage *find_variable_storage(ir_variable *var);
327
328 int add_constant(gl_register_file file, gl_constant_value values[4],
329 int size, int datatype, GLuint *swizzle_out);
330
331 function_entry *get_function_signature(ir_function_signature *sig);
332
333 st_src_reg get_temp(const glsl_type *type);
334 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
335
336 st_src_reg st_src_reg_for_float(float val);
337 st_src_reg st_src_reg_for_int(int val);
338 st_src_reg st_src_reg_for_type(int type, int val);
339
340 /**
341 * \name Visit methods
342 *
343 * As typical for the visitor pattern, there must be one \c visit method for
344 * each concrete subclass of \c ir_instruction. Virtual base classes within
345 * the hierarchy should not have \c visit methods.
346 */
347 /*@{*/
348 virtual void visit(ir_variable *);
349 virtual void visit(ir_loop *);
350 virtual void visit(ir_loop_jump *);
351 virtual void visit(ir_function_signature *);
352 virtual void visit(ir_function *);
353 virtual void visit(ir_expression *);
354 virtual void visit(ir_swizzle *);
355 virtual void visit(ir_dereference_variable *);
356 virtual void visit(ir_dereference_array *);
357 virtual void visit(ir_dereference_record *);
358 virtual void visit(ir_assignment *);
359 virtual void visit(ir_constant *);
360 virtual void visit(ir_call *);
361 virtual void visit(ir_return *);
362 virtual void visit(ir_discard *);
363 virtual void visit(ir_texture *);
364 virtual void visit(ir_if *);
365 /*@}*/
366
367 st_src_reg result;
368
369 /** List of variable_storage */
370 exec_list variables;
371
372 /** List of immediate_storage */
373 exec_list immediates;
374 unsigned num_immediates;
375
376 /** List of function_entry */
377 exec_list function_signatures;
378 int next_signature_id;
379
380 /** List of glsl_to_tgsi_instruction */
381 exec_list instructions;
382
383 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
384
385 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
386 st_dst_reg dst, st_src_reg src0);
387
388 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
389 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
390
391 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
392 st_dst_reg dst,
393 st_src_reg src0, st_src_reg src1, st_src_reg src2);
394
395 unsigned get_opcode(ir_instruction *ir, unsigned op,
396 st_dst_reg dst,
397 st_src_reg src0, st_src_reg src1);
398
399 /**
400 * Emit the correct dot-product instruction for the type of arguments
401 */
402 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
403 st_dst_reg dst,
404 st_src_reg src0,
405 st_src_reg src1,
406 unsigned elements);
407
408 void emit_scalar(ir_instruction *ir, unsigned op,
409 st_dst_reg dst, st_src_reg src0);
410
411 void emit_scalar(ir_instruction *ir, unsigned op,
412 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
413
414 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
415
416 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
417
418 void emit_scs(ir_instruction *ir, unsigned op,
419 st_dst_reg dst, const st_src_reg &src);
420
421 bool try_emit_mad(ir_expression *ir,
422 int mul_operand);
423 bool try_emit_mad_for_and_not(ir_expression *ir,
424 int mul_operand);
425 bool try_emit_sat(ir_expression *ir);
426
427 void emit_swz(ir_expression *ir);
428
429 bool process_move_condition(ir_rvalue *ir);
430
431 void simplify_cmp(void);
432
433 void rename_temp_register(int index, int new_index);
434 int get_first_temp_read(int index);
435 int get_first_temp_write(int index);
436 int get_last_temp_read(int index);
437 int get_last_temp_write(int index);
438
439 void copy_propagate(void);
440 void eliminate_dead_code(void);
441 int eliminate_dead_code_advanced(void);
442 void merge_registers(void);
443 void renumber_registers(void);
444
445 void *mem_ctx;
446 };
447
448 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
449
450 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
451
452 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
453
454 static void
455 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
456
457 static void
458 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
459 {
460 va_list args;
461 va_start(args, fmt);
462 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
463 va_end(args);
464
465 prog->LinkStatus = GL_FALSE;
466 }
467
468 static int
469 swizzle_for_size(int size)
470 {
471 int size_swizzles[4] = {
472 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
473 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
474 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
475 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
476 };
477
478 assert((size >= 1) && (size <= 4));
479 return size_swizzles[size - 1];
480 }
481
482 static bool
483 is_tex_instruction(unsigned opcode)
484 {
485 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
486 return info->is_tex;
487 }
488
489 static unsigned
490 num_inst_dst_regs(unsigned opcode)
491 {
492 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
493 return info->num_dst;
494 }
495
496 static unsigned
497 num_inst_src_regs(unsigned opcode)
498 {
499 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
500 return info->is_tex ? info->num_src - 1 : info->num_src;
501 }
502
503 glsl_to_tgsi_instruction *
504 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
505 st_dst_reg dst,
506 st_src_reg src0, st_src_reg src1, st_src_reg src2)
507 {
508 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
509 int num_reladdr = 0, i;
510
511 op = get_opcode(ir, op, dst, src0, src1);
512
513 /* If we have to do relative addressing, we want to load the ARL
514 * reg directly for one of the regs, and preload the other reladdr
515 * sources into temps.
516 */
517 num_reladdr += dst.reladdr != NULL;
518 num_reladdr += src0.reladdr != NULL;
519 num_reladdr += src1.reladdr != NULL;
520 num_reladdr += src2.reladdr != NULL;
521
522 reladdr_to_temp(ir, &src2, &num_reladdr);
523 reladdr_to_temp(ir, &src1, &num_reladdr);
524 reladdr_to_temp(ir, &src0, &num_reladdr);
525
526 if (dst.reladdr) {
527 emit_arl(ir, address_reg, *dst.reladdr);
528 num_reladdr--;
529 }
530 assert(num_reladdr == 0);
531
532 inst->op = op;
533 inst->dst = dst;
534 inst->src[0] = src0;
535 inst->src[1] = src1;
536 inst->src[2] = src2;
537 inst->ir = ir;
538 inst->dead_mask = 0;
539
540 inst->function = NULL;
541
542 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
543 this->num_address_regs = 1;
544
545 /* Update indirect addressing status used by TGSI */
546 if (dst.reladdr) {
547 switch(dst.file) {
548 case PROGRAM_TEMPORARY:
549 this->indirect_addr_temps = true;
550 break;
551 case PROGRAM_LOCAL_PARAM:
552 case PROGRAM_ENV_PARAM:
553 case PROGRAM_STATE_VAR:
554 case PROGRAM_CONSTANT:
555 case PROGRAM_UNIFORM:
556 this->indirect_addr_consts = true;
557 break;
558 case PROGRAM_IMMEDIATE:
559 assert(!"immediates should not have indirect addressing");
560 break;
561 default:
562 break;
563 }
564 }
565 else {
566 for (i=0; i<3; i++) {
567 if(inst->src[i].reladdr) {
568 switch(inst->src[i].file) {
569 case PROGRAM_TEMPORARY:
570 this->indirect_addr_temps = true;
571 break;
572 case PROGRAM_LOCAL_PARAM:
573 case PROGRAM_ENV_PARAM:
574 case PROGRAM_STATE_VAR:
575 case PROGRAM_CONSTANT:
576 case PROGRAM_UNIFORM:
577 this->indirect_addr_consts = true;
578 break;
579 case PROGRAM_IMMEDIATE:
580 assert(!"immediates should not have indirect addressing");
581 break;
582 default:
583 break;
584 }
585 }
586 }
587 }
588
589 this->instructions.push_tail(inst);
590
591 if (native_integers)
592 try_emit_float_set(ir, op, dst);
593
594 return inst;
595 }
596
597
598 glsl_to_tgsi_instruction *
599 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
600 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
601 {
602 return emit(ir, op, dst, src0, src1, undef_src);
603 }
604
605 glsl_to_tgsi_instruction *
606 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
607 st_dst_reg dst, st_src_reg src0)
608 {
609 assert(dst.writemask != 0);
610 return emit(ir, op, dst, src0, undef_src, undef_src);
611 }
612
613 glsl_to_tgsi_instruction *
614 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
615 {
616 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
617 }
618
619 /**
620 * Emits the code to convert the result of float SET instructions to integers.
621 */
622 void
623 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
624 st_dst_reg dst)
625 {
626 if ((op == TGSI_OPCODE_SEQ ||
627 op == TGSI_OPCODE_SNE ||
628 op == TGSI_OPCODE_SGE ||
629 op == TGSI_OPCODE_SLT))
630 {
631 st_src_reg src = st_src_reg(dst);
632 src.negate = ~src.negate;
633 dst.type = GLSL_TYPE_FLOAT;
634 emit(ir, TGSI_OPCODE_F2I, dst, src);
635 }
636 }
637
638 /**
639 * Determines whether to use an integer, unsigned integer, or float opcode
640 * based on the operands and input opcode, then emits the result.
641 */
642 unsigned
643 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
644 st_dst_reg dst,
645 st_src_reg src0, st_src_reg src1)
646 {
647 int type = GLSL_TYPE_FLOAT;
648
649 assert(src0.type != GLSL_TYPE_ARRAY);
650 assert(src0.type != GLSL_TYPE_STRUCT);
651 assert(src1.type != GLSL_TYPE_ARRAY);
652 assert(src1.type != GLSL_TYPE_STRUCT);
653
654 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
655 type = GLSL_TYPE_FLOAT;
656 else if (native_integers)
657 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
658
659 #define case4(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
662 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
663 else op = TGSI_OPCODE_##f; \
664 break;
665 #define case3(f, i, u) case4(f, f, i, u)
666 #define case2fi(f, i) case4(f, f, i, i)
667 #define case2iu(i, u) case4(i, LAST, i, u)
668
669 switch(op) {
670 case2fi(ADD, UADD);
671 case2fi(MUL, UMUL);
672 case2fi(MAD, UMAD);
673 case3(DIV, IDIV, UDIV);
674 case3(MAX, IMAX, UMAX);
675 case3(MIN, IMIN, UMIN);
676 case2iu(MOD, UMOD);
677
678 case2fi(SEQ, USEQ);
679 case2fi(SNE, USNE);
680 case3(SGE, ISGE, USGE);
681 case3(SLT, ISLT, USLT);
682
683 case2iu(ISHR, USHR);
684
685 case2fi(SSG, ISSG);
686 case3(ABS, IABS, IABS);
687
688 default: break;
689 }
690
691 assert(op != TGSI_OPCODE_LAST);
692 return op;
693 }
694
695 glsl_to_tgsi_instruction *
696 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
697 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
698 unsigned elements)
699 {
700 static const unsigned dot_opcodes[] = {
701 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
702 };
703
704 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
705 }
706
707 /**
708 * Emits TGSI scalar opcodes to produce unique answers across channels.
709 *
710 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
711 * channel determines the result across all channels. So to do a vec4
712 * of this operation, we want to emit a scalar per source channel used
713 * to produce dest channels.
714 */
715 void
716 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
717 st_dst_reg dst,
718 st_src_reg orig_src0, st_src_reg orig_src1)
719 {
720 int i, j;
721 int done_mask = ~dst.writemask;
722
723 /* TGSI RCP is a scalar operation splatting results to all channels,
724 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
725 * dst channels.
726 */
727 for (i = 0; i < 4; i++) {
728 GLuint this_mask = (1 << i);
729 glsl_to_tgsi_instruction *inst;
730 st_src_reg src0 = orig_src0;
731 st_src_reg src1 = orig_src1;
732
733 if (done_mask & this_mask)
734 continue;
735
736 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
737 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
738 for (j = i + 1; j < 4; j++) {
739 /* If there is another enabled component in the destination that is
740 * derived from the same inputs, generate its value on this pass as
741 * well.
742 */
743 if (!(done_mask & (1 << j)) &&
744 GET_SWZ(src0.swizzle, j) == src0_swiz &&
745 GET_SWZ(src1.swizzle, j) == src1_swiz) {
746 this_mask |= (1 << j);
747 }
748 }
749 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
750 src0_swiz, src0_swiz);
751 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
752 src1_swiz, src1_swiz);
753
754 inst = emit(ir, op, dst, src0, src1);
755 inst->dst.writemask = this_mask;
756 done_mask |= this_mask;
757 }
758 }
759
760 void
761 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
762 st_dst_reg dst, st_src_reg src0)
763 {
764 st_src_reg undef = undef_src;
765
766 undef.swizzle = SWIZZLE_XXXX;
767
768 emit_scalar(ir, op, dst, src0, undef);
769 }
770
771 void
772 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
773 st_dst_reg dst, st_src_reg src0)
774 {
775 int op = TGSI_OPCODE_ARL;
776
777 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
778 op = TGSI_OPCODE_UARL;
779
780 emit(NULL, op, dst, src0);
781 }
782
783 /**
784 * Emit an TGSI_OPCODE_SCS instruction
785 *
786 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
787 * Instead of splatting its result across all four components of the
788 * destination, it writes one value to the \c x component and another value to
789 * the \c y component.
790 *
791 * \param ir IR instruction being processed
792 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
793 * on which value is desired.
794 * \param dst Destination register
795 * \param src Source register
796 */
797 void
798 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
799 st_dst_reg dst,
800 const st_src_reg &src)
801 {
802 /* Vertex programs cannot use the SCS opcode.
803 */
804 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
805 emit_scalar(ir, op, dst, src);
806 return;
807 }
808
809 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
810 const unsigned scs_mask = (1U << component);
811 int done_mask = ~dst.writemask;
812 st_src_reg tmp;
813
814 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
815
816 /* If there are compnents in the destination that differ from the component
817 * that will be written by the SCS instrution, we'll need a temporary.
818 */
819 if (scs_mask != unsigned(dst.writemask)) {
820 tmp = get_temp(glsl_type::vec4_type);
821 }
822
823 for (unsigned i = 0; i < 4; i++) {
824 unsigned this_mask = (1U << i);
825 st_src_reg src0 = src;
826
827 if ((done_mask & this_mask) != 0)
828 continue;
829
830 /* The source swizzle specified which component of the source generates
831 * sine / cosine for the current component in the destination. The SCS
832 * instruction requires that this value be swizzle to the X component.
833 * Replace the current swizzle with a swizzle that puts the source in
834 * the X component.
835 */
836 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
837
838 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
839 src0_swiz, src0_swiz);
840 for (unsigned j = i + 1; j < 4; j++) {
841 /* If there is another enabled component in the destination that is
842 * derived from the same inputs, generate its value on this pass as
843 * well.
844 */
845 if (!(done_mask & (1 << j)) &&
846 GET_SWZ(src0.swizzle, j) == src0_swiz) {
847 this_mask |= (1 << j);
848 }
849 }
850
851 if (this_mask != scs_mask) {
852 glsl_to_tgsi_instruction *inst;
853 st_dst_reg tmp_dst = st_dst_reg(tmp);
854
855 /* Emit the SCS instruction.
856 */
857 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
858 inst->dst.writemask = scs_mask;
859
860 /* Move the result of the SCS instruction to the desired location in
861 * the destination.
862 */
863 tmp.swizzle = MAKE_SWIZZLE4(component, component,
864 component, component);
865 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
866 inst->dst.writemask = this_mask;
867 } else {
868 /* Emit the SCS instruction to write directly to the destination.
869 */
870 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
871 inst->dst.writemask = scs_mask;
872 }
873
874 done_mask |= this_mask;
875 }
876 }
877
878 int
879 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
880 gl_constant_value values[4], int size, int datatype,
881 GLuint *swizzle_out)
882 {
883 if (file == PROGRAM_CONSTANT) {
884 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
885 size, datatype, swizzle_out);
886 } else {
887 int index = 0;
888 immediate_storage *entry;
889 assert(file == PROGRAM_IMMEDIATE);
890
891 /* Search immediate storage to see if we already have an identical
892 * immediate that we can use instead of adding a duplicate entry.
893 */
894 foreach_iter(exec_list_iterator, iter, this->immediates) {
895 entry = (immediate_storage *)iter.get();
896
897 if (entry->size == size &&
898 entry->type == datatype &&
899 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
900 return index;
901 }
902 index++;
903 }
904
905 /* Add this immediate to the list. */
906 entry = new(mem_ctx) immediate_storage(values, size, datatype);
907 this->immediates.push_tail(entry);
908 this->num_immediates++;
909 return index;
910 }
911 }
912
913 st_src_reg
914 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
915 {
916 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
917 union gl_constant_value uval;
918
919 uval.f = val;
920 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
921
922 return src;
923 }
924
925 st_src_reg
926 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
927 {
928 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
929 union gl_constant_value uval;
930
931 assert(native_integers);
932
933 uval.i = val;
934 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
935
936 return src;
937 }
938
939 st_src_reg
940 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
941 {
942 if (native_integers)
943 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
944 st_src_reg_for_int(val);
945 else
946 return st_src_reg_for_float(val);
947 }
948
949 static int
950 type_size(const struct glsl_type *type)
951 {
952 unsigned int i;
953 int size;
954
955 switch (type->base_type) {
956 case GLSL_TYPE_UINT:
957 case GLSL_TYPE_INT:
958 case GLSL_TYPE_FLOAT:
959 case GLSL_TYPE_BOOL:
960 if (type->is_matrix()) {
961 return type->matrix_columns;
962 } else {
963 /* Regardless of size of vector, it gets a vec4. This is bad
964 * packing for things like floats, but otherwise arrays become a
965 * mess. Hopefully a later pass over the code can pack scalars
966 * down if appropriate.
967 */
968 return 1;
969 }
970 case GLSL_TYPE_ARRAY:
971 assert(type->length > 0);
972 return type_size(type->fields.array) * type->length;
973 case GLSL_TYPE_STRUCT:
974 size = 0;
975 for (i = 0; i < type->length; i++) {
976 size += type_size(type->fields.structure[i].type);
977 }
978 return size;
979 case GLSL_TYPE_SAMPLER:
980 /* Samplers take up one slot in UNIFORMS[], but they're baked in
981 * at link time.
982 */
983 return 1;
984 default:
985 assert(0);
986 return 0;
987 }
988 }
989
990 /**
991 * In the initial pass of codegen, we assign temporary numbers to
992 * intermediate results. (not SSA -- variable assignments will reuse
993 * storage).
994 */
995 st_src_reg
996 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
997 {
998 st_src_reg src;
999
1000 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1001 src.file = PROGRAM_TEMPORARY;
1002 src.index = next_temp;
1003 src.reladdr = NULL;
1004 next_temp += type_size(type);
1005
1006 if (type->is_array() || type->is_record()) {
1007 src.swizzle = SWIZZLE_NOOP;
1008 } else {
1009 src.swizzle = swizzle_for_size(type->vector_elements);
1010 }
1011 src.negate = 0;
1012
1013 return src;
1014 }
1015
1016 variable_storage *
1017 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1018 {
1019
1020 variable_storage *entry;
1021
1022 foreach_iter(exec_list_iterator, iter, this->variables) {
1023 entry = (variable_storage *)iter.get();
1024
1025 if (entry->var == var)
1026 return entry;
1027 }
1028
1029 return NULL;
1030 }
1031
1032 void
1033 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1034 {
1035 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1036 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1037
1038 fp->OriginUpperLeft = ir->origin_upper_left;
1039 fp->PixelCenterInteger = ir->pixel_center_integer;
1040 }
1041
1042 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1043 unsigned int i;
1044 const ir_state_slot *const slots = ir->state_slots;
1045 assert(ir->state_slots != NULL);
1046
1047 /* Check if this statevar's setup in the STATE file exactly
1048 * matches how we'll want to reference it as a
1049 * struct/array/whatever. If not, then we need to move it into
1050 * temporary storage and hope that it'll get copy-propagated
1051 * out.
1052 */
1053 for (i = 0; i < ir->num_state_slots; i++) {
1054 if (slots[i].swizzle != SWIZZLE_XYZW) {
1055 break;
1056 }
1057 }
1058
1059 variable_storage *storage;
1060 st_dst_reg dst;
1061 if (i == ir->num_state_slots) {
1062 /* We'll set the index later. */
1063 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1064 this->variables.push_tail(storage);
1065
1066 dst = undef_dst;
1067 } else {
1068 /* The variable_storage constructor allocates slots based on the size
1069 * of the type. However, this had better match the number of state
1070 * elements that we're going to copy into the new temporary.
1071 */
1072 assert((int) ir->num_state_slots == type_size(ir->type));
1073
1074 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1075 this->next_temp);
1076 this->variables.push_tail(storage);
1077 this->next_temp += type_size(ir->type);
1078
1079 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1080 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1081 }
1082
1083
1084 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1085 int index = _mesa_add_state_reference(this->prog->Parameters,
1086 (gl_state_index *)slots[i].tokens);
1087
1088 if (storage->file == PROGRAM_STATE_VAR) {
1089 if (storage->index == -1) {
1090 storage->index = index;
1091 } else {
1092 assert(index == storage->index + (int)i);
1093 }
1094 } else {
1095 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1096 * the data being moved since MOV does not care about the type of
1097 * data it is moving, and we don't want to declare registers with
1098 * array or struct types.
1099 */
1100 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1101 src.swizzle = slots[i].swizzle;
1102 emit(ir, TGSI_OPCODE_MOV, dst, src);
1103 /* even a float takes up a whole vec4 reg in a struct/array. */
1104 dst.index++;
1105 }
1106 }
1107
1108 if (storage->file == PROGRAM_TEMPORARY &&
1109 dst.index != storage->index + (int) ir->num_state_slots) {
1110 fail_link(this->shader_program,
1111 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1112 ir->name, dst.index - storage->index,
1113 type_size(ir->type));
1114 }
1115 }
1116 }
1117
1118 void
1119 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1120 {
1121 ir_dereference_variable *counter = NULL;
1122
1123 if (ir->counter != NULL)
1124 counter = new(ir) ir_dereference_variable(ir->counter);
1125
1126 if (ir->from != NULL) {
1127 assert(ir->counter != NULL);
1128
1129 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1130
1131 a->accept(this);
1132 delete a;
1133 }
1134
1135 emit(NULL, TGSI_OPCODE_BGNLOOP);
1136
1137 if (ir->to) {
1138 ir_expression *e =
1139 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1140 counter, ir->to);
1141 ir_if *if_stmt = new(ir) ir_if(e);
1142
1143 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1144
1145 if_stmt->then_instructions.push_tail(brk);
1146
1147 if_stmt->accept(this);
1148
1149 delete if_stmt;
1150 delete e;
1151 delete brk;
1152 }
1153
1154 visit_exec_list(&ir->body_instructions, this);
1155
1156 if (ir->increment) {
1157 ir_expression *e =
1158 new(ir) ir_expression(ir_binop_add, counter->type,
1159 counter, ir->increment);
1160
1161 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1162
1163 a->accept(this);
1164 delete a;
1165 delete e;
1166 }
1167
1168 emit(NULL, TGSI_OPCODE_ENDLOOP);
1169 }
1170
1171 void
1172 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1173 {
1174 switch (ir->mode) {
1175 case ir_loop_jump::jump_break:
1176 emit(NULL, TGSI_OPCODE_BRK);
1177 break;
1178 case ir_loop_jump::jump_continue:
1179 emit(NULL, TGSI_OPCODE_CONT);
1180 break;
1181 }
1182 }
1183
1184
1185 void
1186 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1187 {
1188 assert(0);
1189 (void)ir;
1190 }
1191
1192 void
1193 glsl_to_tgsi_visitor::visit(ir_function *ir)
1194 {
1195 /* Ignore function bodies other than main() -- we shouldn't see calls to
1196 * them since they should all be inlined before we get to glsl_to_tgsi.
1197 */
1198 if (strcmp(ir->name, "main") == 0) {
1199 const ir_function_signature *sig;
1200 exec_list empty;
1201
1202 sig = ir->matching_signature(&empty);
1203
1204 assert(sig);
1205
1206 foreach_iter(exec_list_iterator, iter, sig->body) {
1207 ir_instruction *ir = (ir_instruction *)iter.get();
1208
1209 ir->accept(this);
1210 }
1211 }
1212 }
1213
1214 bool
1215 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1216 {
1217 int nonmul_operand = 1 - mul_operand;
1218 st_src_reg a, b, c;
1219 st_dst_reg result_dst;
1220
1221 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1222 if (!expr || expr->operation != ir_binop_mul)
1223 return false;
1224
1225 expr->operands[0]->accept(this);
1226 a = this->result;
1227 expr->operands[1]->accept(this);
1228 b = this->result;
1229 ir->operands[nonmul_operand]->accept(this);
1230 c = this->result;
1231
1232 this->result = get_temp(ir->type);
1233 result_dst = st_dst_reg(this->result);
1234 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1235 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1236
1237 return true;
1238 }
1239
1240 /**
1241 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1242 *
1243 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1244 * implemented using multiplication, and logical-or is implemented using
1245 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1246 * As result, the logical expression (a & !b) can be rewritten as:
1247 *
1248 * - a * !b
1249 * - a * (1 - b)
1250 * - (a * 1) - (a * b)
1251 * - a + -(a * b)
1252 * - a + (a * -b)
1253 *
1254 * This final expression can be implemented as a single MAD(a, -b, a)
1255 * instruction.
1256 */
1257 bool
1258 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1259 {
1260 const int other_operand = 1 - try_operand;
1261 st_src_reg a, b;
1262
1263 ir_expression *expr = ir->operands[try_operand]->as_expression();
1264 if (!expr || expr->operation != ir_unop_logic_not)
1265 return false;
1266
1267 ir->operands[other_operand]->accept(this);
1268 a = this->result;
1269 expr->operands[0]->accept(this);
1270 b = this->result;
1271
1272 b.negate = ~b.negate;
1273
1274 this->result = get_temp(ir->type);
1275 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1276
1277 return true;
1278 }
1279
1280 bool
1281 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1282 {
1283 /* Saturates were only introduced to vertex programs in
1284 * NV_vertex_program3, so don't give them to drivers in the VP.
1285 */
1286 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1287 return false;
1288
1289 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1290 if (!sat_src)
1291 return false;
1292
1293 sat_src->accept(this);
1294 st_src_reg src = this->result;
1295
1296 /* If we generated an expression instruction into a temporary in
1297 * processing the saturate's operand, apply the saturate to that
1298 * instruction. Otherwise, generate a MOV to do the saturate.
1299 *
1300 * Note that we have to be careful to only do this optimization if
1301 * the instruction in question was what generated src->result. For
1302 * example, ir_dereference_array might generate a MUL instruction
1303 * to create the reladdr, and return us a src reg using that
1304 * reladdr. That MUL result is not the value we're trying to
1305 * saturate.
1306 */
1307 ir_expression *sat_src_expr = sat_src->as_expression();
1308 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1309 sat_src_expr->operation == ir_binop_add ||
1310 sat_src_expr->operation == ir_binop_dot)) {
1311 glsl_to_tgsi_instruction *new_inst;
1312 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1313 new_inst->saturate = true;
1314 } else {
1315 this->result = get_temp(ir->type);
1316 st_dst_reg result_dst = st_dst_reg(this->result);
1317 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1318 glsl_to_tgsi_instruction *inst;
1319 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1320 inst->saturate = true;
1321 }
1322
1323 return true;
1324 }
1325
1326 void
1327 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1328 st_src_reg *reg, int *num_reladdr)
1329 {
1330 if (!reg->reladdr)
1331 return;
1332
1333 emit_arl(ir, address_reg, *reg->reladdr);
1334
1335 if (*num_reladdr != 1) {
1336 st_src_reg temp = get_temp(glsl_type::vec4_type);
1337
1338 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1339 *reg = temp;
1340 }
1341
1342 (*num_reladdr)--;
1343 }
1344
1345 void
1346 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1347 {
1348 unsigned int operand;
1349 st_src_reg op[Elements(ir->operands)];
1350 st_src_reg result_src;
1351 st_dst_reg result_dst;
1352
1353 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1354 */
1355 if (ir->operation == ir_binop_add) {
1356 if (try_emit_mad(ir, 1))
1357 return;
1358 if (try_emit_mad(ir, 0))
1359 return;
1360 }
1361
1362 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1363 */
1364 if (ir->operation == ir_binop_logic_and) {
1365 if (try_emit_mad_for_and_not(ir, 1))
1366 return;
1367 if (try_emit_mad_for_and_not(ir, 0))
1368 return;
1369 }
1370
1371 if (try_emit_sat(ir))
1372 return;
1373
1374 if (ir->operation == ir_quadop_vector)
1375 assert(!"ir_quadop_vector should have been lowered");
1376
1377 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1378 this->result.file = PROGRAM_UNDEFINED;
1379 ir->operands[operand]->accept(this);
1380 if (this->result.file == PROGRAM_UNDEFINED) {
1381 ir_print_visitor v;
1382 printf("Failed to get tree for expression operand:\n");
1383 ir->operands[operand]->accept(&v);
1384 exit(1);
1385 }
1386 op[operand] = this->result;
1387
1388 /* Matrix expression operands should have been broken down to vector
1389 * operations already.
1390 */
1391 assert(!ir->operands[operand]->type->is_matrix());
1392 }
1393
1394 int vector_elements = ir->operands[0]->type->vector_elements;
1395 if (ir->operands[1]) {
1396 vector_elements = MAX2(vector_elements,
1397 ir->operands[1]->type->vector_elements);
1398 }
1399
1400 this->result.file = PROGRAM_UNDEFINED;
1401
1402 /* Storage for our result. Ideally for an assignment we'd be using
1403 * the actual storage for the result here, instead.
1404 */
1405 result_src = get_temp(ir->type);
1406 /* convenience for the emit functions below. */
1407 result_dst = st_dst_reg(result_src);
1408 /* Limit writes to the channels that will be used by result_src later.
1409 * This does limit this temp's use as a temporary for multi-instruction
1410 * sequences.
1411 */
1412 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1413
1414 switch (ir->operation) {
1415 case ir_unop_logic_not:
1416 if (result_dst.type != GLSL_TYPE_FLOAT)
1417 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1418 else {
1419 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1420 * older GPUs implement SEQ using multiple instructions (i915 uses two
1421 * SGE instructions and a MUL instruction). Since our logic values are
1422 * 0.0 and 1.0, 1-x also implements !x.
1423 */
1424 op[0].negate = ~op[0].negate;
1425 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1426 }
1427 break;
1428 case ir_unop_neg:
1429 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1430 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1431 else {
1432 op[0].negate = ~op[0].negate;
1433 result_src = op[0];
1434 }
1435 break;
1436 case ir_unop_abs:
1437 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1438 break;
1439 case ir_unop_sign:
1440 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1441 break;
1442 case ir_unop_rcp:
1443 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1444 break;
1445
1446 case ir_unop_exp2:
1447 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1448 break;
1449 case ir_unop_exp:
1450 case ir_unop_log:
1451 assert(!"not reached: should be handled by ir_explog_to_explog2");
1452 break;
1453 case ir_unop_log2:
1454 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1455 break;
1456 case ir_unop_sin:
1457 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1458 break;
1459 case ir_unop_cos:
1460 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1461 break;
1462 case ir_unop_sin_reduced:
1463 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1464 break;
1465 case ir_unop_cos_reduced:
1466 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1467 break;
1468
1469 case ir_unop_dFdx:
1470 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1471 break;
1472 case ir_unop_dFdy:
1473 {
1474 /* The X component contains 1 or -1 depending on whether the framebuffer
1475 * is a FBO or the window system buffer, respectively.
1476 * It is then multiplied with the source operand of DDY.
1477 */
1478 static const gl_state_index transform_y_state[STATE_LENGTH]
1479 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1480
1481 unsigned transform_y_index =
1482 _mesa_add_state_reference(this->prog->Parameters,
1483 transform_y_state);
1484
1485 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1486 transform_y_index,
1487 glsl_type::vec4_type);
1488 transform_y.swizzle = SWIZZLE_XXXX;
1489
1490 st_src_reg temp = get_temp(glsl_type::vec4_type);
1491
1492 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1493 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1494 break;
1495 }
1496
1497 case ir_unop_noise: {
1498 /* At some point, a motivated person could add a better
1499 * implementation of noise. Currently not even the nvidia
1500 * binary drivers do anything more than this. In any case, the
1501 * place to do this is in the GL state tracker, not the poor
1502 * driver.
1503 */
1504 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1505 break;
1506 }
1507
1508 case ir_binop_add:
1509 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1510 break;
1511 case ir_binop_sub:
1512 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1513 break;
1514
1515 case ir_binop_mul:
1516 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1517 break;
1518 case ir_binop_div:
1519 if (result_dst.type == GLSL_TYPE_FLOAT)
1520 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1521 else
1522 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1523 break;
1524 case ir_binop_mod:
1525 if (result_dst.type == GLSL_TYPE_FLOAT)
1526 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1527 else
1528 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1529 break;
1530
1531 case ir_binop_less:
1532 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1533 break;
1534 case ir_binop_greater:
1535 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1536 break;
1537 case ir_binop_lequal:
1538 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1539 break;
1540 case ir_binop_gequal:
1541 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1542 break;
1543 case ir_binop_equal:
1544 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1545 break;
1546 case ir_binop_nequal:
1547 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1548 break;
1549 case ir_binop_all_equal:
1550 /* "==" operator producing a scalar boolean. */
1551 if (ir->operands[0]->type->is_vector() ||
1552 ir->operands[1]->type->is_vector()) {
1553 st_src_reg temp = get_temp(native_integers ?
1554 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1555 glsl_type::vec4_type);
1556
1557 if (native_integers) {
1558 st_dst_reg temp_dst = st_dst_reg(temp);
1559 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1560
1561 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1562
1563 /* Emit 1-3 AND operations to combine the SEQ results. */
1564 switch (ir->operands[0]->type->vector_elements) {
1565 case 2:
1566 break;
1567 case 3:
1568 temp_dst.writemask = WRITEMASK_Y;
1569 temp1.swizzle = SWIZZLE_YYYY;
1570 temp2.swizzle = SWIZZLE_ZZZZ;
1571 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1572 break;
1573 case 4:
1574 temp_dst.writemask = WRITEMASK_X;
1575 temp1.swizzle = SWIZZLE_XXXX;
1576 temp2.swizzle = SWIZZLE_YYYY;
1577 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1578 temp_dst.writemask = WRITEMASK_Y;
1579 temp1.swizzle = SWIZZLE_ZZZZ;
1580 temp2.swizzle = SWIZZLE_WWWW;
1581 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1582 }
1583
1584 temp1.swizzle = SWIZZLE_XXXX;
1585 temp2.swizzle = SWIZZLE_YYYY;
1586 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1587 } else {
1588 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1589
1590 /* After the dot-product, the value will be an integer on the
1591 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1592 */
1593 emit_dp(ir, result_dst, temp, temp, vector_elements);
1594
1595 /* Negating the result of the dot-product gives values on the range
1596 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1597 * This is achieved using SGE.
1598 */
1599 st_src_reg sge_src = result_src;
1600 sge_src.negate = ~sge_src.negate;
1601 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1602 }
1603 } else {
1604 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1605 }
1606 break;
1607 case ir_binop_any_nequal:
1608 /* "!=" operator producing a scalar boolean. */
1609 if (ir->operands[0]->type->is_vector() ||
1610 ir->operands[1]->type->is_vector()) {
1611 st_src_reg temp = get_temp(native_integers ?
1612 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1613 glsl_type::vec4_type);
1614 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1615
1616 if (native_integers) {
1617 st_dst_reg temp_dst = st_dst_reg(temp);
1618 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1619
1620 /* Emit 1-3 OR operations to combine the SNE results. */
1621 switch (ir->operands[0]->type->vector_elements) {
1622 case 2:
1623 break;
1624 case 3:
1625 temp_dst.writemask = WRITEMASK_Y;
1626 temp1.swizzle = SWIZZLE_YYYY;
1627 temp2.swizzle = SWIZZLE_ZZZZ;
1628 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1629 break;
1630 case 4:
1631 temp_dst.writemask = WRITEMASK_X;
1632 temp1.swizzle = SWIZZLE_XXXX;
1633 temp2.swizzle = SWIZZLE_YYYY;
1634 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1635 temp_dst.writemask = WRITEMASK_Y;
1636 temp1.swizzle = SWIZZLE_ZZZZ;
1637 temp2.swizzle = SWIZZLE_WWWW;
1638 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1639 }
1640
1641 temp1.swizzle = SWIZZLE_XXXX;
1642 temp2.swizzle = SWIZZLE_YYYY;
1643 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1644 } else {
1645 /* After the dot-product, the value will be an integer on the
1646 * range [0,4]. Zero stays zero, and positive values become 1.0.
1647 */
1648 glsl_to_tgsi_instruction *const dp =
1649 emit_dp(ir, result_dst, temp, temp, vector_elements);
1650 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1651 /* The clamping to [0,1] can be done for free in the fragment
1652 * shader with a saturate.
1653 */
1654 dp->saturate = true;
1655 } else {
1656 /* Negating the result of the dot-product gives values on the range
1657 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1658 * achieved using SLT.
1659 */
1660 st_src_reg slt_src = result_src;
1661 slt_src.negate = ~slt_src.negate;
1662 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1663 }
1664 }
1665 } else {
1666 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1667 }
1668 break;
1669
1670 case ir_unop_any: {
1671 assert(ir->operands[0]->type->is_vector());
1672
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1675 */
1676 glsl_to_tgsi_instruction *const dp =
1677 emit_dp(ir, result_dst, op[0], op[0],
1678 ir->operands[0]->type->vector_elements);
1679 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1680 result_dst.type == GLSL_TYPE_FLOAT) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1683 */
1684 dp->saturate = true;
1685 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1689 */
1690 st_src_reg slt_src = result_src;
1691 slt_src.negate = ~slt_src.negate;
1692 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1693 }
1694 else {
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1697 }
1698 break;
1699 }
1700
1701 case ir_binop_logic_xor:
1702 if (native_integers)
1703 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1704 else
1705 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1706 break;
1707
1708 case ir_binop_logic_or: {
1709 if (native_integers) {
1710 /* If integers are used as booleans, we can use an actual "or"
1711 * instruction.
1712 */
1713 assert(native_integers);
1714 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1715 } else {
1716 /* After the addition, the value will be an integer on the
1717 * range [0,2]. Zero stays zero, and positive values become 1.0.
1718 */
1719 glsl_to_tgsi_instruction *add =
1720 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1721 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1722 /* The clamping to [0,1] can be done for free in the fragment
1723 * shader with a saturate if floats are being used as boolean values.
1724 */
1725 add->saturate = true;
1726 } else {
1727 /* Negating the result of the addition gives values on the range
1728 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1729 * is achieved using SLT.
1730 */
1731 st_src_reg slt_src = result_src;
1732 slt_src.negate = ~slt_src.negate;
1733 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1734 }
1735 }
1736 break;
1737 }
1738
1739 case ir_binop_logic_and:
1740 /* If native integers are disabled, the bool args are stored as float 0.0
1741 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1742 * actual AND opcode.
1743 */
1744 if (native_integers)
1745 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1746 else
1747 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1748 break;
1749
1750 case ir_binop_dot:
1751 assert(ir->operands[0]->type->is_vector());
1752 assert(ir->operands[0]->type == ir->operands[1]->type);
1753 emit_dp(ir, result_dst, op[0], op[1],
1754 ir->operands[0]->type->vector_elements);
1755 break;
1756
1757 case ir_unop_sqrt:
1758 /* sqrt(x) = x * rsq(x). */
1759 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1760 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1761 /* For incoming channels <= 0, set the result to 0. */
1762 op[0].negate = ~op[0].negate;
1763 emit(ir, TGSI_OPCODE_CMP, result_dst,
1764 op[0], result_src, st_src_reg_for_float(0.0));
1765 break;
1766 case ir_unop_rsq:
1767 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1768 break;
1769 case ir_unop_i2f:
1770 if (native_integers) {
1771 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1772 break;
1773 }
1774 /* fallthrough to next case otherwise */
1775 case ir_unop_b2f:
1776 if (native_integers) {
1777 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1778 break;
1779 }
1780 /* fallthrough to next case otherwise */
1781 case ir_unop_i2u:
1782 case ir_unop_u2i:
1783 /* Converting between signed and unsigned integers is a no-op. */
1784 result_src = op[0];
1785 break;
1786 case ir_unop_b2i:
1787 if (native_integers) {
1788 /* Booleans are stored as integers using ~0 for true and 0 for false.
1789 * GLSL requires that int(bool) return 1 for true and 0 for false.
1790 * This conversion is done with AND, but it could be done with NEG.
1791 */
1792 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1793 } else {
1794 /* Booleans and integers are both stored as floats when native
1795 * integers are disabled.
1796 */
1797 result_src = op[0];
1798 }
1799 break;
1800 case ir_unop_f2i:
1801 if (native_integers)
1802 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1803 else
1804 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1805 break;
1806 case ir_unop_f2u:
1807 if (native_integers)
1808 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1809 else
1810 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1811 break;
1812 case ir_unop_bitcast_f2i:
1813 case ir_unop_bitcast_f2u:
1814 case ir_unop_bitcast_i2f:
1815 case ir_unop_bitcast_u2f:
1816 result_src = op[0];
1817 break;
1818 case ir_unop_f2b:
1819 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1820 break;
1821 case ir_unop_i2b:
1822 if (native_integers)
1823 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1824 else
1825 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1826 break;
1827 case ir_unop_trunc:
1828 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1829 break;
1830 case ir_unop_ceil:
1831 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1832 break;
1833 case ir_unop_floor:
1834 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1835 break;
1836 case ir_unop_round_even:
1837 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1838 break;
1839 case ir_unop_fract:
1840 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1841 break;
1842
1843 case ir_binop_min:
1844 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1845 break;
1846 case ir_binop_max:
1847 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1848 break;
1849 case ir_binop_pow:
1850 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1851 break;
1852
1853 case ir_unop_bit_not:
1854 if (native_integers) {
1855 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1856 break;
1857 }
1858 case ir_unop_u2f:
1859 if (native_integers) {
1860 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1861 break;
1862 }
1863 case ir_binop_lshift:
1864 if (native_integers) {
1865 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1866 break;
1867 }
1868 case ir_binop_rshift:
1869 if (native_integers) {
1870 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1871 break;
1872 }
1873 case ir_binop_bit_and:
1874 if (native_integers) {
1875 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1876 break;
1877 }
1878 case ir_binop_bit_xor:
1879 if (native_integers) {
1880 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1881 break;
1882 }
1883 case ir_binop_bit_or:
1884 if (native_integers) {
1885 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1886 break;
1887 }
1888
1889 assert(!"GLSL 1.30 features unsupported");
1890 break;
1891
1892 case ir_binop_ubo_load: {
1893 ir_constant *uniform_block = ir->operands[0]->as_constant();
1894 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1895 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1896 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1897 st_src_reg cbuf;
1898
1899 cbuf.type = glsl_type::vec4_type->base_type;
1900 cbuf.file = PROGRAM_CONSTANT;
1901 cbuf.index = 0;
1902 cbuf.index2D = uniform_block->value.u[0] + 1;
1903 cbuf.reladdr = NULL;
1904 cbuf.negate = 0;
1905
1906 assert(ir->type->is_vector() || ir->type->is_scalar());
1907
1908 if (const_offset_ir) {
1909 index_reg = st_src_reg_for_int(const_offset / 16);
1910 } else {
1911 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1912 }
1913
1914 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1915 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1916 const_offset % 16 / 4,
1917 const_offset % 16 / 4,
1918 const_offset % 16 / 4);
1919
1920 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1921 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1922
1923 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1924 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1925 result_src.negate = 1;
1926 emit(ir, TGSI_OPCODE_UCMP, result_dst, result_src, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1927 } else {
1928 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1929 }
1930 break;
1931 }
1932 case ir_quadop_vector:
1933 /* This operation should have already been handled.
1934 */
1935 assert(!"Should not get here.");
1936 break;
1937 }
1938
1939 this->result = result_src;
1940 }
1941
1942
1943 void
1944 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1945 {
1946 st_src_reg src;
1947 int i;
1948 int swizzle[4];
1949
1950 /* Note that this is only swizzles in expressions, not those on the left
1951 * hand side of an assignment, which do write masking. See ir_assignment
1952 * for that.
1953 */
1954
1955 ir->val->accept(this);
1956 src = this->result;
1957 assert(src.file != PROGRAM_UNDEFINED);
1958
1959 for (i = 0; i < 4; i++) {
1960 if (i < ir->type->vector_elements) {
1961 switch (i) {
1962 case 0:
1963 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1964 break;
1965 case 1:
1966 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1967 break;
1968 case 2:
1969 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1970 break;
1971 case 3:
1972 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1973 break;
1974 }
1975 } else {
1976 /* If the type is smaller than a vec4, replicate the last
1977 * channel out.
1978 */
1979 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1980 }
1981 }
1982
1983 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1984
1985 this->result = src;
1986 }
1987
1988 void
1989 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1990 {
1991 variable_storage *entry = find_variable_storage(ir->var);
1992 ir_variable *var = ir->var;
1993
1994 if (!entry) {
1995 switch (var->mode) {
1996 case ir_var_uniform:
1997 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1998 var->location);
1999 this->variables.push_tail(entry);
2000 break;
2001 case ir_var_in:
2002 case ir_var_inout:
2003 /* The linker assigns locations for varyings and attributes,
2004 * including deprecated builtins (like gl_Color), user-assign
2005 * generic attributes (glBindVertexLocation), and
2006 * user-defined varyings.
2007 *
2008 * FINISHME: We would hit this path for function arguments. Fix!
2009 */
2010 assert(var->location != -1);
2011 entry = new(mem_ctx) variable_storage(var,
2012 PROGRAM_INPUT,
2013 var->location);
2014 break;
2015 case ir_var_out:
2016 assert(var->location != -1);
2017 entry = new(mem_ctx) variable_storage(var,
2018 PROGRAM_OUTPUT,
2019 var->location + var->index);
2020 break;
2021 case ir_var_system_value:
2022 entry = new(mem_ctx) variable_storage(var,
2023 PROGRAM_SYSTEM_VALUE,
2024 var->location);
2025 break;
2026 case ir_var_auto:
2027 case ir_var_temporary:
2028 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
2029 this->next_temp);
2030 this->variables.push_tail(entry);
2031
2032 next_temp += type_size(var->type);
2033 break;
2034 }
2035
2036 if (!entry) {
2037 printf("Failed to make storage for %s\n", var->name);
2038 exit(1);
2039 }
2040 }
2041
2042 this->result = st_src_reg(entry->file, entry->index, var->type);
2043 if (!native_integers)
2044 this->result.type = GLSL_TYPE_FLOAT;
2045 }
2046
2047 void
2048 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2049 {
2050 ir_constant *index;
2051 st_src_reg src;
2052 int element_size = type_size(ir->type);
2053
2054 index = ir->array_index->constant_expression_value();
2055
2056 ir->array->accept(this);
2057 src = this->result;
2058
2059 if (index) {
2060 src.index += index->value.i[0] * element_size;
2061 } else {
2062 /* Variable index array dereference. It eats the "vec4" of the
2063 * base of the array and an index that offsets the TGSI register
2064 * index.
2065 */
2066 ir->array_index->accept(this);
2067
2068 st_src_reg index_reg;
2069
2070 if (element_size == 1) {
2071 index_reg = this->result;
2072 } else {
2073 index_reg = get_temp(native_integers ?
2074 glsl_type::int_type : glsl_type::float_type);
2075
2076 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2077 this->result, st_src_reg_for_type(index_reg.type, element_size));
2078 }
2079
2080 /* If there was already a relative address register involved, add the
2081 * new and the old together to get the new offset.
2082 */
2083 if (src.reladdr != NULL) {
2084 st_src_reg accum_reg = get_temp(native_integers ?
2085 glsl_type::int_type : glsl_type::float_type);
2086
2087 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2088 index_reg, *src.reladdr);
2089
2090 index_reg = accum_reg;
2091 }
2092
2093 src.reladdr = ralloc(mem_ctx, st_src_reg);
2094 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2095 }
2096
2097 /* If the type is smaller than a vec4, replicate the last channel out. */
2098 if (ir->type->is_scalar() || ir->type->is_vector())
2099 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2100 else
2101 src.swizzle = SWIZZLE_NOOP;
2102
2103 /* Change the register type to the element type of the array. */
2104 src.type = ir->type->base_type;
2105
2106 this->result = src;
2107 }
2108
2109 void
2110 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2111 {
2112 unsigned int i;
2113 const glsl_type *struct_type = ir->record->type;
2114 int offset = 0;
2115
2116 ir->record->accept(this);
2117
2118 for (i = 0; i < struct_type->length; i++) {
2119 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2120 break;
2121 offset += type_size(struct_type->fields.structure[i].type);
2122 }
2123
2124 /* If the type is smaller than a vec4, replicate the last channel out. */
2125 if (ir->type->is_scalar() || ir->type->is_vector())
2126 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2127 else
2128 this->result.swizzle = SWIZZLE_NOOP;
2129
2130 this->result.index += offset;
2131 this->result.type = ir->type->base_type;
2132 }
2133
2134 /**
2135 * We want to be careful in assignment setup to hit the actual storage
2136 * instead of potentially using a temporary like we might with the
2137 * ir_dereference handler.
2138 */
2139 static st_dst_reg
2140 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2141 {
2142 /* The LHS must be a dereference. If the LHS is a variable indexed array
2143 * access of a vector, it must be separated into a series conditional moves
2144 * before reaching this point (see ir_vec_index_to_cond_assign).
2145 */
2146 assert(ir->as_dereference());
2147 ir_dereference_array *deref_array = ir->as_dereference_array();
2148 if (deref_array) {
2149 assert(!deref_array->array->type->is_vector());
2150 }
2151
2152 /* Use the rvalue deref handler for the most part. We'll ignore
2153 * swizzles in it and write swizzles using writemask, though.
2154 */
2155 ir->accept(v);
2156 return st_dst_reg(v->result);
2157 }
2158
2159 /**
2160 * Process the condition of a conditional assignment
2161 *
2162 * Examines the condition of a conditional assignment to generate the optimal
2163 * first operand of a \c CMP instruction. If the condition is a relational
2164 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2165 * used as the source for the \c CMP instruction. Otherwise the comparison
2166 * is processed to a boolean result, and the boolean result is used as the
2167 * operand to the CMP instruction.
2168 */
2169 bool
2170 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2171 {
2172 ir_rvalue *src_ir = ir;
2173 bool negate = true;
2174 bool switch_order = false;
2175
2176 ir_expression *const expr = ir->as_expression();
2177 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2178 bool zero_on_left = false;
2179
2180 if (expr->operands[0]->is_zero()) {
2181 src_ir = expr->operands[1];
2182 zero_on_left = true;
2183 } else if (expr->operands[1]->is_zero()) {
2184 src_ir = expr->operands[0];
2185 zero_on_left = false;
2186 }
2187
2188 /* a is - 0 + - 0 +
2189 * (a < 0) T F F ( a < 0) T F F
2190 * (0 < a) F F T (-a < 0) F F T
2191 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2192 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2193 * (a > 0) F F T (-a < 0) F F T
2194 * (0 > a) T F F ( a < 0) T F F
2195 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2196 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2197 *
2198 * Note that exchanging the order of 0 and 'a' in the comparison simply
2199 * means that the value of 'a' should be negated.
2200 */
2201 if (src_ir != ir) {
2202 switch (expr->operation) {
2203 case ir_binop_less:
2204 switch_order = false;
2205 negate = zero_on_left;
2206 break;
2207
2208 case ir_binop_greater:
2209 switch_order = false;
2210 negate = !zero_on_left;
2211 break;
2212
2213 case ir_binop_lequal:
2214 switch_order = true;
2215 negate = !zero_on_left;
2216 break;
2217
2218 case ir_binop_gequal:
2219 switch_order = true;
2220 negate = zero_on_left;
2221 break;
2222
2223 default:
2224 /* This isn't the right kind of comparison afterall, so make sure
2225 * the whole condition is visited.
2226 */
2227 src_ir = ir;
2228 break;
2229 }
2230 }
2231 }
2232
2233 src_ir->accept(this);
2234
2235 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2236 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2237 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2238 * computing the condition.
2239 */
2240 if (negate)
2241 this->result.negate = ~this->result.negate;
2242
2243 return switch_order;
2244 }
2245
2246 void
2247 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2248 {
2249 st_dst_reg l;
2250 st_src_reg r;
2251 int i;
2252
2253 ir->rhs->accept(this);
2254 r = this->result;
2255
2256 l = get_assignment_lhs(ir->lhs, this);
2257
2258 /* FINISHME: This should really set to the correct maximal writemask for each
2259 * FINISHME: component written (in the loops below). This case can only
2260 * FINISHME: occur for matrices, arrays, and structures.
2261 */
2262 if (ir->write_mask == 0) {
2263 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2264 l.writemask = WRITEMASK_XYZW;
2265 } else if (ir->lhs->type->is_scalar() &&
2266 ir->lhs->variable_referenced()->mode == ir_var_out) {
2267 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2268 * FINISHME: W component of fragment shader output zero, work correctly.
2269 */
2270 l.writemask = WRITEMASK_XYZW;
2271 } else {
2272 int swizzles[4];
2273 int first_enabled_chan = 0;
2274 int rhs_chan = 0;
2275
2276 l.writemask = ir->write_mask;
2277
2278 for (int i = 0; i < 4; i++) {
2279 if (l.writemask & (1 << i)) {
2280 first_enabled_chan = GET_SWZ(r.swizzle, i);
2281 break;
2282 }
2283 }
2284
2285 /* Swizzle a small RHS vector into the channels being written.
2286 *
2287 * glsl ir treats write_mask as dictating how many channels are
2288 * present on the RHS while TGSI treats write_mask as just
2289 * showing which channels of the vec4 RHS get written.
2290 */
2291 for (int i = 0; i < 4; i++) {
2292 if (l.writemask & (1 << i))
2293 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2294 else
2295 swizzles[i] = first_enabled_chan;
2296 }
2297 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2298 swizzles[2], swizzles[3]);
2299 }
2300
2301 assert(l.file != PROGRAM_UNDEFINED);
2302 assert(r.file != PROGRAM_UNDEFINED);
2303
2304 if (ir->condition) {
2305 const bool switch_order = this->process_move_condition(ir->condition);
2306 st_src_reg condition = this->result;
2307
2308 for (i = 0; i < type_size(ir->lhs->type); i++) {
2309 st_src_reg l_src = st_src_reg(l);
2310 st_src_reg condition_temp = condition;
2311 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2312
2313 if (native_integers) {
2314 /* This is necessary because TGSI's CMP instruction expects the
2315 * condition to be a float, and we store booleans as integers.
2316 * If TGSI had a UCMP instruction or similar, this extra
2317 * instruction would not be necessary.
2318 */
2319 condition_temp = get_temp(glsl_type::vec4_type);
2320 condition.negate = 0;
2321 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2322 condition_temp.swizzle = condition.swizzle;
2323 }
2324
2325 if (switch_order) {
2326 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2327 } else {
2328 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2329 }
2330
2331 l.index++;
2332 r.index++;
2333 }
2334 } else if (ir->rhs->as_expression() &&
2335 this->instructions.get_tail() &&
2336 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2337 type_size(ir->lhs->type) == 1 &&
2338 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2339 /* To avoid emitting an extra MOV when assigning an expression to a
2340 * variable, emit the last instruction of the expression again, but
2341 * replace the destination register with the target of the assignment.
2342 * Dead code elimination will remove the original instruction.
2343 */
2344 glsl_to_tgsi_instruction *inst, *new_inst;
2345 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2346 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2347 new_inst->saturate = inst->saturate;
2348 inst->dead_mask = inst->dst.writemask;
2349 } else {
2350 for (i = 0; i < type_size(ir->lhs->type); i++) {
2351 if (ir->rhs->type->is_array())
2352 r.type = ir->rhs->type->element_type()->base_type;
2353 else if (ir->rhs->type->is_record())
2354 r.type = ir->rhs->type->fields.structure[i].type->base_type;
2355 emit(ir, TGSI_OPCODE_MOV, l, r);
2356 l.index++;
2357 r.index++;
2358 }
2359 }
2360 }
2361
2362
2363 void
2364 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2365 {
2366 st_src_reg src;
2367 GLfloat stack_vals[4] = { 0 };
2368 gl_constant_value *values = (gl_constant_value *) stack_vals;
2369 GLenum gl_type = GL_NONE;
2370 unsigned int i;
2371 static int in_array = 0;
2372 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2373
2374 /* Unfortunately, 4 floats is all we can get into
2375 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2376 * aggregate constant and move each constant value into it. If we
2377 * get lucky, copy propagation will eliminate the extra moves.
2378 */
2379 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2380 st_src_reg temp_base = get_temp(ir->type);
2381 st_dst_reg temp = st_dst_reg(temp_base);
2382
2383 foreach_iter(exec_list_iterator, iter, ir->components) {
2384 ir_constant *field_value = (ir_constant *)iter.get();
2385 int size = type_size(field_value->type);
2386
2387 assert(size > 0);
2388
2389 field_value->accept(this);
2390 src = this->result;
2391
2392 for (i = 0; i < (unsigned int)size; i++) {
2393 emit(ir, TGSI_OPCODE_MOV, temp, src);
2394
2395 src.index++;
2396 temp.index++;
2397 }
2398 }
2399 this->result = temp_base;
2400 return;
2401 }
2402
2403 if (ir->type->is_array()) {
2404 st_src_reg temp_base = get_temp(ir->type);
2405 st_dst_reg temp = st_dst_reg(temp_base);
2406 int size = type_size(ir->type->fields.array);
2407
2408 assert(size > 0);
2409 in_array++;
2410
2411 for (i = 0; i < ir->type->length; i++) {
2412 ir->array_elements[i]->accept(this);
2413 src = this->result;
2414 for (int j = 0; j < size; j++) {
2415 emit(ir, TGSI_OPCODE_MOV, temp, src);
2416
2417 src.index++;
2418 temp.index++;
2419 }
2420 }
2421 this->result = temp_base;
2422 in_array--;
2423 return;
2424 }
2425
2426 if (ir->type->is_matrix()) {
2427 st_src_reg mat = get_temp(ir->type);
2428 st_dst_reg mat_column = st_dst_reg(mat);
2429
2430 for (i = 0; i < ir->type->matrix_columns; i++) {
2431 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2432 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2433
2434 src = st_src_reg(file, -1, ir->type->base_type);
2435 src.index = add_constant(file,
2436 values,
2437 ir->type->vector_elements,
2438 GL_FLOAT,
2439 &src.swizzle);
2440 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2441
2442 mat_column.index++;
2443 }
2444
2445 this->result = mat;
2446 return;
2447 }
2448
2449 switch (ir->type->base_type) {
2450 case GLSL_TYPE_FLOAT:
2451 gl_type = GL_FLOAT;
2452 for (i = 0; i < ir->type->vector_elements; i++) {
2453 values[i].f = ir->value.f[i];
2454 }
2455 break;
2456 case GLSL_TYPE_UINT:
2457 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2458 for (i = 0; i < ir->type->vector_elements; i++) {
2459 if (native_integers)
2460 values[i].u = ir->value.u[i];
2461 else
2462 values[i].f = ir->value.u[i];
2463 }
2464 break;
2465 case GLSL_TYPE_INT:
2466 gl_type = native_integers ? GL_INT : GL_FLOAT;
2467 for (i = 0; i < ir->type->vector_elements; i++) {
2468 if (native_integers)
2469 values[i].i = ir->value.i[i];
2470 else
2471 values[i].f = ir->value.i[i];
2472 }
2473 break;
2474 case GLSL_TYPE_BOOL:
2475 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2476 for (i = 0; i < ir->type->vector_elements; i++) {
2477 if (native_integers)
2478 values[i].u = ir->value.b[i] ? ~0 : 0;
2479 else
2480 values[i].f = ir->value.b[i];
2481 }
2482 break;
2483 default:
2484 assert(!"Non-float/uint/int/bool constant");
2485 }
2486
2487 this->result = st_src_reg(file, -1, ir->type);
2488 this->result.index = add_constant(file,
2489 values,
2490 ir->type->vector_elements,
2491 gl_type,
2492 &this->result.swizzle);
2493 }
2494
2495 function_entry *
2496 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2497 {
2498 function_entry *entry;
2499
2500 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2501 entry = (function_entry *)iter.get();
2502
2503 if (entry->sig == sig)
2504 return entry;
2505 }
2506
2507 entry = ralloc(mem_ctx, function_entry);
2508 entry->sig = sig;
2509 entry->sig_id = this->next_signature_id++;
2510 entry->bgn_inst = NULL;
2511
2512 /* Allocate storage for all the parameters. */
2513 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2514 ir_variable *param = (ir_variable *)iter.get();
2515 variable_storage *storage;
2516
2517 storage = find_variable_storage(param);
2518 assert(!storage);
2519
2520 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2521 this->next_temp);
2522 this->variables.push_tail(storage);
2523
2524 this->next_temp += type_size(param->type);
2525 }
2526
2527 if (!sig->return_type->is_void()) {
2528 entry->return_reg = get_temp(sig->return_type);
2529 } else {
2530 entry->return_reg = undef_src;
2531 }
2532
2533 this->function_signatures.push_tail(entry);
2534 return entry;
2535 }
2536
2537 void
2538 glsl_to_tgsi_visitor::visit(ir_call *ir)
2539 {
2540 glsl_to_tgsi_instruction *call_inst;
2541 ir_function_signature *sig = ir->callee;
2542 function_entry *entry = get_function_signature(sig);
2543 int i;
2544
2545 /* Process in parameters. */
2546 exec_list_iterator sig_iter = sig->parameters.iterator();
2547 foreach_iter(exec_list_iterator, iter, *ir) {
2548 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2549 ir_variable *param = (ir_variable *)sig_iter.get();
2550
2551 if (param->mode == ir_var_in ||
2552 param->mode == ir_var_inout) {
2553 variable_storage *storage = find_variable_storage(param);
2554 assert(storage);
2555
2556 param_rval->accept(this);
2557 st_src_reg r = this->result;
2558
2559 st_dst_reg l;
2560 l.file = storage->file;
2561 l.index = storage->index;
2562 l.reladdr = NULL;
2563 l.writemask = WRITEMASK_XYZW;
2564 l.cond_mask = COND_TR;
2565
2566 for (i = 0; i < type_size(param->type); i++) {
2567 emit(ir, TGSI_OPCODE_MOV, l, r);
2568 l.index++;
2569 r.index++;
2570 }
2571 }
2572
2573 sig_iter.next();
2574 }
2575 assert(!sig_iter.has_next());
2576
2577 /* Emit call instruction */
2578 call_inst = emit(ir, TGSI_OPCODE_CAL);
2579 call_inst->function = entry;
2580
2581 /* Process out parameters. */
2582 sig_iter = sig->parameters.iterator();
2583 foreach_iter(exec_list_iterator, iter, *ir) {
2584 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2585 ir_variable *param = (ir_variable *)sig_iter.get();
2586
2587 if (param->mode == ir_var_out ||
2588 param->mode == ir_var_inout) {
2589 variable_storage *storage = find_variable_storage(param);
2590 assert(storage);
2591
2592 st_src_reg r;
2593 r.file = storage->file;
2594 r.index = storage->index;
2595 r.reladdr = NULL;
2596 r.swizzle = SWIZZLE_NOOP;
2597 r.negate = 0;
2598
2599 param_rval->accept(this);
2600 st_dst_reg l = st_dst_reg(this->result);
2601
2602 for (i = 0; i < type_size(param->type); i++) {
2603 emit(ir, TGSI_OPCODE_MOV, l, r);
2604 l.index++;
2605 r.index++;
2606 }
2607 }
2608
2609 sig_iter.next();
2610 }
2611 assert(!sig_iter.has_next());
2612
2613 /* Process return value. */
2614 this->result = entry->return_reg;
2615 }
2616
2617 void
2618 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2619 {
2620 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset;
2621 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2622 glsl_to_tgsi_instruction *inst = NULL;
2623 unsigned opcode = TGSI_OPCODE_NOP;
2624 const glsl_type *sampler_type = ir->sampler->type;
2625 bool is_cube_array = false;
2626
2627 /* if we are a cube array sampler */
2628 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2629 sampler_type->sampler_array)) {
2630 is_cube_array = true;
2631 }
2632
2633 if (ir->coordinate) {
2634 ir->coordinate->accept(this);
2635
2636 /* Put our coords in a temp. We'll need to modify them for shadow,
2637 * projection, or LOD, so the only case we'd use it as is is if
2638 * we're doing plain old texturing. The optimization passes on
2639 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2640 */
2641 coord = get_temp(glsl_type::vec4_type);
2642 coord_dst = st_dst_reg(coord);
2643 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2644 }
2645
2646 if (ir->projector) {
2647 ir->projector->accept(this);
2648 projector = this->result;
2649 }
2650
2651 /* Storage for our result. Ideally for an assignment we'd be using
2652 * the actual storage for the result here, instead.
2653 */
2654 result_src = get_temp(ir->type);
2655 result_dst = st_dst_reg(result_src);
2656
2657 switch (ir->op) {
2658 case ir_tex:
2659 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2660 break;
2661 case ir_txb:
2662 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2663 ir->lod_info.bias->accept(this);
2664 lod_info = this->result;
2665 break;
2666 case ir_txl:
2667 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2668 ir->lod_info.lod->accept(this);
2669 lod_info = this->result;
2670 break;
2671 case ir_txd:
2672 opcode = TGSI_OPCODE_TXD;
2673 ir->lod_info.grad.dPdx->accept(this);
2674 dx = this->result;
2675 ir->lod_info.grad.dPdy->accept(this);
2676 dy = this->result;
2677 break;
2678 case ir_txs:
2679 opcode = TGSI_OPCODE_TXQ;
2680 ir->lod_info.lod->accept(this);
2681 lod_info = this->result;
2682 break;
2683 case ir_txf:
2684 opcode = TGSI_OPCODE_TXF;
2685 ir->lod_info.lod->accept(this);
2686 lod_info = this->result;
2687 if (ir->offset) {
2688 ir->offset->accept(this);
2689 offset = this->result;
2690 }
2691 break;
2692 }
2693
2694 if (ir->projector) {
2695 if (opcode == TGSI_OPCODE_TEX) {
2696 /* Slot the projector in as the last component of the coord. */
2697 coord_dst.writemask = WRITEMASK_W;
2698 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2699 coord_dst.writemask = WRITEMASK_XYZW;
2700 opcode = TGSI_OPCODE_TXP;
2701 } else {
2702 st_src_reg coord_w = coord;
2703 coord_w.swizzle = SWIZZLE_WWWW;
2704
2705 /* For the other TEX opcodes there's no projective version
2706 * since the last slot is taken up by LOD info. Do the
2707 * projective divide now.
2708 */
2709 coord_dst.writemask = WRITEMASK_W;
2710 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2711
2712 /* In the case where we have to project the coordinates "by hand,"
2713 * the shadow comparator value must also be projected.
2714 */
2715 st_src_reg tmp_src = coord;
2716 if (ir->shadow_comparitor) {
2717 /* Slot the shadow value in as the second to last component of the
2718 * coord.
2719 */
2720 ir->shadow_comparitor->accept(this);
2721
2722 tmp_src = get_temp(glsl_type::vec4_type);
2723 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2724
2725 /* Projective division not allowed for array samplers. */
2726 assert(!sampler_type->sampler_array);
2727
2728 tmp_dst.writemask = WRITEMASK_Z;
2729 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2730
2731 tmp_dst.writemask = WRITEMASK_XY;
2732 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2733 }
2734
2735 coord_dst.writemask = WRITEMASK_XYZ;
2736 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2737
2738 coord_dst.writemask = WRITEMASK_XYZW;
2739 coord.swizzle = SWIZZLE_XYZW;
2740 }
2741 }
2742
2743 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2744 * comparator was put in the correct place (and projected) by the code,
2745 * above, that handles by-hand projection.
2746 */
2747 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2748 /* Slot the shadow value in as the second to last component of the
2749 * coord.
2750 */
2751 ir->shadow_comparitor->accept(this);
2752
2753 if (is_cube_array) {
2754 cube_sc = get_temp(glsl_type::float_type);
2755 cube_sc_dst = st_dst_reg(cube_sc);
2756 cube_sc_dst.writemask = WRITEMASK_X;
2757 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2758 cube_sc_dst.writemask = WRITEMASK_X;
2759 }
2760 else {
2761 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2762 sampler_type->sampler_array) ||
2763 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2764 coord_dst.writemask = WRITEMASK_W;
2765 } else {
2766 coord_dst.writemask = WRITEMASK_Z;
2767 }
2768
2769 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2770 coord_dst.writemask = WRITEMASK_XYZW;
2771 }
2772 }
2773
2774 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2775 opcode == TGSI_OPCODE_TXF) {
2776 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2777 coord_dst.writemask = WRITEMASK_W;
2778 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2779 coord_dst.writemask = WRITEMASK_XYZW;
2780 }
2781
2782 if (opcode == TGSI_OPCODE_TXD)
2783 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2784 else if (opcode == TGSI_OPCODE_TXQ)
2785 inst = emit(ir, opcode, result_dst, lod_info);
2786 else if (opcode == TGSI_OPCODE_TXF) {
2787 inst = emit(ir, opcode, result_dst, coord);
2788 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2789 inst = emit(ir, opcode, result_dst, coord, lod_info);
2790 } else if (opcode == TGSI_OPCODE_TEX2) {
2791 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2792 } else
2793 inst = emit(ir, opcode, result_dst, coord);
2794
2795 if (ir->shadow_comparitor)
2796 inst->tex_shadow = GL_TRUE;
2797
2798 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2799 this->shader_program,
2800 this->prog);
2801
2802 if (ir->offset) {
2803 inst->tex_offset_num_offset = 1;
2804 inst->tex_offsets[0].Index = offset.index;
2805 inst->tex_offsets[0].File = offset.file;
2806 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2807 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2808 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2809 }
2810
2811 switch (sampler_type->sampler_dimensionality) {
2812 case GLSL_SAMPLER_DIM_1D:
2813 inst->tex_target = (sampler_type->sampler_array)
2814 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2815 break;
2816 case GLSL_SAMPLER_DIM_2D:
2817 inst->tex_target = (sampler_type->sampler_array)
2818 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2819 break;
2820 case GLSL_SAMPLER_DIM_3D:
2821 inst->tex_target = TEXTURE_3D_INDEX;
2822 break;
2823 case GLSL_SAMPLER_DIM_CUBE:
2824 inst->tex_target = (sampler_type->sampler_array)
2825 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2826 break;
2827 case GLSL_SAMPLER_DIM_RECT:
2828 inst->tex_target = TEXTURE_RECT_INDEX;
2829 break;
2830 case GLSL_SAMPLER_DIM_BUF:
2831 inst->tex_target = TEXTURE_BUFFER_INDEX;
2832 break;
2833 case GLSL_SAMPLER_DIM_EXTERNAL:
2834 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2835 break;
2836 default:
2837 assert(!"Should not get here.");
2838 }
2839
2840 this->result = result_src;
2841 }
2842
2843 void
2844 glsl_to_tgsi_visitor::visit(ir_return *ir)
2845 {
2846 if (ir->get_value()) {
2847 st_dst_reg l;
2848 int i;
2849
2850 assert(current_function);
2851
2852 ir->get_value()->accept(this);
2853 st_src_reg r = this->result;
2854
2855 l = st_dst_reg(current_function->return_reg);
2856
2857 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2858 emit(ir, TGSI_OPCODE_MOV, l, r);
2859 l.index++;
2860 r.index++;
2861 }
2862 }
2863
2864 emit(ir, TGSI_OPCODE_RET);
2865 }
2866
2867 void
2868 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2869 {
2870 if (ir->condition) {
2871 ir->condition->accept(this);
2872 this->result.negate = ~this->result.negate;
2873 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2874 } else {
2875 emit(ir, TGSI_OPCODE_KILP);
2876 }
2877 }
2878
2879 void
2880 glsl_to_tgsi_visitor::visit(ir_if *ir)
2881 {
2882 glsl_to_tgsi_instruction *cond_inst, *if_inst;
2883 glsl_to_tgsi_instruction *prev_inst;
2884
2885 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2886
2887 ir->condition->accept(this);
2888 assert(this->result.file != PROGRAM_UNDEFINED);
2889
2890 if (this->options->EmitCondCodes) {
2891 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2892
2893 /* See if we actually generated any instruction for generating
2894 * the condition. If not, then cook up a move to a temp so we
2895 * have something to set cond_update on.
2896 */
2897 if (cond_inst == prev_inst) {
2898 st_src_reg temp = get_temp(glsl_type::bool_type);
2899 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result);
2900 }
2901 cond_inst->cond_update = GL_TRUE;
2902
2903 if_inst = emit(ir->condition, TGSI_OPCODE_IF);
2904 if_inst->dst.cond_mask = COND_NE;
2905 } else {
2906 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2907 }
2908
2909 this->instructions.push_tail(if_inst);
2910
2911 visit_exec_list(&ir->then_instructions, this);
2912
2913 if (!ir->else_instructions.is_empty()) {
2914 emit(ir->condition, TGSI_OPCODE_ELSE);
2915 visit_exec_list(&ir->else_instructions, this);
2916 }
2917
2918 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2919 }
2920
2921 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2922 {
2923 result.file = PROGRAM_UNDEFINED;
2924 next_temp = 1;
2925 next_signature_id = 1;
2926 num_immediates = 0;
2927 current_function = NULL;
2928 num_address_regs = 0;
2929 samplers_used = 0;
2930 indirect_addr_temps = false;
2931 indirect_addr_consts = false;
2932 glsl_version = 0;
2933 native_integers = false;
2934 mem_ctx = ralloc_context(NULL);
2935 ctx = NULL;
2936 prog = NULL;
2937 shader_program = NULL;
2938 options = NULL;
2939 }
2940
2941 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2942 {
2943 ralloc_free(mem_ctx);
2944 }
2945
2946 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2947 {
2948 delete v;
2949 }
2950
2951
2952 /**
2953 * Count resources used by the given gpu program (number of texture
2954 * samplers, etc).
2955 */
2956 static void
2957 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2958 {
2959 v->samplers_used = 0;
2960
2961 foreach_iter(exec_list_iterator, iter, v->instructions) {
2962 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2963
2964 if (is_tex_instruction(inst->op)) {
2965 v->samplers_used |= 1 << inst->sampler;
2966
2967 if (inst->tex_shadow) {
2968 prog->ShadowSamplers |= 1 << inst->sampler;
2969 }
2970 }
2971 }
2972
2973 prog->SamplersUsed = v->samplers_used;
2974
2975 if (v->shader_program != NULL)
2976 _mesa_update_shader_textures_used(v->shader_program, prog);
2977 }
2978
2979 static void
2980 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2981 struct gl_shader_program *shader_program,
2982 const char *name, const glsl_type *type,
2983 ir_constant *val)
2984 {
2985 if (type->is_record()) {
2986 ir_constant *field_constant;
2987
2988 field_constant = (ir_constant *)val->components.get_head();
2989
2990 for (unsigned int i = 0; i < type->length; i++) {
2991 const glsl_type *field_type = type->fields.structure[i].type;
2992 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2993 type->fields.structure[i].name);
2994 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2995 field_type, field_constant);
2996 field_constant = (ir_constant *)field_constant->next;
2997 }
2998 return;
2999 }
3000
3001 unsigned offset;
3002 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3003 &offset);
3004 if (offset == GL_INVALID_INDEX) {
3005 fail_link(shader_program,
3006 "Couldn't find uniform for initializer %s\n", name);
3007 return;
3008 }
3009 int loc = _mesa_uniform_merge_location_offset(index, offset);
3010
3011 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3012 ir_constant *element;
3013 const glsl_type *element_type;
3014 if (type->is_array()) {
3015 element = val->array_elements[i];
3016 element_type = type->fields.array;
3017 } else {
3018 element = val;
3019 element_type = type;
3020 }
3021
3022 void *values;
3023
3024 if (element_type->base_type == GLSL_TYPE_BOOL) {
3025 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3026 for (unsigned int j = 0; j < element_type->components(); j++) {
3027 conv[j] = element->value.b[j];
3028 }
3029 values = (void *)conv;
3030 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3031 element_type->vector_elements,
3032 1);
3033 } else {
3034 values = &element->value;
3035 }
3036
3037 if (element_type->is_matrix()) {
3038 _mesa_uniform_matrix(ctx, shader_program,
3039 element_type->matrix_columns,
3040 element_type->vector_elements,
3041 loc, 1, GL_FALSE, (GLfloat *)values);
3042 } else {
3043 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3044 values, element_type->gl_type);
3045 }
3046
3047 loc++;
3048 }
3049 }
3050
3051 /**
3052 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3053 * are read from the given src in this instruction
3054 */
3055 static int
3056 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3057 {
3058 int read_mask = 0, comp;
3059
3060 /* Now, given the src swizzle and the written channels, find which
3061 * components are actually read
3062 */
3063 for (comp = 0; comp < 4; ++comp) {
3064 const unsigned coord = GET_SWZ(src.swizzle, comp);
3065 ASSERT(coord < 4);
3066 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3067 read_mask |= 1 << coord;
3068 }
3069
3070 return read_mask;
3071 }
3072
3073 /**
3074 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3075 * instruction is the first instruction to write to register T0. There are
3076 * several lowering passes done in GLSL IR (e.g. branches and
3077 * relative addressing) that create a large number of conditional assignments
3078 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3079 *
3080 * Here is why this conversion is safe:
3081 * CMP T0, T1 T2 T0 can be expanded to:
3082 * if (T1 < 0.0)
3083 * MOV T0, T2;
3084 * else
3085 * MOV T0, T0;
3086 *
3087 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3088 * as the original program. If (T1 < 0.0) evaluates to false, executing
3089 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3090 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3091 * because any instruction that was going to read from T0 after this was going
3092 * to read a garbage value anyway.
3093 */
3094 void
3095 glsl_to_tgsi_visitor::simplify_cmp(void)
3096 {
3097 unsigned *tempWrites;
3098 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3099
3100 tempWrites = new unsigned[MAX_TEMPS];
3101 if (!tempWrites) {
3102 return;
3103 }
3104 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3105 memset(outputWrites, 0, sizeof(outputWrites));
3106
3107 foreach_iter(exec_list_iterator, iter, this->instructions) {
3108 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3109 unsigned prevWriteMask = 0;
3110
3111 /* Give up if we encounter relative addressing or flow control. */
3112 if (inst->dst.reladdr ||
3113 tgsi_get_opcode_info(inst->op)->is_branch ||
3114 inst->op == TGSI_OPCODE_BGNSUB ||
3115 inst->op == TGSI_OPCODE_CONT ||
3116 inst->op == TGSI_OPCODE_END ||
3117 inst->op == TGSI_OPCODE_ENDSUB ||
3118 inst->op == TGSI_OPCODE_RET) {
3119 break;
3120 }
3121
3122 if (inst->dst.file == PROGRAM_OUTPUT) {
3123 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3124 prevWriteMask = outputWrites[inst->dst.index];
3125 outputWrites[inst->dst.index] |= inst->dst.writemask;
3126 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3127 assert(inst->dst.index < MAX_TEMPS);
3128 prevWriteMask = tempWrites[inst->dst.index];
3129 tempWrites[inst->dst.index] |= inst->dst.writemask;
3130 }
3131
3132 /* For a CMP to be considered a conditional write, the destination
3133 * register and source register two must be the same. */
3134 if (inst->op == TGSI_OPCODE_CMP
3135 && !(inst->dst.writemask & prevWriteMask)
3136 && inst->src[2].file == inst->dst.file
3137 && inst->src[2].index == inst->dst.index
3138 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3139
3140 inst->op = TGSI_OPCODE_MOV;
3141 inst->src[0] = inst->src[1];
3142 }
3143 }
3144
3145 delete [] tempWrites;
3146 }
3147
3148 /* Replaces all references to a temporary register index with another index. */
3149 void
3150 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3151 {
3152 foreach_iter(exec_list_iterator, iter, this->instructions) {
3153 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3154 unsigned j;
3155
3156 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3157 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3158 inst->src[j].index == index) {
3159 inst->src[j].index = new_index;
3160 }
3161 }
3162
3163 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3164 inst->dst.index = new_index;
3165 }
3166 }
3167 }
3168
3169 int
3170 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3171 {
3172 int depth = 0; /* loop depth */
3173 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3174 unsigned i = 0, j;
3175
3176 foreach_iter(exec_list_iterator, iter, this->instructions) {
3177 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3178
3179 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3180 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3181 inst->src[j].index == index) {
3182 return (depth == 0) ? i : loop_start;
3183 }
3184 }
3185
3186 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3187 if(depth++ == 0)
3188 loop_start = i;
3189 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3190 if (--depth == 0)
3191 loop_start = -1;
3192 }
3193 assert(depth >= 0);
3194
3195 i++;
3196 }
3197
3198 return -1;
3199 }
3200
3201 int
3202 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3203 {
3204 int depth = 0; /* loop depth */
3205 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3206 int i = 0;
3207
3208 foreach_iter(exec_list_iterator, iter, this->instructions) {
3209 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3210
3211 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3212 return (depth == 0) ? i : loop_start;
3213 }
3214
3215 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3216 if(depth++ == 0)
3217 loop_start = i;
3218 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3219 if (--depth == 0)
3220 loop_start = -1;
3221 }
3222 assert(depth >= 0);
3223
3224 i++;
3225 }
3226
3227 return -1;
3228 }
3229
3230 int
3231 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3232 {
3233 int depth = 0; /* loop depth */
3234 int last = -1; /* index of last instruction that reads the temporary */
3235 unsigned i = 0, j;
3236
3237 foreach_iter(exec_list_iterator, iter, this->instructions) {
3238 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3239
3240 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3241 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3242 inst->src[j].index == index) {
3243 last = (depth == 0) ? i : -2;
3244 }
3245 }
3246
3247 if (inst->op == TGSI_OPCODE_BGNLOOP)
3248 depth++;
3249 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3250 if (--depth == 0 && last == -2)
3251 last = i;
3252 assert(depth >= 0);
3253
3254 i++;
3255 }
3256
3257 assert(last >= -1);
3258 return last;
3259 }
3260
3261 int
3262 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3263 {
3264 int depth = 0; /* loop depth */
3265 int last = -1; /* index of last instruction that writes to the temporary */
3266 int i = 0;
3267
3268 foreach_iter(exec_list_iterator, iter, this->instructions) {
3269 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3270
3271 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3272 last = (depth == 0) ? i : -2;
3273
3274 if (inst->op == TGSI_OPCODE_BGNLOOP)
3275 depth++;
3276 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3277 if (--depth == 0 && last == -2)
3278 last = i;
3279 assert(depth >= 0);
3280
3281 i++;
3282 }
3283
3284 assert(last >= -1);
3285 return last;
3286 }
3287
3288 /*
3289 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3290 * channels for copy propagation and updates following instructions to
3291 * use the original versions.
3292 *
3293 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3294 * will occur. As an example, a TXP production before this pass:
3295 *
3296 * 0: MOV TEMP[1], INPUT[4].xyyy;
3297 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3298 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3299 *
3300 * and after:
3301 *
3302 * 0: MOV TEMP[1], INPUT[4].xyyy;
3303 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3304 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3305 *
3306 * which allows for dead code elimination on TEMP[1]'s writes.
3307 */
3308 void
3309 glsl_to_tgsi_visitor::copy_propagate(void)
3310 {
3311 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3312 glsl_to_tgsi_instruction *,
3313 this->next_temp * 4);
3314 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3315 int level = 0;
3316
3317 foreach_iter(exec_list_iterator, iter, this->instructions) {
3318 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3319
3320 assert(inst->dst.file != PROGRAM_TEMPORARY
3321 || inst->dst.index < this->next_temp);
3322
3323 /* First, do any copy propagation possible into the src regs. */
3324 for (int r = 0; r < 3; r++) {
3325 glsl_to_tgsi_instruction *first = NULL;
3326 bool good = true;
3327 int acp_base = inst->src[r].index * 4;
3328
3329 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3330 inst->src[r].reladdr)
3331 continue;
3332
3333 /* See if we can find entries in the ACP consisting of MOVs
3334 * from the same src register for all the swizzled channels
3335 * of this src register reference.
3336 */
3337 for (int i = 0; i < 4; i++) {
3338 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3339 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3340
3341 if (!copy_chan) {
3342 good = false;
3343 break;
3344 }
3345
3346 assert(acp_level[acp_base + src_chan] <= level);
3347
3348 if (!first) {
3349 first = copy_chan;
3350 } else {
3351 if (first->src[0].file != copy_chan->src[0].file ||
3352 first->src[0].index != copy_chan->src[0].index) {
3353 good = false;
3354 break;
3355 }
3356 }
3357 }
3358
3359 if (good) {
3360 /* We've now validated that we can copy-propagate to
3361 * replace this src register reference. Do it.
3362 */
3363 inst->src[r].file = first->src[0].file;
3364 inst->src[r].index = first->src[0].index;
3365
3366 int swizzle = 0;
3367 for (int i = 0; i < 4; i++) {
3368 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3369 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3370 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3371 (3 * i));
3372 }
3373 inst->src[r].swizzle = swizzle;
3374 }
3375 }
3376
3377 switch (inst->op) {
3378 case TGSI_OPCODE_BGNLOOP:
3379 case TGSI_OPCODE_ENDLOOP:
3380 /* End of a basic block, clear the ACP entirely. */
3381 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3382 break;
3383
3384 case TGSI_OPCODE_IF:
3385 ++level;
3386 break;
3387
3388 case TGSI_OPCODE_ENDIF:
3389 case TGSI_OPCODE_ELSE:
3390 /* Clear all channels written inside the block from the ACP, but
3391 * leaving those that were not touched.
3392 */
3393 for (int r = 0; r < this->next_temp; r++) {
3394 for (int c = 0; c < 4; c++) {
3395 if (!acp[4 * r + c])
3396 continue;
3397
3398 if (acp_level[4 * r + c] >= level)
3399 acp[4 * r + c] = NULL;
3400 }
3401 }
3402 if (inst->op == TGSI_OPCODE_ENDIF)
3403 --level;
3404 break;
3405
3406 default:
3407 /* Continuing the block, clear any written channels from
3408 * the ACP.
3409 */
3410 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3411 /* Any temporary might be written, so no copy propagation
3412 * across this instruction.
3413 */
3414 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3415 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3416 inst->dst.reladdr) {
3417 /* Any output might be written, so no copy propagation
3418 * from outputs across this instruction.
3419 */
3420 for (int r = 0; r < this->next_temp; r++) {
3421 for (int c = 0; c < 4; c++) {
3422 if (!acp[4 * r + c])
3423 continue;
3424
3425 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3426 acp[4 * r + c] = NULL;
3427 }
3428 }
3429 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3430 inst->dst.file == PROGRAM_OUTPUT) {
3431 /* Clear where it's used as dst. */
3432 if (inst->dst.file == PROGRAM_TEMPORARY) {
3433 for (int c = 0; c < 4; c++) {
3434 if (inst->dst.writemask & (1 << c)) {
3435 acp[4 * inst->dst.index + c] = NULL;
3436 }
3437 }
3438 }
3439
3440 /* Clear where it's used as src. */
3441 for (int r = 0; r < this->next_temp; r++) {
3442 for (int c = 0; c < 4; c++) {
3443 if (!acp[4 * r + c])
3444 continue;
3445
3446 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3447
3448 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3449 acp[4 * r + c]->src[0].index == inst->dst.index &&
3450 inst->dst.writemask & (1 << src_chan))
3451 {
3452 acp[4 * r + c] = NULL;
3453 }
3454 }
3455 }
3456 }
3457 break;
3458 }
3459
3460 /* If this is a copy, add it to the ACP. */
3461 if (inst->op == TGSI_OPCODE_MOV &&
3462 inst->dst.file == PROGRAM_TEMPORARY &&
3463 !inst->dst.reladdr &&
3464 !inst->saturate &&
3465 !inst->src[0].reladdr &&
3466 !inst->src[0].negate) {
3467 for (int i = 0; i < 4; i++) {
3468 if (inst->dst.writemask & (1 << i)) {
3469 acp[4 * inst->dst.index + i] = inst;
3470 acp_level[4 * inst->dst.index + i] = level;
3471 }
3472 }
3473 }
3474 }
3475
3476 ralloc_free(acp_level);
3477 ralloc_free(acp);
3478 }
3479
3480 /*
3481 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3482 *
3483 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3484 * will occur. As an example, a TXP production after copy propagation but
3485 * before this pass:
3486 *
3487 * 0: MOV TEMP[1], INPUT[4].xyyy;
3488 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3489 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3490 *
3491 * and after this pass:
3492 *
3493 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3494 *
3495 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3496 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3497 */
3498 void
3499 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3500 {
3501 int i;
3502
3503 for (i=0; i < this->next_temp; i++) {
3504 int last_read = get_last_temp_read(i);
3505 int j = 0;
3506
3507 foreach_iter(exec_list_iterator, iter, this->instructions) {
3508 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3509
3510 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3511 j > last_read)
3512 {
3513 iter.remove();
3514 delete inst;
3515 }
3516
3517 j++;
3518 }
3519 }
3520 }
3521
3522 /*
3523 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3524 * code elimination. This is less primitive than eliminate_dead_code(), as it
3525 * is per-channel and can detect consecutive writes without a read between them
3526 * as dead code. However, there is some dead code that can be eliminated by
3527 * eliminate_dead_code() but not this function - for example, this function
3528 * cannot eliminate an instruction writing to a register that is never read and
3529 * is the only instruction writing to that register.
3530 *
3531 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3532 * will occur.
3533 */
3534 int
3535 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3536 {
3537 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3538 glsl_to_tgsi_instruction *,
3539 this->next_temp * 4);
3540 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3541 int level = 0;
3542 int removed = 0;
3543
3544 foreach_iter(exec_list_iterator, iter, this->instructions) {
3545 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3546
3547 assert(inst->dst.file != PROGRAM_TEMPORARY
3548 || inst->dst.index < this->next_temp);
3549
3550 switch (inst->op) {
3551 case TGSI_OPCODE_BGNLOOP:
3552 case TGSI_OPCODE_ENDLOOP:
3553 case TGSI_OPCODE_CONT:
3554 case TGSI_OPCODE_BRK:
3555 /* End of a basic block, clear the write array entirely.
3556 *
3557 * This keeps us from killing dead code when the writes are
3558 * on either side of a loop, even when the register isn't touched
3559 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3560 * dead code of this type, so it shouldn't make a difference as long as
3561 * the dead code elimination pass in the GLSL compiler does its job.
3562 */
3563 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3564 break;
3565
3566 case TGSI_OPCODE_ENDIF:
3567 case TGSI_OPCODE_ELSE:
3568 /* Promote the recorded level of all channels written inside the
3569 * preceding if or else block to the level above the if/else block.
3570 */
3571 for (int r = 0; r < this->next_temp; r++) {
3572 for (int c = 0; c < 4; c++) {
3573 if (!writes[4 * r + c])
3574 continue;
3575
3576 if (write_level[4 * r + c] == level)
3577 write_level[4 * r + c] = level-1;
3578 }
3579 }
3580
3581 if(inst->op == TGSI_OPCODE_ENDIF)
3582 --level;
3583
3584 break;
3585
3586 case TGSI_OPCODE_IF:
3587 ++level;
3588 /* fallthrough to default case to mark the condition as read */
3589
3590 default:
3591 /* Continuing the block, clear any channels from the write array that
3592 * are read by this instruction.
3593 */
3594 for (unsigned i = 0; i < Elements(inst->src); i++) {
3595 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3596 /* Any temporary might be read, so no dead code elimination
3597 * across this instruction.
3598 */
3599 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3600 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3601 /* Clear where it's used as src. */
3602 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3603 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3604 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3605 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3606
3607 for (int c = 0; c < 4; c++) {
3608 if (src_chans & (1 << c)) {
3609 writes[4 * inst->src[i].index + c] = NULL;
3610 }
3611 }
3612 }
3613 }
3614 break;
3615 }
3616
3617 /* If this instruction writes to a temporary, add it to the write array.
3618 * If there is already an instruction in the write array for one or more
3619 * of the channels, flag that channel write as dead.
3620 */
3621 if (inst->dst.file == PROGRAM_TEMPORARY &&
3622 !inst->dst.reladdr &&
3623 !inst->saturate) {
3624 for (int c = 0; c < 4; c++) {
3625 if (inst->dst.writemask & (1 << c)) {
3626 if (writes[4 * inst->dst.index + c]) {
3627 if (write_level[4 * inst->dst.index + c] < level)
3628 continue;
3629 else
3630 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3631 }
3632 writes[4 * inst->dst.index + c] = inst;
3633 write_level[4 * inst->dst.index + c] = level;
3634 }
3635 }
3636 }
3637 }
3638
3639 /* Anything still in the write array at this point is dead code. */
3640 for (int r = 0; r < this->next_temp; r++) {
3641 for (int c = 0; c < 4; c++) {
3642 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3643 if (inst)
3644 inst->dead_mask |= (1 << c);
3645 }
3646 }
3647
3648 /* Now actually remove the instructions that are completely dead and update
3649 * the writemask of other instructions with dead channels.
3650 */
3651 foreach_iter(exec_list_iterator, iter, this->instructions) {
3652 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3653
3654 if (!inst->dead_mask || !inst->dst.writemask)
3655 continue;
3656 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3657 iter.remove();
3658 delete inst;
3659 removed++;
3660 } else
3661 inst->dst.writemask &= ~(inst->dead_mask);
3662 }
3663
3664 ralloc_free(write_level);
3665 ralloc_free(writes);
3666
3667 return removed;
3668 }
3669
3670 /* Merges temporary registers together where possible to reduce the number of
3671 * registers needed to run a program.
3672 *
3673 * Produces optimal code only after copy propagation and dead code elimination
3674 * have been run. */
3675 void
3676 glsl_to_tgsi_visitor::merge_registers(void)
3677 {
3678 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3679 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3680 int i, j;
3681
3682 /* Read the indices of the last read and first write to each temp register
3683 * into an array so that we don't have to traverse the instruction list as
3684 * much. */
3685 for (i=0; i < this->next_temp; i++) {
3686 last_reads[i] = get_last_temp_read(i);
3687 first_writes[i] = get_first_temp_write(i);
3688 }
3689
3690 /* Start looking for registers with non-overlapping usages that can be
3691 * merged together. */
3692 for (i=0; i < this->next_temp; i++) {
3693 /* Don't touch unused registers. */
3694 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3695
3696 for (j=0; j < this->next_temp; j++) {
3697 /* Don't touch unused registers. */
3698 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3699
3700 /* We can merge the two registers if the first write to j is after or
3701 * in the same instruction as the last read from i. Note that the
3702 * register at index i will always be used earlier or at the same time
3703 * as the register at index j. */
3704 if (first_writes[i] <= first_writes[j] &&
3705 last_reads[i] <= first_writes[j])
3706 {
3707 rename_temp_register(j, i); /* Replace all references to j with i.*/
3708
3709 /* Update the first_writes and last_reads arrays with the new
3710 * values for the merged register index, and mark the newly unused
3711 * register index as such. */
3712 last_reads[i] = last_reads[j];
3713 first_writes[j] = -1;
3714 last_reads[j] = -1;
3715 }
3716 }
3717 }
3718
3719 ralloc_free(last_reads);
3720 ralloc_free(first_writes);
3721 }
3722
3723 /* Reassign indices to temporary registers by reusing unused indices created
3724 * by optimization passes. */
3725 void
3726 glsl_to_tgsi_visitor::renumber_registers(void)
3727 {
3728 int i = 0;
3729 int new_index = 0;
3730
3731 for (i=0; i < this->next_temp; i++) {
3732 if (get_first_temp_read(i) < 0) continue;
3733 if (i != new_index)
3734 rename_temp_register(i, new_index);
3735 new_index++;
3736 }
3737
3738 this->next_temp = new_index;
3739 }
3740
3741 /**
3742 * Returns a fragment program which implements the current pixel transfer ops.
3743 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3744 */
3745 extern "C" void
3746 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3747 glsl_to_tgsi_visitor *original,
3748 int scale_and_bias, int pixel_maps)
3749 {
3750 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3751 struct st_context *st = st_context(original->ctx);
3752 struct gl_program *prog = &fp->Base.Base;
3753 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3754 st_src_reg coord, src0;
3755 st_dst_reg dst0;
3756 glsl_to_tgsi_instruction *inst;
3757
3758 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3759 v->ctx = original->ctx;
3760 v->prog = prog;
3761 v->shader_program = NULL;
3762 v->glsl_version = original->glsl_version;
3763 v->native_integers = original->native_integers;
3764 v->options = original->options;
3765 v->next_temp = original->next_temp;
3766 v->num_address_regs = original->num_address_regs;
3767 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3768 v->indirect_addr_temps = original->indirect_addr_temps;
3769 v->indirect_addr_consts = original->indirect_addr_consts;
3770 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3771 v->num_immediates = original->num_immediates;
3772
3773 /*
3774 * Get initial pixel color from the texture.
3775 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3776 */
3777 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3778 src0 = v->get_temp(glsl_type::vec4_type);
3779 dst0 = st_dst_reg(src0);
3780 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3781 inst->sampler = 0;
3782 inst->tex_target = TEXTURE_2D_INDEX;
3783
3784 prog->InputsRead |= FRAG_BIT_TEX0;
3785 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3786 v->samplers_used |= (1 << 0);
3787
3788 if (scale_and_bias) {
3789 static const gl_state_index scale_state[STATE_LENGTH] =
3790 { STATE_INTERNAL, STATE_PT_SCALE,
3791 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3792 static const gl_state_index bias_state[STATE_LENGTH] =
3793 { STATE_INTERNAL, STATE_PT_BIAS,
3794 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3795 GLint scale_p, bias_p;
3796 st_src_reg scale, bias;
3797
3798 scale_p = _mesa_add_state_reference(params, scale_state);
3799 bias_p = _mesa_add_state_reference(params, bias_state);
3800
3801 /* MAD colorTemp, colorTemp, scale, bias; */
3802 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3803 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3804 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3805 }
3806
3807 if (pixel_maps) {
3808 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3809 st_dst_reg temp_dst = st_dst_reg(temp);
3810
3811 assert(st->pixel_xfer.pixelmap_texture);
3812
3813 /* With a little effort, we can do four pixel map look-ups with
3814 * two TEX instructions:
3815 */
3816
3817 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3818 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3819 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3820 inst->sampler = 1;
3821 inst->tex_target = TEXTURE_2D_INDEX;
3822
3823 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3824 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3825 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3826 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3827 inst->sampler = 1;
3828 inst->tex_target = TEXTURE_2D_INDEX;
3829
3830 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3831 v->samplers_used |= (1 << 1);
3832
3833 /* MOV colorTemp, temp; */
3834 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3835 }
3836
3837 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3838 * new visitor. */
3839 foreach_iter(exec_list_iterator, iter, original->instructions) {
3840 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3841 glsl_to_tgsi_instruction *newinst;
3842 st_src_reg src_regs[3];
3843
3844 if (inst->dst.file == PROGRAM_OUTPUT)
3845 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3846
3847 for (int i=0; i<3; i++) {
3848 src_regs[i] = inst->src[i];
3849 if (src_regs[i].file == PROGRAM_INPUT &&
3850 src_regs[i].index == FRAG_ATTRIB_COL0)
3851 {
3852 src_regs[i].file = PROGRAM_TEMPORARY;
3853 src_regs[i].index = src0.index;
3854 }
3855 else if (src_regs[i].file == PROGRAM_INPUT)
3856 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3857 }
3858
3859 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3860 newinst->tex_target = inst->tex_target;
3861 }
3862
3863 /* Make modifications to fragment program info. */
3864 prog->Parameters = _mesa_combine_parameter_lists(params,
3865 original->prog->Parameters);
3866 _mesa_free_parameter_list(params);
3867 count_resources(v, prog);
3868 fp->glsl_to_tgsi = v;
3869 }
3870
3871 /**
3872 * Make fragment program for glBitmap:
3873 * Sample the texture and kill the fragment if the bit is 0.
3874 * This program will be combined with the user's fragment program.
3875 *
3876 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3877 */
3878 extern "C" void
3879 get_bitmap_visitor(struct st_fragment_program *fp,
3880 glsl_to_tgsi_visitor *original, int samplerIndex)
3881 {
3882 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3883 struct st_context *st = st_context(original->ctx);
3884 struct gl_program *prog = &fp->Base.Base;
3885 st_src_reg coord, src0;
3886 st_dst_reg dst0;
3887 glsl_to_tgsi_instruction *inst;
3888
3889 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3890 v->ctx = original->ctx;
3891 v->prog = prog;
3892 v->shader_program = NULL;
3893 v->glsl_version = original->glsl_version;
3894 v->native_integers = original->native_integers;
3895 v->options = original->options;
3896 v->next_temp = original->next_temp;
3897 v->num_address_regs = original->num_address_regs;
3898 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3899 v->indirect_addr_temps = original->indirect_addr_temps;
3900 v->indirect_addr_consts = original->indirect_addr_consts;
3901 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3902 v->num_immediates = original->num_immediates;
3903
3904 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3905 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3906 src0 = v->get_temp(glsl_type::vec4_type);
3907 dst0 = st_dst_reg(src0);
3908 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3909 inst->sampler = samplerIndex;
3910 inst->tex_target = TEXTURE_2D_INDEX;
3911
3912 prog->InputsRead |= FRAG_BIT_TEX0;
3913 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3914 v->samplers_used |= (1 << samplerIndex);
3915
3916 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3917 src0.negate = NEGATE_XYZW;
3918 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3919 src0.swizzle = SWIZZLE_XXXX;
3920 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3921
3922 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3923 * new visitor. */
3924 foreach_iter(exec_list_iterator, iter, original->instructions) {
3925 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3926 glsl_to_tgsi_instruction *newinst;
3927 st_src_reg src_regs[3];
3928
3929 if (inst->dst.file == PROGRAM_OUTPUT)
3930 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3931
3932 for (int i=0; i<3; i++) {
3933 src_regs[i] = inst->src[i];
3934 if (src_regs[i].file == PROGRAM_INPUT)
3935 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3936 }
3937
3938 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3939 newinst->tex_target = inst->tex_target;
3940 }
3941
3942 /* Make modifications to fragment program info. */
3943 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3944 count_resources(v, prog);
3945 fp->glsl_to_tgsi = v;
3946 }
3947
3948 /* ------------------------- TGSI conversion stuff -------------------------- */
3949 struct label {
3950 unsigned branch_target;
3951 unsigned token;
3952 };
3953
3954 /**
3955 * Intermediate state used during shader translation.
3956 */
3957 struct st_translate {
3958 struct ureg_program *ureg;
3959
3960 struct ureg_dst temps[MAX_TEMPS];
3961 struct ureg_src *constants;
3962 struct ureg_src *immediates;
3963 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3964 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3965 struct ureg_dst address[1];
3966 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3967 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3968
3969 const GLuint *inputMapping;
3970 const GLuint *outputMapping;
3971
3972 /* For every instruction that contains a label (eg CALL), keep
3973 * details so that we can go back afterwards and emit the correct
3974 * tgsi instruction number for each label.
3975 */
3976 struct label *labels;
3977 unsigned labels_size;
3978 unsigned labels_count;
3979
3980 /* Keep a record of the tgsi instruction number that each mesa
3981 * instruction starts at, will be used to fix up labels after
3982 * translation.
3983 */
3984 unsigned *insn;
3985 unsigned insn_size;
3986 unsigned insn_count;
3987
3988 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3989
3990 boolean error;
3991 };
3992
3993 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3994 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
3995 TGSI_SEMANTIC_FACE,
3996 TGSI_SEMANTIC_VERTEXID,
3997 TGSI_SEMANTIC_INSTANCEID
3998 };
3999
4000 /**
4001 * Make note of a branch to a label in the TGSI code.
4002 * After we've emitted all instructions, we'll go over the list
4003 * of labels built here and patch the TGSI code with the actual
4004 * location of each label.
4005 */
4006 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4007 {
4008 unsigned i;
4009
4010 if (t->labels_count + 1 >= t->labels_size) {
4011 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4012 t->labels = (struct label *)realloc(t->labels,
4013 t->labels_size * sizeof(struct label));
4014 if (t->labels == NULL) {
4015 static unsigned dummy;
4016 t->error = TRUE;
4017 return &dummy;
4018 }
4019 }
4020
4021 i = t->labels_count++;
4022 t->labels[i].branch_target = branch_target;
4023 return &t->labels[i].token;
4024 }
4025
4026 /**
4027 * Called prior to emitting the TGSI code for each instruction.
4028 * Allocate additional space for instructions if needed.
4029 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4030 * the next TGSI instruction.
4031 */
4032 static void set_insn_start(struct st_translate *t, unsigned start)
4033 {
4034 if (t->insn_count + 1 >= t->insn_size) {
4035 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4036 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4037 if (t->insn == NULL) {
4038 t->error = TRUE;
4039 return;
4040 }
4041 }
4042
4043 t->insn[t->insn_count++] = start;
4044 }
4045
4046 /**
4047 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4048 */
4049 static struct ureg_src
4050 emit_immediate(struct st_translate *t,
4051 gl_constant_value values[4],
4052 int type, int size)
4053 {
4054 struct ureg_program *ureg = t->ureg;
4055
4056 switch(type)
4057 {
4058 case GL_FLOAT:
4059 return ureg_DECL_immediate(ureg, &values[0].f, size);
4060 case GL_INT:
4061 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4062 case GL_UNSIGNED_INT:
4063 case GL_BOOL:
4064 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4065 default:
4066 assert(!"should not get here - type must be float, int, uint, or bool");
4067 return ureg_src_undef();
4068 }
4069 }
4070
4071 /**
4072 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4073 */
4074 static struct ureg_dst
4075 dst_register(struct st_translate *t,
4076 gl_register_file file,
4077 GLuint index)
4078 {
4079 switch(file) {
4080 case PROGRAM_UNDEFINED:
4081 return ureg_dst_undef();
4082
4083 case PROGRAM_TEMPORARY:
4084 if (ureg_dst_is_undef(t->temps[index]))
4085 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4086
4087 return t->temps[index];
4088
4089 case PROGRAM_OUTPUT:
4090 if (t->procType == TGSI_PROCESSOR_VERTEX)
4091 assert(index < VERT_RESULT_MAX);
4092 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4093 assert(index < FRAG_RESULT_MAX);
4094 else
4095 assert(index < GEOM_RESULT_MAX);
4096
4097 assert(t->outputMapping[index] < Elements(t->outputs));
4098
4099 return t->outputs[t->outputMapping[index]];
4100
4101 case PROGRAM_ADDRESS:
4102 return t->address[index];
4103
4104 default:
4105 assert(!"unknown dst register file");
4106 return ureg_dst_undef();
4107 }
4108 }
4109
4110 /**
4111 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4112 */
4113 static struct ureg_src
4114 src_register(struct st_translate *t,
4115 gl_register_file file,
4116 GLint index, GLint index2D)
4117 {
4118 switch(file) {
4119 case PROGRAM_UNDEFINED:
4120 return ureg_src_undef();
4121
4122 case PROGRAM_TEMPORARY:
4123 assert(index >= 0);
4124 assert(index < (int) Elements(t->temps));
4125 if (ureg_dst_is_undef(t->temps[index]))
4126 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4127 return ureg_src(t->temps[index]);
4128
4129 case PROGRAM_ENV_PARAM:
4130 case PROGRAM_LOCAL_PARAM:
4131 case PROGRAM_UNIFORM:
4132 assert(index >= 0);
4133 return t->constants[index];
4134 case PROGRAM_STATE_VAR:
4135 case PROGRAM_CONSTANT: /* ie, immediate */
4136 if (index2D) {
4137 struct ureg_src src;
4138 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4139 src.Dimension = 1;
4140 src.DimensionIndex = index2D;
4141 return src;
4142 } else if (index < 0)
4143 return ureg_DECL_constant(t->ureg, 0);
4144 else
4145 return t->constants[index];
4146
4147 case PROGRAM_IMMEDIATE:
4148 return t->immediates[index];
4149
4150 case PROGRAM_INPUT:
4151 assert(t->inputMapping[index] < Elements(t->inputs));
4152 return t->inputs[t->inputMapping[index]];
4153
4154 case PROGRAM_OUTPUT:
4155 assert(t->outputMapping[index] < Elements(t->outputs));
4156 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4157
4158 case PROGRAM_ADDRESS:
4159 return ureg_src(t->address[index]);
4160
4161 case PROGRAM_SYSTEM_VALUE:
4162 assert(index < (int) Elements(t->systemValues));
4163 return t->systemValues[index];
4164
4165 default:
4166 assert(!"unknown src register file");
4167 return ureg_src_undef();
4168 }
4169 }
4170
4171 /**
4172 * Create a TGSI ureg_dst register from an st_dst_reg.
4173 */
4174 static struct ureg_dst
4175 translate_dst(struct st_translate *t,
4176 const st_dst_reg *dst_reg,
4177 bool saturate, bool clamp_color)
4178 {
4179 struct ureg_dst dst = dst_register(t,
4180 dst_reg->file,
4181 dst_reg->index);
4182
4183 dst = ureg_writemask(dst, dst_reg->writemask);
4184
4185 if (saturate)
4186 dst = ureg_saturate(dst);
4187 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4188 /* Clamp colors for ARB_color_buffer_float. */
4189 switch (t->procType) {
4190 case TGSI_PROCESSOR_VERTEX:
4191 /* XXX if the geometry shader is present, this must be done there
4192 * instead of here. */
4193 if (dst_reg->index == VERT_RESULT_COL0 ||
4194 dst_reg->index == VERT_RESULT_COL1 ||
4195 dst_reg->index == VERT_RESULT_BFC0 ||
4196 dst_reg->index == VERT_RESULT_BFC1) {
4197 dst = ureg_saturate(dst);
4198 }
4199 break;
4200
4201 case TGSI_PROCESSOR_FRAGMENT:
4202 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4203 dst = ureg_saturate(dst);
4204 }
4205 break;
4206 }
4207 }
4208
4209 if (dst_reg->reladdr != NULL)
4210 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4211
4212 return dst;
4213 }
4214
4215 /**
4216 * Create a TGSI ureg_src register from an st_src_reg.
4217 */
4218 static struct ureg_src
4219 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4220 {
4221 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4222
4223 src = ureg_swizzle(src,
4224 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4225 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4226 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4227 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4228
4229 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4230 src = ureg_negate(src);
4231
4232 if (src_reg->reladdr != NULL) {
4233 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4234 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4235 * set the bit for src.Negate. So we have to do the operation manually
4236 * here to work around the compiler's problems. */
4237 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4238 struct ureg_src addr = ureg_src(t->address[0]);
4239 src.Indirect = 1;
4240 src.IndirectFile = addr.File;
4241 src.IndirectIndex = addr.Index;
4242 src.IndirectSwizzle = addr.SwizzleX;
4243
4244 if (src_reg->file != PROGRAM_INPUT &&
4245 src_reg->file != PROGRAM_OUTPUT) {
4246 /* If src_reg->index was negative, it was set to zero in
4247 * src_register(). Reassign it now. But don't do this
4248 * for input/output regs since they get remapped while
4249 * const buffers don't.
4250 */
4251 src.Index = src_reg->index;
4252 }
4253 }
4254
4255 return src;
4256 }
4257
4258 static struct tgsi_texture_offset
4259 translate_tex_offset(struct st_translate *t,
4260 const struct tgsi_texture_offset *in_offset)
4261 {
4262 struct tgsi_texture_offset offset;
4263 struct ureg_src imm_src;
4264
4265 assert(in_offset->File == PROGRAM_IMMEDIATE);
4266 imm_src = t->immediates[in_offset->Index];
4267
4268 offset.File = imm_src.File;
4269 offset.Index = imm_src.Index;
4270 offset.SwizzleX = imm_src.SwizzleX;
4271 offset.SwizzleY = imm_src.SwizzleY;
4272 offset.SwizzleZ = imm_src.SwizzleZ;
4273 offset.File = TGSI_FILE_IMMEDIATE;
4274 offset.Padding = 0;
4275
4276 return offset;
4277 }
4278
4279 static void
4280 compile_tgsi_instruction(struct st_translate *t,
4281 const glsl_to_tgsi_instruction *inst,
4282 bool clamp_dst_color_output)
4283 {
4284 struct ureg_program *ureg = t->ureg;
4285 GLuint i;
4286 struct ureg_dst dst[1];
4287 struct ureg_src src[4];
4288 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4289
4290 unsigned num_dst;
4291 unsigned num_src;
4292 unsigned tex_target;
4293
4294 num_dst = num_inst_dst_regs(inst->op);
4295 num_src = num_inst_src_regs(inst->op);
4296
4297 if (num_dst)
4298 dst[0] = translate_dst(t,
4299 &inst->dst,
4300 inst->saturate,
4301 clamp_dst_color_output);
4302
4303 for (i = 0; i < num_src; i++)
4304 src[i] = translate_src(t, &inst->src[i]);
4305
4306 switch(inst->op) {
4307 case TGSI_OPCODE_BGNLOOP:
4308 case TGSI_OPCODE_CAL:
4309 case TGSI_OPCODE_ELSE:
4310 case TGSI_OPCODE_ENDLOOP:
4311 case TGSI_OPCODE_IF:
4312 assert(num_dst == 0);
4313 ureg_label_insn(ureg,
4314 inst->op,
4315 src, num_src,
4316 get_label(t,
4317 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4318 return;
4319
4320 case TGSI_OPCODE_TEX:
4321 case TGSI_OPCODE_TXB:
4322 case TGSI_OPCODE_TXD:
4323 case TGSI_OPCODE_TXL:
4324 case TGSI_OPCODE_TXP:
4325 case TGSI_OPCODE_TXQ:
4326 case TGSI_OPCODE_TXF:
4327 case TGSI_OPCODE_TEX2:
4328 case TGSI_OPCODE_TXB2:
4329 case TGSI_OPCODE_TXL2:
4330 src[num_src++] = t->samplers[inst->sampler];
4331 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4332 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4333 }
4334 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4335
4336 ureg_tex_insn(ureg,
4337 inst->op,
4338 dst, num_dst,
4339 tex_target,
4340 texoffsets, inst->tex_offset_num_offset,
4341 src, num_src);
4342 return;
4343
4344 case TGSI_OPCODE_SCS:
4345 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4346 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4347 break;
4348
4349 default:
4350 ureg_insn(ureg,
4351 inst->op,
4352 dst, num_dst,
4353 src, num_src);
4354 break;
4355 }
4356 }
4357
4358 /**
4359 * Emit the TGSI instructions for inverting and adjusting WPOS.
4360 * This code is unavoidable because it also depends on whether
4361 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4362 */
4363 static void
4364 emit_wpos_adjustment( struct st_translate *t,
4365 const struct gl_program *program,
4366 boolean invert,
4367 GLfloat adjX, GLfloat adjY[2])
4368 {
4369 struct ureg_program *ureg = t->ureg;
4370
4371 /* Fragment program uses fragment position input.
4372 * Need to replace instances of INPUT[WPOS] with temp T
4373 * where T = INPUT[WPOS] by y is inverted.
4374 */
4375 static const gl_state_index wposTransformState[STATE_LENGTH]
4376 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4377 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4378
4379 /* XXX: note we are modifying the incoming shader here! Need to
4380 * do this before emitting the constant decls below, or this
4381 * will be missed:
4382 */
4383 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4384 wposTransformState);
4385
4386 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4387 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4388 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4389
4390 /* First, apply the coordinate shift: */
4391 if (adjX || adjY[0] || adjY[1]) {
4392 if (adjY[0] != adjY[1]) {
4393 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4394 * depending on whether inversion is actually going to be applied
4395 * or not, which is determined by testing against the inversion
4396 * state variable used below, which will be either +1 or -1.
4397 */
4398 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4399
4400 ureg_CMP(ureg, adj_temp,
4401 ureg_scalar(wpostrans, invert ? 2 : 0),
4402 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4403 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4404 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4405 } else {
4406 ureg_ADD(ureg, wpos_temp, wpos_input,
4407 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4408 }
4409 wpos_input = ureg_src(wpos_temp);
4410 } else {
4411 /* MOV wpos_temp, input[wpos]
4412 */
4413 ureg_MOV( ureg, wpos_temp, wpos_input );
4414 }
4415
4416 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4417 * inversion/identity, or the other way around if we're drawing to an FBO.
4418 */
4419 if (invert) {
4420 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4421 */
4422 ureg_MAD( ureg,
4423 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4424 wpos_input,
4425 ureg_scalar(wpostrans, 0),
4426 ureg_scalar(wpostrans, 1));
4427 } else {
4428 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4429 */
4430 ureg_MAD( ureg,
4431 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4432 wpos_input,
4433 ureg_scalar(wpostrans, 2),
4434 ureg_scalar(wpostrans, 3));
4435 }
4436
4437 /* Use wpos_temp as position input from here on:
4438 */
4439 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4440 }
4441
4442
4443 /**
4444 * Emit fragment position/ooordinate code.
4445 */
4446 static void
4447 emit_wpos(struct st_context *st,
4448 struct st_translate *t,
4449 const struct gl_program *program,
4450 struct ureg_program *ureg)
4451 {
4452 const struct gl_fragment_program *fp =
4453 (const struct gl_fragment_program *) program;
4454 struct pipe_screen *pscreen = st->pipe->screen;
4455 GLfloat adjX = 0.0f;
4456 GLfloat adjY[2] = { 0.0f, 0.0f };
4457 boolean invert = FALSE;
4458
4459 /* Query the pixel center conventions supported by the pipe driver and set
4460 * adjX, adjY to help out if it cannot handle the requested one internally.
4461 *
4462 * The bias of the y-coordinate depends on whether y-inversion takes place
4463 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4464 * drawing to an FBO (causes additional inversion), and whether the the pipe
4465 * driver origin and the requested origin differ (the latter condition is
4466 * stored in the 'invert' variable).
4467 *
4468 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4469 *
4470 * center shift only:
4471 * i -> h: +0.5
4472 * h -> i: -0.5
4473 *
4474 * inversion only:
4475 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4476 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4477 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4478 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4479 *
4480 * inversion and center shift:
4481 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4482 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4483 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4484 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4485 */
4486 if (fp->OriginUpperLeft) {
4487 /* Fragment shader wants origin in upper-left */
4488 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4489 /* the driver supports upper-left origin */
4490 }
4491 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4492 /* the driver supports lower-left origin, need to invert Y */
4493 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4494 invert = TRUE;
4495 }
4496 else
4497 assert(0);
4498 }
4499 else {
4500 /* Fragment shader wants origin in lower-left */
4501 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4502 /* the driver supports lower-left origin */
4503 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4504 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4505 /* the driver supports upper-left origin, need to invert Y */
4506 invert = TRUE;
4507 else
4508 assert(0);
4509 }
4510
4511 if (fp->PixelCenterInteger) {
4512 /* Fragment shader wants pixel center integer */
4513 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4514 /* the driver supports pixel center integer */
4515 adjY[1] = 1.0f;
4516 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4517 }
4518 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4519 /* the driver supports pixel center half integer, need to bias X,Y */
4520 adjX = -0.5f;
4521 adjY[0] = -0.5f;
4522 adjY[1] = 0.5f;
4523 }
4524 else
4525 assert(0);
4526 }
4527 else {
4528 /* Fragment shader wants pixel center half integer */
4529 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4530 /* the driver supports pixel center half integer */
4531 }
4532 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4533 /* the driver supports pixel center integer, need to bias X,Y */
4534 adjX = adjY[0] = adjY[1] = 0.5f;
4535 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4536 }
4537 else
4538 assert(0);
4539 }
4540
4541 /* we invert after adjustment so that we avoid the MOV to temporary,
4542 * and reuse the adjustment ADD instead */
4543 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4544 }
4545
4546 /**
4547 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4548 * TGSI uses +1 for front, -1 for back.
4549 * This function converts the TGSI value to the GL value. Simply clamping/
4550 * saturating the value to [0,1] does the job.
4551 */
4552 static void
4553 emit_face_var(struct st_translate *t)
4554 {
4555 struct ureg_program *ureg = t->ureg;
4556 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4557 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4558
4559 /* MOV_SAT face_temp, input[face] */
4560 face_temp = ureg_saturate(face_temp);
4561 ureg_MOV(ureg, face_temp, face_input);
4562
4563 /* Use face_temp as face input from here on: */
4564 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4565 }
4566
4567 static void
4568 emit_edgeflags(struct st_translate *t)
4569 {
4570 struct ureg_program *ureg = t->ureg;
4571 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4572 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4573
4574 ureg_MOV(ureg, edge_dst, edge_src);
4575 }
4576
4577 /**
4578 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4579 * \param program the program to translate
4580 * \param numInputs number of input registers used
4581 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4582 * input indexes
4583 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4584 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4585 * each input
4586 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4587 * \param numOutputs number of output registers used
4588 * \param outputMapping maps Mesa fragment program outputs to TGSI
4589 * generic outputs
4590 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4591 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4592 * each output
4593 *
4594 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4595 */
4596 extern "C" enum pipe_error
4597 st_translate_program(
4598 struct gl_context *ctx,
4599 uint procType,
4600 struct ureg_program *ureg,
4601 glsl_to_tgsi_visitor *program,
4602 const struct gl_program *proginfo,
4603 GLuint numInputs,
4604 const GLuint inputMapping[],
4605 const ubyte inputSemanticName[],
4606 const ubyte inputSemanticIndex[],
4607 const GLuint interpMode[],
4608 const GLboolean is_centroid[],
4609 GLuint numOutputs,
4610 const GLuint outputMapping[],
4611 const ubyte outputSemanticName[],
4612 const ubyte outputSemanticIndex[],
4613 boolean passthrough_edgeflags,
4614 boolean clamp_color)
4615 {
4616 struct st_translate *t;
4617 unsigned i;
4618 enum pipe_error ret = PIPE_OK;
4619
4620 assert(numInputs <= Elements(t->inputs));
4621 assert(numOutputs <= Elements(t->outputs));
4622
4623 t = CALLOC_STRUCT(st_translate);
4624 if (!t) {
4625 ret = PIPE_ERROR_OUT_OF_MEMORY;
4626 goto out;
4627 }
4628
4629 memset(t, 0, sizeof *t);
4630
4631 t->procType = procType;
4632 t->inputMapping = inputMapping;
4633 t->outputMapping = outputMapping;
4634 t->ureg = ureg;
4635
4636 if (program->shader_program) {
4637 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4638 struct gl_uniform_storage *const storage =
4639 &program->shader_program->UniformStorage[i];
4640
4641 _mesa_uniform_detach_all_driver_storage(storage);
4642 }
4643 }
4644
4645 /*
4646 * Declare input attributes.
4647 */
4648 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4649 for (i = 0; i < numInputs; i++) {
4650 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4651 inputSemanticName[i],
4652 inputSemanticIndex[i],
4653 interpMode[i], 0,
4654 is_centroid[i]);
4655 }
4656
4657 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4658 /* Must do this after setting up t->inputs, and before
4659 * emitting constant references, below:
4660 */
4661 emit_wpos(st_context(ctx), t, proginfo, ureg);
4662 }
4663
4664 if (proginfo->InputsRead & FRAG_BIT_FACE)
4665 emit_face_var(t);
4666
4667 /*
4668 * Declare output attributes.
4669 */
4670 for (i = 0; i < numOutputs; i++) {
4671 switch (outputSemanticName[i]) {
4672 case TGSI_SEMANTIC_POSITION:
4673 t->outputs[i] = ureg_DECL_output(ureg,
4674 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4675 outputSemanticIndex[i]);
4676 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4677 break;
4678 case TGSI_SEMANTIC_STENCIL:
4679 t->outputs[i] = ureg_DECL_output(ureg,
4680 TGSI_SEMANTIC_STENCIL, /* Stencil */
4681 outputSemanticIndex[i]);
4682 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4683 break;
4684 case TGSI_SEMANTIC_COLOR:
4685 t->outputs[i] = ureg_DECL_output(ureg,
4686 TGSI_SEMANTIC_COLOR,
4687 outputSemanticIndex[i]);
4688 break;
4689 default:
4690 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4691 ret = PIPE_ERROR_BAD_INPUT;
4692 goto out;
4693 }
4694 }
4695 }
4696 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4697 for (i = 0; i < numInputs; i++) {
4698 t->inputs[i] = ureg_DECL_gs_input(ureg,
4699 i,
4700 inputSemanticName[i],
4701 inputSemanticIndex[i]);
4702 }
4703
4704 for (i = 0; i < numOutputs; i++) {
4705 t->outputs[i] = ureg_DECL_output(ureg,
4706 outputSemanticName[i],
4707 outputSemanticIndex[i]);
4708 }
4709 }
4710 else {
4711 assert(procType == TGSI_PROCESSOR_VERTEX);
4712
4713 for (i = 0; i < numInputs; i++) {
4714 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4715 }
4716
4717 for (i = 0; i < numOutputs; i++) {
4718 t->outputs[i] = ureg_DECL_output(ureg,
4719 outputSemanticName[i],
4720 outputSemanticIndex[i]);
4721 }
4722 if (passthrough_edgeflags)
4723 emit_edgeflags(t);
4724 }
4725
4726 /* Declare address register.
4727 */
4728 if (program->num_address_regs > 0) {
4729 assert(program->num_address_regs == 1);
4730 t->address[0] = ureg_DECL_address(ureg);
4731 }
4732
4733 /* Declare misc input registers
4734 */
4735 {
4736 GLbitfield sysInputs = proginfo->SystemValuesRead;
4737 unsigned numSys = 0;
4738 for (i = 0; sysInputs; i++) {
4739 if (sysInputs & (1 << i)) {
4740 unsigned semName = mesa_sysval_to_semantic[i];
4741 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4742 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4743 semName == TGSI_SEMANTIC_VERTEXID) {
4744 /* From Gallium perspective, these system values are always
4745 * integer, and require native integer support. However, if
4746 * native integer is supported on the vertex stage but not the
4747 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4748 * assumes these system values are floats. To resolve the
4749 * inconsistency, we insert a U2F.
4750 */
4751 struct st_context *st = st_context(ctx);
4752 struct pipe_screen *pscreen = st->pipe->screen;
4753 assert(procType == TGSI_PROCESSOR_VERTEX);
4754 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4755 if (!ctx->Const.NativeIntegers) {
4756 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4757 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4758 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4759 }
4760 }
4761 numSys++;
4762 sysInputs &= ~(1 << i);
4763 }
4764 }
4765 }
4766
4767 if (program->indirect_addr_temps) {
4768 /* If temps are accessed with indirect addressing, declare temporaries
4769 * in sequential order. Else, we declare them on demand elsewhere.
4770 * (Note: the number of temporaries is equal to program->next_temp)
4771 */
4772 for (i = 0; i < (unsigned)program->next_temp; i++) {
4773 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4774 t->temps[i] = ureg_DECL_local_temporary(t->ureg);
4775 }
4776 }
4777
4778 /* Emit constants and uniforms. TGSI uses a single index space for these,
4779 * so we put all the translated regs in t->constants.
4780 */
4781 if (proginfo->Parameters) {
4782 t->constants = (struct ureg_src *)
4783 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4784 if (t->constants == NULL) {
4785 ret = PIPE_ERROR_OUT_OF_MEMORY;
4786 goto out;
4787 }
4788
4789 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4790 switch (proginfo->Parameters->Parameters[i].Type) {
4791 case PROGRAM_ENV_PARAM:
4792 case PROGRAM_LOCAL_PARAM:
4793 case PROGRAM_STATE_VAR:
4794 case PROGRAM_UNIFORM:
4795 t->constants[i] = ureg_DECL_constant(ureg, i);
4796 break;
4797
4798 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4799 * addressing of the const buffer.
4800 * FIXME: Be smarter and recognize param arrays:
4801 * indirect addressing is only valid within the referenced
4802 * array.
4803 */
4804 case PROGRAM_CONSTANT:
4805 if (program->indirect_addr_consts)
4806 t->constants[i] = ureg_DECL_constant(ureg, i);
4807 else
4808 t->constants[i] = emit_immediate(t,
4809 proginfo->Parameters->ParameterValues[i],
4810 proginfo->Parameters->Parameters[i].DataType,
4811 4);
4812 break;
4813 default:
4814 break;
4815 }
4816 }
4817 }
4818
4819 if (program->shader_program) {
4820 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4821
4822 for (i = 0; i < num_ubos; i++) {
4823 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4824 }
4825 }
4826
4827 /* Emit immediate values.
4828 */
4829 t->immediates = (struct ureg_src *)
4830 calloc(program->num_immediates, sizeof(struct ureg_src));
4831 if (t->immediates == NULL) {
4832 ret = PIPE_ERROR_OUT_OF_MEMORY;
4833 goto out;
4834 }
4835 i = 0;
4836 foreach_iter(exec_list_iterator, iter, program->immediates) {
4837 immediate_storage *imm = (immediate_storage *)iter.get();
4838 assert(i < program->num_immediates);
4839 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4840 }
4841 assert(i == program->num_immediates);
4842
4843 /* texture samplers */
4844 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4845 if (program->samplers_used & (1 << i)) {
4846 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4847 }
4848 }
4849
4850 /* Emit each instruction in turn:
4851 */
4852 foreach_iter(exec_list_iterator, iter, program->instructions) {
4853 set_insn_start(t, ureg_get_instruction_number(ureg));
4854 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4855 clamp_color);
4856 }
4857
4858 /* Fix up all emitted labels:
4859 */
4860 for (i = 0; i < t->labels_count; i++) {
4861 ureg_fixup_label(ureg, t->labels[i].token,
4862 t->insn[t->labels[i].branch_target]);
4863 }
4864
4865 if (program->shader_program) {
4866 /* This has to be done last. Any operation the can cause
4867 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4868 * program constant) has to happen before creating this linkage.
4869 */
4870 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4871 if (program->shader_program->_LinkedShaders[i] == NULL)
4872 continue;
4873
4874 _mesa_associate_uniform_storage(ctx, program->shader_program,
4875 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4876 }
4877 }
4878
4879 out:
4880 if (t) {
4881 free(t->insn);
4882 free(t->labels);
4883 free(t->constants);
4884 free(t->immediates);
4885
4886 if (t->error) {
4887 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4888 }
4889
4890 free(t);
4891 }
4892
4893 return ret;
4894 }
4895 /* ----------------------------- End TGSI code ------------------------------ */
4896
4897 /**
4898 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4899 * generating Mesa IR.
4900 */
4901 static struct gl_program *
4902 get_mesa_program(struct gl_context *ctx,
4903 struct gl_shader_program *shader_program,
4904 struct gl_shader *shader)
4905 {
4906 glsl_to_tgsi_visitor* v;
4907 struct gl_program *prog;
4908 GLenum target;
4909 const char *target_string;
4910 bool progress;
4911 struct gl_shader_compiler_options *options =
4912 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4913
4914 switch (shader->Type) {
4915 case GL_VERTEX_SHADER:
4916 target = GL_VERTEX_PROGRAM_ARB;
4917 target_string = "vertex";
4918 break;
4919 case GL_FRAGMENT_SHADER:
4920 target = GL_FRAGMENT_PROGRAM_ARB;
4921 target_string = "fragment";
4922 break;
4923 case GL_GEOMETRY_SHADER:
4924 target = GL_GEOMETRY_PROGRAM_NV;
4925 target_string = "geometry";
4926 break;
4927 default:
4928 assert(!"should not be reached");
4929 return NULL;
4930 }
4931
4932 validate_ir_tree(shader->ir);
4933
4934 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4935 if (!prog)
4936 return NULL;
4937 prog->Parameters = _mesa_new_parameter_list();
4938 v = new glsl_to_tgsi_visitor();
4939 v->ctx = ctx;
4940 v->prog = prog;
4941 v->shader_program = shader_program;
4942 v->options = options;
4943 v->glsl_version = ctx->Const.GLSLVersion;
4944 v->native_integers = ctx->Const.NativeIntegers;
4945
4946 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4947 prog->Parameters);
4948
4949 /* Remove reads from output registers. */
4950 lower_output_reads(shader->ir);
4951
4952 /* Emit intermediate IR for main(). */
4953 visit_exec_list(shader->ir, v);
4954
4955 /* Now emit bodies for any functions that were used. */
4956 do {
4957 progress = GL_FALSE;
4958
4959 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4960 function_entry *entry = (function_entry *)iter.get();
4961
4962 if (!entry->bgn_inst) {
4963 v->current_function = entry;
4964
4965 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
4966 entry->bgn_inst->function = entry;
4967
4968 visit_exec_list(&entry->sig->body, v);
4969
4970 glsl_to_tgsi_instruction *last;
4971 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
4972 if (last->op != TGSI_OPCODE_RET)
4973 v->emit(NULL, TGSI_OPCODE_RET);
4974
4975 glsl_to_tgsi_instruction *end;
4976 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
4977 end->function = entry;
4978
4979 progress = GL_TRUE;
4980 }
4981 }
4982 } while (progress);
4983
4984 #if 0
4985 /* Print out some information (for debugging purposes) used by the
4986 * optimization passes. */
4987 for (i=0; i < v->next_temp; i++) {
4988 int fr = v->get_first_temp_read(i);
4989 int fw = v->get_first_temp_write(i);
4990 int lr = v->get_last_temp_read(i);
4991 int lw = v->get_last_temp_write(i);
4992
4993 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
4994 assert(fw <= fr);
4995 }
4996 #endif
4997
4998 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4999 v->simplify_cmp();
5000 v->copy_propagate();
5001 while (v->eliminate_dead_code_advanced());
5002
5003 /* FIXME: These passes to optimize temporary registers don't work when there
5004 * is indirect addressing of the temporary register space. We need proper
5005 * array support so that we don't have to give up these passes in every
5006 * shader that uses arrays.
5007 */
5008 if (!v->indirect_addr_temps) {
5009 v->eliminate_dead_code();
5010 v->merge_registers();
5011 v->renumber_registers();
5012 }
5013
5014 /* Write the END instruction. */
5015 v->emit(NULL, TGSI_OPCODE_END);
5016
5017 if (ctx->Shader.Flags & GLSL_DUMP) {
5018 printf("\n");
5019 printf("GLSL IR for linked %s program %d:\n", target_string,
5020 shader_program->Name);
5021 _mesa_print_ir(shader->ir, NULL);
5022 printf("\n");
5023 printf("\n");
5024 fflush(stdout);
5025 }
5026
5027 prog->Instructions = NULL;
5028 prog->NumInstructions = 0;
5029
5030 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
5031 count_resources(v, prog);
5032
5033 _mesa_reference_program(ctx, &shader->Program, prog);
5034
5035 /* This has to be done last. Any operation the can cause
5036 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5037 * program constant) has to happen before creating this linkage.
5038 */
5039 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5040 if (!shader_program->LinkStatus) {
5041 return NULL;
5042 }
5043
5044 struct st_vertex_program *stvp;
5045 struct st_fragment_program *stfp;
5046 struct st_geometry_program *stgp;
5047
5048 switch (shader->Type) {
5049 case GL_VERTEX_SHADER:
5050 stvp = (struct st_vertex_program *)prog;
5051 stvp->glsl_to_tgsi = v;
5052 break;
5053 case GL_FRAGMENT_SHADER:
5054 stfp = (struct st_fragment_program *)prog;
5055 stfp->glsl_to_tgsi = v;
5056 break;
5057 case GL_GEOMETRY_SHADER:
5058 stgp = (struct st_geometry_program *)prog;
5059 stgp->glsl_to_tgsi = v;
5060 break;
5061 default:
5062 assert(!"should not be reached");
5063 return NULL;
5064 }
5065
5066 return prog;
5067 }
5068
5069 extern "C" {
5070
5071 struct gl_shader *
5072 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5073 {
5074 struct gl_shader *shader;
5075 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5076 type == GL_GEOMETRY_SHADER_ARB);
5077 shader = rzalloc(NULL, struct gl_shader);
5078 if (shader) {
5079 shader->Type = type;
5080 shader->Name = name;
5081 _mesa_init_shader(ctx, shader);
5082 }
5083 return shader;
5084 }
5085
5086 struct gl_shader_program *
5087 st_new_shader_program(struct gl_context *ctx, GLuint name)
5088 {
5089 struct gl_shader_program *shProg;
5090 shProg = rzalloc(NULL, struct gl_shader_program);
5091 if (shProg) {
5092 shProg->Name = name;
5093 _mesa_init_shader_program(ctx, shProg);
5094 }
5095 return shProg;
5096 }
5097
5098 /**
5099 * Link a shader.
5100 * Called via ctx->Driver.LinkShader()
5101 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5102 * with code lowering and other optimizations.
5103 */
5104 GLboolean
5105 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5106 {
5107 assert(prog->LinkStatus);
5108
5109 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5110 if (prog->_LinkedShaders[i] == NULL)
5111 continue;
5112
5113 bool progress;
5114 exec_list *ir = prog->_LinkedShaders[i]->ir;
5115 const struct gl_shader_compiler_options *options =
5116 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5117
5118 do {
5119 unsigned what_to_lower = MOD_TO_FRACT | DIV_TO_MUL_RCP |
5120 EXP_TO_EXP2 | LOG_TO_LOG2;
5121 if (options->EmitNoPow)
5122 what_to_lower |= POW_TO_EXP2;
5123 if (!ctx->Const.NativeIntegers)
5124 what_to_lower |= INT_DIV_TO_MUL_RCP;
5125
5126 progress = false;
5127
5128 /* Lowering */
5129 do_mat_op_to_vec(ir);
5130 lower_instructions(ir, what_to_lower);
5131
5132 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5133
5134 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5135
5136 progress = do_common_optimization(ir, true, true,
5137 options->MaxUnrollIterations)
5138 || progress;
5139
5140 progress = lower_quadop_vector(ir, false) || progress;
5141
5142 if (options->MaxIfDepth == 0)
5143 progress = lower_discard(ir) || progress;
5144
5145 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5146
5147 if (options->EmitNoNoise)
5148 progress = lower_noise(ir) || progress;
5149
5150 /* If there are forms of indirect addressing that the driver
5151 * cannot handle, perform the lowering pass.
5152 */
5153 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
5154 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
5155 progress =
5156 lower_variable_index_to_cond_assign(ir,
5157 options->EmitNoIndirectInput,
5158 options->EmitNoIndirectOutput,
5159 options->EmitNoIndirectTemp,
5160 options->EmitNoIndirectUniform)
5161 || progress;
5162
5163 progress = do_vec_index_to_cond_assign(ir) || progress;
5164
5165 } while (progress);
5166
5167 validate_ir_tree(ir);
5168 }
5169
5170 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5171 struct gl_program *linked_prog;
5172
5173 if (prog->_LinkedShaders[i] == NULL)
5174 continue;
5175
5176 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5177
5178 if (linked_prog) {
5179 static const GLenum targets[] = {
5180 GL_VERTEX_PROGRAM_ARB,
5181 GL_FRAGMENT_PROGRAM_ARB,
5182 GL_GEOMETRY_PROGRAM_NV
5183 };
5184
5185 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5186 linked_prog);
5187 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5188 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5189 NULL);
5190 _mesa_reference_program(ctx, &linked_prog, NULL);
5191 return GL_FALSE;
5192 }
5193 }
5194
5195 _mesa_reference_program(ctx, &linked_prog, NULL);
5196 }
5197
5198 return GL_TRUE;
5199 }
5200
5201 void
5202 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5203 const GLuint outputMapping[],
5204 struct pipe_stream_output_info *so)
5205 {
5206 unsigned i;
5207 struct gl_transform_feedback_info *info =
5208 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5209
5210 for (i = 0; i < info->NumOutputs; i++) {
5211 so->output[i].register_index =
5212 outputMapping[info->Outputs[i].OutputRegister];
5213 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5214 so->output[i].num_components = info->Outputs[i].NumComponents;
5215 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5216 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5217 }
5218
5219 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5220 so->stride[i] = info->BufferStride[i];
5221 }
5222 so->num_outputs = info->NumOutputs;
5223 }
5224
5225 } /* extern "C" */