2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
81 * Maximum number of temporary registers.
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
86 #define MAX_TEMPS 4096
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
94 static int swizzle_for_size(int size
);
97 * This struct is a corresponding struct to TGSI ureg_src.
101 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
105 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
106 this->swizzle
= swizzle_for_size(type
->vector_elements
);
108 this->swizzle
= SWIZZLE_XYZW
;
111 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
112 this->reladdr
= NULL
;
115 st_src_reg(gl_register_file file
, int index
, int type
)
121 this->swizzle
= SWIZZLE_XYZW
;
123 this->reladdr
= NULL
;
126 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
131 this->index2D
= index2D
;
132 this->swizzle
= SWIZZLE_XYZW
;
134 this->reladdr
= NULL
;
139 this->type
= GLSL_TYPE_ERROR
;
140 this->file
= PROGRAM_UNDEFINED
;
145 this->reladdr
= NULL
;
148 explicit st_src_reg(st_dst_reg reg
);
150 gl_register_file file
; /**< PROGRAM_* from Mesa */
151 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
153 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
154 int negate
; /**< NEGATE_XYZW mask from mesa */
155 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
156 /** Register index should be offset by the integer in this reg. */
162 st_dst_reg(gl_register_file file
, int writemask
, int type
)
166 this->writemask
= writemask
;
167 this->cond_mask
= COND_TR
;
168 this->reladdr
= NULL
;
174 this->type
= GLSL_TYPE_ERROR
;
175 this->file
= PROGRAM_UNDEFINED
;
178 this->cond_mask
= COND_TR
;
179 this->reladdr
= NULL
;
182 explicit st_dst_reg(st_src_reg reg
);
184 gl_register_file file
; /**< PROGRAM_* from Mesa */
185 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
186 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
188 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
189 /** Register index should be offset by the integer in this reg. */
193 st_src_reg::st_src_reg(st_dst_reg reg
)
195 this->type
= reg
.type
;
196 this->file
= reg
.file
;
197 this->index
= reg
.index
;
198 this->swizzle
= SWIZZLE_XYZW
;
200 this->reladdr
= reg
.reladdr
;
204 st_dst_reg::st_dst_reg(st_src_reg reg
)
206 this->type
= reg
.type
;
207 this->file
= reg
.file
;
208 this->index
= reg
.index
;
209 this->writemask
= WRITEMASK_XYZW
;
210 this->cond_mask
= COND_TR
;
211 this->reladdr
= reg
.reladdr
;
214 class glsl_to_tgsi_instruction
: public exec_node
{
216 /* Callers of this ralloc-based new need not call delete. It's
217 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
218 static void* operator new(size_t size
, void *ctx
)
222 node
= rzalloc_size(ctx
, size
);
223 assert(node
!= NULL
);
231 /** Pointer to the ir source this tree came from for debugging */
233 GLboolean cond_update
;
235 int sampler
; /**< sampler index */
236 int tex_target
; /**< One of TEXTURE_*_INDEX */
237 GLboolean tex_shadow
;
238 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
239 unsigned tex_offset_num_offset
;
240 int dead_mask
; /**< Used in dead code elimination */
242 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
245 class variable_storage
: public exec_node
{
247 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
248 : file(file
), index(index
), var(var
)
253 gl_register_file file
;
255 ir_variable
*var
; /* variable that maps to this, if any */
258 class immediate_storage
: public exec_node
{
260 immediate_storage(gl_constant_value
*values
, int size
, int type
)
262 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
267 gl_constant_value values
[4];
268 int size
; /**< Number of components (1-4) */
269 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
272 class function_entry
: public exec_node
{
274 ir_function_signature
*sig
;
277 * identifier of this function signature used by the program.
279 * At the point that TGSI instructions for function calls are
280 * generated, we don't know the address of the first instruction of
281 * the function body. So we make the BranchTarget that is called a
282 * small integer and rewrite them during set_branchtargets().
287 * Pointer to first instruction of the function body.
289 * Set during function body emits after main() is processed.
291 glsl_to_tgsi_instruction
*bgn_inst
;
294 * Index of the first instruction of the function body in actual TGSI.
296 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
300 /** Storage for the return value. */
301 st_src_reg return_reg
;
304 struct glsl_to_tgsi_visitor
: public ir_visitor
{
306 glsl_to_tgsi_visitor();
307 ~glsl_to_tgsi_visitor();
309 function_entry
*current_function
;
311 struct gl_context
*ctx
;
312 struct gl_program
*prog
;
313 struct gl_shader_program
*shader_program
;
314 struct gl_shader_compiler_options
*options
;
318 int num_address_regs
;
320 bool indirect_addr_temps
;
321 bool indirect_addr_consts
;
324 bool native_integers
;
326 variable_storage
*find_variable_storage(ir_variable
*var
);
328 int add_constant(gl_register_file file
, gl_constant_value values
[4],
329 int size
, int datatype
, GLuint
*swizzle_out
);
331 function_entry
*get_function_signature(ir_function_signature
*sig
);
333 st_src_reg
get_temp(const glsl_type
*type
);
334 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
336 st_src_reg
st_src_reg_for_float(float val
);
337 st_src_reg
st_src_reg_for_int(int val
);
338 st_src_reg
st_src_reg_for_type(int type
, int val
);
341 * \name Visit methods
343 * As typical for the visitor pattern, there must be one \c visit method for
344 * each concrete subclass of \c ir_instruction. Virtual base classes within
345 * the hierarchy should not have \c visit methods.
348 virtual void visit(ir_variable
*);
349 virtual void visit(ir_loop
*);
350 virtual void visit(ir_loop_jump
*);
351 virtual void visit(ir_function_signature
*);
352 virtual void visit(ir_function
*);
353 virtual void visit(ir_expression
*);
354 virtual void visit(ir_swizzle
*);
355 virtual void visit(ir_dereference_variable
*);
356 virtual void visit(ir_dereference_array
*);
357 virtual void visit(ir_dereference_record
*);
358 virtual void visit(ir_assignment
*);
359 virtual void visit(ir_constant
*);
360 virtual void visit(ir_call
*);
361 virtual void visit(ir_return
*);
362 virtual void visit(ir_discard
*);
363 virtual void visit(ir_texture
*);
364 virtual void visit(ir_if
*);
369 /** List of variable_storage */
372 /** List of immediate_storage */
373 exec_list immediates
;
374 unsigned num_immediates
;
376 /** List of function_entry */
377 exec_list function_signatures
;
378 int next_signature_id
;
380 /** List of glsl_to_tgsi_instruction */
381 exec_list instructions
;
383 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
385 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
386 st_dst_reg dst
, st_src_reg src0
);
388 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
389 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
391 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
393 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
395 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
397 st_src_reg src0
, st_src_reg src1
);
400 * Emit the correct dot-product instruction for the type of arguments
402 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
408 void emit_scalar(ir_instruction
*ir
, unsigned op
,
409 st_dst_reg dst
, st_src_reg src0
);
411 void emit_scalar(ir_instruction
*ir
, unsigned op
,
412 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
414 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
416 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
418 void emit_scs(ir_instruction
*ir
, unsigned op
,
419 st_dst_reg dst
, const st_src_reg
&src
);
421 bool try_emit_mad(ir_expression
*ir
,
423 bool try_emit_mad_for_and_not(ir_expression
*ir
,
425 bool try_emit_sat(ir_expression
*ir
);
427 void emit_swz(ir_expression
*ir
);
429 bool process_move_condition(ir_rvalue
*ir
);
431 void simplify_cmp(void);
433 void rename_temp_register(int index
, int new_index
);
434 int get_first_temp_read(int index
);
435 int get_first_temp_write(int index
);
436 int get_last_temp_read(int index
);
437 int get_last_temp_write(int index
);
439 void copy_propagate(void);
440 void eliminate_dead_code(void);
441 int eliminate_dead_code_advanced(void);
442 void merge_registers(void);
443 void renumber_registers(void);
448 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
450 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
452 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
455 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
458 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
462 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
465 prog
->LinkStatus
= GL_FALSE
;
469 swizzle_for_size(int size
)
471 int size_swizzles
[4] = {
472 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
473 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
474 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
475 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
478 assert((size
>= 1) && (size
<= 4));
479 return size_swizzles
[size
- 1];
483 is_tex_instruction(unsigned opcode
)
485 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
490 num_inst_dst_regs(unsigned opcode
)
492 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
493 return info
->num_dst
;
497 num_inst_src_regs(unsigned opcode
)
499 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
500 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
503 glsl_to_tgsi_instruction
*
504 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
506 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
508 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
509 int num_reladdr
= 0, i
;
511 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
513 /* If we have to do relative addressing, we want to load the ARL
514 * reg directly for one of the regs, and preload the other reladdr
515 * sources into temps.
517 num_reladdr
+= dst
.reladdr
!= NULL
;
518 num_reladdr
+= src0
.reladdr
!= NULL
;
519 num_reladdr
+= src1
.reladdr
!= NULL
;
520 num_reladdr
+= src2
.reladdr
!= NULL
;
522 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
523 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
524 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
527 emit_arl(ir
, address_reg
, *dst
.reladdr
);
530 assert(num_reladdr
== 0);
540 inst
->function
= NULL
;
542 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
543 this->num_address_regs
= 1;
545 /* Update indirect addressing status used by TGSI */
548 case PROGRAM_TEMPORARY
:
549 this->indirect_addr_temps
= true;
551 case PROGRAM_LOCAL_PARAM
:
552 case PROGRAM_ENV_PARAM
:
553 case PROGRAM_STATE_VAR
:
554 case PROGRAM_CONSTANT
:
555 case PROGRAM_UNIFORM
:
556 this->indirect_addr_consts
= true;
558 case PROGRAM_IMMEDIATE
:
559 assert(!"immediates should not have indirect addressing");
566 for (i
=0; i
<3; i
++) {
567 if(inst
->src
[i
].reladdr
) {
568 switch(inst
->src
[i
].file
) {
569 case PROGRAM_TEMPORARY
:
570 this->indirect_addr_temps
= true;
572 case PROGRAM_LOCAL_PARAM
:
573 case PROGRAM_ENV_PARAM
:
574 case PROGRAM_STATE_VAR
:
575 case PROGRAM_CONSTANT
:
576 case PROGRAM_UNIFORM
:
577 this->indirect_addr_consts
= true;
579 case PROGRAM_IMMEDIATE
:
580 assert(!"immediates should not have indirect addressing");
589 this->instructions
.push_tail(inst
);
592 try_emit_float_set(ir
, op
, dst
);
598 glsl_to_tgsi_instruction
*
599 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
600 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
602 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
605 glsl_to_tgsi_instruction
*
606 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
607 st_dst_reg dst
, st_src_reg src0
)
609 assert(dst
.writemask
!= 0);
610 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
613 glsl_to_tgsi_instruction
*
614 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
616 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
620 * Emits the code to convert the result of float SET instructions to integers.
623 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
626 if ((op
== TGSI_OPCODE_SEQ
||
627 op
== TGSI_OPCODE_SNE
||
628 op
== TGSI_OPCODE_SGE
||
629 op
== TGSI_OPCODE_SLT
))
631 st_src_reg src
= st_src_reg(dst
);
632 src
.negate
= ~src
.negate
;
633 dst
.type
= GLSL_TYPE_FLOAT
;
634 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
639 * Determines whether to use an integer, unsigned integer, or float opcode
640 * based on the operands and input opcode, then emits the result.
643 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
645 st_src_reg src0
, st_src_reg src1
)
647 int type
= GLSL_TYPE_FLOAT
;
649 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
650 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
651 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
652 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
654 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
655 type
= GLSL_TYPE_FLOAT
;
656 else if (native_integers
)
657 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
659 #define case4(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
662 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
663 else op = TGSI_OPCODE_##f; \
665 #define case3(f, i, u) case4(f, f, i, u)
666 #define case2fi(f, i) case4(f, f, i, i)
667 #define case2iu(i, u) case4(i, LAST, i, u)
673 case3(DIV
, IDIV
, UDIV
);
674 case3(MAX
, IMAX
, UMAX
);
675 case3(MIN
, IMIN
, UMIN
);
680 case3(SGE
, ISGE
, USGE
);
681 case3(SLT
, ISLT
, USLT
);
686 case3(ABS
, IABS
, IABS
);
691 assert(op
!= TGSI_OPCODE_LAST
);
695 glsl_to_tgsi_instruction
*
696 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
697 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
700 static const unsigned dot_opcodes
[] = {
701 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
704 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
708 * Emits TGSI scalar opcodes to produce unique answers across channels.
710 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
711 * channel determines the result across all channels. So to do a vec4
712 * of this operation, we want to emit a scalar per source channel used
713 * to produce dest channels.
716 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
718 st_src_reg orig_src0
, st_src_reg orig_src1
)
721 int done_mask
= ~dst
.writemask
;
723 /* TGSI RCP is a scalar operation splatting results to all channels,
724 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
727 for (i
= 0; i
< 4; i
++) {
728 GLuint this_mask
= (1 << i
);
729 glsl_to_tgsi_instruction
*inst
;
730 st_src_reg src0
= orig_src0
;
731 st_src_reg src1
= orig_src1
;
733 if (done_mask
& this_mask
)
736 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
737 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
738 for (j
= i
+ 1; j
< 4; j
++) {
739 /* If there is another enabled component in the destination that is
740 * derived from the same inputs, generate its value on this pass as
743 if (!(done_mask
& (1 << j
)) &&
744 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
745 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
746 this_mask
|= (1 << j
);
749 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
750 src0_swiz
, src0_swiz
);
751 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
752 src1_swiz
, src1_swiz
);
754 inst
= emit(ir
, op
, dst
, src0
, src1
);
755 inst
->dst
.writemask
= this_mask
;
756 done_mask
|= this_mask
;
761 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
762 st_dst_reg dst
, st_src_reg src0
)
764 st_src_reg undef
= undef_src
;
766 undef
.swizzle
= SWIZZLE_XXXX
;
768 emit_scalar(ir
, op
, dst
, src0
, undef
);
772 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
773 st_dst_reg dst
, st_src_reg src0
)
775 int op
= TGSI_OPCODE_ARL
;
777 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
778 op
= TGSI_OPCODE_UARL
;
780 emit(NULL
, op
, dst
, src0
);
784 * Emit an TGSI_OPCODE_SCS instruction
786 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
787 * Instead of splatting its result across all four components of the
788 * destination, it writes one value to the \c x component and another value to
789 * the \c y component.
791 * \param ir IR instruction being processed
792 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
793 * on which value is desired.
794 * \param dst Destination register
795 * \param src Source register
798 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
800 const st_src_reg
&src
)
802 /* Vertex programs cannot use the SCS opcode.
804 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
805 emit_scalar(ir
, op
, dst
, src
);
809 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
810 const unsigned scs_mask
= (1U << component
);
811 int done_mask
= ~dst
.writemask
;
814 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
816 /* If there are compnents in the destination that differ from the component
817 * that will be written by the SCS instrution, we'll need a temporary.
819 if (scs_mask
!= unsigned(dst
.writemask
)) {
820 tmp
= get_temp(glsl_type::vec4_type
);
823 for (unsigned i
= 0; i
< 4; i
++) {
824 unsigned this_mask
= (1U << i
);
825 st_src_reg src0
= src
;
827 if ((done_mask
& this_mask
) != 0)
830 /* The source swizzle specified which component of the source generates
831 * sine / cosine for the current component in the destination. The SCS
832 * instruction requires that this value be swizzle to the X component.
833 * Replace the current swizzle with a swizzle that puts the source in
836 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
838 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
839 src0_swiz
, src0_swiz
);
840 for (unsigned j
= i
+ 1; j
< 4; j
++) {
841 /* If there is another enabled component in the destination that is
842 * derived from the same inputs, generate its value on this pass as
845 if (!(done_mask
& (1 << j
)) &&
846 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
847 this_mask
|= (1 << j
);
851 if (this_mask
!= scs_mask
) {
852 glsl_to_tgsi_instruction
*inst
;
853 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
855 /* Emit the SCS instruction.
857 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
858 inst
->dst
.writemask
= scs_mask
;
860 /* Move the result of the SCS instruction to the desired location in
863 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
864 component
, component
);
865 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
866 inst
->dst
.writemask
= this_mask
;
868 /* Emit the SCS instruction to write directly to the destination.
870 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
871 inst
->dst
.writemask
= scs_mask
;
874 done_mask
|= this_mask
;
879 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
880 gl_constant_value values
[4], int size
, int datatype
,
883 if (file
== PROGRAM_CONSTANT
) {
884 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
885 size
, datatype
, swizzle_out
);
888 immediate_storage
*entry
;
889 assert(file
== PROGRAM_IMMEDIATE
);
891 /* Search immediate storage to see if we already have an identical
892 * immediate that we can use instead of adding a duplicate entry.
894 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
895 entry
= (immediate_storage
*)iter
.get();
897 if (entry
->size
== size
&&
898 entry
->type
== datatype
&&
899 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
905 /* Add this immediate to the list. */
906 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
907 this->immediates
.push_tail(entry
);
908 this->num_immediates
++;
914 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
916 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
917 union gl_constant_value uval
;
920 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
926 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
928 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
929 union gl_constant_value uval
;
931 assert(native_integers
);
934 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
940 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
943 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
944 st_src_reg_for_int(val
);
946 return st_src_reg_for_float(val
);
950 type_size(const struct glsl_type
*type
)
955 switch (type
->base_type
) {
958 case GLSL_TYPE_FLOAT
:
960 if (type
->is_matrix()) {
961 return type
->matrix_columns
;
963 /* Regardless of size of vector, it gets a vec4. This is bad
964 * packing for things like floats, but otherwise arrays become a
965 * mess. Hopefully a later pass over the code can pack scalars
966 * down if appropriate.
970 case GLSL_TYPE_ARRAY
:
971 assert(type
->length
> 0);
972 return type_size(type
->fields
.array
) * type
->length
;
973 case GLSL_TYPE_STRUCT
:
975 for (i
= 0; i
< type
->length
; i
++) {
976 size
+= type_size(type
->fields
.structure
[i
].type
);
979 case GLSL_TYPE_SAMPLER
:
980 /* Samplers take up one slot in UNIFORMS[], but they're baked in
991 * In the initial pass of codegen, we assign temporary numbers to
992 * intermediate results. (not SSA -- variable assignments will reuse
996 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1000 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1001 src
.file
= PROGRAM_TEMPORARY
;
1002 src
.index
= next_temp
;
1004 next_temp
+= type_size(type
);
1006 if (type
->is_array() || type
->is_record()) {
1007 src
.swizzle
= SWIZZLE_NOOP
;
1009 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1017 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1020 variable_storage
*entry
;
1022 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1023 entry
= (variable_storage
*)iter
.get();
1025 if (entry
->var
== var
)
1033 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1035 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1036 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1038 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1039 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1042 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1044 const ir_state_slot
*const slots
= ir
->state_slots
;
1045 assert(ir
->state_slots
!= NULL
);
1047 /* Check if this statevar's setup in the STATE file exactly
1048 * matches how we'll want to reference it as a
1049 * struct/array/whatever. If not, then we need to move it into
1050 * temporary storage and hope that it'll get copy-propagated
1053 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1054 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1059 variable_storage
*storage
;
1061 if (i
== ir
->num_state_slots
) {
1062 /* We'll set the index later. */
1063 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1064 this->variables
.push_tail(storage
);
1068 /* The variable_storage constructor allocates slots based on the size
1069 * of the type. However, this had better match the number of state
1070 * elements that we're going to copy into the new temporary.
1072 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1074 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
1076 this->variables
.push_tail(storage
);
1077 this->next_temp
+= type_size(ir
->type
);
1079 dst
= st_dst_reg(st_src_reg(PROGRAM_TEMPORARY
, storage
->index
,
1080 native_integers
? ir
->type
->base_type
: GLSL_TYPE_FLOAT
));
1084 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1085 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1086 (gl_state_index
*)slots
[i
].tokens
);
1088 if (storage
->file
== PROGRAM_STATE_VAR
) {
1089 if (storage
->index
== -1) {
1090 storage
->index
= index
;
1092 assert(index
== storage
->index
+ (int)i
);
1095 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1096 * the data being moved since MOV does not care about the type of
1097 * data it is moving, and we don't want to declare registers with
1098 * array or struct types.
1100 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1101 src
.swizzle
= slots
[i
].swizzle
;
1102 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1103 /* even a float takes up a whole vec4 reg in a struct/array. */
1108 if (storage
->file
== PROGRAM_TEMPORARY
&&
1109 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1110 fail_link(this->shader_program
,
1111 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1112 ir
->name
, dst
.index
- storage
->index
,
1113 type_size(ir
->type
));
1119 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1121 ir_dereference_variable
*counter
= NULL
;
1123 if (ir
->counter
!= NULL
)
1124 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1126 if (ir
->from
!= NULL
) {
1127 assert(ir
->counter
!= NULL
);
1129 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1135 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1139 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1141 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1143 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1145 if_stmt
->then_instructions
.push_tail(brk
);
1147 if_stmt
->accept(this);
1154 visit_exec_list(&ir
->body_instructions
, this);
1156 if (ir
->increment
) {
1158 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1159 counter
, ir
->increment
);
1161 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1168 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1172 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1175 case ir_loop_jump::jump_break
:
1176 emit(NULL
, TGSI_OPCODE_BRK
);
1178 case ir_loop_jump::jump_continue
:
1179 emit(NULL
, TGSI_OPCODE_CONT
);
1186 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1193 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1195 /* Ignore function bodies other than main() -- we shouldn't see calls to
1196 * them since they should all be inlined before we get to glsl_to_tgsi.
1198 if (strcmp(ir
->name
, "main") == 0) {
1199 const ir_function_signature
*sig
;
1202 sig
= ir
->matching_signature(&empty
);
1206 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1207 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1215 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1217 int nonmul_operand
= 1 - mul_operand
;
1219 st_dst_reg result_dst
;
1221 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1222 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1225 expr
->operands
[0]->accept(this);
1227 expr
->operands
[1]->accept(this);
1229 ir
->operands
[nonmul_operand
]->accept(this);
1232 this->result
= get_temp(ir
->type
);
1233 result_dst
= st_dst_reg(this->result
);
1234 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1235 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1241 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1243 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1244 * implemented using multiplication, and logical-or is implemented using
1245 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1246 * As result, the logical expression (a & !b) can be rewritten as:
1250 * - (a * 1) - (a * b)
1254 * This final expression can be implemented as a single MAD(a, -b, a)
1258 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1260 const int other_operand
= 1 - try_operand
;
1263 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1264 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1267 ir
->operands
[other_operand
]->accept(this);
1269 expr
->operands
[0]->accept(this);
1272 b
.negate
= ~b
.negate
;
1274 this->result
= get_temp(ir
->type
);
1275 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1281 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1283 /* Saturates were only introduced to vertex programs in
1284 * NV_vertex_program3, so don't give them to drivers in the VP.
1286 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
1289 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1293 sat_src
->accept(this);
1294 st_src_reg src
= this->result
;
1296 /* If we generated an expression instruction into a temporary in
1297 * processing the saturate's operand, apply the saturate to that
1298 * instruction. Otherwise, generate a MOV to do the saturate.
1300 * Note that we have to be careful to only do this optimization if
1301 * the instruction in question was what generated src->result. For
1302 * example, ir_dereference_array might generate a MUL instruction
1303 * to create the reladdr, and return us a src reg using that
1304 * reladdr. That MUL result is not the value we're trying to
1307 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1308 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1309 sat_src_expr
->operation
== ir_binop_add
||
1310 sat_src_expr
->operation
== ir_binop_dot
)) {
1311 glsl_to_tgsi_instruction
*new_inst
;
1312 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1313 new_inst
->saturate
= true;
1315 this->result
= get_temp(ir
->type
);
1316 st_dst_reg result_dst
= st_dst_reg(this->result
);
1317 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1318 glsl_to_tgsi_instruction
*inst
;
1319 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1320 inst
->saturate
= true;
1327 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1328 st_src_reg
*reg
, int *num_reladdr
)
1333 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1335 if (*num_reladdr
!= 1) {
1336 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1338 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1346 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1348 unsigned int operand
;
1349 st_src_reg op
[Elements(ir
->operands
)];
1350 st_src_reg result_src
;
1351 st_dst_reg result_dst
;
1353 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1355 if (ir
->operation
== ir_binop_add
) {
1356 if (try_emit_mad(ir
, 1))
1358 if (try_emit_mad(ir
, 0))
1362 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1364 if (ir
->operation
== ir_binop_logic_and
) {
1365 if (try_emit_mad_for_and_not(ir
, 1))
1367 if (try_emit_mad_for_and_not(ir
, 0))
1371 if (try_emit_sat(ir
))
1374 if (ir
->operation
== ir_quadop_vector
)
1375 assert(!"ir_quadop_vector should have been lowered");
1377 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1378 this->result
.file
= PROGRAM_UNDEFINED
;
1379 ir
->operands
[operand
]->accept(this);
1380 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1382 printf("Failed to get tree for expression operand:\n");
1383 ir
->operands
[operand
]->accept(&v
);
1386 op
[operand
] = this->result
;
1388 /* Matrix expression operands should have been broken down to vector
1389 * operations already.
1391 assert(!ir
->operands
[operand
]->type
->is_matrix());
1394 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1395 if (ir
->operands
[1]) {
1396 vector_elements
= MAX2(vector_elements
,
1397 ir
->operands
[1]->type
->vector_elements
);
1400 this->result
.file
= PROGRAM_UNDEFINED
;
1402 /* Storage for our result. Ideally for an assignment we'd be using
1403 * the actual storage for the result here, instead.
1405 result_src
= get_temp(ir
->type
);
1406 /* convenience for the emit functions below. */
1407 result_dst
= st_dst_reg(result_src
);
1408 /* Limit writes to the channels that will be used by result_src later.
1409 * This does limit this temp's use as a temporary for multi-instruction
1412 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1414 switch (ir
->operation
) {
1415 case ir_unop_logic_not
:
1416 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1417 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1419 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1420 * older GPUs implement SEQ using multiple instructions (i915 uses two
1421 * SGE instructions and a MUL instruction). Since our logic values are
1422 * 0.0 and 1.0, 1-x also implements !x.
1424 op
[0].negate
= ~op
[0].negate
;
1425 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1429 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1430 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1432 op
[0].negate
= ~op
[0].negate
;
1437 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1440 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1443 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1447 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1451 assert(!"not reached: should be handled by ir_explog_to_explog2");
1454 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1457 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1460 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1462 case ir_unop_sin_reduced
:
1463 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1465 case ir_unop_cos_reduced
:
1466 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1470 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1474 /* The X component contains 1 or -1 depending on whether the framebuffer
1475 * is a FBO or the window system buffer, respectively.
1476 * It is then multiplied with the source operand of DDY.
1478 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1479 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1481 unsigned transform_y_index
=
1482 _mesa_add_state_reference(this->prog
->Parameters
,
1485 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1487 glsl_type::vec4_type
);
1488 transform_y
.swizzle
= SWIZZLE_XXXX
;
1490 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1492 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1493 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1497 case ir_unop_noise
: {
1498 /* At some point, a motivated person could add a better
1499 * implementation of noise. Currently not even the nvidia
1500 * binary drivers do anything more than this. In any case, the
1501 * place to do this is in the GL state tracker, not the poor
1504 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1509 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1512 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1516 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1519 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1520 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1522 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1525 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1526 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1528 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1532 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1534 case ir_binop_greater
:
1535 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1537 case ir_binop_lequal
:
1538 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1540 case ir_binop_gequal
:
1541 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1543 case ir_binop_equal
:
1544 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1546 case ir_binop_nequal
:
1547 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1549 case ir_binop_all_equal
:
1550 /* "==" operator producing a scalar boolean. */
1551 if (ir
->operands
[0]->type
->is_vector() ||
1552 ir
->operands
[1]->type
->is_vector()) {
1553 st_src_reg temp
= get_temp(native_integers
?
1554 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1555 glsl_type::vec4_type
);
1557 if (native_integers
) {
1558 st_dst_reg temp_dst
= st_dst_reg(temp
);
1559 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1561 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1563 /* Emit 1-3 AND operations to combine the SEQ results. */
1564 switch (ir
->operands
[0]->type
->vector_elements
) {
1568 temp_dst
.writemask
= WRITEMASK_Y
;
1569 temp1
.swizzle
= SWIZZLE_YYYY
;
1570 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1571 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1574 temp_dst
.writemask
= WRITEMASK_X
;
1575 temp1
.swizzle
= SWIZZLE_XXXX
;
1576 temp2
.swizzle
= SWIZZLE_YYYY
;
1577 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1578 temp_dst
.writemask
= WRITEMASK_Y
;
1579 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1580 temp2
.swizzle
= SWIZZLE_WWWW
;
1581 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1584 temp1
.swizzle
= SWIZZLE_XXXX
;
1585 temp2
.swizzle
= SWIZZLE_YYYY
;
1586 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1588 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1590 /* After the dot-product, the value will be an integer on the
1591 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1593 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1595 /* Negating the result of the dot-product gives values on the range
1596 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1597 * This is achieved using SGE.
1599 st_src_reg sge_src
= result_src
;
1600 sge_src
.negate
= ~sge_src
.negate
;
1601 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1604 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1607 case ir_binop_any_nequal
:
1608 /* "!=" operator producing a scalar boolean. */
1609 if (ir
->operands
[0]->type
->is_vector() ||
1610 ir
->operands
[1]->type
->is_vector()) {
1611 st_src_reg temp
= get_temp(native_integers
?
1612 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1613 glsl_type::vec4_type
);
1614 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1616 if (native_integers
) {
1617 st_dst_reg temp_dst
= st_dst_reg(temp
);
1618 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1620 /* Emit 1-3 OR operations to combine the SNE results. */
1621 switch (ir
->operands
[0]->type
->vector_elements
) {
1625 temp_dst
.writemask
= WRITEMASK_Y
;
1626 temp1
.swizzle
= SWIZZLE_YYYY
;
1627 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1628 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1631 temp_dst
.writemask
= WRITEMASK_X
;
1632 temp1
.swizzle
= SWIZZLE_XXXX
;
1633 temp2
.swizzle
= SWIZZLE_YYYY
;
1634 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1635 temp_dst
.writemask
= WRITEMASK_Y
;
1636 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1637 temp2
.swizzle
= SWIZZLE_WWWW
;
1638 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1641 temp1
.swizzle
= SWIZZLE_XXXX
;
1642 temp2
.swizzle
= SWIZZLE_YYYY
;
1643 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1645 /* After the dot-product, the value will be an integer on the
1646 * range [0,4]. Zero stays zero, and positive values become 1.0.
1648 glsl_to_tgsi_instruction
*const dp
=
1649 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1650 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1651 /* The clamping to [0,1] can be done for free in the fragment
1652 * shader with a saturate.
1654 dp
->saturate
= true;
1656 /* Negating the result of the dot-product gives values on the range
1657 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1658 * achieved using SLT.
1660 st_src_reg slt_src
= result_src
;
1661 slt_src
.negate
= ~slt_src
.negate
;
1662 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1666 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1671 assert(ir
->operands
[0]->type
->is_vector());
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1676 glsl_to_tgsi_instruction
*const dp
=
1677 emit_dp(ir
, result_dst
, op
[0], op
[0],
1678 ir
->operands
[0]->type
->vector_elements
);
1679 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1680 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1684 dp
->saturate
= true;
1685 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1690 st_src_reg slt_src
= result_src
;
1691 slt_src
.negate
= ~slt_src
.negate
;
1692 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1701 case ir_binop_logic_xor
:
1702 if (native_integers
)
1703 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1705 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1708 case ir_binop_logic_or
: {
1709 if (native_integers
) {
1710 /* If integers are used as booleans, we can use an actual "or"
1713 assert(native_integers
);
1714 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1716 /* After the addition, the value will be an integer on the
1717 * range [0,2]. Zero stays zero, and positive values become 1.0.
1719 glsl_to_tgsi_instruction
*add
=
1720 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1721 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1722 /* The clamping to [0,1] can be done for free in the fragment
1723 * shader with a saturate if floats are being used as boolean values.
1725 add
->saturate
= true;
1727 /* Negating the result of the addition gives values on the range
1728 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1729 * is achieved using SLT.
1731 st_src_reg slt_src
= result_src
;
1732 slt_src
.negate
= ~slt_src
.negate
;
1733 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1739 case ir_binop_logic_and
:
1740 /* If native integers are disabled, the bool args are stored as float 0.0
1741 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1742 * actual AND opcode.
1744 if (native_integers
)
1745 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1747 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1751 assert(ir
->operands
[0]->type
->is_vector());
1752 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1753 emit_dp(ir
, result_dst
, op
[0], op
[1],
1754 ir
->operands
[0]->type
->vector_elements
);
1758 /* sqrt(x) = x * rsq(x). */
1759 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1760 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1761 /* For incoming channels <= 0, set the result to 0. */
1762 op
[0].negate
= ~op
[0].negate
;
1763 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1764 op
[0], result_src
, st_src_reg_for_float(0.0));
1767 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1770 if (native_integers
) {
1771 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1774 /* fallthrough to next case otherwise */
1776 if (native_integers
) {
1777 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1780 /* fallthrough to next case otherwise */
1783 /* Converting between signed and unsigned integers is a no-op. */
1787 if (native_integers
) {
1788 /* Booleans are stored as integers using ~0 for true and 0 for false.
1789 * GLSL requires that int(bool) return 1 for true and 0 for false.
1790 * This conversion is done with AND, but it could be done with NEG.
1792 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1794 /* Booleans and integers are both stored as floats when native
1795 * integers are disabled.
1801 if (native_integers
)
1802 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1804 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1807 if (native_integers
)
1808 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1810 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1812 case ir_unop_bitcast_f2i
:
1813 case ir_unop_bitcast_f2u
:
1814 case ir_unop_bitcast_i2f
:
1815 case ir_unop_bitcast_u2f
:
1819 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1822 if (native_integers
)
1823 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1825 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1828 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1831 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1834 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1836 case ir_unop_round_even
:
1837 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1840 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1844 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1847 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1850 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1853 case ir_unop_bit_not
:
1854 if (native_integers
) {
1855 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1859 if (native_integers
) {
1860 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1863 case ir_binop_lshift
:
1864 if (native_integers
) {
1865 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1868 case ir_binop_rshift
:
1869 if (native_integers
) {
1870 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1873 case ir_binop_bit_and
:
1874 if (native_integers
) {
1875 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1878 case ir_binop_bit_xor
:
1879 if (native_integers
) {
1880 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1883 case ir_binop_bit_or
:
1884 if (native_integers
) {
1885 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1889 assert(!"GLSL 1.30 features unsupported");
1892 case ir_binop_ubo_load
: {
1893 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1894 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1895 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1896 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1899 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1900 cbuf
.file
= PROGRAM_CONSTANT
;
1902 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1903 cbuf
.reladdr
= NULL
;
1906 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1908 if (const_offset_ir
) {
1909 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1911 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1914 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1915 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1916 const_offset
% 16 / 4,
1917 const_offset
% 16 / 4,
1918 const_offset
% 16 / 4);
1920 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1921 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1923 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1924 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1925 result_src
.negate
= 1;
1926 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, result_src
, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1928 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1932 case ir_quadop_vector
:
1933 /* This operation should have already been handled.
1935 assert(!"Should not get here.");
1939 this->result
= result_src
;
1944 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1950 /* Note that this is only swizzles in expressions, not those on the left
1951 * hand side of an assignment, which do write masking. See ir_assignment
1955 ir
->val
->accept(this);
1957 assert(src
.file
!= PROGRAM_UNDEFINED
);
1959 for (i
= 0; i
< 4; i
++) {
1960 if (i
< ir
->type
->vector_elements
) {
1963 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1966 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1969 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1972 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1976 /* If the type is smaller than a vec4, replicate the last
1979 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1983 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1989 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
1991 variable_storage
*entry
= find_variable_storage(ir
->var
);
1992 ir_variable
*var
= ir
->var
;
1995 switch (var
->mode
) {
1996 case ir_var_uniform
:
1997 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1999 this->variables
.push_tail(entry
);
2003 /* The linker assigns locations for varyings and attributes,
2004 * including deprecated builtins (like gl_Color), user-assign
2005 * generic attributes (glBindVertexLocation), and
2006 * user-defined varyings.
2008 * FINISHME: We would hit this path for function arguments. Fix!
2010 assert(var
->location
!= -1);
2011 entry
= new(mem_ctx
) variable_storage(var
,
2016 assert(var
->location
!= -1);
2017 entry
= new(mem_ctx
) variable_storage(var
,
2019 var
->location
+ var
->index
);
2021 case ir_var_system_value
:
2022 entry
= new(mem_ctx
) variable_storage(var
,
2023 PROGRAM_SYSTEM_VALUE
,
2027 case ir_var_temporary
:
2028 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
2030 this->variables
.push_tail(entry
);
2032 next_temp
+= type_size(var
->type
);
2037 printf("Failed to make storage for %s\n", var
->name
);
2042 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2043 if (!native_integers
)
2044 this->result
.type
= GLSL_TYPE_FLOAT
;
2048 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2052 int element_size
= type_size(ir
->type
);
2054 index
= ir
->array_index
->constant_expression_value();
2056 ir
->array
->accept(this);
2060 src
.index
+= index
->value
.i
[0] * element_size
;
2062 /* Variable index array dereference. It eats the "vec4" of the
2063 * base of the array and an index that offsets the TGSI register
2066 ir
->array_index
->accept(this);
2068 st_src_reg index_reg
;
2070 if (element_size
== 1) {
2071 index_reg
= this->result
;
2073 index_reg
= get_temp(native_integers
?
2074 glsl_type::int_type
: glsl_type::float_type
);
2076 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2077 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2080 /* If there was already a relative address register involved, add the
2081 * new and the old together to get the new offset.
2083 if (src
.reladdr
!= NULL
) {
2084 st_src_reg accum_reg
= get_temp(native_integers
?
2085 glsl_type::int_type
: glsl_type::float_type
);
2087 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2088 index_reg
, *src
.reladdr
);
2090 index_reg
= accum_reg
;
2093 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2094 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2097 /* If the type is smaller than a vec4, replicate the last channel out. */
2098 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2099 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2101 src
.swizzle
= SWIZZLE_NOOP
;
2103 /* Change the register type to the element type of the array. */
2104 src
.type
= ir
->type
->base_type
;
2110 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2113 const glsl_type
*struct_type
= ir
->record
->type
;
2116 ir
->record
->accept(this);
2118 for (i
= 0; i
< struct_type
->length
; i
++) {
2119 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2121 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2124 /* If the type is smaller than a vec4, replicate the last channel out. */
2125 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2126 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2128 this->result
.swizzle
= SWIZZLE_NOOP
;
2130 this->result
.index
+= offset
;
2131 this->result
.type
= ir
->type
->base_type
;
2135 * We want to be careful in assignment setup to hit the actual storage
2136 * instead of potentially using a temporary like we might with the
2137 * ir_dereference handler.
2140 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2142 /* The LHS must be a dereference. If the LHS is a variable indexed array
2143 * access of a vector, it must be separated into a series conditional moves
2144 * before reaching this point (see ir_vec_index_to_cond_assign).
2146 assert(ir
->as_dereference());
2147 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2149 assert(!deref_array
->array
->type
->is_vector());
2152 /* Use the rvalue deref handler for the most part. We'll ignore
2153 * swizzles in it and write swizzles using writemask, though.
2156 return st_dst_reg(v
->result
);
2160 * Process the condition of a conditional assignment
2162 * Examines the condition of a conditional assignment to generate the optimal
2163 * first operand of a \c CMP instruction. If the condition is a relational
2164 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2165 * used as the source for the \c CMP instruction. Otherwise the comparison
2166 * is processed to a boolean result, and the boolean result is used as the
2167 * operand to the CMP instruction.
2170 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2172 ir_rvalue
*src_ir
= ir
;
2174 bool switch_order
= false;
2176 ir_expression
*const expr
= ir
->as_expression();
2177 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2178 bool zero_on_left
= false;
2180 if (expr
->operands
[0]->is_zero()) {
2181 src_ir
= expr
->operands
[1];
2182 zero_on_left
= true;
2183 } else if (expr
->operands
[1]->is_zero()) {
2184 src_ir
= expr
->operands
[0];
2185 zero_on_left
= false;
2189 * (a < 0) T F F ( a < 0) T F F
2190 * (0 < a) F F T (-a < 0) F F T
2191 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2192 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2193 * (a > 0) F F T (-a < 0) F F T
2194 * (0 > a) T F F ( a < 0) T F F
2195 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2196 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2198 * Note that exchanging the order of 0 and 'a' in the comparison simply
2199 * means that the value of 'a' should be negated.
2202 switch (expr
->operation
) {
2204 switch_order
= false;
2205 negate
= zero_on_left
;
2208 case ir_binop_greater
:
2209 switch_order
= false;
2210 negate
= !zero_on_left
;
2213 case ir_binop_lequal
:
2214 switch_order
= true;
2215 negate
= !zero_on_left
;
2218 case ir_binop_gequal
:
2219 switch_order
= true;
2220 negate
= zero_on_left
;
2224 /* This isn't the right kind of comparison afterall, so make sure
2225 * the whole condition is visited.
2233 src_ir
->accept(this);
2235 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2236 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2237 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2238 * computing the condition.
2241 this->result
.negate
= ~this->result
.negate
;
2243 return switch_order
;
2247 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2253 ir
->rhs
->accept(this);
2256 l
= get_assignment_lhs(ir
->lhs
, this);
2258 /* FINISHME: This should really set to the correct maximal writemask for each
2259 * FINISHME: component written (in the loops below). This case can only
2260 * FINISHME: occur for matrices, arrays, and structures.
2262 if (ir
->write_mask
== 0) {
2263 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2264 l
.writemask
= WRITEMASK_XYZW
;
2265 } else if (ir
->lhs
->type
->is_scalar() &&
2266 ir
->lhs
->variable_referenced()->mode
== ir_var_out
) {
2267 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2268 * FINISHME: W component of fragment shader output zero, work correctly.
2270 l
.writemask
= WRITEMASK_XYZW
;
2273 int first_enabled_chan
= 0;
2276 l
.writemask
= ir
->write_mask
;
2278 for (int i
= 0; i
< 4; i
++) {
2279 if (l
.writemask
& (1 << i
)) {
2280 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2285 /* Swizzle a small RHS vector into the channels being written.
2287 * glsl ir treats write_mask as dictating how many channels are
2288 * present on the RHS while TGSI treats write_mask as just
2289 * showing which channels of the vec4 RHS get written.
2291 for (int i
= 0; i
< 4; i
++) {
2292 if (l
.writemask
& (1 << i
))
2293 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2295 swizzles
[i
] = first_enabled_chan
;
2297 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2298 swizzles
[2], swizzles
[3]);
2301 assert(l
.file
!= PROGRAM_UNDEFINED
);
2302 assert(r
.file
!= PROGRAM_UNDEFINED
);
2304 if (ir
->condition
) {
2305 const bool switch_order
= this->process_move_condition(ir
->condition
);
2306 st_src_reg condition
= this->result
;
2308 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2309 st_src_reg l_src
= st_src_reg(l
);
2310 st_src_reg condition_temp
= condition
;
2311 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2313 if (native_integers
) {
2314 /* This is necessary because TGSI's CMP instruction expects the
2315 * condition to be a float, and we store booleans as integers.
2316 * If TGSI had a UCMP instruction or similar, this extra
2317 * instruction would not be necessary.
2319 condition_temp
= get_temp(glsl_type::vec4_type
);
2320 condition
.negate
= 0;
2321 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2322 condition_temp
.swizzle
= condition
.swizzle
;
2326 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2328 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2334 } else if (ir
->rhs
->as_expression() &&
2335 this->instructions
.get_tail() &&
2336 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2337 type_size(ir
->lhs
->type
) == 1 &&
2338 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2339 /* To avoid emitting an extra MOV when assigning an expression to a
2340 * variable, emit the last instruction of the expression again, but
2341 * replace the destination register with the target of the assignment.
2342 * Dead code elimination will remove the original instruction.
2344 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2345 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2346 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2347 new_inst
->saturate
= inst
->saturate
;
2348 inst
->dead_mask
= inst
->dst
.writemask
;
2350 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2351 if (ir
->rhs
->type
->is_array())
2352 r
.type
= ir
->rhs
->type
->element_type()->base_type
;
2353 else if (ir
->rhs
->type
->is_record())
2354 r
.type
= ir
->rhs
->type
->fields
.structure
[i
].type
->base_type
;
2355 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2364 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2367 GLfloat stack_vals
[4] = { 0 };
2368 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2369 GLenum gl_type
= GL_NONE
;
2371 static int in_array
= 0;
2372 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2374 /* Unfortunately, 4 floats is all we can get into
2375 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2376 * aggregate constant and move each constant value into it. If we
2377 * get lucky, copy propagation will eliminate the extra moves.
2379 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2380 st_src_reg temp_base
= get_temp(ir
->type
);
2381 st_dst_reg temp
= st_dst_reg(temp_base
);
2383 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2384 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2385 int size
= type_size(field_value
->type
);
2389 field_value
->accept(this);
2392 for (i
= 0; i
< (unsigned int)size
; i
++) {
2393 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2399 this->result
= temp_base
;
2403 if (ir
->type
->is_array()) {
2404 st_src_reg temp_base
= get_temp(ir
->type
);
2405 st_dst_reg temp
= st_dst_reg(temp_base
);
2406 int size
= type_size(ir
->type
->fields
.array
);
2411 for (i
= 0; i
< ir
->type
->length
; i
++) {
2412 ir
->array_elements
[i
]->accept(this);
2414 for (int j
= 0; j
< size
; j
++) {
2415 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2421 this->result
= temp_base
;
2426 if (ir
->type
->is_matrix()) {
2427 st_src_reg mat
= get_temp(ir
->type
);
2428 st_dst_reg mat_column
= st_dst_reg(mat
);
2430 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2431 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2432 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2434 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2435 src
.index
= add_constant(file
,
2437 ir
->type
->vector_elements
,
2440 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2449 switch (ir
->type
->base_type
) {
2450 case GLSL_TYPE_FLOAT
:
2452 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2453 values
[i
].f
= ir
->value
.f
[i
];
2456 case GLSL_TYPE_UINT
:
2457 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2458 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2459 if (native_integers
)
2460 values
[i
].u
= ir
->value
.u
[i
];
2462 values
[i
].f
= ir
->value
.u
[i
];
2466 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2467 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2468 if (native_integers
)
2469 values
[i
].i
= ir
->value
.i
[i
];
2471 values
[i
].f
= ir
->value
.i
[i
];
2474 case GLSL_TYPE_BOOL
:
2475 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2476 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2477 if (native_integers
)
2478 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2480 values
[i
].f
= ir
->value
.b
[i
];
2484 assert(!"Non-float/uint/int/bool constant");
2487 this->result
= st_src_reg(file
, -1, ir
->type
);
2488 this->result
.index
= add_constant(file
,
2490 ir
->type
->vector_elements
,
2492 &this->result
.swizzle
);
2496 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2498 function_entry
*entry
;
2500 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2501 entry
= (function_entry
*)iter
.get();
2503 if (entry
->sig
== sig
)
2507 entry
= ralloc(mem_ctx
, function_entry
);
2509 entry
->sig_id
= this->next_signature_id
++;
2510 entry
->bgn_inst
= NULL
;
2512 /* Allocate storage for all the parameters. */
2513 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2514 ir_variable
*param
= (ir_variable
*)iter
.get();
2515 variable_storage
*storage
;
2517 storage
= find_variable_storage(param
);
2520 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
2522 this->variables
.push_tail(storage
);
2524 this->next_temp
+= type_size(param
->type
);
2527 if (!sig
->return_type
->is_void()) {
2528 entry
->return_reg
= get_temp(sig
->return_type
);
2530 entry
->return_reg
= undef_src
;
2533 this->function_signatures
.push_tail(entry
);
2538 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2540 glsl_to_tgsi_instruction
*call_inst
;
2541 ir_function_signature
*sig
= ir
->callee
;
2542 function_entry
*entry
= get_function_signature(sig
);
2545 /* Process in parameters. */
2546 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2547 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2548 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2549 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2551 if (param
->mode
== ir_var_in
||
2552 param
->mode
== ir_var_inout
) {
2553 variable_storage
*storage
= find_variable_storage(param
);
2556 param_rval
->accept(this);
2557 st_src_reg r
= this->result
;
2560 l
.file
= storage
->file
;
2561 l
.index
= storage
->index
;
2563 l
.writemask
= WRITEMASK_XYZW
;
2564 l
.cond_mask
= COND_TR
;
2566 for (i
= 0; i
< type_size(param
->type
); i
++) {
2567 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2575 assert(!sig_iter
.has_next());
2577 /* Emit call instruction */
2578 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2579 call_inst
->function
= entry
;
2581 /* Process out parameters. */
2582 sig_iter
= sig
->parameters
.iterator();
2583 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2584 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2585 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2587 if (param
->mode
== ir_var_out
||
2588 param
->mode
== ir_var_inout
) {
2589 variable_storage
*storage
= find_variable_storage(param
);
2593 r
.file
= storage
->file
;
2594 r
.index
= storage
->index
;
2596 r
.swizzle
= SWIZZLE_NOOP
;
2599 param_rval
->accept(this);
2600 st_dst_reg l
= st_dst_reg(this->result
);
2602 for (i
= 0; i
< type_size(param
->type
); i
++) {
2603 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2611 assert(!sig_iter
.has_next());
2613 /* Process return value. */
2614 this->result
= entry
->return_reg
;
2618 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2620 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
;
2621 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2622 glsl_to_tgsi_instruction
*inst
= NULL
;
2623 unsigned opcode
= TGSI_OPCODE_NOP
;
2624 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2625 bool is_cube_array
= false;
2627 /* if we are a cube array sampler */
2628 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2629 sampler_type
->sampler_array
)) {
2630 is_cube_array
= true;
2633 if (ir
->coordinate
) {
2634 ir
->coordinate
->accept(this);
2636 /* Put our coords in a temp. We'll need to modify them for shadow,
2637 * projection, or LOD, so the only case we'd use it as is is if
2638 * we're doing plain old texturing. The optimization passes on
2639 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2641 coord
= get_temp(glsl_type::vec4_type
);
2642 coord_dst
= st_dst_reg(coord
);
2643 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2646 if (ir
->projector
) {
2647 ir
->projector
->accept(this);
2648 projector
= this->result
;
2651 /* Storage for our result. Ideally for an assignment we'd be using
2652 * the actual storage for the result here, instead.
2654 result_src
= get_temp(ir
->type
);
2655 result_dst
= st_dst_reg(result_src
);
2659 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2662 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2663 ir
->lod_info
.bias
->accept(this);
2664 lod_info
= this->result
;
2667 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2668 ir
->lod_info
.lod
->accept(this);
2669 lod_info
= this->result
;
2672 opcode
= TGSI_OPCODE_TXD
;
2673 ir
->lod_info
.grad
.dPdx
->accept(this);
2675 ir
->lod_info
.grad
.dPdy
->accept(this);
2679 opcode
= TGSI_OPCODE_TXQ
;
2680 ir
->lod_info
.lod
->accept(this);
2681 lod_info
= this->result
;
2684 opcode
= TGSI_OPCODE_TXF
;
2685 ir
->lod_info
.lod
->accept(this);
2686 lod_info
= this->result
;
2688 ir
->offset
->accept(this);
2689 offset
= this->result
;
2694 if (ir
->projector
) {
2695 if (opcode
== TGSI_OPCODE_TEX
) {
2696 /* Slot the projector in as the last component of the coord. */
2697 coord_dst
.writemask
= WRITEMASK_W
;
2698 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2699 coord_dst
.writemask
= WRITEMASK_XYZW
;
2700 opcode
= TGSI_OPCODE_TXP
;
2702 st_src_reg coord_w
= coord
;
2703 coord_w
.swizzle
= SWIZZLE_WWWW
;
2705 /* For the other TEX opcodes there's no projective version
2706 * since the last slot is taken up by LOD info. Do the
2707 * projective divide now.
2709 coord_dst
.writemask
= WRITEMASK_W
;
2710 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2712 /* In the case where we have to project the coordinates "by hand,"
2713 * the shadow comparator value must also be projected.
2715 st_src_reg tmp_src
= coord
;
2716 if (ir
->shadow_comparitor
) {
2717 /* Slot the shadow value in as the second to last component of the
2720 ir
->shadow_comparitor
->accept(this);
2722 tmp_src
= get_temp(glsl_type::vec4_type
);
2723 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2725 /* Projective division not allowed for array samplers. */
2726 assert(!sampler_type
->sampler_array
);
2728 tmp_dst
.writemask
= WRITEMASK_Z
;
2729 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2731 tmp_dst
.writemask
= WRITEMASK_XY
;
2732 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2735 coord_dst
.writemask
= WRITEMASK_XYZ
;
2736 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2738 coord_dst
.writemask
= WRITEMASK_XYZW
;
2739 coord
.swizzle
= SWIZZLE_XYZW
;
2743 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2744 * comparator was put in the correct place (and projected) by the code,
2745 * above, that handles by-hand projection.
2747 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2748 /* Slot the shadow value in as the second to last component of the
2751 ir
->shadow_comparitor
->accept(this);
2753 if (is_cube_array
) {
2754 cube_sc
= get_temp(glsl_type::float_type
);
2755 cube_sc_dst
= st_dst_reg(cube_sc
);
2756 cube_sc_dst
.writemask
= WRITEMASK_X
;
2757 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2758 cube_sc_dst
.writemask
= WRITEMASK_X
;
2761 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2762 sampler_type
->sampler_array
) ||
2763 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2764 coord_dst
.writemask
= WRITEMASK_W
;
2766 coord_dst
.writemask
= WRITEMASK_Z
;
2769 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2770 coord_dst
.writemask
= WRITEMASK_XYZW
;
2774 if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2775 opcode
== TGSI_OPCODE_TXF
) {
2776 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2777 coord_dst
.writemask
= WRITEMASK_W
;
2778 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2779 coord_dst
.writemask
= WRITEMASK_XYZW
;
2782 if (opcode
== TGSI_OPCODE_TXD
)
2783 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2784 else if (opcode
== TGSI_OPCODE_TXQ
)
2785 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2786 else if (opcode
== TGSI_OPCODE_TXF
) {
2787 inst
= emit(ir
, opcode
, result_dst
, coord
);
2788 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2789 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2790 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2791 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2793 inst
= emit(ir
, opcode
, result_dst
, coord
);
2795 if (ir
->shadow_comparitor
)
2796 inst
->tex_shadow
= GL_TRUE
;
2798 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2799 this->shader_program
,
2803 inst
->tex_offset_num_offset
= 1;
2804 inst
->tex_offsets
[0].Index
= offset
.index
;
2805 inst
->tex_offsets
[0].File
= offset
.file
;
2806 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2807 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2808 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2811 switch (sampler_type
->sampler_dimensionality
) {
2812 case GLSL_SAMPLER_DIM_1D
:
2813 inst
->tex_target
= (sampler_type
->sampler_array
)
2814 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2816 case GLSL_SAMPLER_DIM_2D
:
2817 inst
->tex_target
= (sampler_type
->sampler_array
)
2818 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2820 case GLSL_SAMPLER_DIM_3D
:
2821 inst
->tex_target
= TEXTURE_3D_INDEX
;
2823 case GLSL_SAMPLER_DIM_CUBE
:
2824 inst
->tex_target
= (sampler_type
->sampler_array
)
2825 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2827 case GLSL_SAMPLER_DIM_RECT
:
2828 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2830 case GLSL_SAMPLER_DIM_BUF
:
2831 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2833 case GLSL_SAMPLER_DIM_EXTERNAL
:
2834 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2837 assert(!"Should not get here.");
2840 this->result
= result_src
;
2844 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2846 if (ir
->get_value()) {
2850 assert(current_function
);
2852 ir
->get_value()->accept(this);
2853 st_src_reg r
= this->result
;
2855 l
= st_dst_reg(current_function
->return_reg
);
2857 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2858 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2864 emit(ir
, TGSI_OPCODE_RET
);
2868 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2870 if (ir
->condition
) {
2871 ir
->condition
->accept(this);
2872 this->result
.negate
= ~this->result
.negate
;
2873 emit(ir
, TGSI_OPCODE_KIL
, undef_dst
, this->result
);
2875 emit(ir
, TGSI_OPCODE_KILP
);
2880 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2882 glsl_to_tgsi_instruction
*cond_inst
, *if_inst
;
2883 glsl_to_tgsi_instruction
*prev_inst
;
2885 prev_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2887 ir
->condition
->accept(this);
2888 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2890 if (this->options
->EmitCondCodes
) {
2891 cond_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2893 /* See if we actually generated any instruction for generating
2894 * the condition. If not, then cook up a move to a temp so we
2895 * have something to set cond_update on.
2897 if (cond_inst
== prev_inst
) {
2898 st_src_reg temp
= get_temp(glsl_type::bool_type
);
2899 cond_inst
= emit(ir
->condition
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), result
);
2901 cond_inst
->cond_update
= GL_TRUE
;
2903 if_inst
= emit(ir
->condition
, TGSI_OPCODE_IF
);
2904 if_inst
->dst
.cond_mask
= COND_NE
;
2906 if_inst
= emit(ir
->condition
, TGSI_OPCODE_IF
, undef_dst
, this->result
);
2909 this->instructions
.push_tail(if_inst
);
2911 visit_exec_list(&ir
->then_instructions
, this);
2913 if (!ir
->else_instructions
.is_empty()) {
2914 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
2915 visit_exec_list(&ir
->else_instructions
, this);
2918 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
2921 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2923 result
.file
= PROGRAM_UNDEFINED
;
2925 next_signature_id
= 1;
2927 current_function
= NULL
;
2928 num_address_regs
= 0;
2930 indirect_addr_temps
= false;
2931 indirect_addr_consts
= false;
2933 native_integers
= false;
2934 mem_ctx
= ralloc_context(NULL
);
2937 shader_program
= NULL
;
2941 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2943 ralloc_free(mem_ctx
);
2946 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
2953 * Count resources used by the given gpu program (number of texture
2957 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
2959 v
->samplers_used
= 0;
2961 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
2962 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
2964 if (is_tex_instruction(inst
->op
)) {
2965 v
->samplers_used
|= 1 << inst
->sampler
;
2967 if (inst
->tex_shadow
) {
2968 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
2973 prog
->SamplersUsed
= v
->samplers_used
;
2975 if (v
->shader_program
!= NULL
)
2976 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
2980 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
2981 struct gl_shader_program
*shader_program
,
2982 const char *name
, const glsl_type
*type
,
2985 if (type
->is_record()) {
2986 ir_constant
*field_constant
;
2988 field_constant
= (ir_constant
*)val
->components
.get_head();
2990 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2991 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
2992 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
2993 type
->fields
.structure
[i
].name
);
2994 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
2995 field_type
, field_constant
);
2996 field_constant
= (ir_constant
*)field_constant
->next
;
3002 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3004 if (offset
== GL_INVALID_INDEX
) {
3005 fail_link(shader_program
,
3006 "Couldn't find uniform for initializer %s\n", name
);
3009 int loc
= _mesa_uniform_merge_location_offset(index
, offset
);
3011 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3012 ir_constant
*element
;
3013 const glsl_type
*element_type
;
3014 if (type
->is_array()) {
3015 element
= val
->array_elements
[i
];
3016 element_type
= type
->fields
.array
;
3019 element_type
= type
;
3024 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3025 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3026 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3027 conv
[j
] = element
->value
.b
[j
];
3029 values
= (void *)conv
;
3030 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3031 element_type
->vector_elements
,
3034 values
= &element
->value
;
3037 if (element_type
->is_matrix()) {
3038 _mesa_uniform_matrix(ctx
, shader_program
,
3039 element_type
->matrix_columns
,
3040 element_type
->vector_elements
,
3041 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3043 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3044 values
, element_type
->gl_type
);
3052 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3053 * are read from the given src in this instruction
3056 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3058 int read_mask
= 0, comp
;
3060 /* Now, given the src swizzle and the written channels, find which
3061 * components are actually read
3063 for (comp
= 0; comp
< 4; ++comp
) {
3064 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3066 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3067 read_mask
|= 1 << coord
;
3074 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3075 * instruction is the first instruction to write to register T0. There are
3076 * several lowering passes done in GLSL IR (e.g. branches and
3077 * relative addressing) that create a large number of conditional assignments
3078 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3080 * Here is why this conversion is safe:
3081 * CMP T0, T1 T2 T0 can be expanded to:
3087 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3088 * as the original program. If (T1 < 0.0) evaluates to false, executing
3089 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3090 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3091 * because any instruction that was going to read from T0 after this was going
3092 * to read a garbage value anyway.
3095 glsl_to_tgsi_visitor::simplify_cmp(void)
3097 unsigned *tempWrites
;
3098 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3100 tempWrites
= new unsigned[MAX_TEMPS
];
3104 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3105 memset(outputWrites
, 0, sizeof(outputWrites
));
3107 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3108 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3109 unsigned prevWriteMask
= 0;
3111 /* Give up if we encounter relative addressing or flow control. */
3112 if (inst
->dst
.reladdr
||
3113 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3114 inst
->op
== TGSI_OPCODE_BGNSUB
||
3115 inst
->op
== TGSI_OPCODE_CONT
||
3116 inst
->op
== TGSI_OPCODE_END
||
3117 inst
->op
== TGSI_OPCODE_ENDSUB
||
3118 inst
->op
== TGSI_OPCODE_RET
) {
3122 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3123 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3124 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3125 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3126 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3127 assert(inst
->dst
.index
< MAX_TEMPS
);
3128 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3129 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3132 /* For a CMP to be considered a conditional write, the destination
3133 * register and source register two must be the same. */
3134 if (inst
->op
== TGSI_OPCODE_CMP
3135 && !(inst
->dst
.writemask
& prevWriteMask
)
3136 && inst
->src
[2].file
== inst
->dst
.file
3137 && inst
->src
[2].index
== inst
->dst
.index
3138 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3140 inst
->op
= TGSI_OPCODE_MOV
;
3141 inst
->src
[0] = inst
->src
[1];
3145 delete [] tempWrites
;
3148 /* Replaces all references to a temporary register index with another index. */
3150 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3152 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3153 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3156 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3157 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3158 inst
->src
[j
].index
== index
) {
3159 inst
->src
[j
].index
= new_index
;
3163 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3164 inst
->dst
.index
= new_index
;
3170 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3172 int depth
= 0; /* loop depth */
3173 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3176 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3177 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3179 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3180 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3181 inst
->src
[j
].index
== index
) {
3182 return (depth
== 0) ? i
: loop_start
;
3186 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3189 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3202 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3204 int depth
= 0; /* loop depth */
3205 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3208 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3209 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3211 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3212 return (depth
== 0) ? i
: loop_start
;
3215 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3218 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3231 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3233 int depth
= 0; /* loop depth */
3234 int last
= -1; /* index of last instruction that reads the temporary */
3237 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3238 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3240 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3241 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3242 inst
->src
[j
].index
== index
) {
3243 last
= (depth
== 0) ? i
: -2;
3247 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3249 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3250 if (--depth
== 0 && last
== -2)
3262 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3264 int depth
= 0; /* loop depth */
3265 int last
= -1; /* index of last instruction that writes to the temporary */
3268 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3269 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3271 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3272 last
= (depth
== 0) ? i
: -2;
3274 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3276 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3277 if (--depth
== 0 && last
== -2)
3289 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3290 * channels for copy propagation and updates following instructions to
3291 * use the original versions.
3293 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3294 * will occur. As an example, a TXP production before this pass:
3296 * 0: MOV TEMP[1], INPUT[4].xyyy;
3297 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3298 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3302 * 0: MOV TEMP[1], INPUT[4].xyyy;
3303 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3304 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3306 * which allows for dead code elimination on TEMP[1]'s writes.
3309 glsl_to_tgsi_visitor::copy_propagate(void)
3311 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3312 glsl_to_tgsi_instruction
*,
3313 this->next_temp
* 4);
3314 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3317 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3318 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3320 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3321 || inst
->dst
.index
< this->next_temp
);
3323 /* First, do any copy propagation possible into the src regs. */
3324 for (int r
= 0; r
< 3; r
++) {
3325 glsl_to_tgsi_instruction
*first
= NULL
;
3327 int acp_base
= inst
->src
[r
].index
* 4;
3329 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3330 inst
->src
[r
].reladdr
)
3333 /* See if we can find entries in the ACP consisting of MOVs
3334 * from the same src register for all the swizzled channels
3335 * of this src register reference.
3337 for (int i
= 0; i
< 4; i
++) {
3338 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3339 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3346 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3351 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3352 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3360 /* We've now validated that we can copy-propagate to
3361 * replace this src register reference. Do it.
3363 inst
->src
[r
].file
= first
->src
[0].file
;
3364 inst
->src
[r
].index
= first
->src
[0].index
;
3367 for (int i
= 0; i
< 4; i
++) {
3368 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3369 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3370 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3373 inst
->src
[r
].swizzle
= swizzle
;
3378 case TGSI_OPCODE_BGNLOOP
:
3379 case TGSI_OPCODE_ENDLOOP
:
3380 /* End of a basic block, clear the ACP entirely. */
3381 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3384 case TGSI_OPCODE_IF
:
3388 case TGSI_OPCODE_ENDIF
:
3389 case TGSI_OPCODE_ELSE
:
3390 /* Clear all channels written inside the block from the ACP, but
3391 * leaving those that were not touched.
3393 for (int r
= 0; r
< this->next_temp
; r
++) {
3394 for (int c
= 0; c
< 4; c
++) {
3395 if (!acp
[4 * r
+ c
])
3398 if (acp_level
[4 * r
+ c
] >= level
)
3399 acp
[4 * r
+ c
] = NULL
;
3402 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3407 /* Continuing the block, clear any written channels from
3410 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3411 /* Any temporary might be written, so no copy propagation
3412 * across this instruction.
3414 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3415 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3416 inst
->dst
.reladdr
) {
3417 /* Any output might be written, so no copy propagation
3418 * from outputs across this instruction.
3420 for (int r
= 0; r
< this->next_temp
; r
++) {
3421 for (int c
= 0; c
< 4; c
++) {
3422 if (!acp
[4 * r
+ c
])
3425 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3426 acp
[4 * r
+ c
] = NULL
;
3429 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3430 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3431 /* Clear where it's used as dst. */
3432 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3433 for (int c
= 0; c
< 4; c
++) {
3434 if (inst
->dst
.writemask
& (1 << c
)) {
3435 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3440 /* Clear where it's used as src. */
3441 for (int r
= 0; r
< this->next_temp
; r
++) {
3442 for (int c
= 0; c
< 4; c
++) {
3443 if (!acp
[4 * r
+ c
])
3446 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3448 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3449 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3450 inst
->dst
.writemask
& (1 << src_chan
))
3452 acp
[4 * r
+ c
] = NULL
;
3460 /* If this is a copy, add it to the ACP. */
3461 if (inst
->op
== TGSI_OPCODE_MOV
&&
3462 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3463 !inst
->dst
.reladdr
&&
3465 !inst
->src
[0].reladdr
&&
3466 !inst
->src
[0].negate
) {
3467 for (int i
= 0; i
< 4; i
++) {
3468 if (inst
->dst
.writemask
& (1 << i
)) {
3469 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3470 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3476 ralloc_free(acp_level
);
3481 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3483 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3484 * will occur. As an example, a TXP production after copy propagation but
3487 * 0: MOV TEMP[1], INPUT[4].xyyy;
3488 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3489 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3491 * and after this pass:
3493 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3495 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3496 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3499 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3503 for (i
=0; i
< this->next_temp
; i
++) {
3504 int last_read
= get_last_temp_read(i
);
3507 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3508 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3510 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3523 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3524 * code elimination. This is less primitive than eliminate_dead_code(), as it
3525 * is per-channel and can detect consecutive writes without a read between them
3526 * as dead code. However, there is some dead code that can be eliminated by
3527 * eliminate_dead_code() but not this function - for example, this function
3528 * cannot eliminate an instruction writing to a register that is never read and
3529 * is the only instruction writing to that register.
3531 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3535 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3537 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3538 glsl_to_tgsi_instruction
*,
3539 this->next_temp
* 4);
3540 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3544 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3545 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3547 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3548 || inst
->dst
.index
< this->next_temp
);
3551 case TGSI_OPCODE_BGNLOOP
:
3552 case TGSI_OPCODE_ENDLOOP
:
3553 case TGSI_OPCODE_CONT
:
3554 case TGSI_OPCODE_BRK
:
3555 /* End of a basic block, clear the write array entirely.
3557 * This keeps us from killing dead code when the writes are
3558 * on either side of a loop, even when the register isn't touched
3559 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3560 * dead code of this type, so it shouldn't make a difference as long as
3561 * the dead code elimination pass in the GLSL compiler does its job.
3563 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3566 case TGSI_OPCODE_ENDIF
:
3567 case TGSI_OPCODE_ELSE
:
3568 /* Promote the recorded level of all channels written inside the
3569 * preceding if or else block to the level above the if/else block.
3571 for (int r
= 0; r
< this->next_temp
; r
++) {
3572 for (int c
= 0; c
< 4; c
++) {
3573 if (!writes
[4 * r
+ c
])
3576 if (write_level
[4 * r
+ c
] == level
)
3577 write_level
[4 * r
+ c
] = level
-1;
3581 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3586 case TGSI_OPCODE_IF
:
3588 /* fallthrough to default case to mark the condition as read */
3591 /* Continuing the block, clear any channels from the write array that
3592 * are read by this instruction.
3594 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3595 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3596 /* Any temporary might be read, so no dead code elimination
3597 * across this instruction.
3599 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3600 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3601 /* Clear where it's used as src. */
3602 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3603 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3604 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3605 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3607 for (int c
= 0; c
< 4; c
++) {
3608 if (src_chans
& (1 << c
)) {
3609 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3617 /* If this instruction writes to a temporary, add it to the write array.
3618 * If there is already an instruction in the write array for one or more
3619 * of the channels, flag that channel write as dead.
3621 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3622 !inst
->dst
.reladdr
&&
3624 for (int c
= 0; c
< 4; c
++) {
3625 if (inst
->dst
.writemask
& (1 << c
)) {
3626 if (writes
[4 * inst
->dst
.index
+ c
]) {
3627 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3630 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3632 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3633 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3639 /* Anything still in the write array at this point is dead code. */
3640 for (int r
= 0; r
< this->next_temp
; r
++) {
3641 for (int c
= 0; c
< 4; c
++) {
3642 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3644 inst
->dead_mask
|= (1 << c
);
3648 /* Now actually remove the instructions that are completely dead and update
3649 * the writemask of other instructions with dead channels.
3651 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3652 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3654 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3656 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3661 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3664 ralloc_free(write_level
);
3665 ralloc_free(writes
);
3670 /* Merges temporary registers together where possible to reduce the number of
3671 * registers needed to run a program.
3673 * Produces optimal code only after copy propagation and dead code elimination
3676 glsl_to_tgsi_visitor::merge_registers(void)
3678 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3679 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3682 /* Read the indices of the last read and first write to each temp register
3683 * into an array so that we don't have to traverse the instruction list as
3685 for (i
=0; i
< this->next_temp
; i
++) {
3686 last_reads
[i
] = get_last_temp_read(i
);
3687 first_writes
[i
] = get_first_temp_write(i
);
3690 /* Start looking for registers with non-overlapping usages that can be
3691 * merged together. */
3692 for (i
=0; i
< this->next_temp
; i
++) {
3693 /* Don't touch unused registers. */
3694 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3696 for (j
=0; j
< this->next_temp
; j
++) {
3697 /* Don't touch unused registers. */
3698 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3700 /* We can merge the two registers if the first write to j is after or
3701 * in the same instruction as the last read from i. Note that the
3702 * register at index i will always be used earlier or at the same time
3703 * as the register at index j. */
3704 if (first_writes
[i
] <= first_writes
[j
] &&
3705 last_reads
[i
] <= first_writes
[j
])
3707 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3709 /* Update the first_writes and last_reads arrays with the new
3710 * values for the merged register index, and mark the newly unused
3711 * register index as such. */
3712 last_reads
[i
] = last_reads
[j
];
3713 first_writes
[j
] = -1;
3719 ralloc_free(last_reads
);
3720 ralloc_free(first_writes
);
3723 /* Reassign indices to temporary registers by reusing unused indices created
3724 * by optimization passes. */
3726 glsl_to_tgsi_visitor::renumber_registers(void)
3731 for (i
=0; i
< this->next_temp
; i
++) {
3732 if (get_first_temp_read(i
) < 0) continue;
3734 rename_temp_register(i
, new_index
);
3738 this->next_temp
= new_index
;
3742 * Returns a fragment program which implements the current pixel transfer ops.
3743 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3746 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3747 glsl_to_tgsi_visitor
*original
,
3748 int scale_and_bias
, int pixel_maps
)
3750 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3751 struct st_context
*st
= st_context(original
->ctx
);
3752 struct gl_program
*prog
= &fp
->Base
.Base
;
3753 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3754 st_src_reg coord
, src0
;
3756 glsl_to_tgsi_instruction
*inst
;
3758 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3759 v
->ctx
= original
->ctx
;
3761 v
->shader_program
= NULL
;
3762 v
->glsl_version
= original
->glsl_version
;
3763 v
->native_integers
= original
->native_integers
;
3764 v
->options
= original
->options
;
3765 v
->next_temp
= original
->next_temp
;
3766 v
->num_address_regs
= original
->num_address_regs
;
3767 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3768 v
->indirect_addr_temps
= original
->indirect_addr_temps
;
3769 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3770 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3771 v
->num_immediates
= original
->num_immediates
;
3774 * Get initial pixel color from the texture.
3775 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3777 coord
= st_src_reg(PROGRAM_INPUT
, FRAG_ATTRIB_TEX0
, glsl_type::vec2_type
);
3778 src0
= v
->get_temp(glsl_type::vec4_type
);
3779 dst0
= st_dst_reg(src0
);
3780 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3782 inst
->tex_target
= TEXTURE_2D_INDEX
;
3784 prog
->InputsRead
|= FRAG_BIT_TEX0
;
3785 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3786 v
->samplers_used
|= (1 << 0);
3788 if (scale_and_bias
) {
3789 static const gl_state_index scale_state
[STATE_LENGTH
] =
3790 { STATE_INTERNAL
, STATE_PT_SCALE
,
3791 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3792 static const gl_state_index bias_state
[STATE_LENGTH
] =
3793 { STATE_INTERNAL
, STATE_PT_BIAS
,
3794 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3795 GLint scale_p
, bias_p
;
3796 st_src_reg scale
, bias
;
3798 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3799 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3801 /* MAD colorTemp, colorTemp, scale, bias; */
3802 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3803 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3804 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3808 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3809 st_dst_reg temp_dst
= st_dst_reg(temp
);
3811 assert(st
->pixel_xfer
.pixelmap_texture
);
3813 /* With a little effort, we can do four pixel map look-ups with
3814 * two TEX instructions:
3817 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3818 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3819 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3821 inst
->tex_target
= TEXTURE_2D_INDEX
;
3823 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3824 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3825 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3826 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3828 inst
->tex_target
= TEXTURE_2D_INDEX
;
3830 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3831 v
->samplers_used
|= (1 << 1);
3833 /* MOV colorTemp, temp; */
3834 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3837 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3839 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3840 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3841 glsl_to_tgsi_instruction
*newinst
;
3842 st_src_reg src_regs
[3];
3844 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3845 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3847 for (int i
=0; i
<3; i
++) {
3848 src_regs
[i
] = inst
->src
[i
];
3849 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3850 src_regs
[i
].index
== FRAG_ATTRIB_COL0
)
3852 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3853 src_regs
[i
].index
= src0
.index
;
3855 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3856 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3859 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3860 newinst
->tex_target
= inst
->tex_target
;
3863 /* Make modifications to fragment program info. */
3864 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3865 original
->prog
->Parameters
);
3866 _mesa_free_parameter_list(params
);
3867 count_resources(v
, prog
);
3868 fp
->glsl_to_tgsi
= v
;
3872 * Make fragment program for glBitmap:
3873 * Sample the texture and kill the fragment if the bit is 0.
3874 * This program will be combined with the user's fragment program.
3876 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3879 get_bitmap_visitor(struct st_fragment_program
*fp
,
3880 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3882 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3883 struct st_context
*st
= st_context(original
->ctx
);
3884 struct gl_program
*prog
= &fp
->Base
.Base
;
3885 st_src_reg coord
, src0
;
3887 glsl_to_tgsi_instruction
*inst
;
3889 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3890 v
->ctx
= original
->ctx
;
3892 v
->shader_program
= NULL
;
3893 v
->glsl_version
= original
->glsl_version
;
3894 v
->native_integers
= original
->native_integers
;
3895 v
->options
= original
->options
;
3896 v
->next_temp
= original
->next_temp
;
3897 v
->num_address_regs
= original
->num_address_regs
;
3898 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3899 v
->indirect_addr_temps
= original
->indirect_addr_temps
;
3900 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3901 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3902 v
->num_immediates
= original
->num_immediates
;
3904 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3905 coord
= st_src_reg(PROGRAM_INPUT
, FRAG_ATTRIB_TEX0
, glsl_type::vec2_type
);
3906 src0
= v
->get_temp(glsl_type::vec4_type
);
3907 dst0
= st_dst_reg(src0
);
3908 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3909 inst
->sampler
= samplerIndex
;
3910 inst
->tex_target
= TEXTURE_2D_INDEX
;
3912 prog
->InputsRead
|= FRAG_BIT_TEX0
;
3913 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
3914 v
->samplers_used
|= (1 << samplerIndex
);
3916 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3917 src0
.negate
= NEGATE_XYZW
;
3918 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
3919 src0
.swizzle
= SWIZZLE_XXXX
;
3920 inst
= v
->emit(NULL
, TGSI_OPCODE_KIL
, undef_dst
, src0
);
3922 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3924 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3925 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3926 glsl_to_tgsi_instruction
*newinst
;
3927 st_src_reg src_regs
[3];
3929 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3930 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3932 for (int i
=0; i
<3; i
++) {
3933 src_regs
[i
] = inst
->src
[i
];
3934 if (src_regs
[i
].file
== PROGRAM_INPUT
)
3935 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3938 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3939 newinst
->tex_target
= inst
->tex_target
;
3942 /* Make modifications to fragment program info. */
3943 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
3944 count_resources(v
, prog
);
3945 fp
->glsl_to_tgsi
= v
;
3948 /* ------------------------- TGSI conversion stuff -------------------------- */
3950 unsigned branch_target
;
3955 * Intermediate state used during shader translation.
3957 struct st_translate
{
3958 struct ureg_program
*ureg
;
3960 struct ureg_dst temps
[MAX_TEMPS
];
3961 struct ureg_src
*constants
;
3962 struct ureg_src
*immediates
;
3963 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
3964 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
3965 struct ureg_dst address
[1];
3966 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
3967 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
3969 const GLuint
*inputMapping
;
3970 const GLuint
*outputMapping
;
3972 /* For every instruction that contains a label (eg CALL), keep
3973 * details so that we can go back afterwards and emit the correct
3974 * tgsi instruction number for each label.
3976 struct label
*labels
;
3977 unsigned labels_size
;
3978 unsigned labels_count
;
3980 /* Keep a record of the tgsi instruction number that each mesa
3981 * instruction starts at, will be used to fix up labels after
3986 unsigned insn_count
;
3988 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3993 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3994 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
3996 TGSI_SEMANTIC_VERTEXID
,
3997 TGSI_SEMANTIC_INSTANCEID
4001 * Make note of a branch to a label in the TGSI code.
4002 * After we've emitted all instructions, we'll go over the list
4003 * of labels built here and patch the TGSI code with the actual
4004 * location of each label.
4006 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4010 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4011 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4012 t
->labels
= (struct label
*)realloc(t
->labels
,
4013 t
->labels_size
* sizeof(struct label
));
4014 if (t
->labels
== NULL
) {
4015 static unsigned dummy
;
4021 i
= t
->labels_count
++;
4022 t
->labels
[i
].branch_target
= branch_target
;
4023 return &t
->labels
[i
].token
;
4027 * Called prior to emitting the TGSI code for each instruction.
4028 * Allocate additional space for instructions if needed.
4029 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4030 * the next TGSI instruction.
4032 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4034 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4035 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4036 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4037 if (t
->insn
== NULL
) {
4043 t
->insn
[t
->insn_count
++] = start
;
4047 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4049 static struct ureg_src
4050 emit_immediate(struct st_translate
*t
,
4051 gl_constant_value values
[4],
4054 struct ureg_program
*ureg
= t
->ureg
;
4059 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4061 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4062 case GL_UNSIGNED_INT
:
4064 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4066 assert(!"should not get here - type must be float, int, uint, or bool");
4067 return ureg_src_undef();
4072 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4074 static struct ureg_dst
4075 dst_register(struct st_translate
*t
,
4076 gl_register_file file
,
4080 case PROGRAM_UNDEFINED
:
4081 return ureg_dst_undef();
4083 case PROGRAM_TEMPORARY
:
4084 if (ureg_dst_is_undef(t
->temps
[index
]))
4085 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4087 return t
->temps
[index
];
4089 case PROGRAM_OUTPUT
:
4090 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4091 assert(index
< VERT_RESULT_MAX
);
4092 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4093 assert(index
< FRAG_RESULT_MAX
);
4095 assert(index
< GEOM_RESULT_MAX
);
4097 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4099 return t
->outputs
[t
->outputMapping
[index
]];
4101 case PROGRAM_ADDRESS
:
4102 return t
->address
[index
];
4105 assert(!"unknown dst register file");
4106 return ureg_dst_undef();
4111 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4113 static struct ureg_src
4114 src_register(struct st_translate
*t
,
4115 gl_register_file file
,
4116 GLint index
, GLint index2D
)
4119 case PROGRAM_UNDEFINED
:
4120 return ureg_src_undef();
4122 case PROGRAM_TEMPORARY
:
4124 assert(index
< (int) Elements(t
->temps
));
4125 if (ureg_dst_is_undef(t
->temps
[index
]))
4126 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4127 return ureg_src(t
->temps
[index
]);
4129 case PROGRAM_ENV_PARAM
:
4130 case PROGRAM_LOCAL_PARAM
:
4131 case PROGRAM_UNIFORM
:
4133 return t
->constants
[index
];
4134 case PROGRAM_STATE_VAR
:
4135 case PROGRAM_CONSTANT
: /* ie, immediate */
4137 struct ureg_src src
;
4138 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4140 src
.DimensionIndex
= index2D
;
4142 } else if (index
< 0)
4143 return ureg_DECL_constant(t
->ureg
, 0);
4145 return t
->constants
[index
];
4147 case PROGRAM_IMMEDIATE
:
4148 return t
->immediates
[index
];
4151 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4152 return t
->inputs
[t
->inputMapping
[index
]];
4154 case PROGRAM_OUTPUT
:
4155 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4156 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4158 case PROGRAM_ADDRESS
:
4159 return ureg_src(t
->address
[index
]);
4161 case PROGRAM_SYSTEM_VALUE
:
4162 assert(index
< (int) Elements(t
->systemValues
));
4163 return t
->systemValues
[index
];
4166 assert(!"unknown src register file");
4167 return ureg_src_undef();
4172 * Create a TGSI ureg_dst register from an st_dst_reg.
4174 static struct ureg_dst
4175 translate_dst(struct st_translate
*t
,
4176 const st_dst_reg
*dst_reg
,
4177 bool saturate
, bool clamp_color
)
4179 struct ureg_dst dst
= dst_register(t
,
4183 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4186 dst
= ureg_saturate(dst
);
4187 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4188 /* Clamp colors for ARB_color_buffer_float. */
4189 switch (t
->procType
) {
4190 case TGSI_PROCESSOR_VERTEX
:
4191 /* XXX if the geometry shader is present, this must be done there
4192 * instead of here. */
4193 if (dst_reg
->index
== VERT_RESULT_COL0
||
4194 dst_reg
->index
== VERT_RESULT_COL1
||
4195 dst_reg
->index
== VERT_RESULT_BFC0
||
4196 dst_reg
->index
== VERT_RESULT_BFC1
) {
4197 dst
= ureg_saturate(dst
);
4201 case TGSI_PROCESSOR_FRAGMENT
:
4202 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4203 dst
= ureg_saturate(dst
);
4209 if (dst_reg
->reladdr
!= NULL
)
4210 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4216 * Create a TGSI ureg_src register from an st_src_reg.
4218 static struct ureg_src
4219 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4221 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4223 src
= ureg_swizzle(src
,
4224 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4225 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4226 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4227 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4229 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4230 src
= ureg_negate(src
);
4232 if (src_reg
->reladdr
!= NULL
) {
4233 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4234 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4235 * set the bit for src.Negate. So we have to do the operation manually
4236 * here to work around the compiler's problems. */
4237 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4238 struct ureg_src addr
= ureg_src(t
->address
[0]);
4240 src
.IndirectFile
= addr
.File
;
4241 src
.IndirectIndex
= addr
.Index
;
4242 src
.IndirectSwizzle
= addr
.SwizzleX
;
4244 if (src_reg
->file
!= PROGRAM_INPUT
&&
4245 src_reg
->file
!= PROGRAM_OUTPUT
) {
4246 /* If src_reg->index was negative, it was set to zero in
4247 * src_register(). Reassign it now. But don't do this
4248 * for input/output regs since they get remapped while
4249 * const buffers don't.
4251 src
.Index
= src_reg
->index
;
4258 static struct tgsi_texture_offset
4259 translate_tex_offset(struct st_translate
*t
,
4260 const struct tgsi_texture_offset
*in_offset
)
4262 struct tgsi_texture_offset offset
;
4263 struct ureg_src imm_src
;
4265 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4266 imm_src
= t
->immediates
[in_offset
->Index
];
4268 offset
.File
= imm_src
.File
;
4269 offset
.Index
= imm_src
.Index
;
4270 offset
.SwizzleX
= imm_src
.SwizzleX
;
4271 offset
.SwizzleY
= imm_src
.SwizzleY
;
4272 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4273 offset
.File
= TGSI_FILE_IMMEDIATE
;
4280 compile_tgsi_instruction(struct st_translate
*t
,
4281 const glsl_to_tgsi_instruction
*inst
,
4282 bool clamp_dst_color_output
)
4284 struct ureg_program
*ureg
= t
->ureg
;
4286 struct ureg_dst dst
[1];
4287 struct ureg_src src
[4];
4288 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4292 unsigned tex_target
;
4294 num_dst
= num_inst_dst_regs(inst
->op
);
4295 num_src
= num_inst_src_regs(inst
->op
);
4298 dst
[0] = translate_dst(t
,
4301 clamp_dst_color_output
);
4303 for (i
= 0; i
< num_src
; i
++)
4304 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4307 case TGSI_OPCODE_BGNLOOP
:
4308 case TGSI_OPCODE_CAL
:
4309 case TGSI_OPCODE_ELSE
:
4310 case TGSI_OPCODE_ENDLOOP
:
4311 case TGSI_OPCODE_IF
:
4312 assert(num_dst
== 0);
4313 ureg_label_insn(ureg
,
4317 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4320 case TGSI_OPCODE_TEX
:
4321 case TGSI_OPCODE_TXB
:
4322 case TGSI_OPCODE_TXD
:
4323 case TGSI_OPCODE_TXL
:
4324 case TGSI_OPCODE_TXP
:
4325 case TGSI_OPCODE_TXQ
:
4326 case TGSI_OPCODE_TXF
:
4327 case TGSI_OPCODE_TEX2
:
4328 case TGSI_OPCODE_TXB2
:
4329 case TGSI_OPCODE_TXL2
:
4330 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4331 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4332 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4334 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4340 texoffsets
, inst
->tex_offset_num_offset
,
4344 case TGSI_OPCODE_SCS
:
4345 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4346 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4359 * Emit the TGSI instructions for inverting and adjusting WPOS.
4360 * This code is unavoidable because it also depends on whether
4361 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4364 emit_wpos_adjustment( struct st_translate
*t
,
4365 const struct gl_program
*program
,
4367 GLfloat adjX
, GLfloat adjY
[2])
4369 struct ureg_program
*ureg
= t
->ureg
;
4371 /* Fragment program uses fragment position input.
4372 * Need to replace instances of INPUT[WPOS] with temp T
4373 * where T = INPUT[WPOS] by y is inverted.
4375 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4376 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4377 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4379 /* XXX: note we are modifying the incoming shader here! Need to
4380 * do this before emitting the constant decls below, or this
4383 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4384 wposTransformState
);
4386 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4387 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4388 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
4390 /* First, apply the coordinate shift: */
4391 if (adjX
|| adjY
[0] || adjY
[1]) {
4392 if (adjY
[0] != adjY
[1]) {
4393 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4394 * depending on whether inversion is actually going to be applied
4395 * or not, which is determined by testing against the inversion
4396 * state variable used below, which will be either +1 or -1.
4398 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4400 ureg_CMP(ureg
, adj_temp
,
4401 ureg_scalar(wpostrans
, invert
? 2 : 0),
4402 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4403 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4404 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4406 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4407 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4409 wpos_input
= ureg_src(wpos_temp
);
4411 /* MOV wpos_temp, input[wpos]
4413 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4416 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4417 * inversion/identity, or the other way around if we're drawing to an FBO.
4420 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4423 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4425 ureg_scalar(wpostrans
, 0),
4426 ureg_scalar(wpostrans
, 1));
4428 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4431 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4433 ureg_scalar(wpostrans
, 2),
4434 ureg_scalar(wpostrans
, 3));
4437 /* Use wpos_temp as position input from here on:
4439 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
4444 * Emit fragment position/ooordinate code.
4447 emit_wpos(struct st_context
*st
,
4448 struct st_translate
*t
,
4449 const struct gl_program
*program
,
4450 struct ureg_program
*ureg
)
4452 const struct gl_fragment_program
*fp
=
4453 (const struct gl_fragment_program
*) program
;
4454 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4455 GLfloat adjX
= 0.0f
;
4456 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4457 boolean invert
= FALSE
;
4459 /* Query the pixel center conventions supported by the pipe driver and set
4460 * adjX, adjY to help out if it cannot handle the requested one internally.
4462 * The bias of the y-coordinate depends on whether y-inversion takes place
4463 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4464 * drawing to an FBO (causes additional inversion), and whether the the pipe
4465 * driver origin and the requested origin differ (the latter condition is
4466 * stored in the 'invert' variable).
4468 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4470 * center shift only:
4475 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4476 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4477 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4478 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4480 * inversion and center shift:
4481 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4482 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4483 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4484 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4486 if (fp
->OriginUpperLeft
) {
4487 /* Fragment shader wants origin in upper-left */
4488 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4489 /* the driver supports upper-left origin */
4491 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4492 /* the driver supports lower-left origin, need to invert Y */
4493 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4500 /* Fragment shader wants origin in lower-left */
4501 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4502 /* the driver supports lower-left origin */
4503 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4504 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4505 /* the driver supports upper-left origin, need to invert Y */
4511 if (fp
->PixelCenterInteger
) {
4512 /* Fragment shader wants pixel center integer */
4513 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4514 /* the driver supports pixel center integer */
4516 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4518 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4519 /* the driver supports pixel center half integer, need to bias X,Y */
4528 /* Fragment shader wants pixel center half integer */
4529 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4530 /* the driver supports pixel center half integer */
4532 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4533 /* the driver supports pixel center integer, need to bias X,Y */
4534 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4535 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4541 /* we invert after adjustment so that we avoid the MOV to temporary,
4542 * and reuse the adjustment ADD instead */
4543 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4547 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4548 * TGSI uses +1 for front, -1 for back.
4549 * This function converts the TGSI value to the GL value. Simply clamping/
4550 * saturating the value to [0,1] does the job.
4553 emit_face_var(struct st_translate
*t
)
4555 struct ureg_program
*ureg
= t
->ureg
;
4556 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4557 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
4559 /* MOV_SAT face_temp, input[face] */
4560 face_temp
= ureg_saturate(face_temp
);
4561 ureg_MOV(ureg
, face_temp
, face_input
);
4563 /* Use face_temp as face input from here on: */
4564 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
4568 emit_edgeflags(struct st_translate
*t
)
4570 struct ureg_program
*ureg
= t
->ureg
;
4571 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
4572 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4574 ureg_MOV(ureg
, edge_dst
, edge_src
);
4578 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4579 * \param program the program to translate
4580 * \param numInputs number of input registers used
4581 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4583 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4584 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4586 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4587 * \param numOutputs number of output registers used
4588 * \param outputMapping maps Mesa fragment program outputs to TGSI
4590 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4591 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4594 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4596 extern "C" enum pipe_error
4597 st_translate_program(
4598 struct gl_context
*ctx
,
4600 struct ureg_program
*ureg
,
4601 glsl_to_tgsi_visitor
*program
,
4602 const struct gl_program
*proginfo
,
4604 const GLuint inputMapping
[],
4605 const ubyte inputSemanticName
[],
4606 const ubyte inputSemanticIndex
[],
4607 const GLuint interpMode
[],
4608 const GLboolean is_centroid
[],
4610 const GLuint outputMapping
[],
4611 const ubyte outputSemanticName
[],
4612 const ubyte outputSemanticIndex
[],
4613 boolean passthrough_edgeflags
,
4614 boolean clamp_color
)
4616 struct st_translate
*t
;
4618 enum pipe_error ret
= PIPE_OK
;
4620 assert(numInputs
<= Elements(t
->inputs
));
4621 assert(numOutputs
<= Elements(t
->outputs
));
4623 t
= CALLOC_STRUCT(st_translate
);
4625 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4629 memset(t
, 0, sizeof *t
);
4631 t
->procType
= procType
;
4632 t
->inputMapping
= inputMapping
;
4633 t
->outputMapping
= outputMapping
;
4636 if (program
->shader_program
) {
4637 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4638 struct gl_uniform_storage
*const storage
=
4639 &program
->shader_program
->UniformStorage
[i
];
4641 _mesa_uniform_detach_all_driver_storage(storage
);
4646 * Declare input attributes.
4648 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4649 for (i
= 0; i
< numInputs
; i
++) {
4650 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4651 inputSemanticName
[i
],
4652 inputSemanticIndex
[i
],
4657 if (proginfo
->InputsRead
& FRAG_BIT_WPOS
) {
4658 /* Must do this after setting up t->inputs, and before
4659 * emitting constant references, below:
4661 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4664 if (proginfo
->InputsRead
& FRAG_BIT_FACE
)
4668 * Declare output attributes.
4670 for (i
= 0; i
< numOutputs
; i
++) {
4671 switch (outputSemanticName
[i
]) {
4672 case TGSI_SEMANTIC_POSITION
:
4673 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4674 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4675 outputSemanticIndex
[i
]);
4676 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4678 case TGSI_SEMANTIC_STENCIL
:
4679 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4680 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4681 outputSemanticIndex
[i
]);
4682 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4684 case TGSI_SEMANTIC_COLOR
:
4685 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4686 TGSI_SEMANTIC_COLOR
,
4687 outputSemanticIndex
[i
]);
4690 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4691 ret
= PIPE_ERROR_BAD_INPUT
;
4696 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4697 for (i
= 0; i
< numInputs
; i
++) {
4698 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4700 inputSemanticName
[i
],
4701 inputSemanticIndex
[i
]);
4704 for (i
= 0; i
< numOutputs
; i
++) {
4705 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4706 outputSemanticName
[i
],
4707 outputSemanticIndex
[i
]);
4711 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4713 for (i
= 0; i
< numInputs
; i
++) {
4714 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4717 for (i
= 0; i
< numOutputs
; i
++) {
4718 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4719 outputSemanticName
[i
],
4720 outputSemanticIndex
[i
]);
4722 if (passthrough_edgeflags
)
4726 /* Declare address register.
4728 if (program
->num_address_regs
> 0) {
4729 assert(program
->num_address_regs
== 1);
4730 t
->address
[0] = ureg_DECL_address(ureg
);
4733 /* Declare misc input registers
4736 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4737 unsigned numSys
= 0;
4738 for (i
= 0; sysInputs
; i
++) {
4739 if (sysInputs
& (1 << i
)) {
4740 unsigned semName
= mesa_sysval_to_semantic
[i
];
4741 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4742 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4743 semName
== TGSI_SEMANTIC_VERTEXID
) {
4744 /* From Gallium perspective, these system values are always
4745 * integer, and require native integer support. However, if
4746 * native integer is supported on the vertex stage but not the
4747 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4748 * assumes these system values are floats. To resolve the
4749 * inconsistency, we insert a U2F.
4751 struct st_context
*st
= st_context(ctx
);
4752 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4753 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4754 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4755 if (!ctx
->Const
.NativeIntegers
) {
4756 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4757 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4758 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4762 sysInputs
&= ~(1 << i
);
4767 if (program
->indirect_addr_temps
) {
4768 /* If temps are accessed with indirect addressing, declare temporaries
4769 * in sequential order. Else, we declare them on demand elsewhere.
4770 * (Note: the number of temporaries is equal to program->next_temp)
4772 for (i
= 0; i
< (unsigned)program
->next_temp
; i
++) {
4773 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4774 t
->temps
[i
] = ureg_DECL_local_temporary(t
->ureg
);
4778 /* Emit constants and uniforms. TGSI uses a single index space for these,
4779 * so we put all the translated regs in t->constants.
4781 if (proginfo
->Parameters
) {
4782 t
->constants
= (struct ureg_src
*)
4783 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4784 if (t
->constants
== NULL
) {
4785 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4789 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4790 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4791 case PROGRAM_ENV_PARAM
:
4792 case PROGRAM_LOCAL_PARAM
:
4793 case PROGRAM_STATE_VAR
:
4794 case PROGRAM_UNIFORM
:
4795 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4798 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4799 * addressing of the const buffer.
4800 * FIXME: Be smarter and recognize param arrays:
4801 * indirect addressing is only valid within the referenced
4804 case PROGRAM_CONSTANT
:
4805 if (program
->indirect_addr_consts
)
4806 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4808 t
->constants
[i
] = emit_immediate(t
,
4809 proginfo
->Parameters
->ParameterValues
[i
],
4810 proginfo
->Parameters
->Parameters
[i
].DataType
,
4819 if (program
->shader_program
) {
4820 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4822 for (i
= 0; i
< num_ubos
; i
++) {
4823 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4827 /* Emit immediate values.
4829 t
->immediates
= (struct ureg_src
*)
4830 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4831 if (t
->immediates
== NULL
) {
4832 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4836 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4837 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4838 assert(i
< program
->num_immediates
);
4839 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4841 assert(i
== program
->num_immediates
);
4843 /* texture samplers */
4844 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
4845 if (program
->samplers_used
& (1 << i
)) {
4846 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4850 /* Emit each instruction in turn:
4852 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4853 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4854 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4858 /* Fix up all emitted labels:
4860 for (i
= 0; i
< t
->labels_count
; i
++) {
4861 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4862 t
->insn
[t
->labels
[i
].branch_target
]);
4865 if (program
->shader_program
) {
4866 /* This has to be done last. Any operation the can cause
4867 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4868 * program constant) has to happen before creating this linkage.
4870 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4871 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4874 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4875 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4884 free(t
->immediates
);
4887 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
4895 /* ----------------------------- End TGSI code ------------------------------ */
4898 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4899 * generating Mesa IR.
4901 static struct gl_program
*
4902 get_mesa_program(struct gl_context
*ctx
,
4903 struct gl_shader_program
*shader_program
,
4904 struct gl_shader
*shader
)
4906 glsl_to_tgsi_visitor
* v
;
4907 struct gl_program
*prog
;
4909 const char *target_string
;
4911 struct gl_shader_compiler_options
*options
=
4912 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
4914 switch (shader
->Type
) {
4915 case GL_VERTEX_SHADER
:
4916 target
= GL_VERTEX_PROGRAM_ARB
;
4917 target_string
= "vertex";
4919 case GL_FRAGMENT_SHADER
:
4920 target
= GL_FRAGMENT_PROGRAM_ARB
;
4921 target_string
= "fragment";
4923 case GL_GEOMETRY_SHADER
:
4924 target
= GL_GEOMETRY_PROGRAM_NV
;
4925 target_string
= "geometry";
4928 assert(!"should not be reached");
4932 validate_ir_tree(shader
->ir
);
4934 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
4937 prog
->Parameters
= _mesa_new_parameter_list();
4938 v
= new glsl_to_tgsi_visitor();
4941 v
->shader_program
= shader_program
;
4942 v
->options
= options
;
4943 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
4944 v
->native_integers
= ctx
->Const
.NativeIntegers
;
4946 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
4949 /* Remove reads from output registers. */
4950 lower_output_reads(shader
->ir
);
4952 /* Emit intermediate IR for main(). */
4953 visit_exec_list(shader
->ir
, v
);
4955 /* Now emit bodies for any functions that were used. */
4957 progress
= GL_FALSE
;
4959 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
4960 function_entry
*entry
= (function_entry
*)iter
.get();
4962 if (!entry
->bgn_inst
) {
4963 v
->current_function
= entry
;
4965 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
4966 entry
->bgn_inst
->function
= entry
;
4968 visit_exec_list(&entry
->sig
->body
, v
);
4970 glsl_to_tgsi_instruction
*last
;
4971 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
4972 if (last
->op
!= TGSI_OPCODE_RET
)
4973 v
->emit(NULL
, TGSI_OPCODE_RET
);
4975 glsl_to_tgsi_instruction
*end
;
4976 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
4977 end
->function
= entry
;
4985 /* Print out some information (for debugging purposes) used by the
4986 * optimization passes. */
4987 for (i
=0; i
< v
->next_temp
; i
++) {
4988 int fr
= v
->get_first_temp_read(i
);
4989 int fw
= v
->get_first_temp_write(i
);
4990 int lr
= v
->get_last_temp_read(i
);
4991 int lw
= v
->get_last_temp_write(i
);
4993 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
4998 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5000 v
->copy_propagate();
5001 while (v
->eliminate_dead_code_advanced());
5003 /* FIXME: These passes to optimize temporary registers don't work when there
5004 * is indirect addressing of the temporary register space. We need proper
5005 * array support so that we don't have to give up these passes in every
5006 * shader that uses arrays.
5008 if (!v
->indirect_addr_temps
) {
5009 v
->eliminate_dead_code();
5010 v
->merge_registers();
5011 v
->renumber_registers();
5014 /* Write the END instruction. */
5015 v
->emit(NULL
, TGSI_OPCODE_END
);
5017 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5019 printf("GLSL IR for linked %s program %d:\n", target_string
,
5020 shader_program
->Name
);
5021 _mesa_print_ir(shader
->ir
, NULL
);
5027 prog
->Instructions
= NULL
;
5028 prog
->NumInstructions
= 0;
5030 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
5031 count_resources(v
, prog
);
5033 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5035 /* This has to be done last. Any operation the can cause
5036 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5037 * program constant) has to happen before creating this linkage.
5039 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5040 if (!shader_program
->LinkStatus
) {
5044 struct st_vertex_program
*stvp
;
5045 struct st_fragment_program
*stfp
;
5046 struct st_geometry_program
*stgp
;
5048 switch (shader
->Type
) {
5049 case GL_VERTEX_SHADER
:
5050 stvp
= (struct st_vertex_program
*)prog
;
5051 stvp
->glsl_to_tgsi
= v
;
5053 case GL_FRAGMENT_SHADER
:
5054 stfp
= (struct st_fragment_program
*)prog
;
5055 stfp
->glsl_to_tgsi
= v
;
5057 case GL_GEOMETRY_SHADER
:
5058 stgp
= (struct st_geometry_program
*)prog
;
5059 stgp
->glsl_to_tgsi
= v
;
5062 assert(!"should not be reached");
5072 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5074 struct gl_shader
*shader
;
5075 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5076 type
== GL_GEOMETRY_SHADER_ARB
);
5077 shader
= rzalloc(NULL
, struct gl_shader
);
5079 shader
->Type
= type
;
5080 shader
->Name
= name
;
5081 _mesa_init_shader(ctx
, shader
);
5086 struct gl_shader_program
*
5087 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5089 struct gl_shader_program
*shProg
;
5090 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5092 shProg
->Name
= name
;
5093 _mesa_init_shader_program(ctx
, shProg
);
5100 * Called via ctx->Driver.LinkShader()
5101 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5102 * with code lowering and other optimizations.
5105 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5107 assert(prog
->LinkStatus
);
5109 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5110 if (prog
->_LinkedShaders
[i
] == NULL
)
5114 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5115 const struct gl_shader_compiler_options
*options
=
5116 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5119 unsigned what_to_lower
= MOD_TO_FRACT
| DIV_TO_MUL_RCP
|
5120 EXP_TO_EXP2
| LOG_TO_LOG2
;
5121 if (options
->EmitNoPow
)
5122 what_to_lower
|= POW_TO_EXP2
;
5123 if (!ctx
->Const
.NativeIntegers
)
5124 what_to_lower
|= INT_DIV_TO_MUL_RCP
;
5129 do_mat_op_to_vec(ir
);
5130 lower_instructions(ir
, what_to_lower
);
5132 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5134 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5136 progress
= do_common_optimization(ir
, true, true,
5137 options
->MaxUnrollIterations
)
5140 progress
= lower_quadop_vector(ir
, false) || progress
;
5142 if (options
->MaxIfDepth
== 0)
5143 progress
= lower_discard(ir
) || progress
;
5145 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5147 if (options
->EmitNoNoise
)
5148 progress
= lower_noise(ir
) || progress
;
5150 /* If there are forms of indirect addressing that the driver
5151 * cannot handle, perform the lowering pass.
5153 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
5154 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
5156 lower_variable_index_to_cond_assign(ir
,
5157 options
->EmitNoIndirectInput
,
5158 options
->EmitNoIndirectOutput
,
5159 options
->EmitNoIndirectTemp
,
5160 options
->EmitNoIndirectUniform
)
5163 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
5167 validate_ir_tree(ir
);
5170 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5171 struct gl_program
*linked_prog
;
5173 if (prog
->_LinkedShaders
[i
] == NULL
)
5176 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5179 static const GLenum targets
[] = {
5180 GL_VERTEX_PROGRAM_ARB
,
5181 GL_FRAGMENT_PROGRAM_ARB
,
5182 GL_GEOMETRY_PROGRAM_NV
5185 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5187 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
5188 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5190 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5195 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5202 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5203 const GLuint outputMapping
[],
5204 struct pipe_stream_output_info
*so
)
5207 struct gl_transform_feedback_info
*info
=
5208 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5210 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5211 so
->output
[i
].register_index
=
5212 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5213 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5214 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5215 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5216 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5219 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5220 so
->stride
[i
] = info
->BufferStride
[i
];
5222 so
->num_outputs
= info
->NumOutputs
;