mesa: Add SYSTEM_VALUE_BASE_VERTEX
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of arrays
79 */
80 #define MAX_ARRAYS 256
81
82 #define MAX_GLSL_TEXTURE_OFFSET 4
83
84 class st_src_reg;
85 class st_dst_reg;
86
87 static int swizzle_for_size(int size);
88
89 /**
90 * This struct is a corresponding struct to TGSI ureg_src.
91 */
92 class st_src_reg {
93 public:
94 st_src_reg(gl_register_file file, int index, const glsl_type *type)
95 {
96 this->file = file;
97 this->index = index;
98 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
99 this->swizzle = swizzle_for_size(type->vector_elements);
100 else
101 this->swizzle = SWIZZLE_XYZW;
102 this->negate = 0;
103 this->index2D = 0;
104 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
105 this->reladdr = NULL;
106 this->reladdr2 = NULL;
107 this->has_index2 = false;
108 }
109
110 st_src_reg(gl_register_file file, int index, int type)
111 {
112 this->type = type;
113 this->file = file;
114 this->index = index;
115 this->index2D = 0;
116 this->swizzle = SWIZZLE_XYZW;
117 this->negate = 0;
118 this->reladdr = NULL;
119 this->reladdr2 = NULL;
120 this->has_index2 = false;
121 }
122
123 st_src_reg(gl_register_file file, int index, int type, int index2D)
124 {
125 this->type = type;
126 this->file = file;
127 this->index = index;
128 this->index2D = index2D;
129 this->swizzle = SWIZZLE_XYZW;
130 this->negate = 0;
131 this->reladdr = NULL;
132 this->reladdr2 = NULL;
133 this->has_index2 = false;
134 }
135
136 st_src_reg()
137 {
138 this->type = GLSL_TYPE_ERROR;
139 this->file = PROGRAM_UNDEFINED;
140 this->index = 0;
141 this->index2D = 0;
142 this->swizzle = 0;
143 this->negate = 0;
144 this->reladdr = NULL;
145 this->reladdr2 = NULL;
146 this->has_index2 = false;
147 }
148
149 explicit st_src_reg(st_dst_reg reg);
150
151 gl_register_file file; /**< PROGRAM_* from Mesa */
152 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
153 int index2D;
154 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
155 int negate; /**< NEGATE_XYZW mask from mesa */
156 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
157 /** Register index should be offset by the integer in this reg. */
158 st_src_reg *reladdr;
159 st_src_reg *reladdr2;
160 bool has_index2;
161 };
162
163 class st_dst_reg {
164 public:
165 st_dst_reg(gl_register_file file, int writemask, int type, int index)
166 {
167 this->file = file;
168 this->index = index;
169 this->writemask = writemask;
170 this->cond_mask = COND_TR;
171 this->reladdr = NULL;
172 this->type = type;
173 }
174
175 st_dst_reg(gl_register_file file, int writemask, int type)
176 {
177 this->file = file;
178 this->index = 0;
179 this->writemask = writemask;
180 this->cond_mask = COND_TR;
181 this->reladdr = NULL;
182 this->type = type;
183 }
184
185 st_dst_reg()
186 {
187 this->type = GLSL_TYPE_ERROR;
188 this->file = PROGRAM_UNDEFINED;
189 this->index = 0;
190 this->writemask = 0;
191 this->cond_mask = COND_TR;
192 this->reladdr = NULL;
193 }
194
195 explicit st_dst_reg(st_src_reg reg);
196
197 gl_register_file file; /**< PROGRAM_* from Mesa */
198 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
199 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
200 GLuint cond_mask:4;
201 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
202 /** Register index should be offset by the integer in this reg. */
203 st_src_reg *reladdr;
204 };
205
206 st_src_reg::st_src_reg(st_dst_reg reg)
207 {
208 this->type = reg.type;
209 this->file = reg.file;
210 this->index = reg.index;
211 this->swizzle = SWIZZLE_XYZW;
212 this->negate = 0;
213 this->reladdr = reg.reladdr;
214 this->index2D = 0;
215 this->reladdr2 = NULL;
216 this->has_index2 = false;
217 }
218
219 st_dst_reg::st_dst_reg(st_src_reg reg)
220 {
221 this->type = reg.type;
222 this->file = reg.file;
223 this->index = reg.index;
224 this->writemask = WRITEMASK_XYZW;
225 this->cond_mask = COND_TR;
226 this->reladdr = reg.reladdr;
227 }
228
229 class glsl_to_tgsi_instruction : public exec_node {
230 public:
231 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
232
233 unsigned op;
234 st_dst_reg dst;
235 st_src_reg src[4];
236 /** Pointer to the ir source this tree came from for debugging */
237 ir_instruction *ir;
238 GLboolean cond_update;
239 bool saturate;
240 st_src_reg sampler; /**< sampler register */
241 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
242 int tex_target; /**< One of TEXTURE_*_INDEX */
243 GLboolean tex_shadow;
244
245 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
246 unsigned tex_offset_num_offset;
247 int dead_mask; /**< Used in dead code elimination */
248
249 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
250 };
251
252 class variable_storage : public exec_node {
253 public:
254 variable_storage(ir_variable *var, gl_register_file file, int index)
255 : file(file), index(index), var(var)
256 {
257 /* empty */
258 }
259
260 gl_register_file file;
261 int index;
262 ir_variable *var; /* variable that maps to this, if any */
263 };
264
265 class immediate_storage : public exec_node {
266 public:
267 immediate_storage(gl_constant_value *values, int size, int type)
268 {
269 memcpy(this->values, values, size * sizeof(gl_constant_value));
270 this->size = size;
271 this->type = type;
272 }
273
274 gl_constant_value values[4];
275 int size; /**< Number of components (1-4) */
276 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
277 };
278
279 class function_entry : public exec_node {
280 public:
281 ir_function_signature *sig;
282
283 /**
284 * identifier of this function signature used by the program.
285 *
286 * At the point that TGSI instructions for function calls are
287 * generated, we don't know the address of the first instruction of
288 * the function body. So we make the BranchTarget that is called a
289 * small integer and rewrite them during set_branchtargets().
290 */
291 int sig_id;
292
293 /**
294 * Pointer to first instruction of the function body.
295 *
296 * Set during function body emits after main() is processed.
297 */
298 glsl_to_tgsi_instruction *bgn_inst;
299
300 /**
301 * Index of the first instruction of the function body in actual TGSI.
302 *
303 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
304 */
305 int inst;
306
307 /** Storage for the return value. */
308 st_src_reg return_reg;
309 };
310
311 struct glsl_to_tgsi_visitor : public ir_visitor {
312 public:
313 glsl_to_tgsi_visitor();
314 ~glsl_to_tgsi_visitor();
315
316 function_entry *current_function;
317
318 struct gl_context *ctx;
319 struct gl_program *prog;
320 struct gl_shader_program *shader_program;
321 struct gl_shader *shader;
322 struct gl_shader_compiler_options *options;
323
324 int next_temp;
325
326 unsigned array_sizes[MAX_ARRAYS];
327 unsigned next_array;
328
329 int num_address_regs;
330 int samplers_used;
331 bool indirect_addr_consts;
332
333 int glsl_version;
334 bool native_integers;
335 bool have_sqrt;
336
337 variable_storage *find_variable_storage(ir_variable *var);
338
339 int add_constant(gl_register_file file, gl_constant_value values[4],
340 int size, int datatype, GLuint *swizzle_out);
341
342 function_entry *get_function_signature(ir_function_signature *sig);
343
344 st_src_reg get_temp(const glsl_type *type);
345 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
346
347 st_src_reg st_src_reg_for_float(float val);
348 st_src_reg st_src_reg_for_int(int val);
349 st_src_reg st_src_reg_for_type(int type, int val);
350
351 /**
352 * \name Visit methods
353 *
354 * As typical for the visitor pattern, there must be one \c visit method for
355 * each concrete subclass of \c ir_instruction. Virtual base classes within
356 * the hierarchy should not have \c visit methods.
357 */
358 /*@{*/
359 virtual void visit(ir_variable *);
360 virtual void visit(ir_loop *);
361 virtual void visit(ir_loop_jump *);
362 virtual void visit(ir_function_signature *);
363 virtual void visit(ir_function *);
364 virtual void visit(ir_expression *);
365 virtual void visit(ir_swizzle *);
366 virtual void visit(ir_dereference_variable *);
367 virtual void visit(ir_dereference_array *);
368 virtual void visit(ir_dereference_record *);
369 virtual void visit(ir_assignment *);
370 virtual void visit(ir_constant *);
371 virtual void visit(ir_call *);
372 virtual void visit(ir_return *);
373 virtual void visit(ir_discard *);
374 virtual void visit(ir_texture *);
375 virtual void visit(ir_if *);
376 virtual void visit(ir_emit_vertex *);
377 virtual void visit(ir_end_primitive *);
378 /*@}*/
379
380 st_src_reg result;
381
382 /** List of variable_storage */
383 exec_list variables;
384
385 /** List of immediate_storage */
386 exec_list immediates;
387 unsigned num_immediates;
388
389 /** List of function_entry */
390 exec_list function_signatures;
391 int next_signature_id;
392
393 /** List of glsl_to_tgsi_instruction */
394 exec_list instructions;
395
396 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
397
398 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
399 st_dst_reg dst, st_src_reg src0);
400
401 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
402 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
405 st_dst_reg dst,
406 st_src_reg src0, st_src_reg src1, st_src_reg src2);
407
408 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
409 st_dst_reg dst,
410 st_src_reg src0, st_src_reg src1,
411 st_src_reg src2, st_src_reg src3);
412
413 unsigned get_opcode(ir_instruction *ir, unsigned op,
414 st_dst_reg dst,
415 st_src_reg src0, st_src_reg src1);
416
417 /**
418 * Emit the correct dot-product instruction for the type of arguments
419 */
420 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
421 st_dst_reg dst,
422 st_src_reg src0,
423 st_src_reg src1,
424 unsigned elements);
425
426 void emit_scalar(ir_instruction *ir, unsigned op,
427 st_dst_reg dst, st_src_reg src0);
428
429 void emit_scalar(ir_instruction *ir, unsigned op,
430 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
431
432 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
433
434 void emit_scs(ir_instruction *ir, unsigned op,
435 st_dst_reg dst, const st_src_reg &src);
436
437 bool try_emit_mad(ir_expression *ir,
438 int mul_operand);
439 bool try_emit_mad_for_and_not(ir_expression *ir,
440 int mul_operand);
441
442 void emit_swz(ir_expression *ir);
443
444 bool process_move_condition(ir_rvalue *ir);
445
446 void simplify_cmp(void);
447
448 void rename_temp_register(int index, int new_index);
449 int get_first_temp_read(int index);
450 int get_first_temp_write(int index);
451 int get_last_temp_read(int index);
452 int get_last_temp_write(int index);
453
454 void copy_propagate(void);
455 int eliminate_dead_code(void);
456 void merge_registers(void);
457 void renumber_registers(void);
458
459 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
460 st_dst_reg *l, st_src_reg *r);
461
462 void *mem_ctx;
463 };
464
465 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
466
467 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
468
469 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
470 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
471 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
472
473 static void
474 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
475
476 static void
477 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
478 {
479 va_list args;
480 va_start(args, fmt);
481 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
482 va_end(args);
483
484 prog->LinkStatus = GL_FALSE;
485 }
486
487 static int
488 swizzle_for_size(int size)
489 {
490 int size_swizzles[4] = {
491 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
492 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
495 };
496
497 assert((size >= 1) && (size <= 4));
498 return size_swizzles[size - 1];
499 }
500
501 static bool
502 is_tex_instruction(unsigned opcode)
503 {
504 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
505 return info->is_tex;
506 }
507
508 static unsigned
509 num_inst_dst_regs(unsigned opcode)
510 {
511 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
512 return info->num_dst;
513 }
514
515 static unsigned
516 num_inst_src_regs(unsigned opcode)
517 {
518 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
519 return info->is_tex ? info->num_src - 1 : info->num_src;
520 }
521
522 glsl_to_tgsi_instruction *
523 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
524 st_dst_reg dst,
525 st_src_reg src0, st_src_reg src1,
526 st_src_reg src2, st_src_reg src3)
527 {
528 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
529 int num_reladdr = 0, i;
530
531 op = get_opcode(ir, op, dst, src0, src1);
532
533 /* If we have to do relative addressing, we want to load the ARL
534 * reg directly for one of the regs, and preload the other reladdr
535 * sources into temps.
536 */
537 num_reladdr += dst.reladdr != NULL;
538 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
539 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
540 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
541 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
542
543 reladdr_to_temp(ir, &src3, &num_reladdr);
544 reladdr_to_temp(ir, &src2, &num_reladdr);
545 reladdr_to_temp(ir, &src1, &num_reladdr);
546 reladdr_to_temp(ir, &src0, &num_reladdr);
547
548 if (dst.reladdr) {
549 emit_arl(ir, address_reg, *dst.reladdr);
550 num_reladdr--;
551 }
552 assert(num_reladdr == 0);
553
554 inst->op = op;
555 inst->dst = dst;
556 inst->src[0] = src0;
557 inst->src[1] = src1;
558 inst->src[2] = src2;
559 inst->src[3] = src3;
560 inst->ir = ir;
561 inst->dead_mask = 0;
562
563 inst->function = NULL;
564
565 /* Update indirect addressing status used by TGSI */
566 if (dst.reladdr) {
567 switch(dst.file) {
568 case PROGRAM_STATE_VAR:
569 case PROGRAM_CONSTANT:
570 case PROGRAM_UNIFORM:
571 this->indirect_addr_consts = true;
572 break;
573 case PROGRAM_IMMEDIATE:
574 assert(!"immediates should not have indirect addressing");
575 break;
576 default:
577 break;
578 }
579 }
580 else {
581 for (i=0; i<4; i++) {
582 if(inst->src[i].reladdr) {
583 switch(inst->src[i].file) {
584 case PROGRAM_STATE_VAR:
585 case PROGRAM_CONSTANT:
586 case PROGRAM_UNIFORM:
587 this->indirect_addr_consts = true;
588 break;
589 case PROGRAM_IMMEDIATE:
590 assert(!"immediates should not have indirect addressing");
591 break;
592 default:
593 break;
594 }
595 }
596 }
597 }
598
599 this->instructions.push_tail(inst);
600
601 return inst;
602 }
603
604 glsl_to_tgsi_instruction *
605 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
606 st_dst_reg dst, st_src_reg src0,
607 st_src_reg src1, st_src_reg src2)
608 {
609 return emit(ir, op, dst, src0, src1, src2, undef_src);
610 }
611
612 glsl_to_tgsi_instruction *
613 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
614 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
615 {
616 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
617 }
618
619 glsl_to_tgsi_instruction *
620 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
621 st_dst_reg dst, st_src_reg src0)
622 {
623 assert(dst.writemask != 0);
624 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
625 }
626
627 glsl_to_tgsi_instruction *
628 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
629 {
630 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
631 }
632
633 /**
634 * Determines whether to use an integer, unsigned integer, or float opcode
635 * based on the operands and input opcode, then emits the result.
636 */
637 unsigned
638 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
639 st_dst_reg dst,
640 st_src_reg src0, st_src_reg src1)
641 {
642 int type = GLSL_TYPE_FLOAT;
643
644 if (op == TGSI_OPCODE_MOV)
645 return op;
646
647 assert(src0.type != GLSL_TYPE_ARRAY);
648 assert(src0.type != GLSL_TYPE_STRUCT);
649 assert(src1.type != GLSL_TYPE_ARRAY);
650 assert(src1.type != GLSL_TYPE_STRUCT);
651
652 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
653 type = GLSL_TYPE_FLOAT;
654 else if (native_integers)
655 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
656
657 #define case4(c, f, i, u) \
658 case TGSI_OPCODE_##c: \
659 if (type == GLSL_TYPE_INT) \
660 op = TGSI_OPCODE_##i; \
661 else if (type == GLSL_TYPE_UINT) \
662 op = TGSI_OPCODE_##u; \
663 else \
664 op = TGSI_OPCODE_##f; \
665 break;
666
667 #define case3(f, i, u) case4(f, f, i, u)
668 #define case2fi(f, i) case4(f, f, i, i)
669 #define case2iu(i, u) case4(i, LAST, i, u)
670
671 #define casecomp(c, f, i, u) \
672 case TGSI_OPCODE_##c: \
673 if (type == GLSL_TYPE_INT) \
674 op = TGSI_OPCODE_##i; \
675 else if (type == GLSL_TYPE_UINT) \
676 op = TGSI_OPCODE_##u; \
677 else if (native_integers) \
678 op = TGSI_OPCODE_##f; \
679 else \
680 op = TGSI_OPCODE_##c; \
681 break;
682
683 switch(op) {
684 case2fi(ADD, UADD);
685 case2fi(MUL, UMUL);
686 case2fi(MAD, UMAD);
687 case3(DIV, IDIV, UDIV);
688 case3(MAX, IMAX, UMAX);
689 case3(MIN, IMIN, UMIN);
690 case2iu(MOD, UMOD);
691
692 casecomp(SEQ, FSEQ, USEQ, USEQ);
693 casecomp(SNE, FSNE, USNE, USNE);
694 casecomp(SGE, FSGE, ISGE, USGE);
695 casecomp(SLT, FSLT, ISLT, USLT);
696
697 case2iu(ISHR, USHR);
698
699 case2fi(SSG, ISSG);
700 case3(ABS, IABS, IABS);
701
702 case2iu(IBFE, UBFE);
703 case2iu(IMSB, UMSB);
704 case2iu(IMUL_HI, UMUL_HI);
705 default: break;
706 }
707
708 assert(op != TGSI_OPCODE_LAST);
709 return op;
710 }
711
712 glsl_to_tgsi_instruction *
713 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
714 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
715 unsigned elements)
716 {
717 static const unsigned dot_opcodes[] = {
718 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
719 };
720
721 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
722 }
723
724 /**
725 * Emits TGSI scalar opcodes to produce unique answers across channels.
726 *
727 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
728 * channel determines the result across all channels. So to do a vec4
729 * of this operation, we want to emit a scalar per source channel used
730 * to produce dest channels.
731 */
732 void
733 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
734 st_dst_reg dst,
735 st_src_reg orig_src0, st_src_reg orig_src1)
736 {
737 int i, j;
738 int done_mask = ~dst.writemask;
739
740 /* TGSI RCP is a scalar operation splatting results to all channels,
741 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
742 * dst channels.
743 */
744 for (i = 0; i < 4; i++) {
745 GLuint this_mask = (1 << i);
746 glsl_to_tgsi_instruction *inst;
747 st_src_reg src0 = orig_src0;
748 st_src_reg src1 = orig_src1;
749
750 if (done_mask & this_mask)
751 continue;
752
753 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
754 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
755 for (j = i + 1; j < 4; j++) {
756 /* If there is another enabled component in the destination that is
757 * derived from the same inputs, generate its value on this pass as
758 * well.
759 */
760 if (!(done_mask & (1 << j)) &&
761 GET_SWZ(src0.swizzle, j) == src0_swiz &&
762 GET_SWZ(src1.swizzle, j) == src1_swiz) {
763 this_mask |= (1 << j);
764 }
765 }
766 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
767 src0_swiz, src0_swiz);
768 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
769 src1_swiz, src1_swiz);
770
771 inst = emit(ir, op, dst, src0, src1);
772 inst->dst.writemask = this_mask;
773 done_mask |= this_mask;
774 }
775 }
776
777 void
778 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
779 st_dst_reg dst, st_src_reg src0)
780 {
781 st_src_reg undef = undef_src;
782
783 undef.swizzle = SWIZZLE_XXXX;
784
785 emit_scalar(ir, op, dst, src0, undef);
786 }
787
788 void
789 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
790 st_dst_reg dst, st_src_reg src0)
791 {
792 int op = TGSI_OPCODE_ARL;
793
794 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
795 op = TGSI_OPCODE_UARL;
796
797 assert(dst.file == PROGRAM_ADDRESS);
798 if (dst.index >= this->num_address_regs)
799 this->num_address_regs = dst.index + 1;
800
801 emit(NULL, op, dst, src0);
802 }
803
804 /**
805 * Emit an TGSI_OPCODE_SCS instruction
806 *
807 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
808 * Instead of splatting its result across all four components of the
809 * destination, it writes one value to the \c x component and another value to
810 * the \c y component.
811 *
812 * \param ir IR instruction being processed
813 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
814 * on which value is desired.
815 * \param dst Destination register
816 * \param src Source register
817 */
818 void
819 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
820 st_dst_reg dst,
821 const st_src_reg &src)
822 {
823 /* Vertex programs cannot use the SCS opcode.
824 */
825 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
826 emit_scalar(ir, op, dst, src);
827 return;
828 }
829
830 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
831 const unsigned scs_mask = (1U << component);
832 int done_mask = ~dst.writemask;
833 st_src_reg tmp;
834
835 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
836
837 /* If there are compnents in the destination that differ from the component
838 * that will be written by the SCS instrution, we'll need a temporary.
839 */
840 if (scs_mask != unsigned(dst.writemask)) {
841 tmp = get_temp(glsl_type::vec4_type);
842 }
843
844 for (unsigned i = 0; i < 4; i++) {
845 unsigned this_mask = (1U << i);
846 st_src_reg src0 = src;
847
848 if ((done_mask & this_mask) != 0)
849 continue;
850
851 /* The source swizzle specified which component of the source generates
852 * sine / cosine for the current component in the destination. The SCS
853 * instruction requires that this value be swizzle to the X component.
854 * Replace the current swizzle with a swizzle that puts the source in
855 * the X component.
856 */
857 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
858
859 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
860 src0_swiz, src0_swiz);
861 for (unsigned j = i + 1; j < 4; j++) {
862 /* If there is another enabled component in the destination that is
863 * derived from the same inputs, generate its value on this pass as
864 * well.
865 */
866 if (!(done_mask & (1 << j)) &&
867 GET_SWZ(src0.swizzle, j) == src0_swiz) {
868 this_mask |= (1 << j);
869 }
870 }
871
872 if (this_mask != scs_mask) {
873 glsl_to_tgsi_instruction *inst;
874 st_dst_reg tmp_dst = st_dst_reg(tmp);
875
876 /* Emit the SCS instruction.
877 */
878 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
879 inst->dst.writemask = scs_mask;
880
881 /* Move the result of the SCS instruction to the desired location in
882 * the destination.
883 */
884 tmp.swizzle = MAKE_SWIZZLE4(component, component,
885 component, component);
886 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
887 inst->dst.writemask = this_mask;
888 } else {
889 /* Emit the SCS instruction to write directly to the destination.
890 */
891 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
892 inst->dst.writemask = scs_mask;
893 }
894
895 done_mask |= this_mask;
896 }
897 }
898
899 int
900 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
901 gl_constant_value values[4], int size, int datatype,
902 GLuint *swizzle_out)
903 {
904 if (file == PROGRAM_CONSTANT) {
905 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
906 size, datatype, swizzle_out);
907 } else {
908 int index = 0;
909 immediate_storage *entry;
910 assert(file == PROGRAM_IMMEDIATE);
911
912 /* Search immediate storage to see if we already have an identical
913 * immediate that we can use instead of adding a duplicate entry.
914 */
915 foreach_in_list(immediate_storage, entry, &this->immediates) {
916 if (entry->size == size &&
917 entry->type == datatype &&
918 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
919 return index;
920 }
921 index++;
922 }
923
924 /* Add this immediate to the list. */
925 entry = new(mem_ctx) immediate_storage(values, size, datatype);
926 this->immediates.push_tail(entry);
927 this->num_immediates++;
928 return index;
929 }
930 }
931
932 st_src_reg
933 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
934 {
935 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
936 union gl_constant_value uval;
937
938 uval.f = val;
939 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
940
941 return src;
942 }
943
944 st_src_reg
945 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
946 {
947 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
948 union gl_constant_value uval;
949
950 assert(native_integers);
951
952 uval.i = val;
953 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
954
955 return src;
956 }
957
958 st_src_reg
959 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
960 {
961 if (native_integers)
962 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
963 st_src_reg_for_int(val);
964 else
965 return st_src_reg_for_float(val);
966 }
967
968 static int
969 type_size(const struct glsl_type *type)
970 {
971 unsigned int i;
972 int size;
973
974 switch (type->base_type) {
975 case GLSL_TYPE_UINT:
976 case GLSL_TYPE_INT:
977 case GLSL_TYPE_FLOAT:
978 case GLSL_TYPE_BOOL:
979 if (type->is_matrix()) {
980 return type->matrix_columns;
981 } else {
982 /* Regardless of size of vector, it gets a vec4. This is bad
983 * packing for things like floats, but otherwise arrays become a
984 * mess. Hopefully a later pass over the code can pack scalars
985 * down if appropriate.
986 */
987 return 1;
988 }
989 case GLSL_TYPE_ARRAY:
990 assert(type->length > 0);
991 return type_size(type->fields.array) * type->length;
992 case GLSL_TYPE_STRUCT:
993 size = 0;
994 for (i = 0; i < type->length; i++) {
995 size += type_size(type->fields.structure[i].type);
996 }
997 return size;
998 case GLSL_TYPE_SAMPLER:
999 case GLSL_TYPE_IMAGE:
1000 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1001 * at link time.
1002 */
1003 return 1;
1004 case GLSL_TYPE_ATOMIC_UINT:
1005 case GLSL_TYPE_INTERFACE:
1006 case GLSL_TYPE_VOID:
1007 case GLSL_TYPE_ERROR:
1008 assert(!"Invalid type in type_size");
1009 break;
1010 }
1011 return 0;
1012 }
1013
1014 /**
1015 * In the initial pass of codegen, we assign temporary numbers to
1016 * intermediate results. (not SSA -- variable assignments will reuse
1017 * storage).
1018 */
1019 st_src_reg
1020 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1021 {
1022 st_src_reg src;
1023
1024 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1025 src.reladdr = NULL;
1026 src.negate = 0;
1027
1028 if (!options->EmitNoIndirectTemp &&
1029 (type->is_array() || type->is_matrix())) {
1030
1031 src.file = PROGRAM_ARRAY;
1032 src.index = next_array << 16 | 0x8000;
1033 array_sizes[next_array] = type_size(type);
1034 ++next_array;
1035
1036 } else {
1037 src.file = PROGRAM_TEMPORARY;
1038 src.index = next_temp;
1039 next_temp += type_size(type);
1040 }
1041
1042 if (type->is_array() || type->is_record()) {
1043 src.swizzle = SWIZZLE_NOOP;
1044 } else {
1045 src.swizzle = swizzle_for_size(type->vector_elements);
1046 }
1047
1048 return src;
1049 }
1050
1051 variable_storage *
1052 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1053 {
1054
1055 foreach_in_list(variable_storage, entry, &this->variables) {
1056 if (entry->var == var)
1057 return entry;
1058 }
1059
1060 return NULL;
1061 }
1062
1063 void
1064 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1065 {
1066 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1067 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1068
1069 fp->OriginUpperLeft = ir->data.origin_upper_left;
1070 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1071 }
1072
1073 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1074 unsigned int i;
1075 const ir_state_slot *const slots = ir->state_slots;
1076 assert(ir->state_slots != NULL);
1077
1078 /* Check if this statevar's setup in the STATE file exactly
1079 * matches how we'll want to reference it as a
1080 * struct/array/whatever. If not, then we need to move it into
1081 * temporary storage and hope that it'll get copy-propagated
1082 * out.
1083 */
1084 for (i = 0; i < ir->num_state_slots; i++) {
1085 if (slots[i].swizzle != SWIZZLE_XYZW) {
1086 break;
1087 }
1088 }
1089
1090 variable_storage *storage;
1091 st_dst_reg dst;
1092 if (i == ir->num_state_slots) {
1093 /* We'll set the index later. */
1094 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1095 this->variables.push_tail(storage);
1096
1097 dst = undef_dst;
1098 } else {
1099 /* The variable_storage constructor allocates slots based on the size
1100 * of the type. However, this had better match the number of state
1101 * elements that we're going to copy into the new temporary.
1102 */
1103 assert((int) ir->num_state_slots == type_size(ir->type));
1104
1105 dst = st_dst_reg(get_temp(ir->type));
1106
1107 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1108
1109 this->variables.push_tail(storage);
1110 }
1111
1112
1113 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1114 int index = _mesa_add_state_reference(this->prog->Parameters,
1115 (gl_state_index *)slots[i].tokens);
1116
1117 if (storage->file == PROGRAM_STATE_VAR) {
1118 if (storage->index == -1) {
1119 storage->index = index;
1120 } else {
1121 assert(index == storage->index + (int)i);
1122 }
1123 } else {
1124 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1125 * the data being moved since MOV does not care about the type of
1126 * data it is moving, and we don't want to declare registers with
1127 * array or struct types.
1128 */
1129 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1130 src.swizzle = slots[i].swizzle;
1131 emit(ir, TGSI_OPCODE_MOV, dst, src);
1132 /* even a float takes up a whole vec4 reg in a struct/array. */
1133 dst.index++;
1134 }
1135 }
1136
1137 if (storage->file == PROGRAM_TEMPORARY &&
1138 dst.index != storage->index + (int) ir->num_state_slots) {
1139 fail_link(this->shader_program,
1140 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1141 ir->name, dst.index - storage->index,
1142 type_size(ir->type));
1143 }
1144 }
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1149 {
1150 emit(NULL, TGSI_OPCODE_BGNLOOP);
1151
1152 visit_exec_list(&ir->body_instructions, this);
1153
1154 emit(NULL, TGSI_OPCODE_ENDLOOP);
1155 }
1156
1157 void
1158 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1159 {
1160 switch (ir->mode) {
1161 case ir_loop_jump::jump_break:
1162 emit(NULL, TGSI_OPCODE_BRK);
1163 break;
1164 case ir_loop_jump::jump_continue:
1165 emit(NULL, TGSI_OPCODE_CONT);
1166 break;
1167 }
1168 }
1169
1170
1171 void
1172 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1173 {
1174 assert(0);
1175 (void)ir;
1176 }
1177
1178 void
1179 glsl_to_tgsi_visitor::visit(ir_function *ir)
1180 {
1181 /* Ignore function bodies other than main() -- we shouldn't see calls to
1182 * them since they should all be inlined before we get to glsl_to_tgsi.
1183 */
1184 if (strcmp(ir->name, "main") == 0) {
1185 const ir_function_signature *sig;
1186 exec_list empty;
1187
1188 sig = ir->matching_signature(NULL, &empty, false);
1189
1190 assert(sig);
1191
1192 foreach_in_list(ir_instruction, ir, &sig->body) {
1193 ir->accept(this);
1194 }
1195 }
1196 }
1197
1198 bool
1199 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1200 {
1201 int nonmul_operand = 1 - mul_operand;
1202 st_src_reg a, b, c;
1203 st_dst_reg result_dst;
1204
1205 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1206 if (!expr || expr->operation != ir_binop_mul)
1207 return false;
1208
1209 expr->operands[0]->accept(this);
1210 a = this->result;
1211 expr->operands[1]->accept(this);
1212 b = this->result;
1213 ir->operands[nonmul_operand]->accept(this);
1214 c = this->result;
1215
1216 this->result = get_temp(ir->type);
1217 result_dst = st_dst_reg(this->result);
1218 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1219 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1220
1221 return true;
1222 }
1223
1224 /**
1225 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1226 *
1227 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1228 * implemented using multiplication, and logical-or is implemented using
1229 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1230 * As result, the logical expression (a & !b) can be rewritten as:
1231 *
1232 * - a * !b
1233 * - a * (1 - b)
1234 * - (a * 1) - (a * b)
1235 * - a + -(a * b)
1236 * - a + (a * -b)
1237 *
1238 * This final expression can be implemented as a single MAD(a, -b, a)
1239 * instruction.
1240 */
1241 bool
1242 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1243 {
1244 const int other_operand = 1 - try_operand;
1245 st_src_reg a, b;
1246
1247 ir_expression *expr = ir->operands[try_operand]->as_expression();
1248 if (!expr || expr->operation != ir_unop_logic_not)
1249 return false;
1250
1251 ir->operands[other_operand]->accept(this);
1252 a = this->result;
1253 expr->operands[0]->accept(this);
1254 b = this->result;
1255
1256 b.negate = ~b.negate;
1257
1258 this->result = get_temp(ir->type);
1259 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1260
1261 return true;
1262 }
1263
1264 void
1265 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1266 st_src_reg *reg, int *num_reladdr)
1267 {
1268 if (!reg->reladdr && !reg->reladdr2)
1269 return;
1270
1271 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1272 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1273
1274 if (*num_reladdr != 1) {
1275 st_src_reg temp = get_temp(glsl_type::vec4_type);
1276
1277 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1278 *reg = temp;
1279 }
1280
1281 (*num_reladdr)--;
1282 }
1283
1284 void
1285 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1286 {
1287 unsigned int operand;
1288 st_src_reg op[Elements(ir->operands)];
1289 st_src_reg result_src;
1290 st_dst_reg result_dst;
1291
1292 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1293 */
1294 if (ir->operation == ir_binop_add) {
1295 if (try_emit_mad(ir, 1))
1296 return;
1297 if (try_emit_mad(ir, 0))
1298 return;
1299 }
1300
1301 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1302 */
1303 if (!native_integers && ir->operation == ir_binop_logic_and) {
1304 if (try_emit_mad_for_and_not(ir, 1))
1305 return;
1306 if (try_emit_mad_for_and_not(ir, 0))
1307 return;
1308 }
1309
1310 if (ir->operation == ir_quadop_vector)
1311 assert(!"ir_quadop_vector should have been lowered");
1312
1313 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1314 this->result.file = PROGRAM_UNDEFINED;
1315 ir->operands[operand]->accept(this);
1316 if (this->result.file == PROGRAM_UNDEFINED) {
1317 printf("Failed to get tree for expression operand:\n");
1318 ir->operands[operand]->print();
1319 printf("\n");
1320 exit(1);
1321 }
1322 op[operand] = this->result;
1323
1324 /* Matrix expression operands should have been broken down to vector
1325 * operations already.
1326 */
1327 assert(!ir->operands[operand]->type->is_matrix());
1328 }
1329
1330 int vector_elements = ir->operands[0]->type->vector_elements;
1331 if (ir->operands[1]) {
1332 vector_elements = MAX2(vector_elements,
1333 ir->operands[1]->type->vector_elements);
1334 }
1335
1336 this->result.file = PROGRAM_UNDEFINED;
1337
1338 /* Storage for our result. Ideally for an assignment we'd be using
1339 * the actual storage for the result here, instead.
1340 */
1341 result_src = get_temp(ir->type);
1342 /* convenience for the emit functions below. */
1343 result_dst = st_dst_reg(result_src);
1344 /* Limit writes to the channels that will be used by result_src later.
1345 * This does limit this temp's use as a temporary for multi-instruction
1346 * sequences.
1347 */
1348 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1349
1350 switch (ir->operation) {
1351 case ir_unop_logic_not:
1352 if (result_dst.type != GLSL_TYPE_FLOAT)
1353 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1354 else {
1355 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1356 * older GPUs implement SEQ using multiple instructions (i915 uses two
1357 * SGE instructions and a MUL instruction). Since our logic values are
1358 * 0.0 and 1.0, 1-x also implements !x.
1359 */
1360 op[0].negate = ~op[0].negate;
1361 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1362 }
1363 break;
1364 case ir_unop_neg:
1365 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1366 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1367 else {
1368 op[0].negate = ~op[0].negate;
1369 result_src = op[0];
1370 }
1371 break;
1372 case ir_unop_abs:
1373 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1374 break;
1375 case ir_unop_sign:
1376 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1377 break;
1378 case ir_unop_rcp:
1379 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1380 break;
1381
1382 case ir_unop_exp2:
1383 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1384 break;
1385 case ir_unop_exp:
1386 case ir_unop_log:
1387 assert(!"not reached: should be handled by ir_explog_to_explog2");
1388 break;
1389 case ir_unop_log2:
1390 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1391 break;
1392 case ir_unop_sin:
1393 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1394 break;
1395 case ir_unop_cos:
1396 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1397 break;
1398 case ir_unop_sin_reduced:
1399 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1400 break;
1401 case ir_unop_cos_reduced:
1402 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1403 break;
1404 case ir_unop_saturate: {
1405 glsl_to_tgsi_instruction *inst;
1406 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]);
1407 inst->saturate = true;
1408 break;
1409 }
1410
1411 case ir_unop_dFdx:
1412 case ir_unop_dFdx_coarse:
1413 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1414 break;
1415 case ir_unop_dFdx_fine:
1416 emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]);
1417 break;
1418 case ir_unop_dFdy:
1419 case ir_unop_dFdy_coarse:
1420 case ir_unop_dFdy_fine:
1421 {
1422 /* The X component contains 1 or -1 depending on whether the framebuffer
1423 * is a FBO or the window system buffer, respectively.
1424 * It is then multiplied with the source operand of DDY.
1425 */
1426 static const gl_state_index transform_y_state[STATE_LENGTH]
1427 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1428
1429 unsigned transform_y_index =
1430 _mesa_add_state_reference(this->prog->Parameters,
1431 transform_y_state);
1432
1433 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1434 transform_y_index,
1435 glsl_type::vec4_type);
1436 transform_y.swizzle = SWIZZLE_XXXX;
1437
1438 st_src_reg temp = get_temp(glsl_type::vec4_type);
1439
1440 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1441 emit(ir, ir->operation == ir_unop_dFdy_fine ?
1442 TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp);
1443 break;
1444 }
1445
1446 case ir_unop_noise: {
1447 /* At some point, a motivated person could add a better
1448 * implementation of noise. Currently not even the nvidia
1449 * binary drivers do anything more than this. In any case, the
1450 * place to do this is in the GL state tracker, not the poor
1451 * driver.
1452 */
1453 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1454 break;
1455 }
1456
1457 case ir_binop_add:
1458 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1459 break;
1460 case ir_binop_sub:
1461 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1462 break;
1463
1464 case ir_binop_mul:
1465 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1466 break;
1467 case ir_binop_div:
1468 if (result_dst.type == GLSL_TYPE_FLOAT)
1469 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1470 else
1471 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1472 break;
1473 case ir_binop_mod:
1474 if (result_dst.type == GLSL_TYPE_FLOAT)
1475 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1476 else
1477 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1478 break;
1479
1480 case ir_binop_less:
1481 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1482 break;
1483 case ir_binop_greater:
1484 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1485 break;
1486 case ir_binop_lequal:
1487 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1488 break;
1489 case ir_binop_gequal:
1490 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1491 break;
1492 case ir_binop_equal:
1493 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1494 break;
1495 case ir_binop_nequal:
1496 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1497 break;
1498 case ir_binop_all_equal:
1499 /* "==" operator producing a scalar boolean. */
1500 if (ir->operands[0]->type->is_vector() ||
1501 ir->operands[1]->type->is_vector()) {
1502 st_src_reg temp = get_temp(native_integers ?
1503 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1504 glsl_type::vec4_type);
1505
1506 if (native_integers) {
1507 st_dst_reg temp_dst = st_dst_reg(temp);
1508 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1509
1510 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1511
1512 /* Emit 1-3 AND operations to combine the SEQ results. */
1513 switch (ir->operands[0]->type->vector_elements) {
1514 case 2:
1515 break;
1516 case 3:
1517 temp_dst.writemask = WRITEMASK_Y;
1518 temp1.swizzle = SWIZZLE_YYYY;
1519 temp2.swizzle = SWIZZLE_ZZZZ;
1520 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1521 break;
1522 case 4:
1523 temp_dst.writemask = WRITEMASK_X;
1524 temp1.swizzle = SWIZZLE_XXXX;
1525 temp2.swizzle = SWIZZLE_YYYY;
1526 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1527 temp_dst.writemask = WRITEMASK_Y;
1528 temp1.swizzle = SWIZZLE_ZZZZ;
1529 temp2.swizzle = SWIZZLE_WWWW;
1530 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1531 }
1532
1533 temp1.swizzle = SWIZZLE_XXXX;
1534 temp2.swizzle = SWIZZLE_YYYY;
1535 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1536 } else {
1537 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1538
1539 /* After the dot-product, the value will be an integer on the
1540 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1541 */
1542 emit_dp(ir, result_dst, temp, temp, vector_elements);
1543
1544 /* Negating the result of the dot-product gives values on the range
1545 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1546 * This is achieved using SGE.
1547 */
1548 st_src_reg sge_src = result_src;
1549 sge_src.negate = ~sge_src.negate;
1550 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1551 }
1552 } else {
1553 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1554 }
1555 break;
1556 case ir_binop_any_nequal:
1557 /* "!=" operator producing a scalar boolean. */
1558 if (ir->operands[0]->type->is_vector() ||
1559 ir->operands[1]->type->is_vector()) {
1560 st_src_reg temp = get_temp(native_integers ?
1561 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1562 glsl_type::vec4_type);
1563 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1564
1565 if (native_integers) {
1566 st_dst_reg temp_dst = st_dst_reg(temp);
1567 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1568
1569 /* Emit 1-3 OR operations to combine the SNE results. */
1570 switch (ir->operands[0]->type->vector_elements) {
1571 case 2:
1572 break;
1573 case 3:
1574 temp_dst.writemask = WRITEMASK_Y;
1575 temp1.swizzle = SWIZZLE_YYYY;
1576 temp2.swizzle = SWIZZLE_ZZZZ;
1577 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1578 break;
1579 case 4:
1580 temp_dst.writemask = WRITEMASK_X;
1581 temp1.swizzle = SWIZZLE_XXXX;
1582 temp2.swizzle = SWIZZLE_YYYY;
1583 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1584 temp_dst.writemask = WRITEMASK_Y;
1585 temp1.swizzle = SWIZZLE_ZZZZ;
1586 temp2.swizzle = SWIZZLE_WWWW;
1587 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1588 }
1589
1590 temp1.swizzle = SWIZZLE_XXXX;
1591 temp2.swizzle = SWIZZLE_YYYY;
1592 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1593 } else {
1594 /* After the dot-product, the value will be an integer on the
1595 * range [0,4]. Zero stays zero, and positive values become 1.0.
1596 */
1597 glsl_to_tgsi_instruction *const dp =
1598 emit_dp(ir, result_dst, temp, temp, vector_elements);
1599 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1600 /* The clamping to [0,1] can be done for free in the fragment
1601 * shader with a saturate.
1602 */
1603 dp->saturate = true;
1604 } else {
1605 /* Negating the result of the dot-product gives values on the range
1606 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1607 * achieved using SLT.
1608 */
1609 st_src_reg slt_src = result_src;
1610 slt_src.negate = ~slt_src.negate;
1611 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1612 }
1613 }
1614 } else {
1615 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1616 }
1617 break;
1618
1619 case ir_unop_any: {
1620 assert(ir->operands[0]->type->is_vector());
1621
1622 if (native_integers) {
1623 int dst_swizzle = 0, op0_swizzle, i;
1624 st_src_reg accum = op[0];
1625
1626 op0_swizzle = op[0].swizzle;
1627 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1628 GET_SWZ(op0_swizzle, 0),
1629 GET_SWZ(op0_swizzle, 0),
1630 GET_SWZ(op0_swizzle, 0));
1631 for (i = 0; i < 4; i++) {
1632 if (result_dst.writemask & (1 << i)) {
1633 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1634 break;
1635 }
1636 }
1637 assert(i != 4);
1638 assert(ir->operands[0]->type->is_boolean());
1639
1640 /* OR all the components together, since they should be either 0 or ~0
1641 */
1642 switch (ir->operands[0]->type->vector_elements) {
1643 case 4:
1644 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1645 GET_SWZ(op0_swizzle, 3),
1646 GET_SWZ(op0_swizzle, 3),
1647 GET_SWZ(op0_swizzle, 3));
1648 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1649 accum = st_src_reg(result_dst);
1650 accum.swizzle = dst_swizzle;
1651 /* fallthrough */
1652 case 3:
1653 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1654 GET_SWZ(op0_swizzle, 2),
1655 GET_SWZ(op0_swizzle, 2),
1656 GET_SWZ(op0_swizzle, 2));
1657 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1658 accum = st_src_reg(result_dst);
1659 accum.swizzle = dst_swizzle;
1660 /* fallthrough */
1661 case 2:
1662 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1663 GET_SWZ(op0_swizzle, 1),
1664 GET_SWZ(op0_swizzle, 1),
1665 GET_SWZ(op0_swizzle, 1));
1666 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1667 break;
1668 default:
1669 assert(!"Unexpected vector size");
1670 break;
1671 }
1672 } else {
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1675 */
1676 glsl_to_tgsi_instruction *const dp =
1677 emit_dp(ir, result_dst, op[0], op[0],
1678 ir->operands[0]->type->vector_elements);
1679 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1680 result_dst.type == GLSL_TYPE_FLOAT) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1683 */
1684 dp->saturate = true;
1685 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1689 */
1690 st_src_reg slt_src = result_src;
1691 slt_src.negate = ~slt_src.negate;
1692 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1693 }
1694 else {
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1697 }
1698 }
1699 break;
1700 }
1701
1702 case ir_binop_logic_xor:
1703 if (native_integers)
1704 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1705 else
1706 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1707 break;
1708
1709 case ir_binop_logic_or: {
1710 if (native_integers) {
1711 /* If integers are used as booleans, we can use an actual "or"
1712 * instruction.
1713 */
1714 assert(native_integers);
1715 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1716 } else {
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1719 */
1720 glsl_to_tgsi_instruction *add =
1721 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1722 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1725 */
1726 add->saturate = true;
1727 } else {
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1731 */
1732 st_src_reg slt_src = result_src;
1733 slt_src.negate = ~slt_src.negate;
1734 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1735 }
1736 }
1737 break;
1738 }
1739
1740 case ir_binop_logic_and:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1744 */
1745 if (native_integers)
1746 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1747 else
1748 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1749 break;
1750
1751 case ir_binop_dot:
1752 assert(ir->operands[0]->type->is_vector());
1753 assert(ir->operands[0]->type == ir->operands[1]->type);
1754 emit_dp(ir, result_dst, op[0], op[1],
1755 ir->operands[0]->type->vector_elements);
1756 break;
1757
1758 case ir_unop_sqrt:
1759 if (have_sqrt) {
1760 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1761 }
1762 else {
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1765 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op[0].negate = ~op[0].negate;
1768 emit(ir, TGSI_OPCODE_CMP, result_dst,
1769 op[0], result_src, st_src_reg_for_float(0.0));
1770 }
1771 break;
1772 case ir_unop_rsq:
1773 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1774 break;
1775 case ir_unop_i2f:
1776 if (native_integers) {
1777 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1778 break;
1779 }
1780 /* fallthrough to next case otherwise */
1781 case ir_unop_b2f:
1782 if (native_integers) {
1783 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1784 break;
1785 }
1786 /* fallthrough to next case otherwise */
1787 case ir_unop_i2u:
1788 case ir_unop_u2i:
1789 /* Converting between signed and unsigned integers is a no-op. */
1790 result_src = op[0];
1791 break;
1792 case ir_unop_b2i:
1793 if (native_integers) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1797 */
1798 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1799 } else {
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1802 */
1803 result_src = op[0];
1804 }
1805 break;
1806 case ir_unop_f2i:
1807 if (native_integers)
1808 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1809 else
1810 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1811 break;
1812 case ir_unop_f2u:
1813 if (native_integers)
1814 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1815 else
1816 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1817 break;
1818 case ir_unop_bitcast_f2i:
1819 result_src = op[0];
1820 result_src.type = GLSL_TYPE_INT;
1821 break;
1822 case ir_unop_bitcast_f2u:
1823 result_src = op[0];
1824 result_src.type = GLSL_TYPE_UINT;
1825 break;
1826 case ir_unop_bitcast_i2f:
1827 case ir_unop_bitcast_u2f:
1828 result_src = op[0];
1829 result_src.type = GLSL_TYPE_FLOAT;
1830 break;
1831 case ir_unop_f2b:
1832 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1833 break;
1834 case ir_unop_i2b:
1835 if (native_integers)
1836 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1837 else
1838 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1839 break;
1840 case ir_unop_trunc:
1841 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1842 break;
1843 case ir_unop_ceil:
1844 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1845 break;
1846 case ir_unop_floor:
1847 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1848 break;
1849 case ir_unop_round_even:
1850 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1851 break;
1852 case ir_unop_fract:
1853 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1854 break;
1855
1856 case ir_binop_min:
1857 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1858 break;
1859 case ir_binop_max:
1860 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1861 break;
1862 case ir_binop_pow:
1863 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1864 break;
1865
1866 case ir_unop_bit_not:
1867 if (native_integers) {
1868 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1869 break;
1870 }
1871 case ir_unop_u2f:
1872 if (native_integers) {
1873 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1874 break;
1875 }
1876 case ir_binop_lshift:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1879 break;
1880 }
1881 case ir_binop_rshift:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1884 break;
1885 }
1886 case ir_binop_bit_and:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1889 break;
1890 }
1891 case ir_binop_bit_xor:
1892 if (native_integers) {
1893 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1894 break;
1895 }
1896 case ir_binop_bit_or:
1897 if (native_integers) {
1898 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1899 break;
1900 }
1901
1902 assert(!"GLSL 1.30 features unsupported");
1903 break;
1904
1905 case ir_binop_ubo_load: {
1906 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
1907 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1908 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1909 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
1910 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1911 st_src_reg cbuf;
1912
1913 cbuf.type = glsl_type::vec4_type->base_type;
1914 cbuf.file = PROGRAM_CONSTANT;
1915 cbuf.index = 0;
1916 cbuf.reladdr = NULL;
1917 cbuf.negate = 0;
1918
1919 assert(ir->type->is_vector() || ir->type->is_scalar());
1920
1921 if (const_offset_ir) {
1922 /* Constant index into constant buffer */
1923 cbuf.reladdr = NULL;
1924 cbuf.index = const_offset / 16;
1925 }
1926 else {
1927 /* Relative/variable index into constant buffer */
1928 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1929 st_src_reg_for_int(4));
1930 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1931 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1932 }
1933
1934 if (const_uniform_block) {
1935 /* Constant constant buffer */
1936 cbuf.reladdr2 = NULL;
1937 cbuf.index2D = const_block;
1938 cbuf.has_index2 = true;
1939 }
1940 else {
1941 /* Relative/variable constant buffer */
1942 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
1943 cbuf.index2D = 1;
1944 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
1945 cbuf.has_index2 = true;
1946 }
1947
1948 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1949 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1950 const_offset % 16 / 4,
1951 const_offset % 16 / 4,
1952 const_offset % 16 / 4);
1953
1954 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1955 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1956 } else {
1957 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1958 }
1959 break;
1960 }
1961 case ir_triop_lrp:
1962 /* note: we have to reorder the three args here */
1963 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1964 break;
1965 case ir_triop_csel:
1966 if (this->ctx->Const.NativeIntegers)
1967 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1968 else {
1969 op[0].negate = ~op[0].negate;
1970 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1971 }
1972 break;
1973 case ir_triop_bitfield_extract:
1974 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
1975 break;
1976 case ir_quadop_bitfield_insert:
1977 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
1978 break;
1979 case ir_unop_bitfield_reverse:
1980 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
1981 break;
1982 case ir_unop_bit_count:
1983 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
1984 break;
1985 case ir_unop_find_msb:
1986 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
1987 break;
1988 case ir_unop_find_lsb:
1989 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
1990 break;
1991 case ir_binop_imul_high:
1992 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
1993 break;
1994 case ir_triop_fma:
1995 /* NOTE: Perhaps there should be a special opcode that enforces fused
1996 * mul-add. Just use MAD for now.
1997 */
1998 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
1999 break;
2000 case ir_unop_interpolate_at_centroid:
2001 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2002 break;
2003 case ir_binop_interpolate_at_offset:
2004 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2005 break;
2006 case ir_binop_interpolate_at_sample:
2007 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2008 break;
2009 case ir_unop_pack_snorm_2x16:
2010 case ir_unop_pack_unorm_2x16:
2011 case ir_unop_pack_half_2x16:
2012 case ir_unop_pack_snorm_4x8:
2013 case ir_unop_pack_unorm_4x8:
2014 case ir_unop_unpack_snorm_2x16:
2015 case ir_unop_unpack_unorm_2x16:
2016 case ir_unop_unpack_half_2x16:
2017 case ir_unop_unpack_half_2x16_split_x:
2018 case ir_unop_unpack_half_2x16_split_y:
2019 case ir_unop_unpack_snorm_4x8:
2020 case ir_unop_unpack_unorm_4x8:
2021 case ir_binop_pack_half_2x16_split:
2022 case ir_binop_bfm:
2023 case ir_triop_bfi:
2024 case ir_quadop_vector:
2025 case ir_binop_vector_extract:
2026 case ir_triop_vector_insert:
2027 case ir_binop_ldexp:
2028 case ir_binop_carry:
2029 case ir_binop_borrow:
2030 /* This operation is not supported, or should have already been handled.
2031 */
2032 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2033 break;
2034 }
2035
2036 this->result = result_src;
2037 }
2038
2039
2040 void
2041 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2042 {
2043 st_src_reg src;
2044 int i;
2045 int swizzle[4];
2046
2047 /* Note that this is only swizzles in expressions, not those on the left
2048 * hand side of an assignment, which do write masking. See ir_assignment
2049 * for that.
2050 */
2051
2052 ir->val->accept(this);
2053 src = this->result;
2054 assert(src.file != PROGRAM_UNDEFINED);
2055
2056 for (i = 0; i < 4; i++) {
2057 if (i < ir->type->vector_elements) {
2058 switch (i) {
2059 case 0:
2060 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2061 break;
2062 case 1:
2063 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2064 break;
2065 case 2:
2066 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2067 break;
2068 case 3:
2069 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2070 break;
2071 }
2072 } else {
2073 /* If the type is smaller than a vec4, replicate the last
2074 * channel out.
2075 */
2076 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2077 }
2078 }
2079
2080 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2081
2082 this->result = src;
2083 }
2084
2085 void
2086 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2087 {
2088 variable_storage *entry = find_variable_storage(ir->var);
2089 ir_variable *var = ir->var;
2090
2091 if (!entry) {
2092 switch (var->data.mode) {
2093 case ir_var_uniform:
2094 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2095 var->data.location);
2096 this->variables.push_tail(entry);
2097 break;
2098 case ir_var_shader_in:
2099 /* The linker assigns locations for varyings and attributes,
2100 * including deprecated builtins (like gl_Color), user-assign
2101 * generic attributes (glBindVertexLocation), and
2102 * user-defined varyings.
2103 */
2104 assert(var->data.location != -1);
2105 entry = new(mem_ctx) variable_storage(var,
2106 PROGRAM_INPUT,
2107 var->data.location);
2108 break;
2109 case ir_var_shader_out:
2110 assert(var->data.location != -1);
2111 entry = new(mem_ctx) variable_storage(var,
2112 PROGRAM_OUTPUT,
2113 var->data.location
2114 + var->data.index);
2115 break;
2116 case ir_var_system_value:
2117 entry = new(mem_ctx) variable_storage(var,
2118 PROGRAM_SYSTEM_VALUE,
2119 var->data.location);
2120 break;
2121 case ir_var_auto:
2122 case ir_var_temporary:
2123 st_src_reg src = get_temp(var->type);
2124
2125 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2126 this->variables.push_tail(entry);
2127
2128 break;
2129 }
2130
2131 if (!entry) {
2132 printf("Failed to make storage for %s\n", var->name);
2133 exit(1);
2134 }
2135 }
2136
2137 this->result = st_src_reg(entry->file, entry->index, var->type);
2138 if (!native_integers)
2139 this->result.type = GLSL_TYPE_FLOAT;
2140 }
2141
2142 void
2143 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2144 {
2145 ir_constant *index;
2146 st_src_reg src;
2147 int element_size = type_size(ir->type);
2148 bool is_2D_input;
2149
2150 index = ir->array_index->constant_expression_value();
2151
2152 ir->array->accept(this);
2153 src = this->result;
2154
2155 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2156 src.file == PROGRAM_INPUT &&
2157 ir->array->ir_type != ir_type_dereference_array;
2158
2159 if (is_2D_input)
2160 element_size = 1;
2161
2162 if (index) {
2163 if (is_2D_input) {
2164 src.index2D = index->value.i[0];
2165 src.has_index2 = true;
2166 } else
2167 src.index += index->value.i[0] * element_size;
2168 } else {
2169 /* Variable index array dereference. It eats the "vec4" of the
2170 * base of the array and an index that offsets the TGSI register
2171 * index.
2172 */
2173 ir->array_index->accept(this);
2174
2175 st_src_reg index_reg;
2176
2177 if (element_size == 1) {
2178 index_reg = this->result;
2179 } else {
2180 index_reg = get_temp(native_integers ?
2181 glsl_type::int_type : glsl_type::float_type);
2182
2183 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2184 this->result, st_src_reg_for_type(index_reg.type, element_size));
2185 }
2186
2187 /* If there was already a relative address register involved, add the
2188 * new and the old together to get the new offset.
2189 */
2190 if (!is_2D_input && src.reladdr != NULL) {
2191 st_src_reg accum_reg = get_temp(native_integers ?
2192 glsl_type::int_type : glsl_type::float_type);
2193
2194 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2195 index_reg, *src.reladdr);
2196
2197 index_reg = accum_reg;
2198 }
2199
2200 if (is_2D_input) {
2201 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2202 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2203 src.index2D = 0;
2204 src.has_index2 = true;
2205 } else {
2206 src.reladdr = ralloc(mem_ctx, st_src_reg);
2207 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2208 }
2209 }
2210
2211 /* If the type is smaller than a vec4, replicate the last channel out. */
2212 if (ir->type->is_scalar() || ir->type->is_vector())
2213 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2214 else
2215 src.swizzle = SWIZZLE_NOOP;
2216
2217 /* Change the register type to the element type of the array. */
2218 src.type = ir->type->base_type;
2219
2220 this->result = src;
2221 }
2222
2223 void
2224 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2225 {
2226 unsigned int i;
2227 const glsl_type *struct_type = ir->record->type;
2228 int offset = 0;
2229
2230 ir->record->accept(this);
2231
2232 for (i = 0; i < struct_type->length; i++) {
2233 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2234 break;
2235 offset += type_size(struct_type->fields.structure[i].type);
2236 }
2237
2238 /* If the type is smaller than a vec4, replicate the last channel out. */
2239 if (ir->type->is_scalar() || ir->type->is_vector())
2240 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2241 else
2242 this->result.swizzle = SWIZZLE_NOOP;
2243
2244 this->result.index += offset;
2245 this->result.type = ir->type->base_type;
2246 }
2247
2248 /**
2249 * We want to be careful in assignment setup to hit the actual storage
2250 * instead of potentially using a temporary like we might with the
2251 * ir_dereference handler.
2252 */
2253 static st_dst_reg
2254 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2255 {
2256 /* The LHS must be a dereference. If the LHS is a variable indexed array
2257 * access of a vector, it must be separated into a series conditional moves
2258 * before reaching this point (see ir_vec_index_to_cond_assign).
2259 */
2260 assert(ir->as_dereference());
2261 ir_dereference_array *deref_array = ir->as_dereference_array();
2262 if (deref_array) {
2263 assert(!deref_array->array->type->is_vector());
2264 }
2265
2266 /* Use the rvalue deref handler for the most part. We'll ignore
2267 * swizzles in it and write swizzles using writemask, though.
2268 */
2269 ir->accept(v);
2270 return st_dst_reg(v->result);
2271 }
2272
2273 /**
2274 * Process the condition of a conditional assignment
2275 *
2276 * Examines the condition of a conditional assignment to generate the optimal
2277 * first operand of a \c CMP instruction. If the condition is a relational
2278 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2279 * used as the source for the \c CMP instruction. Otherwise the comparison
2280 * is processed to a boolean result, and the boolean result is used as the
2281 * operand to the CMP instruction.
2282 */
2283 bool
2284 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2285 {
2286 ir_rvalue *src_ir = ir;
2287 bool negate = true;
2288 bool switch_order = false;
2289
2290 ir_expression *const expr = ir->as_expression();
2291 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2292 bool zero_on_left = false;
2293
2294 if (expr->operands[0]->is_zero()) {
2295 src_ir = expr->operands[1];
2296 zero_on_left = true;
2297 } else if (expr->operands[1]->is_zero()) {
2298 src_ir = expr->operands[0];
2299 zero_on_left = false;
2300 }
2301
2302 /* a is - 0 + - 0 +
2303 * (a < 0) T F F ( a < 0) T F F
2304 * (0 < a) F F T (-a < 0) F F T
2305 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2306 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2307 * (a > 0) F F T (-a < 0) F F T
2308 * (0 > a) T F F ( a < 0) T F F
2309 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2310 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2311 *
2312 * Note that exchanging the order of 0 and 'a' in the comparison simply
2313 * means that the value of 'a' should be negated.
2314 */
2315 if (src_ir != ir) {
2316 switch (expr->operation) {
2317 case ir_binop_less:
2318 switch_order = false;
2319 negate = zero_on_left;
2320 break;
2321
2322 case ir_binop_greater:
2323 switch_order = false;
2324 negate = !zero_on_left;
2325 break;
2326
2327 case ir_binop_lequal:
2328 switch_order = true;
2329 negate = !zero_on_left;
2330 break;
2331
2332 case ir_binop_gequal:
2333 switch_order = true;
2334 negate = zero_on_left;
2335 break;
2336
2337 default:
2338 /* This isn't the right kind of comparison afterall, so make sure
2339 * the whole condition is visited.
2340 */
2341 src_ir = ir;
2342 break;
2343 }
2344 }
2345 }
2346
2347 src_ir->accept(this);
2348
2349 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2350 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2351 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2352 * computing the condition.
2353 */
2354 if (negate)
2355 this->result.negate = ~this->result.negate;
2356
2357 return switch_order;
2358 }
2359
2360 void
2361 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2362 st_dst_reg *l, st_src_reg *r)
2363 {
2364 if (type->base_type == GLSL_TYPE_STRUCT) {
2365 for (unsigned int i = 0; i < type->length; i++) {
2366 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2367 }
2368 return;
2369 }
2370
2371 if (type->is_array()) {
2372 for (unsigned int i = 0; i < type->length; i++) {
2373 emit_block_mov(ir, type->fields.array, l, r);
2374 }
2375 return;
2376 }
2377
2378 if (type->is_matrix()) {
2379 const struct glsl_type *vec_type;
2380
2381 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2382 type->vector_elements, 1);
2383
2384 for (int i = 0; i < type->matrix_columns; i++) {
2385 emit_block_mov(ir, vec_type, l, r);
2386 }
2387 return;
2388 }
2389
2390 assert(type->is_scalar() || type->is_vector());
2391
2392 r->type = type->base_type;
2393 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2394 l->index++;
2395 r->index++;
2396 }
2397
2398 void
2399 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2400 {
2401 st_dst_reg l;
2402 st_src_reg r;
2403 int i;
2404
2405 ir->rhs->accept(this);
2406 r = this->result;
2407
2408 l = get_assignment_lhs(ir->lhs, this);
2409
2410 /* FINISHME: This should really set to the correct maximal writemask for each
2411 * FINISHME: component written (in the loops below). This case can only
2412 * FINISHME: occur for matrices, arrays, and structures.
2413 */
2414 if (ir->write_mask == 0) {
2415 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2416 l.writemask = WRITEMASK_XYZW;
2417 } else if (ir->lhs->type->is_scalar() &&
2418 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2419 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2420 * FINISHME: W component of fragment shader output zero, work correctly.
2421 */
2422 l.writemask = WRITEMASK_XYZW;
2423 } else {
2424 int swizzles[4];
2425 int first_enabled_chan = 0;
2426 int rhs_chan = 0;
2427
2428 l.writemask = ir->write_mask;
2429
2430 for (int i = 0; i < 4; i++) {
2431 if (l.writemask & (1 << i)) {
2432 first_enabled_chan = GET_SWZ(r.swizzle, i);
2433 break;
2434 }
2435 }
2436
2437 /* Swizzle a small RHS vector into the channels being written.
2438 *
2439 * glsl ir treats write_mask as dictating how many channels are
2440 * present on the RHS while TGSI treats write_mask as just
2441 * showing which channels of the vec4 RHS get written.
2442 */
2443 for (int i = 0; i < 4; i++) {
2444 if (l.writemask & (1 << i))
2445 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2446 else
2447 swizzles[i] = first_enabled_chan;
2448 }
2449 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2450 swizzles[2], swizzles[3]);
2451 }
2452
2453 assert(l.file != PROGRAM_UNDEFINED);
2454 assert(r.file != PROGRAM_UNDEFINED);
2455
2456 if (ir->condition) {
2457 const bool switch_order = this->process_move_condition(ir->condition);
2458 st_src_reg condition = this->result;
2459
2460 for (i = 0; i < type_size(ir->lhs->type); i++) {
2461 st_src_reg l_src = st_src_reg(l);
2462 st_src_reg condition_temp = condition;
2463 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2464
2465 if (native_integers) {
2466 /* This is necessary because TGSI's CMP instruction expects the
2467 * condition to be a float, and we store booleans as integers.
2468 * TODO: really want to avoid i2f path and use UCMP. Requires
2469 * changes to process_move_condition though too.
2470 */
2471 condition_temp = get_temp(glsl_type::vec4_type);
2472 condition.negate = 0;
2473 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2474 condition_temp.swizzle = condition.swizzle;
2475 }
2476
2477 if (switch_order) {
2478 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2479 } else {
2480 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2481 }
2482
2483 l.index++;
2484 r.index++;
2485 }
2486 } else if (ir->rhs->as_expression() &&
2487 this->instructions.get_tail() &&
2488 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2489 type_size(ir->lhs->type) == 1 &&
2490 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2491 /* To avoid emitting an extra MOV when assigning an expression to a
2492 * variable, emit the last instruction of the expression again, but
2493 * replace the destination register with the target of the assignment.
2494 * Dead code elimination will remove the original instruction.
2495 */
2496 glsl_to_tgsi_instruction *inst, *new_inst;
2497 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2498 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2499 new_inst->saturate = inst->saturate;
2500 inst->dead_mask = inst->dst.writemask;
2501 } else {
2502 emit_block_mov(ir, ir->rhs->type, &l, &r);
2503 }
2504 }
2505
2506
2507 void
2508 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2509 {
2510 st_src_reg src;
2511 GLfloat stack_vals[4] = { 0 };
2512 gl_constant_value *values = (gl_constant_value *) stack_vals;
2513 GLenum gl_type = GL_NONE;
2514 unsigned int i;
2515 static int in_array = 0;
2516 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2517
2518 /* Unfortunately, 4 floats is all we can get into
2519 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2520 * aggregate constant and move each constant value into it. If we
2521 * get lucky, copy propagation will eliminate the extra moves.
2522 */
2523 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2524 st_src_reg temp_base = get_temp(ir->type);
2525 st_dst_reg temp = st_dst_reg(temp_base);
2526
2527 foreach_in_list(ir_constant, field_value, &ir->components) {
2528 int size = type_size(field_value->type);
2529
2530 assert(size > 0);
2531
2532 field_value->accept(this);
2533 src = this->result;
2534
2535 for (i = 0; i < (unsigned int)size; i++) {
2536 emit(ir, TGSI_OPCODE_MOV, temp, src);
2537
2538 src.index++;
2539 temp.index++;
2540 }
2541 }
2542 this->result = temp_base;
2543 return;
2544 }
2545
2546 if (ir->type->is_array()) {
2547 st_src_reg temp_base = get_temp(ir->type);
2548 st_dst_reg temp = st_dst_reg(temp_base);
2549 int size = type_size(ir->type->fields.array);
2550
2551 assert(size > 0);
2552 in_array++;
2553
2554 for (i = 0; i < ir->type->length; i++) {
2555 ir->array_elements[i]->accept(this);
2556 src = this->result;
2557 for (int j = 0; j < size; j++) {
2558 emit(ir, TGSI_OPCODE_MOV, temp, src);
2559
2560 src.index++;
2561 temp.index++;
2562 }
2563 }
2564 this->result = temp_base;
2565 in_array--;
2566 return;
2567 }
2568
2569 if (ir->type->is_matrix()) {
2570 st_src_reg mat = get_temp(ir->type);
2571 st_dst_reg mat_column = st_dst_reg(mat);
2572
2573 for (i = 0; i < ir->type->matrix_columns; i++) {
2574 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2575 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2576
2577 src = st_src_reg(file, -1, ir->type->base_type);
2578 src.index = add_constant(file,
2579 values,
2580 ir->type->vector_elements,
2581 GL_FLOAT,
2582 &src.swizzle);
2583 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2584
2585 mat_column.index++;
2586 }
2587
2588 this->result = mat;
2589 return;
2590 }
2591
2592 switch (ir->type->base_type) {
2593 case GLSL_TYPE_FLOAT:
2594 gl_type = GL_FLOAT;
2595 for (i = 0; i < ir->type->vector_elements; i++) {
2596 values[i].f = ir->value.f[i];
2597 }
2598 break;
2599 case GLSL_TYPE_UINT:
2600 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2601 for (i = 0; i < ir->type->vector_elements; i++) {
2602 if (native_integers)
2603 values[i].u = ir->value.u[i];
2604 else
2605 values[i].f = ir->value.u[i];
2606 }
2607 break;
2608 case GLSL_TYPE_INT:
2609 gl_type = native_integers ? GL_INT : GL_FLOAT;
2610 for (i = 0; i < ir->type->vector_elements; i++) {
2611 if (native_integers)
2612 values[i].i = ir->value.i[i];
2613 else
2614 values[i].f = ir->value.i[i];
2615 }
2616 break;
2617 case GLSL_TYPE_BOOL:
2618 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2619 for (i = 0; i < ir->type->vector_elements; i++) {
2620 if (native_integers)
2621 values[i].u = ir->value.b[i] ? ~0 : 0;
2622 else
2623 values[i].f = ir->value.b[i];
2624 }
2625 break;
2626 default:
2627 assert(!"Non-float/uint/int/bool constant");
2628 }
2629
2630 this->result = st_src_reg(file, -1, ir->type);
2631 this->result.index = add_constant(file,
2632 values,
2633 ir->type->vector_elements,
2634 gl_type,
2635 &this->result.swizzle);
2636 }
2637
2638 function_entry *
2639 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2640 {
2641 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2642 if (entry->sig == sig)
2643 return entry;
2644 }
2645
2646 entry = ralloc(mem_ctx, function_entry);
2647 entry->sig = sig;
2648 entry->sig_id = this->next_signature_id++;
2649 entry->bgn_inst = NULL;
2650
2651 /* Allocate storage for all the parameters. */
2652 foreach_in_list(ir_variable, param, &sig->parameters) {
2653 variable_storage *storage;
2654
2655 storage = find_variable_storage(param);
2656 assert(!storage);
2657
2658 st_src_reg src = get_temp(param->type);
2659
2660 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2661 this->variables.push_tail(storage);
2662 }
2663
2664 if (!sig->return_type->is_void()) {
2665 entry->return_reg = get_temp(sig->return_type);
2666 } else {
2667 entry->return_reg = undef_src;
2668 }
2669
2670 this->function_signatures.push_tail(entry);
2671 return entry;
2672 }
2673
2674 void
2675 glsl_to_tgsi_visitor::visit(ir_call *ir)
2676 {
2677 glsl_to_tgsi_instruction *call_inst;
2678 ir_function_signature *sig = ir->callee;
2679 function_entry *entry = get_function_signature(sig);
2680 int i;
2681
2682 /* Process in parameters. */
2683 foreach_two_lists(formal_node, &sig->parameters,
2684 actual_node, &ir->actual_parameters) {
2685 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2686 ir_variable *param = (ir_variable *) formal_node;
2687
2688 if (param->data.mode == ir_var_function_in ||
2689 param->data.mode == ir_var_function_inout) {
2690 variable_storage *storage = find_variable_storage(param);
2691 assert(storage);
2692
2693 param_rval->accept(this);
2694 st_src_reg r = this->result;
2695
2696 st_dst_reg l;
2697 l.file = storage->file;
2698 l.index = storage->index;
2699 l.reladdr = NULL;
2700 l.writemask = WRITEMASK_XYZW;
2701 l.cond_mask = COND_TR;
2702
2703 for (i = 0; i < type_size(param->type); i++) {
2704 emit(ir, TGSI_OPCODE_MOV, l, r);
2705 l.index++;
2706 r.index++;
2707 }
2708 }
2709 }
2710
2711 /* Emit call instruction */
2712 call_inst = emit(ir, TGSI_OPCODE_CAL);
2713 call_inst->function = entry;
2714
2715 /* Process out parameters. */
2716 foreach_two_lists(formal_node, &sig->parameters,
2717 actual_node, &ir->actual_parameters) {
2718 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2719 ir_variable *param = (ir_variable *) formal_node;
2720
2721 if (param->data.mode == ir_var_function_out ||
2722 param->data.mode == ir_var_function_inout) {
2723 variable_storage *storage = find_variable_storage(param);
2724 assert(storage);
2725
2726 st_src_reg r;
2727 r.file = storage->file;
2728 r.index = storage->index;
2729 r.reladdr = NULL;
2730 r.swizzle = SWIZZLE_NOOP;
2731 r.negate = 0;
2732
2733 param_rval->accept(this);
2734 st_dst_reg l = st_dst_reg(this->result);
2735
2736 for (i = 0; i < type_size(param->type); i++) {
2737 emit(ir, TGSI_OPCODE_MOV, l, r);
2738 l.index++;
2739 r.index++;
2740 }
2741 }
2742 }
2743
2744 /* Process return value. */
2745 this->result = entry->return_reg;
2746 }
2747
2748 void
2749 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2750 {
2751 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2752 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2753 st_src_reg levels_src;
2754 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2755 glsl_to_tgsi_instruction *inst = NULL;
2756 unsigned opcode = TGSI_OPCODE_NOP;
2757 const glsl_type *sampler_type = ir->sampler->type;
2758 ir_rvalue *sampler_index =
2759 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2760 bool is_cube_array = false;
2761 unsigned i;
2762
2763 /* if we are a cube array sampler */
2764 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2765 sampler_type->sampler_array)) {
2766 is_cube_array = true;
2767 }
2768
2769 if (ir->coordinate) {
2770 ir->coordinate->accept(this);
2771
2772 /* Put our coords in a temp. We'll need to modify them for shadow,
2773 * projection, or LOD, so the only case we'd use it as is is if
2774 * we're doing plain old texturing. The optimization passes on
2775 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2776 */
2777 coord = get_temp(glsl_type::vec4_type);
2778 coord_dst = st_dst_reg(coord);
2779 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2780 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2781 }
2782
2783 if (ir->projector) {
2784 ir->projector->accept(this);
2785 projector = this->result;
2786 }
2787
2788 /* Storage for our result. Ideally for an assignment we'd be using
2789 * the actual storage for the result here, instead.
2790 */
2791 result_src = get_temp(ir->type);
2792 result_dst = st_dst_reg(result_src);
2793
2794 switch (ir->op) {
2795 case ir_tex:
2796 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2797 if (ir->offset) {
2798 ir->offset->accept(this);
2799 offset[0] = this->result;
2800 }
2801 break;
2802 case ir_txb:
2803 if (is_cube_array ||
2804 sampler_type == glsl_type::samplerCubeShadow_type) {
2805 opcode = TGSI_OPCODE_TXB2;
2806 }
2807 else {
2808 opcode = TGSI_OPCODE_TXB;
2809 }
2810 ir->lod_info.bias->accept(this);
2811 lod_info = this->result;
2812 if (ir->offset) {
2813 ir->offset->accept(this);
2814 offset[0] = this->result;
2815 }
2816 break;
2817 case ir_txl:
2818 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2819 ir->lod_info.lod->accept(this);
2820 lod_info = this->result;
2821 if (ir->offset) {
2822 ir->offset->accept(this);
2823 offset[0] = this->result;
2824 }
2825 break;
2826 case ir_txd:
2827 opcode = TGSI_OPCODE_TXD;
2828 ir->lod_info.grad.dPdx->accept(this);
2829 dx = this->result;
2830 ir->lod_info.grad.dPdy->accept(this);
2831 dy = this->result;
2832 if (ir->offset) {
2833 ir->offset->accept(this);
2834 offset[0] = this->result;
2835 }
2836 break;
2837 case ir_txs:
2838 opcode = TGSI_OPCODE_TXQ;
2839 ir->lod_info.lod->accept(this);
2840 lod_info = this->result;
2841 break;
2842 case ir_query_levels:
2843 opcode = TGSI_OPCODE_TXQ;
2844 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2845 levels_src = get_temp(ir->type);
2846 break;
2847 case ir_txf:
2848 opcode = TGSI_OPCODE_TXF;
2849 ir->lod_info.lod->accept(this);
2850 lod_info = this->result;
2851 if (ir->offset) {
2852 ir->offset->accept(this);
2853 offset[0] = this->result;
2854 }
2855 break;
2856 case ir_txf_ms:
2857 opcode = TGSI_OPCODE_TXF;
2858 ir->lod_info.sample_index->accept(this);
2859 sample_index = this->result;
2860 break;
2861 case ir_tg4:
2862 opcode = TGSI_OPCODE_TG4;
2863 ir->lod_info.component->accept(this);
2864 component = this->result;
2865 if (ir->offset) {
2866 ir->offset->accept(this);
2867 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2868 const glsl_type *elt_type = ir->offset->type->fields.array;
2869 for (i = 0; i < ir->offset->type->length; i++) {
2870 offset[i] = this->result;
2871 offset[i].index += i * type_size(elt_type);
2872 offset[i].type = elt_type->base_type;
2873 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2874 }
2875 } else {
2876 offset[0] = this->result;
2877 }
2878 }
2879 break;
2880 case ir_lod:
2881 opcode = TGSI_OPCODE_LODQ;
2882 break;
2883 }
2884
2885 if (ir->projector) {
2886 if (opcode == TGSI_OPCODE_TEX) {
2887 /* Slot the projector in as the last component of the coord. */
2888 coord_dst.writemask = WRITEMASK_W;
2889 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2890 coord_dst.writemask = WRITEMASK_XYZW;
2891 opcode = TGSI_OPCODE_TXP;
2892 } else {
2893 st_src_reg coord_w = coord;
2894 coord_w.swizzle = SWIZZLE_WWWW;
2895
2896 /* For the other TEX opcodes there's no projective version
2897 * since the last slot is taken up by LOD info. Do the
2898 * projective divide now.
2899 */
2900 coord_dst.writemask = WRITEMASK_W;
2901 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2902
2903 /* In the case where we have to project the coordinates "by hand,"
2904 * the shadow comparator value must also be projected.
2905 */
2906 st_src_reg tmp_src = coord;
2907 if (ir->shadow_comparitor) {
2908 /* Slot the shadow value in as the second to last component of the
2909 * coord.
2910 */
2911 ir->shadow_comparitor->accept(this);
2912
2913 tmp_src = get_temp(glsl_type::vec4_type);
2914 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2915
2916 /* Projective division not allowed for array samplers. */
2917 assert(!sampler_type->sampler_array);
2918
2919 tmp_dst.writemask = WRITEMASK_Z;
2920 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2921
2922 tmp_dst.writemask = WRITEMASK_XY;
2923 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2924 }
2925
2926 coord_dst.writemask = WRITEMASK_XYZ;
2927 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2928
2929 coord_dst.writemask = WRITEMASK_XYZW;
2930 coord.swizzle = SWIZZLE_XYZW;
2931 }
2932 }
2933
2934 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2935 * comparator was put in the correct place (and projected) by the code,
2936 * above, that handles by-hand projection.
2937 */
2938 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2939 /* Slot the shadow value in as the second to last component of the
2940 * coord.
2941 */
2942 ir->shadow_comparitor->accept(this);
2943
2944 if (is_cube_array) {
2945 cube_sc = get_temp(glsl_type::float_type);
2946 cube_sc_dst = st_dst_reg(cube_sc);
2947 cube_sc_dst.writemask = WRITEMASK_X;
2948 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2949 cube_sc_dst.writemask = WRITEMASK_X;
2950 }
2951 else {
2952 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2953 sampler_type->sampler_array) ||
2954 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2955 coord_dst.writemask = WRITEMASK_W;
2956 } else {
2957 coord_dst.writemask = WRITEMASK_Z;
2958 }
2959
2960 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2961 coord_dst.writemask = WRITEMASK_XYZW;
2962 }
2963 }
2964
2965 if (ir->op == ir_txf_ms) {
2966 coord_dst.writemask = WRITEMASK_W;
2967 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2968 coord_dst.writemask = WRITEMASK_XYZW;
2969 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2970 opcode == TGSI_OPCODE_TXF) {
2971 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2972 coord_dst.writemask = WRITEMASK_W;
2973 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2974 coord_dst.writemask = WRITEMASK_XYZW;
2975 }
2976
2977 if (sampler_index) {
2978 sampler_index->accept(this);
2979 emit_arl(ir, sampler_reladdr, this->result);
2980 }
2981
2982 if (opcode == TGSI_OPCODE_TXD)
2983 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2984 else if (opcode == TGSI_OPCODE_TXQ) {
2985 if (ir->op == ir_query_levels) {
2986 /* the level is stored in W */
2987 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
2988 result_dst.writemask = WRITEMASK_X;
2989 levels_src.swizzle = SWIZZLE_WWWW;
2990 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
2991 } else
2992 inst = emit(ir, opcode, result_dst, lod_info);
2993 } else if (opcode == TGSI_OPCODE_TXF) {
2994 inst = emit(ir, opcode, result_dst, coord);
2995 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2996 inst = emit(ir, opcode, result_dst, coord, lod_info);
2997 } else if (opcode == TGSI_OPCODE_TEX2) {
2998 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2999 } else if (opcode == TGSI_OPCODE_TG4) {
3000 if (is_cube_array && ir->shadow_comparitor) {
3001 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3002 } else {
3003 inst = emit(ir, opcode, result_dst, coord, component);
3004 }
3005 } else
3006 inst = emit(ir, opcode, result_dst, coord);
3007
3008 if (ir->shadow_comparitor)
3009 inst->tex_shadow = GL_TRUE;
3010
3011 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3012 this->shader_program,
3013 this->prog);
3014 if (sampler_index) {
3015 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3016 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3017 inst->sampler_array_size =
3018 ir->sampler->as_dereference_array()->array->type->array_size();
3019 } else {
3020 inst->sampler_array_size = 1;
3021 }
3022
3023 if (ir->offset) {
3024 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3025 inst->tex_offsets[i] = offset[i];
3026 inst->tex_offset_num_offset = i;
3027 }
3028
3029 switch (sampler_type->sampler_dimensionality) {
3030 case GLSL_SAMPLER_DIM_1D:
3031 inst->tex_target = (sampler_type->sampler_array)
3032 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3033 break;
3034 case GLSL_SAMPLER_DIM_2D:
3035 inst->tex_target = (sampler_type->sampler_array)
3036 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3037 break;
3038 case GLSL_SAMPLER_DIM_3D:
3039 inst->tex_target = TEXTURE_3D_INDEX;
3040 break;
3041 case GLSL_SAMPLER_DIM_CUBE:
3042 inst->tex_target = (sampler_type->sampler_array)
3043 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3044 break;
3045 case GLSL_SAMPLER_DIM_RECT:
3046 inst->tex_target = TEXTURE_RECT_INDEX;
3047 break;
3048 case GLSL_SAMPLER_DIM_BUF:
3049 inst->tex_target = TEXTURE_BUFFER_INDEX;
3050 break;
3051 case GLSL_SAMPLER_DIM_EXTERNAL:
3052 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3053 break;
3054 case GLSL_SAMPLER_DIM_MS:
3055 inst->tex_target = (sampler_type->sampler_array)
3056 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3057 break;
3058 default:
3059 assert(!"Should not get here.");
3060 }
3061
3062 this->result = result_src;
3063 }
3064
3065 void
3066 glsl_to_tgsi_visitor::visit(ir_return *ir)
3067 {
3068 if (ir->get_value()) {
3069 st_dst_reg l;
3070 int i;
3071
3072 assert(current_function);
3073
3074 ir->get_value()->accept(this);
3075 st_src_reg r = this->result;
3076
3077 l = st_dst_reg(current_function->return_reg);
3078
3079 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3080 emit(ir, TGSI_OPCODE_MOV, l, r);
3081 l.index++;
3082 r.index++;
3083 }
3084 }
3085
3086 emit(ir, TGSI_OPCODE_RET);
3087 }
3088
3089 void
3090 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3091 {
3092 if (ir->condition) {
3093 ir->condition->accept(this);
3094 st_src_reg condition = this->result;
3095
3096 /* Convert the bool condition to a float so we can negate. */
3097 if (native_integers) {
3098 st_src_reg temp = get_temp(ir->condition->type);
3099 emit(ir, TGSI_OPCODE_AND, st_dst_reg(temp),
3100 condition, st_src_reg_for_float(1.0));
3101 condition = temp;
3102 }
3103
3104 condition.negate = ~condition.negate;
3105 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition);
3106 } else {
3107 /* unconditional kil */
3108 emit(ir, TGSI_OPCODE_KILL);
3109 }
3110 }
3111
3112 void
3113 glsl_to_tgsi_visitor::visit(ir_if *ir)
3114 {
3115 unsigned if_opcode;
3116 glsl_to_tgsi_instruction *if_inst;
3117
3118 ir->condition->accept(this);
3119 assert(this->result.file != PROGRAM_UNDEFINED);
3120
3121 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3122
3123 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3124
3125 this->instructions.push_tail(if_inst);
3126
3127 visit_exec_list(&ir->then_instructions, this);
3128
3129 if (!ir->else_instructions.is_empty()) {
3130 emit(ir->condition, TGSI_OPCODE_ELSE);
3131 visit_exec_list(&ir->else_instructions, this);
3132 }
3133
3134 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3135 }
3136
3137
3138 void
3139 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3140 {
3141 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3142
3143 ir->stream->accept(this);
3144 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3145 }
3146
3147 void
3148 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3149 {
3150 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3151
3152 ir->stream->accept(this);
3153 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3154 }
3155
3156 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3157 {
3158 result.file = PROGRAM_UNDEFINED;
3159 next_temp = 1;
3160 next_array = 0;
3161 next_signature_id = 1;
3162 num_immediates = 0;
3163 current_function = NULL;
3164 num_address_regs = 0;
3165 samplers_used = 0;
3166 indirect_addr_consts = false;
3167 glsl_version = 0;
3168 native_integers = false;
3169 mem_ctx = ralloc_context(NULL);
3170 ctx = NULL;
3171 prog = NULL;
3172 shader_program = NULL;
3173 shader = NULL;
3174 options = NULL;
3175 }
3176
3177 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3178 {
3179 ralloc_free(mem_ctx);
3180 }
3181
3182 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3183 {
3184 delete v;
3185 }
3186
3187
3188 /**
3189 * Count resources used by the given gpu program (number of texture
3190 * samplers, etc).
3191 */
3192 static void
3193 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3194 {
3195 v->samplers_used = 0;
3196
3197 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3198 if (is_tex_instruction(inst->op)) {
3199 for (int i = 0; i < inst->sampler_array_size; i++) {
3200 v->samplers_used |= 1 << (inst->sampler.index + i);
3201
3202 if (inst->tex_shadow) {
3203 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3204 }
3205 }
3206 }
3207 }
3208
3209 prog->SamplersUsed = v->samplers_used;
3210
3211 if (v->shader_program != NULL)
3212 _mesa_update_shader_textures_used(v->shader_program, prog);
3213 }
3214
3215 /**
3216 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3217 * are read from the given src in this instruction
3218 */
3219 static int
3220 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3221 {
3222 int read_mask = 0, comp;
3223
3224 /* Now, given the src swizzle and the written channels, find which
3225 * components are actually read
3226 */
3227 for (comp = 0; comp < 4; ++comp) {
3228 const unsigned coord = GET_SWZ(src.swizzle, comp);
3229 ASSERT(coord < 4);
3230 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3231 read_mask |= 1 << coord;
3232 }
3233
3234 return read_mask;
3235 }
3236
3237 /**
3238 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3239 * instruction is the first instruction to write to register T0. There are
3240 * several lowering passes done in GLSL IR (e.g. branches and
3241 * relative addressing) that create a large number of conditional assignments
3242 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3243 *
3244 * Here is why this conversion is safe:
3245 * CMP T0, T1 T2 T0 can be expanded to:
3246 * if (T1 < 0.0)
3247 * MOV T0, T2;
3248 * else
3249 * MOV T0, T0;
3250 *
3251 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3252 * as the original program. If (T1 < 0.0) evaluates to false, executing
3253 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3254 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3255 * because any instruction that was going to read from T0 after this was going
3256 * to read a garbage value anyway.
3257 */
3258 void
3259 glsl_to_tgsi_visitor::simplify_cmp(void)
3260 {
3261 int tempWritesSize = 0;
3262 unsigned *tempWrites = NULL;
3263 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3264
3265 memset(outputWrites, 0, sizeof(outputWrites));
3266
3267 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3268 unsigned prevWriteMask = 0;
3269
3270 /* Give up if we encounter relative addressing or flow control. */
3271 if (inst->dst.reladdr ||
3272 tgsi_get_opcode_info(inst->op)->is_branch ||
3273 inst->op == TGSI_OPCODE_BGNSUB ||
3274 inst->op == TGSI_OPCODE_CONT ||
3275 inst->op == TGSI_OPCODE_END ||
3276 inst->op == TGSI_OPCODE_ENDSUB ||
3277 inst->op == TGSI_OPCODE_RET) {
3278 break;
3279 }
3280
3281 if (inst->dst.file == PROGRAM_OUTPUT) {
3282 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3283 prevWriteMask = outputWrites[inst->dst.index];
3284 outputWrites[inst->dst.index] |= inst->dst.writemask;
3285 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3286 if (inst->dst.index >= tempWritesSize) {
3287 const int inc = 4096;
3288
3289 tempWrites = (unsigned*)
3290 realloc(tempWrites,
3291 (tempWritesSize + inc) * sizeof(unsigned));
3292 if (!tempWrites)
3293 return;
3294
3295 memset(tempWrites + tempWritesSize, 0, inc * sizeof(unsigned));
3296 tempWritesSize += inc;
3297 }
3298
3299 prevWriteMask = tempWrites[inst->dst.index];
3300 tempWrites[inst->dst.index] |= inst->dst.writemask;
3301 } else
3302 continue;
3303
3304 /* For a CMP to be considered a conditional write, the destination
3305 * register and source register two must be the same. */
3306 if (inst->op == TGSI_OPCODE_CMP
3307 && !(inst->dst.writemask & prevWriteMask)
3308 && inst->src[2].file == inst->dst.file
3309 && inst->src[2].index == inst->dst.index
3310 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3311
3312 inst->op = TGSI_OPCODE_MOV;
3313 inst->src[0] = inst->src[1];
3314 }
3315 }
3316
3317 free(tempWrites);
3318 }
3319
3320 /* Replaces all references to a temporary register index with another index. */
3321 void
3322 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3323 {
3324 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3325 unsigned j;
3326
3327 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3328 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3329 inst->src[j].index == index) {
3330 inst->src[j].index = new_index;
3331 }
3332 }
3333
3334 for (j=0; j < inst->tex_offset_num_offset; j++) {
3335 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3336 inst->tex_offsets[j].index == index) {
3337 inst->tex_offsets[j].index = new_index;
3338 }
3339 }
3340
3341 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3342 inst->dst.index = new_index;
3343 }
3344 }
3345 }
3346
3347 int
3348 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3349 {
3350 int depth = 0; /* loop depth */
3351 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3352 unsigned i = 0, j;
3353
3354 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3355 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3356 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3357 inst->src[j].index == index) {
3358 return (depth == 0) ? i : loop_start;
3359 }
3360 }
3361 for (j=0; j < inst->tex_offset_num_offset; j++) {
3362 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3363 inst->tex_offsets[j].index == index) {
3364 return (depth == 0) ? i : loop_start;
3365 }
3366 }
3367
3368 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3369 if(depth++ == 0)
3370 loop_start = i;
3371 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3372 if (--depth == 0)
3373 loop_start = -1;
3374 }
3375 assert(depth >= 0);
3376
3377 i++;
3378 }
3379
3380 return -1;
3381 }
3382
3383 int
3384 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3385 {
3386 int depth = 0; /* loop depth */
3387 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3388 int i = 0;
3389
3390 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3391 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3392 return (depth == 0) ? i : loop_start;
3393 }
3394
3395 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3396 if(depth++ == 0)
3397 loop_start = i;
3398 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3399 if (--depth == 0)
3400 loop_start = -1;
3401 }
3402 assert(depth >= 0);
3403
3404 i++;
3405 }
3406
3407 return -1;
3408 }
3409
3410 int
3411 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3412 {
3413 int depth = 0; /* loop depth */
3414 int last = -1; /* index of last instruction that reads the temporary */
3415 unsigned i = 0, j;
3416
3417 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3418 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3419 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3420 inst->src[j].index == index) {
3421 last = (depth == 0) ? i : -2;
3422 }
3423 }
3424 for (j=0; j < inst->tex_offset_num_offset; j++) {
3425 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3426 inst->tex_offsets[j].index == index)
3427 last = (depth == 0) ? i : -2;
3428 }
3429
3430 if (inst->op == TGSI_OPCODE_BGNLOOP)
3431 depth++;
3432 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3433 if (--depth == 0 && last == -2)
3434 last = i;
3435 assert(depth >= 0);
3436
3437 i++;
3438 }
3439
3440 assert(last >= -1);
3441 return last;
3442 }
3443
3444 int
3445 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3446 {
3447 int depth = 0; /* loop depth */
3448 int last = -1; /* index of last instruction that writes to the temporary */
3449 int i = 0;
3450
3451 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3452 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3453 last = (depth == 0) ? i : -2;
3454
3455 if (inst->op == TGSI_OPCODE_BGNLOOP)
3456 depth++;
3457 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3458 if (--depth == 0 && last == -2)
3459 last = i;
3460 assert(depth >= 0);
3461
3462 i++;
3463 }
3464
3465 assert(last >= -1);
3466 return last;
3467 }
3468
3469 /*
3470 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3471 * channels for copy propagation and updates following instructions to
3472 * use the original versions.
3473 *
3474 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3475 * will occur. As an example, a TXP production before this pass:
3476 *
3477 * 0: MOV TEMP[1], INPUT[4].xyyy;
3478 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3479 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3480 *
3481 * and after:
3482 *
3483 * 0: MOV TEMP[1], INPUT[4].xyyy;
3484 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3485 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3486 *
3487 * which allows for dead code elimination on TEMP[1]'s writes.
3488 */
3489 void
3490 glsl_to_tgsi_visitor::copy_propagate(void)
3491 {
3492 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3493 glsl_to_tgsi_instruction *,
3494 this->next_temp * 4);
3495 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3496 int level = 0;
3497
3498 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3499 assert(inst->dst.file != PROGRAM_TEMPORARY
3500 || inst->dst.index < this->next_temp);
3501
3502 /* First, do any copy propagation possible into the src regs. */
3503 for (int r = 0; r < 3; r++) {
3504 glsl_to_tgsi_instruction *first = NULL;
3505 bool good = true;
3506 int acp_base = inst->src[r].index * 4;
3507
3508 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3509 inst->src[r].reladdr ||
3510 inst->src[r].reladdr2)
3511 continue;
3512
3513 /* See if we can find entries in the ACP consisting of MOVs
3514 * from the same src register for all the swizzled channels
3515 * of this src register reference.
3516 */
3517 for (int i = 0; i < 4; i++) {
3518 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3519 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3520
3521 if (!copy_chan) {
3522 good = false;
3523 break;
3524 }
3525
3526 assert(acp_level[acp_base + src_chan] <= level);
3527
3528 if (!first) {
3529 first = copy_chan;
3530 } else {
3531 if (first->src[0].file != copy_chan->src[0].file ||
3532 first->src[0].index != copy_chan->src[0].index) {
3533 good = false;
3534 break;
3535 }
3536 }
3537 }
3538
3539 if (good) {
3540 /* We've now validated that we can copy-propagate to
3541 * replace this src register reference. Do it.
3542 */
3543 inst->src[r].file = first->src[0].file;
3544 inst->src[r].index = first->src[0].index;
3545 inst->src[r].index2D = first->src[0].index2D;
3546 inst->src[r].has_index2 = first->src[0].has_index2;
3547
3548 int swizzle = 0;
3549 for (int i = 0; i < 4; i++) {
3550 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3551 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3552 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3553 (3 * i));
3554 }
3555 inst->src[r].swizzle = swizzle;
3556 }
3557 }
3558
3559 switch (inst->op) {
3560 case TGSI_OPCODE_BGNLOOP:
3561 case TGSI_OPCODE_ENDLOOP:
3562 /* End of a basic block, clear the ACP entirely. */
3563 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3564 break;
3565
3566 case TGSI_OPCODE_IF:
3567 case TGSI_OPCODE_UIF:
3568 ++level;
3569 break;
3570
3571 case TGSI_OPCODE_ENDIF:
3572 case TGSI_OPCODE_ELSE:
3573 /* Clear all channels written inside the block from the ACP, but
3574 * leaving those that were not touched.
3575 */
3576 for (int r = 0; r < this->next_temp; r++) {
3577 for (int c = 0; c < 4; c++) {
3578 if (!acp[4 * r + c])
3579 continue;
3580
3581 if (acp_level[4 * r + c] >= level)
3582 acp[4 * r + c] = NULL;
3583 }
3584 }
3585 if (inst->op == TGSI_OPCODE_ENDIF)
3586 --level;
3587 break;
3588
3589 default:
3590 /* Continuing the block, clear any written channels from
3591 * the ACP.
3592 */
3593 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3594 /* Any temporary might be written, so no copy propagation
3595 * across this instruction.
3596 */
3597 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3598 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3599 inst->dst.reladdr) {
3600 /* Any output might be written, so no copy propagation
3601 * from outputs across this instruction.
3602 */
3603 for (int r = 0; r < this->next_temp; r++) {
3604 for (int c = 0; c < 4; c++) {
3605 if (!acp[4 * r + c])
3606 continue;
3607
3608 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3609 acp[4 * r + c] = NULL;
3610 }
3611 }
3612 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3613 inst->dst.file == PROGRAM_OUTPUT) {
3614 /* Clear where it's used as dst. */
3615 if (inst->dst.file == PROGRAM_TEMPORARY) {
3616 for (int c = 0; c < 4; c++) {
3617 if (inst->dst.writemask & (1 << c)) {
3618 acp[4 * inst->dst.index + c] = NULL;
3619 }
3620 }
3621 }
3622
3623 /* Clear where it's used as src. */
3624 for (int r = 0; r < this->next_temp; r++) {
3625 for (int c = 0; c < 4; c++) {
3626 if (!acp[4 * r + c])
3627 continue;
3628
3629 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3630
3631 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3632 acp[4 * r + c]->src[0].index == inst->dst.index &&
3633 inst->dst.writemask & (1 << src_chan))
3634 {
3635 acp[4 * r + c] = NULL;
3636 }
3637 }
3638 }
3639 }
3640 break;
3641 }
3642
3643 /* If this is a copy, add it to the ACP. */
3644 if (inst->op == TGSI_OPCODE_MOV &&
3645 inst->dst.file == PROGRAM_TEMPORARY &&
3646 !(inst->dst.file == inst->src[0].file &&
3647 inst->dst.index == inst->src[0].index) &&
3648 !inst->dst.reladdr &&
3649 !inst->saturate &&
3650 !inst->src[0].reladdr &&
3651 !inst->src[0].reladdr2 &&
3652 !inst->src[0].negate) {
3653 for (int i = 0; i < 4; i++) {
3654 if (inst->dst.writemask & (1 << i)) {
3655 acp[4 * inst->dst.index + i] = inst;
3656 acp_level[4 * inst->dst.index + i] = level;
3657 }
3658 }
3659 }
3660 }
3661
3662 ralloc_free(acp_level);
3663 ralloc_free(acp);
3664 }
3665
3666 /*
3667 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3668 * code elimination.
3669 *
3670 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3671 * will occur. As an example, a TXP production after copy propagation but
3672 * before this pass:
3673 *
3674 * 0: MOV TEMP[1], INPUT[4].xyyy;
3675 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3676 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3677 *
3678 * and after this pass:
3679 *
3680 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3681 */
3682 int
3683 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3684 {
3685 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3686 glsl_to_tgsi_instruction *,
3687 this->next_temp * 4);
3688 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3689 int level = 0;
3690 int removed = 0;
3691
3692 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3693 assert(inst->dst.file != PROGRAM_TEMPORARY
3694 || inst->dst.index < this->next_temp);
3695
3696 switch (inst->op) {
3697 case TGSI_OPCODE_BGNLOOP:
3698 case TGSI_OPCODE_ENDLOOP:
3699 case TGSI_OPCODE_CONT:
3700 case TGSI_OPCODE_BRK:
3701 /* End of a basic block, clear the write array entirely.
3702 *
3703 * This keeps us from killing dead code when the writes are
3704 * on either side of a loop, even when the register isn't touched
3705 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3706 * dead code of this type, so it shouldn't make a difference as long as
3707 * the dead code elimination pass in the GLSL compiler does its job.
3708 */
3709 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3710 break;
3711
3712 case TGSI_OPCODE_ENDIF:
3713 case TGSI_OPCODE_ELSE:
3714 /* Promote the recorded level of all channels written inside the
3715 * preceding if or else block to the level above the if/else block.
3716 */
3717 for (int r = 0; r < this->next_temp; r++) {
3718 for (int c = 0; c < 4; c++) {
3719 if (!writes[4 * r + c])
3720 continue;
3721
3722 if (write_level[4 * r + c] == level)
3723 write_level[4 * r + c] = level-1;
3724 }
3725 }
3726
3727 if(inst->op == TGSI_OPCODE_ENDIF)
3728 --level;
3729
3730 break;
3731
3732 case TGSI_OPCODE_IF:
3733 case TGSI_OPCODE_UIF:
3734 ++level;
3735 /* fallthrough to default case to mark the condition as read */
3736
3737 default:
3738 /* Continuing the block, clear any channels from the write array that
3739 * are read by this instruction.
3740 */
3741 for (unsigned i = 0; i < Elements(inst->src); i++) {
3742 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3743 /* Any temporary might be read, so no dead code elimination
3744 * across this instruction.
3745 */
3746 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3747 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3748 /* Clear where it's used as src. */
3749 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3750 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3751 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3752 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3753
3754 for (int c = 0; c < 4; c++) {
3755 if (src_chans & (1 << c)) {
3756 writes[4 * inst->src[i].index + c] = NULL;
3757 }
3758 }
3759 }
3760 }
3761 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3762 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3763 /* Any temporary might be read, so no dead code elimination
3764 * across this instruction.
3765 */
3766 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3767 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3768 /* Clear where it's used as src. */
3769 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3770 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3771 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3772 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3773
3774 for (int c = 0; c < 4; c++) {
3775 if (src_chans & (1 << c)) {
3776 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3777 }
3778 }
3779 }
3780 }
3781 break;
3782 }
3783
3784 /* If this instruction writes to a temporary, add it to the write array.
3785 * If there is already an instruction in the write array for one or more
3786 * of the channels, flag that channel write as dead.
3787 */
3788 if (inst->dst.file == PROGRAM_TEMPORARY &&
3789 !inst->dst.reladdr &&
3790 !inst->saturate) {
3791 for (int c = 0; c < 4; c++) {
3792 if (inst->dst.writemask & (1 << c)) {
3793 if (writes[4 * inst->dst.index + c]) {
3794 if (write_level[4 * inst->dst.index + c] < level)
3795 continue;
3796 else
3797 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3798 }
3799 writes[4 * inst->dst.index + c] = inst;
3800 write_level[4 * inst->dst.index + c] = level;
3801 }
3802 }
3803 }
3804 }
3805
3806 /* Anything still in the write array at this point is dead code. */
3807 for (int r = 0; r < this->next_temp; r++) {
3808 for (int c = 0; c < 4; c++) {
3809 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3810 if (inst)
3811 inst->dead_mask |= (1 << c);
3812 }
3813 }
3814
3815 /* Now actually remove the instructions that are completely dead and update
3816 * the writemask of other instructions with dead channels.
3817 */
3818 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3819 if (!inst->dead_mask || !inst->dst.writemask)
3820 continue;
3821 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3822 inst->remove();
3823 delete inst;
3824 removed++;
3825 } else
3826 inst->dst.writemask &= ~(inst->dead_mask);
3827 }
3828
3829 ralloc_free(write_level);
3830 ralloc_free(writes);
3831
3832 return removed;
3833 }
3834
3835 /* Merges temporary registers together where possible to reduce the number of
3836 * registers needed to run a program.
3837 *
3838 * Produces optimal code only after copy propagation and dead code elimination
3839 * have been run. */
3840 void
3841 glsl_to_tgsi_visitor::merge_registers(void)
3842 {
3843 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3844 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3845 int i, j;
3846
3847 /* Read the indices of the last read and first write to each temp register
3848 * into an array so that we don't have to traverse the instruction list as
3849 * much. */
3850 for (i=0; i < this->next_temp; i++) {
3851 last_reads[i] = get_last_temp_read(i);
3852 first_writes[i] = get_first_temp_write(i);
3853 }
3854
3855 /* Start looking for registers with non-overlapping usages that can be
3856 * merged together. */
3857 for (i=0; i < this->next_temp; i++) {
3858 /* Don't touch unused registers. */
3859 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3860
3861 for (j=0; j < this->next_temp; j++) {
3862 /* Don't touch unused registers. */
3863 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3864
3865 /* We can merge the two registers if the first write to j is after or
3866 * in the same instruction as the last read from i. Note that the
3867 * register at index i will always be used earlier or at the same time
3868 * as the register at index j. */
3869 if (first_writes[i] <= first_writes[j] &&
3870 last_reads[i] <= first_writes[j])
3871 {
3872 rename_temp_register(j, i); /* Replace all references to j with i.*/
3873
3874 /* Update the first_writes and last_reads arrays with the new
3875 * values for the merged register index, and mark the newly unused
3876 * register index as such. */
3877 last_reads[i] = last_reads[j];
3878 first_writes[j] = -1;
3879 last_reads[j] = -1;
3880 }
3881 }
3882 }
3883
3884 ralloc_free(last_reads);
3885 ralloc_free(first_writes);
3886 }
3887
3888 /* Reassign indices to temporary registers by reusing unused indices created
3889 * by optimization passes. */
3890 void
3891 glsl_to_tgsi_visitor::renumber_registers(void)
3892 {
3893 int i = 0;
3894 int new_index = 0;
3895
3896 for (i=0; i < this->next_temp; i++) {
3897 if (get_first_temp_read(i) < 0) continue;
3898 if (i != new_index)
3899 rename_temp_register(i, new_index);
3900 new_index++;
3901 }
3902
3903 this->next_temp = new_index;
3904 }
3905
3906 /**
3907 * Returns a fragment program which implements the current pixel transfer ops.
3908 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3909 */
3910 extern "C" void
3911 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3912 glsl_to_tgsi_visitor *original,
3913 int scale_and_bias, int pixel_maps)
3914 {
3915 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3916 struct st_context *st = st_context(original->ctx);
3917 struct gl_program *prog = &fp->Base.Base;
3918 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3919 st_src_reg coord, src0;
3920 st_dst_reg dst0;
3921 glsl_to_tgsi_instruction *inst;
3922
3923 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3924 v->ctx = original->ctx;
3925 v->prog = prog;
3926 v->shader_program = NULL;
3927 v->shader = NULL;
3928 v->glsl_version = original->glsl_version;
3929 v->native_integers = original->native_integers;
3930 v->options = original->options;
3931 v->next_temp = original->next_temp;
3932 v->num_address_regs = original->num_address_regs;
3933 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3934 v->indirect_addr_consts = original->indirect_addr_consts;
3935 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3936 v->num_immediates = original->num_immediates;
3937
3938 /*
3939 * Get initial pixel color from the texture.
3940 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3941 */
3942 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3943 src0 = v->get_temp(glsl_type::vec4_type);
3944 dst0 = st_dst_reg(src0);
3945 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3946 inst->sampler_array_size = 1;
3947 inst->tex_target = TEXTURE_2D_INDEX;
3948
3949 prog->InputsRead |= VARYING_BIT_TEX0;
3950 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3951 v->samplers_used |= (1 << 0);
3952
3953 if (scale_and_bias) {
3954 static const gl_state_index scale_state[STATE_LENGTH] =
3955 { STATE_INTERNAL, STATE_PT_SCALE,
3956 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3957 static const gl_state_index bias_state[STATE_LENGTH] =
3958 { STATE_INTERNAL, STATE_PT_BIAS,
3959 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3960 GLint scale_p, bias_p;
3961 st_src_reg scale, bias;
3962
3963 scale_p = _mesa_add_state_reference(params, scale_state);
3964 bias_p = _mesa_add_state_reference(params, bias_state);
3965
3966 /* MAD colorTemp, colorTemp, scale, bias; */
3967 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3968 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3969 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3970 }
3971
3972 if (pixel_maps) {
3973 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3974 st_dst_reg temp_dst = st_dst_reg(temp);
3975
3976 assert(st->pixel_xfer.pixelmap_texture);
3977
3978 /* With a little effort, we can do four pixel map look-ups with
3979 * two TEX instructions:
3980 */
3981
3982 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3983 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3984 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3985 inst->sampler.index = 1;
3986 inst->sampler_array_size = 1;
3987 inst->tex_target = TEXTURE_2D_INDEX;
3988
3989 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3990 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3991 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3992 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3993 inst->sampler.index = 1;
3994 inst->sampler_array_size = 1;
3995 inst->tex_target = TEXTURE_2D_INDEX;
3996
3997 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3998 v->samplers_used |= (1 << 1);
3999
4000 /* MOV colorTemp, temp; */
4001 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4002 }
4003
4004 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4005 * new visitor. */
4006 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4007 glsl_to_tgsi_instruction *newinst;
4008 st_src_reg src_regs[3];
4009
4010 if (inst->dst.file == PROGRAM_OUTPUT)
4011 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4012
4013 for (int i=0; i<3; i++) {
4014 src_regs[i] = inst->src[i];
4015 if (src_regs[i].file == PROGRAM_INPUT &&
4016 src_regs[i].index == VARYING_SLOT_COL0)
4017 {
4018 src_regs[i].file = PROGRAM_TEMPORARY;
4019 src_regs[i].index = src0.index;
4020 }
4021 else if (src_regs[i].file == PROGRAM_INPUT)
4022 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4023 }
4024
4025 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4026 newinst->tex_target = inst->tex_target;
4027 }
4028
4029 /* Make modifications to fragment program info. */
4030 prog->Parameters = _mesa_combine_parameter_lists(params,
4031 original->prog->Parameters);
4032 _mesa_free_parameter_list(params);
4033 count_resources(v, prog);
4034 fp->glsl_to_tgsi = v;
4035 }
4036
4037 /**
4038 * Make fragment program for glBitmap:
4039 * Sample the texture and kill the fragment if the bit is 0.
4040 * This program will be combined with the user's fragment program.
4041 *
4042 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4043 */
4044 extern "C" void
4045 get_bitmap_visitor(struct st_fragment_program *fp,
4046 glsl_to_tgsi_visitor *original, int samplerIndex)
4047 {
4048 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4049 struct st_context *st = st_context(original->ctx);
4050 struct gl_program *prog = &fp->Base.Base;
4051 st_src_reg coord, src0;
4052 st_dst_reg dst0;
4053 glsl_to_tgsi_instruction *inst;
4054
4055 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4056 v->ctx = original->ctx;
4057 v->prog = prog;
4058 v->shader_program = NULL;
4059 v->shader = NULL;
4060 v->glsl_version = original->glsl_version;
4061 v->native_integers = original->native_integers;
4062 v->options = original->options;
4063 v->next_temp = original->next_temp;
4064 v->num_address_regs = original->num_address_regs;
4065 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4066 v->indirect_addr_consts = original->indirect_addr_consts;
4067 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4068 v->num_immediates = original->num_immediates;
4069
4070 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4071 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4072 src0 = v->get_temp(glsl_type::vec4_type);
4073 dst0 = st_dst_reg(src0);
4074 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4075 inst->sampler.index = samplerIndex;
4076 inst->sampler_array_size = 1;
4077 inst->tex_target = TEXTURE_2D_INDEX;
4078
4079 prog->InputsRead |= VARYING_BIT_TEX0;
4080 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4081 v->samplers_used |= (1 << samplerIndex);
4082
4083 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4084 src0.negate = NEGATE_XYZW;
4085 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4086 src0.swizzle = SWIZZLE_XXXX;
4087 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4088
4089 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4090 * new visitor. */
4091 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4092 glsl_to_tgsi_instruction *newinst;
4093 st_src_reg src_regs[3];
4094
4095 if (inst->dst.file == PROGRAM_OUTPUT)
4096 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4097
4098 for (int i=0; i<3; i++) {
4099 src_regs[i] = inst->src[i];
4100 if (src_regs[i].file == PROGRAM_INPUT)
4101 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4102 }
4103
4104 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4105 newinst->tex_target = inst->tex_target;
4106 }
4107
4108 /* Make modifications to fragment program info. */
4109 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4110 count_resources(v, prog);
4111 fp->glsl_to_tgsi = v;
4112 }
4113
4114 /* ------------------------- TGSI conversion stuff -------------------------- */
4115 struct label {
4116 unsigned branch_target;
4117 unsigned token;
4118 };
4119
4120 /**
4121 * Intermediate state used during shader translation.
4122 */
4123 struct st_translate {
4124 struct ureg_program *ureg;
4125
4126 unsigned temps_size;
4127 struct ureg_dst *temps;
4128
4129 struct ureg_dst arrays[MAX_ARRAYS];
4130 struct ureg_src *constants;
4131 struct ureg_src *immediates;
4132 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4133 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4134 struct ureg_dst address[3];
4135 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4136 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4137 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4138 unsigned array_sizes[MAX_ARRAYS];
4139
4140 const GLuint *inputMapping;
4141 const GLuint *outputMapping;
4142
4143 /* For every instruction that contains a label (eg CALL), keep
4144 * details so that we can go back afterwards and emit the correct
4145 * tgsi instruction number for each label.
4146 */
4147 struct label *labels;
4148 unsigned labels_size;
4149 unsigned labels_count;
4150
4151 /* Keep a record of the tgsi instruction number that each mesa
4152 * instruction starts at, will be used to fix up labels after
4153 * translation.
4154 */
4155 unsigned *insn;
4156 unsigned insn_size;
4157 unsigned insn_count;
4158
4159 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4160
4161 boolean error;
4162 };
4163
4164 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4165 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4166 /* Vertex shader
4167 */
4168 TGSI_SEMANTIC_VERTEXID,
4169 TGSI_SEMANTIC_INSTANCEID,
4170 0,
4171 0,
4172
4173 /* Geometry shader
4174 */
4175 TGSI_SEMANTIC_INVOCATIONID,
4176
4177 /* Fragment shader
4178 */
4179 TGSI_SEMANTIC_FACE,
4180 TGSI_SEMANTIC_SAMPLEID,
4181 TGSI_SEMANTIC_SAMPLEPOS,
4182 TGSI_SEMANTIC_SAMPLEMASK,
4183 };
4184
4185 /**
4186 * Make note of a branch to a label in the TGSI code.
4187 * After we've emitted all instructions, we'll go over the list
4188 * of labels built here and patch the TGSI code with the actual
4189 * location of each label.
4190 */
4191 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4192 {
4193 unsigned i;
4194
4195 if (t->labels_count + 1 >= t->labels_size) {
4196 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4197 t->labels = (struct label *)realloc(t->labels,
4198 t->labels_size * sizeof(struct label));
4199 if (t->labels == NULL) {
4200 static unsigned dummy;
4201 t->error = TRUE;
4202 return &dummy;
4203 }
4204 }
4205
4206 i = t->labels_count++;
4207 t->labels[i].branch_target = branch_target;
4208 return &t->labels[i].token;
4209 }
4210
4211 /**
4212 * Called prior to emitting the TGSI code for each instruction.
4213 * Allocate additional space for instructions if needed.
4214 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4215 * the next TGSI instruction.
4216 */
4217 static void set_insn_start(struct st_translate *t, unsigned start)
4218 {
4219 if (t->insn_count + 1 >= t->insn_size) {
4220 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4221 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4222 if (t->insn == NULL) {
4223 t->error = TRUE;
4224 return;
4225 }
4226 }
4227
4228 t->insn[t->insn_count++] = start;
4229 }
4230
4231 /**
4232 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4233 */
4234 static struct ureg_src
4235 emit_immediate(struct st_translate *t,
4236 gl_constant_value values[4],
4237 int type, int size)
4238 {
4239 struct ureg_program *ureg = t->ureg;
4240
4241 switch(type)
4242 {
4243 case GL_FLOAT:
4244 return ureg_DECL_immediate(ureg, &values[0].f, size);
4245 case GL_INT:
4246 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4247 case GL_UNSIGNED_INT:
4248 case GL_BOOL:
4249 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4250 default:
4251 assert(!"should not get here - type must be float, int, uint, or bool");
4252 return ureg_src_undef();
4253 }
4254 }
4255
4256 /**
4257 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4258 */
4259 static struct ureg_dst
4260 dst_register(struct st_translate *t,
4261 gl_register_file file,
4262 GLuint index)
4263 {
4264 unsigned array;
4265
4266 switch(file) {
4267 case PROGRAM_UNDEFINED:
4268 return ureg_dst_undef();
4269
4270 case PROGRAM_TEMPORARY:
4271 /* Allocate space for temporaries on demand. */
4272 if (index >= t->temps_size) {
4273 const int inc = 4096;
4274
4275 t->temps = (struct ureg_dst*)
4276 realloc(t->temps,
4277 (t->temps_size + inc) * sizeof(struct ureg_dst));
4278 if (!t->temps)
4279 return ureg_dst_undef();
4280
4281 memset(t->temps + t->temps_size, 0, inc * sizeof(struct ureg_dst));
4282 t->temps_size += inc;
4283 }
4284
4285 if (ureg_dst_is_undef(t->temps[index]))
4286 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4287
4288 return t->temps[index];
4289
4290 case PROGRAM_ARRAY:
4291 array = index >> 16;
4292
4293 assert(array < Elements(t->arrays));
4294
4295 if (ureg_dst_is_undef(t->arrays[array]))
4296 t->arrays[array] = ureg_DECL_array_temporary(
4297 t->ureg, t->array_sizes[array], TRUE);
4298
4299 return ureg_dst_array_offset(t->arrays[array],
4300 (int)(index & 0xFFFF) - 0x8000);
4301
4302 case PROGRAM_OUTPUT:
4303 if (t->procType == TGSI_PROCESSOR_VERTEX)
4304 assert(index < VARYING_SLOT_MAX);
4305 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4306 assert(index < FRAG_RESULT_MAX);
4307 else
4308 assert(index < VARYING_SLOT_MAX);
4309
4310 assert(t->outputMapping[index] < Elements(t->outputs));
4311
4312 return t->outputs[t->outputMapping[index]];
4313
4314 case PROGRAM_ADDRESS:
4315 return t->address[index];
4316
4317 default:
4318 assert(!"unknown dst register file");
4319 return ureg_dst_undef();
4320 }
4321 }
4322
4323 /**
4324 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4325 */
4326 static struct ureg_src
4327 src_register(struct st_translate *t, const struct st_src_reg *reg)
4328 {
4329 switch(reg->file) {
4330 case PROGRAM_UNDEFINED:
4331 return ureg_src_undef();
4332
4333 case PROGRAM_TEMPORARY:
4334 case PROGRAM_ARRAY:
4335 return ureg_src(dst_register(t, reg->file, reg->index));
4336
4337 case PROGRAM_UNIFORM:
4338 assert(reg->index >= 0);
4339 return t->constants[reg->index];
4340 case PROGRAM_STATE_VAR:
4341 case PROGRAM_CONSTANT: /* ie, immediate */
4342 if (reg->has_index2)
4343 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4344 else if (reg->index < 0)
4345 return ureg_DECL_constant(t->ureg, 0);
4346 else
4347 return t->constants[reg->index];
4348
4349 case PROGRAM_IMMEDIATE:
4350 return t->immediates[reg->index];
4351
4352 case PROGRAM_INPUT:
4353 assert(t->inputMapping[reg->index] < Elements(t->inputs));
4354 return t->inputs[t->inputMapping[reg->index]];
4355
4356 case PROGRAM_OUTPUT:
4357 assert(t->outputMapping[reg->index] < Elements(t->outputs));
4358 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4359
4360 case PROGRAM_ADDRESS:
4361 return ureg_src(t->address[reg->index]);
4362
4363 case PROGRAM_SYSTEM_VALUE:
4364 assert(reg->index < (int) Elements(t->systemValues));
4365 return t->systemValues[reg->index];
4366
4367 default:
4368 assert(!"unknown src register file");
4369 return ureg_src_undef();
4370 }
4371 }
4372
4373 /**
4374 * Create a TGSI ureg_dst register from an st_dst_reg.
4375 */
4376 static struct ureg_dst
4377 translate_dst(struct st_translate *t,
4378 const st_dst_reg *dst_reg,
4379 bool saturate, bool clamp_color)
4380 {
4381 struct ureg_dst dst = dst_register(t,
4382 dst_reg->file,
4383 dst_reg->index);
4384
4385 dst = ureg_writemask(dst, dst_reg->writemask);
4386
4387 if (saturate)
4388 dst = ureg_saturate(dst);
4389 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4390 /* Clamp colors for ARB_color_buffer_float. */
4391 switch (t->procType) {
4392 case TGSI_PROCESSOR_VERTEX:
4393 /* XXX if the geometry shader is present, this must be done there
4394 * instead of here. */
4395 if (dst_reg->index == VARYING_SLOT_COL0 ||
4396 dst_reg->index == VARYING_SLOT_COL1 ||
4397 dst_reg->index == VARYING_SLOT_BFC0 ||
4398 dst_reg->index == VARYING_SLOT_BFC1) {
4399 dst = ureg_saturate(dst);
4400 }
4401 break;
4402
4403 case TGSI_PROCESSOR_FRAGMENT:
4404 if (dst_reg->index == FRAG_RESULT_COLOR ||
4405 dst_reg->index >= FRAG_RESULT_DATA0) {
4406 dst = ureg_saturate(dst);
4407 }
4408 break;
4409 }
4410 }
4411
4412 if (dst_reg->reladdr != NULL) {
4413 assert(dst_reg->file != PROGRAM_TEMPORARY);
4414 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4415 }
4416
4417 return dst;
4418 }
4419
4420 /**
4421 * Create a TGSI ureg_src register from an st_src_reg.
4422 */
4423 static struct ureg_src
4424 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4425 {
4426 struct ureg_src src = src_register(t, src_reg);
4427
4428 if (src_reg->has_index2) {
4429 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4430 * and UBO constant buffers (buffer, position).
4431 */
4432 if (src_reg->reladdr2)
4433 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4434 src_reg->index2D);
4435 else
4436 src = ureg_src_dimension(src, src_reg->index2D);
4437 }
4438
4439 src = ureg_swizzle(src,
4440 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4441 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4442 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4443 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4444
4445 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4446 src = ureg_negate(src);
4447
4448 if (src_reg->reladdr != NULL) {
4449 assert(src_reg->file != PROGRAM_TEMPORARY);
4450 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4451 }
4452
4453 return src;
4454 }
4455
4456 static struct tgsi_texture_offset
4457 translate_tex_offset(struct st_translate *t,
4458 const st_src_reg *in_offset, int idx)
4459 {
4460 struct tgsi_texture_offset offset;
4461 struct ureg_src imm_src;
4462 struct ureg_dst dst;
4463 int array;
4464
4465 switch (in_offset->file) {
4466 case PROGRAM_IMMEDIATE:
4467 imm_src = t->immediates[in_offset->index];
4468
4469 offset.File = imm_src.File;
4470 offset.Index = imm_src.Index;
4471 offset.SwizzleX = imm_src.SwizzleX;
4472 offset.SwizzleY = imm_src.SwizzleY;
4473 offset.SwizzleZ = imm_src.SwizzleZ;
4474 offset.Padding = 0;
4475 break;
4476 case PROGRAM_TEMPORARY:
4477 imm_src = ureg_src(t->temps[in_offset->index]);
4478 offset.File = imm_src.File;
4479 offset.Index = imm_src.Index;
4480 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4481 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4482 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4483 offset.Padding = 0;
4484 break;
4485 case PROGRAM_ARRAY:
4486 array = in_offset->index >> 16;
4487
4488 assert(array >= 0);
4489 assert(array < (int) Elements(t->arrays));
4490
4491 dst = t->arrays[array];
4492 offset.File = dst.File;
4493 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4494 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4495 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4496 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4497 offset.Padding = 0;
4498 break;
4499 default:
4500 break;
4501 }
4502 return offset;
4503 }
4504
4505 static void
4506 compile_tgsi_instruction(struct st_translate *t,
4507 const glsl_to_tgsi_instruction *inst,
4508 bool clamp_dst_color_output)
4509 {
4510 struct ureg_program *ureg = t->ureg;
4511 GLuint i;
4512 struct ureg_dst dst[1];
4513 struct ureg_src src[4];
4514 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4515
4516 unsigned num_dst;
4517 unsigned num_src;
4518 unsigned tex_target;
4519
4520 num_dst = num_inst_dst_regs(inst->op);
4521 num_src = num_inst_src_regs(inst->op);
4522
4523 if (num_dst)
4524 dst[0] = translate_dst(t,
4525 &inst->dst,
4526 inst->saturate,
4527 clamp_dst_color_output);
4528
4529 for (i = 0; i < num_src; i++)
4530 src[i] = translate_src(t, &inst->src[i]);
4531
4532 switch(inst->op) {
4533 case TGSI_OPCODE_BGNLOOP:
4534 case TGSI_OPCODE_CAL:
4535 case TGSI_OPCODE_ELSE:
4536 case TGSI_OPCODE_ENDLOOP:
4537 case TGSI_OPCODE_IF:
4538 case TGSI_OPCODE_UIF:
4539 assert(num_dst == 0);
4540 ureg_label_insn(ureg,
4541 inst->op,
4542 src, num_src,
4543 get_label(t,
4544 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4545 return;
4546
4547 case TGSI_OPCODE_TEX:
4548 case TGSI_OPCODE_TXB:
4549 case TGSI_OPCODE_TXD:
4550 case TGSI_OPCODE_TXL:
4551 case TGSI_OPCODE_TXP:
4552 case TGSI_OPCODE_TXQ:
4553 case TGSI_OPCODE_TXF:
4554 case TGSI_OPCODE_TEX2:
4555 case TGSI_OPCODE_TXB2:
4556 case TGSI_OPCODE_TXL2:
4557 case TGSI_OPCODE_TG4:
4558 case TGSI_OPCODE_LODQ:
4559 src[num_src] = t->samplers[inst->sampler.index];
4560 if (inst->sampler.reladdr)
4561 src[num_src] =
4562 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4563 num_src++;
4564 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4565 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4566 }
4567 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4568
4569 ureg_tex_insn(ureg,
4570 inst->op,
4571 dst, num_dst,
4572 tex_target,
4573 texoffsets, inst->tex_offset_num_offset,
4574 src, num_src);
4575 return;
4576
4577 case TGSI_OPCODE_SCS:
4578 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4579 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4580 break;
4581
4582 default:
4583 ureg_insn(ureg,
4584 inst->op,
4585 dst, num_dst,
4586 src, num_src);
4587 break;
4588 }
4589 }
4590
4591 /**
4592 * Emit the TGSI instructions for inverting and adjusting WPOS.
4593 * This code is unavoidable because it also depends on whether
4594 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4595 */
4596 static void
4597 emit_wpos_adjustment( struct st_translate *t,
4598 const struct gl_program *program,
4599 boolean invert,
4600 GLfloat adjX, GLfloat adjY[2])
4601 {
4602 struct ureg_program *ureg = t->ureg;
4603
4604 /* Fragment program uses fragment position input.
4605 * Need to replace instances of INPUT[WPOS] with temp T
4606 * where T = INPUT[WPOS] by y is inverted.
4607 */
4608 static const gl_state_index wposTransformState[STATE_LENGTH]
4609 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4610 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4611
4612 /* XXX: note we are modifying the incoming shader here! Need to
4613 * do this before emitting the constant decls below, or this
4614 * will be missed:
4615 */
4616 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4617 wposTransformState);
4618
4619 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4620 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4621 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4622
4623 /* First, apply the coordinate shift: */
4624 if (adjX || adjY[0] || adjY[1]) {
4625 if (adjY[0] != adjY[1]) {
4626 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4627 * depending on whether inversion is actually going to be applied
4628 * or not, which is determined by testing against the inversion
4629 * state variable used below, which will be either +1 or -1.
4630 */
4631 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4632
4633 ureg_CMP(ureg, adj_temp,
4634 ureg_scalar(wpostrans, invert ? 2 : 0),
4635 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4636 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4637 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4638 } else {
4639 ureg_ADD(ureg, wpos_temp, wpos_input,
4640 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4641 }
4642 wpos_input = ureg_src(wpos_temp);
4643 } else {
4644 /* MOV wpos_temp, input[wpos]
4645 */
4646 ureg_MOV( ureg, wpos_temp, wpos_input );
4647 }
4648
4649 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4650 * inversion/identity, or the other way around if we're drawing to an FBO.
4651 */
4652 if (invert) {
4653 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4654 */
4655 ureg_MAD( ureg,
4656 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4657 wpos_input,
4658 ureg_scalar(wpostrans, 0),
4659 ureg_scalar(wpostrans, 1));
4660 } else {
4661 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4662 */
4663 ureg_MAD( ureg,
4664 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4665 wpos_input,
4666 ureg_scalar(wpostrans, 2),
4667 ureg_scalar(wpostrans, 3));
4668 }
4669
4670 /* Use wpos_temp as position input from here on:
4671 */
4672 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4673 }
4674
4675
4676 /**
4677 * Emit fragment position/ooordinate code.
4678 */
4679 static void
4680 emit_wpos(struct st_context *st,
4681 struct st_translate *t,
4682 const struct gl_program *program,
4683 struct ureg_program *ureg)
4684 {
4685 const struct gl_fragment_program *fp =
4686 (const struct gl_fragment_program *) program;
4687 struct pipe_screen *pscreen = st->pipe->screen;
4688 GLfloat adjX = 0.0f;
4689 GLfloat adjY[2] = { 0.0f, 0.0f };
4690 boolean invert = FALSE;
4691
4692 /* Query the pixel center conventions supported by the pipe driver and set
4693 * adjX, adjY to help out if it cannot handle the requested one internally.
4694 *
4695 * The bias of the y-coordinate depends on whether y-inversion takes place
4696 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4697 * drawing to an FBO (causes additional inversion), and whether the the pipe
4698 * driver origin and the requested origin differ (the latter condition is
4699 * stored in the 'invert' variable).
4700 *
4701 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4702 *
4703 * center shift only:
4704 * i -> h: +0.5
4705 * h -> i: -0.5
4706 *
4707 * inversion only:
4708 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4709 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4710 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4711 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4712 *
4713 * inversion and center shift:
4714 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4715 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4716 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4717 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4718 */
4719 if (fp->OriginUpperLeft) {
4720 /* Fragment shader wants origin in upper-left */
4721 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4722 /* the driver supports upper-left origin */
4723 }
4724 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4725 /* the driver supports lower-left origin, need to invert Y */
4726 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4727 invert = TRUE;
4728 }
4729 else
4730 assert(0);
4731 }
4732 else {
4733 /* Fragment shader wants origin in lower-left */
4734 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4735 /* the driver supports lower-left origin */
4736 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4737 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4738 /* the driver supports upper-left origin, need to invert Y */
4739 invert = TRUE;
4740 else
4741 assert(0);
4742 }
4743
4744 if (fp->PixelCenterInteger) {
4745 /* Fragment shader wants pixel center integer */
4746 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4747 /* the driver supports pixel center integer */
4748 adjY[1] = 1.0f;
4749 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4750 }
4751 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4752 /* the driver supports pixel center half integer, need to bias X,Y */
4753 adjX = -0.5f;
4754 adjY[0] = -0.5f;
4755 adjY[1] = 0.5f;
4756 }
4757 else
4758 assert(0);
4759 }
4760 else {
4761 /* Fragment shader wants pixel center half integer */
4762 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4763 /* the driver supports pixel center half integer */
4764 }
4765 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4766 /* the driver supports pixel center integer, need to bias X,Y */
4767 adjX = adjY[0] = adjY[1] = 0.5f;
4768 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4769 }
4770 else
4771 assert(0);
4772 }
4773
4774 /* we invert after adjustment so that we avoid the MOV to temporary,
4775 * and reuse the adjustment ADD instead */
4776 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4777 }
4778
4779 /**
4780 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4781 * TGSI uses +1 for front, -1 for back.
4782 * This function converts the TGSI value to the GL value. Simply clamping/
4783 * saturating the value to [0,1] does the job.
4784 */
4785 static void
4786 emit_face_var(struct st_translate *t)
4787 {
4788 struct ureg_program *ureg = t->ureg;
4789 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4790 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4791
4792 /* MOV_SAT face_temp, input[face] */
4793 face_temp = ureg_saturate(face_temp);
4794 ureg_MOV(ureg, face_temp, face_input);
4795
4796 /* Use face_temp as face input from here on: */
4797 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4798 }
4799
4800 static void
4801 emit_edgeflags(struct st_translate *t)
4802 {
4803 struct ureg_program *ureg = t->ureg;
4804 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4805 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4806
4807 ureg_MOV(ureg, edge_dst, edge_src);
4808 }
4809
4810 /**
4811 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4812 * \param program the program to translate
4813 * \param numInputs number of input registers used
4814 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4815 * input indexes
4816 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4817 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4818 * each input
4819 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4820 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4821 * \param numOutputs number of output registers used
4822 * \param outputMapping maps Mesa fragment program outputs to TGSI
4823 * generic outputs
4824 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4825 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4826 * each output
4827 *
4828 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4829 */
4830 extern "C" enum pipe_error
4831 st_translate_program(
4832 struct gl_context *ctx,
4833 uint procType,
4834 struct ureg_program *ureg,
4835 glsl_to_tgsi_visitor *program,
4836 const struct gl_program *proginfo,
4837 GLuint numInputs,
4838 const GLuint inputMapping[],
4839 const ubyte inputSemanticName[],
4840 const ubyte inputSemanticIndex[],
4841 const GLuint interpMode[],
4842 const GLuint interpLocation[],
4843 GLuint numOutputs,
4844 const GLuint outputMapping[],
4845 const ubyte outputSemanticName[],
4846 const ubyte outputSemanticIndex[],
4847 boolean passthrough_edgeflags,
4848 boolean clamp_color)
4849 {
4850 struct st_translate *t;
4851 unsigned i;
4852 enum pipe_error ret = PIPE_OK;
4853
4854 assert(numInputs <= Elements(t->inputs));
4855 assert(numOutputs <= Elements(t->outputs));
4856
4857 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
4858 TGSI_SEMANTIC_FACE);
4859 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
4860 TGSI_SEMANTIC_VERTEXID);
4861 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
4862 TGSI_SEMANTIC_INSTANCEID);
4863 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
4864 TGSI_SEMANTIC_SAMPLEID);
4865 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
4866 TGSI_SEMANTIC_SAMPLEPOS);
4867 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
4868 TGSI_SEMANTIC_SAMPLEMASK);
4869 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
4870 TGSI_SEMANTIC_INVOCATIONID);
4871
4872 t = CALLOC_STRUCT(st_translate);
4873 if (!t) {
4874 ret = PIPE_ERROR_OUT_OF_MEMORY;
4875 goto out;
4876 }
4877
4878 memset(t, 0, sizeof *t);
4879
4880 t->procType = procType;
4881 t->inputMapping = inputMapping;
4882 t->outputMapping = outputMapping;
4883 t->ureg = ureg;
4884
4885 if (program->shader_program) {
4886 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4887 struct gl_uniform_storage *const storage =
4888 &program->shader_program->UniformStorage[i];
4889
4890 _mesa_uniform_detach_all_driver_storage(storage);
4891 }
4892 }
4893
4894 /*
4895 * Declare input attributes.
4896 */
4897 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4898 for (i = 0; i < numInputs; i++) {
4899 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4900 inputSemanticName[i],
4901 inputSemanticIndex[i],
4902 interpMode[i], 0,
4903 interpLocation[i]);
4904 }
4905
4906 if (proginfo->InputsRead & VARYING_BIT_POS) {
4907 /* Must do this after setting up t->inputs, and before
4908 * emitting constant references, below:
4909 */
4910 emit_wpos(st_context(ctx), t, proginfo, ureg);
4911 }
4912
4913 if (proginfo->InputsRead & VARYING_BIT_FACE)
4914 emit_face_var(t);
4915
4916 /*
4917 * Declare output attributes.
4918 */
4919 for (i = 0; i < numOutputs; i++) {
4920 switch (outputSemanticName[i]) {
4921 case TGSI_SEMANTIC_POSITION:
4922 t->outputs[i] = ureg_DECL_output(ureg,
4923 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4924 outputSemanticIndex[i]);
4925 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4926 break;
4927 case TGSI_SEMANTIC_STENCIL:
4928 t->outputs[i] = ureg_DECL_output(ureg,
4929 TGSI_SEMANTIC_STENCIL, /* Stencil */
4930 outputSemanticIndex[i]);
4931 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4932 break;
4933 case TGSI_SEMANTIC_COLOR:
4934 t->outputs[i] = ureg_DECL_output(ureg,
4935 TGSI_SEMANTIC_COLOR,
4936 outputSemanticIndex[i]);
4937 break;
4938 case TGSI_SEMANTIC_SAMPLEMASK:
4939 t->outputs[i] = ureg_DECL_output(ureg,
4940 TGSI_SEMANTIC_SAMPLEMASK,
4941 outputSemanticIndex[i]);
4942 /* TODO: If we ever support more than 32 samples, this will have
4943 * to become an array.
4944 */
4945 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4946 break;
4947 default:
4948 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4949 ret = PIPE_ERROR_BAD_INPUT;
4950 goto out;
4951 }
4952 }
4953 }
4954 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4955 for (i = 0; i < numInputs; i++) {
4956 t->inputs[i] = ureg_DECL_gs_input(ureg,
4957 i,
4958 inputSemanticName[i],
4959 inputSemanticIndex[i]);
4960 }
4961
4962 for (i = 0; i < numOutputs; i++) {
4963 t->outputs[i] = ureg_DECL_output(ureg,
4964 outputSemanticName[i],
4965 outputSemanticIndex[i]);
4966 }
4967 }
4968 else {
4969 assert(procType == TGSI_PROCESSOR_VERTEX);
4970
4971 for (i = 0; i < numInputs; i++) {
4972 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4973 }
4974
4975 for (i = 0; i < numOutputs; i++) {
4976 t->outputs[i] = ureg_DECL_output(ureg,
4977 outputSemanticName[i],
4978 outputSemanticIndex[i]);
4979 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4980 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4981 ureg_MOV(ureg,
4982 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
4983 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
4984 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4985 }
4986 }
4987 if (passthrough_edgeflags)
4988 emit_edgeflags(t);
4989 }
4990
4991 /* Declare address register.
4992 */
4993 if (program->num_address_regs > 0) {
4994 assert(program->num_address_regs <= 3);
4995 for (int i = 0; i < program->num_address_regs; i++)
4996 t->address[i] = ureg_DECL_address(ureg);
4997 }
4998
4999 /* Declare misc input registers
5000 */
5001 {
5002 GLbitfield sysInputs = proginfo->SystemValuesRead;
5003 unsigned numSys = 0;
5004 for (i = 0; sysInputs; i++) {
5005 if (sysInputs & (1 << i)) {
5006 unsigned semName = _mesa_sysval_to_semantic[i];
5007 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5008 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5009 semName == TGSI_SEMANTIC_VERTEXID) {
5010 /* From Gallium perspective, these system values are always
5011 * integer, and require native integer support. However, if
5012 * native integer is supported on the vertex stage but not the
5013 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5014 * assumes these system values are floats. To resolve the
5015 * inconsistency, we insert a U2F.
5016 */
5017 struct st_context *st = st_context(ctx);
5018 struct pipe_screen *pscreen = st->pipe->screen;
5019 assert(procType == TGSI_PROCESSOR_VERTEX);
5020 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5021 if (!ctx->Const.NativeIntegers) {
5022 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5023 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5024 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5025 }
5026 }
5027 numSys++;
5028 sysInputs &= ~(1 << i);
5029 }
5030 }
5031 }
5032
5033 /* Copy over array sizes
5034 */
5035 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5036
5037 /* Emit constants and uniforms. TGSI uses a single index space for these,
5038 * so we put all the translated regs in t->constants.
5039 */
5040 if (proginfo->Parameters) {
5041 t->constants = (struct ureg_src *)
5042 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5043 if (t->constants == NULL) {
5044 ret = PIPE_ERROR_OUT_OF_MEMORY;
5045 goto out;
5046 }
5047
5048 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5049 switch (proginfo->Parameters->Parameters[i].Type) {
5050 case PROGRAM_STATE_VAR:
5051 case PROGRAM_UNIFORM:
5052 t->constants[i] = ureg_DECL_constant(ureg, i);
5053 break;
5054
5055 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5056 * addressing of the const buffer.
5057 * FIXME: Be smarter and recognize param arrays:
5058 * indirect addressing is only valid within the referenced
5059 * array.
5060 */
5061 case PROGRAM_CONSTANT:
5062 if (program->indirect_addr_consts)
5063 t->constants[i] = ureg_DECL_constant(ureg, i);
5064 else
5065 t->constants[i] = emit_immediate(t,
5066 proginfo->Parameters->ParameterValues[i],
5067 proginfo->Parameters->Parameters[i].DataType,
5068 4);
5069 break;
5070 default:
5071 break;
5072 }
5073 }
5074 }
5075
5076 if (program->shader) {
5077 unsigned num_ubos = program->shader->NumUniformBlocks;
5078
5079 for (i = 0; i < num_ubos; i++) {
5080 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5081 unsigned num_const_vecs = (size + 15) / 16;
5082 unsigned first, last;
5083 assert(num_const_vecs > 0);
5084 first = 0;
5085 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5086 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5087 }
5088 }
5089
5090 /* Emit immediate values.
5091 */
5092 t->immediates = (struct ureg_src *)
5093 calloc(program->num_immediates, sizeof(struct ureg_src));
5094 if (t->immediates == NULL) {
5095 ret = PIPE_ERROR_OUT_OF_MEMORY;
5096 goto out;
5097 }
5098 i = 0;
5099 foreach_in_list(immediate_storage, imm, &program->immediates) {
5100 assert(i < program->num_immediates);
5101 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5102 }
5103 assert(i == program->num_immediates);
5104
5105 /* texture samplers */
5106 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5107 if (program->samplers_used & (1 << i)) {
5108 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5109 }
5110 }
5111
5112 /* Emit each instruction in turn:
5113 */
5114 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5115 set_insn_start(t, ureg_get_instruction_number(ureg));
5116 compile_tgsi_instruction(t, inst, clamp_color);
5117 }
5118
5119 /* Fix up all emitted labels:
5120 */
5121 for (i = 0; i < t->labels_count; i++) {
5122 ureg_fixup_label(ureg, t->labels[i].token,
5123 t->insn[t->labels[i].branch_target]);
5124 }
5125
5126 if (program->shader_program) {
5127 /* This has to be done last. Any operation the can cause
5128 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5129 * program constant) has to happen before creating this linkage.
5130 */
5131 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5132 if (program->shader_program->_LinkedShaders[i] == NULL)
5133 continue;
5134
5135 _mesa_associate_uniform_storage(ctx, program->shader_program,
5136 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5137 }
5138 }
5139
5140 out:
5141 if (t) {
5142 free(t->temps);
5143 free(t->insn);
5144 free(t->labels);
5145 free(t->constants);
5146 free(t->immediates);
5147
5148 if (t->error) {
5149 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5150 }
5151
5152 free(t);
5153 }
5154
5155 return ret;
5156 }
5157 /* ----------------------------- End TGSI code ------------------------------ */
5158
5159
5160 static unsigned
5161 shader_stage_to_ptarget(gl_shader_stage stage)
5162 {
5163 switch (stage) {
5164 case MESA_SHADER_VERTEX:
5165 return PIPE_SHADER_VERTEX;
5166 case MESA_SHADER_FRAGMENT:
5167 return PIPE_SHADER_FRAGMENT;
5168 case MESA_SHADER_GEOMETRY:
5169 return PIPE_SHADER_GEOMETRY;
5170 case MESA_SHADER_COMPUTE:
5171 return PIPE_SHADER_COMPUTE;
5172 }
5173
5174 assert(!"should not be reached");
5175 return PIPE_SHADER_VERTEX;
5176 }
5177
5178
5179 /**
5180 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5181 * generating Mesa IR.
5182 */
5183 static struct gl_program *
5184 get_mesa_program(struct gl_context *ctx,
5185 struct gl_shader_program *shader_program,
5186 struct gl_shader *shader)
5187 {
5188 glsl_to_tgsi_visitor* v;
5189 struct gl_program *prog;
5190 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5191 bool progress;
5192 struct gl_shader_compiler_options *options =
5193 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5194 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5195 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5196
5197 validate_ir_tree(shader->ir);
5198
5199 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5200 if (!prog)
5201 return NULL;
5202 prog->Parameters = _mesa_new_parameter_list();
5203 v = new glsl_to_tgsi_visitor();
5204 v->ctx = ctx;
5205 v->prog = prog;
5206 v->shader_program = shader_program;
5207 v->shader = shader;
5208 v->options = options;
5209 v->glsl_version = ctx->Const.GLSLVersion;
5210 v->native_integers = ctx->Const.NativeIntegers;
5211
5212 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5213 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5214
5215 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5216 prog->Parameters);
5217
5218 /* Remove reads from output registers. */
5219 lower_output_reads(shader->ir);
5220
5221 /* Emit intermediate IR for main(). */
5222 visit_exec_list(shader->ir, v);
5223
5224 /* Now emit bodies for any functions that were used. */
5225 do {
5226 progress = GL_FALSE;
5227
5228 foreach_in_list(function_entry, entry, &v->function_signatures) {
5229 if (!entry->bgn_inst) {
5230 v->current_function = entry;
5231
5232 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5233 entry->bgn_inst->function = entry;
5234
5235 visit_exec_list(&entry->sig->body, v);
5236
5237 glsl_to_tgsi_instruction *last;
5238 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5239 if (last->op != TGSI_OPCODE_RET)
5240 v->emit(NULL, TGSI_OPCODE_RET);
5241
5242 glsl_to_tgsi_instruction *end;
5243 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5244 end->function = entry;
5245
5246 progress = GL_TRUE;
5247 }
5248 }
5249 } while (progress);
5250
5251 #if 0
5252 /* Print out some information (for debugging purposes) used by the
5253 * optimization passes. */
5254 for (i=0; i < v->next_temp; i++) {
5255 int fr = v->get_first_temp_read(i);
5256 int fw = v->get_first_temp_write(i);
5257 int lr = v->get_last_temp_read(i);
5258 int lw = v->get_last_temp_write(i);
5259
5260 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5261 assert(fw <= fr);
5262 }
5263 #endif
5264
5265 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5266 v->simplify_cmp();
5267 v->copy_propagate();
5268 while (v->eliminate_dead_code());
5269
5270 v->merge_registers();
5271 v->renumber_registers();
5272
5273 /* Write the END instruction. */
5274 v->emit(NULL, TGSI_OPCODE_END);
5275
5276 if (ctx->_Shader->Flags & GLSL_DUMP) {
5277 printf("\n");
5278 printf("GLSL IR for linked %s program %d:\n",
5279 _mesa_shader_stage_to_string(shader->Stage),
5280 shader_program->Name);
5281 _mesa_print_ir(stdout, shader->ir, NULL);
5282 printf("\n");
5283 printf("\n");
5284 fflush(stdout);
5285 }
5286
5287 prog->Instructions = NULL;
5288 prog->NumInstructions = 0;
5289
5290 do_set_program_inouts(shader->ir, prog, shader->Stage);
5291 count_resources(v, prog);
5292
5293 _mesa_reference_program(ctx, &shader->Program, prog);
5294
5295 /* This has to be done last. Any operation the can cause
5296 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5297 * program constant) has to happen before creating this linkage.
5298 */
5299 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5300 if (!shader_program->LinkStatus) {
5301 return NULL;
5302 }
5303
5304 struct st_vertex_program *stvp;
5305 struct st_fragment_program *stfp;
5306 struct st_geometry_program *stgp;
5307
5308 switch (shader->Type) {
5309 case GL_VERTEX_SHADER:
5310 stvp = (struct st_vertex_program *)prog;
5311 stvp->glsl_to_tgsi = v;
5312 break;
5313 case GL_FRAGMENT_SHADER:
5314 stfp = (struct st_fragment_program *)prog;
5315 stfp->glsl_to_tgsi = v;
5316 break;
5317 case GL_GEOMETRY_SHADER:
5318 stgp = (struct st_geometry_program *)prog;
5319 stgp->glsl_to_tgsi = v;
5320 stgp->Base.InputType = shader_program->Geom.InputType;
5321 stgp->Base.OutputType = shader_program->Geom.OutputType;
5322 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5323 stgp->Base.Invocations = shader_program->Geom.Invocations;
5324 break;
5325 default:
5326 assert(!"should not be reached");
5327 return NULL;
5328 }
5329
5330 return prog;
5331 }
5332
5333 extern "C" {
5334
5335 struct gl_shader *
5336 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5337 {
5338 struct gl_shader *shader;
5339 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5340 type == GL_GEOMETRY_SHADER_ARB);
5341 shader = rzalloc(NULL, struct gl_shader);
5342 if (shader) {
5343 shader->Type = type;
5344 shader->Stage = _mesa_shader_enum_to_shader_stage(type);
5345 shader->Name = name;
5346 _mesa_init_shader(ctx, shader);
5347 }
5348 return shader;
5349 }
5350
5351 struct gl_shader_program *
5352 st_new_shader_program(struct gl_context *ctx, GLuint name)
5353 {
5354 struct gl_shader_program *shProg;
5355 shProg = rzalloc(NULL, struct gl_shader_program);
5356 if (shProg) {
5357 shProg->Name = name;
5358 _mesa_init_shader_program(ctx, shProg);
5359 }
5360 return shProg;
5361 }
5362
5363 /**
5364 * Link a shader.
5365 * Called via ctx->Driver.LinkShader()
5366 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5367 * with code lowering and other optimizations.
5368 */
5369 GLboolean
5370 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5371 {
5372 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5373 assert(prog->LinkStatus);
5374
5375 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5376 if (prog->_LinkedShaders[i] == NULL)
5377 continue;
5378
5379 bool progress;
5380 exec_list *ir = prog->_LinkedShaders[i]->ir;
5381 const struct gl_shader_compiler_options *options =
5382 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5383
5384 /* If there are forms of indirect addressing that the driver
5385 * cannot handle, perform the lowering pass.
5386 */
5387 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5388 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5389 lower_variable_index_to_cond_assign(ir,
5390 options->EmitNoIndirectInput,
5391 options->EmitNoIndirectOutput,
5392 options->EmitNoIndirectTemp,
5393 options->EmitNoIndirectUniform);
5394 }
5395
5396 if (ctx->Extensions.ARB_shading_language_packing) {
5397 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5398 LOWER_UNPACK_SNORM_2x16 |
5399 LOWER_PACK_UNORM_2x16 |
5400 LOWER_UNPACK_UNORM_2x16 |
5401 LOWER_PACK_SNORM_4x8 |
5402 LOWER_UNPACK_SNORM_4x8 |
5403 LOWER_UNPACK_UNORM_4x8 |
5404 LOWER_PACK_UNORM_4x8 |
5405 LOWER_PACK_HALF_2x16 |
5406 LOWER_UNPACK_HALF_2x16;
5407
5408 lower_packing_builtins(ir, lower_inst);
5409 }
5410
5411 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5412 lower_offset_arrays(ir);
5413 do_mat_op_to_vec(ir);
5414 /* Emit saturates in the vertex shader only if SM 3.0 is supported. */
5415 bool vs_sm3 = (_mesa_shader_stage_to_program(prog->_LinkedShaders[i]->Stage) ==
5416 GL_VERTEX_PROGRAM_ARB) && st_context(ctx)->has_shader_model3;
5417 lower_instructions(ir,
5418 MOD_TO_FRACT |
5419 DIV_TO_MUL_RCP |
5420 EXP_TO_EXP2 |
5421 LOG_TO_LOG2 |
5422 LDEXP_TO_ARITH |
5423 CARRY_TO_ARITH |
5424 BORROW_TO_ARITH |
5425 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5426 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) |
5427 (vs_sm3 ? SAT_TO_CLAMP : 0));
5428
5429 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5430 do_vec_index_to_cond_assign(ir);
5431 lower_vector_insert(ir, true);
5432 lower_quadop_vector(ir, false);
5433 lower_noise(ir);
5434 if (options->MaxIfDepth == 0) {
5435 lower_discard(ir);
5436 }
5437
5438 do {
5439 progress = false;
5440
5441 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5442
5443 progress = do_common_optimization(ir, true, true, options,
5444 ctx->Const.NativeIntegers)
5445 || progress;
5446
5447 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5448
5449 } while (progress);
5450
5451 validate_ir_tree(ir);
5452 }
5453
5454 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5455 struct gl_program *linked_prog;
5456
5457 if (prog->_LinkedShaders[i] == NULL)
5458 continue;
5459
5460 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5461
5462 if (linked_prog) {
5463 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5464 linked_prog);
5465 if (!ctx->Driver.ProgramStringNotify(ctx,
5466 _mesa_shader_stage_to_program(i),
5467 linked_prog)) {
5468 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5469 NULL);
5470 _mesa_reference_program(ctx, &linked_prog, NULL);
5471 return GL_FALSE;
5472 }
5473 }
5474
5475 _mesa_reference_program(ctx, &linked_prog, NULL);
5476 }
5477
5478 return GL_TRUE;
5479 }
5480
5481 void
5482 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5483 const GLuint outputMapping[],
5484 struct pipe_stream_output_info *so)
5485 {
5486 unsigned i;
5487 struct gl_transform_feedback_info *info =
5488 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5489
5490 for (i = 0; i < info->NumOutputs; i++) {
5491 so->output[i].register_index =
5492 outputMapping[info->Outputs[i].OutputRegister];
5493 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5494 so->output[i].num_components = info->Outputs[i].NumComponents;
5495 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5496 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5497 so->output[i].stream = info->Outputs[i].StreamId;
5498 }
5499
5500 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5501 so->stride[i] = info->BufferStride[i];
5502 }
5503 so->num_outputs = info->NumOutputs;
5504 }
5505
5506 } /* extern "C" */