glsl: move variables in to ir_variable::data, part I
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 /* will be 4 for GLSL 4.00 */
91 #define MAX_GLSL_TEXTURE_OFFSET 1
92
93 class st_src_reg;
94 class st_dst_reg;
95
96 static int swizzle_for_size(int size);
97
98 /**
99 * This struct is a corresponding struct to TGSI ureg_src.
100 */
101 class st_src_reg {
102 public:
103 st_src_reg(gl_register_file file, int index, const glsl_type *type)
104 {
105 this->file = file;
106 this->index = index;
107 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
108 this->swizzle = swizzle_for_size(type->vector_elements);
109 else
110 this->swizzle = SWIZZLE_XYZW;
111 this->negate = 0;
112 this->index2D = 0;
113 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
114 this->reladdr = NULL;
115 this->reladdr2 = NULL;
116 this->has_index2 = false;
117 }
118
119 st_src_reg(gl_register_file file, int index, int type)
120 {
121 this->type = type;
122 this->file = file;
123 this->index = index;
124 this->index2D = 0;
125 this->swizzle = SWIZZLE_XYZW;
126 this->negate = 0;
127 this->reladdr = NULL;
128 this->reladdr2 = NULL;
129 this->has_index2 = false;
130 }
131
132 st_src_reg(gl_register_file file, int index, int type, int index2D)
133 {
134 this->type = type;
135 this->file = file;
136 this->index = index;
137 this->index2D = index2D;
138 this->swizzle = SWIZZLE_XYZW;
139 this->negate = 0;
140 this->reladdr = NULL;
141 this->reladdr2 = NULL;
142 this->has_index2 = false;
143 }
144
145 st_src_reg()
146 {
147 this->type = GLSL_TYPE_ERROR;
148 this->file = PROGRAM_UNDEFINED;
149 this->index = 0;
150 this->index2D = 0;
151 this->swizzle = 0;
152 this->negate = 0;
153 this->reladdr = NULL;
154 this->reladdr2 = NULL;
155 this->has_index2 = false;
156 }
157
158 explicit st_src_reg(st_dst_reg reg);
159
160 gl_register_file file; /**< PROGRAM_* from Mesa */
161 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 int index2D;
163 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
164 int negate; /**< NEGATE_XYZW mask from mesa */
165 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
166 /** Register index should be offset by the integer in this reg. */
167 st_src_reg *reladdr;
168 st_src_reg *reladdr2;
169 bool has_index2;
170 };
171
172 class st_dst_reg {
173 public:
174 st_dst_reg(gl_register_file file, int writemask, int type, int index)
175 {
176 this->file = file;
177 this->index = index;
178 this->writemask = writemask;
179 this->cond_mask = COND_TR;
180 this->reladdr = NULL;
181 this->type = type;
182 }
183
184 st_dst_reg(gl_register_file file, int writemask, int type)
185 {
186 this->file = file;
187 this->index = 0;
188 this->writemask = writemask;
189 this->cond_mask = COND_TR;
190 this->reladdr = NULL;
191 this->type = type;
192 }
193
194 st_dst_reg()
195 {
196 this->type = GLSL_TYPE_ERROR;
197 this->file = PROGRAM_UNDEFINED;
198 this->index = 0;
199 this->writemask = 0;
200 this->cond_mask = COND_TR;
201 this->reladdr = NULL;
202 }
203
204 explicit st_dst_reg(st_src_reg reg);
205
206 gl_register_file file; /**< PROGRAM_* from Mesa */
207 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
208 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
209 GLuint cond_mask:4;
210 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
211 /** Register index should be offset by the integer in this reg. */
212 st_src_reg *reladdr;
213 };
214
215 st_src_reg::st_src_reg(st_dst_reg reg)
216 {
217 this->type = reg.type;
218 this->file = reg.file;
219 this->index = reg.index;
220 this->swizzle = SWIZZLE_XYZW;
221 this->negate = 0;
222 this->reladdr = reg.reladdr;
223 this->index2D = 0;
224 this->reladdr2 = NULL;
225 this->has_index2 = false;
226 }
227
228 st_dst_reg::st_dst_reg(st_src_reg reg)
229 {
230 this->type = reg.type;
231 this->file = reg.file;
232 this->index = reg.index;
233 this->writemask = WRITEMASK_XYZW;
234 this->cond_mask = COND_TR;
235 this->reladdr = reg.reladdr;
236 }
237
238 class glsl_to_tgsi_instruction : public exec_node {
239 public:
240 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
241
242 unsigned op;
243 st_dst_reg dst;
244 st_src_reg src[3];
245 /** Pointer to the ir source this tree came from for debugging */
246 ir_instruction *ir;
247 GLboolean cond_update;
248 bool saturate;
249 int sampler; /**< sampler index */
250 int tex_target; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow;
252 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
253 unsigned tex_offset_num_offset;
254 int dead_mask; /**< Used in dead code elimination */
255
256 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
257 };
258
259 class variable_storage : public exec_node {
260 public:
261 variable_storage(ir_variable *var, gl_register_file file, int index)
262 : file(file), index(index), var(var)
263 {
264 /* empty */
265 }
266
267 gl_register_file file;
268 int index;
269 ir_variable *var; /* variable that maps to this, if any */
270 };
271
272 class immediate_storage : public exec_node {
273 public:
274 immediate_storage(gl_constant_value *values, int size, int type)
275 {
276 memcpy(this->values, values, size * sizeof(gl_constant_value));
277 this->size = size;
278 this->type = type;
279 }
280
281 gl_constant_value values[4];
282 int size; /**< Number of components (1-4) */
283 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
284 };
285
286 class function_entry : public exec_node {
287 public:
288 ir_function_signature *sig;
289
290 /**
291 * identifier of this function signature used by the program.
292 *
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
297 */
298 int sig_id;
299
300 /**
301 * Pointer to first instruction of the function body.
302 *
303 * Set during function body emits after main() is processed.
304 */
305 glsl_to_tgsi_instruction *bgn_inst;
306
307 /**
308 * Index of the first instruction of the function body in actual TGSI.
309 *
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
311 */
312 int inst;
313
314 /** Storage for the return value. */
315 st_src_reg return_reg;
316 };
317
318 struct glsl_to_tgsi_visitor : public ir_visitor {
319 public:
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
322
323 function_entry *current_function;
324
325 struct gl_context *ctx;
326 struct gl_program *prog;
327 struct gl_shader_program *shader_program;
328 struct gl_shader_compiler_options *options;
329
330 int next_temp;
331
332 unsigned array_sizes[MAX_ARRAYS];
333 unsigned next_array;
334
335 int num_address_regs;
336 int samplers_used;
337 bool indirect_addr_consts;
338
339 int glsl_version;
340 bool native_integers;
341 bool have_sqrt;
342
343 variable_storage *find_variable_storage(ir_variable *var);
344
345 int add_constant(gl_register_file file, gl_constant_value values[4],
346 int size, int datatype, GLuint *swizzle_out);
347
348 function_entry *get_function_signature(ir_function_signature *sig);
349
350 st_src_reg get_temp(const glsl_type *type);
351 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
352
353 st_src_reg st_src_reg_for_float(float val);
354 st_src_reg st_src_reg_for_int(int val);
355 st_src_reg st_src_reg_for_type(int type, int val);
356
357 /**
358 * \name Visit methods
359 *
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
363 */
364 /*@{*/
365 virtual void visit(ir_variable *);
366 virtual void visit(ir_loop *);
367 virtual void visit(ir_loop_jump *);
368 virtual void visit(ir_function_signature *);
369 virtual void visit(ir_function *);
370 virtual void visit(ir_expression *);
371 virtual void visit(ir_swizzle *);
372 virtual void visit(ir_dereference_variable *);
373 virtual void visit(ir_dereference_array *);
374 virtual void visit(ir_dereference_record *);
375 virtual void visit(ir_assignment *);
376 virtual void visit(ir_constant *);
377 virtual void visit(ir_call *);
378 virtual void visit(ir_return *);
379 virtual void visit(ir_discard *);
380 virtual void visit(ir_texture *);
381 virtual void visit(ir_if *);
382 virtual void visit(ir_emit_vertex *);
383 virtual void visit(ir_end_primitive *);
384 /*@}*/
385
386 st_src_reg result;
387
388 /** List of variable_storage */
389 exec_list variables;
390
391 /** List of immediate_storage */
392 exec_list immediates;
393 unsigned num_immediates;
394
395 /** List of function_entry */
396 exec_list function_signatures;
397 int next_signature_id;
398
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions;
401
402 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
405 st_dst_reg dst, st_src_reg src0);
406
407 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
408 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
409
410 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
411 st_dst_reg dst,
412 st_src_reg src0, st_src_reg src1, st_src_reg src2);
413
414 unsigned get_opcode(ir_instruction *ir, unsigned op,
415 st_dst_reg dst,
416 st_src_reg src0, st_src_reg src1);
417
418 /**
419 * Emit the correct dot-product instruction for the type of arguments
420 */
421 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
422 st_dst_reg dst,
423 st_src_reg src0,
424 st_src_reg src1,
425 unsigned elements);
426
427 void emit_scalar(ir_instruction *ir, unsigned op,
428 st_dst_reg dst, st_src_reg src0);
429
430 void emit_scalar(ir_instruction *ir, unsigned op,
431 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
432
433 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
434
435 void emit_scs(ir_instruction *ir, unsigned op,
436 st_dst_reg dst, const st_src_reg &src);
437
438 bool try_emit_mad(ir_expression *ir,
439 int mul_operand);
440 bool try_emit_mad_for_and_not(ir_expression *ir,
441 int mul_operand);
442 bool try_emit_sat(ir_expression *ir);
443
444 void emit_swz(ir_expression *ir);
445
446 bool process_move_condition(ir_rvalue *ir);
447
448 void simplify_cmp(void);
449
450 void rename_temp_register(int index, int new_index);
451 int get_first_temp_read(int index);
452 int get_first_temp_write(int index);
453 int get_last_temp_read(int index);
454 int get_last_temp_write(int index);
455
456 void copy_propagate(void);
457 void eliminate_dead_code(void);
458 int eliminate_dead_code_advanced(void);
459 void merge_registers(void);
460 void renumber_registers(void);
461
462 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
463 st_dst_reg *l, st_src_reg *r);
464
465 void *mem_ctx;
466 };
467
468 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
469
470 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
471
472 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
473 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
474
475 static void
476 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
477
478 static void
479 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
480 {
481 va_list args;
482 va_start(args, fmt);
483 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
484 va_end(args);
485
486 prog->LinkStatus = GL_FALSE;
487 }
488
489 static int
490 swizzle_for_size(int size)
491 {
492 int size_swizzles[4] = {
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
495 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
496 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
497 };
498
499 assert((size >= 1) && (size <= 4));
500 return size_swizzles[size - 1];
501 }
502
503 static bool
504 is_tex_instruction(unsigned opcode)
505 {
506 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
507 return info->is_tex;
508 }
509
510 static unsigned
511 num_inst_dst_regs(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->num_dst;
515 }
516
517 static unsigned
518 num_inst_src_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->is_tex ? info->num_src - 1 : info->num_src;
522 }
523
524 glsl_to_tgsi_instruction *
525 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
526 st_dst_reg dst,
527 st_src_reg src0, st_src_reg src1, st_src_reg src2)
528 {
529 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
530 int num_reladdr = 0, i;
531
532 op = get_opcode(ir, op, dst, src0, src1);
533
534 /* If we have to do relative addressing, we want to load the ARL
535 * reg directly for one of the regs, and preload the other reladdr
536 * sources into temps.
537 */
538 num_reladdr += dst.reladdr != NULL;
539 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
540 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
541 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
542
543 reladdr_to_temp(ir, &src2, &num_reladdr);
544 reladdr_to_temp(ir, &src1, &num_reladdr);
545 reladdr_to_temp(ir, &src0, &num_reladdr);
546
547 if (dst.reladdr) {
548 emit_arl(ir, address_reg, *dst.reladdr);
549 num_reladdr--;
550 }
551 assert(num_reladdr == 0);
552
553 inst->op = op;
554 inst->dst = dst;
555 inst->src[0] = src0;
556 inst->src[1] = src1;
557 inst->src[2] = src2;
558 inst->ir = ir;
559 inst->dead_mask = 0;
560
561 inst->function = NULL;
562
563 /* Update indirect addressing status used by TGSI */
564 if (dst.reladdr) {
565 switch(dst.file) {
566 case PROGRAM_STATE_VAR:
567 case PROGRAM_CONSTANT:
568 case PROGRAM_UNIFORM:
569 this->indirect_addr_consts = true;
570 break;
571 case PROGRAM_IMMEDIATE:
572 assert(!"immediates should not have indirect addressing");
573 break;
574 default:
575 break;
576 }
577 }
578 else {
579 for (i=0; i<3; i++) {
580 if(inst->src[i].reladdr) {
581 switch(inst->src[i].file) {
582 case PROGRAM_STATE_VAR:
583 case PROGRAM_CONSTANT:
584 case PROGRAM_UNIFORM:
585 this->indirect_addr_consts = true;
586 break;
587 case PROGRAM_IMMEDIATE:
588 assert(!"immediates should not have indirect addressing");
589 break;
590 default:
591 break;
592 }
593 }
594 }
595 }
596
597 this->instructions.push_tail(inst);
598
599 return inst;
600 }
601
602
603 glsl_to_tgsi_instruction *
604 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
605 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
606 {
607 return emit(ir, op, dst, src0, src1, undef_src);
608 }
609
610 glsl_to_tgsi_instruction *
611 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
612 st_dst_reg dst, st_src_reg src0)
613 {
614 assert(dst.writemask != 0);
615 return emit(ir, op, dst, src0, undef_src, undef_src);
616 }
617
618 glsl_to_tgsi_instruction *
619 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
620 {
621 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
622 }
623
624 /**
625 * Determines whether to use an integer, unsigned integer, or float opcode
626 * based on the operands and input opcode, then emits the result.
627 */
628 unsigned
629 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
630 st_dst_reg dst,
631 st_src_reg src0, st_src_reg src1)
632 {
633 int type = GLSL_TYPE_FLOAT;
634
635 assert(src0.type != GLSL_TYPE_ARRAY);
636 assert(src0.type != GLSL_TYPE_STRUCT);
637 assert(src1.type != GLSL_TYPE_ARRAY);
638 assert(src1.type != GLSL_TYPE_STRUCT);
639
640 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
641 type = GLSL_TYPE_FLOAT;
642 else if (native_integers)
643 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
644
645 #define case4(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
651 else \
652 op = TGSI_OPCODE_##f; \
653 break;
654
655 #define case3(f, i, u) case4(f, f, i, u)
656 #define case2fi(f, i) case4(f, f, i, i)
657 #define case2iu(i, u) case4(i, LAST, i, u)
658
659 #define casecomp(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) \
662 op = TGSI_OPCODE_##i; \
663 else if (type == GLSL_TYPE_UINT) \
664 op = TGSI_OPCODE_##u; \
665 else if (native_integers) \
666 op = TGSI_OPCODE_##f; \
667 else \
668 op = TGSI_OPCODE_##c; \
669 break;
670
671 switch(op) {
672 case2fi(ADD, UADD);
673 case2fi(MUL, UMUL);
674 case2fi(MAD, UMAD);
675 case3(DIV, IDIV, UDIV);
676 case3(MAX, IMAX, UMAX);
677 case3(MIN, IMIN, UMIN);
678 case2iu(MOD, UMOD);
679
680 casecomp(SEQ, FSEQ, USEQ, USEQ);
681 casecomp(SNE, FSNE, USNE, USNE);
682 casecomp(SGE, FSGE, ISGE, USGE);
683 casecomp(SLT, FSLT, ISLT, USLT);
684
685 case2iu(ISHR, USHR);
686
687 case2fi(SSG, ISSG);
688 case3(ABS, IABS, IABS);
689
690 default: break;
691 }
692
693 assert(op != TGSI_OPCODE_LAST);
694 return op;
695 }
696
697 glsl_to_tgsi_instruction *
698 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
699 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
700 unsigned elements)
701 {
702 static const unsigned dot_opcodes[] = {
703 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
704 };
705
706 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
707 }
708
709 /**
710 * Emits TGSI scalar opcodes to produce unique answers across channels.
711 *
712 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
713 * channel determines the result across all channels. So to do a vec4
714 * of this operation, we want to emit a scalar per source channel used
715 * to produce dest channels.
716 */
717 void
718 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
719 st_dst_reg dst,
720 st_src_reg orig_src0, st_src_reg orig_src1)
721 {
722 int i, j;
723 int done_mask = ~dst.writemask;
724
725 /* TGSI RCP is a scalar operation splatting results to all channels,
726 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
727 * dst channels.
728 */
729 for (i = 0; i < 4; i++) {
730 GLuint this_mask = (1 << i);
731 glsl_to_tgsi_instruction *inst;
732 st_src_reg src0 = orig_src0;
733 st_src_reg src1 = orig_src1;
734
735 if (done_mask & this_mask)
736 continue;
737
738 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
739 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
740 for (j = i + 1; j < 4; j++) {
741 /* If there is another enabled component in the destination that is
742 * derived from the same inputs, generate its value on this pass as
743 * well.
744 */
745 if (!(done_mask & (1 << j)) &&
746 GET_SWZ(src0.swizzle, j) == src0_swiz &&
747 GET_SWZ(src1.swizzle, j) == src1_swiz) {
748 this_mask |= (1 << j);
749 }
750 }
751 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
752 src0_swiz, src0_swiz);
753 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
754 src1_swiz, src1_swiz);
755
756 inst = emit(ir, op, dst, src0, src1);
757 inst->dst.writemask = this_mask;
758 done_mask |= this_mask;
759 }
760 }
761
762 void
763 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
764 st_dst_reg dst, st_src_reg src0)
765 {
766 st_src_reg undef = undef_src;
767
768 undef.swizzle = SWIZZLE_XXXX;
769
770 emit_scalar(ir, op, dst, src0, undef);
771 }
772
773 void
774 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
775 st_dst_reg dst, st_src_reg src0)
776 {
777 int op = TGSI_OPCODE_ARL;
778
779 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
780 op = TGSI_OPCODE_UARL;
781
782 assert(dst.file == PROGRAM_ADDRESS);
783 if (dst.index >= this->num_address_regs)
784 this->num_address_regs = dst.index + 1;
785
786 emit(NULL, op, dst, src0);
787 }
788
789 /**
790 * Emit an TGSI_OPCODE_SCS instruction
791 *
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
796 *
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
802 */
803 void
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
805 st_dst_reg dst,
806 const st_src_reg &src)
807 {
808 /* Vertex programs cannot use the SCS opcode.
809 */
810 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
811 emit_scalar(ir, op, dst, src);
812 return;
813 }
814
815 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
816 const unsigned scs_mask = (1U << component);
817 int done_mask = ~dst.writemask;
818 st_src_reg tmp;
819
820 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
821
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
824 */
825 if (scs_mask != unsigned(dst.writemask)) {
826 tmp = get_temp(glsl_type::vec4_type);
827 }
828
829 for (unsigned i = 0; i < 4; i++) {
830 unsigned this_mask = (1U << i);
831 st_src_reg src0 = src;
832
833 if ((done_mask & this_mask) != 0)
834 continue;
835
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
840 * the X component.
841 */
842 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
843
844 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
845 src0_swiz, src0_swiz);
846 for (unsigned j = i + 1; j < 4; j++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
849 * well.
850 */
851 if (!(done_mask & (1 << j)) &&
852 GET_SWZ(src0.swizzle, j) == src0_swiz) {
853 this_mask |= (1 << j);
854 }
855 }
856
857 if (this_mask != scs_mask) {
858 glsl_to_tgsi_instruction *inst;
859 st_dst_reg tmp_dst = st_dst_reg(tmp);
860
861 /* Emit the SCS instruction.
862 */
863 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
864 inst->dst.writemask = scs_mask;
865
866 /* Move the result of the SCS instruction to the desired location in
867 * the destination.
868 */
869 tmp.swizzle = MAKE_SWIZZLE4(component, component,
870 component, component);
871 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
872 inst->dst.writemask = this_mask;
873 } else {
874 /* Emit the SCS instruction to write directly to the destination.
875 */
876 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
877 inst->dst.writemask = scs_mask;
878 }
879
880 done_mask |= this_mask;
881 }
882 }
883
884 int
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
886 gl_constant_value values[4], int size, int datatype,
887 GLuint *swizzle_out)
888 {
889 if (file == PROGRAM_CONSTANT) {
890 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
891 size, datatype, swizzle_out);
892 } else {
893 int index = 0;
894 immediate_storage *entry;
895 assert(file == PROGRAM_IMMEDIATE);
896
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
899 */
900 foreach_iter(exec_list_iterator, iter, this->immediates) {
901 entry = (immediate_storage *)iter.get();
902
903 if (entry->size == size &&
904 entry->type == datatype &&
905 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
906 return index;
907 }
908 index++;
909 }
910
911 /* Add this immediate to the list. */
912 entry = new(mem_ctx) immediate_storage(values, size, datatype);
913 this->immediates.push_tail(entry);
914 this->num_immediates++;
915 return index;
916 }
917 }
918
919 st_src_reg
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
921 {
922 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
923 union gl_constant_value uval;
924
925 uval.f = val;
926 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
927
928 return src;
929 }
930
931 st_src_reg
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
933 {
934 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
935 union gl_constant_value uval;
936
937 assert(native_integers);
938
939 uval.i = val;
940 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
941
942 return src;
943 }
944
945 st_src_reg
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
947 {
948 if (native_integers)
949 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
950 st_src_reg_for_int(val);
951 else
952 return st_src_reg_for_float(val);
953 }
954
955 static int
956 type_size(const struct glsl_type *type)
957 {
958 unsigned int i;
959 int size;
960
961 switch (type->base_type) {
962 case GLSL_TYPE_UINT:
963 case GLSL_TYPE_INT:
964 case GLSL_TYPE_FLOAT:
965 case GLSL_TYPE_BOOL:
966 if (type->is_matrix()) {
967 return type->matrix_columns;
968 } else {
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
973 */
974 return 1;
975 }
976 case GLSL_TYPE_ARRAY:
977 assert(type->length > 0);
978 return type_size(type->fields.array) * type->length;
979 case GLSL_TYPE_STRUCT:
980 size = 0;
981 for (i = 0; i < type->length; i++) {
982 size += type_size(type->fields.structure[i].type);
983 }
984 return size;
985 case GLSL_TYPE_SAMPLER:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
987 * at link time.
988 */
989 return 1;
990 case GLSL_TYPE_ATOMIC_UINT:
991 case GLSL_TYPE_INTERFACE:
992 case GLSL_TYPE_VOID:
993 case GLSL_TYPE_ERROR:
994 assert(!"Invalid type in type_size");
995 break;
996 }
997 return 0;
998 }
999
1000 /**
1001 * In the initial pass of codegen, we assign temporary numbers to
1002 * intermediate results. (not SSA -- variable assignments will reuse
1003 * storage).
1004 */
1005 st_src_reg
1006 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1007 {
1008 st_src_reg src;
1009
1010 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1011 src.reladdr = NULL;
1012 src.negate = 0;
1013
1014 if (!options->EmitNoIndirectTemp &&
1015 (type->is_array() || type->is_matrix())) {
1016
1017 src.file = PROGRAM_ARRAY;
1018 src.index = next_array << 16 | 0x8000;
1019 array_sizes[next_array] = type_size(type);
1020 ++next_array;
1021
1022 } else {
1023 src.file = PROGRAM_TEMPORARY;
1024 src.index = next_temp;
1025 next_temp += type_size(type);
1026 }
1027
1028 if (type->is_array() || type->is_record()) {
1029 src.swizzle = SWIZZLE_NOOP;
1030 } else {
1031 src.swizzle = swizzle_for_size(type->vector_elements);
1032 }
1033
1034 return src;
1035 }
1036
1037 variable_storage *
1038 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1039 {
1040
1041 variable_storage *entry;
1042
1043 foreach_iter(exec_list_iterator, iter, this->variables) {
1044 entry = (variable_storage *)iter.get();
1045
1046 if (entry->var == var)
1047 return entry;
1048 }
1049
1050 return NULL;
1051 }
1052
1053 void
1054 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1055 {
1056 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1057 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1058
1059 fp->OriginUpperLeft = ir->data.origin_upper_left;
1060 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1061 }
1062
1063 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1064 unsigned int i;
1065 const ir_state_slot *const slots = ir->state_slots;
1066 assert(ir->state_slots != NULL);
1067
1068 /* Check if this statevar's setup in the STATE file exactly
1069 * matches how we'll want to reference it as a
1070 * struct/array/whatever. If not, then we need to move it into
1071 * temporary storage and hope that it'll get copy-propagated
1072 * out.
1073 */
1074 for (i = 0; i < ir->num_state_slots; i++) {
1075 if (slots[i].swizzle != SWIZZLE_XYZW) {
1076 break;
1077 }
1078 }
1079
1080 variable_storage *storage;
1081 st_dst_reg dst;
1082 if (i == ir->num_state_slots) {
1083 /* We'll set the index later. */
1084 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1085 this->variables.push_tail(storage);
1086
1087 dst = undef_dst;
1088 } else {
1089 /* The variable_storage constructor allocates slots based on the size
1090 * of the type. However, this had better match the number of state
1091 * elements that we're going to copy into the new temporary.
1092 */
1093 assert((int) ir->num_state_slots == type_size(ir->type));
1094
1095 dst = st_dst_reg(get_temp(ir->type));
1096
1097 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1098
1099 this->variables.push_tail(storage);
1100 }
1101
1102
1103 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1104 int index = _mesa_add_state_reference(this->prog->Parameters,
1105 (gl_state_index *)slots[i].tokens);
1106
1107 if (storage->file == PROGRAM_STATE_VAR) {
1108 if (storage->index == -1) {
1109 storage->index = index;
1110 } else {
1111 assert(index == storage->index + (int)i);
1112 }
1113 } else {
1114 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1115 * the data being moved since MOV does not care about the type of
1116 * data it is moving, and we don't want to declare registers with
1117 * array or struct types.
1118 */
1119 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1120 src.swizzle = slots[i].swizzle;
1121 emit(ir, TGSI_OPCODE_MOV, dst, src);
1122 /* even a float takes up a whole vec4 reg in a struct/array. */
1123 dst.index++;
1124 }
1125 }
1126
1127 if (storage->file == PROGRAM_TEMPORARY &&
1128 dst.index != storage->index + (int) ir->num_state_slots) {
1129 fail_link(this->shader_program,
1130 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1131 ir->name, dst.index - storage->index,
1132 type_size(ir->type));
1133 }
1134 }
1135 }
1136
1137 void
1138 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1139 {
1140 emit(NULL, TGSI_OPCODE_BGNLOOP);
1141
1142 visit_exec_list(&ir->body_instructions, this);
1143
1144 emit(NULL, TGSI_OPCODE_ENDLOOP);
1145 }
1146
1147 void
1148 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1149 {
1150 switch (ir->mode) {
1151 case ir_loop_jump::jump_break:
1152 emit(NULL, TGSI_OPCODE_BRK);
1153 break;
1154 case ir_loop_jump::jump_continue:
1155 emit(NULL, TGSI_OPCODE_CONT);
1156 break;
1157 }
1158 }
1159
1160
1161 void
1162 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1163 {
1164 assert(0);
1165 (void)ir;
1166 }
1167
1168 void
1169 glsl_to_tgsi_visitor::visit(ir_function *ir)
1170 {
1171 /* Ignore function bodies other than main() -- we shouldn't see calls to
1172 * them since they should all be inlined before we get to glsl_to_tgsi.
1173 */
1174 if (strcmp(ir->name, "main") == 0) {
1175 const ir_function_signature *sig;
1176 exec_list empty;
1177
1178 sig = ir->matching_signature(NULL, &empty);
1179
1180 assert(sig);
1181
1182 foreach_iter(exec_list_iterator, iter, sig->body) {
1183 ir_instruction *ir = (ir_instruction *)iter.get();
1184
1185 ir->accept(this);
1186 }
1187 }
1188 }
1189
1190 bool
1191 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1192 {
1193 int nonmul_operand = 1 - mul_operand;
1194 st_src_reg a, b, c;
1195 st_dst_reg result_dst;
1196
1197 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1198 if (!expr || expr->operation != ir_binop_mul)
1199 return false;
1200
1201 expr->operands[0]->accept(this);
1202 a = this->result;
1203 expr->operands[1]->accept(this);
1204 b = this->result;
1205 ir->operands[nonmul_operand]->accept(this);
1206 c = this->result;
1207
1208 this->result = get_temp(ir->type);
1209 result_dst = st_dst_reg(this->result);
1210 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1211 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1212
1213 return true;
1214 }
1215
1216 /**
1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1218 *
1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1220 * implemented using multiplication, and logical-or is implemented using
1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1222 * As result, the logical expression (a & !b) can be rewritten as:
1223 *
1224 * - a * !b
1225 * - a * (1 - b)
1226 * - (a * 1) - (a * b)
1227 * - a + -(a * b)
1228 * - a + (a * -b)
1229 *
1230 * This final expression can be implemented as a single MAD(a, -b, a)
1231 * instruction.
1232 */
1233 bool
1234 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1235 {
1236 const int other_operand = 1 - try_operand;
1237 st_src_reg a, b;
1238
1239 ir_expression *expr = ir->operands[try_operand]->as_expression();
1240 if (!expr || expr->operation != ir_unop_logic_not)
1241 return false;
1242
1243 ir->operands[other_operand]->accept(this);
1244 a = this->result;
1245 expr->operands[0]->accept(this);
1246 b = this->result;
1247
1248 b.negate = ~b.negate;
1249
1250 this->result = get_temp(ir->type);
1251 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1252
1253 return true;
1254 }
1255
1256 bool
1257 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1258 {
1259 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1260 */
1261 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1262 !st_context(this->ctx)->has_shader_model3) {
1263 return false;
1264 }
1265
1266 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1267 if (!sat_src)
1268 return false;
1269
1270 sat_src->accept(this);
1271 st_src_reg src = this->result;
1272
1273 /* If we generated an expression instruction into a temporary in
1274 * processing the saturate's operand, apply the saturate to that
1275 * instruction. Otherwise, generate a MOV to do the saturate.
1276 *
1277 * Note that we have to be careful to only do this optimization if
1278 * the instruction in question was what generated src->result. For
1279 * example, ir_dereference_array might generate a MUL instruction
1280 * to create the reladdr, and return us a src reg using that
1281 * reladdr. That MUL result is not the value we're trying to
1282 * saturate.
1283 */
1284 ir_expression *sat_src_expr = sat_src->as_expression();
1285 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1286 sat_src_expr->operation == ir_binop_add ||
1287 sat_src_expr->operation == ir_binop_dot)) {
1288 glsl_to_tgsi_instruction *new_inst;
1289 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1290 new_inst->saturate = true;
1291 } else {
1292 this->result = get_temp(ir->type);
1293 st_dst_reg result_dst = st_dst_reg(this->result);
1294 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1295 glsl_to_tgsi_instruction *inst;
1296 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1297 inst->saturate = true;
1298 }
1299
1300 return true;
1301 }
1302
1303 void
1304 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1305 st_src_reg *reg, int *num_reladdr)
1306 {
1307 if (!reg->reladdr && !reg->reladdr2)
1308 return;
1309
1310 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1311 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1312
1313 if (*num_reladdr != 1) {
1314 st_src_reg temp = get_temp(glsl_type::vec4_type);
1315
1316 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1317 *reg = temp;
1318 }
1319
1320 (*num_reladdr)--;
1321 }
1322
1323 void
1324 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1325 {
1326 unsigned int operand;
1327 st_src_reg op[Elements(ir->operands)];
1328 st_src_reg result_src;
1329 st_dst_reg result_dst;
1330
1331 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1332 */
1333 if (ir->operation == ir_binop_add) {
1334 if (try_emit_mad(ir, 1))
1335 return;
1336 if (try_emit_mad(ir, 0))
1337 return;
1338 }
1339
1340 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1341 */
1342 if (ir->operation == ir_binop_logic_and) {
1343 if (try_emit_mad_for_and_not(ir, 1))
1344 return;
1345 if (try_emit_mad_for_and_not(ir, 0))
1346 return;
1347 }
1348
1349 if (try_emit_sat(ir))
1350 return;
1351
1352 if (ir->operation == ir_quadop_vector)
1353 assert(!"ir_quadop_vector should have been lowered");
1354
1355 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1356 this->result.file = PROGRAM_UNDEFINED;
1357 ir->operands[operand]->accept(this);
1358 if (this->result.file == PROGRAM_UNDEFINED) {
1359 printf("Failed to get tree for expression operand:\n");
1360 ir->operands[operand]->print();
1361 printf("\n");
1362 exit(1);
1363 }
1364 op[operand] = this->result;
1365
1366 /* Matrix expression operands should have been broken down to vector
1367 * operations already.
1368 */
1369 assert(!ir->operands[operand]->type->is_matrix());
1370 }
1371
1372 int vector_elements = ir->operands[0]->type->vector_elements;
1373 if (ir->operands[1]) {
1374 vector_elements = MAX2(vector_elements,
1375 ir->operands[1]->type->vector_elements);
1376 }
1377
1378 this->result.file = PROGRAM_UNDEFINED;
1379
1380 /* Storage for our result. Ideally for an assignment we'd be using
1381 * the actual storage for the result here, instead.
1382 */
1383 result_src = get_temp(ir->type);
1384 /* convenience for the emit functions below. */
1385 result_dst = st_dst_reg(result_src);
1386 /* Limit writes to the channels that will be used by result_src later.
1387 * This does limit this temp's use as a temporary for multi-instruction
1388 * sequences.
1389 */
1390 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1391
1392 switch (ir->operation) {
1393 case ir_unop_logic_not:
1394 if (result_dst.type != GLSL_TYPE_FLOAT)
1395 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1396 else {
1397 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1398 * older GPUs implement SEQ using multiple instructions (i915 uses two
1399 * SGE instructions and a MUL instruction). Since our logic values are
1400 * 0.0 and 1.0, 1-x also implements !x.
1401 */
1402 op[0].negate = ~op[0].negate;
1403 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1404 }
1405 break;
1406 case ir_unop_neg:
1407 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1408 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1409 else {
1410 op[0].negate = ~op[0].negate;
1411 result_src = op[0];
1412 }
1413 break;
1414 case ir_unop_abs:
1415 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1416 break;
1417 case ir_unop_sign:
1418 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1419 break;
1420 case ir_unop_rcp:
1421 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1422 break;
1423
1424 case ir_unop_exp2:
1425 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1426 break;
1427 case ir_unop_exp:
1428 case ir_unop_log:
1429 assert(!"not reached: should be handled by ir_explog_to_explog2");
1430 break;
1431 case ir_unop_log2:
1432 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1433 break;
1434 case ir_unop_sin:
1435 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1436 break;
1437 case ir_unop_cos:
1438 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1439 break;
1440 case ir_unop_sin_reduced:
1441 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1442 break;
1443 case ir_unop_cos_reduced:
1444 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1445 break;
1446
1447 case ir_unop_dFdx:
1448 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1449 break;
1450 case ir_unop_dFdy:
1451 {
1452 /* The X component contains 1 or -1 depending on whether the framebuffer
1453 * is a FBO or the window system buffer, respectively.
1454 * It is then multiplied with the source operand of DDY.
1455 */
1456 static const gl_state_index transform_y_state[STATE_LENGTH]
1457 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1458
1459 unsigned transform_y_index =
1460 _mesa_add_state_reference(this->prog->Parameters,
1461 transform_y_state);
1462
1463 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1464 transform_y_index,
1465 glsl_type::vec4_type);
1466 transform_y.swizzle = SWIZZLE_XXXX;
1467
1468 st_src_reg temp = get_temp(glsl_type::vec4_type);
1469
1470 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1471 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1472 break;
1473 }
1474
1475 case ir_unop_noise: {
1476 /* At some point, a motivated person could add a better
1477 * implementation of noise. Currently not even the nvidia
1478 * binary drivers do anything more than this. In any case, the
1479 * place to do this is in the GL state tracker, not the poor
1480 * driver.
1481 */
1482 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1483 break;
1484 }
1485
1486 case ir_binop_add:
1487 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1488 break;
1489 case ir_binop_sub:
1490 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1491 break;
1492
1493 case ir_binop_mul:
1494 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1495 break;
1496 case ir_binop_div:
1497 if (result_dst.type == GLSL_TYPE_FLOAT)
1498 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1499 else
1500 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1501 break;
1502 case ir_binop_mod:
1503 if (result_dst.type == GLSL_TYPE_FLOAT)
1504 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1505 else
1506 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1507 break;
1508
1509 case ir_binop_less:
1510 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1511 break;
1512 case ir_binop_greater:
1513 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1514 break;
1515 case ir_binop_lequal:
1516 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1517 break;
1518 case ir_binop_gequal:
1519 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1520 break;
1521 case ir_binop_equal:
1522 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1523 break;
1524 case ir_binop_nequal:
1525 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1526 break;
1527 case ir_binop_all_equal:
1528 /* "==" operator producing a scalar boolean. */
1529 if (ir->operands[0]->type->is_vector() ||
1530 ir->operands[1]->type->is_vector()) {
1531 st_src_reg temp = get_temp(native_integers ?
1532 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1533 glsl_type::vec4_type);
1534
1535 if (native_integers) {
1536 st_dst_reg temp_dst = st_dst_reg(temp);
1537 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1538
1539 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1540
1541 /* Emit 1-3 AND operations to combine the SEQ results. */
1542 switch (ir->operands[0]->type->vector_elements) {
1543 case 2:
1544 break;
1545 case 3:
1546 temp_dst.writemask = WRITEMASK_Y;
1547 temp1.swizzle = SWIZZLE_YYYY;
1548 temp2.swizzle = SWIZZLE_ZZZZ;
1549 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1550 break;
1551 case 4:
1552 temp_dst.writemask = WRITEMASK_X;
1553 temp1.swizzle = SWIZZLE_XXXX;
1554 temp2.swizzle = SWIZZLE_YYYY;
1555 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1556 temp_dst.writemask = WRITEMASK_Y;
1557 temp1.swizzle = SWIZZLE_ZZZZ;
1558 temp2.swizzle = SWIZZLE_WWWW;
1559 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1560 }
1561
1562 temp1.swizzle = SWIZZLE_XXXX;
1563 temp2.swizzle = SWIZZLE_YYYY;
1564 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1565 } else {
1566 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1567
1568 /* After the dot-product, the value will be an integer on the
1569 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1570 */
1571 emit_dp(ir, result_dst, temp, temp, vector_elements);
1572
1573 /* Negating the result of the dot-product gives values on the range
1574 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1575 * This is achieved using SGE.
1576 */
1577 st_src_reg sge_src = result_src;
1578 sge_src.negate = ~sge_src.negate;
1579 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1580 }
1581 } else {
1582 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1583 }
1584 break;
1585 case ir_binop_any_nequal:
1586 /* "!=" operator producing a scalar boolean. */
1587 if (ir->operands[0]->type->is_vector() ||
1588 ir->operands[1]->type->is_vector()) {
1589 st_src_reg temp = get_temp(native_integers ?
1590 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1591 glsl_type::vec4_type);
1592 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1593
1594 if (native_integers) {
1595 st_dst_reg temp_dst = st_dst_reg(temp);
1596 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1597
1598 /* Emit 1-3 OR operations to combine the SNE results. */
1599 switch (ir->operands[0]->type->vector_elements) {
1600 case 2:
1601 break;
1602 case 3:
1603 temp_dst.writemask = WRITEMASK_Y;
1604 temp1.swizzle = SWIZZLE_YYYY;
1605 temp2.swizzle = SWIZZLE_ZZZZ;
1606 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1607 break;
1608 case 4:
1609 temp_dst.writemask = WRITEMASK_X;
1610 temp1.swizzle = SWIZZLE_XXXX;
1611 temp2.swizzle = SWIZZLE_YYYY;
1612 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1613 temp_dst.writemask = WRITEMASK_Y;
1614 temp1.swizzle = SWIZZLE_ZZZZ;
1615 temp2.swizzle = SWIZZLE_WWWW;
1616 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1617 }
1618
1619 temp1.swizzle = SWIZZLE_XXXX;
1620 temp2.swizzle = SWIZZLE_YYYY;
1621 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1622 } else {
1623 /* After the dot-product, the value will be an integer on the
1624 * range [0,4]. Zero stays zero, and positive values become 1.0.
1625 */
1626 glsl_to_tgsi_instruction *const dp =
1627 emit_dp(ir, result_dst, temp, temp, vector_elements);
1628 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1629 /* The clamping to [0,1] can be done for free in the fragment
1630 * shader with a saturate.
1631 */
1632 dp->saturate = true;
1633 } else {
1634 /* Negating the result of the dot-product gives values on the range
1635 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1636 * achieved using SLT.
1637 */
1638 st_src_reg slt_src = result_src;
1639 slt_src.negate = ~slt_src.negate;
1640 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1641 }
1642 }
1643 } else {
1644 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1645 }
1646 break;
1647
1648 case ir_unop_any: {
1649 assert(ir->operands[0]->type->is_vector());
1650
1651 /* After the dot-product, the value will be an integer on the
1652 * range [0,4]. Zero stays zero, and positive values become 1.0.
1653 */
1654 glsl_to_tgsi_instruction *const dp =
1655 emit_dp(ir, result_dst, op[0], op[0],
1656 ir->operands[0]->type->vector_elements);
1657 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1658 result_dst.type == GLSL_TYPE_FLOAT) {
1659 /* The clamping to [0,1] can be done for free in the fragment
1660 * shader with a saturate.
1661 */
1662 dp->saturate = true;
1663 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1666 * is achieved using SLT.
1667 */
1668 st_src_reg slt_src = result_src;
1669 slt_src.negate = ~slt_src.negate;
1670 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1671 }
1672 else {
1673 /* Use SNE 0 if integers are being used as boolean values. */
1674 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1675 }
1676 break;
1677 }
1678
1679 case ir_binop_logic_xor:
1680 if (native_integers)
1681 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1682 else
1683 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1684 break;
1685
1686 case ir_binop_logic_or: {
1687 if (native_integers) {
1688 /* If integers are used as booleans, we can use an actual "or"
1689 * instruction.
1690 */
1691 assert(native_integers);
1692 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1693 } else {
1694 /* After the addition, the value will be an integer on the
1695 * range [0,2]. Zero stays zero, and positive values become 1.0.
1696 */
1697 glsl_to_tgsi_instruction *add =
1698 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1699 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate if floats are being used as boolean values.
1702 */
1703 add->saturate = true;
1704 } else {
1705 /* Negating the result of the addition gives values on the range
1706 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1708 */
1709 st_src_reg slt_src = result_src;
1710 slt_src.negate = ~slt_src.negate;
1711 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1712 }
1713 }
1714 break;
1715 }
1716
1717 case ir_binop_logic_and:
1718 /* If native integers are disabled, the bool args are stored as float 0.0
1719 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1720 * actual AND opcode.
1721 */
1722 if (native_integers)
1723 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1724 else
1725 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1726 break;
1727
1728 case ir_binop_dot:
1729 assert(ir->operands[0]->type->is_vector());
1730 assert(ir->operands[0]->type == ir->operands[1]->type);
1731 emit_dp(ir, result_dst, op[0], op[1],
1732 ir->operands[0]->type->vector_elements);
1733 break;
1734
1735 case ir_unop_sqrt:
1736 if (have_sqrt) {
1737 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1738 }
1739 else {
1740 /* sqrt(x) = x * rsq(x). */
1741 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1742 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1743 /* For incoming channels <= 0, set the result to 0. */
1744 op[0].negate = ~op[0].negate;
1745 emit(ir, TGSI_OPCODE_CMP, result_dst,
1746 op[0], result_src, st_src_reg_for_float(0.0));
1747 }
1748 break;
1749 case ir_unop_rsq:
1750 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1751 break;
1752 case ir_unop_i2f:
1753 if (native_integers) {
1754 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1755 break;
1756 }
1757 /* fallthrough to next case otherwise */
1758 case ir_unop_b2f:
1759 if (native_integers) {
1760 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1761 break;
1762 }
1763 /* fallthrough to next case otherwise */
1764 case ir_unop_i2u:
1765 case ir_unop_u2i:
1766 /* Converting between signed and unsigned integers is a no-op. */
1767 result_src = op[0];
1768 break;
1769 case ir_unop_b2i:
1770 if (native_integers) {
1771 /* Booleans are stored as integers using ~0 for true and 0 for false.
1772 * GLSL requires that int(bool) return 1 for true and 0 for false.
1773 * This conversion is done with AND, but it could be done with NEG.
1774 */
1775 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1776 } else {
1777 /* Booleans and integers are both stored as floats when native
1778 * integers are disabled.
1779 */
1780 result_src = op[0];
1781 }
1782 break;
1783 case ir_unop_f2i:
1784 if (native_integers)
1785 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1786 else
1787 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1788 break;
1789 case ir_unop_f2u:
1790 if (native_integers)
1791 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1792 else
1793 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1794 break;
1795 case ir_unop_bitcast_f2i:
1796 result_src = op[0];
1797 result_src.type = GLSL_TYPE_INT;
1798 break;
1799 case ir_unop_bitcast_f2u:
1800 result_src = op[0];
1801 result_src.type = GLSL_TYPE_UINT;
1802 break;
1803 case ir_unop_bitcast_i2f:
1804 case ir_unop_bitcast_u2f:
1805 result_src = op[0];
1806 result_src.type = GLSL_TYPE_FLOAT;
1807 break;
1808 case ir_unop_f2b:
1809 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1810 break;
1811 case ir_unop_i2b:
1812 if (native_integers)
1813 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1814 else
1815 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1816 break;
1817 case ir_unop_trunc:
1818 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1819 break;
1820 case ir_unop_ceil:
1821 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1822 break;
1823 case ir_unop_floor:
1824 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1825 break;
1826 case ir_unop_round_even:
1827 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1828 break;
1829 case ir_unop_fract:
1830 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1831 break;
1832
1833 case ir_binop_min:
1834 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1835 break;
1836 case ir_binop_max:
1837 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1838 break;
1839 case ir_binop_pow:
1840 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1841 break;
1842
1843 case ir_unop_bit_not:
1844 if (native_integers) {
1845 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1846 break;
1847 }
1848 case ir_unop_u2f:
1849 if (native_integers) {
1850 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1851 break;
1852 }
1853 case ir_binop_lshift:
1854 if (native_integers) {
1855 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1856 break;
1857 }
1858 case ir_binop_rshift:
1859 if (native_integers) {
1860 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1861 break;
1862 }
1863 case ir_binop_bit_and:
1864 if (native_integers) {
1865 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1866 break;
1867 }
1868 case ir_binop_bit_xor:
1869 if (native_integers) {
1870 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1871 break;
1872 }
1873 case ir_binop_bit_or:
1874 if (native_integers) {
1875 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1876 break;
1877 }
1878
1879 assert(!"GLSL 1.30 features unsupported");
1880 break;
1881
1882 case ir_binop_ubo_load: {
1883 ir_constant *uniform_block = ir->operands[0]->as_constant();
1884 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1885 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1886 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1887 st_src_reg cbuf;
1888
1889 cbuf.type = glsl_type::vec4_type->base_type;
1890 cbuf.file = PROGRAM_CONSTANT;
1891 cbuf.index = 0;
1892 cbuf.index2D = uniform_block->value.u[0] + 1;
1893 cbuf.reladdr = NULL;
1894 cbuf.negate = 0;
1895
1896 assert(ir->type->is_vector() || ir->type->is_scalar());
1897
1898 if (const_offset_ir) {
1899 index_reg = st_src_reg_for_int(const_offset / 16);
1900 } else {
1901 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1902 }
1903
1904 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1905 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1906 const_offset % 16 / 4,
1907 const_offset % 16 / 4,
1908 const_offset % 16 / 4);
1909
1910 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1911 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1912
1913 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1914 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1915 } else {
1916 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1917 }
1918 break;
1919 }
1920 case ir_triop_lrp:
1921 /* note: we have to reorder the three args here */
1922 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1923 break;
1924 case ir_triop_csel:
1925 if (this->ctx->Const.NativeIntegers)
1926 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1927 else {
1928 op[0].negate = ~op[0].negate;
1929 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1930 }
1931 break;
1932 case ir_unop_pack_snorm_2x16:
1933 case ir_unop_pack_unorm_2x16:
1934 case ir_unop_pack_half_2x16:
1935 case ir_unop_pack_snorm_4x8:
1936 case ir_unop_pack_unorm_4x8:
1937 case ir_unop_unpack_snorm_2x16:
1938 case ir_unop_unpack_unorm_2x16:
1939 case ir_unop_unpack_half_2x16:
1940 case ir_unop_unpack_half_2x16_split_x:
1941 case ir_unop_unpack_half_2x16_split_y:
1942 case ir_unop_unpack_snorm_4x8:
1943 case ir_unop_unpack_unorm_4x8:
1944 case ir_binop_pack_half_2x16_split:
1945 case ir_unop_bitfield_reverse:
1946 case ir_unop_bit_count:
1947 case ir_unop_find_msb:
1948 case ir_unop_find_lsb:
1949 case ir_binop_bfm:
1950 case ir_triop_fma:
1951 case ir_triop_bfi:
1952 case ir_triop_bitfield_extract:
1953 case ir_quadop_bitfield_insert:
1954 case ir_quadop_vector:
1955 case ir_binop_vector_extract:
1956 case ir_triop_vector_insert:
1957 case ir_binop_ldexp:
1958 case ir_binop_carry:
1959 case ir_binop_borrow:
1960 case ir_binop_imul_high:
1961 /* This operation is not supported, or should have already been handled.
1962 */
1963 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1964 break;
1965 }
1966
1967 this->result = result_src;
1968 }
1969
1970
1971 void
1972 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1973 {
1974 st_src_reg src;
1975 int i;
1976 int swizzle[4];
1977
1978 /* Note that this is only swizzles in expressions, not those on the left
1979 * hand side of an assignment, which do write masking. See ir_assignment
1980 * for that.
1981 */
1982
1983 ir->val->accept(this);
1984 src = this->result;
1985 assert(src.file != PROGRAM_UNDEFINED);
1986
1987 for (i = 0; i < 4; i++) {
1988 if (i < ir->type->vector_elements) {
1989 switch (i) {
1990 case 0:
1991 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1992 break;
1993 case 1:
1994 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1995 break;
1996 case 2:
1997 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1998 break;
1999 case 3:
2000 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2001 break;
2002 }
2003 } else {
2004 /* If the type is smaller than a vec4, replicate the last
2005 * channel out.
2006 */
2007 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2008 }
2009 }
2010
2011 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2012
2013 this->result = src;
2014 }
2015
2016 void
2017 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2018 {
2019 variable_storage *entry = find_variable_storage(ir->var);
2020 ir_variable *var = ir->var;
2021
2022 if (!entry) {
2023 switch (var->data.mode) {
2024 case ir_var_uniform:
2025 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2026 var->location);
2027 this->variables.push_tail(entry);
2028 break;
2029 case ir_var_shader_in:
2030 /* The linker assigns locations for varyings and attributes,
2031 * including deprecated builtins (like gl_Color), user-assign
2032 * generic attributes (glBindVertexLocation), and
2033 * user-defined varyings.
2034 */
2035 assert(var->location != -1);
2036 entry = new(mem_ctx) variable_storage(var,
2037 PROGRAM_INPUT,
2038 var->location);
2039 break;
2040 case ir_var_shader_out:
2041 assert(var->location != -1);
2042 entry = new(mem_ctx) variable_storage(var,
2043 PROGRAM_OUTPUT,
2044 var->location + var->index);
2045 break;
2046 case ir_var_system_value:
2047 entry = new(mem_ctx) variable_storage(var,
2048 PROGRAM_SYSTEM_VALUE,
2049 var->location);
2050 break;
2051 case ir_var_auto:
2052 case ir_var_temporary:
2053 st_src_reg src = get_temp(var->type);
2054
2055 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2056 this->variables.push_tail(entry);
2057
2058 break;
2059 }
2060
2061 if (!entry) {
2062 printf("Failed to make storage for %s\n", var->name);
2063 exit(1);
2064 }
2065 }
2066
2067 this->result = st_src_reg(entry->file, entry->index, var->type);
2068 if (!native_integers)
2069 this->result.type = GLSL_TYPE_FLOAT;
2070 }
2071
2072 void
2073 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2074 {
2075 ir_constant *index;
2076 st_src_reg src;
2077 int element_size = type_size(ir->type);
2078 bool is_2D_input;
2079
2080 index = ir->array_index->constant_expression_value();
2081
2082 ir->array->accept(this);
2083 src = this->result;
2084
2085 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2086 src.file == PROGRAM_INPUT &&
2087 ir->array->ir_type != ir_type_dereference_array;
2088
2089 if (is_2D_input)
2090 element_size = 1;
2091
2092 if (index) {
2093 if (is_2D_input) {
2094 src.index2D = index->value.i[0];
2095 src.has_index2 = true;
2096 } else
2097 src.index += index->value.i[0] * element_size;
2098 } else {
2099 /* Variable index array dereference. It eats the "vec4" of the
2100 * base of the array and an index that offsets the TGSI register
2101 * index.
2102 */
2103 ir->array_index->accept(this);
2104
2105 st_src_reg index_reg;
2106
2107 if (element_size == 1) {
2108 index_reg = this->result;
2109 } else {
2110 index_reg = get_temp(native_integers ?
2111 glsl_type::int_type : glsl_type::float_type);
2112
2113 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2114 this->result, st_src_reg_for_type(index_reg.type, element_size));
2115 }
2116
2117 /* If there was already a relative address register involved, add the
2118 * new and the old together to get the new offset.
2119 */
2120 if (!is_2D_input && src.reladdr != NULL) {
2121 st_src_reg accum_reg = get_temp(native_integers ?
2122 glsl_type::int_type : glsl_type::float_type);
2123
2124 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2125 index_reg, *src.reladdr);
2126
2127 index_reg = accum_reg;
2128 }
2129
2130 if (is_2D_input) {
2131 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2132 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2133 src.index2D = 0;
2134 src.has_index2 = true;
2135 } else {
2136 src.reladdr = ralloc(mem_ctx, st_src_reg);
2137 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2138 }
2139 }
2140
2141 /* If the type is smaller than a vec4, replicate the last channel out. */
2142 if (ir->type->is_scalar() || ir->type->is_vector())
2143 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2144 else
2145 src.swizzle = SWIZZLE_NOOP;
2146
2147 /* Change the register type to the element type of the array. */
2148 src.type = ir->type->base_type;
2149
2150 this->result = src;
2151 }
2152
2153 void
2154 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2155 {
2156 unsigned int i;
2157 const glsl_type *struct_type = ir->record->type;
2158 int offset = 0;
2159
2160 ir->record->accept(this);
2161
2162 for (i = 0; i < struct_type->length; i++) {
2163 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2164 break;
2165 offset += type_size(struct_type->fields.structure[i].type);
2166 }
2167
2168 /* If the type is smaller than a vec4, replicate the last channel out. */
2169 if (ir->type->is_scalar() || ir->type->is_vector())
2170 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2171 else
2172 this->result.swizzle = SWIZZLE_NOOP;
2173
2174 this->result.index += offset;
2175 this->result.type = ir->type->base_type;
2176 }
2177
2178 /**
2179 * We want to be careful in assignment setup to hit the actual storage
2180 * instead of potentially using a temporary like we might with the
2181 * ir_dereference handler.
2182 */
2183 static st_dst_reg
2184 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2185 {
2186 /* The LHS must be a dereference. If the LHS is a variable indexed array
2187 * access of a vector, it must be separated into a series conditional moves
2188 * before reaching this point (see ir_vec_index_to_cond_assign).
2189 */
2190 assert(ir->as_dereference());
2191 ir_dereference_array *deref_array = ir->as_dereference_array();
2192 if (deref_array) {
2193 assert(!deref_array->array->type->is_vector());
2194 }
2195
2196 /* Use the rvalue deref handler for the most part. We'll ignore
2197 * swizzles in it and write swizzles using writemask, though.
2198 */
2199 ir->accept(v);
2200 return st_dst_reg(v->result);
2201 }
2202
2203 /**
2204 * Process the condition of a conditional assignment
2205 *
2206 * Examines the condition of a conditional assignment to generate the optimal
2207 * first operand of a \c CMP instruction. If the condition is a relational
2208 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2209 * used as the source for the \c CMP instruction. Otherwise the comparison
2210 * is processed to a boolean result, and the boolean result is used as the
2211 * operand to the CMP instruction.
2212 */
2213 bool
2214 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2215 {
2216 ir_rvalue *src_ir = ir;
2217 bool negate = true;
2218 bool switch_order = false;
2219
2220 ir_expression *const expr = ir->as_expression();
2221 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2222 bool zero_on_left = false;
2223
2224 if (expr->operands[0]->is_zero()) {
2225 src_ir = expr->operands[1];
2226 zero_on_left = true;
2227 } else if (expr->operands[1]->is_zero()) {
2228 src_ir = expr->operands[0];
2229 zero_on_left = false;
2230 }
2231
2232 /* a is - 0 + - 0 +
2233 * (a < 0) T F F ( a < 0) T F F
2234 * (0 < a) F F T (-a < 0) F F T
2235 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2236 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2237 * (a > 0) F F T (-a < 0) F F T
2238 * (0 > a) T F F ( a < 0) T F F
2239 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2240 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2241 *
2242 * Note that exchanging the order of 0 and 'a' in the comparison simply
2243 * means that the value of 'a' should be negated.
2244 */
2245 if (src_ir != ir) {
2246 switch (expr->operation) {
2247 case ir_binop_less:
2248 switch_order = false;
2249 negate = zero_on_left;
2250 break;
2251
2252 case ir_binop_greater:
2253 switch_order = false;
2254 negate = !zero_on_left;
2255 break;
2256
2257 case ir_binop_lequal:
2258 switch_order = true;
2259 negate = !zero_on_left;
2260 break;
2261
2262 case ir_binop_gequal:
2263 switch_order = true;
2264 negate = zero_on_left;
2265 break;
2266
2267 default:
2268 /* This isn't the right kind of comparison afterall, so make sure
2269 * the whole condition is visited.
2270 */
2271 src_ir = ir;
2272 break;
2273 }
2274 }
2275 }
2276
2277 src_ir->accept(this);
2278
2279 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2280 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2281 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2282 * computing the condition.
2283 */
2284 if (negate)
2285 this->result.negate = ~this->result.negate;
2286
2287 return switch_order;
2288 }
2289
2290 void
2291 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2292 st_dst_reg *l, st_src_reg *r)
2293 {
2294 if (type->base_type == GLSL_TYPE_STRUCT) {
2295 for (unsigned int i = 0; i < type->length; i++) {
2296 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2297 }
2298 return;
2299 }
2300
2301 if (type->is_array()) {
2302 for (unsigned int i = 0; i < type->length; i++) {
2303 emit_block_mov(ir, type->fields.array, l, r);
2304 }
2305 return;
2306 }
2307
2308 if (type->is_matrix()) {
2309 const struct glsl_type *vec_type;
2310
2311 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2312 type->vector_elements, 1);
2313
2314 for (int i = 0; i < type->matrix_columns; i++) {
2315 emit_block_mov(ir, vec_type, l, r);
2316 }
2317 return;
2318 }
2319
2320 assert(type->is_scalar() || type->is_vector());
2321
2322 r->type = type->base_type;
2323 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2324 l->index++;
2325 r->index++;
2326 }
2327
2328 void
2329 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2330 {
2331 st_dst_reg l;
2332 st_src_reg r;
2333 int i;
2334
2335 ir->rhs->accept(this);
2336 r = this->result;
2337
2338 l = get_assignment_lhs(ir->lhs, this);
2339
2340 /* FINISHME: This should really set to the correct maximal writemask for each
2341 * FINISHME: component written (in the loops below). This case can only
2342 * FINISHME: occur for matrices, arrays, and structures.
2343 */
2344 if (ir->write_mask == 0) {
2345 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2346 l.writemask = WRITEMASK_XYZW;
2347 } else if (ir->lhs->type->is_scalar() &&
2348 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2349 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2350 * FINISHME: W component of fragment shader output zero, work correctly.
2351 */
2352 l.writemask = WRITEMASK_XYZW;
2353 } else {
2354 int swizzles[4];
2355 int first_enabled_chan = 0;
2356 int rhs_chan = 0;
2357
2358 l.writemask = ir->write_mask;
2359
2360 for (int i = 0; i < 4; i++) {
2361 if (l.writemask & (1 << i)) {
2362 first_enabled_chan = GET_SWZ(r.swizzle, i);
2363 break;
2364 }
2365 }
2366
2367 /* Swizzle a small RHS vector into the channels being written.
2368 *
2369 * glsl ir treats write_mask as dictating how many channels are
2370 * present on the RHS while TGSI treats write_mask as just
2371 * showing which channels of the vec4 RHS get written.
2372 */
2373 for (int i = 0; i < 4; i++) {
2374 if (l.writemask & (1 << i))
2375 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2376 else
2377 swizzles[i] = first_enabled_chan;
2378 }
2379 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2380 swizzles[2], swizzles[3]);
2381 }
2382
2383 assert(l.file != PROGRAM_UNDEFINED);
2384 assert(r.file != PROGRAM_UNDEFINED);
2385
2386 if (ir->condition) {
2387 const bool switch_order = this->process_move_condition(ir->condition);
2388 st_src_reg condition = this->result;
2389
2390 for (i = 0; i < type_size(ir->lhs->type); i++) {
2391 st_src_reg l_src = st_src_reg(l);
2392 st_src_reg condition_temp = condition;
2393 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2394
2395 if (native_integers) {
2396 /* This is necessary because TGSI's CMP instruction expects the
2397 * condition to be a float, and we store booleans as integers.
2398 * TODO: really want to avoid i2f path and use UCMP. Requires
2399 * changes to process_move_condition though too.
2400 */
2401 condition_temp = get_temp(glsl_type::vec4_type);
2402 condition.negate = 0;
2403 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2404 condition_temp.swizzle = condition.swizzle;
2405 }
2406
2407 if (switch_order) {
2408 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2409 } else {
2410 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2411 }
2412
2413 l.index++;
2414 r.index++;
2415 }
2416 } else if (ir->rhs->as_expression() &&
2417 this->instructions.get_tail() &&
2418 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2419 type_size(ir->lhs->type) == 1 &&
2420 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2421 /* To avoid emitting an extra MOV when assigning an expression to a
2422 * variable, emit the last instruction of the expression again, but
2423 * replace the destination register with the target of the assignment.
2424 * Dead code elimination will remove the original instruction.
2425 */
2426 glsl_to_tgsi_instruction *inst, *new_inst;
2427 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2428 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2429 new_inst->saturate = inst->saturate;
2430 inst->dead_mask = inst->dst.writemask;
2431 } else {
2432 emit_block_mov(ir, ir->rhs->type, &l, &r);
2433 }
2434 }
2435
2436
2437 void
2438 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2439 {
2440 st_src_reg src;
2441 GLfloat stack_vals[4] = { 0 };
2442 gl_constant_value *values = (gl_constant_value *) stack_vals;
2443 GLenum gl_type = GL_NONE;
2444 unsigned int i;
2445 static int in_array = 0;
2446 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2447
2448 /* Unfortunately, 4 floats is all we can get into
2449 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2450 * aggregate constant and move each constant value into it. If we
2451 * get lucky, copy propagation will eliminate the extra moves.
2452 */
2453 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2454 st_src_reg temp_base = get_temp(ir->type);
2455 st_dst_reg temp = st_dst_reg(temp_base);
2456
2457 foreach_iter(exec_list_iterator, iter, ir->components) {
2458 ir_constant *field_value = (ir_constant *)iter.get();
2459 int size = type_size(field_value->type);
2460
2461 assert(size > 0);
2462
2463 field_value->accept(this);
2464 src = this->result;
2465
2466 for (i = 0; i < (unsigned int)size; i++) {
2467 emit(ir, TGSI_OPCODE_MOV, temp, src);
2468
2469 src.index++;
2470 temp.index++;
2471 }
2472 }
2473 this->result = temp_base;
2474 return;
2475 }
2476
2477 if (ir->type->is_array()) {
2478 st_src_reg temp_base = get_temp(ir->type);
2479 st_dst_reg temp = st_dst_reg(temp_base);
2480 int size = type_size(ir->type->fields.array);
2481
2482 assert(size > 0);
2483 in_array++;
2484
2485 for (i = 0; i < ir->type->length; i++) {
2486 ir->array_elements[i]->accept(this);
2487 src = this->result;
2488 for (int j = 0; j < size; j++) {
2489 emit(ir, TGSI_OPCODE_MOV, temp, src);
2490
2491 src.index++;
2492 temp.index++;
2493 }
2494 }
2495 this->result = temp_base;
2496 in_array--;
2497 return;
2498 }
2499
2500 if (ir->type->is_matrix()) {
2501 st_src_reg mat = get_temp(ir->type);
2502 st_dst_reg mat_column = st_dst_reg(mat);
2503
2504 for (i = 0; i < ir->type->matrix_columns; i++) {
2505 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2506 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2507
2508 src = st_src_reg(file, -1, ir->type->base_type);
2509 src.index = add_constant(file,
2510 values,
2511 ir->type->vector_elements,
2512 GL_FLOAT,
2513 &src.swizzle);
2514 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2515
2516 mat_column.index++;
2517 }
2518
2519 this->result = mat;
2520 return;
2521 }
2522
2523 switch (ir->type->base_type) {
2524 case GLSL_TYPE_FLOAT:
2525 gl_type = GL_FLOAT;
2526 for (i = 0; i < ir->type->vector_elements; i++) {
2527 values[i].f = ir->value.f[i];
2528 }
2529 break;
2530 case GLSL_TYPE_UINT:
2531 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2532 for (i = 0; i < ir->type->vector_elements; i++) {
2533 if (native_integers)
2534 values[i].u = ir->value.u[i];
2535 else
2536 values[i].f = ir->value.u[i];
2537 }
2538 break;
2539 case GLSL_TYPE_INT:
2540 gl_type = native_integers ? GL_INT : GL_FLOAT;
2541 for (i = 0; i < ir->type->vector_elements; i++) {
2542 if (native_integers)
2543 values[i].i = ir->value.i[i];
2544 else
2545 values[i].f = ir->value.i[i];
2546 }
2547 break;
2548 case GLSL_TYPE_BOOL:
2549 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2550 for (i = 0; i < ir->type->vector_elements; i++) {
2551 if (native_integers)
2552 values[i].u = ir->value.b[i] ? ~0 : 0;
2553 else
2554 values[i].f = ir->value.b[i];
2555 }
2556 break;
2557 default:
2558 assert(!"Non-float/uint/int/bool constant");
2559 }
2560
2561 this->result = st_src_reg(file, -1, ir->type);
2562 this->result.index = add_constant(file,
2563 values,
2564 ir->type->vector_elements,
2565 gl_type,
2566 &this->result.swizzle);
2567 }
2568
2569 function_entry *
2570 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2571 {
2572 function_entry *entry;
2573
2574 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2575 entry = (function_entry *)iter.get();
2576
2577 if (entry->sig == sig)
2578 return entry;
2579 }
2580
2581 entry = ralloc(mem_ctx, function_entry);
2582 entry->sig = sig;
2583 entry->sig_id = this->next_signature_id++;
2584 entry->bgn_inst = NULL;
2585
2586 /* Allocate storage for all the parameters. */
2587 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2588 ir_variable *param = (ir_variable *)iter.get();
2589 variable_storage *storage;
2590
2591 storage = find_variable_storage(param);
2592 assert(!storage);
2593
2594 st_src_reg src = get_temp(param->type);
2595
2596 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2597 this->variables.push_tail(storage);
2598 }
2599
2600 if (!sig->return_type->is_void()) {
2601 entry->return_reg = get_temp(sig->return_type);
2602 } else {
2603 entry->return_reg = undef_src;
2604 }
2605
2606 this->function_signatures.push_tail(entry);
2607 return entry;
2608 }
2609
2610 void
2611 glsl_to_tgsi_visitor::visit(ir_call *ir)
2612 {
2613 glsl_to_tgsi_instruction *call_inst;
2614 ir_function_signature *sig = ir->callee;
2615 function_entry *entry = get_function_signature(sig);
2616 int i;
2617
2618 /* Process in parameters. */
2619 exec_list_iterator sig_iter = sig->parameters.iterator();
2620 foreach_iter(exec_list_iterator, iter, *ir) {
2621 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2622 ir_variable *param = (ir_variable *)sig_iter.get();
2623
2624 if (param->data.mode == ir_var_function_in ||
2625 param->data.mode == ir_var_function_inout) {
2626 variable_storage *storage = find_variable_storage(param);
2627 assert(storage);
2628
2629 param_rval->accept(this);
2630 st_src_reg r = this->result;
2631
2632 st_dst_reg l;
2633 l.file = storage->file;
2634 l.index = storage->index;
2635 l.reladdr = NULL;
2636 l.writemask = WRITEMASK_XYZW;
2637 l.cond_mask = COND_TR;
2638
2639 for (i = 0; i < type_size(param->type); i++) {
2640 emit(ir, TGSI_OPCODE_MOV, l, r);
2641 l.index++;
2642 r.index++;
2643 }
2644 }
2645
2646 sig_iter.next();
2647 }
2648 assert(!sig_iter.has_next());
2649
2650 /* Emit call instruction */
2651 call_inst = emit(ir, TGSI_OPCODE_CAL);
2652 call_inst->function = entry;
2653
2654 /* Process out parameters. */
2655 sig_iter = sig->parameters.iterator();
2656 foreach_iter(exec_list_iterator, iter, *ir) {
2657 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2658 ir_variable *param = (ir_variable *)sig_iter.get();
2659
2660 if (param->data.mode == ir_var_function_out ||
2661 param->data.mode == ir_var_function_inout) {
2662 variable_storage *storage = find_variable_storage(param);
2663 assert(storage);
2664
2665 st_src_reg r;
2666 r.file = storage->file;
2667 r.index = storage->index;
2668 r.reladdr = NULL;
2669 r.swizzle = SWIZZLE_NOOP;
2670 r.negate = 0;
2671
2672 param_rval->accept(this);
2673 st_dst_reg l = st_dst_reg(this->result);
2674
2675 for (i = 0; i < type_size(param->type); i++) {
2676 emit(ir, TGSI_OPCODE_MOV, l, r);
2677 l.index++;
2678 r.index++;
2679 }
2680 }
2681
2682 sig_iter.next();
2683 }
2684 assert(!sig_iter.has_next());
2685
2686 /* Process return value. */
2687 this->result = entry->return_reg;
2688 }
2689
2690 void
2691 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2692 {
2693 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset, sample_index;
2694 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2695 glsl_to_tgsi_instruction *inst = NULL;
2696 unsigned opcode = TGSI_OPCODE_NOP;
2697 const glsl_type *sampler_type = ir->sampler->type;
2698 bool is_cube_array = false;
2699
2700 /* if we are a cube array sampler */
2701 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2702 sampler_type->sampler_array)) {
2703 is_cube_array = true;
2704 }
2705
2706 if (ir->coordinate) {
2707 ir->coordinate->accept(this);
2708
2709 /* Put our coords in a temp. We'll need to modify them for shadow,
2710 * projection, or LOD, so the only case we'd use it as is is if
2711 * we're doing plain old texturing. The optimization passes on
2712 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2713 */
2714 coord = get_temp(glsl_type::vec4_type);
2715 coord_dst = st_dst_reg(coord);
2716 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2717 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2718 }
2719
2720 if (ir->projector) {
2721 ir->projector->accept(this);
2722 projector = this->result;
2723 }
2724
2725 /* Storage for our result. Ideally for an assignment we'd be using
2726 * the actual storage for the result here, instead.
2727 */
2728 result_src = get_temp(ir->type);
2729 result_dst = st_dst_reg(result_src);
2730
2731 switch (ir->op) {
2732 case ir_tex:
2733 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2734 if (ir->offset) {
2735 ir->offset->accept(this);
2736 offset = this->result;
2737 }
2738 break;
2739 case ir_txb:
2740 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2741 ir->lod_info.bias->accept(this);
2742 lod_info = this->result;
2743 if (ir->offset) {
2744 ir->offset->accept(this);
2745 offset = this->result;
2746 }
2747 break;
2748 case ir_txl:
2749 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2750 ir->lod_info.lod->accept(this);
2751 lod_info = this->result;
2752 if (ir->offset) {
2753 ir->offset->accept(this);
2754 offset = this->result;
2755 }
2756 break;
2757 case ir_txd:
2758 opcode = TGSI_OPCODE_TXD;
2759 ir->lod_info.grad.dPdx->accept(this);
2760 dx = this->result;
2761 ir->lod_info.grad.dPdy->accept(this);
2762 dy = this->result;
2763 if (ir->offset) {
2764 ir->offset->accept(this);
2765 offset = this->result;
2766 }
2767 break;
2768 case ir_txs:
2769 opcode = TGSI_OPCODE_TXQ;
2770 ir->lod_info.lod->accept(this);
2771 lod_info = this->result;
2772 break;
2773 case ir_txf:
2774 opcode = TGSI_OPCODE_TXF;
2775 ir->lod_info.lod->accept(this);
2776 lod_info = this->result;
2777 if (ir->offset) {
2778 ir->offset->accept(this);
2779 offset = this->result;
2780 }
2781 break;
2782 case ir_txf_ms:
2783 opcode = TGSI_OPCODE_TXF;
2784 ir->lod_info.sample_index->accept(this);
2785 sample_index = this->result;
2786 break;
2787 case ir_lod:
2788 assert(!"Unexpected ir_lod opcode");
2789 break;
2790 case ir_tg4:
2791 assert(!"Unexpected ir_tg4 opcode");
2792 break;
2793 case ir_query_levels:
2794 assert(!"Unexpected ir_query_levels opcode");
2795 break;
2796 }
2797
2798 if (ir->projector) {
2799 if (opcode == TGSI_OPCODE_TEX) {
2800 /* Slot the projector in as the last component of the coord. */
2801 coord_dst.writemask = WRITEMASK_W;
2802 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2803 coord_dst.writemask = WRITEMASK_XYZW;
2804 opcode = TGSI_OPCODE_TXP;
2805 } else {
2806 st_src_reg coord_w = coord;
2807 coord_w.swizzle = SWIZZLE_WWWW;
2808
2809 /* For the other TEX opcodes there's no projective version
2810 * since the last slot is taken up by LOD info. Do the
2811 * projective divide now.
2812 */
2813 coord_dst.writemask = WRITEMASK_W;
2814 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2815
2816 /* In the case where we have to project the coordinates "by hand,"
2817 * the shadow comparator value must also be projected.
2818 */
2819 st_src_reg tmp_src = coord;
2820 if (ir->shadow_comparitor) {
2821 /* Slot the shadow value in as the second to last component of the
2822 * coord.
2823 */
2824 ir->shadow_comparitor->accept(this);
2825
2826 tmp_src = get_temp(glsl_type::vec4_type);
2827 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2828
2829 /* Projective division not allowed for array samplers. */
2830 assert(!sampler_type->sampler_array);
2831
2832 tmp_dst.writemask = WRITEMASK_Z;
2833 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2834
2835 tmp_dst.writemask = WRITEMASK_XY;
2836 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2837 }
2838
2839 coord_dst.writemask = WRITEMASK_XYZ;
2840 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2841
2842 coord_dst.writemask = WRITEMASK_XYZW;
2843 coord.swizzle = SWIZZLE_XYZW;
2844 }
2845 }
2846
2847 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2848 * comparator was put in the correct place (and projected) by the code,
2849 * above, that handles by-hand projection.
2850 */
2851 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2852 /* Slot the shadow value in as the second to last component of the
2853 * coord.
2854 */
2855 ir->shadow_comparitor->accept(this);
2856
2857 if (is_cube_array) {
2858 cube_sc = get_temp(glsl_type::float_type);
2859 cube_sc_dst = st_dst_reg(cube_sc);
2860 cube_sc_dst.writemask = WRITEMASK_X;
2861 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2862 cube_sc_dst.writemask = WRITEMASK_X;
2863 }
2864 else {
2865 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2866 sampler_type->sampler_array) ||
2867 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2868 coord_dst.writemask = WRITEMASK_W;
2869 } else {
2870 coord_dst.writemask = WRITEMASK_Z;
2871 }
2872
2873 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2874 coord_dst.writemask = WRITEMASK_XYZW;
2875 }
2876 }
2877
2878 if (ir->op == ir_txf_ms) {
2879 coord_dst.writemask = WRITEMASK_W;
2880 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2881 coord_dst.writemask = WRITEMASK_XYZW;
2882 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2883 opcode == TGSI_OPCODE_TXF) {
2884 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2885 coord_dst.writemask = WRITEMASK_W;
2886 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2887 coord_dst.writemask = WRITEMASK_XYZW;
2888 }
2889
2890 if (opcode == TGSI_OPCODE_TXD)
2891 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2892 else if (opcode == TGSI_OPCODE_TXQ)
2893 inst = emit(ir, opcode, result_dst, lod_info);
2894 else if (opcode == TGSI_OPCODE_TXF) {
2895 inst = emit(ir, opcode, result_dst, coord);
2896 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2897 inst = emit(ir, opcode, result_dst, coord, lod_info);
2898 } else if (opcode == TGSI_OPCODE_TEX2) {
2899 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2900 } else
2901 inst = emit(ir, opcode, result_dst, coord);
2902
2903 if (ir->shadow_comparitor)
2904 inst->tex_shadow = GL_TRUE;
2905
2906 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2907 this->shader_program,
2908 this->prog);
2909
2910 if (ir->offset) {
2911 inst->tex_offset_num_offset = 1;
2912 inst->tex_offsets[0].Index = offset.index;
2913 inst->tex_offsets[0].File = offset.file;
2914 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2915 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2916 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2917 }
2918
2919 switch (sampler_type->sampler_dimensionality) {
2920 case GLSL_SAMPLER_DIM_1D:
2921 inst->tex_target = (sampler_type->sampler_array)
2922 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2923 break;
2924 case GLSL_SAMPLER_DIM_2D:
2925 inst->tex_target = (sampler_type->sampler_array)
2926 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2927 break;
2928 case GLSL_SAMPLER_DIM_3D:
2929 inst->tex_target = TEXTURE_3D_INDEX;
2930 break;
2931 case GLSL_SAMPLER_DIM_CUBE:
2932 inst->tex_target = (sampler_type->sampler_array)
2933 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2934 break;
2935 case GLSL_SAMPLER_DIM_RECT:
2936 inst->tex_target = TEXTURE_RECT_INDEX;
2937 break;
2938 case GLSL_SAMPLER_DIM_BUF:
2939 inst->tex_target = TEXTURE_BUFFER_INDEX;
2940 break;
2941 case GLSL_SAMPLER_DIM_EXTERNAL:
2942 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2943 break;
2944 case GLSL_SAMPLER_DIM_MS:
2945 inst->tex_target = (sampler_type->sampler_array)
2946 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
2947 break;
2948 default:
2949 assert(!"Should not get here.");
2950 }
2951
2952 this->result = result_src;
2953 }
2954
2955 void
2956 glsl_to_tgsi_visitor::visit(ir_return *ir)
2957 {
2958 if (ir->get_value()) {
2959 st_dst_reg l;
2960 int i;
2961
2962 assert(current_function);
2963
2964 ir->get_value()->accept(this);
2965 st_src_reg r = this->result;
2966
2967 l = st_dst_reg(current_function->return_reg);
2968
2969 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2970 emit(ir, TGSI_OPCODE_MOV, l, r);
2971 l.index++;
2972 r.index++;
2973 }
2974 }
2975
2976 emit(ir, TGSI_OPCODE_RET);
2977 }
2978
2979 void
2980 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2981 {
2982 if (ir->condition) {
2983 ir->condition->accept(this);
2984 this->result.negate = ~this->result.negate;
2985 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
2986 } else {
2987 /* unconditional kil */
2988 emit(ir, TGSI_OPCODE_KILL);
2989 }
2990 }
2991
2992 void
2993 glsl_to_tgsi_visitor::visit(ir_if *ir)
2994 {
2995 unsigned if_opcode;
2996 glsl_to_tgsi_instruction *if_inst;
2997
2998 ir->condition->accept(this);
2999 assert(this->result.file != PROGRAM_UNDEFINED);
3000
3001 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3002
3003 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3004
3005 this->instructions.push_tail(if_inst);
3006
3007 visit_exec_list(&ir->then_instructions, this);
3008
3009 if (!ir->else_instructions.is_empty()) {
3010 emit(ir->condition, TGSI_OPCODE_ELSE);
3011 visit_exec_list(&ir->else_instructions, this);
3012 }
3013
3014 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3015 }
3016
3017
3018 void
3019 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3020 {
3021 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3022 emit(ir, TGSI_OPCODE_EMIT);
3023 }
3024
3025 void
3026 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3027 {
3028 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3029 emit(ir, TGSI_OPCODE_ENDPRIM);
3030 }
3031
3032 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3033 {
3034 result.file = PROGRAM_UNDEFINED;
3035 next_temp = 1;
3036 next_array = 0;
3037 next_signature_id = 1;
3038 num_immediates = 0;
3039 current_function = NULL;
3040 num_address_regs = 0;
3041 samplers_used = 0;
3042 indirect_addr_consts = false;
3043 glsl_version = 0;
3044 native_integers = false;
3045 mem_ctx = ralloc_context(NULL);
3046 ctx = NULL;
3047 prog = NULL;
3048 shader_program = NULL;
3049 options = NULL;
3050 }
3051
3052 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3053 {
3054 ralloc_free(mem_ctx);
3055 }
3056
3057 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3058 {
3059 delete v;
3060 }
3061
3062
3063 /**
3064 * Count resources used by the given gpu program (number of texture
3065 * samplers, etc).
3066 */
3067 static void
3068 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3069 {
3070 v->samplers_used = 0;
3071
3072 foreach_iter(exec_list_iterator, iter, v->instructions) {
3073 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3074
3075 if (is_tex_instruction(inst->op)) {
3076 v->samplers_used |= 1 << inst->sampler;
3077
3078 if (inst->tex_shadow) {
3079 prog->ShadowSamplers |= 1 << inst->sampler;
3080 }
3081 }
3082 }
3083
3084 prog->SamplersUsed = v->samplers_used;
3085
3086 if (v->shader_program != NULL)
3087 _mesa_update_shader_textures_used(v->shader_program, prog);
3088 }
3089
3090 static void
3091 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3092 struct gl_shader_program *shader_program,
3093 const char *name, const glsl_type *type,
3094 ir_constant *val)
3095 {
3096 if (type->is_record()) {
3097 ir_constant *field_constant;
3098
3099 field_constant = (ir_constant *)val->components.get_head();
3100
3101 for (unsigned int i = 0; i < type->length; i++) {
3102 const glsl_type *field_type = type->fields.structure[i].type;
3103 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3104 type->fields.structure[i].name);
3105 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3106 field_type, field_constant);
3107 field_constant = (ir_constant *)field_constant->next;
3108 }
3109 return;
3110 }
3111
3112 unsigned offset;
3113 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3114 &offset);
3115 if (offset == GL_INVALID_INDEX) {
3116 fail_link(shader_program,
3117 "Couldn't find uniform for initializer %s\n", name);
3118 return;
3119 }
3120 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3121
3122 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3123 ir_constant *element;
3124 const glsl_type *element_type;
3125 if (type->is_array()) {
3126 element = val->array_elements[i];
3127 element_type = type->fields.array;
3128 } else {
3129 element = val;
3130 element_type = type;
3131 }
3132
3133 void *values;
3134
3135 if (element_type->base_type == GLSL_TYPE_BOOL) {
3136 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3137 for (unsigned int j = 0; j < element_type->components(); j++) {
3138 conv[j] = element->value.b[j];
3139 }
3140 values = (void *)conv;
3141 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3142 element_type->vector_elements,
3143 1);
3144 } else {
3145 values = &element->value;
3146 }
3147
3148 if (element_type->is_matrix()) {
3149 _mesa_uniform_matrix(ctx, shader_program,
3150 element_type->matrix_columns,
3151 element_type->vector_elements,
3152 loc, 1, GL_FALSE, (GLfloat *)values);
3153 } else {
3154 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3155 values, element_type->gl_type);
3156 }
3157
3158 loc++;
3159 }
3160 }
3161
3162 /**
3163 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3164 * are read from the given src in this instruction
3165 */
3166 static int
3167 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3168 {
3169 int read_mask = 0, comp;
3170
3171 /* Now, given the src swizzle and the written channels, find which
3172 * components are actually read
3173 */
3174 for (comp = 0; comp < 4; ++comp) {
3175 const unsigned coord = GET_SWZ(src.swizzle, comp);
3176 ASSERT(coord < 4);
3177 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3178 read_mask |= 1 << coord;
3179 }
3180
3181 return read_mask;
3182 }
3183
3184 /**
3185 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3186 * instruction is the first instruction to write to register T0. There are
3187 * several lowering passes done in GLSL IR (e.g. branches and
3188 * relative addressing) that create a large number of conditional assignments
3189 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3190 *
3191 * Here is why this conversion is safe:
3192 * CMP T0, T1 T2 T0 can be expanded to:
3193 * if (T1 < 0.0)
3194 * MOV T0, T2;
3195 * else
3196 * MOV T0, T0;
3197 *
3198 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3199 * as the original program. If (T1 < 0.0) evaluates to false, executing
3200 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3201 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3202 * because any instruction that was going to read from T0 after this was going
3203 * to read a garbage value anyway.
3204 */
3205 void
3206 glsl_to_tgsi_visitor::simplify_cmp(void)
3207 {
3208 unsigned *tempWrites;
3209 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3210
3211 tempWrites = new unsigned[MAX_TEMPS];
3212 if (!tempWrites) {
3213 return;
3214 }
3215 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3216 memset(outputWrites, 0, sizeof(outputWrites));
3217
3218 foreach_iter(exec_list_iterator, iter, this->instructions) {
3219 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3220 unsigned prevWriteMask = 0;
3221
3222 /* Give up if we encounter relative addressing or flow control. */
3223 if (inst->dst.reladdr ||
3224 tgsi_get_opcode_info(inst->op)->is_branch ||
3225 inst->op == TGSI_OPCODE_BGNSUB ||
3226 inst->op == TGSI_OPCODE_CONT ||
3227 inst->op == TGSI_OPCODE_END ||
3228 inst->op == TGSI_OPCODE_ENDSUB ||
3229 inst->op == TGSI_OPCODE_RET) {
3230 break;
3231 }
3232
3233 if (inst->dst.file == PROGRAM_OUTPUT) {
3234 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3235 prevWriteMask = outputWrites[inst->dst.index];
3236 outputWrites[inst->dst.index] |= inst->dst.writemask;
3237 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3238 assert(inst->dst.index < MAX_TEMPS);
3239 prevWriteMask = tempWrites[inst->dst.index];
3240 tempWrites[inst->dst.index] |= inst->dst.writemask;
3241 } else
3242 continue;
3243
3244 /* For a CMP to be considered a conditional write, the destination
3245 * register and source register two must be the same. */
3246 if (inst->op == TGSI_OPCODE_CMP
3247 && !(inst->dst.writemask & prevWriteMask)
3248 && inst->src[2].file == inst->dst.file
3249 && inst->src[2].index == inst->dst.index
3250 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3251
3252 inst->op = TGSI_OPCODE_MOV;
3253 inst->src[0] = inst->src[1];
3254 }
3255 }
3256
3257 delete [] tempWrites;
3258 }
3259
3260 /* Replaces all references to a temporary register index with another index. */
3261 void
3262 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3263 {
3264 foreach_iter(exec_list_iterator, iter, this->instructions) {
3265 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3266 unsigned j;
3267
3268 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3269 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3270 inst->src[j].index == index) {
3271 inst->src[j].index = new_index;
3272 }
3273 }
3274
3275 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3276 inst->dst.index = new_index;
3277 }
3278 }
3279 }
3280
3281 int
3282 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3283 {
3284 int depth = 0; /* loop depth */
3285 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3286 unsigned i = 0, j;
3287
3288 foreach_iter(exec_list_iterator, iter, this->instructions) {
3289 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3290
3291 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3292 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3293 inst->src[j].index == index) {
3294 return (depth == 0) ? i : loop_start;
3295 }
3296 }
3297
3298 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3299 if(depth++ == 0)
3300 loop_start = i;
3301 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3302 if (--depth == 0)
3303 loop_start = -1;
3304 }
3305 assert(depth >= 0);
3306
3307 i++;
3308 }
3309
3310 return -1;
3311 }
3312
3313 int
3314 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3315 {
3316 int depth = 0; /* loop depth */
3317 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3318 int i = 0;
3319
3320 foreach_iter(exec_list_iterator, iter, this->instructions) {
3321 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3322
3323 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3324 return (depth == 0) ? i : loop_start;
3325 }
3326
3327 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3328 if(depth++ == 0)
3329 loop_start = i;
3330 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3331 if (--depth == 0)
3332 loop_start = -1;
3333 }
3334 assert(depth >= 0);
3335
3336 i++;
3337 }
3338
3339 return -1;
3340 }
3341
3342 int
3343 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3344 {
3345 int depth = 0; /* loop depth */
3346 int last = -1; /* index of last instruction that reads the temporary */
3347 unsigned i = 0, j;
3348
3349 foreach_iter(exec_list_iterator, iter, this->instructions) {
3350 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3351
3352 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3353 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3354 inst->src[j].index == index) {
3355 last = (depth == 0) ? i : -2;
3356 }
3357 }
3358
3359 if (inst->op == TGSI_OPCODE_BGNLOOP)
3360 depth++;
3361 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3362 if (--depth == 0 && last == -2)
3363 last = i;
3364 assert(depth >= 0);
3365
3366 i++;
3367 }
3368
3369 assert(last >= -1);
3370 return last;
3371 }
3372
3373 int
3374 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3375 {
3376 int depth = 0; /* loop depth */
3377 int last = -1; /* index of last instruction that writes to the temporary */
3378 int i = 0;
3379
3380 foreach_iter(exec_list_iterator, iter, this->instructions) {
3381 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3382
3383 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3384 last = (depth == 0) ? i : -2;
3385
3386 if (inst->op == TGSI_OPCODE_BGNLOOP)
3387 depth++;
3388 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3389 if (--depth == 0 && last == -2)
3390 last = i;
3391 assert(depth >= 0);
3392
3393 i++;
3394 }
3395
3396 assert(last >= -1);
3397 return last;
3398 }
3399
3400 /*
3401 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3402 * channels for copy propagation and updates following instructions to
3403 * use the original versions.
3404 *
3405 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3406 * will occur. As an example, a TXP production before this pass:
3407 *
3408 * 0: MOV TEMP[1], INPUT[4].xyyy;
3409 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3410 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3411 *
3412 * and after:
3413 *
3414 * 0: MOV TEMP[1], INPUT[4].xyyy;
3415 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3416 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3417 *
3418 * which allows for dead code elimination on TEMP[1]'s writes.
3419 */
3420 void
3421 glsl_to_tgsi_visitor::copy_propagate(void)
3422 {
3423 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3424 glsl_to_tgsi_instruction *,
3425 this->next_temp * 4);
3426 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3427 int level = 0;
3428
3429 foreach_iter(exec_list_iterator, iter, this->instructions) {
3430 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3431
3432 assert(inst->dst.file != PROGRAM_TEMPORARY
3433 || inst->dst.index < this->next_temp);
3434
3435 /* First, do any copy propagation possible into the src regs. */
3436 for (int r = 0; r < 3; r++) {
3437 glsl_to_tgsi_instruction *first = NULL;
3438 bool good = true;
3439 int acp_base = inst->src[r].index * 4;
3440
3441 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3442 inst->src[r].reladdr ||
3443 inst->src[r].reladdr2)
3444 continue;
3445
3446 /* See if we can find entries in the ACP consisting of MOVs
3447 * from the same src register for all the swizzled channels
3448 * of this src register reference.
3449 */
3450 for (int i = 0; i < 4; i++) {
3451 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3452 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3453
3454 if (!copy_chan) {
3455 good = false;
3456 break;
3457 }
3458
3459 assert(acp_level[acp_base + src_chan] <= level);
3460
3461 if (!first) {
3462 first = copy_chan;
3463 } else {
3464 if (first->src[0].file != copy_chan->src[0].file ||
3465 first->src[0].index != copy_chan->src[0].index) {
3466 good = false;
3467 break;
3468 }
3469 }
3470 }
3471
3472 if (good) {
3473 /* We've now validated that we can copy-propagate to
3474 * replace this src register reference. Do it.
3475 */
3476 inst->src[r].file = first->src[0].file;
3477 inst->src[r].index = first->src[0].index;
3478 inst->src[r].index2D = first->src[0].index2D;
3479 inst->src[r].has_index2 = first->src[0].has_index2;
3480
3481 int swizzle = 0;
3482 for (int i = 0; i < 4; i++) {
3483 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3484 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3485 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3486 (3 * i));
3487 }
3488 inst->src[r].swizzle = swizzle;
3489 }
3490 }
3491
3492 switch (inst->op) {
3493 case TGSI_OPCODE_BGNLOOP:
3494 case TGSI_OPCODE_ENDLOOP:
3495 /* End of a basic block, clear the ACP entirely. */
3496 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3497 break;
3498
3499 case TGSI_OPCODE_IF:
3500 case TGSI_OPCODE_UIF:
3501 ++level;
3502 break;
3503
3504 case TGSI_OPCODE_ENDIF:
3505 case TGSI_OPCODE_ELSE:
3506 /* Clear all channels written inside the block from the ACP, but
3507 * leaving those that were not touched.
3508 */
3509 for (int r = 0; r < this->next_temp; r++) {
3510 for (int c = 0; c < 4; c++) {
3511 if (!acp[4 * r + c])
3512 continue;
3513
3514 if (acp_level[4 * r + c] >= level)
3515 acp[4 * r + c] = NULL;
3516 }
3517 }
3518 if (inst->op == TGSI_OPCODE_ENDIF)
3519 --level;
3520 break;
3521
3522 default:
3523 /* Continuing the block, clear any written channels from
3524 * the ACP.
3525 */
3526 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3527 /* Any temporary might be written, so no copy propagation
3528 * across this instruction.
3529 */
3530 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3531 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3532 inst->dst.reladdr) {
3533 /* Any output might be written, so no copy propagation
3534 * from outputs across this instruction.
3535 */
3536 for (int r = 0; r < this->next_temp; r++) {
3537 for (int c = 0; c < 4; c++) {
3538 if (!acp[4 * r + c])
3539 continue;
3540
3541 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3542 acp[4 * r + c] = NULL;
3543 }
3544 }
3545 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3546 inst->dst.file == PROGRAM_OUTPUT) {
3547 /* Clear where it's used as dst. */
3548 if (inst->dst.file == PROGRAM_TEMPORARY) {
3549 for (int c = 0; c < 4; c++) {
3550 if (inst->dst.writemask & (1 << c)) {
3551 acp[4 * inst->dst.index + c] = NULL;
3552 }
3553 }
3554 }
3555
3556 /* Clear where it's used as src. */
3557 for (int r = 0; r < this->next_temp; r++) {
3558 for (int c = 0; c < 4; c++) {
3559 if (!acp[4 * r + c])
3560 continue;
3561
3562 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3563
3564 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3565 acp[4 * r + c]->src[0].index == inst->dst.index &&
3566 inst->dst.writemask & (1 << src_chan))
3567 {
3568 acp[4 * r + c] = NULL;
3569 }
3570 }
3571 }
3572 }
3573 break;
3574 }
3575
3576 /* If this is a copy, add it to the ACP. */
3577 if (inst->op == TGSI_OPCODE_MOV &&
3578 inst->dst.file == PROGRAM_TEMPORARY &&
3579 !(inst->dst.file == inst->src[0].file &&
3580 inst->dst.index == inst->src[0].index) &&
3581 !inst->dst.reladdr &&
3582 !inst->saturate &&
3583 !inst->src[0].reladdr &&
3584 !inst->src[0].reladdr2 &&
3585 !inst->src[0].negate) {
3586 for (int i = 0; i < 4; i++) {
3587 if (inst->dst.writemask & (1 << i)) {
3588 acp[4 * inst->dst.index + i] = inst;
3589 acp_level[4 * inst->dst.index + i] = level;
3590 }
3591 }
3592 }
3593 }
3594
3595 ralloc_free(acp_level);
3596 ralloc_free(acp);
3597 }
3598
3599 /*
3600 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3601 *
3602 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3603 * will occur. As an example, a TXP production after copy propagation but
3604 * before this pass:
3605 *
3606 * 0: MOV TEMP[1], INPUT[4].xyyy;
3607 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3608 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3609 *
3610 * and after this pass:
3611 *
3612 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3613 *
3614 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3615 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3616 */
3617 void
3618 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3619 {
3620 int i;
3621
3622 for (i=0; i < this->next_temp; i++) {
3623 int last_read = get_last_temp_read(i);
3624 int j = 0;
3625
3626 foreach_iter(exec_list_iterator, iter, this->instructions) {
3627 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3628
3629 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3630 j > last_read)
3631 {
3632 iter.remove();
3633 delete inst;
3634 }
3635
3636 j++;
3637 }
3638 }
3639 }
3640
3641 /*
3642 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3643 * code elimination. This is less primitive than eliminate_dead_code(), as it
3644 * is per-channel and can detect consecutive writes without a read between them
3645 * as dead code. However, there is some dead code that can be eliminated by
3646 * eliminate_dead_code() but not this function - for example, this function
3647 * cannot eliminate an instruction writing to a register that is never read and
3648 * is the only instruction writing to that register.
3649 *
3650 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3651 * will occur.
3652 */
3653 int
3654 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3655 {
3656 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3657 glsl_to_tgsi_instruction *,
3658 this->next_temp * 4);
3659 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3660 int level = 0;
3661 int removed = 0;
3662
3663 foreach_iter(exec_list_iterator, iter, this->instructions) {
3664 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3665
3666 assert(inst->dst.file != PROGRAM_TEMPORARY
3667 || inst->dst.index < this->next_temp);
3668
3669 switch (inst->op) {
3670 case TGSI_OPCODE_BGNLOOP:
3671 case TGSI_OPCODE_ENDLOOP:
3672 case TGSI_OPCODE_CONT:
3673 case TGSI_OPCODE_BRK:
3674 /* End of a basic block, clear the write array entirely.
3675 *
3676 * This keeps us from killing dead code when the writes are
3677 * on either side of a loop, even when the register isn't touched
3678 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3679 * dead code of this type, so it shouldn't make a difference as long as
3680 * the dead code elimination pass in the GLSL compiler does its job.
3681 */
3682 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3683 break;
3684
3685 case TGSI_OPCODE_ENDIF:
3686 case TGSI_OPCODE_ELSE:
3687 /* Promote the recorded level of all channels written inside the
3688 * preceding if or else block to the level above the if/else block.
3689 */
3690 for (int r = 0; r < this->next_temp; r++) {
3691 for (int c = 0; c < 4; c++) {
3692 if (!writes[4 * r + c])
3693 continue;
3694
3695 if (write_level[4 * r + c] == level)
3696 write_level[4 * r + c] = level-1;
3697 }
3698 }
3699
3700 if(inst->op == TGSI_OPCODE_ENDIF)
3701 --level;
3702
3703 break;
3704
3705 case TGSI_OPCODE_IF:
3706 case TGSI_OPCODE_UIF:
3707 ++level;
3708 /* fallthrough to default case to mark the condition as read */
3709
3710 default:
3711 /* Continuing the block, clear any channels from the write array that
3712 * are read by this instruction.
3713 */
3714 for (unsigned i = 0; i < Elements(inst->src); i++) {
3715 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3716 /* Any temporary might be read, so no dead code elimination
3717 * across this instruction.
3718 */
3719 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3720 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3721 /* Clear where it's used as src. */
3722 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3723 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3724 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3725 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3726
3727 for (int c = 0; c < 4; c++) {
3728 if (src_chans & (1 << c)) {
3729 writes[4 * inst->src[i].index + c] = NULL;
3730 }
3731 }
3732 }
3733 }
3734 break;
3735 }
3736
3737 /* If this instruction writes to a temporary, add it to the write array.
3738 * If there is already an instruction in the write array for one or more
3739 * of the channels, flag that channel write as dead.
3740 */
3741 if (inst->dst.file == PROGRAM_TEMPORARY &&
3742 !inst->dst.reladdr &&
3743 !inst->saturate) {
3744 for (int c = 0; c < 4; c++) {
3745 if (inst->dst.writemask & (1 << c)) {
3746 if (writes[4 * inst->dst.index + c]) {
3747 if (write_level[4 * inst->dst.index + c] < level)
3748 continue;
3749 else
3750 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3751 }
3752 writes[4 * inst->dst.index + c] = inst;
3753 write_level[4 * inst->dst.index + c] = level;
3754 }
3755 }
3756 }
3757 }
3758
3759 /* Anything still in the write array at this point is dead code. */
3760 for (int r = 0; r < this->next_temp; r++) {
3761 for (int c = 0; c < 4; c++) {
3762 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3763 if (inst)
3764 inst->dead_mask |= (1 << c);
3765 }
3766 }
3767
3768 /* Now actually remove the instructions that are completely dead and update
3769 * the writemask of other instructions with dead channels.
3770 */
3771 foreach_iter(exec_list_iterator, iter, this->instructions) {
3772 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3773
3774 if (!inst->dead_mask || !inst->dst.writemask)
3775 continue;
3776 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3777 iter.remove();
3778 delete inst;
3779 removed++;
3780 } else
3781 inst->dst.writemask &= ~(inst->dead_mask);
3782 }
3783
3784 ralloc_free(write_level);
3785 ralloc_free(writes);
3786
3787 return removed;
3788 }
3789
3790 /* Merges temporary registers together where possible to reduce the number of
3791 * registers needed to run a program.
3792 *
3793 * Produces optimal code only after copy propagation and dead code elimination
3794 * have been run. */
3795 void
3796 glsl_to_tgsi_visitor::merge_registers(void)
3797 {
3798 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3799 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3800 int i, j;
3801
3802 /* Read the indices of the last read and first write to each temp register
3803 * into an array so that we don't have to traverse the instruction list as
3804 * much. */
3805 for (i=0; i < this->next_temp; i++) {
3806 last_reads[i] = get_last_temp_read(i);
3807 first_writes[i] = get_first_temp_write(i);
3808 }
3809
3810 /* Start looking for registers with non-overlapping usages that can be
3811 * merged together. */
3812 for (i=0; i < this->next_temp; i++) {
3813 /* Don't touch unused registers. */
3814 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3815
3816 for (j=0; j < this->next_temp; j++) {
3817 /* Don't touch unused registers. */
3818 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3819
3820 /* We can merge the two registers if the first write to j is after or
3821 * in the same instruction as the last read from i. Note that the
3822 * register at index i will always be used earlier or at the same time
3823 * as the register at index j. */
3824 if (first_writes[i] <= first_writes[j] &&
3825 last_reads[i] <= first_writes[j])
3826 {
3827 rename_temp_register(j, i); /* Replace all references to j with i.*/
3828
3829 /* Update the first_writes and last_reads arrays with the new
3830 * values for the merged register index, and mark the newly unused
3831 * register index as such. */
3832 last_reads[i] = last_reads[j];
3833 first_writes[j] = -1;
3834 last_reads[j] = -1;
3835 }
3836 }
3837 }
3838
3839 ralloc_free(last_reads);
3840 ralloc_free(first_writes);
3841 }
3842
3843 /* Reassign indices to temporary registers by reusing unused indices created
3844 * by optimization passes. */
3845 void
3846 glsl_to_tgsi_visitor::renumber_registers(void)
3847 {
3848 int i = 0;
3849 int new_index = 0;
3850
3851 for (i=0; i < this->next_temp; i++) {
3852 if (get_first_temp_read(i) < 0) continue;
3853 if (i != new_index)
3854 rename_temp_register(i, new_index);
3855 new_index++;
3856 }
3857
3858 this->next_temp = new_index;
3859 }
3860
3861 /**
3862 * Returns a fragment program which implements the current pixel transfer ops.
3863 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3864 */
3865 extern "C" void
3866 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3867 glsl_to_tgsi_visitor *original,
3868 int scale_and_bias, int pixel_maps)
3869 {
3870 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3871 struct st_context *st = st_context(original->ctx);
3872 struct gl_program *prog = &fp->Base.Base;
3873 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3874 st_src_reg coord, src0;
3875 st_dst_reg dst0;
3876 glsl_to_tgsi_instruction *inst;
3877
3878 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3879 v->ctx = original->ctx;
3880 v->prog = prog;
3881 v->shader_program = NULL;
3882 v->glsl_version = original->glsl_version;
3883 v->native_integers = original->native_integers;
3884 v->options = original->options;
3885 v->next_temp = original->next_temp;
3886 v->num_address_regs = original->num_address_regs;
3887 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3888 v->indirect_addr_consts = original->indirect_addr_consts;
3889 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3890 v->num_immediates = original->num_immediates;
3891
3892 /*
3893 * Get initial pixel color from the texture.
3894 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3895 */
3896 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3897 src0 = v->get_temp(glsl_type::vec4_type);
3898 dst0 = st_dst_reg(src0);
3899 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3900 inst->sampler = 0;
3901 inst->tex_target = TEXTURE_2D_INDEX;
3902
3903 prog->InputsRead |= VARYING_BIT_TEX0;
3904 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3905 v->samplers_used |= (1 << 0);
3906
3907 if (scale_and_bias) {
3908 static const gl_state_index scale_state[STATE_LENGTH] =
3909 { STATE_INTERNAL, STATE_PT_SCALE,
3910 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3911 static const gl_state_index bias_state[STATE_LENGTH] =
3912 { STATE_INTERNAL, STATE_PT_BIAS,
3913 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3914 GLint scale_p, bias_p;
3915 st_src_reg scale, bias;
3916
3917 scale_p = _mesa_add_state_reference(params, scale_state);
3918 bias_p = _mesa_add_state_reference(params, bias_state);
3919
3920 /* MAD colorTemp, colorTemp, scale, bias; */
3921 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3922 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3923 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3924 }
3925
3926 if (pixel_maps) {
3927 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3928 st_dst_reg temp_dst = st_dst_reg(temp);
3929
3930 assert(st->pixel_xfer.pixelmap_texture);
3931
3932 /* With a little effort, we can do four pixel map look-ups with
3933 * two TEX instructions:
3934 */
3935
3936 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3937 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3938 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3939 inst->sampler = 1;
3940 inst->tex_target = TEXTURE_2D_INDEX;
3941
3942 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3943 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3944 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3945 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3946 inst->sampler = 1;
3947 inst->tex_target = TEXTURE_2D_INDEX;
3948
3949 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3950 v->samplers_used |= (1 << 1);
3951
3952 /* MOV colorTemp, temp; */
3953 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3954 }
3955
3956 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3957 * new visitor. */
3958 foreach_iter(exec_list_iterator, iter, original->instructions) {
3959 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3960 glsl_to_tgsi_instruction *newinst;
3961 st_src_reg src_regs[3];
3962
3963 if (inst->dst.file == PROGRAM_OUTPUT)
3964 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3965
3966 for (int i=0; i<3; i++) {
3967 src_regs[i] = inst->src[i];
3968 if (src_regs[i].file == PROGRAM_INPUT &&
3969 src_regs[i].index == VARYING_SLOT_COL0)
3970 {
3971 src_regs[i].file = PROGRAM_TEMPORARY;
3972 src_regs[i].index = src0.index;
3973 }
3974 else if (src_regs[i].file == PROGRAM_INPUT)
3975 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3976 }
3977
3978 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3979 newinst->tex_target = inst->tex_target;
3980 }
3981
3982 /* Make modifications to fragment program info. */
3983 prog->Parameters = _mesa_combine_parameter_lists(params,
3984 original->prog->Parameters);
3985 _mesa_free_parameter_list(params);
3986 count_resources(v, prog);
3987 fp->glsl_to_tgsi = v;
3988 }
3989
3990 /**
3991 * Make fragment program for glBitmap:
3992 * Sample the texture and kill the fragment if the bit is 0.
3993 * This program will be combined with the user's fragment program.
3994 *
3995 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3996 */
3997 extern "C" void
3998 get_bitmap_visitor(struct st_fragment_program *fp,
3999 glsl_to_tgsi_visitor *original, int samplerIndex)
4000 {
4001 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4002 struct st_context *st = st_context(original->ctx);
4003 struct gl_program *prog = &fp->Base.Base;
4004 st_src_reg coord, src0;
4005 st_dst_reg dst0;
4006 glsl_to_tgsi_instruction *inst;
4007
4008 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4009 v->ctx = original->ctx;
4010 v->prog = prog;
4011 v->shader_program = NULL;
4012 v->glsl_version = original->glsl_version;
4013 v->native_integers = original->native_integers;
4014 v->options = original->options;
4015 v->next_temp = original->next_temp;
4016 v->num_address_regs = original->num_address_regs;
4017 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4018 v->indirect_addr_consts = original->indirect_addr_consts;
4019 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4020 v->num_immediates = original->num_immediates;
4021
4022 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4023 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4024 src0 = v->get_temp(glsl_type::vec4_type);
4025 dst0 = st_dst_reg(src0);
4026 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4027 inst->sampler = samplerIndex;
4028 inst->tex_target = TEXTURE_2D_INDEX;
4029
4030 prog->InputsRead |= VARYING_BIT_TEX0;
4031 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4032 v->samplers_used |= (1 << samplerIndex);
4033
4034 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4035 src0.negate = NEGATE_XYZW;
4036 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4037 src0.swizzle = SWIZZLE_XXXX;
4038 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4039
4040 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4041 * new visitor. */
4042 foreach_iter(exec_list_iterator, iter, original->instructions) {
4043 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
4044 glsl_to_tgsi_instruction *newinst;
4045 st_src_reg src_regs[3];
4046
4047 if (inst->dst.file == PROGRAM_OUTPUT)
4048 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4049
4050 for (int i=0; i<3; i++) {
4051 src_regs[i] = inst->src[i];
4052 if (src_regs[i].file == PROGRAM_INPUT)
4053 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4054 }
4055
4056 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4057 newinst->tex_target = inst->tex_target;
4058 }
4059
4060 /* Make modifications to fragment program info. */
4061 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4062 count_resources(v, prog);
4063 fp->glsl_to_tgsi = v;
4064 }
4065
4066 /* ------------------------- TGSI conversion stuff -------------------------- */
4067 struct label {
4068 unsigned branch_target;
4069 unsigned token;
4070 };
4071
4072 /**
4073 * Intermediate state used during shader translation.
4074 */
4075 struct st_translate {
4076 struct ureg_program *ureg;
4077
4078 struct ureg_dst temps[MAX_TEMPS];
4079 struct ureg_dst arrays[MAX_ARRAYS];
4080 struct ureg_src *constants;
4081 struct ureg_src *immediates;
4082 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4083 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4084 struct ureg_dst address[2];
4085 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4086 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4087
4088 unsigned array_sizes[MAX_ARRAYS];
4089
4090 const GLuint *inputMapping;
4091 const GLuint *outputMapping;
4092
4093 /* For every instruction that contains a label (eg CALL), keep
4094 * details so that we can go back afterwards and emit the correct
4095 * tgsi instruction number for each label.
4096 */
4097 struct label *labels;
4098 unsigned labels_size;
4099 unsigned labels_count;
4100
4101 /* Keep a record of the tgsi instruction number that each mesa
4102 * instruction starts at, will be used to fix up labels after
4103 * translation.
4104 */
4105 unsigned *insn;
4106 unsigned insn_size;
4107 unsigned insn_count;
4108
4109 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4110
4111 boolean error;
4112 };
4113
4114 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4115 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4116 TGSI_SEMANTIC_FACE,
4117 TGSI_SEMANTIC_VERTEXID,
4118 TGSI_SEMANTIC_INSTANCEID
4119 };
4120
4121 /**
4122 * Make note of a branch to a label in the TGSI code.
4123 * After we've emitted all instructions, we'll go over the list
4124 * of labels built here and patch the TGSI code with the actual
4125 * location of each label.
4126 */
4127 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4128 {
4129 unsigned i;
4130
4131 if (t->labels_count + 1 >= t->labels_size) {
4132 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4133 t->labels = (struct label *)realloc(t->labels,
4134 t->labels_size * sizeof(struct label));
4135 if (t->labels == NULL) {
4136 static unsigned dummy;
4137 t->error = TRUE;
4138 return &dummy;
4139 }
4140 }
4141
4142 i = t->labels_count++;
4143 t->labels[i].branch_target = branch_target;
4144 return &t->labels[i].token;
4145 }
4146
4147 /**
4148 * Called prior to emitting the TGSI code for each instruction.
4149 * Allocate additional space for instructions if needed.
4150 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4151 * the next TGSI instruction.
4152 */
4153 static void set_insn_start(struct st_translate *t, unsigned start)
4154 {
4155 if (t->insn_count + 1 >= t->insn_size) {
4156 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4157 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4158 if (t->insn == NULL) {
4159 t->error = TRUE;
4160 return;
4161 }
4162 }
4163
4164 t->insn[t->insn_count++] = start;
4165 }
4166
4167 /**
4168 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4169 */
4170 static struct ureg_src
4171 emit_immediate(struct st_translate *t,
4172 gl_constant_value values[4],
4173 int type, int size)
4174 {
4175 struct ureg_program *ureg = t->ureg;
4176
4177 switch(type)
4178 {
4179 case GL_FLOAT:
4180 return ureg_DECL_immediate(ureg, &values[0].f, size);
4181 case GL_INT:
4182 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4183 case GL_UNSIGNED_INT:
4184 case GL_BOOL:
4185 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4186 default:
4187 assert(!"should not get here - type must be float, int, uint, or bool");
4188 return ureg_src_undef();
4189 }
4190 }
4191
4192 /**
4193 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4194 */
4195 static struct ureg_dst
4196 dst_register(struct st_translate *t,
4197 gl_register_file file,
4198 GLuint index)
4199 {
4200 unsigned array;
4201
4202 switch(file) {
4203 case PROGRAM_UNDEFINED:
4204 return ureg_dst_undef();
4205
4206 case PROGRAM_TEMPORARY:
4207 assert(index >= 0);
4208 assert(index < (int) Elements(t->temps));
4209
4210 if (ureg_dst_is_undef(t->temps[index]))
4211 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4212
4213 return t->temps[index];
4214
4215 case PROGRAM_ARRAY:
4216 array = index >> 16;
4217
4218 assert(array >= 0);
4219 assert(array < (int) Elements(t->arrays));
4220
4221 if (ureg_dst_is_undef(t->arrays[array]))
4222 t->arrays[array] = ureg_DECL_array_temporary(
4223 t->ureg, t->array_sizes[array], TRUE);
4224
4225 return ureg_dst_array_offset(t->arrays[array],
4226 (int)(index & 0xFFFF) - 0x8000);
4227
4228 case PROGRAM_OUTPUT:
4229 if (t->procType == TGSI_PROCESSOR_VERTEX)
4230 assert(index < VARYING_SLOT_MAX);
4231 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4232 assert(index < FRAG_RESULT_MAX);
4233 else
4234 assert(index < VARYING_SLOT_MAX);
4235
4236 assert(t->outputMapping[index] < Elements(t->outputs));
4237
4238 return t->outputs[t->outputMapping[index]];
4239
4240 case PROGRAM_ADDRESS:
4241 return t->address[index];
4242
4243 default:
4244 assert(!"unknown dst register file");
4245 return ureg_dst_undef();
4246 }
4247 }
4248
4249 /**
4250 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4251 */
4252 static struct ureg_src
4253 src_register(struct st_translate *t,
4254 gl_register_file file,
4255 GLint index, GLint index2D)
4256 {
4257 switch(file) {
4258 case PROGRAM_UNDEFINED:
4259 return ureg_src_undef();
4260
4261 case PROGRAM_TEMPORARY:
4262 case PROGRAM_ARRAY:
4263 return ureg_src(dst_register(t, file, index));
4264
4265 case PROGRAM_UNIFORM:
4266 assert(index >= 0);
4267 return t->constants[index];
4268 case PROGRAM_STATE_VAR:
4269 case PROGRAM_CONSTANT: /* ie, immediate */
4270 if (index2D) {
4271 struct ureg_src src;
4272 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4273 src.Dimension = 1;
4274 src.DimensionIndex = index2D;
4275 return src;
4276 } else if (index < 0)
4277 return ureg_DECL_constant(t->ureg, 0);
4278 else
4279 return t->constants[index];
4280
4281 case PROGRAM_IMMEDIATE:
4282 return t->immediates[index];
4283
4284 case PROGRAM_INPUT:
4285 assert(t->inputMapping[index] < Elements(t->inputs));
4286 return t->inputs[t->inputMapping[index]];
4287
4288 case PROGRAM_OUTPUT:
4289 assert(t->outputMapping[index] < Elements(t->outputs));
4290 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4291
4292 case PROGRAM_ADDRESS:
4293 return ureg_src(t->address[index]);
4294
4295 case PROGRAM_SYSTEM_VALUE:
4296 assert(index < (int) Elements(t->systemValues));
4297 return t->systemValues[index];
4298
4299 default:
4300 assert(!"unknown src register file");
4301 return ureg_src_undef();
4302 }
4303 }
4304
4305 /**
4306 * Create a TGSI ureg_dst register from an st_dst_reg.
4307 */
4308 static struct ureg_dst
4309 translate_dst(struct st_translate *t,
4310 const st_dst_reg *dst_reg,
4311 bool saturate, bool clamp_color)
4312 {
4313 struct ureg_dst dst = dst_register(t,
4314 dst_reg->file,
4315 dst_reg->index);
4316
4317 dst = ureg_writemask(dst, dst_reg->writemask);
4318
4319 if (saturate)
4320 dst = ureg_saturate(dst);
4321 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4322 /* Clamp colors for ARB_color_buffer_float. */
4323 switch (t->procType) {
4324 case TGSI_PROCESSOR_VERTEX:
4325 /* XXX if the geometry shader is present, this must be done there
4326 * instead of here. */
4327 if (dst_reg->index == VARYING_SLOT_COL0 ||
4328 dst_reg->index == VARYING_SLOT_COL1 ||
4329 dst_reg->index == VARYING_SLOT_BFC0 ||
4330 dst_reg->index == VARYING_SLOT_BFC1) {
4331 dst = ureg_saturate(dst);
4332 }
4333 break;
4334
4335 case TGSI_PROCESSOR_FRAGMENT:
4336 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4337 dst = ureg_saturate(dst);
4338 }
4339 break;
4340 }
4341 }
4342
4343 if (dst_reg->reladdr != NULL) {
4344 assert(dst_reg->file != PROGRAM_TEMPORARY);
4345 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4346 }
4347
4348 return dst;
4349 }
4350
4351 /**
4352 * Create a TGSI ureg_src register from an st_src_reg.
4353 */
4354 static struct ureg_src
4355 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4356 {
4357 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4358
4359 if (t->procType == TGSI_PROCESSOR_GEOMETRY && src_reg->has_index2) {
4360 src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4361 if (src_reg->reladdr2)
4362 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4363 src_reg->index2D);
4364 else
4365 src = ureg_src_dimension(src, src_reg->index2D);
4366 }
4367
4368 src = ureg_swizzle(src,
4369 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4370 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4371 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4372 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4373
4374 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4375 src = ureg_negate(src);
4376
4377 if (src_reg->reladdr != NULL) {
4378 assert(src_reg->file != PROGRAM_TEMPORARY);
4379 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4380 }
4381
4382 return src;
4383 }
4384
4385 static struct tgsi_texture_offset
4386 translate_tex_offset(struct st_translate *t,
4387 const struct tgsi_texture_offset *in_offset)
4388 {
4389 struct tgsi_texture_offset offset;
4390 struct ureg_src imm_src;
4391
4392 assert(in_offset->File == PROGRAM_IMMEDIATE);
4393 imm_src = t->immediates[in_offset->Index];
4394
4395 offset.File = imm_src.File;
4396 offset.Index = imm_src.Index;
4397 offset.SwizzleX = imm_src.SwizzleX;
4398 offset.SwizzleY = imm_src.SwizzleY;
4399 offset.SwizzleZ = imm_src.SwizzleZ;
4400 offset.File = TGSI_FILE_IMMEDIATE;
4401 offset.Padding = 0;
4402
4403 return offset;
4404 }
4405
4406 static void
4407 compile_tgsi_instruction(struct st_translate *t,
4408 const glsl_to_tgsi_instruction *inst,
4409 bool clamp_dst_color_output)
4410 {
4411 struct ureg_program *ureg = t->ureg;
4412 GLuint i;
4413 struct ureg_dst dst[1];
4414 struct ureg_src src[4];
4415 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4416
4417 unsigned num_dst;
4418 unsigned num_src;
4419 unsigned tex_target;
4420
4421 num_dst = num_inst_dst_regs(inst->op);
4422 num_src = num_inst_src_regs(inst->op);
4423
4424 if (num_dst)
4425 dst[0] = translate_dst(t,
4426 &inst->dst,
4427 inst->saturate,
4428 clamp_dst_color_output);
4429
4430 for (i = 0; i < num_src; i++)
4431 src[i] = translate_src(t, &inst->src[i]);
4432
4433 switch(inst->op) {
4434 case TGSI_OPCODE_BGNLOOP:
4435 case TGSI_OPCODE_CAL:
4436 case TGSI_OPCODE_ELSE:
4437 case TGSI_OPCODE_ENDLOOP:
4438 case TGSI_OPCODE_IF:
4439 case TGSI_OPCODE_UIF:
4440 assert(num_dst == 0);
4441 ureg_label_insn(ureg,
4442 inst->op,
4443 src, num_src,
4444 get_label(t,
4445 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4446 return;
4447
4448 case TGSI_OPCODE_TEX:
4449 case TGSI_OPCODE_TXB:
4450 case TGSI_OPCODE_TXD:
4451 case TGSI_OPCODE_TXL:
4452 case TGSI_OPCODE_TXP:
4453 case TGSI_OPCODE_TXQ:
4454 case TGSI_OPCODE_TXF:
4455 case TGSI_OPCODE_TEX2:
4456 case TGSI_OPCODE_TXB2:
4457 case TGSI_OPCODE_TXL2:
4458 src[num_src++] = t->samplers[inst->sampler];
4459 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4460 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4461 }
4462 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4463
4464 ureg_tex_insn(ureg,
4465 inst->op,
4466 dst, num_dst,
4467 tex_target,
4468 texoffsets, inst->tex_offset_num_offset,
4469 src, num_src);
4470 return;
4471
4472 case TGSI_OPCODE_SCS:
4473 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4474 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4475 break;
4476
4477 default:
4478 ureg_insn(ureg,
4479 inst->op,
4480 dst, num_dst,
4481 src, num_src);
4482 break;
4483 }
4484 }
4485
4486 /**
4487 * Emit the TGSI instructions for inverting and adjusting WPOS.
4488 * This code is unavoidable because it also depends on whether
4489 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4490 */
4491 static void
4492 emit_wpos_adjustment( struct st_translate *t,
4493 const struct gl_program *program,
4494 boolean invert,
4495 GLfloat adjX, GLfloat adjY[2])
4496 {
4497 struct ureg_program *ureg = t->ureg;
4498
4499 /* Fragment program uses fragment position input.
4500 * Need to replace instances of INPUT[WPOS] with temp T
4501 * where T = INPUT[WPOS] by y is inverted.
4502 */
4503 static const gl_state_index wposTransformState[STATE_LENGTH]
4504 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4505 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4506
4507 /* XXX: note we are modifying the incoming shader here! Need to
4508 * do this before emitting the constant decls below, or this
4509 * will be missed:
4510 */
4511 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4512 wposTransformState);
4513
4514 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4515 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4516 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4517
4518 /* First, apply the coordinate shift: */
4519 if (adjX || adjY[0] || adjY[1]) {
4520 if (adjY[0] != adjY[1]) {
4521 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4522 * depending on whether inversion is actually going to be applied
4523 * or not, which is determined by testing against the inversion
4524 * state variable used below, which will be either +1 or -1.
4525 */
4526 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4527
4528 ureg_CMP(ureg, adj_temp,
4529 ureg_scalar(wpostrans, invert ? 2 : 0),
4530 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4531 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4532 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4533 } else {
4534 ureg_ADD(ureg, wpos_temp, wpos_input,
4535 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4536 }
4537 wpos_input = ureg_src(wpos_temp);
4538 } else {
4539 /* MOV wpos_temp, input[wpos]
4540 */
4541 ureg_MOV( ureg, wpos_temp, wpos_input );
4542 }
4543
4544 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4545 * inversion/identity, or the other way around if we're drawing to an FBO.
4546 */
4547 if (invert) {
4548 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4549 */
4550 ureg_MAD( ureg,
4551 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4552 wpos_input,
4553 ureg_scalar(wpostrans, 0),
4554 ureg_scalar(wpostrans, 1));
4555 } else {
4556 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4557 */
4558 ureg_MAD( ureg,
4559 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4560 wpos_input,
4561 ureg_scalar(wpostrans, 2),
4562 ureg_scalar(wpostrans, 3));
4563 }
4564
4565 /* Use wpos_temp as position input from here on:
4566 */
4567 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4568 }
4569
4570
4571 /**
4572 * Emit fragment position/ooordinate code.
4573 */
4574 static void
4575 emit_wpos(struct st_context *st,
4576 struct st_translate *t,
4577 const struct gl_program *program,
4578 struct ureg_program *ureg)
4579 {
4580 const struct gl_fragment_program *fp =
4581 (const struct gl_fragment_program *) program;
4582 struct pipe_screen *pscreen = st->pipe->screen;
4583 GLfloat adjX = 0.0f;
4584 GLfloat adjY[2] = { 0.0f, 0.0f };
4585 boolean invert = FALSE;
4586
4587 /* Query the pixel center conventions supported by the pipe driver and set
4588 * adjX, adjY to help out if it cannot handle the requested one internally.
4589 *
4590 * The bias of the y-coordinate depends on whether y-inversion takes place
4591 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4592 * drawing to an FBO (causes additional inversion), and whether the the pipe
4593 * driver origin and the requested origin differ (the latter condition is
4594 * stored in the 'invert' variable).
4595 *
4596 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4597 *
4598 * center shift only:
4599 * i -> h: +0.5
4600 * h -> i: -0.5
4601 *
4602 * inversion only:
4603 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4604 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4605 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4606 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4607 *
4608 * inversion and center shift:
4609 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4610 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4611 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4612 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4613 */
4614 if (fp->OriginUpperLeft) {
4615 /* Fragment shader wants origin in upper-left */
4616 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4617 /* the driver supports upper-left origin */
4618 }
4619 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4620 /* the driver supports lower-left origin, need to invert Y */
4621 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4622 invert = TRUE;
4623 }
4624 else
4625 assert(0);
4626 }
4627 else {
4628 /* Fragment shader wants origin in lower-left */
4629 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4630 /* the driver supports lower-left origin */
4631 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4632 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4633 /* the driver supports upper-left origin, need to invert Y */
4634 invert = TRUE;
4635 else
4636 assert(0);
4637 }
4638
4639 if (fp->PixelCenterInteger) {
4640 /* Fragment shader wants pixel center integer */
4641 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4642 /* the driver supports pixel center integer */
4643 adjY[1] = 1.0f;
4644 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4645 }
4646 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4647 /* the driver supports pixel center half integer, need to bias X,Y */
4648 adjX = -0.5f;
4649 adjY[0] = -0.5f;
4650 adjY[1] = 0.5f;
4651 }
4652 else
4653 assert(0);
4654 }
4655 else {
4656 /* Fragment shader wants pixel center half integer */
4657 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4658 /* the driver supports pixel center half integer */
4659 }
4660 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4661 /* the driver supports pixel center integer, need to bias X,Y */
4662 adjX = adjY[0] = adjY[1] = 0.5f;
4663 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4664 }
4665 else
4666 assert(0);
4667 }
4668
4669 /* we invert after adjustment so that we avoid the MOV to temporary,
4670 * and reuse the adjustment ADD instead */
4671 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4672 }
4673
4674 /**
4675 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4676 * TGSI uses +1 for front, -1 for back.
4677 * This function converts the TGSI value to the GL value. Simply clamping/
4678 * saturating the value to [0,1] does the job.
4679 */
4680 static void
4681 emit_face_var(struct st_translate *t)
4682 {
4683 struct ureg_program *ureg = t->ureg;
4684 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4685 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4686
4687 /* MOV_SAT face_temp, input[face] */
4688 face_temp = ureg_saturate(face_temp);
4689 ureg_MOV(ureg, face_temp, face_input);
4690
4691 /* Use face_temp as face input from here on: */
4692 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4693 }
4694
4695 static void
4696 emit_edgeflags(struct st_translate *t)
4697 {
4698 struct ureg_program *ureg = t->ureg;
4699 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4700 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4701
4702 ureg_MOV(ureg, edge_dst, edge_src);
4703 }
4704
4705 /**
4706 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4707 * \param program the program to translate
4708 * \param numInputs number of input registers used
4709 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4710 * input indexes
4711 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4712 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4713 * each input
4714 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4715 * \param numOutputs number of output registers used
4716 * \param outputMapping maps Mesa fragment program outputs to TGSI
4717 * generic outputs
4718 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4719 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4720 * each output
4721 *
4722 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4723 */
4724 extern "C" enum pipe_error
4725 st_translate_program(
4726 struct gl_context *ctx,
4727 uint procType,
4728 struct ureg_program *ureg,
4729 glsl_to_tgsi_visitor *program,
4730 const struct gl_program *proginfo,
4731 GLuint numInputs,
4732 const GLuint inputMapping[],
4733 const ubyte inputSemanticName[],
4734 const ubyte inputSemanticIndex[],
4735 const GLuint interpMode[],
4736 const GLboolean is_centroid[],
4737 GLuint numOutputs,
4738 const GLuint outputMapping[],
4739 const ubyte outputSemanticName[],
4740 const ubyte outputSemanticIndex[],
4741 boolean passthrough_edgeflags,
4742 boolean clamp_color)
4743 {
4744 struct st_translate *t;
4745 unsigned i;
4746 enum pipe_error ret = PIPE_OK;
4747
4748 assert(numInputs <= Elements(t->inputs));
4749 assert(numOutputs <= Elements(t->outputs));
4750
4751 t = CALLOC_STRUCT(st_translate);
4752 if (!t) {
4753 ret = PIPE_ERROR_OUT_OF_MEMORY;
4754 goto out;
4755 }
4756
4757 memset(t, 0, sizeof *t);
4758
4759 t->procType = procType;
4760 t->inputMapping = inputMapping;
4761 t->outputMapping = outputMapping;
4762 t->ureg = ureg;
4763
4764 if (program->shader_program) {
4765 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4766 struct gl_uniform_storage *const storage =
4767 &program->shader_program->UniformStorage[i];
4768
4769 _mesa_uniform_detach_all_driver_storage(storage);
4770 }
4771 }
4772
4773 /*
4774 * Declare input attributes.
4775 */
4776 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4777 for (i = 0; i < numInputs; i++) {
4778 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4779 inputSemanticName[i],
4780 inputSemanticIndex[i],
4781 interpMode[i], 0,
4782 is_centroid[i]);
4783 }
4784
4785 if (proginfo->InputsRead & VARYING_BIT_POS) {
4786 /* Must do this after setting up t->inputs, and before
4787 * emitting constant references, below:
4788 */
4789 emit_wpos(st_context(ctx), t, proginfo, ureg);
4790 }
4791
4792 if (proginfo->InputsRead & VARYING_BIT_FACE)
4793 emit_face_var(t);
4794
4795 /*
4796 * Declare output attributes.
4797 */
4798 for (i = 0; i < numOutputs; i++) {
4799 switch (outputSemanticName[i]) {
4800 case TGSI_SEMANTIC_POSITION:
4801 t->outputs[i] = ureg_DECL_output(ureg,
4802 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4803 outputSemanticIndex[i]);
4804 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4805 break;
4806 case TGSI_SEMANTIC_STENCIL:
4807 t->outputs[i] = ureg_DECL_output(ureg,
4808 TGSI_SEMANTIC_STENCIL, /* Stencil */
4809 outputSemanticIndex[i]);
4810 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4811 break;
4812 case TGSI_SEMANTIC_COLOR:
4813 t->outputs[i] = ureg_DECL_output(ureg,
4814 TGSI_SEMANTIC_COLOR,
4815 outputSemanticIndex[i]);
4816 break;
4817 default:
4818 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4819 ret = PIPE_ERROR_BAD_INPUT;
4820 goto out;
4821 }
4822 }
4823 }
4824 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4825 for (i = 0; i < numInputs; i++) {
4826 t->inputs[i] = ureg_DECL_gs_input(ureg,
4827 i,
4828 inputSemanticName[i],
4829 inputSemanticIndex[i]);
4830 }
4831
4832 for (i = 0; i < numOutputs; i++) {
4833 t->outputs[i] = ureg_DECL_output(ureg,
4834 outputSemanticName[i],
4835 outputSemanticIndex[i]);
4836 }
4837 }
4838 else {
4839 assert(procType == TGSI_PROCESSOR_VERTEX);
4840
4841 for (i = 0; i < numInputs; i++) {
4842 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4843 }
4844
4845 for (i = 0; i < numOutputs; i++) {
4846 t->outputs[i] = ureg_DECL_output(ureg,
4847 outputSemanticName[i],
4848 outputSemanticIndex[i]);
4849 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4850 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4851 ureg_MOV(ureg,
4852 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
4853 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
4854 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4855 }
4856 }
4857 if (passthrough_edgeflags)
4858 emit_edgeflags(t);
4859 }
4860
4861 /* Declare address register.
4862 */
4863 if (program->num_address_regs > 0) {
4864 assert(program->num_address_regs <= 2);
4865 t->address[0] = ureg_DECL_address(ureg);
4866 if (program->num_address_regs == 2)
4867 t->address[1] = ureg_DECL_address(ureg);
4868 }
4869
4870 /* Declare misc input registers
4871 */
4872 {
4873 GLbitfield sysInputs = proginfo->SystemValuesRead;
4874 unsigned numSys = 0;
4875 for (i = 0; sysInputs; i++) {
4876 if (sysInputs & (1 << i)) {
4877 unsigned semName = mesa_sysval_to_semantic[i];
4878 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4879 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4880 semName == TGSI_SEMANTIC_VERTEXID) {
4881 /* From Gallium perspective, these system values are always
4882 * integer, and require native integer support. However, if
4883 * native integer is supported on the vertex stage but not the
4884 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4885 * assumes these system values are floats. To resolve the
4886 * inconsistency, we insert a U2F.
4887 */
4888 struct st_context *st = st_context(ctx);
4889 struct pipe_screen *pscreen = st->pipe->screen;
4890 assert(procType == TGSI_PROCESSOR_VERTEX);
4891 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4892 if (!ctx->Const.NativeIntegers) {
4893 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4894 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4895 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4896 }
4897 }
4898 numSys++;
4899 sysInputs &= ~(1 << i);
4900 }
4901 }
4902 }
4903
4904 /* Copy over array sizes
4905 */
4906 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4907
4908 /* Emit constants and uniforms. TGSI uses a single index space for these,
4909 * so we put all the translated regs in t->constants.
4910 */
4911 if (proginfo->Parameters) {
4912 t->constants = (struct ureg_src *)
4913 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4914 if (t->constants == NULL) {
4915 ret = PIPE_ERROR_OUT_OF_MEMORY;
4916 goto out;
4917 }
4918
4919 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4920 switch (proginfo->Parameters->Parameters[i].Type) {
4921 case PROGRAM_STATE_VAR:
4922 case PROGRAM_UNIFORM:
4923 t->constants[i] = ureg_DECL_constant(ureg, i);
4924 break;
4925
4926 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4927 * addressing of the const buffer.
4928 * FIXME: Be smarter and recognize param arrays:
4929 * indirect addressing is only valid within the referenced
4930 * array.
4931 */
4932 case PROGRAM_CONSTANT:
4933 if (program->indirect_addr_consts)
4934 t->constants[i] = ureg_DECL_constant(ureg, i);
4935 else
4936 t->constants[i] = emit_immediate(t,
4937 proginfo->Parameters->ParameterValues[i],
4938 proginfo->Parameters->Parameters[i].DataType,
4939 4);
4940 break;
4941 default:
4942 break;
4943 }
4944 }
4945 }
4946
4947 if (program->shader_program) {
4948 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4949
4950 for (i = 0; i < num_ubos; i++) {
4951 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4952 }
4953 }
4954
4955 /* Emit immediate values.
4956 */
4957 t->immediates = (struct ureg_src *)
4958 calloc(program->num_immediates, sizeof(struct ureg_src));
4959 if (t->immediates == NULL) {
4960 ret = PIPE_ERROR_OUT_OF_MEMORY;
4961 goto out;
4962 }
4963 i = 0;
4964 foreach_iter(exec_list_iterator, iter, program->immediates) {
4965 immediate_storage *imm = (immediate_storage *)iter.get();
4966 assert(i < program->num_immediates);
4967 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4968 }
4969 assert(i == program->num_immediates);
4970
4971 /* texture samplers */
4972 for (i = 0; i < ctx->Const.FragmentProgram.MaxTextureImageUnits; i++) {
4973 if (program->samplers_used & (1 << i)) {
4974 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4975 }
4976 }
4977
4978 /* Emit each instruction in turn:
4979 */
4980 foreach_iter(exec_list_iterator, iter, program->instructions) {
4981 set_insn_start(t, ureg_get_instruction_number(ureg));
4982 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4983 clamp_color);
4984 }
4985
4986 /* Fix up all emitted labels:
4987 */
4988 for (i = 0; i < t->labels_count; i++) {
4989 ureg_fixup_label(ureg, t->labels[i].token,
4990 t->insn[t->labels[i].branch_target]);
4991 }
4992
4993 if (program->shader_program) {
4994 /* This has to be done last. Any operation the can cause
4995 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4996 * program constant) has to happen before creating this linkage.
4997 */
4998 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4999 if (program->shader_program->_LinkedShaders[i] == NULL)
5000 continue;
5001
5002 _mesa_associate_uniform_storage(ctx, program->shader_program,
5003 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5004 }
5005 }
5006
5007 out:
5008 if (t) {
5009 free(t->insn);
5010 free(t->labels);
5011 free(t->constants);
5012 free(t->immediates);
5013
5014 if (t->error) {
5015 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5016 }
5017
5018 free(t);
5019 }
5020
5021 return ret;
5022 }
5023 /* ----------------------------- End TGSI code ------------------------------ */
5024
5025 /**
5026 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5027 * generating Mesa IR.
5028 */
5029 static struct gl_program *
5030 get_mesa_program(struct gl_context *ctx,
5031 struct gl_shader_program *shader_program,
5032 struct gl_shader *shader)
5033 {
5034 glsl_to_tgsi_visitor* v;
5035 struct gl_program *prog;
5036 GLenum target;
5037 bool progress;
5038 struct gl_shader_compiler_options *options =
5039 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
5040 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5041 unsigned ptarget;
5042
5043 switch (shader->Type) {
5044 case GL_VERTEX_SHADER:
5045 target = GL_VERTEX_PROGRAM_ARB;
5046 ptarget = PIPE_SHADER_VERTEX;
5047 break;
5048 case GL_FRAGMENT_SHADER:
5049 target = GL_FRAGMENT_PROGRAM_ARB;
5050 ptarget = PIPE_SHADER_FRAGMENT;
5051 break;
5052 case GL_GEOMETRY_SHADER:
5053 target = GL_GEOMETRY_PROGRAM_NV;
5054 ptarget = PIPE_SHADER_GEOMETRY;
5055 break;
5056 default:
5057 assert(!"should not be reached");
5058 return NULL;
5059 }
5060
5061 validate_ir_tree(shader->ir);
5062
5063 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5064 if (!prog)
5065 return NULL;
5066 prog->Parameters = _mesa_new_parameter_list();
5067 v = new glsl_to_tgsi_visitor();
5068 v->ctx = ctx;
5069 v->prog = prog;
5070 v->shader_program = shader_program;
5071 v->options = options;
5072 v->glsl_version = ctx->Const.GLSLVersion;
5073 v->native_integers = ctx->Const.NativeIntegers;
5074
5075 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5076 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5077
5078 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5079 prog->Parameters);
5080
5081 /* Remove reads from output registers. */
5082 lower_output_reads(shader->ir);
5083
5084 /* Emit intermediate IR for main(). */
5085 visit_exec_list(shader->ir, v);
5086
5087 /* Now emit bodies for any functions that were used. */
5088 do {
5089 progress = GL_FALSE;
5090
5091 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5092 function_entry *entry = (function_entry *)iter.get();
5093
5094 if (!entry->bgn_inst) {
5095 v->current_function = entry;
5096
5097 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5098 entry->bgn_inst->function = entry;
5099
5100 visit_exec_list(&entry->sig->body, v);
5101
5102 glsl_to_tgsi_instruction *last;
5103 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5104 if (last->op != TGSI_OPCODE_RET)
5105 v->emit(NULL, TGSI_OPCODE_RET);
5106
5107 glsl_to_tgsi_instruction *end;
5108 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5109 end->function = entry;
5110
5111 progress = GL_TRUE;
5112 }
5113 }
5114 } while (progress);
5115
5116 #if 0
5117 /* Print out some information (for debugging purposes) used by the
5118 * optimization passes. */
5119 for (i=0; i < v->next_temp; i++) {
5120 int fr = v->get_first_temp_read(i);
5121 int fw = v->get_first_temp_write(i);
5122 int lr = v->get_last_temp_read(i);
5123 int lw = v->get_last_temp_write(i);
5124
5125 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5126 assert(fw <= fr);
5127 }
5128 #endif
5129
5130 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5131 v->simplify_cmp();
5132 v->copy_propagate();
5133 while (v->eliminate_dead_code_advanced());
5134
5135 v->eliminate_dead_code();
5136 v->merge_registers();
5137 v->renumber_registers();
5138
5139 /* Write the END instruction. */
5140 v->emit(NULL, TGSI_OPCODE_END);
5141
5142 if (ctx->Shader.Flags & GLSL_DUMP) {
5143 printf("\n");
5144 printf("GLSL IR for linked %s program %d:\n",
5145 _mesa_glsl_shader_target_name(shader->Type),
5146 shader_program->Name);
5147 _mesa_print_ir(shader->ir, NULL);
5148 printf("\n");
5149 printf("\n");
5150 fflush(stdout);
5151 }
5152
5153 prog->Instructions = NULL;
5154 prog->NumInstructions = 0;
5155
5156 do_set_program_inouts(shader->ir, prog, shader->Type);
5157 count_resources(v, prog);
5158
5159 _mesa_reference_program(ctx, &shader->Program, prog);
5160
5161 /* This has to be done last. Any operation the can cause
5162 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5163 * program constant) has to happen before creating this linkage.
5164 */
5165 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5166 if (!shader_program->LinkStatus) {
5167 return NULL;
5168 }
5169
5170 struct st_vertex_program *stvp;
5171 struct st_fragment_program *stfp;
5172 struct st_geometry_program *stgp;
5173
5174 switch (shader->Type) {
5175 case GL_VERTEX_SHADER:
5176 stvp = (struct st_vertex_program *)prog;
5177 stvp->glsl_to_tgsi = v;
5178 break;
5179 case GL_FRAGMENT_SHADER:
5180 stfp = (struct st_fragment_program *)prog;
5181 stfp->glsl_to_tgsi = v;
5182 break;
5183 case GL_GEOMETRY_SHADER:
5184 stgp = (struct st_geometry_program *)prog;
5185 stgp->glsl_to_tgsi = v;
5186 stgp->Base.InputType = shader_program->Geom.InputType;
5187 stgp->Base.OutputType = shader_program->Geom.OutputType;
5188 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5189 break;
5190 default:
5191 assert(!"should not be reached");
5192 return NULL;
5193 }
5194
5195 return prog;
5196 }
5197
5198 extern "C" {
5199
5200 struct gl_shader *
5201 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5202 {
5203 struct gl_shader *shader;
5204 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5205 type == GL_GEOMETRY_SHADER_ARB);
5206 shader = rzalloc(NULL, struct gl_shader);
5207 if (shader) {
5208 shader->Type = type;
5209 shader->Name = name;
5210 _mesa_init_shader(ctx, shader);
5211 }
5212 return shader;
5213 }
5214
5215 struct gl_shader_program *
5216 st_new_shader_program(struct gl_context *ctx, GLuint name)
5217 {
5218 struct gl_shader_program *shProg;
5219 shProg = rzalloc(NULL, struct gl_shader_program);
5220 if (shProg) {
5221 shProg->Name = name;
5222 _mesa_init_shader_program(ctx, shProg);
5223 }
5224 return shProg;
5225 }
5226
5227 /**
5228 * Link a shader.
5229 * Called via ctx->Driver.LinkShader()
5230 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5231 * with code lowering and other optimizations.
5232 */
5233 GLboolean
5234 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5235 {
5236 assert(prog->LinkStatus);
5237
5238 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5239 if (prog->_LinkedShaders[i] == NULL)
5240 continue;
5241
5242 bool progress;
5243 exec_list *ir = prog->_LinkedShaders[i]->ir;
5244 const struct gl_shader_compiler_options *options =
5245 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5246
5247 /* If there are forms of indirect addressing that the driver
5248 * cannot handle, perform the lowering pass.
5249 */
5250 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5251 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5252 lower_variable_index_to_cond_assign(ir,
5253 options->EmitNoIndirectInput,
5254 options->EmitNoIndirectOutput,
5255 options->EmitNoIndirectTemp,
5256 options->EmitNoIndirectUniform);
5257 }
5258
5259 if (ctx->Extensions.ARB_shading_language_packing) {
5260 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5261 LOWER_UNPACK_SNORM_2x16 |
5262 LOWER_PACK_UNORM_2x16 |
5263 LOWER_UNPACK_UNORM_2x16 |
5264 LOWER_PACK_SNORM_4x8 |
5265 LOWER_UNPACK_SNORM_4x8 |
5266 LOWER_UNPACK_UNORM_4x8 |
5267 LOWER_PACK_UNORM_4x8 |
5268 LOWER_PACK_HALF_2x16 |
5269 LOWER_UNPACK_HALF_2x16;
5270
5271 lower_packing_builtins(ir, lower_inst);
5272 }
5273
5274 do_mat_op_to_vec(ir);
5275 lower_instructions(ir,
5276 MOD_TO_FRACT |
5277 DIV_TO_MUL_RCP |
5278 EXP_TO_EXP2 |
5279 LOG_TO_LOG2 |
5280 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5281 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5282
5283 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5284 do_vec_index_to_cond_assign(ir);
5285 lower_vector_insert(ir, true);
5286 lower_quadop_vector(ir, false);
5287 lower_noise(ir);
5288 if (options->MaxIfDepth == 0) {
5289 lower_discard(ir);
5290 }
5291
5292 do {
5293 progress = false;
5294
5295 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5296
5297 progress = do_common_optimization(ir, true, true,
5298 options->MaxUnrollIterations, options)
5299 || progress;
5300
5301 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5302
5303 } while (progress);
5304
5305 validate_ir_tree(ir);
5306 }
5307
5308 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5309 struct gl_program *linked_prog;
5310
5311 if (prog->_LinkedShaders[i] == NULL)
5312 continue;
5313
5314 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5315
5316 if (linked_prog) {
5317 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5318 linked_prog);
5319 if (!ctx->Driver.ProgramStringNotify(ctx,
5320 _mesa_program_index_to_target(i),
5321 linked_prog)) {
5322 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5323 NULL);
5324 _mesa_reference_program(ctx, &linked_prog, NULL);
5325 return GL_FALSE;
5326 }
5327 }
5328
5329 _mesa_reference_program(ctx, &linked_prog, NULL);
5330 }
5331
5332 return GL_TRUE;
5333 }
5334
5335 void
5336 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5337 const GLuint outputMapping[],
5338 struct pipe_stream_output_info *so)
5339 {
5340 unsigned i;
5341 struct gl_transform_feedback_info *info =
5342 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5343
5344 for (i = 0; i < info->NumOutputs; i++) {
5345 so->output[i].register_index =
5346 outputMapping[info->Outputs[i].OutputRegister];
5347 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5348 so->output[i].num_components = info->Outputs[i].NumComponents;
5349 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5350 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5351 }
5352
5353 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5354 so->stride[i] = info->BufferStride[i];
5355 }
5356 so->num_outputs = info->NumOutputs;
5357 }
5358
5359 } /* extern "C" */