glsl: Eliminate ambiguity between function ins/outs and shader ins/outs
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71 }
72
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
79
80 /**
81 * Maximum number of temporary registers.
82 *
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
85 */
86 #define MAX_TEMPS 4096
87
88 /* will be 4 for GLSL 4.00 */
89 #define MAX_GLSL_TEXTURE_OFFSET 1
90
91 class st_src_reg;
92 class st_dst_reg;
93
94 static int swizzle_for_size(int size);
95
96 /**
97 * This struct is a corresponding struct to TGSI ureg_src.
98 */
99 class st_src_reg {
100 public:
101 st_src_reg(gl_register_file file, int index, const glsl_type *type)
102 {
103 this->file = file;
104 this->index = index;
105 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
106 this->swizzle = swizzle_for_size(type->vector_elements);
107 else
108 this->swizzle = SWIZZLE_XYZW;
109 this->negate = 0;
110 this->index2D = 0;
111 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
112 this->reladdr = NULL;
113 }
114
115 st_src_reg(gl_register_file file, int index, int type)
116 {
117 this->type = type;
118 this->file = file;
119 this->index = index;
120 this->index2D = 0;
121 this->swizzle = SWIZZLE_XYZW;
122 this->negate = 0;
123 this->reladdr = NULL;
124 }
125
126 st_src_reg(gl_register_file file, int index, int type, int index2D)
127 {
128 this->type = type;
129 this->file = file;
130 this->index = index;
131 this->index2D = index2D;
132 this->swizzle = SWIZZLE_XYZW;
133 this->negate = 0;
134 this->reladdr = NULL;
135 }
136
137 st_src_reg()
138 {
139 this->type = GLSL_TYPE_ERROR;
140 this->file = PROGRAM_UNDEFINED;
141 this->index = 0;
142 this->index2D = 0;
143 this->swizzle = 0;
144 this->negate = 0;
145 this->reladdr = NULL;
146 }
147
148 explicit st_src_reg(st_dst_reg reg);
149
150 gl_register_file file; /**< PROGRAM_* from Mesa */
151 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
152 int index2D;
153 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
154 int negate; /**< NEGATE_XYZW mask from mesa */
155 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
156 /** Register index should be offset by the integer in this reg. */
157 st_src_reg *reladdr;
158 };
159
160 class st_dst_reg {
161 public:
162 st_dst_reg(gl_register_file file, int writemask, int type)
163 {
164 this->file = file;
165 this->index = 0;
166 this->writemask = writemask;
167 this->cond_mask = COND_TR;
168 this->reladdr = NULL;
169 this->type = type;
170 }
171
172 st_dst_reg()
173 {
174 this->type = GLSL_TYPE_ERROR;
175 this->file = PROGRAM_UNDEFINED;
176 this->index = 0;
177 this->writemask = 0;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 }
181
182 explicit st_dst_reg(st_src_reg reg);
183
184 gl_register_file file; /**< PROGRAM_* from Mesa */
185 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
186 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
187 GLuint cond_mask:4;
188 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
189 /** Register index should be offset by the integer in this reg. */
190 st_src_reg *reladdr;
191 };
192
193 st_src_reg::st_src_reg(st_dst_reg reg)
194 {
195 this->type = reg.type;
196 this->file = reg.file;
197 this->index = reg.index;
198 this->swizzle = SWIZZLE_XYZW;
199 this->negate = 0;
200 this->reladdr = reg.reladdr;
201 this->index2D = 0;
202 }
203
204 st_dst_reg::st_dst_reg(st_src_reg reg)
205 {
206 this->type = reg.type;
207 this->file = reg.file;
208 this->index = reg.index;
209 this->writemask = WRITEMASK_XYZW;
210 this->cond_mask = COND_TR;
211 this->reladdr = reg.reladdr;
212 }
213
214 class glsl_to_tgsi_instruction : public exec_node {
215 public:
216 /* Callers of this ralloc-based new need not call delete. It's
217 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
218 static void* operator new(size_t size, void *ctx)
219 {
220 void *node;
221
222 node = rzalloc_size(ctx, size);
223 assert(node != NULL);
224
225 return node;
226 }
227
228 unsigned op;
229 st_dst_reg dst;
230 st_src_reg src[3];
231 /** Pointer to the ir source this tree came from for debugging */
232 ir_instruction *ir;
233 GLboolean cond_update;
234 bool saturate;
235 int sampler; /**< sampler index */
236 int tex_target; /**< One of TEXTURE_*_INDEX */
237 GLboolean tex_shadow;
238 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
239 unsigned tex_offset_num_offset;
240 int dead_mask; /**< Used in dead code elimination */
241
242 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
243 };
244
245 class variable_storage : public exec_node {
246 public:
247 variable_storage(ir_variable *var, gl_register_file file, int index)
248 : file(file), index(index), var(var)
249 {
250 /* empty */
251 }
252
253 gl_register_file file;
254 int index;
255 ir_variable *var; /* variable that maps to this, if any */
256 };
257
258 class immediate_storage : public exec_node {
259 public:
260 immediate_storage(gl_constant_value *values, int size, int type)
261 {
262 memcpy(this->values, values, size * sizeof(gl_constant_value));
263 this->size = size;
264 this->type = type;
265 }
266
267 gl_constant_value values[4];
268 int size; /**< Number of components (1-4) */
269 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
270 };
271
272 class function_entry : public exec_node {
273 public:
274 ir_function_signature *sig;
275
276 /**
277 * identifier of this function signature used by the program.
278 *
279 * At the point that TGSI instructions for function calls are
280 * generated, we don't know the address of the first instruction of
281 * the function body. So we make the BranchTarget that is called a
282 * small integer and rewrite them during set_branchtargets().
283 */
284 int sig_id;
285
286 /**
287 * Pointer to first instruction of the function body.
288 *
289 * Set during function body emits after main() is processed.
290 */
291 glsl_to_tgsi_instruction *bgn_inst;
292
293 /**
294 * Index of the first instruction of the function body in actual TGSI.
295 *
296 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
297 */
298 int inst;
299
300 /** Storage for the return value. */
301 st_src_reg return_reg;
302 };
303
304 struct glsl_to_tgsi_visitor : public ir_visitor {
305 public:
306 glsl_to_tgsi_visitor();
307 ~glsl_to_tgsi_visitor();
308
309 function_entry *current_function;
310
311 struct gl_context *ctx;
312 struct gl_program *prog;
313 struct gl_shader_program *shader_program;
314 struct gl_shader_compiler_options *options;
315
316 int next_temp;
317
318 int num_address_regs;
319 int samplers_used;
320 bool indirect_addr_temps;
321 bool indirect_addr_consts;
322
323 int glsl_version;
324 bool native_integers;
325
326 variable_storage *find_variable_storage(ir_variable *var);
327
328 int add_constant(gl_register_file file, gl_constant_value values[4],
329 int size, int datatype, GLuint *swizzle_out);
330
331 function_entry *get_function_signature(ir_function_signature *sig);
332
333 st_src_reg get_temp(const glsl_type *type);
334 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
335
336 st_src_reg st_src_reg_for_float(float val);
337 st_src_reg st_src_reg_for_int(int val);
338 st_src_reg st_src_reg_for_type(int type, int val);
339
340 /**
341 * \name Visit methods
342 *
343 * As typical for the visitor pattern, there must be one \c visit method for
344 * each concrete subclass of \c ir_instruction. Virtual base classes within
345 * the hierarchy should not have \c visit methods.
346 */
347 /*@{*/
348 virtual void visit(ir_variable *);
349 virtual void visit(ir_loop *);
350 virtual void visit(ir_loop_jump *);
351 virtual void visit(ir_function_signature *);
352 virtual void visit(ir_function *);
353 virtual void visit(ir_expression *);
354 virtual void visit(ir_swizzle *);
355 virtual void visit(ir_dereference_variable *);
356 virtual void visit(ir_dereference_array *);
357 virtual void visit(ir_dereference_record *);
358 virtual void visit(ir_assignment *);
359 virtual void visit(ir_constant *);
360 virtual void visit(ir_call *);
361 virtual void visit(ir_return *);
362 virtual void visit(ir_discard *);
363 virtual void visit(ir_texture *);
364 virtual void visit(ir_if *);
365 /*@}*/
366
367 st_src_reg result;
368
369 /** List of variable_storage */
370 exec_list variables;
371
372 /** List of immediate_storage */
373 exec_list immediates;
374 unsigned num_immediates;
375
376 /** List of function_entry */
377 exec_list function_signatures;
378 int next_signature_id;
379
380 /** List of glsl_to_tgsi_instruction */
381 exec_list instructions;
382
383 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
384
385 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
386 st_dst_reg dst, st_src_reg src0);
387
388 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
389 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
390
391 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
392 st_dst_reg dst,
393 st_src_reg src0, st_src_reg src1, st_src_reg src2);
394
395 unsigned get_opcode(ir_instruction *ir, unsigned op,
396 st_dst_reg dst,
397 st_src_reg src0, st_src_reg src1);
398
399 /**
400 * Emit the correct dot-product instruction for the type of arguments
401 */
402 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
403 st_dst_reg dst,
404 st_src_reg src0,
405 st_src_reg src1,
406 unsigned elements);
407
408 void emit_scalar(ir_instruction *ir, unsigned op,
409 st_dst_reg dst, st_src_reg src0);
410
411 void emit_scalar(ir_instruction *ir, unsigned op,
412 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
413
414 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
415
416 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
417
418 void emit_scs(ir_instruction *ir, unsigned op,
419 st_dst_reg dst, const st_src_reg &src);
420
421 bool try_emit_mad(ir_expression *ir,
422 int mul_operand);
423 bool try_emit_mad_for_and_not(ir_expression *ir,
424 int mul_operand);
425 bool try_emit_sat(ir_expression *ir);
426
427 void emit_swz(ir_expression *ir);
428
429 bool process_move_condition(ir_rvalue *ir);
430
431 void simplify_cmp(void);
432
433 void rename_temp_register(int index, int new_index);
434 int get_first_temp_read(int index);
435 int get_first_temp_write(int index);
436 int get_last_temp_read(int index);
437 int get_last_temp_write(int index);
438
439 void copy_propagate(void);
440 void eliminate_dead_code(void);
441 int eliminate_dead_code_advanced(void);
442 void merge_registers(void);
443 void renumber_registers(void);
444
445 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
446 st_dst_reg *l, st_src_reg *r);
447
448 void *mem_ctx;
449 };
450
451 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
452
453 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
454
455 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
456
457 static void
458 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
459
460 static void
461 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
462 {
463 va_list args;
464 va_start(args, fmt);
465 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
466 va_end(args);
467
468 prog->LinkStatus = GL_FALSE;
469 }
470
471 static int
472 swizzle_for_size(int size)
473 {
474 int size_swizzles[4] = {
475 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
476 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
477 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
478 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
479 };
480
481 assert((size >= 1) && (size <= 4));
482 return size_swizzles[size - 1];
483 }
484
485 static bool
486 is_tex_instruction(unsigned opcode)
487 {
488 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
489 return info->is_tex;
490 }
491
492 static unsigned
493 num_inst_dst_regs(unsigned opcode)
494 {
495 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
496 return info->num_dst;
497 }
498
499 static unsigned
500 num_inst_src_regs(unsigned opcode)
501 {
502 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
503 return info->is_tex ? info->num_src - 1 : info->num_src;
504 }
505
506 glsl_to_tgsi_instruction *
507 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
508 st_dst_reg dst,
509 st_src_reg src0, st_src_reg src1, st_src_reg src2)
510 {
511 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
512 int num_reladdr = 0, i;
513
514 op = get_opcode(ir, op, dst, src0, src1);
515
516 /* If we have to do relative addressing, we want to load the ARL
517 * reg directly for one of the regs, and preload the other reladdr
518 * sources into temps.
519 */
520 num_reladdr += dst.reladdr != NULL;
521 num_reladdr += src0.reladdr != NULL;
522 num_reladdr += src1.reladdr != NULL;
523 num_reladdr += src2.reladdr != NULL;
524
525 reladdr_to_temp(ir, &src2, &num_reladdr);
526 reladdr_to_temp(ir, &src1, &num_reladdr);
527 reladdr_to_temp(ir, &src0, &num_reladdr);
528
529 if (dst.reladdr) {
530 emit_arl(ir, address_reg, *dst.reladdr);
531 num_reladdr--;
532 }
533 assert(num_reladdr == 0);
534
535 inst->op = op;
536 inst->dst = dst;
537 inst->src[0] = src0;
538 inst->src[1] = src1;
539 inst->src[2] = src2;
540 inst->ir = ir;
541 inst->dead_mask = 0;
542
543 inst->function = NULL;
544
545 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
546 this->num_address_regs = 1;
547
548 /* Update indirect addressing status used by TGSI */
549 if (dst.reladdr) {
550 switch(dst.file) {
551 case PROGRAM_TEMPORARY:
552 this->indirect_addr_temps = true;
553 break;
554 case PROGRAM_LOCAL_PARAM:
555 case PROGRAM_ENV_PARAM:
556 case PROGRAM_STATE_VAR:
557 case PROGRAM_CONSTANT:
558 case PROGRAM_UNIFORM:
559 this->indirect_addr_consts = true;
560 break;
561 case PROGRAM_IMMEDIATE:
562 assert(!"immediates should not have indirect addressing");
563 break;
564 default:
565 break;
566 }
567 }
568 else {
569 for (i=0; i<3; i++) {
570 if(inst->src[i].reladdr) {
571 switch(inst->src[i].file) {
572 case PROGRAM_TEMPORARY:
573 this->indirect_addr_temps = true;
574 break;
575 case PROGRAM_LOCAL_PARAM:
576 case PROGRAM_ENV_PARAM:
577 case PROGRAM_STATE_VAR:
578 case PROGRAM_CONSTANT:
579 case PROGRAM_UNIFORM:
580 this->indirect_addr_consts = true;
581 break;
582 case PROGRAM_IMMEDIATE:
583 assert(!"immediates should not have indirect addressing");
584 break;
585 default:
586 break;
587 }
588 }
589 }
590 }
591
592 this->instructions.push_tail(inst);
593
594 if (native_integers)
595 try_emit_float_set(ir, op, dst);
596
597 return inst;
598 }
599
600
601 glsl_to_tgsi_instruction *
602 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
603 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
604 {
605 return emit(ir, op, dst, src0, src1, undef_src);
606 }
607
608 glsl_to_tgsi_instruction *
609 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
610 st_dst_reg dst, st_src_reg src0)
611 {
612 assert(dst.writemask != 0);
613 return emit(ir, op, dst, src0, undef_src, undef_src);
614 }
615
616 glsl_to_tgsi_instruction *
617 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
618 {
619 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
620 }
621
622 /**
623 * Emits the code to convert the result of float SET instructions to integers.
624 */
625 void
626 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
627 st_dst_reg dst)
628 {
629 if ((op == TGSI_OPCODE_SEQ ||
630 op == TGSI_OPCODE_SNE ||
631 op == TGSI_OPCODE_SGE ||
632 op == TGSI_OPCODE_SLT))
633 {
634 st_src_reg src = st_src_reg(dst);
635 src.negate = ~src.negate;
636 dst.type = GLSL_TYPE_FLOAT;
637 emit(ir, TGSI_OPCODE_F2I, dst, src);
638 }
639 }
640
641 /**
642 * Determines whether to use an integer, unsigned integer, or float opcode
643 * based on the operands and input opcode, then emits the result.
644 */
645 unsigned
646 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
647 st_dst_reg dst,
648 st_src_reg src0, st_src_reg src1)
649 {
650 int type = GLSL_TYPE_FLOAT;
651
652 assert(src0.type != GLSL_TYPE_ARRAY);
653 assert(src0.type != GLSL_TYPE_STRUCT);
654 assert(src1.type != GLSL_TYPE_ARRAY);
655 assert(src1.type != GLSL_TYPE_STRUCT);
656
657 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
658 type = GLSL_TYPE_FLOAT;
659 else if (native_integers)
660 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
661
662 #define case4(c, f, i, u) \
663 case TGSI_OPCODE_##c: \
664 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
665 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
666 else op = TGSI_OPCODE_##f; \
667 break;
668 #define case3(f, i, u) case4(f, f, i, u)
669 #define case2fi(f, i) case4(f, f, i, i)
670 #define case2iu(i, u) case4(i, LAST, i, u)
671
672 switch(op) {
673 case2fi(ADD, UADD);
674 case2fi(MUL, UMUL);
675 case2fi(MAD, UMAD);
676 case3(DIV, IDIV, UDIV);
677 case3(MAX, IMAX, UMAX);
678 case3(MIN, IMIN, UMIN);
679 case2iu(MOD, UMOD);
680
681 case2fi(SEQ, USEQ);
682 case2fi(SNE, USNE);
683 case3(SGE, ISGE, USGE);
684 case3(SLT, ISLT, USLT);
685
686 case2iu(ISHR, USHR);
687
688 case2fi(SSG, ISSG);
689 case3(ABS, IABS, IABS);
690
691 default: break;
692 }
693
694 assert(op != TGSI_OPCODE_LAST);
695 return op;
696 }
697
698 glsl_to_tgsi_instruction *
699 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
700 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
701 unsigned elements)
702 {
703 static const unsigned dot_opcodes[] = {
704 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
705 };
706
707 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
708 }
709
710 /**
711 * Emits TGSI scalar opcodes to produce unique answers across channels.
712 *
713 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
714 * channel determines the result across all channels. So to do a vec4
715 * of this operation, we want to emit a scalar per source channel used
716 * to produce dest channels.
717 */
718 void
719 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
720 st_dst_reg dst,
721 st_src_reg orig_src0, st_src_reg orig_src1)
722 {
723 int i, j;
724 int done_mask = ~dst.writemask;
725
726 /* TGSI RCP is a scalar operation splatting results to all channels,
727 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
728 * dst channels.
729 */
730 for (i = 0; i < 4; i++) {
731 GLuint this_mask = (1 << i);
732 glsl_to_tgsi_instruction *inst;
733 st_src_reg src0 = orig_src0;
734 st_src_reg src1 = orig_src1;
735
736 if (done_mask & this_mask)
737 continue;
738
739 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
740 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
741 for (j = i + 1; j < 4; j++) {
742 /* If there is another enabled component in the destination that is
743 * derived from the same inputs, generate its value on this pass as
744 * well.
745 */
746 if (!(done_mask & (1 << j)) &&
747 GET_SWZ(src0.swizzle, j) == src0_swiz &&
748 GET_SWZ(src1.swizzle, j) == src1_swiz) {
749 this_mask |= (1 << j);
750 }
751 }
752 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
753 src0_swiz, src0_swiz);
754 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
755 src1_swiz, src1_swiz);
756
757 inst = emit(ir, op, dst, src0, src1);
758 inst->dst.writemask = this_mask;
759 done_mask |= this_mask;
760 }
761 }
762
763 void
764 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
765 st_dst_reg dst, st_src_reg src0)
766 {
767 st_src_reg undef = undef_src;
768
769 undef.swizzle = SWIZZLE_XXXX;
770
771 emit_scalar(ir, op, dst, src0, undef);
772 }
773
774 void
775 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
776 st_dst_reg dst, st_src_reg src0)
777 {
778 int op = TGSI_OPCODE_ARL;
779
780 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
781 op = TGSI_OPCODE_UARL;
782
783 emit(NULL, op, dst, src0);
784 }
785
786 /**
787 * Emit an TGSI_OPCODE_SCS instruction
788 *
789 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
790 * Instead of splatting its result across all four components of the
791 * destination, it writes one value to the \c x component and another value to
792 * the \c y component.
793 *
794 * \param ir IR instruction being processed
795 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
796 * on which value is desired.
797 * \param dst Destination register
798 * \param src Source register
799 */
800 void
801 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
802 st_dst_reg dst,
803 const st_src_reg &src)
804 {
805 /* Vertex programs cannot use the SCS opcode.
806 */
807 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
808 emit_scalar(ir, op, dst, src);
809 return;
810 }
811
812 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
813 const unsigned scs_mask = (1U << component);
814 int done_mask = ~dst.writemask;
815 st_src_reg tmp;
816
817 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
818
819 /* If there are compnents in the destination that differ from the component
820 * that will be written by the SCS instrution, we'll need a temporary.
821 */
822 if (scs_mask != unsigned(dst.writemask)) {
823 tmp = get_temp(glsl_type::vec4_type);
824 }
825
826 for (unsigned i = 0; i < 4; i++) {
827 unsigned this_mask = (1U << i);
828 st_src_reg src0 = src;
829
830 if ((done_mask & this_mask) != 0)
831 continue;
832
833 /* The source swizzle specified which component of the source generates
834 * sine / cosine for the current component in the destination. The SCS
835 * instruction requires that this value be swizzle to the X component.
836 * Replace the current swizzle with a swizzle that puts the source in
837 * the X component.
838 */
839 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
840
841 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
842 src0_swiz, src0_swiz);
843 for (unsigned j = i + 1; j < 4; j++) {
844 /* If there is another enabled component in the destination that is
845 * derived from the same inputs, generate its value on this pass as
846 * well.
847 */
848 if (!(done_mask & (1 << j)) &&
849 GET_SWZ(src0.swizzle, j) == src0_swiz) {
850 this_mask |= (1 << j);
851 }
852 }
853
854 if (this_mask != scs_mask) {
855 glsl_to_tgsi_instruction *inst;
856 st_dst_reg tmp_dst = st_dst_reg(tmp);
857
858 /* Emit the SCS instruction.
859 */
860 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
861 inst->dst.writemask = scs_mask;
862
863 /* Move the result of the SCS instruction to the desired location in
864 * the destination.
865 */
866 tmp.swizzle = MAKE_SWIZZLE4(component, component,
867 component, component);
868 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
869 inst->dst.writemask = this_mask;
870 } else {
871 /* Emit the SCS instruction to write directly to the destination.
872 */
873 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
874 inst->dst.writemask = scs_mask;
875 }
876
877 done_mask |= this_mask;
878 }
879 }
880
881 int
882 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
883 gl_constant_value values[4], int size, int datatype,
884 GLuint *swizzle_out)
885 {
886 if (file == PROGRAM_CONSTANT) {
887 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
888 size, datatype, swizzle_out);
889 } else {
890 int index = 0;
891 immediate_storage *entry;
892 assert(file == PROGRAM_IMMEDIATE);
893
894 /* Search immediate storage to see if we already have an identical
895 * immediate that we can use instead of adding a duplicate entry.
896 */
897 foreach_iter(exec_list_iterator, iter, this->immediates) {
898 entry = (immediate_storage *)iter.get();
899
900 if (entry->size == size &&
901 entry->type == datatype &&
902 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
903 return index;
904 }
905 index++;
906 }
907
908 /* Add this immediate to the list. */
909 entry = new(mem_ctx) immediate_storage(values, size, datatype);
910 this->immediates.push_tail(entry);
911 this->num_immediates++;
912 return index;
913 }
914 }
915
916 st_src_reg
917 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
918 {
919 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
920 union gl_constant_value uval;
921
922 uval.f = val;
923 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
924
925 return src;
926 }
927
928 st_src_reg
929 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
930 {
931 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
932 union gl_constant_value uval;
933
934 assert(native_integers);
935
936 uval.i = val;
937 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
938
939 return src;
940 }
941
942 st_src_reg
943 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
944 {
945 if (native_integers)
946 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
947 st_src_reg_for_int(val);
948 else
949 return st_src_reg_for_float(val);
950 }
951
952 static int
953 type_size(const struct glsl_type *type)
954 {
955 unsigned int i;
956 int size;
957
958 switch (type->base_type) {
959 case GLSL_TYPE_UINT:
960 case GLSL_TYPE_INT:
961 case GLSL_TYPE_FLOAT:
962 case GLSL_TYPE_BOOL:
963 if (type->is_matrix()) {
964 return type->matrix_columns;
965 } else {
966 /* Regardless of size of vector, it gets a vec4. This is bad
967 * packing for things like floats, but otherwise arrays become a
968 * mess. Hopefully a later pass over the code can pack scalars
969 * down if appropriate.
970 */
971 return 1;
972 }
973 case GLSL_TYPE_ARRAY:
974 assert(type->length > 0);
975 return type_size(type->fields.array) * type->length;
976 case GLSL_TYPE_STRUCT:
977 size = 0;
978 for (i = 0; i < type->length; i++) {
979 size += type_size(type->fields.structure[i].type);
980 }
981 return size;
982 case GLSL_TYPE_SAMPLER:
983 /* Samplers take up one slot in UNIFORMS[], but they're baked in
984 * at link time.
985 */
986 return 1;
987 default:
988 assert(0);
989 return 0;
990 }
991 }
992
993 /**
994 * In the initial pass of codegen, we assign temporary numbers to
995 * intermediate results. (not SSA -- variable assignments will reuse
996 * storage).
997 */
998 st_src_reg
999 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1000 {
1001 st_src_reg src;
1002
1003 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1004 src.file = PROGRAM_TEMPORARY;
1005 src.index = next_temp;
1006 src.reladdr = NULL;
1007 next_temp += type_size(type);
1008
1009 if (type->is_array() || type->is_record()) {
1010 src.swizzle = SWIZZLE_NOOP;
1011 } else {
1012 src.swizzle = swizzle_for_size(type->vector_elements);
1013 }
1014 src.negate = 0;
1015
1016 return src;
1017 }
1018
1019 variable_storage *
1020 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1021 {
1022
1023 variable_storage *entry;
1024
1025 foreach_iter(exec_list_iterator, iter, this->variables) {
1026 entry = (variable_storage *)iter.get();
1027
1028 if (entry->var == var)
1029 return entry;
1030 }
1031
1032 return NULL;
1033 }
1034
1035 void
1036 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1037 {
1038 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1039 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1040
1041 fp->OriginUpperLeft = ir->origin_upper_left;
1042 fp->PixelCenterInteger = ir->pixel_center_integer;
1043 }
1044
1045 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1046 unsigned int i;
1047 const ir_state_slot *const slots = ir->state_slots;
1048 assert(ir->state_slots != NULL);
1049
1050 /* Check if this statevar's setup in the STATE file exactly
1051 * matches how we'll want to reference it as a
1052 * struct/array/whatever. If not, then we need to move it into
1053 * temporary storage and hope that it'll get copy-propagated
1054 * out.
1055 */
1056 for (i = 0; i < ir->num_state_slots; i++) {
1057 if (slots[i].swizzle != SWIZZLE_XYZW) {
1058 break;
1059 }
1060 }
1061
1062 variable_storage *storage;
1063 st_dst_reg dst;
1064 if (i == ir->num_state_slots) {
1065 /* We'll set the index later. */
1066 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1067 this->variables.push_tail(storage);
1068
1069 dst = undef_dst;
1070 } else {
1071 /* The variable_storage constructor allocates slots based on the size
1072 * of the type. However, this had better match the number of state
1073 * elements that we're going to copy into the new temporary.
1074 */
1075 assert((int) ir->num_state_slots == type_size(ir->type));
1076
1077 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
1078 this->next_temp);
1079 this->variables.push_tail(storage);
1080 this->next_temp += type_size(ir->type);
1081
1082 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index,
1083 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT));
1084 }
1085
1086
1087 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1088 int index = _mesa_add_state_reference(this->prog->Parameters,
1089 (gl_state_index *)slots[i].tokens);
1090
1091 if (storage->file == PROGRAM_STATE_VAR) {
1092 if (storage->index == -1) {
1093 storage->index = index;
1094 } else {
1095 assert(index == storage->index + (int)i);
1096 }
1097 } else {
1098 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1099 * the data being moved since MOV does not care about the type of
1100 * data it is moving, and we don't want to declare registers with
1101 * array or struct types.
1102 */
1103 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1104 src.swizzle = slots[i].swizzle;
1105 emit(ir, TGSI_OPCODE_MOV, dst, src);
1106 /* even a float takes up a whole vec4 reg in a struct/array. */
1107 dst.index++;
1108 }
1109 }
1110
1111 if (storage->file == PROGRAM_TEMPORARY &&
1112 dst.index != storage->index + (int) ir->num_state_slots) {
1113 fail_link(this->shader_program,
1114 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1115 ir->name, dst.index - storage->index,
1116 type_size(ir->type));
1117 }
1118 }
1119 }
1120
1121 void
1122 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1123 {
1124 ir_dereference_variable *counter = NULL;
1125
1126 if (ir->counter != NULL)
1127 counter = new(ir) ir_dereference_variable(ir->counter);
1128
1129 if (ir->from != NULL) {
1130 assert(ir->counter != NULL);
1131
1132 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1133
1134 a->accept(this);
1135 delete a;
1136 }
1137
1138 emit(NULL, TGSI_OPCODE_BGNLOOP);
1139
1140 if (ir->to) {
1141 ir_expression *e =
1142 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1143 counter, ir->to);
1144 ir_if *if_stmt = new(ir) ir_if(e);
1145
1146 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1147
1148 if_stmt->then_instructions.push_tail(brk);
1149
1150 if_stmt->accept(this);
1151
1152 delete if_stmt;
1153 delete e;
1154 delete brk;
1155 }
1156
1157 visit_exec_list(&ir->body_instructions, this);
1158
1159 if (ir->increment) {
1160 ir_expression *e =
1161 new(ir) ir_expression(ir_binop_add, counter->type,
1162 counter, ir->increment);
1163
1164 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1165
1166 a->accept(this);
1167 delete a;
1168 delete e;
1169 }
1170
1171 emit(NULL, TGSI_OPCODE_ENDLOOP);
1172 }
1173
1174 void
1175 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1176 {
1177 switch (ir->mode) {
1178 case ir_loop_jump::jump_break:
1179 emit(NULL, TGSI_OPCODE_BRK);
1180 break;
1181 case ir_loop_jump::jump_continue:
1182 emit(NULL, TGSI_OPCODE_CONT);
1183 break;
1184 }
1185 }
1186
1187
1188 void
1189 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1190 {
1191 assert(0);
1192 (void)ir;
1193 }
1194
1195 void
1196 glsl_to_tgsi_visitor::visit(ir_function *ir)
1197 {
1198 /* Ignore function bodies other than main() -- we shouldn't see calls to
1199 * them since they should all be inlined before we get to glsl_to_tgsi.
1200 */
1201 if (strcmp(ir->name, "main") == 0) {
1202 const ir_function_signature *sig;
1203 exec_list empty;
1204
1205 sig = ir->matching_signature(&empty);
1206
1207 assert(sig);
1208
1209 foreach_iter(exec_list_iterator, iter, sig->body) {
1210 ir_instruction *ir = (ir_instruction *)iter.get();
1211
1212 ir->accept(this);
1213 }
1214 }
1215 }
1216
1217 bool
1218 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1219 {
1220 int nonmul_operand = 1 - mul_operand;
1221 st_src_reg a, b, c;
1222 st_dst_reg result_dst;
1223
1224 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1225 if (!expr || expr->operation != ir_binop_mul)
1226 return false;
1227
1228 expr->operands[0]->accept(this);
1229 a = this->result;
1230 expr->operands[1]->accept(this);
1231 b = this->result;
1232 ir->operands[nonmul_operand]->accept(this);
1233 c = this->result;
1234
1235 this->result = get_temp(ir->type);
1236 result_dst = st_dst_reg(this->result);
1237 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1238 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1239
1240 return true;
1241 }
1242
1243 /**
1244 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1245 *
1246 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1247 * implemented using multiplication, and logical-or is implemented using
1248 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1249 * As result, the logical expression (a & !b) can be rewritten as:
1250 *
1251 * - a * !b
1252 * - a * (1 - b)
1253 * - (a * 1) - (a * b)
1254 * - a + -(a * b)
1255 * - a + (a * -b)
1256 *
1257 * This final expression can be implemented as a single MAD(a, -b, a)
1258 * instruction.
1259 */
1260 bool
1261 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1262 {
1263 const int other_operand = 1 - try_operand;
1264 st_src_reg a, b;
1265
1266 ir_expression *expr = ir->operands[try_operand]->as_expression();
1267 if (!expr || expr->operation != ir_unop_logic_not)
1268 return false;
1269
1270 ir->operands[other_operand]->accept(this);
1271 a = this->result;
1272 expr->operands[0]->accept(this);
1273 b = this->result;
1274
1275 b.negate = ~b.negate;
1276
1277 this->result = get_temp(ir->type);
1278 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1279
1280 return true;
1281 }
1282
1283 bool
1284 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1285 {
1286 /* Saturates were only introduced to vertex programs in
1287 * NV_vertex_program3, so don't give them to drivers in the VP.
1288 */
1289 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1290 return false;
1291
1292 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1293 if (!sat_src)
1294 return false;
1295
1296 sat_src->accept(this);
1297 st_src_reg src = this->result;
1298
1299 /* If we generated an expression instruction into a temporary in
1300 * processing the saturate's operand, apply the saturate to that
1301 * instruction. Otherwise, generate a MOV to do the saturate.
1302 *
1303 * Note that we have to be careful to only do this optimization if
1304 * the instruction in question was what generated src->result. For
1305 * example, ir_dereference_array might generate a MUL instruction
1306 * to create the reladdr, and return us a src reg using that
1307 * reladdr. That MUL result is not the value we're trying to
1308 * saturate.
1309 */
1310 ir_expression *sat_src_expr = sat_src->as_expression();
1311 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1312 sat_src_expr->operation == ir_binop_add ||
1313 sat_src_expr->operation == ir_binop_dot)) {
1314 glsl_to_tgsi_instruction *new_inst;
1315 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1316 new_inst->saturate = true;
1317 } else {
1318 this->result = get_temp(ir->type);
1319 st_dst_reg result_dst = st_dst_reg(this->result);
1320 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1321 glsl_to_tgsi_instruction *inst;
1322 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1323 inst->saturate = true;
1324 }
1325
1326 return true;
1327 }
1328
1329 void
1330 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1331 st_src_reg *reg, int *num_reladdr)
1332 {
1333 if (!reg->reladdr)
1334 return;
1335
1336 emit_arl(ir, address_reg, *reg->reladdr);
1337
1338 if (*num_reladdr != 1) {
1339 st_src_reg temp = get_temp(glsl_type::vec4_type);
1340
1341 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1342 *reg = temp;
1343 }
1344
1345 (*num_reladdr)--;
1346 }
1347
1348 void
1349 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1350 {
1351 unsigned int operand;
1352 st_src_reg op[Elements(ir->operands)];
1353 st_src_reg result_src;
1354 st_dst_reg result_dst;
1355
1356 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1357 */
1358 if (ir->operation == ir_binop_add) {
1359 if (try_emit_mad(ir, 1))
1360 return;
1361 if (try_emit_mad(ir, 0))
1362 return;
1363 }
1364
1365 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1366 */
1367 if (ir->operation == ir_binop_logic_and) {
1368 if (try_emit_mad_for_and_not(ir, 1))
1369 return;
1370 if (try_emit_mad_for_and_not(ir, 0))
1371 return;
1372 }
1373
1374 if (try_emit_sat(ir))
1375 return;
1376
1377 if (ir->operation == ir_quadop_vector)
1378 assert(!"ir_quadop_vector should have been lowered");
1379
1380 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1381 this->result.file = PROGRAM_UNDEFINED;
1382 ir->operands[operand]->accept(this);
1383 if (this->result.file == PROGRAM_UNDEFINED) {
1384 ir_print_visitor v;
1385 printf("Failed to get tree for expression operand:\n");
1386 ir->operands[operand]->accept(&v);
1387 exit(1);
1388 }
1389 op[operand] = this->result;
1390
1391 /* Matrix expression operands should have been broken down to vector
1392 * operations already.
1393 */
1394 assert(!ir->operands[operand]->type->is_matrix());
1395 }
1396
1397 int vector_elements = ir->operands[0]->type->vector_elements;
1398 if (ir->operands[1]) {
1399 vector_elements = MAX2(vector_elements,
1400 ir->operands[1]->type->vector_elements);
1401 }
1402
1403 this->result.file = PROGRAM_UNDEFINED;
1404
1405 /* Storage for our result. Ideally for an assignment we'd be using
1406 * the actual storage for the result here, instead.
1407 */
1408 result_src = get_temp(ir->type);
1409 /* convenience for the emit functions below. */
1410 result_dst = st_dst_reg(result_src);
1411 /* Limit writes to the channels that will be used by result_src later.
1412 * This does limit this temp's use as a temporary for multi-instruction
1413 * sequences.
1414 */
1415 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1416
1417 switch (ir->operation) {
1418 case ir_unop_logic_not:
1419 if (result_dst.type != GLSL_TYPE_FLOAT)
1420 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1421 else {
1422 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1423 * older GPUs implement SEQ using multiple instructions (i915 uses two
1424 * SGE instructions and a MUL instruction). Since our logic values are
1425 * 0.0 and 1.0, 1-x also implements !x.
1426 */
1427 op[0].negate = ~op[0].negate;
1428 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1429 }
1430 break;
1431 case ir_unop_neg:
1432 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1433 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1434 else {
1435 op[0].negate = ~op[0].negate;
1436 result_src = op[0];
1437 }
1438 break;
1439 case ir_unop_abs:
1440 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1441 break;
1442 case ir_unop_sign:
1443 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1444 break;
1445 case ir_unop_rcp:
1446 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1447 break;
1448
1449 case ir_unop_exp2:
1450 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1451 break;
1452 case ir_unop_exp:
1453 case ir_unop_log:
1454 assert(!"not reached: should be handled by ir_explog_to_explog2");
1455 break;
1456 case ir_unop_log2:
1457 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1458 break;
1459 case ir_unop_sin:
1460 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1461 break;
1462 case ir_unop_cos:
1463 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1464 break;
1465 case ir_unop_sin_reduced:
1466 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1467 break;
1468 case ir_unop_cos_reduced:
1469 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1470 break;
1471
1472 case ir_unop_dFdx:
1473 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1474 break;
1475 case ir_unop_dFdy:
1476 {
1477 /* The X component contains 1 or -1 depending on whether the framebuffer
1478 * is a FBO or the window system buffer, respectively.
1479 * It is then multiplied with the source operand of DDY.
1480 */
1481 static const gl_state_index transform_y_state[STATE_LENGTH]
1482 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1483
1484 unsigned transform_y_index =
1485 _mesa_add_state_reference(this->prog->Parameters,
1486 transform_y_state);
1487
1488 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1489 transform_y_index,
1490 glsl_type::vec4_type);
1491 transform_y.swizzle = SWIZZLE_XXXX;
1492
1493 st_src_reg temp = get_temp(glsl_type::vec4_type);
1494
1495 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1496 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1497 break;
1498 }
1499
1500 case ir_unop_noise: {
1501 /* At some point, a motivated person could add a better
1502 * implementation of noise. Currently not even the nvidia
1503 * binary drivers do anything more than this. In any case, the
1504 * place to do this is in the GL state tracker, not the poor
1505 * driver.
1506 */
1507 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1508 break;
1509 }
1510
1511 case ir_binop_add:
1512 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1513 break;
1514 case ir_binop_sub:
1515 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1516 break;
1517
1518 case ir_binop_mul:
1519 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1520 break;
1521 case ir_binop_div:
1522 if (result_dst.type == GLSL_TYPE_FLOAT)
1523 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1524 else
1525 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1526 break;
1527 case ir_binop_mod:
1528 if (result_dst.type == GLSL_TYPE_FLOAT)
1529 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1530 else
1531 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1532 break;
1533
1534 case ir_binop_less:
1535 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1536 break;
1537 case ir_binop_greater:
1538 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1539 break;
1540 case ir_binop_lequal:
1541 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1542 break;
1543 case ir_binop_gequal:
1544 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1545 break;
1546 case ir_binop_equal:
1547 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1548 break;
1549 case ir_binop_nequal:
1550 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1551 break;
1552 case ir_binop_all_equal:
1553 /* "==" operator producing a scalar boolean. */
1554 if (ir->operands[0]->type->is_vector() ||
1555 ir->operands[1]->type->is_vector()) {
1556 st_src_reg temp = get_temp(native_integers ?
1557 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1558 glsl_type::vec4_type);
1559
1560 if (native_integers) {
1561 st_dst_reg temp_dst = st_dst_reg(temp);
1562 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1563
1564 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1565
1566 /* Emit 1-3 AND operations to combine the SEQ results. */
1567 switch (ir->operands[0]->type->vector_elements) {
1568 case 2:
1569 break;
1570 case 3:
1571 temp_dst.writemask = WRITEMASK_Y;
1572 temp1.swizzle = SWIZZLE_YYYY;
1573 temp2.swizzle = SWIZZLE_ZZZZ;
1574 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1575 break;
1576 case 4:
1577 temp_dst.writemask = WRITEMASK_X;
1578 temp1.swizzle = SWIZZLE_XXXX;
1579 temp2.swizzle = SWIZZLE_YYYY;
1580 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1581 temp_dst.writemask = WRITEMASK_Y;
1582 temp1.swizzle = SWIZZLE_ZZZZ;
1583 temp2.swizzle = SWIZZLE_WWWW;
1584 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1585 }
1586
1587 temp1.swizzle = SWIZZLE_XXXX;
1588 temp2.swizzle = SWIZZLE_YYYY;
1589 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1590 } else {
1591 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1592
1593 /* After the dot-product, the value will be an integer on the
1594 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1595 */
1596 emit_dp(ir, result_dst, temp, temp, vector_elements);
1597
1598 /* Negating the result of the dot-product gives values on the range
1599 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1600 * This is achieved using SGE.
1601 */
1602 st_src_reg sge_src = result_src;
1603 sge_src.negate = ~sge_src.negate;
1604 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1605 }
1606 } else {
1607 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1608 }
1609 break;
1610 case ir_binop_any_nequal:
1611 /* "!=" operator producing a scalar boolean. */
1612 if (ir->operands[0]->type->is_vector() ||
1613 ir->operands[1]->type->is_vector()) {
1614 st_src_reg temp = get_temp(native_integers ?
1615 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1616 glsl_type::vec4_type);
1617 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1618
1619 if (native_integers) {
1620 st_dst_reg temp_dst = st_dst_reg(temp);
1621 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1622
1623 /* Emit 1-3 OR operations to combine the SNE results. */
1624 switch (ir->operands[0]->type->vector_elements) {
1625 case 2:
1626 break;
1627 case 3:
1628 temp_dst.writemask = WRITEMASK_Y;
1629 temp1.swizzle = SWIZZLE_YYYY;
1630 temp2.swizzle = SWIZZLE_ZZZZ;
1631 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1632 break;
1633 case 4:
1634 temp_dst.writemask = WRITEMASK_X;
1635 temp1.swizzle = SWIZZLE_XXXX;
1636 temp2.swizzle = SWIZZLE_YYYY;
1637 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1638 temp_dst.writemask = WRITEMASK_Y;
1639 temp1.swizzle = SWIZZLE_ZZZZ;
1640 temp2.swizzle = SWIZZLE_WWWW;
1641 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1642 }
1643
1644 temp1.swizzle = SWIZZLE_XXXX;
1645 temp2.swizzle = SWIZZLE_YYYY;
1646 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1647 } else {
1648 /* After the dot-product, the value will be an integer on the
1649 * range [0,4]. Zero stays zero, and positive values become 1.0.
1650 */
1651 glsl_to_tgsi_instruction *const dp =
1652 emit_dp(ir, result_dst, temp, temp, vector_elements);
1653 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1654 /* The clamping to [0,1] can be done for free in the fragment
1655 * shader with a saturate.
1656 */
1657 dp->saturate = true;
1658 } else {
1659 /* Negating the result of the dot-product gives values on the range
1660 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1661 * achieved using SLT.
1662 */
1663 st_src_reg slt_src = result_src;
1664 slt_src.negate = ~slt_src.negate;
1665 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1666 }
1667 }
1668 } else {
1669 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1670 }
1671 break;
1672
1673 case ir_unop_any: {
1674 assert(ir->operands[0]->type->is_vector());
1675
1676 /* After the dot-product, the value will be an integer on the
1677 * range [0,4]. Zero stays zero, and positive values become 1.0.
1678 */
1679 glsl_to_tgsi_instruction *const dp =
1680 emit_dp(ir, result_dst, op[0], op[0],
1681 ir->operands[0]->type->vector_elements);
1682 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1683 result_dst.type == GLSL_TYPE_FLOAT) {
1684 /* The clamping to [0,1] can be done for free in the fragment
1685 * shader with a saturate.
1686 */
1687 dp->saturate = true;
1688 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1689 /* Negating the result of the dot-product gives values on the range
1690 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1691 * is achieved using SLT.
1692 */
1693 st_src_reg slt_src = result_src;
1694 slt_src.negate = ~slt_src.negate;
1695 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1696 }
1697 else {
1698 /* Use SNE 0 if integers are being used as boolean values. */
1699 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1700 }
1701 break;
1702 }
1703
1704 case ir_binop_logic_xor:
1705 if (native_integers)
1706 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1707 else
1708 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1709 break;
1710
1711 case ir_binop_logic_or: {
1712 if (native_integers) {
1713 /* If integers are used as booleans, we can use an actual "or"
1714 * instruction.
1715 */
1716 assert(native_integers);
1717 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1718 } else {
1719 /* After the addition, the value will be an integer on the
1720 * range [0,2]. Zero stays zero, and positive values become 1.0.
1721 */
1722 glsl_to_tgsi_instruction *add =
1723 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1724 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1725 /* The clamping to [0,1] can be done for free in the fragment
1726 * shader with a saturate if floats are being used as boolean values.
1727 */
1728 add->saturate = true;
1729 } else {
1730 /* Negating the result of the addition gives values on the range
1731 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1732 * is achieved using SLT.
1733 */
1734 st_src_reg slt_src = result_src;
1735 slt_src.negate = ~slt_src.negate;
1736 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1737 }
1738 }
1739 break;
1740 }
1741
1742 case ir_binop_logic_and:
1743 /* If native integers are disabled, the bool args are stored as float 0.0
1744 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1745 * actual AND opcode.
1746 */
1747 if (native_integers)
1748 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1749 else
1750 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1751 break;
1752
1753 case ir_binop_dot:
1754 assert(ir->operands[0]->type->is_vector());
1755 assert(ir->operands[0]->type == ir->operands[1]->type);
1756 emit_dp(ir, result_dst, op[0], op[1],
1757 ir->operands[0]->type->vector_elements);
1758 break;
1759
1760 case ir_unop_sqrt:
1761 /* sqrt(x) = x * rsq(x). */
1762 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1763 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1764 /* For incoming channels <= 0, set the result to 0. */
1765 op[0].negate = ~op[0].negate;
1766 emit(ir, TGSI_OPCODE_CMP, result_dst,
1767 op[0], result_src, st_src_reg_for_float(0.0));
1768 break;
1769 case ir_unop_rsq:
1770 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1771 break;
1772 case ir_unop_i2f:
1773 if (native_integers) {
1774 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1775 break;
1776 }
1777 /* fallthrough to next case otherwise */
1778 case ir_unop_b2f:
1779 if (native_integers) {
1780 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1781 break;
1782 }
1783 /* fallthrough to next case otherwise */
1784 case ir_unop_i2u:
1785 case ir_unop_u2i:
1786 /* Converting between signed and unsigned integers is a no-op. */
1787 result_src = op[0];
1788 break;
1789 case ir_unop_b2i:
1790 if (native_integers) {
1791 /* Booleans are stored as integers using ~0 for true and 0 for false.
1792 * GLSL requires that int(bool) return 1 for true and 0 for false.
1793 * This conversion is done with AND, but it could be done with NEG.
1794 */
1795 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1796 } else {
1797 /* Booleans and integers are both stored as floats when native
1798 * integers are disabled.
1799 */
1800 result_src = op[0];
1801 }
1802 break;
1803 case ir_unop_f2i:
1804 if (native_integers)
1805 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1806 else
1807 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1808 break;
1809 case ir_unop_f2u:
1810 if (native_integers)
1811 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1812 else
1813 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1814 break;
1815 case ir_unop_bitcast_f2i:
1816 case ir_unop_bitcast_f2u:
1817 case ir_unop_bitcast_i2f:
1818 case ir_unop_bitcast_u2f:
1819 result_src = op[0];
1820 break;
1821 case ir_unop_f2b:
1822 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1823 break;
1824 case ir_unop_i2b:
1825 if (native_integers)
1826 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1827 else
1828 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1829 break;
1830 case ir_unop_trunc:
1831 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1832 break;
1833 case ir_unop_ceil:
1834 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1835 break;
1836 case ir_unop_floor:
1837 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1838 break;
1839 case ir_unop_round_even:
1840 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1841 break;
1842 case ir_unop_fract:
1843 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1844 break;
1845
1846 case ir_binop_min:
1847 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1848 break;
1849 case ir_binop_max:
1850 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1851 break;
1852 case ir_binop_pow:
1853 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1854 break;
1855
1856 case ir_unop_bit_not:
1857 if (native_integers) {
1858 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1859 break;
1860 }
1861 case ir_unop_u2f:
1862 if (native_integers) {
1863 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1864 break;
1865 }
1866 case ir_binop_lshift:
1867 if (native_integers) {
1868 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1869 break;
1870 }
1871 case ir_binop_rshift:
1872 if (native_integers) {
1873 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1874 break;
1875 }
1876 case ir_binop_bit_and:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1879 break;
1880 }
1881 case ir_binop_bit_xor:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1884 break;
1885 }
1886 case ir_binop_bit_or:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1889 break;
1890 }
1891
1892 assert(!"GLSL 1.30 features unsupported");
1893 break;
1894
1895 case ir_binop_ubo_load: {
1896 ir_constant *uniform_block = ir->operands[0]->as_constant();
1897 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1898 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1899 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1900 st_src_reg cbuf;
1901
1902 cbuf.type = glsl_type::vec4_type->base_type;
1903 cbuf.file = PROGRAM_CONSTANT;
1904 cbuf.index = 0;
1905 cbuf.index2D = uniform_block->value.u[0] + 1;
1906 cbuf.reladdr = NULL;
1907 cbuf.negate = 0;
1908
1909 assert(ir->type->is_vector() || ir->type->is_scalar());
1910
1911 if (const_offset_ir) {
1912 index_reg = st_src_reg_for_int(const_offset / 16);
1913 } else {
1914 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1915 }
1916
1917 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1918 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1919 const_offset % 16 / 4,
1920 const_offset % 16 / 4,
1921 const_offset % 16 / 4);
1922
1923 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1924 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1925
1926 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1927 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1928 result_src.negate = 1;
1929 emit(ir, TGSI_OPCODE_UCMP, result_dst, result_src, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1930 } else {
1931 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1932 }
1933 break;
1934 }
1935 case ir_quadop_vector:
1936 /* This operation should have already been handled.
1937 */
1938 assert(!"Should not get here.");
1939 break;
1940 }
1941
1942 this->result = result_src;
1943 }
1944
1945
1946 void
1947 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1948 {
1949 st_src_reg src;
1950 int i;
1951 int swizzle[4];
1952
1953 /* Note that this is only swizzles in expressions, not those on the left
1954 * hand side of an assignment, which do write masking. See ir_assignment
1955 * for that.
1956 */
1957
1958 ir->val->accept(this);
1959 src = this->result;
1960 assert(src.file != PROGRAM_UNDEFINED);
1961
1962 for (i = 0; i < 4; i++) {
1963 if (i < ir->type->vector_elements) {
1964 switch (i) {
1965 case 0:
1966 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1967 break;
1968 case 1:
1969 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1970 break;
1971 case 2:
1972 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1973 break;
1974 case 3:
1975 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1976 break;
1977 }
1978 } else {
1979 /* If the type is smaller than a vec4, replicate the last
1980 * channel out.
1981 */
1982 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1983 }
1984 }
1985
1986 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1987
1988 this->result = src;
1989 }
1990
1991 void
1992 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1993 {
1994 variable_storage *entry = find_variable_storage(ir->var);
1995 ir_variable *var = ir->var;
1996
1997 if (!entry) {
1998 switch (var->mode) {
1999 case ir_var_uniform:
2000 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2001 var->location);
2002 this->variables.push_tail(entry);
2003 break;
2004 case ir_var_shader_in:
2005 /* The linker assigns locations for varyings and attributes,
2006 * including deprecated builtins (like gl_Color), user-assign
2007 * generic attributes (glBindVertexLocation), and
2008 * user-defined varyings.
2009 */
2010 assert(var->location != -1);
2011 entry = new(mem_ctx) variable_storage(var,
2012 PROGRAM_INPUT,
2013 var->location);
2014 break;
2015 case ir_var_shader_out:
2016 assert(var->location != -1);
2017 entry = new(mem_ctx) variable_storage(var,
2018 PROGRAM_OUTPUT,
2019 var->location + var->index);
2020 break;
2021 case ir_var_system_value:
2022 entry = new(mem_ctx) variable_storage(var,
2023 PROGRAM_SYSTEM_VALUE,
2024 var->location);
2025 break;
2026 case ir_var_auto:
2027 case ir_var_temporary:
2028 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
2029 this->next_temp);
2030 this->variables.push_tail(entry);
2031
2032 next_temp += type_size(var->type);
2033 break;
2034 }
2035
2036 if (!entry) {
2037 printf("Failed to make storage for %s\n", var->name);
2038 exit(1);
2039 }
2040 }
2041
2042 this->result = st_src_reg(entry->file, entry->index, var->type);
2043 if (!native_integers)
2044 this->result.type = GLSL_TYPE_FLOAT;
2045 }
2046
2047 void
2048 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2049 {
2050 ir_constant *index;
2051 st_src_reg src;
2052 int element_size = type_size(ir->type);
2053
2054 index = ir->array_index->constant_expression_value();
2055
2056 ir->array->accept(this);
2057 src = this->result;
2058
2059 if (index) {
2060 src.index += index->value.i[0] * element_size;
2061 } else {
2062 /* Variable index array dereference. It eats the "vec4" of the
2063 * base of the array and an index that offsets the TGSI register
2064 * index.
2065 */
2066 ir->array_index->accept(this);
2067
2068 st_src_reg index_reg;
2069
2070 if (element_size == 1) {
2071 index_reg = this->result;
2072 } else {
2073 index_reg = get_temp(native_integers ?
2074 glsl_type::int_type : glsl_type::float_type);
2075
2076 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2077 this->result, st_src_reg_for_type(index_reg.type, element_size));
2078 }
2079
2080 /* If there was already a relative address register involved, add the
2081 * new and the old together to get the new offset.
2082 */
2083 if (src.reladdr != NULL) {
2084 st_src_reg accum_reg = get_temp(native_integers ?
2085 glsl_type::int_type : glsl_type::float_type);
2086
2087 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2088 index_reg, *src.reladdr);
2089
2090 index_reg = accum_reg;
2091 }
2092
2093 src.reladdr = ralloc(mem_ctx, st_src_reg);
2094 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2095 }
2096
2097 /* If the type is smaller than a vec4, replicate the last channel out. */
2098 if (ir->type->is_scalar() || ir->type->is_vector())
2099 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2100 else
2101 src.swizzle = SWIZZLE_NOOP;
2102
2103 /* Change the register type to the element type of the array. */
2104 src.type = ir->type->base_type;
2105
2106 this->result = src;
2107 }
2108
2109 void
2110 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2111 {
2112 unsigned int i;
2113 const glsl_type *struct_type = ir->record->type;
2114 int offset = 0;
2115
2116 ir->record->accept(this);
2117
2118 for (i = 0; i < struct_type->length; i++) {
2119 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2120 break;
2121 offset += type_size(struct_type->fields.structure[i].type);
2122 }
2123
2124 /* If the type is smaller than a vec4, replicate the last channel out. */
2125 if (ir->type->is_scalar() || ir->type->is_vector())
2126 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2127 else
2128 this->result.swizzle = SWIZZLE_NOOP;
2129
2130 this->result.index += offset;
2131 this->result.type = ir->type->base_type;
2132 }
2133
2134 /**
2135 * We want to be careful in assignment setup to hit the actual storage
2136 * instead of potentially using a temporary like we might with the
2137 * ir_dereference handler.
2138 */
2139 static st_dst_reg
2140 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2141 {
2142 /* The LHS must be a dereference. If the LHS is a variable indexed array
2143 * access of a vector, it must be separated into a series conditional moves
2144 * before reaching this point (see ir_vec_index_to_cond_assign).
2145 */
2146 assert(ir->as_dereference());
2147 ir_dereference_array *deref_array = ir->as_dereference_array();
2148 if (deref_array) {
2149 assert(!deref_array->array->type->is_vector());
2150 }
2151
2152 /* Use the rvalue deref handler for the most part. We'll ignore
2153 * swizzles in it and write swizzles using writemask, though.
2154 */
2155 ir->accept(v);
2156 return st_dst_reg(v->result);
2157 }
2158
2159 /**
2160 * Process the condition of a conditional assignment
2161 *
2162 * Examines the condition of a conditional assignment to generate the optimal
2163 * first operand of a \c CMP instruction. If the condition is a relational
2164 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2165 * used as the source for the \c CMP instruction. Otherwise the comparison
2166 * is processed to a boolean result, and the boolean result is used as the
2167 * operand to the CMP instruction.
2168 */
2169 bool
2170 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2171 {
2172 ir_rvalue *src_ir = ir;
2173 bool negate = true;
2174 bool switch_order = false;
2175
2176 ir_expression *const expr = ir->as_expression();
2177 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2178 bool zero_on_left = false;
2179
2180 if (expr->operands[0]->is_zero()) {
2181 src_ir = expr->operands[1];
2182 zero_on_left = true;
2183 } else if (expr->operands[1]->is_zero()) {
2184 src_ir = expr->operands[0];
2185 zero_on_left = false;
2186 }
2187
2188 /* a is - 0 + - 0 +
2189 * (a < 0) T F F ( a < 0) T F F
2190 * (0 < a) F F T (-a < 0) F F T
2191 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2192 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2193 * (a > 0) F F T (-a < 0) F F T
2194 * (0 > a) T F F ( a < 0) T F F
2195 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2196 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2197 *
2198 * Note that exchanging the order of 0 and 'a' in the comparison simply
2199 * means that the value of 'a' should be negated.
2200 */
2201 if (src_ir != ir) {
2202 switch (expr->operation) {
2203 case ir_binop_less:
2204 switch_order = false;
2205 negate = zero_on_left;
2206 break;
2207
2208 case ir_binop_greater:
2209 switch_order = false;
2210 negate = !zero_on_left;
2211 break;
2212
2213 case ir_binop_lequal:
2214 switch_order = true;
2215 negate = !zero_on_left;
2216 break;
2217
2218 case ir_binop_gequal:
2219 switch_order = true;
2220 negate = zero_on_left;
2221 break;
2222
2223 default:
2224 /* This isn't the right kind of comparison afterall, so make sure
2225 * the whole condition is visited.
2226 */
2227 src_ir = ir;
2228 break;
2229 }
2230 }
2231 }
2232
2233 src_ir->accept(this);
2234
2235 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2236 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2237 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2238 * computing the condition.
2239 */
2240 if (negate)
2241 this->result.negate = ~this->result.negate;
2242
2243 return switch_order;
2244 }
2245
2246 void
2247 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2248 st_dst_reg *l, st_src_reg *r)
2249 {
2250 if (type->base_type == GLSL_TYPE_STRUCT) {
2251 for (unsigned int i = 0; i < type->length; i++) {
2252 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2253 }
2254 return;
2255 }
2256
2257 if (type->is_array()) {
2258 for (unsigned int i = 0; i < type->length; i++) {
2259 emit_block_mov(ir, type->fields.array, l, r);
2260 }
2261 return;
2262 }
2263
2264 if (type->is_matrix()) {
2265 const struct glsl_type *vec_type;
2266
2267 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2268 type->vector_elements, 1);
2269
2270 for (int i = 0; i < type->matrix_columns; i++) {
2271 emit_block_mov(ir, vec_type, l, r);
2272 }
2273 return;
2274 }
2275
2276 assert(type->is_scalar() || type->is_vector());
2277
2278 r->type = type->base_type;
2279 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2280 l->index++;
2281 r->index++;
2282 }
2283
2284 void
2285 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2286 {
2287 st_dst_reg l;
2288 st_src_reg r;
2289 int i;
2290
2291 ir->rhs->accept(this);
2292 r = this->result;
2293
2294 l = get_assignment_lhs(ir->lhs, this);
2295
2296 /* FINISHME: This should really set to the correct maximal writemask for each
2297 * FINISHME: component written (in the loops below). This case can only
2298 * FINISHME: occur for matrices, arrays, and structures.
2299 */
2300 if (ir->write_mask == 0) {
2301 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2302 l.writemask = WRITEMASK_XYZW;
2303 } else if (ir->lhs->type->is_scalar() &&
2304 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2305 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2306 * FINISHME: W component of fragment shader output zero, work correctly.
2307 */
2308 l.writemask = WRITEMASK_XYZW;
2309 } else {
2310 int swizzles[4];
2311 int first_enabled_chan = 0;
2312 int rhs_chan = 0;
2313
2314 l.writemask = ir->write_mask;
2315
2316 for (int i = 0; i < 4; i++) {
2317 if (l.writemask & (1 << i)) {
2318 first_enabled_chan = GET_SWZ(r.swizzle, i);
2319 break;
2320 }
2321 }
2322
2323 /* Swizzle a small RHS vector into the channels being written.
2324 *
2325 * glsl ir treats write_mask as dictating how many channels are
2326 * present on the RHS while TGSI treats write_mask as just
2327 * showing which channels of the vec4 RHS get written.
2328 */
2329 for (int i = 0; i < 4; i++) {
2330 if (l.writemask & (1 << i))
2331 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2332 else
2333 swizzles[i] = first_enabled_chan;
2334 }
2335 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2336 swizzles[2], swizzles[3]);
2337 }
2338
2339 assert(l.file != PROGRAM_UNDEFINED);
2340 assert(r.file != PROGRAM_UNDEFINED);
2341
2342 if (ir->condition) {
2343 const bool switch_order = this->process_move_condition(ir->condition);
2344 st_src_reg condition = this->result;
2345
2346 for (i = 0; i < type_size(ir->lhs->type); i++) {
2347 st_src_reg l_src = st_src_reg(l);
2348 st_src_reg condition_temp = condition;
2349 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2350
2351 if (native_integers) {
2352 /* This is necessary because TGSI's CMP instruction expects the
2353 * condition to be a float, and we store booleans as integers.
2354 * If TGSI had a UCMP instruction or similar, this extra
2355 * instruction would not be necessary.
2356 */
2357 condition_temp = get_temp(glsl_type::vec4_type);
2358 condition.negate = 0;
2359 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2360 condition_temp.swizzle = condition.swizzle;
2361 }
2362
2363 if (switch_order) {
2364 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2365 } else {
2366 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2367 }
2368
2369 l.index++;
2370 r.index++;
2371 }
2372 } else if (ir->rhs->as_expression() &&
2373 this->instructions.get_tail() &&
2374 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2375 type_size(ir->lhs->type) == 1 &&
2376 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2377 /* To avoid emitting an extra MOV when assigning an expression to a
2378 * variable, emit the last instruction of the expression again, but
2379 * replace the destination register with the target of the assignment.
2380 * Dead code elimination will remove the original instruction.
2381 */
2382 glsl_to_tgsi_instruction *inst, *new_inst;
2383 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2384 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2385 new_inst->saturate = inst->saturate;
2386 inst->dead_mask = inst->dst.writemask;
2387 } else {
2388 emit_block_mov(ir, ir->rhs->type, &l, &r);
2389 }
2390 }
2391
2392
2393 void
2394 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2395 {
2396 st_src_reg src;
2397 GLfloat stack_vals[4] = { 0 };
2398 gl_constant_value *values = (gl_constant_value *) stack_vals;
2399 GLenum gl_type = GL_NONE;
2400 unsigned int i;
2401 static int in_array = 0;
2402 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2403
2404 /* Unfortunately, 4 floats is all we can get into
2405 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2406 * aggregate constant and move each constant value into it. If we
2407 * get lucky, copy propagation will eliminate the extra moves.
2408 */
2409 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2410 st_src_reg temp_base = get_temp(ir->type);
2411 st_dst_reg temp = st_dst_reg(temp_base);
2412
2413 foreach_iter(exec_list_iterator, iter, ir->components) {
2414 ir_constant *field_value = (ir_constant *)iter.get();
2415 int size = type_size(field_value->type);
2416
2417 assert(size > 0);
2418
2419 field_value->accept(this);
2420 src = this->result;
2421
2422 for (i = 0; i < (unsigned int)size; i++) {
2423 emit(ir, TGSI_OPCODE_MOV, temp, src);
2424
2425 src.index++;
2426 temp.index++;
2427 }
2428 }
2429 this->result = temp_base;
2430 return;
2431 }
2432
2433 if (ir->type->is_array()) {
2434 st_src_reg temp_base = get_temp(ir->type);
2435 st_dst_reg temp = st_dst_reg(temp_base);
2436 int size = type_size(ir->type->fields.array);
2437
2438 assert(size > 0);
2439 in_array++;
2440
2441 for (i = 0; i < ir->type->length; i++) {
2442 ir->array_elements[i]->accept(this);
2443 src = this->result;
2444 for (int j = 0; j < size; j++) {
2445 emit(ir, TGSI_OPCODE_MOV, temp, src);
2446
2447 src.index++;
2448 temp.index++;
2449 }
2450 }
2451 this->result = temp_base;
2452 in_array--;
2453 return;
2454 }
2455
2456 if (ir->type->is_matrix()) {
2457 st_src_reg mat = get_temp(ir->type);
2458 st_dst_reg mat_column = st_dst_reg(mat);
2459
2460 for (i = 0; i < ir->type->matrix_columns; i++) {
2461 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2462 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2463
2464 src = st_src_reg(file, -1, ir->type->base_type);
2465 src.index = add_constant(file,
2466 values,
2467 ir->type->vector_elements,
2468 GL_FLOAT,
2469 &src.swizzle);
2470 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2471
2472 mat_column.index++;
2473 }
2474
2475 this->result = mat;
2476 return;
2477 }
2478
2479 switch (ir->type->base_type) {
2480 case GLSL_TYPE_FLOAT:
2481 gl_type = GL_FLOAT;
2482 for (i = 0; i < ir->type->vector_elements; i++) {
2483 values[i].f = ir->value.f[i];
2484 }
2485 break;
2486 case GLSL_TYPE_UINT:
2487 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2488 for (i = 0; i < ir->type->vector_elements; i++) {
2489 if (native_integers)
2490 values[i].u = ir->value.u[i];
2491 else
2492 values[i].f = ir->value.u[i];
2493 }
2494 break;
2495 case GLSL_TYPE_INT:
2496 gl_type = native_integers ? GL_INT : GL_FLOAT;
2497 for (i = 0; i < ir->type->vector_elements; i++) {
2498 if (native_integers)
2499 values[i].i = ir->value.i[i];
2500 else
2501 values[i].f = ir->value.i[i];
2502 }
2503 break;
2504 case GLSL_TYPE_BOOL:
2505 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2506 for (i = 0; i < ir->type->vector_elements; i++) {
2507 if (native_integers)
2508 values[i].u = ir->value.b[i] ? ~0 : 0;
2509 else
2510 values[i].f = ir->value.b[i];
2511 }
2512 break;
2513 default:
2514 assert(!"Non-float/uint/int/bool constant");
2515 }
2516
2517 this->result = st_src_reg(file, -1, ir->type);
2518 this->result.index = add_constant(file,
2519 values,
2520 ir->type->vector_elements,
2521 gl_type,
2522 &this->result.swizzle);
2523 }
2524
2525 function_entry *
2526 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2527 {
2528 function_entry *entry;
2529
2530 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2531 entry = (function_entry *)iter.get();
2532
2533 if (entry->sig == sig)
2534 return entry;
2535 }
2536
2537 entry = ralloc(mem_ctx, function_entry);
2538 entry->sig = sig;
2539 entry->sig_id = this->next_signature_id++;
2540 entry->bgn_inst = NULL;
2541
2542 /* Allocate storage for all the parameters. */
2543 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2544 ir_variable *param = (ir_variable *)iter.get();
2545 variable_storage *storage;
2546
2547 storage = find_variable_storage(param);
2548 assert(!storage);
2549
2550 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2551 this->next_temp);
2552 this->variables.push_tail(storage);
2553
2554 this->next_temp += type_size(param->type);
2555 }
2556
2557 if (!sig->return_type->is_void()) {
2558 entry->return_reg = get_temp(sig->return_type);
2559 } else {
2560 entry->return_reg = undef_src;
2561 }
2562
2563 this->function_signatures.push_tail(entry);
2564 return entry;
2565 }
2566
2567 void
2568 glsl_to_tgsi_visitor::visit(ir_call *ir)
2569 {
2570 glsl_to_tgsi_instruction *call_inst;
2571 ir_function_signature *sig = ir->callee;
2572 function_entry *entry = get_function_signature(sig);
2573 int i;
2574
2575 /* Process in parameters. */
2576 exec_list_iterator sig_iter = sig->parameters.iterator();
2577 foreach_iter(exec_list_iterator, iter, *ir) {
2578 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2579 ir_variable *param = (ir_variable *)sig_iter.get();
2580
2581 if (param->mode == ir_var_function_in ||
2582 param->mode == ir_var_function_inout) {
2583 variable_storage *storage = find_variable_storage(param);
2584 assert(storage);
2585
2586 param_rval->accept(this);
2587 st_src_reg r = this->result;
2588
2589 st_dst_reg l;
2590 l.file = storage->file;
2591 l.index = storage->index;
2592 l.reladdr = NULL;
2593 l.writemask = WRITEMASK_XYZW;
2594 l.cond_mask = COND_TR;
2595
2596 for (i = 0; i < type_size(param->type); i++) {
2597 emit(ir, TGSI_OPCODE_MOV, l, r);
2598 l.index++;
2599 r.index++;
2600 }
2601 }
2602
2603 sig_iter.next();
2604 }
2605 assert(!sig_iter.has_next());
2606
2607 /* Emit call instruction */
2608 call_inst = emit(ir, TGSI_OPCODE_CAL);
2609 call_inst->function = entry;
2610
2611 /* Process out parameters. */
2612 sig_iter = sig->parameters.iterator();
2613 foreach_iter(exec_list_iterator, iter, *ir) {
2614 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2615 ir_variable *param = (ir_variable *)sig_iter.get();
2616
2617 if (param->mode == ir_var_function_out ||
2618 param->mode == ir_var_function_inout) {
2619 variable_storage *storage = find_variable_storage(param);
2620 assert(storage);
2621
2622 st_src_reg r;
2623 r.file = storage->file;
2624 r.index = storage->index;
2625 r.reladdr = NULL;
2626 r.swizzle = SWIZZLE_NOOP;
2627 r.negate = 0;
2628
2629 param_rval->accept(this);
2630 st_dst_reg l = st_dst_reg(this->result);
2631
2632 for (i = 0; i < type_size(param->type); i++) {
2633 emit(ir, TGSI_OPCODE_MOV, l, r);
2634 l.index++;
2635 r.index++;
2636 }
2637 }
2638
2639 sig_iter.next();
2640 }
2641 assert(!sig_iter.has_next());
2642
2643 /* Process return value. */
2644 this->result = entry->return_reg;
2645 }
2646
2647 void
2648 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2649 {
2650 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset;
2651 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2652 glsl_to_tgsi_instruction *inst = NULL;
2653 unsigned opcode = TGSI_OPCODE_NOP;
2654 const glsl_type *sampler_type = ir->sampler->type;
2655 bool is_cube_array = false;
2656
2657 /* if we are a cube array sampler */
2658 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2659 sampler_type->sampler_array)) {
2660 is_cube_array = true;
2661 }
2662
2663 if (ir->coordinate) {
2664 ir->coordinate->accept(this);
2665
2666 /* Put our coords in a temp. We'll need to modify them for shadow,
2667 * projection, or LOD, so the only case we'd use it as is is if
2668 * we're doing plain old texturing. The optimization passes on
2669 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2670 */
2671 coord = get_temp(glsl_type::vec4_type);
2672 coord_dst = st_dst_reg(coord);
2673 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2674 }
2675
2676 if (ir->projector) {
2677 ir->projector->accept(this);
2678 projector = this->result;
2679 }
2680
2681 /* Storage for our result. Ideally for an assignment we'd be using
2682 * the actual storage for the result here, instead.
2683 */
2684 result_src = get_temp(ir->type);
2685 result_dst = st_dst_reg(result_src);
2686
2687 switch (ir->op) {
2688 case ir_tex:
2689 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2690 break;
2691 case ir_txb:
2692 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2693 ir->lod_info.bias->accept(this);
2694 lod_info = this->result;
2695 break;
2696 case ir_txl:
2697 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2698 ir->lod_info.lod->accept(this);
2699 lod_info = this->result;
2700 break;
2701 case ir_txd:
2702 opcode = TGSI_OPCODE_TXD;
2703 ir->lod_info.grad.dPdx->accept(this);
2704 dx = this->result;
2705 ir->lod_info.grad.dPdy->accept(this);
2706 dy = this->result;
2707 break;
2708 case ir_txs:
2709 opcode = TGSI_OPCODE_TXQ;
2710 ir->lod_info.lod->accept(this);
2711 lod_info = this->result;
2712 break;
2713 case ir_txf:
2714 opcode = TGSI_OPCODE_TXF;
2715 ir->lod_info.lod->accept(this);
2716 lod_info = this->result;
2717 if (ir->offset) {
2718 ir->offset->accept(this);
2719 offset = this->result;
2720 }
2721 break;
2722 }
2723
2724 if (ir->projector) {
2725 if (opcode == TGSI_OPCODE_TEX) {
2726 /* Slot the projector in as the last component of the coord. */
2727 coord_dst.writemask = WRITEMASK_W;
2728 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2729 coord_dst.writemask = WRITEMASK_XYZW;
2730 opcode = TGSI_OPCODE_TXP;
2731 } else {
2732 st_src_reg coord_w = coord;
2733 coord_w.swizzle = SWIZZLE_WWWW;
2734
2735 /* For the other TEX opcodes there's no projective version
2736 * since the last slot is taken up by LOD info. Do the
2737 * projective divide now.
2738 */
2739 coord_dst.writemask = WRITEMASK_W;
2740 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2741
2742 /* In the case where we have to project the coordinates "by hand,"
2743 * the shadow comparator value must also be projected.
2744 */
2745 st_src_reg tmp_src = coord;
2746 if (ir->shadow_comparitor) {
2747 /* Slot the shadow value in as the second to last component of the
2748 * coord.
2749 */
2750 ir->shadow_comparitor->accept(this);
2751
2752 tmp_src = get_temp(glsl_type::vec4_type);
2753 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2754
2755 /* Projective division not allowed for array samplers. */
2756 assert(!sampler_type->sampler_array);
2757
2758 tmp_dst.writemask = WRITEMASK_Z;
2759 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2760
2761 tmp_dst.writemask = WRITEMASK_XY;
2762 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2763 }
2764
2765 coord_dst.writemask = WRITEMASK_XYZ;
2766 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2767
2768 coord_dst.writemask = WRITEMASK_XYZW;
2769 coord.swizzle = SWIZZLE_XYZW;
2770 }
2771 }
2772
2773 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2774 * comparator was put in the correct place (and projected) by the code,
2775 * above, that handles by-hand projection.
2776 */
2777 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2778 /* Slot the shadow value in as the second to last component of the
2779 * coord.
2780 */
2781 ir->shadow_comparitor->accept(this);
2782
2783 if (is_cube_array) {
2784 cube_sc = get_temp(glsl_type::float_type);
2785 cube_sc_dst = st_dst_reg(cube_sc);
2786 cube_sc_dst.writemask = WRITEMASK_X;
2787 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2788 cube_sc_dst.writemask = WRITEMASK_X;
2789 }
2790 else {
2791 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2792 sampler_type->sampler_array) ||
2793 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2794 coord_dst.writemask = WRITEMASK_W;
2795 } else {
2796 coord_dst.writemask = WRITEMASK_Z;
2797 }
2798
2799 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2800 coord_dst.writemask = WRITEMASK_XYZW;
2801 }
2802 }
2803
2804 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2805 opcode == TGSI_OPCODE_TXF) {
2806 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2807 coord_dst.writemask = WRITEMASK_W;
2808 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2809 coord_dst.writemask = WRITEMASK_XYZW;
2810 }
2811
2812 if (opcode == TGSI_OPCODE_TXD)
2813 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2814 else if (opcode == TGSI_OPCODE_TXQ)
2815 inst = emit(ir, opcode, result_dst, lod_info);
2816 else if (opcode == TGSI_OPCODE_TXF) {
2817 inst = emit(ir, opcode, result_dst, coord);
2818 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2819 inst = emit(ir, opcode, result_dst, coord, lod_info);
2820 } else if (opcode == TGSI_OPCODE_TEX2) {
2821 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2822 } else
2823 inst = emit(ir, opcode, result_dst, coord);
2824
2825 if (ir->shadow_comparitor)
2826 inst->tex_shadow = GL_TRUE;
2827
2828 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2829 this->shader_program,
2830 this->prog);
2831
2832 if (ir->offset) {
2833 inst->tex_offset_num_offset = 1;
2834 inst->tex_offsets[0].Index = offset.index;
2835 inst->tex_offsets[0].File = offset.file;
2836 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2837 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2838 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2839 }
2840
2841 switch (sampler_type->sampler_dimensionality) {
2842 case GLSL_SAMPLER_DIM_1D:
2843 inst->tex_target = (sampler_type->sampler_array)
2844 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2845 break;
2846 case GLSL_SAMPLER_DIM_2D:
2847 inst->tex_target = (sampler_type->sampler_array)
2848 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2849 break;
2850 case GLSL_SAMPLER_DIM_3D:
2851 inst->tex_target = TEXTURE_3D_INDEX;
2852 break;
2853 case GLSL_SAMPLER_DIM_CUBE:
2854 inst->tex_target = (sampler_type->sampler_array)
2855 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2856 break;
2857 case GLSL_SAMPLER_DIM_RECT:
2858 inst->tex_target = TEXTURE_RECT_INDEX;
2859 break;
2860 case GLSL_SAMPLER_DIM_BUF:
2861 inst->tex_target = TEXTURE_BUFFER_INDEX;
2862 break;
2863 case GLSL_SAMPLER_DIM_EXTERNAL:
2864 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2865 break;
2866 default:
2867 assert(!"Should not get here.");
2868 }
2869
2870 this->result = result_src;
2871 }
2872
2873 void
2874 glsl_to_tgsi_visitor::visit(ir_return *ir)
2875 {
2876 if (ir->get_value()) {
2877 st_dst_reg l;
2878 int i;
2879
2880 assert(current_function);
2881
2882 ir->get_value()->accept(this);
2883 st_src_reg r = this->result;
2884
2885 l = st_dst_reg(current_function->return_reg);
2886
2887 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2888 emit(ir, TGSI_OPCODE_MOV, l, r);
2889 l.index++;
2890 r.index++;
2891 }
2892 }
2893
2894 emit(ir, TGSI_OPCODE_RET);
2895 }
2896
2897 void
2898 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2899 {
2900 if (ir->condition) {
2901 ir->condition->accept(this);
2902 this->result.negate = ~this->result.negate;
2903 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result);
2904 } else {
2905 emit(ir, TGSI_OPCODE_KILP);
2906 }
2907 }
2908
2909 void
2910 glsl_to_tgsi_visitor::visit(ir_if *ir)
2911 {
2912 glsl_to_tgsi_instruction *cond_inst, *if_inst;
2913 glsl_to_tgsi_instruction *prev_inst;
2914
2915 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2916
2917 ir->condition->accept(this);
2918 assert(this->result.file != PROGRAM_UNDEFINED);
2919
2920 if (this->options->EmitCondCodes) {
2921 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2922
2923 /* See if we actually generated any instruction for generating
2924 * the condition. If not, then cook up a move to a temp so we
2925 * have something to set cond_update on.
2926 */
2927 if (cond_inst == prev_inst) {
2928 st_src_reg temp = get_temp(glsl_type::bool_type);
2929 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result);
2930 }
2931 cond_inst->cond_update = GL_TRUE;
2932
2933 if_inst = emit(ir->condition, TGSI_OPCODE_IF);
2934 if_inst->dst.cond_mask = COND_NE;
2935 } else {
2936 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result);
2937 }
2938
2939 this->instructions.push_tail(if_inst);
2940
2941 visit_exec_list(&ir->then_instructions, this);
2942
2943 if (!ir->else_instructions.is_empty()) {
2944 emit(ir->condition, TGSI_OPCODE_ELSE);
2945 visit_exec_list(&ir->else_instructions, this);
2946 }
2947
2948 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
2949 }
2950
2951 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2952 {
2953 result.file = PROGRAM_UNDEFINED;
2954 next_temp = 1;
2955 next_signature_id = 1;
2956 num_immediates = 0;
2957 current_function = NULL;
2958 num_address_regs = 0;
2959 samplers_used = 0;
2960 indirect_addr_temps = false;
2961 indirect_addr_consts = false;
2962 glsl_version = 0;
2963 native_integers = false;
2964 mem_ctx = ralloc_context(NULL);
2965 ctx = NULL;
2966 prog = NULL;
2967 shader_program = NULL;
2968 options = NULL;
2969 }
2970
2971 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2972 {
2973 ralloc_free(mem_ctx);
2974 }
2975
2976 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2977 {
2978 delete v;
2979 }
2980
2981
2982 /**
2983 * Count resources used by the given gpu program (number of texture
2984 * samplers, etc).
2985 */
2986 static void
2987 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
2988 {
2989 v->samplers_used = 0;
2990
2991 foreach_iter(exec_list_iterator, iter, v->instructions) {
2992 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2993
2994 if (is_tex_instruction(inst->op)) {
2995 v->samplers_used |= 1 << inst->sampler;
2996
2997 if (inst->tex_shadow) {
2998 prog->ShadowSamplers |= 1 << inst->sampler;
2999 }
3000 }
3001 }
3002
3003 prog->SamplersUsed = v->samplers_used;
3004
3005 if (v->shader_program != NULL)
3006 _mesa_update_shader_textures_used(v->shader_program, prog);
3007 }
3008
3009 static void
3010 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3011 struct gl_shader_program *shader_program,
3012 const char *name, const glsl_type *type,
3013 ir_constant *val)
3014 {
3015 if (type->is_record()) {
3016 ir_constant *field_constant;
3017
3018 field_constant = (ir_constant *)val->components.get_head();
3019
3020 for (unsigned int i = 0; i < type->length; i++) {
3021 const glsl_type *field_type = type->fields.structure[i].type;
3022 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3023 type->fields.structure[i].name);
3024 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3025 field_type, field_constant);
3026 field_constant = (ir_constant *)field_constant->next;
3027 }
3028 return;
3029 }
3030
3031 unsigned offset;
3032 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3033 &offset);
3034 if (offset == GL_INVALID_INDEX) {
3035 fail_link(shader_program,
3036 "Couldn't find uniform for initializer %s\n", name);
3037 return;
3038 }
3039 int loc = _mesa_uniform_merge_location_offset(index, offset);
3040
3041 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3042 ir_constant *element;
3043 const glsl_type *element_type;
3044 if (type->is_array()) {
3045 element = val->array_elements[i];
3046 element_type = type->fields.array;
3047 } else {
3048 element = val;
3049 element_type = type;
3050 }
3051
3052 void *values;
3053
3054 if (element_type->base_type == GLSL_TYPE_BOOL) {
3055 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3056 for (unsigned int j = 0; j < element_type->components(); j++) {
3057 conv[j] = element->value.b[j];
3058 }
3059 values = (void *)conv;
3060 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3061 element_type->vector_elements,
3062 1);
3063 } else {
3064 values = &element->value;
3065 }
3066
3067 if (element_type->is_matrix()) {
3068 _mesa_uniform_matrix(ctx, shader_program,
3069 element_type->matrix_columns,
3070 element_type->vector_elements,
3071 loc, 1, GL_FALSE, (GLfloat *)values);
3072 } else {
3073 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3074 values, element_type->gl_type);
3075 }
3076
3077 loc++;
3078 }
3079 }
3080
3081 /**
3082 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3083 * are read from the given src in this instruction
3084 */
3085 static int
3086 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3087 {
3088 int read_mask = 0, comp;
3089
3090 /* Now, given the src swizzle and the written channels, find which
3091 * components are actually read
3092 */
3093 for (comp = 0; comp < 4; ++comp) {
3094 const unsigned coord = GET_SWZ(src.swizzle, comp);
3095 ASSERT(coord < 4);
3096 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3097 read_mask |= 1 << coord;
3098 }
3099
3100 return read_mask;
3101 }
3102
3103 /**
3104 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3105 * instruction is the first instruction to write to register T0. There are
3106 * several lowering passes done in GLSL IR (e.g. branches and
3107 * relative addressing) that create a large number of conditional assignments
3108 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3109 *
3110 * Here is why this conversion is safe:
3111 * CMP T0, T1 T2 T0 can be expanded to:
3112 * if (T1 < 0.0)
3113 * MOV T0, T2;
3114 * else
3115 * MOV T0, T0;
3116 *
3117 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3118 * as the original program. If (T1 < 0.0) evaluates to false, executing
3119 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3120 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3121 * because any instruction that was going to read from T0 after this was going
3122 * to read a garbage value anyway.
3123 */
3124 void
3125 glsl_to_tgsi_visitor::simplify_cmp(void)
3126 {
3127 unsigned *tempWrites;
3128 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3129
3130 tempWrites = new unsigned[MAX_TEMPS];
3131 if (!tempWrites) {
3132 return;
3133 }
3134 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3135 memset(outputWrites, 0, sizeof(outputWrites));
3136
3137 foreach_iter(exec_list_iterator, iter, this->instructions) {
3138 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3139 unsigned prevWriteMask = 0;
3140
3141 /* Give up if we encounter relative addressing or flow control. */
3142 if (inst->dst.reladdr ||
3143 tgsi_get_opcode_info(inst->op)->is_branch ||
3144 inst->op == TGSI_OPCODE_BGNSUB ||
3145 inst->op == TGSI_OPCODE_CONT ||
3146 inst->op == TGSI_OPCODE_END ||
3147 inst->op == TGSI_OPCODE_ENDSUB ||
3148 inst->op == TGSI_OPCODE_RET) {
3149 break;
3150 }
3151
3152 if (inst->dst.file == PROGRAM_OUTPUT) {
3153 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3154 prevWriteMask = outputWrites[inst->dst.index];
3155 outputWrites[inst->dst.index] |= inst->dst.writemask;
3156 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3157 assert(inst->dst.index < MAX_TEMPS);
3158 prevWriteMask = tempWrites[inst->dst.index];
3159 tempWrites[inst->dst.index] |= inst->dst.writemask;
3160 }
3161
3162 /* For a CMP to be considered a conditional write, the destination
3163 * register and source register two must be the same. */
3164 if (inst->op == TGSI_OPCODE_CMP
3165 && !(inst->dst.writemask & prevWriteMask)
3166 && inst->src[2].file == inst->dst.file
3167 && inst->src[2].index == inst->dst.index
3168 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3169
3170 inst->op = TGSI_OPCODE_MOV;
3171 inst->src[0] = inst->src[1];
3172 }
3173 }
3174
3175 delete [] tempWrites;
3176 }
3177
3178 /* Replaces all references to a temporary register index with another index. */
3179 void
3180 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3181 {
3182 foreach_iter(exec_list_iterator, iter, this->instructions) {
3183 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3184 unsigned j;
3185
3186 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3187 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3188 inst->src[j].index == index) {
3189 inst->src[j].index = new_index;
3190 }
3191 }
3192
3193 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3194 inst->dst.index = new_index;
3195 }
3196 }
3197 }
3198
3199 int
3200 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3201 {
3202 int depth = 0; /* loop depth */
3203 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3204 unsigned i = 0, j;
3205
3206 foreach_iter(exec_list_iterator, iter, this->instructions) {
3207 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3208
3209 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3210 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3211 inst->src[j].index == index) {
3212 return (depth == 0) ? i : loop_start;
3213 }
3214 }
3215
3216 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3217 if(depth++ == 0)
3218 loop_start = i;
3219 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3220 if (--depth == 0)
3221 loop_start = -1;
3222 }
3223 assert(depth >= 0);
3224
3225 i++;
3226 }
3227
3228 return -1;
3229 }
3230
3231 int
3232 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3233 {
3234 int depth = 0; /* loop depth */
3235 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3236 int i = 0;
3237
3238 foreach_iter(exec_list_iterator, iter, this->instructions) {
3239 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3240
3241 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3242 return (depth == 0) ? i : loop_start;
3243 }
3244
3245 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3246 if(depth++ == 0)
3247 loop_start = i;
3248 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3249 if (--depth == 0)
3250 loop_start = -1;
3251 }
3252 assert(depth >= 0);
3253
3254 i++;
3255 }
3256
3257 return -1;
3258 }
3259
3260 int
3261 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3262 {
3263 int depth = 0; /* loop depth */
3264 int last = -1; /* index of last instruction that reads the temporary */
3265 unsigned i = 0, j;
3266
3267 foreach_iter(exec_list_iterator, iter, this->instructions) {
3268 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3269
3270 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3271 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3272 inst->src[j].index == index) {
3273 last = (depth == 0) ? i : -2;
3274 }
3275 }
3276
3277 if (inst->op == TGSI_OPCODE_BGNLOOP)
3278 depth++;
3279 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3280 if (--depth == 0 && last == -2)
3281 last = i;
3282 assert(depth >= 0);
3283
3284 i++;
3285 }
3286
3287 assert(last >= -1);
3288 return last;
3289 }
3290
3291 int
3292 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3293 {
3294 int depth = 0; /* loop depth */
3295 int last = -1; /* index of last instruction that writes to the temporary */
3296 int i = 0;
3297
3298 foreach_iter(exec_list_iterator, iter, this->instructions) {
3299 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3300
3301 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3302 last = (depth == 0) ? i : -2;
3303
3304 if (inst->op == TGSI_OPCODE_BGNLOOP)
3305 depth++;
3306 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3307 if (--depth == 0 && last == -2)
3308 last = i;
3309 assert(depth >= 0);
3310
3311 i++;
3312 }
3313
3314 assert(last >= -1);
3315 return last;
3316 }
3317
3318 /*
3319 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3320 * channels for copy propagation and updates following instructions to
3321 * use the original versions.
3322 *
3323 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3324 * will occur. As an example, a TXP production before this pass:
3325 *
3326 * 0: MOV TEMP[1], INPUT[4].xyyy;
3327 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3328 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3329 *
3330 * and after:
3331 *
3332 * 0: MOV TEMP[1], INPUT[4].xyyy;
3333 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3334 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3335 *
3336 * which allows for dead code elimination on TEMP[1]'s writes.
3337 */
3338 void
3339 glsl_to_tgsi_visitor::copy_propagate(void)
3340 {
3341 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3342 glsl_to_tgsi_instruction *,
3343 this->next_temp * 4);
3344 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3345 int level = 0;
3346
3347 foreach_iter(exec_list_iterator, iter, this->instructions) {
3348 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3349
3350 assert(inst->dst.file != PROGRAM_TEMPORARY
3351 || inst->dst.index < this->next_temp);
3352
3353 /* First, do any copy propagation possible into the src regs. */
3354 for (int r = 0; r < 3; r++) {
3355 glsl_to_tgsi_instruction *first = NULL;
3356 bool good = true;
3357 int acp_base = inst->src[r].index * 4;
3358
3359 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3360 inst->src[r].reladdr)
3361 continue;
3362
3363 /* See if we can find entries in the ACP consisting of MOVs
3364 * from the same src register for all the swizzled channels
3365 * of this src register reference.
3366 */
3367 for (int i = 0; i < 4; i++) {
3368 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3369 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3370
3371 if (!copy_chan) {
3372 good = false;
3373 break;
3374 }
3375
3376 assert(acp_level[acp_base + src_chan] <= level);
3377
3378 if (!first) {
3379 first = copy_chan;
3380 } else {
3381 if (first->src[0].file != copy_chan->src[0].file ||
3382 first->src[0].index != copy_chan->src[0].index) {
3383 good = false;
3384 break;
3385 }
3386 }
3387 }
3388
3389 if (good) {
3390 /* We've now validated that we can copy-propagate to
3391 * replace this src register reference. Do it.
3392 */
3393 inst->src[r].file = first->src[0].file;
3394 inst->src[r].index = first->src[0].index;
3395
3396 int swizzle = 0;
3397 for (int i = 0; i < 4; i++) {
3398 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3399 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3400 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3401 (3 * i));
3402 }
3403 inst->src[r].swizzle = swizzle;
3404 }
3405 }
3406
3407 switch (inst->op) {
3408 case TGSI_OPCODE_BGNLOOP:
3409 case TGSI_OPCODE_ENDLOOP:
3410 /* End of a basic block, clear the ACP entirely. */
3411 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3412 break;
3413
3414 case TGSI_OPCODE_IF:
3415 ++level;
3416 break;
3417
3418 case TGSI_OPCODE_ENDIF:
3419 case TGSI_OPCODE_ELSE:
3420 /* Clear all channels written inside the block from the ACP, but
3421 * leaving those that were not touched.
3422 */
3423 for (int r = 0; r < this->next_temp; r++) {
3424 for (int c = 0; c < 4; c++) {
3425 if (!acp[4 * r + c])
3426 continue;
3427
3428 if (acp_level[4 * r + c] >= level)
3429 acp[4 * r + c] = NULL;
3430 }
3431 }
3432 if (inst->op == TGSI_OPCODE_ENDIF)
3433 --level;
3434 break;
3435
3436 default:
3437 /* Continuing the block, clear any written channels from
3438 * the ACP.
3439 */
3440 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3441 /* Any temporary might be written, so no copy propagation
3442 * across this instruction.
3443 */
3444 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3445 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3446 inst->dst.reladdr) {
3447 /* Any output might be written, so no copy propagation
3448 * from outputs across this instruction.
3449 */
3450 for (int r = 0; r < this->next_temp; r++) {
3451 for (int c = 0; c < 4; c++) {
3452 if (!acp[4 * r + c])
3453 continue;
3454
3455 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3456 acp[4 * r + c] = NULL;
3457 }
3458 }
3459 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3460 inst->dst.file == PROGRAM_OUTPUT) {
3461 /* Clear where it's used as dst. */
3462 if (inst->dst.file == PROGRAM_TEMPORARY) {
3463 for (int c = 0; c < 4; c++) {
3464 if (inst->dst.writemask & (1 << c)) {
3465 acp[4 * inst->dst.index + c] = NULL;
3466 }
3467 }
3468 }
3469
3470 /* Clear where it's used as src. */
3471 for (int r = 0; r < this->next_temp; r++) {
3472 for (int c = 0; c < 4; c++) {
3473 if (!acp[4 * r + c])
3474 continue;
3475
3476 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3477
3478 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3479 acp[4 * r + c]->src[0].index == inst->dst.index &&
3480 inst->dst.writemask & (1 << src_chan))
3481 {
3482 acp[4 * r + c] = NULL;
3483 }
3484 }
3485 }
3486 }
3487 break;
3488 }
3489
3490 /* If this is a copy, add it to the ACP. */
3491 if (inst->op == TGSI_OPCODE_MOV &&
3492 inst->dst.file == PROGRAM_TEMPORARY &&
3493 !inst->dst.reladdr &&
3494 !inst->saturate &&
3495 !inst->src[0].reladdr &&
3496 !inst->src[0].negate) {
3497 for (int i = 0; i < 4; i++) {
3498 if (inst->dst.writemask & (1 << i)) {
3499 acp[4 * inst->dst.index + i] = inst;
3500 acp_level[4 * inst->dst.index + i] = level;
3501 }
3502 }
3503 }
3504 }
3505
3506 ralloc_free(acp_level);
3507 ralloc_free(acp);
3508 }
3509
3510 /*
3511 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3512 *
3513 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3514 * will occur. As an example, a TXP production after copy propagation but
3515 * before this pass:
3516 *
3517 * 0: MOV TEMP[1], INPUT[4].xyyy;
3518 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3519 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3520 *
3521 * and after this pass:
3522 *
3523 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3524 *
3525 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3526 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3527 */
3528 void
3529 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3530 {
3531 int i;
3532
3533 for (i=0; i < this->next_temp; i++) {
3534 int last_read = get_last_temp_read(i);
3535 int j = 0;
3536
3537 foreach_iter(exec_list_iterator, iter, this->instructions) {
3538 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3539
3540 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3541 j > last_read)
3542 {
3543 iter.remove();
3544 delete inst;
3545 }
3546
3547 j++;
3548 }
3549 }
3550 }
3551
3552 /*
3553 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3554 * code elimination. This is less primitive than eliminate_dead_code(), as it
3555 * is per-channel and can detect consecutive writes without a read between them
3556 * as dead code. However, there is some dead code that can be eliminated by
3557 * eliminate_dead_code() but not this function - for example, this function
3558 * cannot eliminate an instruction writing to a register that is never read and
3559 * is the only instruction writing to that register.
3560 *
3561 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3562 * will occur.
3563 */
3564 int
3565 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3566 {
3567 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3568 glsl_to_tgsi_instruction *,
3569 this->next_temp * 4);
3570 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3571 int level = 0;
3572 int removed = 0;
3573
3574 foreach_iter(exec_list_iterator, iter, this->instructions) {
3575 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3576
3577 assert(inst->dst.file != PROGRAM_TEMPORARY
3578 || inst->dst.index < this->next_temp);
3579
3580 switch (inst->op) {
3581 case TGSI_OPCODE_BGNLOOP:
3582 case TGSI_OPCODE_ENDLOOP:
3583 case TGSI_OPCODE_CONT:
3584 case TGSI_OPCODE_BRK:
3585 /* End of a basic block, clear the write array entirely.
3586 *
3587 * This keeps us from killing dead code when the writes are
3588 * on either side of a loop, even when the register isn't touched
3589 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3590 * dead code of this type, so it shouldn't make a difference as long as
3591 * the dead code elimination pass in the GLSL compiler does its job.
3592 */
3593 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3594 break;
3595
3596 case TGSI_OPCODE_ENDIF:
3597 case TGSI_OPCODE_ELSE:
3598 /* Promote the recorded level of all channels written inside the
3599 * preceding if or else block to the level above the if/else block.
3600 */
3601 for (int r = 0; r < this->next_temp; r++) {
3602 for (int c = 0; c < 4; c++) {
3603 if (!writes[4 * r + c])
3604 continue;
3605
3606 if (write_level[4 * r + c] == level)
3607 write_level[4 * r + c] = level-1;
3608 }
3609 }
3610
3611 if(inst->op == TGSI_OPCODE_ENDIF)
3612 --level;
3613
3614 break;
3615
3616 case TGSI_OPCODE_IF:
3617 ++level;
3618 /* fallthrough to default case to mark the condition as read */
3619
3620 default:
3621 /* Continuing the block, clear any channels from the write array that
3622 * are read by this instruction.
3623 */
3624 for (unsigned i = 0; i < Elements(inst->src); i++) {
3625 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3626 /* Any temporary might be read, so no dead code elimination
3627 * across this instruction.
3628 */
3629 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3630 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3631 /* Clear where it's used as src. */
3632 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3633 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3634 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3635 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3636
3637 for (int c = 0; c < 4; c++) {
3638 if (src_chans & (1 << c)) {
3639 writes[4 * inst->src[i].index + c] = NULL;
3640 }
3641 }
3642 }
3643 }
3644 break;
3645 }
3646
3647 /* If this instruction writes to a temporary, add it to the write array.
3648 * If there is already an instruction in the write array for one or more
3649 * of the channels, flag that channel write as dead.
3650 */
3651 if (inst->dst.file == PROGRAM_TEMPORARY &&
3652 !inst->dst.reladdr &&
3653 !inst->saturate) {
3654 for (int c = 0; c < 4; c++) {
3655 if (inst->dst.writemask & (1 << c)) {
3656 if (writes[4 * inst->dst.index + c]) {
3657 if (write_level[4 * inst->dst.index + c] < level)
3658 continue;
3659 else
3660 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3661 }
3662 writes[4 * inst->dst.index + c] = inst;
3663 write_level[4 * inst->dst.index + c] = level;
3664 }
3665 }
3666 }
3667 }
3668
3669 /* Anything still in the write array at this point is dead code. */
3670 for (int r = 0; r < this->next_temp; r++) {
3671 for (int c = 0; c < 4; c++) {
3672 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3673 if (inst)
3674 inst->dead_mask |= (1 << c);
3675 }
3676 }
3677
3678 /* Now actually remove the instructions that are completely dead and update
3679 * the writemask of other instructions with dead channels.
3680 */
3681 foreach_iter(exec_list_iterator, iter, this->instructions) {
3682 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3683
3684 if (!inst->dead_mask || !inst->dst.writemask)
3685 continue;
3686 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3687 iter.remove();
3688 delete inst;
3689 removed++;
3690 } else
3691 inst->dst.writemask &= ~(inst->dead_mask);
3692 }
3693
3694 ralloc_free(write_level);
3695 ralloc_free(writes);
3696
3697 return removed;
3698 }
3699
3700 /* Merges temporary registers together where possible to reduce the number of
3701 * registers needed to run a program.
3702 *
3703 * Produces optimal code only after copy propagation and dead code elimination
3704 * have been run. */
3705 void
3706 glsl_to_tgsi_visitor::merge_registers(void)
3707 {
3708 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3709 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3710 int i, j;
3711
3712 /* Read the indices of the last read and first write to each temp register
3713 * into an array so that we don't have to traverse the instruction list as
3714 * much. */
3715 for (i=0; i < this->next_temp; i++) {
3716 last_reads[i] = get_last_temp_read(i);
3717 first_writes[i] = get_first_temp_write(i);
3718 }
3719
3720 /* Start looking for registers with non-overlapping usages that can be
3721 * merged together. */
3722 for (i=0; i < this->next_temp; i++) {
3723 /* Don't touch unused registers. */
3724 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3725
3726 for (j=0; j < this->next_temp; j++) {
3727 /* Don't touch unused registers. */
3728 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3729
3730 /* We can merge the two registers if the first write to j is after or
3731 * in the same instruction as the last read from i. Note that the
3732 * register at index i will always be used earlier or at the same time
3733 * as the register at index j. */
3734 if (first_writes[i] <= first_writes[j] &&
3735 last_reads[i] <= first_writes[j])
3736 {
3737 rename_temp_register(j, i); /* Replace all references to j with i.*/
3738
3739 /* Update the first_writes and last_reads arrays with the new
3740 * values for the merged register index, and mark the newly unused
3741 * register index as such. */
3742 last_reads[i] = last_reads[j];
3743 first_writes[j] = -1;
3744 last_reads[j] = -1;
3745 }
3746 }
3747 }
3748
3749 ralloc_free(last_reads);
3750 ralloc_free(first_writes);
3751 }
3752
3753 /* Reassign indices to temporary registers by reusing unused indices created
3754 * by optimization passes. */
3755 void
3756 glsl_to_tgsi_visitor::renumber_registers(void)
3757 {
3758 int i = 0;
3759 int new_index = 0;
3760
3761 for (i=0; i < this->next_temp; i++) {
3762 if (get_first_temp_read(i) < 0) continue;
3763 if (i != new_index)
3764 rename_temp_register(i, new_index);
3765 new_index++;
3766 }
3767
3768 this->next_temp = new_index;
3769 }
3770
3771 /**
3772 * Returns a fragment program which implements the current pixel transfer ops.
3773 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3774 */
3775 extern "C" void
3776 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3777 glsl_to_tgsi_visitor *original,
3778 int scale_and_bias, int pixel_maps)
3779 {
3780 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3781 struct st_context *st = st_context(original->ctx);
3782 struct gl_program *prog = &fp->Base.Base;
3783 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3784 st_src_reg coord, src0;
3785 st_dst_reg dst0;
3786 glsl_to_tgsi_instruction *inst;
3787
3788 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3789 v->ctx = original->ctx;
3790 v->prog = prog;
3791 v->shader_program = NULL;
3792 v->glsl_version = original->glsl_version;
3793 v->native_integers = original->native_integers;
3794 v->options = original->options;
3795 v->next_temp = original->next_temp;
3796 v->num_address_regs = original->num_address_regs;
3797 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3798 v->indirect_addr_temps = original->indirect_addr_temps;
3799 v->indirect_addr_consts = original->indirect_addr_consts;
3800 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3801 v->num_immediates = original->num_immediates;
3802
3803 /*
3804 * Get initial pixel color from the texture.
3805 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3806 */
3807 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3808 src0 = v->get_temp(glsl_type::vec4_type);
3809 dst0 = st_dst_reg(src0);
3810 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3811 inst->sampler = 0;
3812 inst->tex_target = TEXTURE_2D_INDEX;
3813
3814 prog->InputsRead |= FRAG_BIT_TEX0;
3815 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3816 v->samplers_used |= (1 << 0);
3817
3818 if (scale_and_bias) {
3819 static const gl_state_index scale_state[STATE_LENGTH] =
3820 { STATE_INTERNAL, STATE_PT_SCALE,
3821 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3822 static const gl_state_index bias_state[STATE_LENGTH] =
3823 { STATE_INTERNAL, STATE_PT_BIAS,
3824 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3825 GLint scale_p, bias_p;
3826 st_src_reg scale, bias;
3827
3828 scale_p = _mesa_add_state_reference(params, scale_state);
3829 bias_p = _mesa_add_state_reference(params, bias_state);
3830
3831 /* MAD colorTemp, colorTemp, scale, bias; */
3832 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3833 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3834 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3835 }
3836
3837 if (pixel_maps) {
3838 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3839 st_dst_reg temp_dst = st_dst_reg(temp);
3840
3841 assert(st->pixel_xfer.pixelmap_texture);
3842
3843 /* With a little effort, we can do four pixel map look-ups with
3844 * two TEX instructions:
3845 */
3846
3847 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3848 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3849 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3850 inst->sampler = 1;
3851 inst->tex_target = TEXTURE_2D_INDEX;
3852
3853 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3854 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3855 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3856 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3857 inst->sampler = 1;
3858 inst->tex_target = TEXTURE_2D_INDEX;
3859
3860 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3861 v->samplers_used |= (1 << 1);
3862
3863 /* MOV colorTemp, temp; */
3864 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3865 }
3866
3867 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3868 * new visitor. */
3869 foreach_iter(exec_list_iterator, iter, original->instructions) {
3870 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3871 glsl_to_tgsi_instruction *newinst;
3872 st_src_reg src_regs[3];
3873
3874 if (inst->dst.file == PROGRAM_OUTPUT)
3875 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3876
3877 for (int i=0; i<3; i++) {
3878 src_regs[i] = inst->src[i];
3879 if (src_regs[i].file == PROGRAM_INPUT &&
3880 src_regs[i].index == FRAG_ATTRIB_COL0)
3881 {
3882 src_regs[i].file = PROGRAM_TEMPORARY;
3883 src_regs[i].index = src0.index;
3884 }
3885 else if (src_regs[i].file == PROGRAM_INPUT)
3886 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3887 }
3888
3889 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3890 newinst->tex_target = inst->tex_target;
3891 }
3892
3893 /* Make modifications to fragment program info. */
3894 prog->Parameters = _mesa_combine_parameter_lists(params,
3895 original->prog->Parameters);
3896 _mesa_free_parameter_list(params);
3897 count_resources(v, prog);
3898 fp->glsl_to_tgsi = v;
3899 }
3900
3901 /**
3902 * Make fragment program for glBitmap:
3903 * Sample the texture and kill the fragment if the bit is 0.
3904 * This program will be combined with the user's fragment program.
3905 *
3906 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3907 */
3908 extern "C" void
3909 get_bitmap_visitor(struct st_fragment_program *fp,
3910 glsl_to_tgsi_visitor *original, int samplerIndex)
3911 {
3912 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3913 struct st_context *st = st_context(original->ctx);
3914 struct gl_program *prog = &fp->Base.Base;
3915 st_src_reg coord, src0;
3916 st_dst_reg dst0;
3917 glsl_to_tgsi_instruction *inst;
3918
3919 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3920 v->ctx = original->ctx;
3921 v->prog = prog;
3922 v->shader_program = NULL;
3923 v->glsl_version = original->glsl_version;
3924 v->native_integers = original->native_integers;
3925 v->options = original->options;
3926 v->next_temp = original->next_temp;
3927 v->num_address_regs = original->num_address_regs;
3928 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3929 v->indirect_addr_temps = original->indirect_addr_temps;
3930 v->indirect_addr_consts = original->indirect_addr_consts;
3931 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3932 v->num_immediates = original->num_immediates;
3933
3934 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3935 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type);
3936 src0 = v->get_temp(glsl_type::vec4_type);
3937 dst0 = st_dst_reg(src0);
3938 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3939 inst->sampler = samplerIndex;
3940 inst->tex_target = TEXTURE_2D_INDEX;
3941
3942 prog->InputsRead |= FRAG_BIT_TEX0;
3943 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
3944 v->samplers_used |= (1 << samplerIndex);
3945
3946 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
3947 src0.negate = NEGATE_XYZW;
3948 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
3949 src0.swizzle = SWIZZLE_XXXX;
3950 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0);
3951
3952 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3953 * new visitor. */
3954 foreach_iter(exec_list_iterator, iter, original->instructions) {
3955 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3956 glsl_to_tgsi_instruction *newinst;
3957 st_src_reg src_regs[3];
3958
3959 if (inst->dst.file == PROGRAM_OUTPUT)
3960 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3961
3962 for (int i=0; i<3; i++) {
3963 src_regs[i] = inst->src[i];
3964 if (src_regs[i].file == PROGRAM_INPUT)
3965 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3966 }
3967
3968 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3969 newinst->tex_target = inst->tex_target;
3970 }
3971
3972 /* Make modifications to fragment program info. */
3973 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
3974 count_resources(v, prog);
3975 fp->glsl_to_tgsi = v;
3976 }
3977
3978 /* ------------------------- TGSI conversion stuff -------------------------- */
3979 struct label {
3980 unsigned branch_target;
3981 unsigned token;
3982 };
3983
3984 /**
3985 * Intermediate state used during shader translation.
3986 */
3987 struct st_translate {
3988 struct ureg_program *ureg;
3989
3990 struct ureg_dst temps[MAX_TEMPS];
3991 struct ureg_src *constants;
3992 struct ureg_src *immediates;
3993 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3994 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3995 struct ureg_dst address[1];
3996 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3997 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3998
3999 const GLuint *inputMapping;
4000 const GLuint *outputMapping;
4001
4002 /* For every instruction that contains a label (eg CALL), keep
4003 * details so that we can go back afterwards and emit the correct
4004 * tgsi instruction number for each label.
4005 */
4006 struct label *labels;
4007 unsigned labels_size;
4008 unsigned labels_count;
4009
4010 /* Keep a record of the tgsi instruction number that each mesa
4011 * instruction starts at, will be used to fix up labels after
4012 * translation.
4013 */
4014 unsigned *insn;
4015 unsigned insn_size;
4016 unsigned insn_count;
4017
4018 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4019
4020 boolean error;
4021 };
4022
4023 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4024 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4025 TGSI_SEMANTIC_FACE,
4026 TGSI_SEMANTIC_VERTEXID,
4027 TGSI_SEMANTIC_INSTANCEID
4028 };
4029
4030 /**
4031 * Make note of a branch to a label in the TGSI code.
4032 * After we've emitted all instructions, we'll go over the list
4033 * of labels built here and patch the TGSI code with the actual
4034 * location of each label.
4035 */
4036 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4037 {
4038 unsigned i;
4039
4040 if (t->labels_count + 1 >= t->labels_size) {
4041 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4042 t->labels = (struct label *)realloc(t->labels,
4043 t->labels_size * sizeof(struct label));
4044 if (t->labels == NULL) {
4045 static unsigned dummy;
4046 t->error = TRUE;
4047 return &dummy;
4048 }
4049 }
4050
4051 i = t->labels_count++;
4052 t->labels[i].branch_target = branch_target;
4053 return &t->labels[i].token;
4054 }
4055
4056 /**
4057 * Called prior to emitting the TGSI code for each instruction.
4058 * Allocate additional space for instructions if needed.
4059 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4060 * the next TGSI instruction.
4061 */
4062 static void set_insn_start(struct st_translate *t, unsigned start)
4063 {
4064 if (t->insn_count + 1 >= t->insn_size) {
4065 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4066 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4067 if (t->insn == NULL) {
4068 t->error = TRUE;
4069 return;
4070 }
4071 }
4072
4073 t->insn[t->insn_count++] = start;
4074 }
4075
4076 /**
4077 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4078 */
4079 static struct ureg_src
4080 emit_immediate(struct st_translate *t,
4081 gl_constant_value values[4],
4082 int type, int size)
4083 {
4084 struct ureg_program *ureg = t->ureg;
4085
4086 switch(type)
4087 {
4088 case GL_FLOAT:
4089 return ureg_DECL_immediate(ureg, &values[0].f, size);
4090 case GL_INT:
4091 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4092 case GL_UNSIGNED_INT:
4093 case GL_BOOL:
4094 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4095 default:
4096 assert(!"should not get here - type must be float, int, uint, or bool");
4097 return ureg_src_undef();
4098 }
4099 }
4100
4101 /**
4102 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4103 */
4104 static struct ureg_dst
4105 dst_register(struct st_translate *t,
4106 gl_register_file file,
4107 GLuint index)
4108 {
4109 switch(file) {
4110 case PROGRAM_UNDEFINED:
4111 return ureg_dst_undef();
4112
4113 case PROGRAM_TEMPORARY:
4114 if (ureg_dst_is_undef(t->temps[index]))
4115 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4116
4117 return t->temps[index];
4118
4119 case PROGRAM_OUTPUT:
4120 if (t->procType == TGSI_PROCESSOR_VERTEX)
4121 assert(index < VERT_RESULT_MAX);
4122 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4123 assert(index < FRAG_RESULT_MAX);
4124 else
4125 assert(index < GEOM_RESULT_MAX);
4126
4127 assert(t->outputMapping[index] < Elements(t->outputs));
4128
4129 return t->outputs[t->outputMapping[index]];
4130
4131 case PROGRAM_ADDRESS:
4132 return t->address[index];
4133
4134 default:
4135 assert(!"unknown dst register file");
4136 return ureg_dst_undef();
4137 }
4138 }
4139
4140 /**
4141 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4142 */
4143 static struct ureg_src
4144 src_register(struct st_translate *t,
4145 gl_register_file file,
4146 GLint index, GLint index2D)
4147 {
4148 switch(file) {
4149 case PROGRAM_UNDEFINED:
4150 return ureg_src_undef();
4151
4152 case PROGRAM_TEMPORARY:
4153 assert(index >= 0);
4154 assert(index < (int) Elements(t->temps));
4155 if (ureg_dst_is_undef(t->temps[index]))
4156 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4157 return ureg_src(t->temps[index]);
4158
4159 case PROGRAM_ENV_PARAM:
4160 case PROGRAM_LOCAL_PARAM:
4161 case PROGRAM_UNIFORM:
4162 assert(index >= 0);
4163 return t->constants[index];
4164 case PROGRAM_STATE_VAR:
4165 case PROGRAM_CONSTANT: /* ie, immediate */
4166 if (index2D) {
4167 struct ureg_src src;
4168 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4169 src.Dimension = 1;
4170 src.DimensionIndex = index2D;
4171 return src;
4172 } else if (index < 0)
4173 return ureg_DECL_constant(t->ureg, 0);
4174 else
4175 return t->constants[index];
4176
4177 case PROGRAM_IMMEDIATE:
4178 return t->immediates[index];
4179
4180 case PROGRAM_INPUT:
4181 assert(t->inputMapping[index] < Elements(t->inputs));
4182 return t->inputs[t->inputMapping[index]];
4183
4184 case PROGRAM_OUTPUT:
4185 assert(t->outputMapping[index] < Elements(t->outputs));
4186 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4187
4188 case PROGRAM_ADDRESS:
4189 return ureg_src(t->address[index]);
4190
4191 case PROGRAM_SYSTEM_VALUE:
4192 assert(index < (int) Elements(t->systemValues));
4193 return t->systemValues[index];
4194
4195 default:
4196 assert(!"unknown src register file");
4197 return ureg_src_undef();
4198 }
4199 }
4200
4201 /**
4202 * Create a TGSI ureg_dst register from an st_dst_reg.
4203 */
4204 static struct ureg_dst
4205 translate_dst(struct st_translate *t,
4206 const st_dst_reg *dst_reg,
4207 bool saturate, bool clamp_color)
4208 {
4209 struct ureg_dst dst = dst_register(t,
4210 dst_reg->file,
4211 dst_reg->index);
4212
4213 dst = ureg_writemask(dst, dst_reg->writemask);
4214
4215 if (saturate)
4216 dst = ureg_saturate(dst);
4217 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4218 /* Clamp colors for ARB_color_buffer_float. */
4219 switch (t->procType) {
4220 case TGSI_PROCESSOR_VERTEX:
4221 /* XXX if the geometry shader is present, this must be done there
4222 * instead of here. */
4223 if (dst_reg->index == VERT_RESULT_COL0 ||
4224 dst_reg->index == VERT_RESULT_COL1 ||
4225 dst_reg->index == VERT_RESULT_BFC0 ||
4226 dst_reg->index == VERT_RESULT_BFC1) {
4227 dst = ureg_saturate(dst);
4228 }
4229 break;
4230
4231 case TGSI_PROCESSOR_FRAGMENT:
4232 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4233 dst = ureg_saturate(dst);
4234 }
4235 break;
4236 }
4237 }
4238
4239 if (dst_reg->reladdr != NULL)
4240 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4241
4242 return dst;
4243 }
4244
4245 /**
4246 * Create a TGSI ureg_src register from an st_src_reg.
4247 */
4248 static struct ureg_src
4249 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4250 {
4251 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4252
4253 src = ureg_swizzle(src,
4254 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4255 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4256 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4257 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4258
4259 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4260 src = ureg_negate(src);
4261
4262 if (src_reg->reladdr != NULL) {
4263 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
4264 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
4265 * set the bit for src.Negate. So we have to do the operation manually
4266 * here to work around the compiler's problems. */
4267 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
4268 struct ureg_src addr = ureg_src(t->address[0]);
4269 src.Indirect = 1;
4270 src.IndirectFile = addr.File;
4271 src.IndirectIndex = addr.Index;
4272 src.IndirectSwizzle = addr.SwizzleX;
4273
4274 if (src_reg->file != PROGRAM_INPUT &&
4275 src_reg->file != PROGRAM_OUTPUT) {
4276 /* If src_reg->index was negative, it was set to zero in
4277 * src_register(). Reassign it now. But don't do this
4278 * for input/output regs since they get remapped while
4279 * const buffers don't.
4280 */
4281 src.Index = src_reg->index;
4282 }
4283 }
4284
4285 return src;
4286 }
4287
4288 static struct tgsi_texture_offset
4289 translate_tex_offset(struct st_translate *t,
4290 const struct tgsi_texture_offset *in_offset)
4291 {
4292 struct tgsi_texture_offset offset;
4293 struct ureg_src imm_src;
4294
4295 assert(in_offset->File == PROGRAM_IMMEDIATE);
4296 imm_src = t->immediates[in_offset->Index];
4297
4298 offset.File = imm_src.File;
4299 offset.Index = imm_src.Index;
4300 offset.SwizzleX = imm_src.SwizzleX;
4301 offset.SwizzleY = imm_src.SwizzleY;
4302 offset.SwizzleZ = imm_src.SwizzleZ;
4303 offset.File = TGSI_FILE_IMMEDIATE;
4304 offset.Padding = 0;
4305
4306 return offset;
4307 }
4308
4309 static void
4310 compile_tgsi_instruction(struct st_translate *t,
4311 const glsl_to_tgsi_instruction *inst,
4312 bool clamp_dst_color_output)
4313 {
4314 struct ureg_program *ureg = t->ureg;
4315 GLuint i;
4316 struct ureg_dst dst[1];
4317 struct ureg_src src[4];
4318 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4319
4320 unsigned num_dst;
4321 unsigned num_src;
4322 unsigned tex_target;
4323
4324 num_dst = num_inst_dst_regs(inst->op);
4325 num_src = num_inst_src_regs(inst->op);
4326
4327 if (num_dst)
4328 dst[0] = translate_dst(t,
4329 &inst->dst,
4330 inst->saturate,
4331 clamp_dst_color_output);
4332
4333 for (i = 0; i < num_src; i++)
4334 src[i] = translate_src(t, &inst->src[i]);
4335
4336 switch(inst->op) {
4337 case TGSI_OPCODE_BGNLOOP:
4338 case TGSI_OPCODE_CAL:
4339 case TGSI_OPCODE_ELSE:
4340 case TGSI_OPCODE_ENDLOOP:
4341 case TGSI_OPCODE_IF:
4342 assert(num_dst == 0);
4343 ureg_label_insn(ureg,
4344 inst->op,
4345 src, num_src,
4346 get_label(t,
4347 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4348 return;
4349
4350 case TGSI_OPCODE_TEX:
4351 case TGSI_OPCODE_TXB:
4352 case TGSI_OPCODE_TXD:
4353 case TGSI_OPCODE_TXL:
4354 case TGSI_OPCODE_TXP:
4355 case TGSI_OPCODE_TXQ:
4356 case TGSI_OPCODE_TXF:
4357 case TGSI_OPCODE_TEX2:
4358 case TGSI_OPCODE_TXB2:
4359 case TGSI_OPCODE_TXL2:
4360 src[num_src++] = t->samplers[inst->sampler];
4361 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4362 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4363 }
4364 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4365
4366 ureg_tex_insn(ureg,
4367 inst->op,
4368 dst, num_dst,
4369 tex_target,
4370 texoffsets, inst->tex_offset_num_offset,
4371 src, num_src);
4372 return;
4373
4374 case TGSI_OPCODE_SCS:
4375 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4376 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4377 break;
4378
4379 default:
4380 ureg_insn(ureg,
4381 inst->op,
4382 dst, num_dst,
4383 src, num_src);
4384 break;
4385 }
4386 }
4387
4388 /**
4389 * Emit the TGSI instructions for inverting and adjusting WPOS.
4390 * This code is unavoidable because it also depends on whether
4391 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4392 */
4393 static void
4394 emit_wpos_adjustment( struct st_translate *t,
4395 const struct gl_program *program,
4396 boolean invert,
4397 GLfloat adjX, GLfloat adjY[2])
4398 {
4399 struct ureg_program *ureg = t->ureg;
4400
4401 /* Fragment program uses fragment position input.
4402 * Need to replace instances of INPUT[WPOS] with temp T
4403 * where T = INPUT[WPOS] by y is inverted.
4404 */
4405 static const gl_state_index wposTransformState[STATE_LENGTH]
4406 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4407 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4408
4409 /* XXX: note we are modifying the incoming shader here! Need to
4410 * do this before emitting the constant decls below, or this
4411 * will be missed:
4412 */
4413 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4414 wposTransformState);
4415
4416 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4417 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4418 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
4419
4420 /* First, apply the coordinate shift: */
4421 if (adjX || adjY[0] || adjY[1]) {
4422 if (adjY[0] != adjY[1]) {
4423 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4424 * depending on whether inversion is actually going to be applied
4425 * or not, which is determined by testing against the inversion
4426 * state variable used below, which will be either +1 or -1.
4427 */
4428 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4429
4430 ureg_CMP(ureg, adj_temp,
4431 ureg_scalar(wpostrans, invert ? 2 : 0),
4432 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4433 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4434 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4435 } else {
4436 ureg_ADD(ureg, wpos_temp, wpos_input,
4437 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4438 }
4439 wpos_input = ureg_src(wpos_temp);
4440 } else {
4441 /* MOV wpos_temp, input[wpos]
4442 */
4443 ureg_MOV( ureg, wpos_temp, wpos_input );
4444 }
4445
4446 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4447 * inversion/identity, or the other way around if we're drawing to an FBO.
4448 */
4449 if (invert) {
4450 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4451 */
4452 ureg_MAD( ureg,
4453 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4454 wpos_input,
4455 ureg_scalar(wpostrans, 0),
4456 ureg_scalar(wpostrans, 1));
4457 } else {
4458 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4459 */
4460 ureg_MAD( ureg,
4461 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4462 wpos_input,
4463 ureg_scalar(wpostrans, 2),
4464 ureg_scalar(wpostrans, 3));
4465 }
4466
4467 /* Use wpos_temp as position input from here on:
4468 */
4469 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
4470 }
4471
4472
4473 /**
4474 * Emit fragment position/ooordinate code.
4475 */
4476 static void
4477 emit_wpos(struct st_context *st,
4478 struct st_translate *t,
4479 const struct gl_program *program,
4480 struct ureg_program *ureg)
4481 {
4482 const struct gl_fragment_program *fp =
4483 (const struct gl_fragment_program *) program;
4484 struct pipe_screen *pscreen = st->pipe->screen;
4485 GLfloat adjX = 0.0f;
4486 GLfloat adjY[2] = { 0.0f, 0.0f };
4487 boolean invert = FALSE;
4488
4489 /* Query the pixel center conventions supported by the pipe driver and set
4490 * adjX, adjY to help out if it cannot handle the requested one internally.
4491 *
4492 * The bias of the y-coordinate depends on whether y-inversion takes place
4493 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4494 * drawing to an FBO (causes additional inversion), and whether the the pipe
4495 * driver origin and the requested origin differ (the latter condition is
4496 * stored in the 'invert' variable).
4497 *
4498 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4499 *
4500 * center shift only:
4501 * i -> h: +0.5
4502 * h -> i: -0.5
4503 *
4504 * inversion only:
4505 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4506 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4507 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4508 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4509 *
4510 * inversion and center shift:
4511 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4512 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4513 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4514 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4515 */
4516 if (fp->OriginUpperLeft) {
4517 /* Fragment shader wants origin in upper-left */
4518 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4519 /* the driver supports upper-left origin */
4520 }
4521 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4522 /* the driver supports lower-left origin, need to invert Y */
4523 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4524 invert = TRUE;
4525 }
4526 else
4527 assert(0);
4528 }
4529 else {
4530 /* Fragment shader wants origin in lower-left */
4531 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4532 /* the driver supports lower-left origin */
4533 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4534 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4535 /* the driver supports upper-left origin, need to invert Y */
4536 invert = TRUE;
4537 else
4538 assert(0);
4539 }
4540
4541 if (fp->PixelCenterInteger) {
4542 /* Fragment shader wants pixel center integer */
4543 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4544 /* the driver supports pixel center integer */
4545 adjY[1] = 1.0f;
4546 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4547 }
4548 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4549 /* the driver supports pixel center half integer, need to bias X,Y */
4550 adjX = -0.5f;
4551 adjY[0] = -0.5f;
4552 adjY[1] = 0.5f;
4553 }
4554 else
4555 assert(0);
4556 }
4557 else {
4558 /* Fragment shader wants pixel center half integer */
4559 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4560 /* the driver supports pixel center half integer */
4561 }
4562 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4563 /* the driver supports pixel center integer, need to bias X,Y */
4564 adjX = adjY[0] = adjY[1] = 0.5f;
4565 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4566 }
4567 else
4568 assert(0);
4569 }
4570
4571 /* we invert after adjustment so that we avoid the MOV to temporary,
4572 * and reuse the adjustment ADD instead */
4573 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4574 }
4575
4576 /**
4577 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4578 * TGSI uses +1 for front, -1 for back.
4579 * This function converts the TGSI value to the GL value. Simply clamping/
4580 * saturating the value to [0,1] does the job.
4581 */
4582 static void
4583 emit_face_var(struct st_translate *t)
4584 {
4585 struct ureg_program *ureg = t->ureg;
4586 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4587 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
4588
4589 /* MOV_SAT face_temp, input[face] */
4590 face_temp = ureg_saturate(face_temp);
4591 ureg_MOV(ureg, face_temp, face_input);
4592
4593 /* Use face_temp as face input from here on: */
4594 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
4595 }
4596
4597 static void
4598 emit_edgeflags(struct st_translate *t)
4599 {
4600 struct ureg_program *ureg = t->ureg;
4601 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
4602 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4603
4604 ureg_MOV(ureg, edge_dst, edge_src);
4605 }
4606
4607 /**
4608 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4609 * \param program the program to translate
4610 * \param numInputs number of input registers used
4611 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4612 * input indexes
4613 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4614 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4615 * each input
4616 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4617 * \param numOutputs number of output registers used
4618 * \param outputMapping maps Mesa fragment program outputs to TGSI
4619 * generic outputs
4620 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4621 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4622 * each output
4623 *
4624 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4625 */
4626 extern "C" enum pipe_error
4627 st_translate_program(
4628 struct gl_context *ctx,
4629 uint procType,
4630 struct ureg_program *ureg,
4631 glsl_to_tgsi_visitor *program,
4632 const struct gl_program *proginfo,
4633 GLuint numInputs,
4634 const GLuint inputMapping[],
4635 const ubyte inputSemanticName[],
4636 const ubyte inputSemanticIndex[],
4637 const GLuint interpMode[],
4638 const GLboolean is_centroid[],
4639 GLuint numOutputs,
4640 const GLuint outputMapping[],
4641 const ubyte outputSemanticName[],
4642 const ubyte outputSemanticIndex[],
4643 boolean passthrough_edgeflags,
4644 boolean clamp_color)
4645 {
4646 struct st_translate *t;
4647 unsigned i;
4648 enum pipe_error ret = PIPE_OK;
4649
4650 assert(numInputs <= Elements(t->inputs));
4651 assert(numOutputs <= Elements(t->outputs));
4652
4653 t = CALLOC_STRUCT(st_translate);
4654 if (!t) {
4655 ret = PIPE_ERROR_OUT_OF_MEMORY;
4656 goto out;
4657 }
4658
4659 memset(t, 0, sizeof *t);
4660
4661 t->procType = procType;
4662 t->inputMapping = inputMapping;
4663 t->outputMapping = outputMapping;
4664 t->ureg = ureg;
4665
4666 if (program->shader_program) {
4667 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4668 struct gl_uniform_storage *const storage =
4669 &program->shader_program->UniformStorage[i];
4670
4671 _mesa_uniform_detach_all_driver_storage(storage);
4672 }
4673 }
4674
4675 /*
4676 * Declare input attributes.
4677 */
4678 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4679 for (i = 0; i < numInputs; i++) {
4680 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4681 inputSemanticName[i],
4682 inputSemanticIndex[i],
4683 interpMode[i], 0,
4684 is_centroid[i]);
4685 }
4686
4687 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
4688 /* Must do this after setting up t->inputs, and before
4689 * emitting constant references, below:
4690 */
4691 emit_wpos(st_context(ctx), t, proginfo, ureg);
4692 }
4693
4694 if (proginfo->InputsRead & FRAG_BIT_FACE)
4695 emit_face_var(t);
4696
4697 /*
4698 * Declare output attributes.
4699 */
4700 for (i = 0; i < numOutputs; i++) {
4701 switch (outputSemanticName[i]) {
4702 case TGSI_SEMANTIC_POSITION:
4703 t->outputs[i] = ureg_DECL_output(ureg,
4704 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4705 outputSemanticIndex[i]);
4706 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4707 break;
4708 case TGSI_SEMANTIC_STENCIL:
4709 t->outputs[i] = ureg_DECL_output(ureg,
4710 TGSI_SEMANTIC_STENCIL, /* Stencil */
4711 outputSemanticIndex[i]);
4712 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4713 break;
4714 case TGSI_SEMANTIC_COLOR:
4715 t->outputs[i] = ureg_DECL_output(ureg,
4716 TGSI_SEMANTIC_COLOR,
4717 outputSemanticIndex[i]);
4718 break;
4719 default:
4720 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4721 ret = PIPE_ERROR_BAD_INPUT;
4722 goto out;
4723 }
4724 }
4725 }
4726 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4727 for (i = 0; i < numInputs; i++) {
4728 t->inputs[i] = ureg_DECL_gs_input(ureg,
4729 i,
4730 inputSemanticName[i],
4731 inputSemanticIndex[i]);
4732 }
4733
4734 for (i = 0; i < numOutputs; i++) {
4735 t->outputs[i] = ureg_DECL_output(ureg,
4736 outputSemanticName[i],
4737 outputSemanticIndex[i]);
4738 }
4739 }
4740 else {
4741 assert(procType == TGSI_PROCESSOR_VERTEX);
4742
4743 for (i = 0; i < numInputs; i++) {
4744 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4745 }
4746
4747 for (i = 0; i < numOutputs; i++) {
4748 t->outputs[i] = ureg_DECL_output(ureg,
4749 outputSemanticName[i],
4750 outputSemanticIndex[i]);
4751 }
4752 if (passthrough_edgeflags)
4753 emit_edgeflags(t);
4754 }
4755
4756 /* Declare address register.
4757 */
4758 if (program->num_address_regs > 0) {
4759 assert(program->num_address_regs == 1);
4760 t->address[0] = ureg_DECL_address(ureg);
4761 }
4762
4763 /* Declare misc input registers
4764 */
4765 {
4766 GLbitfield sysInputs = proginfo->SystemValuesRead;
4767 unsigned numSys = 0;
4768 for (i = 0; sysInputs; i++) {
4769 if (sysInputs & (1 << i)) {
4770 unsigned semName = mesa_sysval_to_semantic[i];
4771 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4772 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4773 semName == TGSI_SEMANTIC_VERTEXID) {
4774 /* From Gallium perspective, these system values are always
4775 * integer, and require native integer support. However, if
4776 * native integer is supported on the vertex stage but not the
4777 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4778 * assumes these system values are floats. To resolve the
4779 * inconsistency, we insert a U2F.
4780 */
4781 struct st_context *st = st_context(ctx);
4782 struct pipe_screen *pscreen = st->pipe->screen;
4783 assert(procType == TGSI_PROCESSOR_VERTEX);
4784 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4785 if (!ctx->Const.NativeIntegers) {
4786 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4787 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4788 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4789 }
4790 }
4791 numSys++;
4792 sysInputs &= ~(1 << i);
4793 }
4794 }
4795 }
4796
4797 if (program->indirect_addr_temps) {
4798 /* If temps are accessed with indirect addressing, declare temporaries
4799 * in sequential order. Else, we declare them on demand elsewhere.
4800 * (Note: the number of temporaries is equal to program->next_temp)
4801 */
4802 for (i = 0; i < (unsigned)program->next_temp; i++) {
4803 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
4804 t->temps[i] = ureg_DECL_local_temporary(t->ureg);
4805 }
4806 }
4807
4808 /* Emit constants and uniforms. TGSI uses a single index space for these,
4809 * so we put all the translated regs in t->constants.
4810 */
4811 if (proginfo->Parameters) {
4812 t->constants = (struct ureg_src *)
4813 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4814 if (t->constants == NULL) {
4815 ret = PIPE_ERROR_OUT_OF_MEMORY;
4816 goto out;
4817 }
4818
4819 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4820 switch (proginfo->Parameters->Parameters[i].Type) {
4821 case PROGRAM_ENV_PARAM:
4822 case PROGRAM_LOCAL_PARAM:
4823 case PROGRAM_STATE_VAR:
4824 case PROGRAM_UNIFORM:
4825 t->constants[i] = ureg_DECL_constant(ureg, i);
4826 break;
4827
4828 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4829 * addressing of the const buffer.
4830 * FIXME: Be smarter and recognize param arrays:
4831 * indirect addressing is only valid within the referenced
4832 * array.
4833 */
4834 case PROGRAM_CONSTANT:
4835 if (program->indirect_addr_consts)
4836 t->constants[i] = ureg_DECL_constant(ureg, i);
4837 else
4838 t->constants[i] = emit_immediate(t,
4839 proginfo->Parameters->ParameterValues[i],
4840 proginfo->Parameters->Parameters[i].DataType,
4841 4);
4842 break;
4843 default:
4844 break;
4845 }
4846 }
4847 }
4848
4849 if (program->shader_program) {
4850 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4851
4852 for (i = 0; i < num_ubos; i++) {
4853 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4854 }
4855 }
4856
4857 /* Emit immediate values.
4858 */
4859 t->immediates = (struct ureg_src *)
4860 calloc(program->num_immediates, sizeof(struct ureg_src));
4861 if (t->immediates == NULL) {
4862 ret = PIPE_ERROR_OUT_OF_MEMORY;
4863 goto out;
4864 }
4865 i = 0;
4866 foreach_iter(exec_list_iterator, iter, program->immediates) {
4867 immediate_storage *imm = (immediate_storage *)iter.get();
4868 assert(i < program->num_immediates);
4869 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4870 }
4871 assert(i == program->num_immediates);
4872
4873 /* texture samplers */
4874 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
4875 if (program->samplers_used & (1 << i)) {
4876 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4877 }
4878 }
4879
4880 /* Emit each instruction in turn:
4881 */
4882 foreach_iter(exec_list_iterator, iter, program->instructions) {
4883 set_insn_start(t, ureg_get_instruction_number(ureg));
4884 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4885 clamp_color);
4886 }
4887
4888 /* Fix up all emitted labels:
4889 */
4890 for (i = 0; i < t->labels_count; i++) {
4891 ureg_fixup_label(ureg, t->labels[i].token,
4892 t->insn[t->labels[i].branch_target]);
4893 }
4894
4895 if (program->shader_program) {
4896 /* This has to be done last. Any operation the can cause
4897 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4898 * program constant) has to happen before creating this linkage.
4899 */
4900 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4901 if (program->shader_program->_LinkedShaders[i] == NULL)
4902 continue;
4903
4904 _mesa_associate_uniform_storage(ctx, program->shader_program,
4905 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4906 }
4907 }
4908
4909 out:
4910 if (t) {
4911 free(t->insn);
4912 free(t->labels);
4913 free(t->constants);
4914 free(t->immediates);
4915
4916 if (t->error) {
4917 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4918 }
4919
4920 free(t);
4921 }
4922
4923 return ret;
4924 }
4925 /* ----------------------------- End TGSI code ------------------------------ */
4926
4927 /**
4928 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4929 * generating Mesa IR.
4930 */
4931 static struct gl_program *
4932 get_mesa_program(struct gl_context *ctx,
4933 struct gl_shader_program *shader_program,
4934 struct gl_shader *shader)
4935 {
4936 glsl_to_tgsi_visitor* v;
4937 struct gl_program *prog;
4938 GLenum target;
4939 const char *target_string;
4940 bool progress;
4941 struct gl_shader_compiler_options *options =
4942 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4943
4944 switch (shader->Type) {
4945 case GL_VERTEX_SHADER:
4946 target = GL_VERTEX_PROGRAM_ARB;
4947 target_string = "vertex";
4948 break;
4949 case GL_FRAGMENT_SHADER:
4950 target = GL_FRAGMENT_PROGRAM_ARB;
4951 target_string = "fragment";
4952 break;
4953 case GL_GEOMETRY_SHADER:
4954 target = GL_GEOMETRY_PROGRAM_NV;
4955 target_string = "geometry";
4956 break;
4957 default:
4958 assert(!"should not be reached");
4959 return NULL;
4960 }
4961
4962 validate_ir_tree(shader->ir);
4963
4964 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4965 if (!prog)
4966 return NULL;
4967 prog->Parameters = _mesa_new_parameter_list();
4968 v = new glsl_to_tgsi_visitor();
4969 v->ctx = ctx;
4970 v->prog = prog;
4971 v->shader_program = shader_program;
4972 v->options = options;
4973 v->glsl_version = ctx->Const.GLSLVersion;
4974 v->native_integers = ctx->Const.NativeIntegers;
4975
4976 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
4977 prog->Parameters);
4978
4979 /* Remove reads from output registers. */
4980 lower_output_reads(shader->ir);
4981
4982 /* Emit intermediate IR for main(). */
4983 visit_exec_list(shader->ir, v);
4984
4985 /* Now emit bodies for any functions that were used. */
4986 do {
4987 progress = GL_FALSE;
4988
4989 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4990 function_entry *entry = (function_entry *)iter.get();
4991
4992 if (!entry->bgn_inst) {
4993 v->current_function = entry;
4994
4995 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
4996 entry->bgn_inst->function = entry;
4997
4998 visit_exec_list(&entry->sig->body, v);
4999
5000 glsl_to_tgsi_instruction *last;
5001 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5002 if (last->op != TGSI_OPCODE_RET)
5003 v->emit(NULL, TGSI_OPCODE_RET);
5004
5005 glsl_to_tgsi_instruction *end;
5006 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5007 end->function = entry;
5008
5009 progress = GL_TRUE;
5010 }
5011 }
5012 } while (progress);
5013
5014 #if 0
5015 /* Print out some information (for debugging purposes) used by the
5016 * optimization passes. */
5017 for (i=0; i < v->next_temp; i++) {
5018 int fr = v->get_first_temp_read(i);
5019 int fw = v->get_first_temp_write(i);
5020 int lr = v->get_last_temp_read(i);
5021 int lw = v->get_last_temp_write(i);
5022
5023 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5024 assert(fw <= fr);
5025 }
5026 #endif
5027
5028 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5029 v->simplify_cmp();
5030 v->copy_propagate();
5031 while (v->eliminate_dead_code_advanced());
5032
5033 /* FIXME: These passes to optimize temporary registers don't work when there
5034 * is indirect addressing of the temporary register space. We need proper
5035 * array support so that we don't have to give up these passes in every
5036 * shader that uses arrays.
5037 */
5038 if (!v->indirect_addr_temps) {
5039 v->eliminate_dead_code();
5040 v->merge_registers();
5041 v->renumber_registers();
5042 }
5043
5044 /* Write the END instruction. */
5045 v->emit(NULL, TGSI_OPCODE_END);
5046
5047 if (ctx->Shader.Flags & GLSL_DUMP) {
5048 printf("\n");
5049 printf("GLSL IR for linked %s program %d:\n", target_string,
5050 shader_program->Name);
5051 _mesa_print_ir(shader->ir, NULL);
5052 printf("\n");
5053 printf("\n");
5054 fflush(stdout);
5055 }
5056
5057 prog->Instructions = NULL;
5058 prog->NumInstructions = 0;
5059
5060 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
5061 count_resources(v, prog);
5062
5063 _mesa_reference_program(ctx, &shader->Program, prog);
5064
5065 /* This has to be done last. Any operation the can cause
5066 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5067 * program constant) has to happen before creating this linkage.
5068 */
5069 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5070 if (!shader_program->LinkStatus) {
5071 return NULL;
5072 }
5073
5074 struct st_vertex_program *stvp;
5075 struct st_fragment_program *stfp;
5076 struct st_geometry_program *stgp;
5077
5078 switch (shader->Type) {
5079 case GL_VERTEX_SHADER:
5080 stvp = (struct st_vertex_program *)prog;
5081 stvp->glsl_to_tgsi = v;
5082 break;
5083 case GL_FRAGMENT_SHADER:
5084 stfp = (struct st_fragment_program *)prog;
5085 stfp->glsl_to_tgsi = v;
5086 break;
5087 case GL_GEOMETRY_SHADER:
5088 stgp = (struct st_geometry_program *)prog;
5089 stgp->glsl_to_tgsi = v;
5090 break;
5091 default:
5092 assert(!"should not be reached");
5093 return NULL;
5094 }
5095
5096 return prog;
5097 }
5098
5099 extern "C" {
5100
5101 struct gl_shader *
5102 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5103 {
5104 struct gl_shader *shader;
5105 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5106 type == GL_GEOMETRY_SHADER_ARB);
5107 shader = rzalloc(NULL, struct gl_shader);
5108 if (shader) {
5109 shader->Type = type;
5110 shader->Name = name;
5111 _mesa_init_shader(ctx, shader);
5112 }
5113 return shader;
5114 }
5115
5116 struct gl_shader_program *
5117 st_new_shader_program(struct gl_context *ctx, GLuint name)
5118 {
5119 struct gl_shader_program *shProg;
5120 shProg = rzalloc(NULL, struct gl_shader_program);
5121 if (shProg) {
5122 shProg->Name = name;
5123 _mesa_init_shader_program(ctx, shProg);
5124 }
5125 return shProg;
5126 }
5127
5128 /**
5129 * Link a shader.
5130 * Called via ctx->Driver.LinkShader()
5131 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5132 * with code lowering and other optimizations.
5133 */
5134 GLboolean
5135 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5136 {
5137 assert(prog->LinkStatus);
5138
5139 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5140 if (prog->_LinkedShaders[i] == NULL)
5141 continue;
5142
5143 bool progress;
5144 exec_list *ir = prog->_LinkedShaders[i]->ir;
5145 const struct gl_shader_compiler_options *options =
5146 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5147
5148 do {
5149 unsigned what_to_lower = MOD_TO_FRACT | DIV_TO_MUL_RCP |
5150 EXP_TO_EXP2 | LOG_TO_LOG2;
5151 if (options->EmitNoPow)
5152 what_to_lower |= POW_TO_EXP2;
5153 if (!ctx->Const.NativeIntegers)
5154 what_to_lower |= INT_DIV_TO_MUL_RCP;
5155
5156 progress = false;
5157
5158 /* Lowering */
5159 do_mat_op_to_vec(ir);
5160 lower_instructions(ir, what_to_lower);
5161
5162 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5163
5164 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5165
5166 progress = do_common_optimization(ir, true, true,
5167 options->MaxUnrollIterations)
5168 || progress;
5169
5170 progress = lower_quadop_vector(ir, false) || progress;
5171
5172 if (options->MaxIfDepth == 0)
5173 progress = lower_discard(ir) || progress;
5174
5175 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5176
5177 if (options->EmitNoNoise)
5178 progress = lower_noise(ir) || progress;
5179
5180 /* If there are forms of indirect addressing that the driver
5181 * cannot handle, perform the lowering pass.
5182 */
5183 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
5184 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
5185 progress =
5186 lower_variable_index_to_cond_assign(ir,
5187 options->EmitNoIndirectInput,
5188 options->EmitNoIndirectOutput,
5189 options->EmitNoIndirectTemp,
5190 options->EmitNoIndirectUniform)
5191 || progress;
5192
5193 progress = do_vec_index_to_cond_assign(ir) || progress;
5194
5195 } while (progress);
5196
5197 validate_ir_tree(ir);
5198 }
5199
5200 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5201 struct gl_program *linked_prog;
5202
5203 if (prog->_LinkedShaders[i] == NULL)
5204 continue;
5205
5206 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5207
5208 if (linked_prog) {
5209 static const GLenum targets[] = {
5210 GL_VERTEX_PROGRAM_ARB,
5211 GL_FRAGMENT_PROGRAM_ARB,
5212 GL_GEOMETRY_PROGRAM_NV
5213 };
5214
5215 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5216 linked_prog);
5217 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) {
5218 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5219 NULL);
5220 _mesa_reference_program(ctx, &linked_prog, NULL);
5221 return GL_FALSE;
5222 }
5223 }
5224
5225 _mesa_reference_program(ctx, &linked_prog, NULL);
5226 }
5227
5228 return GL_TRUE;
5229 }
5230
5231 void
5232 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5233 const GLuint outputMapping[],
5234 struct pipe_stream_output_info *so)
5235 {
5236 unsigned i;
5237 struct gl_transform_feedback_info *info =
5238 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5239
5240 for (i = 0; i < info->NumOutputs; i++) {
5241 so->output[i].register_index =
5242 outputMapping[info->Outputs[i].OutputRegister];
5243 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5244 so->output[i].num_components = info->Outputs[i].NumComponents;
5245 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5246 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5247 }
5248
5249 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5250 so->stride[i] = info->BufferStride[i];
5251 }
5252 so->num_outputs = info->NumOutputs;
5253 }
5254
5255 } /* extern "C" */