2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of temporary registers.
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
83 #define MAX_TEMPS 4096
86 * Maximum number of arrays
88 #define MAX_ARRAYS 256
90 /* will be 4 for GLSL 4.00 */
91 #define MAX_GLSL_TEXTURE_OFFSET 1
96 static int swizzle_for_size(int size
);
99 * This struct is a corresponding struct to TGSI ureg_src.
103 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
107 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
108 this->swizzle
= swizzle_for_size(type
->vector_elements
);
110 this->swizzle
= SWIZZLE_XYZW
;
113 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
114 this->reladdr
= NULL
;
115 this->reladdr2
= NULL
;
116 this->has_index2
= false;
119 st_src_reg(gl_register_file file
, int index
, int type
)
125 this->swizzle
= SWIZZLE_XYZW
;
127 this->reladdr
= NULL
;
128 this->reladdr2
= NULL
;
129 this->has_index2
= false;
132 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
137 this->index2D
= index2D
;
138 this->swizzle
= SWIZZLE_XYZW
;
140 this->reladdr
= NULL
;
141 this->reladdr2
= NULL
;
142 this->has_index2
= false;
147 this->type
= GLSL_TYPE_ERROR
;
148 this->file
= PROGRAM_UNDEFINED
;
153 this->reladdr
= NULL
;
154 this->reladdr2
= NULL
;
155 this->has_index2
= false;
158 explicit st_src_reg(st_dst_reg reg
);
160 gl_register_file file
; /**< PROGRAM_* from Mesa */
161 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
163 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
164 int negate
; /**< NEGATE_XYZW mask from mesa */
165 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
166 /** Register index should be offset by the integer in this reg. */
168 st_src_reg
*reladdr2
;
174 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
178 this->writemask
= writemask
;
179 this->cond_mask
= COND_TR
;
180 this->reladdr
= NULL
;
184 st_dst_reg(gl_register_file file
, int writemask
, int type
)
188 this->writemask
= writemask
;
189 this->cond_mask
= COND_TR
;
190 this->reladdr
= NULL
;
196 this->type
= GLSL_TYPE_ERROR
;
197 this->file
= PROGRAM_UNDEFINED
;
200 this->cond_mask
= COND_TR
;
201 this->reladdr
= NULL
;
204 explicit st_dst_reg(st_src_reg reg
);
206 gl_register_file file
; /**< PROGRAM_* from Mesa */
207 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
208 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
210 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
211 /** Register index should be offset by the integer in this reg. */
215 st_src_reg::st_src_reg(st_dst_reg reg
)
217 this->type
= reg
.type
;
218 this->file
= reg
.file
;
219 this->index
= reg
.index
;
220 this->swizzle
= SWIZZLE_XYZW
;
222 this->reladdr
= reg
.reladdr
;
224 this->reladdr2
= NULL
;
225 this->has_index2
= false;
228 st_dst_reg::st_dst_reg(st_src_reg reg
)
230 this->type
= reg
.type
;
231 this->file
= reg
.file
;
232 this->index
= reg
.index
;
233 this->writemask
= WRITEMASK_XYZW
;
234 this->cond_mask
= COND_TR
;
235 this->reladdr
= reg
.reladdr
;
238 class glsl_to_tgsi_instruction
: public exec_node
{
240 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
245 /** Pointer to the ir source this tree came from for debugging */
247 GLboolean cond_update
;
249 int sampler
; /**< sampler index */
250 int tex_target
; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow
;
252 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
253 unsigned tex_offset_num_offset
;
254 int dead_mask
; /**< Used in dead code elimination */
256 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
259 class variable_storage
: public exec_node
{
261 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
262 : file(file
), index(index
), var(var
)
267 gl_register_file file
;
269 ir_variable
*var
; /* variable that maps to this, if any */
272 class immediate_storage
: public exec_node
{
274 immediate_storage(gl_constant_value
*values
, int size
, int type
)
276 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
281 gl_constant_value values
[4];
282 int size
; /**< Number of components (1-4) */
283 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
286 class function_entry
: public exec_node
{
288 ir_function_signature
*sig
;
291 * identifier of this function signature used by the program.
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
301 * Pointer to first instruction of the function body.
303 * Set during function body emits after main() is processed.
305 glsl_to_tgsi_instruction
*bgn_inst
;
308 * Index of the first instruction of the function body in actual TGSI.
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
314 /** Storage for the return value. */
315 st_src_reg return_reg
;
318 struct glsl_to_tgsi_visitor
: public ir_visitor
{
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
323 function_entry
*current_function
;
325 struct gl_context
*ctx
;
326 struct gl_program
*prog
;
327 struct gl_shader_program
*shader_program
;
328 struct gl_shader_compiler_options
*options
;
332 unsigned array_sizes
[MAX_ARRAYS
];
335 int num_address_regs
;
337 bool indirect_addr_consts
;
340 bool native_integers
;
343 variable_storage
*find_variable_storage(ir_variable
*var
);
345 int add_constant(gl_register_file file
, gl_constant_value values
[4],
346 int size
, int datatype
, GLuint
*swizzle_out
);
348 function_entry
*get_function_signature(ir_function_signature
*sig
);
350 st_src_reg
get_temp(const glsl_type
*type
);
351 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
353 st_src_reg
st_src_reg_for_float(float val
);
354 st_src_reg
st_src_reg_for_int(int val
);
355 st_src_reg
st_src_reg_for_type(int type
, int val
);
358 * \name Visit methods
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
365 virtual void visit(ir_variable
*);
366 virtual void visit(ir_loop
*);
367 virtual void visit(ir_loop_jump
*);
368 virtual void visit(ir_function_signature
*);
369 virtual void visit(ir_function
*);
370 virtual void visit(ir_expression
*);
371 virtual void visit(ir_swizzle
*);
372 virtual void visit(ir_dereference_variable
*);
373 virtual void visit(ir_dereference_array
*);
374 virtual void visit(ir_dereference_record
*);
375 virtual void visit(ir_assignment
*);
376 virtual void visit(ir_constant
*);
377 virtual void visit(ir_call
*);
378 virtual void visit(ir_return
*);
379 virtual void visit(ir_discard
*);
380 virtual void visit(ir_texture
*);
381 virtual void visit(ir_if
*);
382 virtual void visit(ir_emit_vertex
*);
383 virtual void visit(ir_end_primitive
*);
388 /** List of variable_storage */
391 /** List of immediate_storage */
392 exec_list immediates
;
393 unsigned num_immediates
;
395 /** List of function_entry */
396 exec_list function_signatures
;
397 int next_signature_id
;
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions
;
402 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
404 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
405 st_dst_reg dst
, st_src_reg src0
);
407 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
408 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
410 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
412 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
414 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
416 st_src_reg src0
, st_src_reg src1
);
419 * Emit the correct dot-product instruction for the type of arguments
421 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
427 void emit_scalar(ir_instruction
*ir
, unsigned op
,
428 st_dst_reg dst
, st_src_reg src0
);
430 void emit_scalar(ir_instruction
*ir
, unsigned op
,
431 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
433 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
435 void emit_scs(ir_instruction
*ir
, unsigned op
,
436 st_dst_reg dst
, const st_src_reg
&src
);
438 bool try_emit_mad(ir_expression
*ir
,
440 bool try_emit_mad_for_and_not(ir_expression
*ir
,
442 bool try_emit_sat(ir_expression
*ir
);
444 void emit_swz(ir_expression
*ir
);
446 bool process_move_condition(ir_rvalue
*ir
);
448 void simplify_cmp(void);
450 void rename_temp_register(int index
, int new_index
);
451 int get_first_temp_read(int index
);
452 int get_first_temp_write(int index
);
453 int get_last_temp_read(int index
);
454 int get_last_temp_write(int index
);
456 void copy_propagate(void);
457 void eliminate_dead_code(void);
458 int eliminate_dead_code_advanced(void);
459 void merge_registers(void);
460 void renumber_registers(void);
462 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
463 st_dst_reg
*l
, st_src_reg
*r
);
468 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
470 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
472 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
473 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
476 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
479 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
483 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
486 prog
->LinkStatus
= GL_FALSE
;
490 swizzle_for_size(int size
)
492 int size_swizzles
[4] = {
493 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
494 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
495 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
496 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
499 assert((size
>= 1) && (size
<= 4));
500 return size_swizzles
[size
- 1];
504 is_tex_instruction(unsigned opcode
)
506 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
511 num_inst_dst_regs(unsigned opcode
)
513 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
514 return info
->num_dst
;
518 num_inst_src_regs(unsigned opcode
)
520 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
521 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
524 glsl_to_tgsi_instruction
*
525 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
527 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
529 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
530 int num_reladdr
= 0, i
;
532 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
534 /* If we have to do relative addressing, we want to load the ARL
535 * reg directly for one of the regs, and preload the other reladdr
536 * sources into temps.
538 num_reladdr
+= dst
.reladdr
!= NULL
;
539 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
540 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
541 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
543 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
544 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
545 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
548 emit_arl(ir
, address_reg
, *dst
.reladdr
);
551 assert(num_reladdr
== 0);
561 inst
->function
= NULL
;
563 /* Update indirect addressing status used by TGSI */
566 case PROGRAM_STATE_VAR
:
567 case PROGRAM_CONSTANT
:
568 case PROGRAM_UNIFORM
:
569 this->indirect_addr_consts
= true;
571 case PROGRAM_IMMEDIATE
:
572 assert(!"immediates should not have indirect addressing");
579 for (i
=0; i
<3; i
++) {
580 if(inst
->src
[i
].reladdr
) {
581 switch(inst
->src
[i
].file
) {
582 case PROGRAM_STATE_VAR
:
583 case PROGRAM_CONSTANT
:
584 case PROGRAM_UNIFORM
:
585 this->indirect_addr_consts
= true;
587 case PROGRAM_IMMEDIATE
:
588 assert(!"immediates should not have indirect addressing");
597 this->instructions
.push_tail(inst
);
603 glsl_to_tgsi_instruction
*
604 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
605 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
607 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
610 glsl_to_tgsi_instruction
*
611 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
612 st_dst_reg dst
, st_src_reg src0
)
614 assert(dst
.writemask
!= 0);
615 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
618 glsl_to_tgsi_instruction
*
619 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
621 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
625 * Determines whether to use an integer, unsigned integer, or float opcode
626 * based on the operands and input opcode, then emits the result.
629 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
631 st_src_reg src0
, st_src_reg src1
)
633 int type
= GLSL_TYPE_FLOAT
;
635 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
636 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
637 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
638 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
640 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
641 type
= GLSL_TYPE_FLOAT
;
642 else if (native_integers
)
643 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
645 #define case4(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
652 op = TGSI_OPCODE_##f; \
655 #define case3(f, i, u) case4(f, f, i, u)
656 #define case2fi(f, i) case4(f, f, i, i)
657 #define case2iu(i, u) case4(i, LAST, i, u)
659 #define casecomp(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) \
662 op = TGSI_OPCODE_##i; \
663 else if (type == GLSL_TYPE_UINT) \
664 op = TGSI_OPCODE_##u; \
665 else if (native_integers) \
666 op = TGSI_OPCODE_##f; \
668 op = TGSI_OPCODE_##c; \
675 case3(DIV
, IDIV
, UDIV
);
676 case3(MAX
, IMAX
, UMAX
);
677 case3(MIN
, IMIN
, UMIN
);
680 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
681 casecomp(SNE
, FSNE
, USNE
, USNE
);
682 casecomp(SGE
, FSGE
, ISGE
, USGE
);
683 casecomp(SLT
, FSLT
, ISLT
, USLT
);
688 case3(ABS
, IABS
, IABS
);
693 assert(op
!= TGSI_OPCODE_LAST
);
697 glsl_to_tgsi_instruction
*
698 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
699 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
702 static const unsigned dot_opcodes
[] = {
703 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
706 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
710 * Emits TGSI scalar opcodes to produce unique answers across channels.
712 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
713 * channel determines the result across all channels. So to do a vec4
714 * of this operation, we want to emit a scalar per source channel used
715 * to produce dest channels.
718 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
720 st_src_reg orig_src0
, st_src_reg orig_src1
)
723 int done_mask
= ~dst
.writemask
;
725 /* TGSI RCP is a scalar operation splatting results to all channels,
726 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
729 for (i
= 0; i
< 4; i
++) {
730 GLuint this_mask
= (1 << i
);
731 glsl_to_tgsi_instruction
*inst
;
732 st_src_reg src0
= orig_src0
;
733 st_src_reg src1
= orig_src1
;
735 if (done_mask
& this_mask
)
738 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
739 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
740 for (j
= i
+ 1; j
< 4; j
++) {
741 /* If there is another enabled component in the destination that is
742 * derived from the same inputs, generate its value on this pass as
745 if (!(done_mask
& (1 << j
)) &&
746 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
747 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
748 this_mask
|= (1 << j
);
751 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
752 src0_swiz
, src0_swiz
);
753 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
754 src1_swiz
, src1_swiz
);
756 inst
= emit(ir
, op
, dst
, src0
, src1
);
757 inst
->dst
.writemask
= this_mask
;
758 done_mask
|= this_mask
;
763 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
764 st_dst_reg dst
, st_src_reg src0
)
766 st_src_reg undef
= undef_src
;
768 undef
.swizzle
= SWIZZLE_XXXX
;
770 emit_scalar(ir
, op
, dst
, src0
, undef
);
774 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
775 st_dst_reg dst
, st_src_reg src0
)
777 int op
= TGSI_OPCODE_ARL
;
779 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
780 op
= TGSI_OPCODE_UARL
;
782 assert(dst
.file
== PROGRAM_ADDRESS
);
783 if (dst
.index
>= this->num_address_regs
)
784 this->num_address_regs
= dst
.index
+ 1;
786 emit(NULL
, op
, dst
, src0
);
790 * Emit an TGSI_OPCODE_SCS instruction
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
806 const st_src_reg
&src
)
808 /* Vertex programs cannot use the SCS opcode.
810 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
811 emit_scalar(ir
, op
, dst
, src
);
815 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
816 const unsigned scs_mask
= (1U << component
);
817 int done_mask
= ~dst
.writemask
;
820 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
825 if (scs_mask
!= unsigned(dst
.writemask
)) {
826 tmp
= get_temp(glsl_type::vec4_type
);
829 for (unsigned i
= 0; i
< 4; i
++) {
830 unsigned this_mask
= (1U << i
);
831 st_src_reg src0
= src
;
833 if ((done_mask
& this_mask
) != 0)
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
842 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
844 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
845 src0_swiz
, src0_swiz
);
846 for (unsigned j
= i
+ 1; j
< 4; j
++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
851 if (!(done_mask
& (1 << j
)) &&
852 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
853 this_mask
|= (1 << j
);
857 if (this_mask
!= scs_mask
) {
858 glsl_to_tgsi_instruction
*inst
;
859 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
861 /* Emit the SCS instruction.
863 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
864 inst
->dst
.writemask
= scs_mask
;
866 /* Move the result of the SCS instruction to the desired location in
869 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
870 component
, component
);
871 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
872 inst
->dst
.writemask
= this_mask
;
874 /* Emit the SCS instruction to write directly to the destination.
876 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
877 inst
->dst
.writemask
= scs_mask
;
880 done_mask
|= this_mask
;
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
886 gl_constant_value values
[4], int size
, int datatype
,
889 if (file
== PROGRAM_CONSTANT
) {
890 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
891 size
, datatype
, swizzle_out
);
894 immediate_storage
*entry
;
895 assert(file
== PROGRAM_IMMEDIATE
);
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
900 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
901 entry
= (immediate_storage
*)iter
.get();
903 if (entry
->size
== size
&&
904 entry
->type
== datatype
&&
905 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
911 /* Add this immediate to the list. */
912 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
913 this->immediates
.push_tail(entry
);
914 this->num_immediates
++;
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
922 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
923 union gl_constant_value uval
;
926 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
934 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
935 union gl_constant_value uval
;
937 assert(native_integers
);
940 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
949 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
950 st_src_reg_for_int(val
);
952 return st_src_reg_for_float(val
);
956 type_size(const struct glsl_type
*type
)
961 switch (type
->base_type
) {
964 case GLSL_TYPE_FLOAT
:
966 if (type
->is_matrix()) {
967 return type
->matrix_columns
;
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
976 case GLSL_TYPE_ARRAY
:
977 assert(type
->length
> 0);
978 return type_size(type
->fields
.array
) * type
->length
;
979 case GLSL_TYPE_STRUCT
:
981 for (i
= 0; i
< type
->length
; i
++) {
982 size
+= type_size(type
->fields
.structure
[i
].type
);
985 case GLSL_TYPE_SAMPLER
:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
990 case GLSL_TYPE_ATOMIC_UINT
:
991 case GLSL_TYPE_INTERFACE
:
993 case GLSL_TYPE_ERROR
:
994 assert(!"Invalid type in type_size");
1001 * In the initial pass of codegen, we assign temporary numbers to
1002 * intermediate results. (not SSA -- variable assignments will reuse
1006 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1010 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1014 if (!options
->EmitNoIndirectTemp
&&
1015 (type
->is_array() || type
->is_matrix())) {
1017 src
.file
= PROGRAM_ARRAY
;
1018 src
.index
= next_array
<< 16 | 0x8000;
1019 array_sizes
[next_array
] = type_size(type
);
1023 src
.file
= PROGRAM_TEMPORARY
;
1024 src
.index
= next_temp
;
1025 next_temp
+= type_size(type
);
1028 if (type
->is_array() || type
->is_record()) {
1029 src
.swizzle
= SWIZZLE_NOOP
;
1031 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1038 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1041 variable_storage
*entry
;
1043 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1044 entry
= (variable_storage
*)iter
.get();
1046 if (entry
->var
== var
)
1054 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1056 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1057 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1059 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1060 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1063 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1065 const ir_state_slot
*const slots
= ir
->state_slots
;
1066 assert(ir
->state_slots
!= NULL
);
1068 /* Check if this statevar's setup in the STATE file exactly
1069 * matches how we'll want to reference it as a
1070 * struct/array/whatever. If not, then we need to move it into
1071 * temporary storage and hope that it'll get copy-propagated
1074 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1075 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1080 variable_storage
*storage
;
1082 if (i
== ir
->num_state_slots
) {
1083 /* We'll set the index later. */
1084 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1085 this->variables
.push_tail(storage
);
1089 /* The variable_storage constructor allocates slots based on the size
1090 * of the type. However, this had better match the number of state
1091 * elements that we're going to copy into the new temporary.
1093 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1095 dst
= st_dst_reg(get_temp(ir
->type
));
1097 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1099 this->variables
.push_tail(storage
);
1103 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1104 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1105 (gl_state_index
*)slots
[i
].tokens
);
1107 if (storage
->file
== PROGRAM_STATE_VAR
) {
1108 if (storage
->index
== -1) {
1109 storage
->index
= index
;
1111 assert(index
== storage
->index
+ (int)i
);
1114 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1115 * the data being moved since MOV does not care about the type of
1116 * data it is moving, and we don't want to declare registers with
1117 * array or struct types.
1119 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1120 src
.swizzle
= slots
[i
].swizzle
;
1121 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1122 /* even a float takes up a whole vec4 reg in a struct/array. */
1127 if (storage
->file
== PROGRAM_TEMPORARY
&&
1128 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1129 fail_link(this->shader_program
,
1130 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1131 ir
->name
, dst
.index
- storage
->index
,
1132 type_size(ir
->type
));
1138 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1140 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1142 visit_exec_list(&ir
->body_instructions
, this);
1144 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1148 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1151 case ir_loop_jump::jump_break
:
1152 emit(NULL
, TGSI_OPCODE_BRK
);
1154 case ir_loop_jump::jump_continue
:
1155 emit(NULL
, TGSI_OPCODE_CONT
);
1162 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1169 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1171 /* Ignore function bodies other than main() -- we shouldn't see calls to
1172 * them since they should all be inlined before we get to glsl_to_tgsi.
1174 if (strcmp(ir
->name
, "main") == 0) {
1175 const ir_function_signature
*sig
;
1178 sig
= ir
->matching_signature(NULL
, &empty
);
1182 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1183 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1191 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1193 int nonmul_operand
= 1 - mul_operand
;
1195 st_dst_reg result_dst
;
1197 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1198 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1201 expr
->operands
[0]->accept(this);
1203 expr
->operands
[1]->accept(this);
1205 ir
->operands
[nonmul_operand
]->accept(this);
1208 this->result
= get_temp(ir
->type
);
1209 result_dst
= st_dst_reg(this->result
);
1210 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1211 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1220 * implemented using multiplication, and logical-or is implemented using
1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1222 * As result, the logical expression (a & !b) can be rewritten as:
1226 * - (a * 1) - (a * b)
1230 * This final expression can be implemented as a single MAD(a, -b, a)
1234 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1236 const int other_operand
= 1 - try_operand
;
1239 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1240 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1243 ir
->operands
[other_operand
]->accept(this);
1245 expr
->operands
[0]->accept(this);
1248 b
.negate
= ~b
.negate
;
1250 this->result
= get_temp(ir
->type
);
1251 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1257 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1259 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1261 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1262 !st_context(this->ctx
)->has_shader_model3
) {
1266 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1270 sat_src
->accept(this);
1271 st_src_reg src
= this->result
;
1273 /* If we generated an expression instruction into a temporary in
1274 * processing the saturate's operand, apply the saturate to that
1275 * instruction. Otherwise, generate a MOV to do the saturate.
1277 * Note that we have to be careful to only do this optimization if
1278 * the instruction in question was what generated src->result. For
1279 * example, ir_dereference_array might generate a MUL instruction
1280 * to create the reladdr, and return us a src reg using that
1281 * reladdr. That MUL result is not the value we're trying to
1284 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1285 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1286 sat_src_expr
->operation
== ir_binop_add
||
1287 sat_src_expr
->operation
== ir_binop_dot
)) {
1288 glsl_to_tgsi_instruction
*new_inst
;
1289 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1290 new_inst
->saturate
= true;
1292 this->result
= get_temp(ir
->type
);
1293 st_dst_reg result_dst
= st_dst_reg(this->result
);
1294 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1295 glsl_to_tgsi_instruction
*inst
;
1296 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1297 inst
->saturate
= true;
1304 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1305 st_src_reg
*reg
, int *num_reladdr
)
1307 if (!reg
->reladdr
&& !reg
->reladdr2
)
1310 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1311 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1313 if (*num_reladdr
!= 1) {
1314 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1316 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1324 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1326 unsigned int operand
;
1327 st_src_reg op
[Elements(ir
->operands
)];
1328 st_src_reg result_src
;
1329 st_dst_reg result_dst
;
1331 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1333 if (ir
->operation
== ir_binop_add
) {
1334 if (try_emit_mad(ir
, 1))
1336 if (try_emit_mad(ir
, 0))
1340 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1342 if (ir
->operation
== ir_binop_logic_and
) {
1343 if (try_emit_mad_for_and_not(ir
, 1))
1345 if (try_emit_mad_for_and_not(ir
, 0))
1349 if (try_emit_sat(ir
))
1352 if (ir
->operation
== ir_quadop_vector
)
1353 assert(!"ir_quadop_vector should have been lowered");
1355 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1356 this->result
.file
= PROGRAM_UNDEFINED
;
1357 ir
->operands
[operand
]->accept(this);
1358 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1359 printf("Failed to get tree for expression operand:\n");
1360 ir
->operands
[operand
]->print();
1364 op
[operand
] = this->result
;
1366 /* Matrix expression operands should have been broken down to vector
1367 * operations already.
1369 assert(!ir
->operands
[operand
]->type
->is_matrix());
1372 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1373 if (ir
->operands
[1]) {
1374 vector_elements
= MAX2(vector_elements
,
1375 ir
->operands
[1]->type
->vector_elements
);
1378 this->result
.file
= PROGRAM_UNDEFINED
;
1380 /* Storage for our result. Ideally for an assignment we'd be using
1381 * the actual storage for the result here, instead.
1383 result_src
= get_temp(ir
->type
);
1384 /* convenience for the emit functions below. */
1385 result_dst
= st_dst_reg(result_src
);
1386 /* Limit writes to the channels that will be used by result_src later.
1387 * This does limit this temp's use as a temporary for multi-instruction
1390 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1392 switch (ir
->operation
) {
1393 case ir_unop_logic_not
:
1394 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1395 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1397 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1398 * older GPUs implement SEQ using multiple instructions (i915 uses two
1399 * SGE instructions and a MUL instruction). Since our logic values are
1400 * 0.0 and 1.0, 1-x also implements !x.
1402 op
[0].negate
= ~op
[0].negate
;
1403 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1407 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1408 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1410 op
[0].negate
= ~op
[0].negate
;
1415 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1418 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1421 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1425 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1429 assert(!"not reached: should be handled by ir_explog_to_explog2");
1432 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1435 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1438 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1440 case ir_unop_sin_reduced
:
1441 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1443 case ir_unop_cos_reduced
:
1444 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1448 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1452 /* The X component contains 1 or -1 depending on whether the framebuffer
1453 * is a FBO or the window system buffer, respectively.
1454 * It is then multiplied with the source operand of DDY.
1456 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1457 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1459 unsigned transform_y_index
=
1460 _mesa_add_state_reference(this->prog
->Parameters
,
1463 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1465 glsl_type::vec4_type
);
1466 transform_y
.swizzle
= SWIZZLE_XXXX
;
1468 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1470 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1471 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1475 case ir_unop_noise
: {
1476 /* At some point, a motivated person could add a better
1477 * implementation of noise. Currently not even the nvidia
1478 * binary drivers do anything more than this. In any case, the
1479 * place to do this is in the GL state tracker, not the poor
1482 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1487 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1490 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1494 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1497 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1498 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1500 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1503 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1504 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1506 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1510 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1512 case ir_binop_greater
:
1513 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1515 case ir_binop_lequal
:
1516 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1518 case ir_binop_gequal
:
1519 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1521 case ir_binop_equal
:
1522 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1524 case ir_binop_nequal
:
1525 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1527 case ir_binop_all_equal
:
1528 /* "==" operator producing a scalar boolean. */
1529 if (ir
->operands
[0]->type
->is_vector() ||
1530 ir
->operands
[1]->type
->is_vector()) {
1531 st_src_reg temp
= get_temp(native_integers
?
1532 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1533 glsl_type::vec4_type
);
1535 if (native_integers
) {
1536 st_dst_reg temp_dst
= st_dst_reg(temp
);
1537 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1539 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1541 /* Emit 1-3 AND operations to combine the SEQ results. */
1542 switch (ir
->operands
[0]->type
->vector_elements
) {
1546 temp_dst
.writemask
= WRITEMASK_Y
;
1547 temp1
.swizzle
= SWIZZLE_YYYY
;
1548 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1549 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1552 temp_dst
.writemask
= WRITEMASK_X
;
1553 temp1
.swizzle
= SWIZZLE_XXXX
;
1554 temp2
.swizzle
= SWIZZLE_YYYY
;
1555 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1556 temp_dst
.writemask
= WRITEMASK_Y
;
1557 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1558 temp2
.swizzle
= SWIZZLE_WWWW
;
1559 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1562 temp1
.swizzle
= SWIZZLE_XXXX
;
1563 temp2
.swizzle
= SWIZZLE_YYYY
;
1564 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1566 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1568 /* After the dot-product, the value will be an integer on the
1569 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1571 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1573 /* Negating the result of the dot-product gives values on the range
1574 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1575 * This is achieved using SGE.
1577 st_src_reg sge_src
= result_src
;
1578 sge_src
.negate
= ~sge_src
.negate
;
1579 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1582 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1585 case ir_binop_any_nequal
:
1586 /* "!=" operator producing a scalar boolean. */
1587 if (ir
->operands
[0]->type
->is_vector() ||
1588 ir
->operands
[1]->type
->is_vector()) {
1589 st_src_reg temp
= get_temp(native_integers
?
1590 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1591 glsl_type::vec4_type
);
1592 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1594 if (native_integers
) {
1595 st_dst_reg temp_dst
= st_dst_reg(temp
);
1596 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1598 /* Emit 1-3 OR operations to combine the SNE results. */
1599 switch (ir
->operands
[0]->type
->vector_elements
) {
1603 temp_dst
.writemask
= WRITEMASK_Y
;
1604 temp1
.swizzle
= SWIZZLE_YYYY
;
1605 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1606 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1609 temp_dst
.writemask
= WRITEMASK_X
;
1610 temp1
.swizzle
= SWIZZLE_XXXX
;
1611 temp2
.swizzle
= SWIZZLE_YYYY
;
1612 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1613 temp_dst
.writemask
= WRITEMASK_Y
;
1614 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1615 temp2
.swizzle
= SWIZZLE_WWWW
;
1616 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1619 temp1
.swizzle
= SWIZZLE_XXXX
;
1620 temp2
.swizzle
= SWIZZLE_YYYY
;
1621 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1623 /* After the dot-product, the value will be an integer on the
1624 * range [0,4]. Zero stays zero, and positive values become 1.0.
1626 glsl_to_tgsi_instruction
*const dp
=
1627 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1628 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1629 /* The clamping to [0,1] can be done for free in the fragment
1630 * shader with a saturate.
1632 dp
->saturate
= true;
1634 /* Negating the result of the dot-product gives values on the range
1635 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1636 * achieved using SLT.
1638 st_src_reg slt_src
= result_src
;
1639 slt_src
.negate
= ~slt_src
.negate
;
1640 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1644 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1649 assert(ir
->operands
[0]->type
->is_vector());
1651 /* After the dot-product, the value will be an integer on the
1652 * range [0,4]. Zero stays zero, and positive values become 1.0.
1654 glsl_to_tgsi_instruction
*const dp
=
1655 emit_dp(ir
, result_dst
, op
[0], op
[0],
1656 ir
->operands
[0]->type
->vector_elements
);
1657 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1658 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1659 /* The clamping to [0,1] can be done for free in the fragment
1660 * shader with a saturate.
1662 dp
->saturate
= true;
1663 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1664 /* Negating the result of the dot-product gives values on the range
1665 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1666 * is achieved using SLT.
1668 st_src_reg slt_src
= result_src
;
1669 slt_src
.negate
= ~slt_src
.negate
;
1670 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1673 /* Use SNE 0 if integers are being used as boolean values. */
1674 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1679 case ir_binop_logic_xor
:
1680 if (native_integers
)
1681 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1683 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1686 case ir_binop_logic_or
: {
1687 if (native_integers
) {
1688 /* If integers are used as booleans, we can use an actual "or"
1691 assert(native_integers
);
1692 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1694 /* After the addition, the value will be an integer on the
1695 * range [0,2]. Zero stays zero, and positive values become 1.0.
1697 glsl_to_tgsi_instruction
*add
=
1698 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1699 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate if floats are being used as boolean values.
1703 add
->saturate
= true;
1705 /* Negating the result of the addition gives values on the range
1706 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1709 st_src_reg slt_src
= result_src
;
1710 slt_src
.negate
= ~slt_src
.negate
;
1711 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1717 case ir_binop_logic_and
:
1718 /* If native integers are disabled, the bool args are stored as float 0.0
1719 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1720 * actual AND opcode.
1722 if (native_integers
)
1723 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1725 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1729 assert(ir
->operands
[0]->type
->is_vector());
1730 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1731 emit_dp(ir
, result_dst
, op
[0], op
[1],
1732 ir
->operands
[0]->type
->vector_elements
);
1737 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1740 /* sqrt(x) = x * rsq(x). */
1741 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1742 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1743 /* For incoming channels <= 0, set the result to 0. */
1744 op
[0].negate
= ~op
[0].negate
;
1745 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1746 op
[0], result_src
, st_src_reg_for_float(0.0));
1750 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1753 if (native_integers
) {
1754 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1757 /* fallthrough to next case otherwise */
1759 if (native_integers
) {
1760 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1763 /* fallthrough to next case otherwise */
1766 /* Converting between signed and unsigned integers is a no-op. */
1770 if (native_integers
) {
1771 /* Booleans are stored as integers using ~0 for true and 0 for false.
1772 * GLSL requires that int(bool) return 1 for true and 0 for false.
1773 * This conversion is done with AND, but it could be done with NEG.
1775 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1777 /* Booleans and integers are both stored as floats when native
1778 * integers are disabled.
1784 if (native_integers
)
1785 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1787 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1790 if (native_integers
)
1791 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1793 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1795 case ir_unop_bitcast_f2i
:
1797 result_src
.type
= GLSL_TYPE_INT
;
1799 case ir_unop_bitcast_f2u
:
1801 result_src
.type
= GLSL_TYPE_UINT
;
1803 case ir_unop_bitcast_i2f
:
1804 case ir_unop_bitcast_u2f
:
1806 result_src
.type
= GLSL_TYPE_FLOAT
;
1809 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1812 if (native_integers
)
1813 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1815 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1818 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1821 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1824 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1826 case ir_unop_round_even
:
1827 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1830 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1834 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1837 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1840 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1843 case ir_unop_bit_not
:
1844 if (native_integers
) {
1845 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1849 if (native_integers
) {
1850 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1853 case ir_binop_lshift
:
1854 if (native_integers
) {
1855 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1858 case ir_binop_rshift
:
1859 if (native_integers
) {
1860 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1863 case ir_binop_bit_and
:
1864 if (native_integers
) {
1865 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1868 case ir_binop_bit_xor
:
1869 if (native_integers
) {
1870 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1873 case ir_binop_bit_or
:
1874 if (native_integers
) {
1875 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1879 assert(!"GLSL 1.30 features unsupported");
1882 case ir_binop_ubo_load
: {
1883 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1884 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1885 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1886 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1889 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1890 cbuf
.file
= PROGRAM_CONSTANT
;
1892 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1893 cbuf
.reladdr
= NULL
;
1896 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1898 if (const_offset_ir
) {
1899 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1901 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1904 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1905 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1906 const_offset
% 16 / 4,
1907 const_offset
% 16 / 4,
1908 const_offset
% 16 / 4);
1910 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1911 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1913 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1914 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1916 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1921 /* note: we have to reorder the three args here */
1922 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1925 if (this->ctx
->Const
.NativeIntegers
)
1926 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
1928 op
[0].negate
= ~op
[0].negate
;
1929 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1932 case ir_unop_pack_snorm_2x16
:
1933 case ir_unop_pack_unorm_2x16
:
1934 case ir_unop_pack_half_2x16
:
1935 case ir_unop_pack_snorm_4x8
:
1936 case ir_unop_pack_unorm_4x8
:
1937 case ir_unop_unpack_snorm_2x16
:
1938 case ir_unop_unpack_unorm_2x16
:
1939 case ir_unop_unpack_half_2x16
:
1940 case ir_unop_unpack_half_2x16_split_x
:
1941 case ir_unop_unpack_half_2x16_split_y
:
1942 case ir_unop_unpack_snorm_4x8
:
1943 case ir_unop_unpack_unorm_4x8
:
1944 case ir_binop_pack_half_2x16_split
:
1945 case ir_unop_bitfield_reverse
:
1946 case ir_unop_bit_count
:
1947 case ir_unop_find_msb
:
1948 case ir_unop_find_lsb
:
1952 case ir_triop_bitfield_extract
:
1953 case ir_quadop_bitfield_insert
:
1954 case ir_quadop_vector
:
1955 case ir_binop_vector_extract
:
1956 case ir_triop_vector_insert
:
1957 case ir_binop_ldexp
:
1958 case ir_binop_carry
:
1959 case ir_binop_borrow
:
1960 case ir_binop_imul_high
:
1961 /* This operation is not supported, or should have already been handled.
1963 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1967 this->result
= result_src
;
1972 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1978 /* Note that this is only swizzles in expressions, not those on the left
1979 * hand side of an assignment, which do write masking. See ir_assignment
1983 ir
->val
->accept(this);
1985 assert(src
.file
!= PROGRAM_UNDEFINED
);
1987 for (i
= 0; i
< 4; i
++) {
1988 if (i
< ir
->type
->vector_elements
) {
1991 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1994 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1997 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2000 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2004 /* If the type is smaller than a vec4, replicate the last
2007 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2011 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2017 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2019 variable_storage
*entry
= find_variable_storage(ir
->var
);
2020 ir_variable
*var
= ir
->var
;
2023 switch (var
->data
.mode
) {
2024 case ir_var_uniform
:
2025 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2026 var
->data
.location
);
2027 this->variables
.push_tail(entry
);
2029 case ir_var_shader_in
:
2030 /* The linker assigns locations for varyings and attributes,
2031 * including deprecated builtins (like gl_Color), user-assign
2032 * generic attributes (glBindVertexLocation), and
2033 * user-defined varyings.
2035 assert(var
->data
.location
!= -1);
2036 entry
= new(mem_ctx
) variable_storage(var
,
2038 var
->data
.location
);
2040 case ir_var_shader_out
:
2041 assert(var
->data
.location
!= -1);
2042 entry
= new(mem_ctx
) variable_storage(var
,
2047 case ir_var_system_value
:
2048 entry
= new(mem_ctx
) variable_storage(var
,
2049 PROGRAM_SYSTEM_VALUE
,
2050 var
->data
.location
);
2053 case ir_var_temporary
:
2054 st_src_reg src
= get_temp(var
->type
);
2056 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2057 this->variables
.push_tail(entry
);
2063 printf("Failed to make storage for %s\n", var
->name
);
2068 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2069 if (!native_integers
)
2070 this->result
.type
= GLSL_TYPE_FLOAT
;
2074 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2078 int element_size
= type_size(ir
->type
);
2081 index
= ir
->array_index
->constant_expression_value();
2083 ir
->array
->accept(this);
2086 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2087 src
.file
== PROGRAM_INPUT
&&
2088 ir
->array
->ir_type
!= ir_type_dereference_array
;
2095 src
.index2D
= index
->value
.i
[0];
2096 src
.has_index2
= true;
2098 src
.index
+= index
->value
.i
[0] * element_size
;
2100 /* Variable index array dereference. It eats the "vec4" of the
2101 * base of the array and an index that offsets the TGSI register
2104 ir
->array_index
->accept(this);
2106 st_src_reg index_reg
;
2108 if (element_size
== 1) {
2109 index_reg
= this->result
;
2111 index_reg
= get_temp(native_integers
?
2112 glsl_type::int_type
: glsl_type::float_type
);
2114 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2115 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2118 /* If there was already a relative address register involved, add the
2119 * new and the old together to get the new offset.
2121 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2122 st_src_reg accum_reg
= get_temp(native_integers
?
2123 glsl_type::int_type
: glsl_type::float_type
);
2125 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2126 index_reg
, *src
.reladdr
);
2128 index_reg
= accum_reg
;
2132 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2133 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2135 src
.has_index2
= true;
2137 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2138 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2142 /* If the type is smaller than a vec4, replicate the last channel out. */
2143 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2144 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2146 src
.swizzle
= SWIZZLE_NOOP
;
2148 /* Change the register type to the element type of the array. */
2149 src
.type
= ir
->type
->base_type
;
2155 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2158 const glsl_type
*struct_type
= ir
->record
->type
;
2161 ir
->record
->accept(this);
2163 for (i
= 0; i
< struct_type
->length
; i
++) {
2164 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2166 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2169 /* If the type is smaller than a vec4, replicate the last channel out. */
2170 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2171 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2173 this->result
.swizzle
= SWIZZLE_NOOP
;
2175 this->result
.index
+= offset
;
2176 this->result
.type
= ir
->type
->base_type
;
2180 * We want to be careful in assignment setup to hit the actual storage
2181 * instead of potentially using a temporary like we might with the
2182 * ir_dereference handler.
2185 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2187 /* The LHS must be a dereference. If the LHS is a variable indexed array
2188 * access of a vector, it must be separated into a series conditional moves
2189 * before reaching this point (see ir_vec_index_to_cond_assign).
2191 assert(ir
->as_dereference());
2192 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2194 assert(!deref_array
->array
->type
->is_vector());
2197 /* Use the rvalue deref handler for the most part. We'll ignore
2198 * swizzles in it and write swizzles using writemask, though.
2201 return st_dst_reg(v
->result
);
2205 * Process the condition of a conditional assignment
2207 * Examines the condition of a conditional assignment to generate the optimal
2208 * first operand of a \c CMP instruction. If the condition is a relational
2209 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2210 * used as the source for the \c CMP instruction. Otherwise the comparison
2211 * is processed to a boolean result, and the boolean result is used as the
2212 * operand to the CMP instruction.
2215 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2217 ir_rvalue
*src_ir
= ir
;
2219 bool switch_order
= false;
2221 ir_expression
*const expr
= ir
->as_expression();
2222 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2223 bool zero_on_left
= false;
2225 if (expr
->operands
[0]->is_zero()) {
2226 src_ir
= expr
->operands
[1];
2227 zero_on_left
= true;
2228 } else if (expr
->operands
[1]->is_zero()) {
2229 src_ir
= expr
->operands
[0];
2230 zero_on_left
= false;
2234 * (a < 0) T F F ( a < 0) T F F
2235 * (0 < a) F F T (-a < 0) F F T
2236 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2237 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2238 * (a > 0) F F T (-a < 0) F F T
2239 * (0 > a) T F F ( a < 0) T F F
2240 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2241 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2243 * Note that exchanging the order of 0 and 'a' in the comparison simply
2244 * means that the value of 'a' should be negated.
2247 switch (expr
->operation
) {
2249 switch_order
= false;
2250 negate
= zero_on_left
;
2253 case ir_binop_greater
:
2254 switch_order
= false;
2255 negate
= !zero_on_left
;
2258 case ir_binop_lequal
:
2259 switch_order
= true;
2260 negate
= !zero_on_left
;
2263 case ir_binop_gequal
:
2264 switch_order
= true;
2265 negate
= zero_on_left
;
2269 /* This isn't the right kind of comparison afterall, so make sure
2270 * the whole condition is visited.
2278 src_ir
->accept(this);
2280 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2281 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2282 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2283 * computing the condition.
2286 this->result
.negate
= ~this->result
.negate
;
2288 return switch_order
;
2292 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2293 st_dst_reg
*l
, st_src_reg
*r
)
2295 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2296 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2297 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2302 if (type
->is_array()) {
2303 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2304 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2309 if (type
->is_matrix()) {
2310 const struct glsl_type
*vec_type
;
2312 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2313 type
->vector_elements
, 1);
2315 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2316 emit_block_mov(ir
, vec_type
, l
, r
);
2321 assert(type
->is_scalar() || type
->is_vector());
2323 r
->type
= type
->base_type
;
2324 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2330 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2336 ir
->rhs
->accept(this);
2339 l
= get_assignment_lhs(ir
->lhs
, this);
2341 /* FINISHME: This should really set to the correct maximal writemask for each
2342 * FINISHME: component written (in the loops below). This case can only
2343 * FINISHME: occur for matrices, arrays, and structures.
2345 if (ir
->write_mask
== 0) {
2346 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2347 l
.writemask
= WRITEMASK_XYZW
;
2348 } else if (ir
->lhs
->type
->is_scalar() &&
2349 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2350 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2351 * FINISHME: W component of fragment shader output zero, work correctly.
2353 l
.writemask
= WRITEMASK_XYZW
;
2356 int first_enabled_chan
= 0;
2359 l
.writemask
= ir
->write_mask
;
2361 for (int i
= 0; i
< 4; i
++) {
2362 if (l
.writemask
& (1 << i
)) {
2363 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2368 /* Swizzle a small RHS vector into the channels being written.
2370 * glsl ir treats write_mask as dictating how many channels are
2371 * present on the RHS while TGSI treats write_mask as just
2372 * showing which channels of the vec4 RHS get written.
2374 for (int i
= 0; i
< 4; i
++) {
2375 if (l
.writemask
& (1 << i
))
2376 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2378 swizzles
[i
] = first_enabled_chan
;
2380 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2381 swizzles
[2], swizzles
[3]);
2384 assert(l
.file
!= PROGRAM_UNDEFINED
);
2385 assert(r
.file
!= PROGRAM_UNDEFINED
);
2387 if (ir
->condition
) {
2388 const bool switch_order
= this->process_move_condition(ir
->condition
);
2389 st_src_reg condition
= this->result
;
2391 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2392 st_src_reg l_src
= st_src_reg(l
);
2393 st_src_reg condition_temp
= condition
;
2394 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2396 if (native_integers
) {
2397 /* This is necessary because TGSI's CMP instruction expects the
2398 * condition to be a float, and we store booleans as integers.
2399 * TODO: really want to avoid i2f path and use UCMP. Requires
2400 * changes to process_move_condition though too.
2402 condition_temp
= get_temp(glsl_type::vec4_type
);
2403 condition
.negate
= 0;
2404 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2405 condition_temp
.swizzle
= condition
.swizzle
;
2409 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2411 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2417 } else if (ir
->rhs
->as_expression() &&
2418 this->instructions
.get_tail() &&
2419 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2420 type_size(ir
->lhs
->type
) == 1 &&
2421 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2422 /* To avoid emitting an extra MOV when assigning an expression to a
2423 * variable, emit the last instruction of the expression again, but
2424 * replace the destination register with the target of the assignment.
2425 * Dead code elimination will remove the original instruction.
2427 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2428 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2429 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2430 new_inst
->saturate
= inst
->saturate
;
2431 inst
->dead_mask
= inst
->dst
.writemask
;
2433 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2439 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2442 GLfloat stack_vals
[4] = { 0 };
2443 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2444 GLenum gl_type
= GL_NONE
;
2446 static int in_array
= 0;
2447 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2449 /* Unfortunately, 4 floats is all we can get into
2450 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2451 * aggregate constant and move each constant value into it. If we
2452 * get lucky, copy propagation will eliminate the extra moves.
2454 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2455 st_src_reg temp_base
= get_temp(ir
->type
);
2456 st_dst_reg temp
= st_dst_reg(temp_base
);
2458 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2459 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2460 int size
= type_size(field_value
->type
);
2464 field_value
->accept(this);
2467 for (i
= 0; i
< (unsigned int)size
; i
++) {
2468 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2474 this->result
= temp_base
;
2478 if (ir
->type
->is_array()) {
2479 st_src_reg temp_base
= get_temp(ir
->type
);
2480 st_dst_reg temp
= st_dst_reg(temp_base
);
2481 int size
= type_size(ir
->type
->fields
.array
);
2486 for (i
= 0; i
< ir
->type
->length
; i
++) {
2487 ir
->array_elements
[i
]->accept(this);
2489 for (int j
= 0; j
< size
; j
++) {
2490 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2496 this->result
= temp_base
;
2501 if (ir
->type
->is_matrix()) {
2502 st_src_reg mat
= get_temp(ir
->type
);
2503 st_dst_reg mat_column
= st_dst_reg(mat
);
2505 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2506 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2507 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2509 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2510 src
.index
= add_constant(file
,
2512 ir
->type
->vector_elements
,
2515 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2524 switch (ir
->type
->base_type
) {
2525 case GLSL_TYPE_FLOAT
:
2527 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2528 values
[i
].f
= ir
->value
.f
[i
];
2531 case GLSL_TYPE_UINT
:
2532 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2533 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2534 if (native_integers
)
2535 values
[i
].u
= ir
->value
.u
[i
];
2537 values
[i
].f
= ir
->value
.u
[i
];
2541 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2542 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2543 if (native_integers
)
2544 values
[i
].i
= ir
->value
.i
[i
];
2546 values
[i
].f
= ir
->value
.i
[i
];
2549 case GLSL_TYPE_BOOL
:
2550 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2551 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2552 if (native_integers
)
2553 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2555 values
[i
].f
= ir
->value
.b
[i
];
2559 assert(!"Non-float/uint/int/bool constant");
2562 this->result
= st_src_reg(file
, -1, ir
->type
);
2563 this->result
.index
= add_constant(file
,
2565 ir
->type
->vector_elements
,
2567 &this->result
.swizzle
);
2571 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2573 function_entry
*entry
;
2575 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2576 entry
= (function_entry
*)iter
.get();
2578 if (entry
->sig
== sig
)
2582 entry
= ralloc(mem_ctx
, function_entry
);
2584 entry
->sig_id
= this->next_signature_id
++;
2585 entry
->bgn_inst
= NULL
;
2587 /* Allocate storage for all the parameters. */
2588 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2589 ir_variable
*param
= (ir_variable
*)iter
.get();
2590 variable_storage
*storage
;
2592 storage
= find_variable_storage(param
);
2595 st_src_reg src
= get_temp(param
->type
);
2597 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2598 this->variables
.push_tail(storage
);
2601 if (!sig
->return_type
->is_void()) {
2602 entry
->return_reg
= get_temp(sig
->return_type
);
2604 entry
->return_reg
= undef_src
;
2607 this->function_signatures
.push_tail(entry
);
2612 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2614 glsl_to_tgsi_instruction
*call_inst
;
2615 ir_function_signature
*sig
= ir
->callee
;
2616 function_entry
*entry
= get_function_signature(sig
);
2619 /* Process in parameters. */
2620 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2621 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2622 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2623 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2625 if (param
->data
.mode
== ir_var_function_in
||
2626 param
->data
.mode
== ir_var_function_inout
) {
2627 variable_storage
*storage
= find_variable_storage(param
);
2630 param_rval
->accept(this);
2631 st_src_reg r
= this->result
;
2634 l
.file
= storage
->file
;
2635 l
.index
= storage
->index
;
2637 l
.writemask
= WRITEMASK_XYZW
;
2638 l
.cond_mask
= COND_TR
;
2640 for (i
= 0; i
< type_size(param
->type
); i
++) {
2641 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2649 assert(!sig_iter
.has_next());
2651 /* Emit call instruction */
2652 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2653 call_inst
->function
= entry
;
2655 /* Process out parameters. */
2656 sig_iter
= sig
->parameters
.iterator();
2657 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2658 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2659 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2661 if (param
->data
.mode
== ir_var_function_out
||
2662 param
->data
.mode
== ir_var_function_inout
) {
2663 variable_storage
*storage
= find_variable_storage(param
);
2667 r
.file
= storage
->file
;
2668 r
.index
= storage
->index
;
2670 r
.swizzle
= SWIZZLE_NOOP
;
2673 param_rval
->accept(this);
2674 st_dst_reg l
= st_dst_reg(this->result
);
2676 for (i
= 0; i
< type_size(param
->type
); i
++) {
2677 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2685 assert(!sig_iter
.has_next());
2687 /* Process return value. */
2688 this->result
= entry
->return_reg
;
2692 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2694 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2695 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2696 glsl_to_tgsi_instruction
*inst
= NULL
;
2697 unsigned opcode
= TGSI_OPCODE_NOP
;
2698 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2699 bool is_cube_array
= false;
2701 /* if we are a cube array sampler */
2702 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2703 sampler_type
->sampler_array
)) {
2704 is_cube_array
= true;
2707 if (ir
->coordinate
) {
2708 ir
->coordinate
->accept(this);
2710 /* Put our coords in a temp. We'll need to modify them for shadow,
2711 * projection, or LOD, so the only case we'd use it as is is if
2712 * we're doing plain old texturing. The optimization passes on
2713 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2715 coord
= get_temp(glsl_type::vec4_type
);
2716 coord_dst
= st_dst_reg(coord
);
2717 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2718 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2721 if (ir
->projector
) {
2722 ir
->projector
->accept(this);
2723 projector
= this->result
;
2726 /* Storage for our result. Ideally for an assignment we'd be using
2727 * the actual storage for the result here, instead.
2729 result_src
= get_temp(ir
->type
);
2730 result_dst
= st_dst_reg(result_src
);
2734 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2736 ir
->offset
->accept(this);
2737 offset
= this->result
;
2741 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2742 ir
->lod_info
.bias
->accept(this);
2743 lod_info
= this->result
;
2745 ir
->offset
->accept(this);
2746 offset
= this->result
;
2750 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2751 ir
->lod_info
.lod
->accept(this);
2752 lod_info
= this->result
;
2754 ir
->offset
->accept(this);
2755 offset
= this->result
;
2759 opcode
= TGSI_OPCODE_TXD
;
2760 ir
->lod_info
.grad
.dPdx
->accept(this);
2762 ir
->lod_info
.grad
.dPdy
->accept(this);
2765 ir
->offset
->accept(this);
2766 offset
= this->result
;
2770 opcode
= TGSI_OPCODE_TXQ
;
2771 ir
->lod_info
.lod
->accept(this);
2772 lod_info
= this->result
;
2775 opcode
= TGSI_OPCODE_TXF
;
2776 ir
->lod_info
.lod
->accept(this);
2777 lod_info
= this->result
;
2779 ir
->offset
->accept(this);
2780 offset
= this->result
;
2784 opcode
= TGSI_OPCODE_TXF
;
2785 ir
->lod_info
.sample_index
->accept(this);
2786 sample_index
= this->result
;
2789 assert(!"Unexpected ir_lod opcode");
2792 assert(!"Unexpected ir_tg4 opcode");
2794 case ir_query_levels
:
2795 assert(!"Unexpected ir_query_levels opcode");
2799 if (ir
->projector
) {
2800 if (opcode
== TGSI_OPCODE_TEX
) {
2801 /* Slot the projector in as the last component of the coord. */
2802 coord_dst
.writemask
= WRITEMASK_W
;
2803 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2804 coord_dst
.writemask
= WRITEMASK_XYZW
;
2805 opcode
= TGSI_OPCODE_TXP
;
2807 st_src_reg coord_w
= coord
;
2808 coord_w
.swizzle
= SWIZZLE_WWWW
;
2810 /* For the other TEX opcodes there's no projective version
2811 * since the last slot is taken up by LOD info. Do the
2812 * projective divide now.
2814 coord_dst
.writemask
= WRITEMASK_W
;
2815 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2817 /* In the case where we have to project the coordinates "by hand,"
2818 * the shadow comparator value must also be projected.
2820 st_src_reg tmp_src
= coord
;
2821 if (ir
->shadow_comparitor
) {
2822 /* Slot the shadow value in as the second to last component of the
2825 ir
->shadow_comparitor
->accept(this);
2827 tmp_src
= get_temp(glsl_type::vec4_type
);
2828 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2830 /* Projective division not allowed for array samplers. */
2831 assert(!sampler_type
->sampler_array
);
2833 tmp_dst
.writemask
= WRITEMASK_Z
;
2834 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2836 tmp_dst
.writemask
= WRITEMASK_XY
;
2837 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2840 coord_dst
.writemask
= WRITEMASK_XYZ
;
2841 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2843 coord_dst
.writemask
= WRITEMASK_XYZW
;
2844 coord
.swizzle
= SWIZZLE_XYZW
;
2848 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2849 * comparator was put in the correct place (and projected) by the code,
2850 * above, that handles by-hand projection.
2852 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2853 /* Slot the shadow value in as the second to last component of the
2856 ir
->shadow_comparitor
->accept(this);
2858 if (is_cube_array
) {
2859 cube_sc
= get_temp(glsl_type::float_type
);
2860 cube_sc_dst
= st_dst_reg(cube_sc
);
2861 cube_sc_dst
.writemask
= WRITEMASK_X
;
2862 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2863 cube_sc_dst
.writemask
= WRITEMASK_X
;
2866 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2867 sampler_type
->sampler_array
) ||
2868 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2869 coord_dst
.writemask
= WRITEMASK_W
;
2871 coord_dst
.writemask
= WRITEMASK_Z
;
2874 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2875 coord_dst
.writemask
= WRITEMASK_XYZW
;
2879 if (ir
->op
== ir_txf_ms
) {
2880 coord_dst
.writemask
= WRITEMASK_W
;
2881 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2882 coord_dst
.writemask
= WRITEMASK_XYZW
;
2883 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2884 opcode
== TGSI_OPCODE_TXF
) {
2885 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2886 coord_dst
.writemask
= WRITEMASK_W
;
2887 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2888 coord_dst
.writemask
= WRITEMASK_XYZW
;
2891 if (opcode
== TGSI_OPCODE_TXD
)
2892 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2893 else if (opcode
== TGSI_OPCODE_TXQ
)
2894 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2895 else if (opcode
== TGSI_OPCODE_TXF
) {
2896 inst
= emit(ir
, opcode
, result_dst
, coord
);
2897 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2898 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2899 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2900 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2902 inst
= emit(ir
, opcode
, result_dst
, coord
);
2904 if (ir
->shadow_comparitor
)
2905 inst
->tex_shadow
= GL_TRUE
;
2907 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2908 this->shader_program
,
2912 inst
->tex_offset_num_offset
= 1;
2913 inst
->tex_offsets
[0].Index
= offset
.index
;
2914 inst
->tex_offsets
[0].File
= offset
.file
;
2915 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2916 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2917 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2920 switch (sampler_type
->sampler_dimensionality
) {
2921 case GLSL_SAMPLER_DIM_1D
:
2922 inst
->tex_target
= (sampler_type
->sampler_array
)
2923 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2925 case GLSL_SAMPLER_DIM_2D
:
2926 inst
->tex_target
= (sampler_type
->sampler_array
)
2927 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2929 case GLSL_SAMPLER_DIM_3D
:
2930 inst
->tex_target
= TEXTURE_3D_INDEX
;
2932 case GLSL_SAMPLER_DIM_CUBE
:
2933 inst
->tex_target
= (sampler_type
->sampler_array
)
2934 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2936 case GLSL_SAMPLER_DIM_RECT
:
2937 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2939 case GLSL_SAMPLER_DIM_BUF
:
2940 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2942 case GLSL_SAMPLER_DIM_EXTERNAL
:
2943 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2945 case GLSL_SAMPLER_DIM_MS
:
2946 inst
->tex_target
= (sampler_type
->sampler_array
)
2947 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2950 assert(!"Should not get here.");
2953 this->result
= result_src
;
2957 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2959 if (ir
->get_value()) {
2963 assert(current_function
);
2965 ir
->get_value()->accept(this);
2966 st_src_reg r
= this->result
;
2968 l
= st_dst_reg(current_function
->return_reg
);
2970 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2971 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2977 emit(ir
, TGSI_OPCODE_RET
);
2981 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2983 if (ir
->condition
) {
2984 ir
->condition
->accept(this);
2985 this->result
.negate
= ~this->result
.negate
;
2986 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
2988 /* unconditional kil */
2989 emit(ir
, TGSI_OPCODE_KILL
);
2994 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2997 glsl_to_tgsi_instruction
*if_inst
;
2999 ir
->condition
->accept(this);
3000 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3002 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3004 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3006 this->instructions
.push_tail(if_inst
);
3008 visit_exec_list(&ir
->then_instructions
, this);
3010 if (!ir
->else_instructions
.is_empty()) {
3011 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3012 visit_exec_list(&ir
->else_instructions
, this);
3015 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3020 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3022 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3023 emit(ir
, TGSI_OPCODE_EMIT
);
3027 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3029 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3030 emit(ir
, TGSI_OPCODE_ENDPRIM
);
3033 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3035 result
.file
= PROGRAM_UNDEFINED
;
3038 next_signature_id
= 1;
3040 current_function
= NULL
;
3041 num_address_regs
= 0;
3043 indirect_addr_consts
= false;
3045 native_integers
= false;
3046 mem_ctx
= ralloc_context(NULL
);
3049 shader_program
= NULL
;
3053 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3055 ralloc_free(mem_ctx
);
3058 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3065 * Count resources used by the given gpu program (number of texture
3069 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3071 v
->samplers_used
= 0;
3073 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3074 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3076 if (is_tex_instruction(inst
->op
)) {
3077 v
->samplers_used
|= 1 << inst
->sampler
;
3079 if (inst
->tex_shadow
) {
3080 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3085 prog
->SamplersUsed
= v
->samplers_used
;
3087 if (v
->shader_program
!= NULL
)
3088 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3092 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3093 struct gl_shader_program
*shader_program
,
3094 const char *name
, const glsl_type
*type
,
3097 if (type
->is_record()) {
3098 ir_constant
*field_constant
;
3100 field_constant
= (ir_constant
*)val
->components
.get_head();
3102 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3103 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3104 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3105 type
->fields
.structure
[i
].name
);
3106 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3107 field_type
, field_constant
);
3108 field_constant
= (ir_constant
*)field_constant
->next
;
3114 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3116 if (offset
== GL_INVALID_INDEX
) {
3117 fail_link(shader_program
,
3118 "Couldn't find uniform for initializer %s\n", name
);
3121 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3123 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3124 ir_constant
*element
;
3125 const glsl_type
*element_type
;
3126 if (type
->is_array()) {
3127 element
= val
->array_elements
[i
];
3128 element_type
= type
->fields
.array
;
3131 element_type
= type
;
3136 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3137 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3138 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3139 conv
[j
] = element
->value
.b
[j
];
3141 values
= (void *)conv
;
3142 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3143 element_type
->vector_elements
,
3146 values
= &element
->value
;
3149 if (element_type
->is_matrix()) {
3150 _mesa_uniform_matrix(ctx
, shader_program
,
3151 element_type
->matrix_columns
,
3152 element_type
->vector_elements
,
3153 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3155 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3156 values
, element_type
->gl_type
);
3164 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3165 * are read from the given src in this instruction
3168 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3170 int read_mask
= 0, comp
;
3172 /* Now, given the src swizzle and the written channels, find which
3173 * components are actually read
3175 for (comp
= 0; comp
< 4; ++comp
) {
3176 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3178 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3179 read_mask
|= 1 << coord
;
3186 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3187 * instruction is the first instruction to write to register T0. There are
3188 * several lowering passes done in GLSL IR (e.g. branches and
3189 * relative addressing) that create a large number of conditional assignments
3190 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3192 * Here is why this conversion is safe:
3193 * CMP T0, T1 T2 T0 can be expanded to:
3199 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3200 * as the original program. If (T1 < 0.0) evaluates to false, executing
3201 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3202 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3203 * because any instruction that was going to read from T0 after this was going
3204 * to read a garbage value anyway.
3207 glsl_to_tgsi_visitor::simplify_cmp(void)
3209 unsigned *tempWrites
;
3210 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3212 tempWrites
= new unsigned[MAX_TEMPS
];
3216 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3217 memset(outputWrites
, 0, sizeof(outputWrites
));
3219 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3220 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3221 unsigned prevWriteMask
= 0;
3223 /* Give up if we encounter relative addressing or flow control. */
3224 if (inst
->dst
.reladdr
||
3225 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3226 inst
->op
== TGSI_OPCODE_BGNSUB
||
3227 inst
->op
== TGSI_OPCODE_CONT
||
3228 inst
->op
== TGSI_OPCODE_END
||
3229 inst
->op
== TGSI_OPCODE_ENDSUB
||
3230 inst
->op
== TGSI_OPCODE_RET
) {
3234 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3235 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3236 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3237 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3238 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3239 assert(inst
->dst
.index
< MAX_TEMPS
);
3240 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3241 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3245 /* For a CMP to be considered a conditional write, the destination
3246 * register and source register two must be the same. */
3247 if (inst
->op
== TGSI_OPCODE_CMP
3248 && !(inst
->dst
.writemask
& prevWriteMask
)
3249 && inst
->src
[2].file
== inst
->dst
.file
3250 && inst
->src
[2].index
== inst
->dst
.index
3251 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3253 inst
->op
= TGSI_OPCODE_MOV
;
3254 inst
->src
[0] = inst
->src
[1];
3258 delete [] tempWrites
;
3261 /* Replaces all references to a temporary register index with another index. */
3263 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3265 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3266 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3269 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3270 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3271 inst
->src
[j
].index
== index
) {
3272 inst
->src
[j
].index
= new_index
;
3276 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3277 inst
->dst
.index
= new_index
;
3283 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3285 int depth
= 0; /* loop depth */
3286 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3289 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3290 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3292 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3293 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3294 inst
->src
[j
].index
== index
) {
3295 return (depth
== 0) ? i
: loop_start
;
3299 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3302 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3315 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3317 int depth
= 0; /* loop depth */
3318 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3321 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3322 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3324 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3325 return (depth
== 0) ? i
: loop_start
;
3328 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3331 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3344 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3346 int depth
= 0; /* loop depth */
3347 int last
= -1; /* index of last instruction that reads the temporary */
3350 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3351 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3353 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3354 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3355 inst
->src
[j
].index
== index
) {
3356 last
= (depth
== 0) ? i
: -2;
3360 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3362 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3363 if (--depth
== 0 && last
== -2)
3375 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3377 int depth
= 0; /* loop depth */
3378 int last
= -1; /* index of last instruction that writes to the temporary */
3381 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3382 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3384 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3385 last
= (depth
== 0) ? i
: -2;
3387 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3389 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3390 if (--depth
== 0 && last
== -2)
3402 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3403 * channels for copy propagation and updates following instructions to
3404 * use the original versions.
3406 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3407 * will occur. As an example, a TXP production before this pass:
3409 * 0: MOV TEMP[1], INPUT[4].xyyy;
3410 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3411 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3415 * 0: MOV TEMP[1], INPUT[4].xyyy;
3416 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3417 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3419 * which allows for dead code elimination on TEMP[1]'s writes.
3422 glsl_to_tgsi_visitor::copy_propagate(void)
3424 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3425 glsl_to_tgsi_instruction
*,
3426 this->next_temp
* 4);
3427 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3430 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3431 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3433 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3434 || inst
->dst
.index
< this->next_temp
);
3436 /* First, do any copy propagation possible into the src regs. */
3437 for (int r
= 0; r
< 3; r
++) {
3438 glsl_to_tgsi_instruction
*first
= NULL
;
3440 int acp_base
= inst
->src
[r
].index
* 4;
3442 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3443 inst
->src
[r
].reladdr
||
3444 inst
->src
[r
].reladdr2
)
3447 /* See if we can find entries in the ACP consisting of MOVs
3448 * from the same src register for all the swizzled channels
3449 * of this src register reference.
3451 for (int i
= 0; i
< 4; i
++) {
3452 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3453 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3460 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3465 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3466 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3474 /* We've now validated that we can copy-propagate to
3475 * replace this src register reference. Do it.
3477 inst
->src
[r
].file
= first
->src
[0].file
;
3478 inst
->src
[r
].index
= first
->src
[0].index
;
3479 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3480 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3483 for (int i
= 0; i
< 4; i
++) {
3484 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3485 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3486 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3489 inst
->src
[r
].swizzle
= swizzle
;
3494 case TGSI_OPCODE_BGNLOOP
:
3495 case TGSI_OPCODE_ENDLOOP
:
3496 /* End of a basic block, clear the ACP entirely. */
3497 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3500 case TGSI_OPCODE_IF
:
3501 case TGSI_OPCODE_UIF
:
3505 case TGSI_OPCODE_ENDIF
:
3506 case TGSI_OPCODE_ELSE
:
3507 /* Clear all channels written inside the block from the ACP, but
3508 * leaving those that were not touched.
3510 for (int r
= 0; r
< this->next_temp
; r
++) {
3511 for (int c
= 0; c
< 4; c
++) {
3512 if (!acp
[4 * r
+ c
])
3515 if (acp_level
[4 * r
+ c
] >= level
)
3516 acp
[4 * r
+ c
] = NULL
;
3519 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3524 /* Continuing the block, clear any written channels from
3527 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3528 /* Any temporary might be written, so no copy propagation
3529 * across this instruction.
3531 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3532 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3533 inst
->dst
.reladdr
) {
3534 /* Any output might be written, so no copy propagation
3535 * from outputs across this instruction.
3537 for (int r
= 0; r
< this->next_temp
; r
++) {
3538 for (int c
= 0; c
< 4; c
++) {
3539 if (!acp
[4 * r
+ c
])
3542 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3543 acp
[4 * r
+ c
] = NULL
;
3546 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3547 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3548 /* Clear where it's used as dst. */
3549 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3550 for (int c
= 0; c
< 4; c
++) {
3551 if (inst
->dst
.writemask
& (1 << c
)) {
3552 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3557 /* Clear where it's used as src. */
3558 for (int r
= 0; r
< this->next_temp
; r
++) {
3559 for (int c
= 0; c
< 4; c
++) {
3560 if (!acp
[4 * r
+ c
])
3563 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3565 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3566 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3567 inst
->dst
.writemask
& (1 << src_chan
))
3569 acp
[4 * r
+ c
] = NULL
;
3577 /* If this is a copy, add it to the ACP. */
3578 if (inst
->op
== TGSI_OPCODE_MOV
&&
3579 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3580 !(inst
->dst
.file
== inst
->src
[0].file
&&
3581 inst
->dst
.index
== inst
->src
[0].index
) &&
3582 !inst
->dst
.reladdr
&&
3584 !inst
->src
[0].reladdr
&&
3585 !inst
->src
[0].reladdr2
&&
3586 !inst
->src
[0].negate
) {
3587 for (int i
= 0; i
< 4; i
++) {
3588 if (inst
->dst
.writemask
& (1 << i
)) {
3589 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3590 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3596 ralloc_free(acp_level
);
3601 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3603 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3604 * will occur. As an example, a TXP production after copy propagation but
3607 * 0: MOV TEMP[1], INPUT[4].xyyy;
3608 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3609 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3611 * and after this pass:
3613 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3615 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3616 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3619 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3623 for (i
=0; i
< this->next_temp
; i
++) {
3624 int last_read
= get_last_temp_read(i
);
3627 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3628 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3630 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3643 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3644 * code elimination. This is less primitive than eliminate_dead_code(), as it
3645 * is per-channel and can detect consecutive writes without a read between them
3646 * as dead code. However, there is some dead code that can be eliminated by
3647 * eliminate_dead_code() but not this function - for example, this function
3648 * cannot eliminate an instruction writing to a register that is never read and
3649 * is the only instruction writing to that register.
3651 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3655 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3657 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3658 glsl_to_tgsi_instruction
*,
3659 this->next_temp
* 4);
3660 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3664 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3665 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3667 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3668 || inst
->dst
.index
< this->next_temp
);
3671 case TGSI_OPCODE_BGNLOOP
:
3672 case TGSI_OPCODE_ENDLOOP
:
3673 case TGSI_OPCODE_CONT
:
3674 case TGSI_OPCODE_BRK
:
3675 /* End of a basic block, clear the write array entirely.
3677 * This keeps us from killing dead code when the writes are
3678 * on either side of a loop, even when the register isn't touched
3679 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3680 * dead code of this type, so it shouldn't make a difference as long as
3681 * the dead code elimination pass in the GLSL compiler does its job.
3683 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3686 case TGSI_OPCODE_ENDIF
:
3687 case TGSI_OPCODE_ELSE
:
3688 /* Promote the recorded level of all channels written inside the
3689 * preceding if or else block to the level above the if/else block.
3691 for (int r
= 0; r
< this->next_temp
; r
++) {
3692 for (int c
= 0; c
< 4; c
++) {
3693 if (!writes
[4 * r
+ c
])
3696 if (write_level
[4 * r
+ c
] == level
)
3697 write_level
[4 * r
+ c
] = level
-1;
3701 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3706 case TGSI_OPCODE_IF
:
3707 case TGSI_OPCODE_UIF
:
3709 /* fallthrough to default case to mark the condition as read */
3712 /* Continuing the block, clear any channels from the write array that
3713 * are read by this instruction.
3715 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3716 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3717 /* Any temporary might be read, so no dead code elimination
3718 * across this instruction.
3720 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3721 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3722 /* Clear where it's used as src. */
3723 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3724 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3725 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3726 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3728 for (int c
= 0; c
< 4; c
++) {
3729 if (src_chans
& (1 << c
)) {
3730 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3738 /* If this instruction writes to a temporary, add it to the write array.
3739 * If there is already an instruction in the write array for one or more
3740 * of the channels, flag that channel write as dead.
3742 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3743 !inst
->dst
.reladdr
&&
3745 for (int c
= 0; c
< 4; c
++) {
3746 if (inst
->dst
.writemask
& (1 << c
)) {
3747 if (writes
[4 * inst
->dst
.index
+ c
]) {
3748 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3751 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3753 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3754 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3760 /* Anything still in the write array at this point is dead code. */
3761 for (int r
= 0; r
< this->next_temp
; r
++) {
3762 for (int c
= 0; c
< 4; c
++) {
3763 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3765 inst
->dead_mask
|= (1 << c
);
3769 /* Now actually remove the instructions that are completely dead and update
3770 * the writemask of other instructions with dead channels.
3772 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3773 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3775 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3777 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3782 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3785 ralloc_free(write_level
);
3786 ralloc_free(writes
);
3791 /* Merges temporary registers together where possible to reduce the number of
3792 * registers needed to run a program.
3794 * Produces optimal code only after copy propagation and dead code elimination
3797 glsl_to_tgsi_visitor::merge_registers(void)
3799 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3800 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3803 /* Read the indices of the last read and first write to each temp register
3804 * into an array so that we don't have to traverse the instruction list as
3806 for (i
=0; i
< this->next_temp
; i
++) {
3807 last_reads
[i
] = get_last_temp_read(i
);
3808 first_writes
[i
] = get_first_temp_write(i
);
3811 /* Start looking for registers with non-overlapping usages that can be
3812 * merged together. */
3813 for (i
=0; i
< this->next_temp
; i
++) {
3814 /* Don't touch unused registers. */
3815 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3817 for (j
=0; j
< this->next_temp
; j
++) {
3818 /* Don't touch unused registers. */
3819 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3821 /* We can merge the two registers if the first write to j is after or
3822 * in the same instruction as the last read from i. Note that the
3823 * register at index i will always be used earlier or at the same time
3824 * as the register at index j. */
3825 if (first_writes
[i
] <= first_writes
[j
] &&
3826 last_reads
[i
] <= first_writes
[j
])
3828 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3830 /* Update the first_writes and last_reads arrays with the new
3831 * values for the merged register index, and mark the newly unused
3832 * register index as such. */
3833 last_reads
[i
] = last_reads
[j
];
3834 first_writes
[j
] = -1;
3840 ralloc_free(last_reads
);
3841 ralloc_free(first_writes
);
3844 /* Reassign indices to temporary registers by reusing unused indices created
3845 * by optimization passes. */
3847 glsl_to_tgsi_visitor::renumber_registers(void)
3852 for (i
=0; i
< this->next_temp
; i
++) {
3853 if (get_first_temp_read(i
) < 0) continue;
3855 rename_temp_register(i
, new_index
);
3859 this->next_temp
= new_index
;
3863 * Returns a fragment program which implements the current pixel transfer ops.
3864 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3867 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3868 glsl_to_tgsi_visitor
*original
,
3869 int scale_and_bias
, int pixel_maps
)
3871 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3872 struct st_context
*st
= st_context(original
->ctx
);
3873 struct gl_program
*prog
= &fp
->Base
.Base
;
3874 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3875 st_src_reg coord
, src0
;
3877 glsl_to_tgsi_instruction
*inst
;
3879 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3880 v
->ctx
= original
->ctx
;
3882 v
->shader_program
= NULL
;
3883 v
->glsl_version
= original
->glsl_version
;
3884 v
->native_integers
= original
->native_integers
;
3885 v
->options
= original
->options
;
3886 v
->next_temp
= original
->next_temp
;
3887 v
->num_address_regs
= original
->num_address_regs
;
3888 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3889 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3890 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3891 v
->num_immediates
= original
->num_immediates
;
3894 * Get initial pixel color from the texture.
3895 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3897 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3898 src0
= v
->get_temp(glsl_type::vec4_type
);
3899 dst0
= st_dst_reg(src0
);
3900 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3902 inst
->tex_target
= TEXTURE_2D_INDEX
;
3904 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3905 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3906 v
->samplers_used
|= (1 << 0);
3908 if (scale_and_bias
) {
3909 static const gl_state_index scale_state
[STATE_LENGTH
] =
3910 { STATE_INTERNAL
, STATE_PT_SCALE
,
3911 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3912 static const gl_state_index bias_state
[STATE_LENGTH
] =
3913 { STATE_INTERNAL
, STATE_PT_BIAS
,
3914 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3915 GLint scale_p
, bias_p
;
3916 st_src_reg scale
, bias
;
3918 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3919 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3921 /* MAD colorTemp, colorTemp, scale, bias; */
3922 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3923 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3924 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3928 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3929 st_dst_reg temp_dst
= st_dst_reg(temp
);
3931 assert(st
->pixel_xfer
.pixelmap_texture
);
3933 /* With a little effort, we can do four pixel map look-ups with
3934 * two TEX instructions:
3937 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3938 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3939 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3941 inst
->tex_target
= TEXTURE_2D_INDEX
;
3943 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3944 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3945 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3946 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3948 inst
->tex_target
= TEXTURE_2D_INDEX
;
3950 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3951 v
->samplers_used
|= (1 << 1);
3953 /* MOV colorTemp, temp; */
3954 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3957 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3959 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3960 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3961 glsl_to_tgsi_instruction
*newinst
;
3962 st_src_reg src_regs
[3];
3964 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3965 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3967 for (int i
=0; i
<3; i
++) {
3968 src_regs
[i
] = inst
->src
[i
];
3969 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3970 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3972 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3973 src_regs
[i
].index
= src0
.index
;
3975 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3976 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3979 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3980 newinst
->tex_target
= inst
->tex_target
;
3983 /* Make modifications to fragment program info. */
3984 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3985 original
->prog
->Parameters
);
3986 _mesa_free_parameter_list(params
);
3987 count_resources(v
, prog
);
3988 fp
->glsl_to_tgsi
= v
;
3992 * Make fragment program for glBitmap:
3993 * Sample the texture and kill the fragment if the bit is 0.
3994 * This program will be combined with the user's fragment program.
3996 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3999 get_bitmap_visitor(struct st_fragment_program
*fp
,
4000 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4002 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4003 struct st_context
*st
= st_context(original
->ctx
);
4004 struct gl_program
*prog
= &fp
->Base
.Base
;
4005 st_src_reg coord
, src0
;
4007 glsl_to_tgsi_instruction
*inst
;
4009 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4010 v
->ctx
= original
->ctx
;
4012 v
->shader_program
= NULL
;
4013 v
->glsl_version
= original
->glsl_version
;
4014 v
->native_integers
= original
->native_integers
;
4015 v
->options
= original
->options
;
4016 v
->next_temp
= original
->next_temp
;
4017 v
->num_address_regs
= original
->num_address_regs
;
4018 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4019 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4020 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4021 v
->num_immediates
= original
->num_immediates
;
4023 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4024 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4025 src0
= v
->get_temp(glsl_type::vec4_type
);
4026 dst0
= st_dst_reg(src0
);
4027 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4028 inst
->sampler
= samplerIndex
;
4029 inst
->tex_target
= TEXTURE_2D_INDEX
;
4031 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4032 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4033 v
->samplers_used
|= (1 << samplerIndex
);
4035 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4036 src0
.negate
= NEGATE_XYZW
;
4037 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4038 src0
.swizzle
= SWIZZLE_XXXX
;
4039 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4041 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4043 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4044 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4045 glsl_to_tgsi_instruction
*newinst
;
4046 st_src_reg src_regs
[3];
4048 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4049 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4051 for (int i
=0; i
<3; i
++) {
4052 src_regs
[i
] = inst
->src
[i
];
4053 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4054 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4057 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4058 newinst
->tex_target
= inst
->tex_target
;
4061 /* Make modifications to fragment program info. */
4062 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4063 count_resources(v
, prog
);
4064 fp
->glsl_to_tgsi
= v
;
4067 /* ------------------------- TGSI conversion stuff -------------------------- */
4069 unsigned branch_target
;
4074 * Intermediate state used during shader translation.
4076 struct st_translate
{
4077 struct ureg_program
*ureg
;
4079 struct ureg_dst temps
[MAX_TEMPS
];
4080 struct ureg_dst arrays
[MAX_ARRAYS
];
4081 struct ureg_src
*constants
;
4082 struct ureg_src
*immediates
;
4083 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4084 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4085 struct ureg_dst address
[2];
4086 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4087 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4089 unsigned array_sizes
[MAX_ARRAYS
];
4091 const GLuint
*inputMapping
;
4092 const GLuint
*outputMapping
;
4094 /* For every instruction that contains a label (eg CALL), keep
4095 * details so that we can go back afterwards and emit the correct
4096 * tgsi instruction number for each label.
4098 struct label
*labels
;
4099 unsigned labels_size
;
4100 unsigned labels_count
;
4102 /* Keep a record of the tgsi instruction number that each mesa
4103 * instruction starts at, will be used to fix up labels after
4108 unsigned insn_count
;
4110 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4115 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4116 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4118 TGSI_SEMANTIC_VERTEXID
,
4119 TGSI_SEMANTIC_INSTANCEID
4123 * Make note of a branch to a label in the TGSI code.
4124 * After we've emitted all instructions, we'll go over the list
4125 * of labels built here and patch the TGSI code with the actual
4126 * location of each label.
4128 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4132 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4133 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4134 t
->labels
= (struct label
*)realloc(t
->labels
,
4135 t
->labels_size
* sizeof(struct label
));
4136 if (t
->labels
== NULL
) {
4137 static unsigned dummy
;
4143 i
= t
->labels_count
++;
4144 t
->labels
[i
].branch_target
= branch_target
;
4145 return &t
->labels
[i
].token
;
4149 * Called prior to emitting the TGSI code for each instruction.
4150 * Allocate additional space for instructions if needed.
4151 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4152 * the next TGSI instruction.
4154 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4156 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4157 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4158 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4159 if (t
->insn
== NULL
) {
4165 t
->insn
[t
->insn_count
++] = start
;
4169 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4171 static struct ureg_src
4172 emit_immediate(struct st_translate
*t
,
4173 gl_constant_value values
[4],
4176 struct ureg_program
*ureg
= t
->ureg
;
4181 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4183 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4184 case GL_UNSIGNED_INT
:
4186 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4188 assert(!"should not get here - type must be float, int, uint, or bool");
4189 return ureg_src_undef();
4194 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4196 static struct ureg_dst
4197 dst_register(struct st_translate
*t
,
4198 gl_register_file file
,
4204 case PROGRAM_UNDEFINED
:
4205 return ureg_dst_undef();
4207 case PROGRAM_TEMPORARY
:
4209 assert(index
< (int) Elements(t
->temps
));
4211 if (ureg_dst_is_undef(t
->temps
[index
]))
4212 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4214 return t
->temps
[index
];
4217 array
= index
>> 16;
4220 assert(array
< (int) Elements(t
->arrays
));
4222 if (ureg_dst_is_undef(t
->arrays
[array
]))
4223 t
->arrays
[array
] = ureg_DECL_array_temporary(
4224 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4226 return ureg_dst_array_offset(t
->arrays
[array
],
4227 (int)(index
& 0xFFFF) - 0x8000);
4229 case PROGRAM_OUTPUT
:
4230 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4231 assert(index
< VARYING_SLOT_MAX
);
4232 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4233 assert(index
< FRAG_RESULT_MAX
);
4235 assert(index
< VARYING_SLOT_MAX
);
4237 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4239 return t
->outputs
[t
->outputMapping
[index
]];
4241 case PROGRAM_ADDRESS
:
4242 return t
->address
[index
];
4245 assert(!"unknown dst register file");
4246 return ureg_dst_undef();
4251 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4253 static struct ureg_src
4254 src_register(struct st_translate
*t
,
4255 gl_register_file file
,
4256 GLint index
, GLint index2D
)
4259 case PROGRAM_UNDEFINED
:
4260 return ureg_src_undef();
4262 case PROGRAM_TEMPORARY
:
4264 return ureg_src(dst_register(t
, file
, index
));
4266 case PROGRAM_UNIFORM
:
4268 return t
->constants
[index
];
4269 case PROGRAM_STATE_VAR
:
4270 case PROGRAM_CONSTANT
: /* ie, immediate */
4272 struct ureg_src src
;
4273 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4275 src
.DimensionIndex
= index2D
;
4277 } else if (index
< 0)
4278 return ureg_DECL_constant(t
->ureg
, 0);
4280 return t
->constants
[index
];
4282 case PROGRAM_IMMEDIATE
:
4283 return t
->immediates
[index
];
4286 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4287 return t
->inputs
[t
->inputMapping
[index
]];
4289 case PROGRAM_OUTPUT
:
4290 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4291 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4293 case PROGRAM_ADDRESS
:
4294 return ureg_src(t
->address
[index
]);
4296 case PROGRAM_SYSTEM_VALUE
:
4297 assert(index
< (int) Elements(t
->systemValues
));
4298 return t
->systemValues
[index
];
4301 assert(!"unknown src register file");
4302 return ureg_src_undef();
4307 * Create a TGSI ureg_dst register from an st_dst_reg.
4309 static struct ureg_dst
4310 translate_dst(struct st_translate
*t
,
4311 const st_dst_reg
*dst_reg
,
4312 bool saturate
, bool clamp_color
)
4314 struct ureg_dst dst
= dst_register(t
,
4318 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4321 dst
= ureg_saturate(dst
);
4322 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4323 /* Clamp colors for ARB_color_buffer_float. */
4324 switch (t
->procType
) {
4325 case TGSI_PROCESSOR_VERTEX
:
4326 /* XXX if the geometry shader is present, this must be done there
4327 * instead of here. */
4328 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4329 dst_reg
->index
== VARYING_SLOT_COL1
||
4330 dst_reg
->index
== VARYING_SLOT_BFC0
||
4331 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4332 dst
= ureg_saturate(dst
);
4336 case TGSI_PROCESSOR_FRAGMENT
:
4337 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4338 dst
= ureg_saturate(dst
);
4344 if (dst_reg
->reladdr
!= NULL
) {
4345 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4346 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4353 * Create a TGSI ureg_src register from an st_src_reg.
4355 static struct ureg_src
4356 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4358 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4360 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& src_reg
->has_index2
) {
4361 src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4362 if (src_reg
->reladdr2
)
4363 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4366 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4369 src
= ureg_swizzle(src
,
4370 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4371 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4372 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4373 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4375 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4376 src
= ureg_negate(src
);
4378 if (src_reg
->reladdr
!= NULL
) {
4379 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4380 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4386 static struct tgsi_texture_offset
4387 translate_tex_offset(struct st_translate
*t
,
4388 const struct tgsi_texture_offset
*in_offset
)
4390 struct tgsi_texture_offset offset
;
4391 struct ureg_src imm_src
;
4393 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4394 imm_src
= t
->immediates
[in_offset
->Index
];
4396 offset
.File
= imm_src
.File
;
4397 offset
.Index
= imm_src
.Index
;
4398 offset
.SwizzleX
= imm_src
.SwizzleX
;
4399 offset
.SwizzleY
= imm_src
.SwizzleY
;
4400 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4401 offset
.File
= TGSI_FILE_IMMEDIATE
;
4408 compile_tgsi_instruction(struct st_translate
*t
,
4409 const glsl_to_tgsi_instruction
*inst
,
4410 bool clamp_dst_color_output
)
4412 struct ureg_program
*ureg
= t
->ureg
;
4414 struct ureg_dst dst
[1];
4415 struct ureg_src src
[4];
4416 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4420 unsigned tex_target
;
4422 num_dst
= num_inst_dst_regs(inst
->op
);
4423 num_src
= num_inst_src_regs(inst
->op
);
4426 dst
[0] = translate_dst(t
,
4429 clamp_dst_color_output
);
4431 for (i
= 0; i
< num_src
; i
++)
4432 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4435 case TGSI_OPCODE_BGNLOOP
:
4436 case TGSI_OPCODE_CAL
:
4437 case TGSI_OPCODE_ELSE
:
4438 case TGSI_OPCODE_ENDLOOP
:
4439 case TGSI_OPCODE_IF
:
4440 case TGSI_OPCODE_UIF
:
4441 assert(num_dst
== 0);
4442 ureg_label_insn(ureg
,
4446 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4449 case TGSI_OPCODE_TEX
:
4450 case TGSI_OPCODE_TXB
:
4451 case TGSI_OPCODE_TXD
:
4452 case TGSI_OPCODE_TXL
:
4453 case TGSI_OPCODE_TXP
:
4454 case TGSI_OPCODE_TXQ
:
4455 case TGSI_OPCODE_TXF
:
4456 case TGSI_OPCODE_TEX2
:
4457 case TGSI_OPCODE_TXB2
:
4458 case TGSI_OPCODE_TXL2
:
4459 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4460 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4461 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4463 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4469 texoffsets
, inst
->tex_offset_num_offset
,
4473 case TGSI_OPCODE_SCS
:
4474 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4475 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4488 * Emit the TGSI instructions for inverting and adjusting WPOS.
4489 * This code is unavoidable because it also depends on whether
4490 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4493 emit_wpos_adjustment( struct st_translate
*t
,
4494 const struct gl_program
*program
,
4496 GLfloat adjX
, GLfloat adjY
[2])
4498 struct ureg_program
*ureg
= t
->ureg
;
4500 /* Fragment program uses fragment position input.
4501 * Need to replace instances of INPUT[WPOS] with temp T
4502 * where T = INPUT[WPOS] by y is inverted.
4504 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4505 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4506 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4508 /* XXX: note we are modifying the incoming shader here! Need to
4509 * do this before emitting the constant decls below, or this
4512 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4513 wposTransformState
);
4515 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4516 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4517 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4519 /* First, apply the coordinate shift: */
4520 if (adjX
|| adjY
[0] || adjY
[1]) {
4521 if (adjY
[0] != adjY
[1]) {
4522 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4523 * depending on whether inversion is actually going to be applied
4524 * or not, which is determined by testing against the inversion
4525 * state variable used below, which will be either +1 or -1.
4527 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4529 ureg_CMP(ureg
, adj_temp
,
4530 ureg_scalar(wpostrans
, invert
? 2 : 0),
4531 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4532 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4533 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4535 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4536 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4538 wpos_input
= ureg_src(wpos_temp
);
4540 /* MOV wpos_temp, input[wpos]
4542 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4545 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4546 * inversion/identity, or the other way around if we're drawing to an FBO.
4549 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4552 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4554 ureg_scalar(wpostrans
, 0),
4555 ureg_scalar(wpostrans
, 1));
4557 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4560 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4562 ureg_scalar(wpostrans
, 2),
4563 ureg_scalar(wpostrans
, 3));
4566 /* Use wpos_temp as position input from here on:
4568 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4573 * Emit fragment position/ooordinate code.
4576 emit_wpos(struct st_context
*st
,
4577 struct st_translate
*t
,
4578 const struct gl_program
*program
,
4579 struct ureg_program
*ureg
)
4581 const struct gl_fragment_program
*fp
=
4582 (const struct gl_fragment_program
*) program
;
4583 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4584 GLfloat adjX
= 0.0f
;
4585 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4586 boolean invert
= FALSE
;
4588 /* Query the pixel center conventions supported by the pipe driver and set
4589 * adjX, adjY to help out if it cannot handle the requested one internally.
4591 * The bias of the y-coordinate depends on whether y-inversion takes place
4592 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4593 * drawing to an FBO (causes additional inversion), and whether the the pipe
4594 * driver origin and the requested origin differ (the latter condition is
4595 * stored in the 'invert' variable).
4597 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4599 * center shift only:
4604 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4605 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4606 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4607 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4609 * inversion and center shift:
4610 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4611 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4612 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4613 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4615 if (fp
->OriginUpperLeft
) {
4616 /* Fragment shader wants origin in upper-left */
4617 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4618 /* the driver supports upper-left origin */
4620 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4621 /* the driver supports lower-left origin, need to invert Y */
4622 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4629 /* Fragment shader wants origin in lower-left */
4630 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4631 /* the driver supports lower-left origin */
4632 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4633 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4634 /* the driver supports upper-left origin, need to invert Y */
4640 if (fp
->PixelCenterInteger
) {
4641 /* Fragment shader wants pixel center integer */
4642 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4643 /* the driver supports pixel center integer */
4645 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4647 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4648 /* the driver supports pixel center half integer, need to bias X,Y */
4657 /* Fragment shader wants pixel center half integer */
4658 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4659 /* the driver supports pixel center half integer */
4661 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4662 /* the driver supports pixel center integer, need to bias X,Y */
4663 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4664 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4670 /* we invert after adjustment so that we avoid the MOV to temporary,
4671 * and reuse the adjustment ADD instead */
4672 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4676 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4677 * TGSI uses +1 for front, -1 for back.
4678 * This function converts the TGSI value to the GL value. Simply clamping/
4679 * saturating the value to [0,1] does the job.
4682 emit_face_var(struct st_translate
*t
)
4684 struct ureg_program
*ureg
= t
->ureg
;
4685 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4686 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4688 /* MOV_SAT face_temp, input[face] */
4689 face_temp
= ureg_saturate(face_temp
);
4690 ureg_MOV(ureg
, face_temp
, face_input
);
4692 /* Use face_temp as face input from here on: */
4693 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4697 emit_edgeflags(struct st_translate
*t
)
4699 struct ureg_program
*ureg
= t
->ureg
;
4700 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4701 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4703 ureg_MOV(ureg
, edge_dst
, edge_src
);
4707 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4708 * \param program the program to translate
4709 * \param numInputs number of input registers used
4710 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4712 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4713 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4715 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4716 * \param numOutputs number of output registers used
4717 * \param outputMapping maps Mesa fragment program outputs to TGSI
4719 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4720 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4723 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4725 extern "C" enum pipe_error
4726 st_translate_program(
4727 struct gl_context
*ctx
,
4729 struct ureg_program
*ureg
,
4730 glsl_to_tgsi_visitor
*program
,
4731 const struct gl_program
*proginfo
,
4733 const GLuint inputMapping
[],
4734 const ubyte inputSemanticName
[],
4735 const ubyte inputSemanticIndex
[],
4736 const GLuint interpMode
[],
4737 const GLboolean is_centroid
[],
4739 const GLuint outputMapping
[],
4740 const ubyte outputSemanticName
[],
4741 const ubyte outputSemanticIndex
[],
4742 boolean passthrough_edgeflags
,
4743 boolean clamp_color
)
4745 struct st_translate
*t
;
4747 enum pipe_error ret
= PIPE_OK
;
4749 assert(numInputs
<= Elements(t
->inputs
));
4750 assert(numOutputs
<= Elements(t
->outputs
));
4752 t
= CALLOC_STRUCT(st_translate
);
4754 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4758 memset(t
, 0, sizeof *t
);
4760 t
->procType
= procType
;
4761 t
->inputMapping
= inputMapping
;
4762 t
->outputMapping
= outputMapping
;
4765 if (program
->shader_program
) {
4766 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4767 struct gl_uniform_storage
*const storage
=
4768 &program
->shader_program
->UniformStorage
[i
];
4770 _mesa_uniform_detach_all_driver_storage(storage
);
4775 * Declare input attributes.
4777 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4778 for (i
= 0; i
< numInputs
; i
++) {
4779 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4780 inputSemanticName
[i
],
4781 inputSemanticIndex
[i
],
4786 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4787 /* Must do this after setting up t->inputs, and before
4788 * emitting constant references, below:
4790 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4793 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4797 * Declare output attributes.
4799 for (i
= 0; i
< numOutputs
; i
++) {
4800 switch (outputSemanticName
[i
]) {
4801 case TGSI_SEMANTIC_POSITION
:
4802 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4803 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4804 outputSemanticIndex
[i
]);
4805 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4807 case TGSI_SEMANTIC_STENCIL
:
4808 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4809 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4810 outputSemanticIndex
[i
]);
4811 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4813 case TGSI_SEMANTIC_COLOR
:
4814 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4815 TGSI_SEMANTIC_COLOR
,
4816 outputSemanticIndex
[i
]);
4819 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4820 ret
= PIPE_ERROR_BAD_INPUT
;
4825 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4826 for (i
= 0; i
< numInputs
; i
++) {
4827 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4829 inputSemanticName
[i
],
4830 inputSemanticIndex
[i
]);
4833 for (i
= 0; i
< numOutputs
; i
++) {
4834 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4835 outputSemanticName
[i
],
4836 outputSemanticIndex
[i
]);
4840 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4842 for (i
= 0; i
< numInputs
; i
++) {
4843 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4846 for (i
= 0; i
< numOutputs
; i
++) {
4847 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4848 outputSemanticName
[i
],
4849 outputSemanticIndex
[i
]);
4850 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
4851 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4853 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
4854 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
4855 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4858 if (passthrough_edgeflags
)
4862 /* Declare address register.
4864 if (program
->num_address_regs
> 0) {
4865 assert(program
->num_address_regs
<= 2);
4866 t
->address
[0] = ureg_DECL_address(ureg
);
4867 if (program
->num_address_regs
== 2)
4868 t
->address
[1] = ureg_DECL_address(ureg
);
4871 /* Declare misc input registers
4874 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4875 unsigned numSys
= 0;
4876 for (i
= 0; sysInputs
; i
++) {
4877 if (sysInputs
& (1 << i
)) {
4878 unsigned semName
= mesa_sysval_to_semantic
[i
];
4879 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4880 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4881 semName
== TGSI_SEMANTIC_VERTEXID
) {
4882 /* From Gallium perspective, these system values are always
4883 * integer, and require native integer support. However, if
4884 * native integer is supported on the vertex stage but not the
4885 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4886 * assumes these system values are floats. To resolve the
4887 * inconsistency, we insert a U2F.
4889 struct st_context
*st
= st_context(ctx
);
4890 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4891 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4892 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4893 if (!ctx
->Const
.NativeIntegers
) {
4894 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4895 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4896 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4900 sysInputs
&= ~(1 << i
);
4905 /* Copy over array sizes
4907 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4909 /* Emit constants and uniforms. TGSI uses a single index space for these,
4910 * so we put all the translated regs in t->constants.
4912 if (proginfo
->Parameters
) {
4913 t
->constants
= (struct ureg_src
*)
4914 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4915 if (t
->constants
== NULL
) {
4916 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4920 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4921 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4922 case PROGRAM_STATE_VAR
:
4923 case PROGRAM_UNIFORM
:
4924 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4927 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4928 * addressing of the const buffer.
4929 * FIXME: Be smarter and recognize param arrays:
4930 * indirect addressing is only valid within the referenced
4933 case PROGRAM_CONSTANT
:
4934 if (program
->indirect_addr_consts
)
4935 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4937 t
->constants
[i
] = emit_immediate(t
,
4938 proginfo
->Parameters
->ParameterValues
[i
],
4939 proginfo
->Parameters
->Parameters
[i
].DataType
,
4948 if (program
->shader_program
) {
4949 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4951 for (i
= 0; i
< num_ubos
; i
++) {
4952 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4956 /* Emit immediate values.
4958 t
->immediates
= (struct ureg_src
*)
4959 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4960 if (t
->immediates
== NULL
) {
4961 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4965 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4966 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4967 assert(i
< program
->num_immediates
);
4968 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4970 assert(i
== program
->num_immediates
);
4972 /* texture samplers */
4973 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
4974 if (program
->samplers_used
& (1 << i
)) {
4975 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4979 /* Emit each instruction in turn:
4981 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4982 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4983 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4987 /* Fix up all emitted labels:
4989 for (i
= 0; i
< t
->labels_count
; i
++) {
4990 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4991 t
->insn
[t
->labels
[i
].branch_target
]);
4994 if (program
->shader_program
) {
4995 /* This has to be done last. Any operation the can cause
4996 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4997 * program constant) has to happen before creating this linkage.
4999 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5000 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5003 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5004 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5013 free(t
->immediates
);
5016 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5024 /* ----------------------------- End TGSI code ------------------------------ */
5027 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5028 * generating Mesa IR.
5030 static struct gl_program
*
5031 get_mesa_program(struct gl_context
*ctx
,
5032 struct gl_shader_program
*shader_program
,
5033 struct gl_shader
*shader
)
5035 glsl_to_tgsi_visitor
* v
;
5036 struct gl_program
*prog
;
5039 struct gl_shader_compiler_options
*options
=
5040 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5041 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5044 switch (shader
->Type
) {
5045 case GL_VERTEX_SHADER
:
5046 target
= GL_VERTEX_PROGRAM_ARB
;
5047 ptarget
= PIPE_SHADER_VERTEX
;
5049 case GL_FRAGMENT_SHADER
:
5050 target
= GL_FRAGMENT_PROGRAM_ARB
;
5051 ptarget
= PIPE_SHADER_FRAGMENT
;
5053 case GL_GEOMETRY_SHADER
:
5054 target
= GL_GEOMETRY_PROGRAM_NV
;
5055 ptarget
= PIPE_SHADER_GEOMETRY
;
5058 assert(!"should not be reached");
5062 validate_ir_tree(shader
->ir
);
5064 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5067 prog
->Parameters
= _mesa_new_parameter_list();
5068 v
= new glsl_to_tgsi_visitor();
5071 v
->shader_program
= shader_program
;
5072 v
->options
= options
;
5073 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5074 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5076 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5077 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5079 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5082 /* Remove reads from output registers. */
5083 lower_output_reads(shader
->ir
);
5085 /* Emit intermediate IR for main(). */
5086 visit_exec_list(shader
->ir
, v
);
5088 /* Now emit bodies for any functions that were used. */
5090 progress
= GL_FALSE
;
5092 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5093 function_entry
*entry
= (function_entry
*)iter
.get();
5095 if (!entry
->bgn_inst
) {
5096 v
->current_function
= entry
;
5098 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5099 entry
->bgn_inst
->function
= entry
;
5101 visit_exec_list(&entry
->sig
->body
, v
);
5103 glsl_to_tgsi_instruction
*last
;
5104 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5105 if (last
->op
!= TGSI_OPCODE_RET
)
5106 v
->emit(NULL
, TGSI_OPCODE_RET
);
5108 glsl_to_tgsi_instruction
*end
;
5109 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5110 end
->function
= entry
;
5118 /* Print out some information (for debugging purposes) used by the
5119 * optimization passes. */
5120 for (i
=0; i
< v
->next_temp
; i
++) {
5121 int fr
= v
->get_first_temp_read(i
);
5122 int fw
= v
->get_first_temp_write(i
);
5123 int lr
= v
->get_last_temp_read(i
);
5124 int lw
= v
->get_last_temp_write(i
);
5126 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5131 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5133 v
->copy_propagate();
5134 while (v
->eliminate_dead_code_advanced());
5136 v
->eliminate_dead_code();
5137 v
->merge_registers();
5138 v
->renumber_registers();
5140 /* Write the END instruction. */
5141 v
->emit(NULL
, TGSI_OPCODE_END
);
5143 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5145 printf("GLSL IR for linked %s program %d:\n",
5146 _mesa_shader_stage_to_string(shader
->Stage
),
5147 shader_program
->Name
);
5148 _mesa_print_ir(shader
->ir
, NULL
);
5154 prog
->Instructions
= NULL
;
5155 prog
->NumInstructions
= 0;
5157 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5158 count_resources(v
, prog
);
5160 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5162 /* This has to be done last. Any operation the can cause
5163 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5164 * program constant) has to happen before creating this linkage.
5166 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5167 if (!shader_program
->LinkStatus
) {
5171 struct st_vertex_program
*stvp
;
5172 struct st_fragment_program
*stfp
;
5173 struct st_geometry_program
*stgp
;
5175 switch (shader
->Type
) {
5176 case GL_VERTEX_SHADER
:
5177 stvp
= (struct st_vertex_program
*)prog
;
5178 stvp
->glsl_to_tgsi
= v
;
5180 case GL_FRAGMENT_SHADER
:
5181 stfp
= (struct st_fragment_program
*)prog
;
5182 stfp
->glsl_to_tgsi
= v
;
5184 case GL_GEOMETRY_SHADER
:
5185 stgp
= (struct st_geometry_program
*)prog
;
5186 stgp
->glsl_to_tgsi
= v
;
5187 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5188 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5189 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5192 assert(!"should not be reached");
5202 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5204 struct gl_shader
*shader
;
5205 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5206 type
== GL_GEOMETRY_SHADER_ARB
);
5207 shader
= rzalloc(NULL
, struct gl_shader
);
5209 shader
->Type
= type
;
5210 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5211 shader
->Name
= name
;
5212 _mesa_init_shader(ctx
, shader
);
5217 struct gl_shader_program
*
5218 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5220 struct gl_shader_program
*shProg
;
5221 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5223 shProg
->Name
= name
;
5224 _mesa_init_shader_program(ctx
, shProg
);
5231 * Called via ctx->Driver.LinkShader()
5232 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5233 * with code lowering and other optimizations.
5236 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5238 assert(prog
->LinkStatus
);
5240 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5241 if (prog
->_LinkedShaders
[i
] == NULL
)
5245 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5246 const struct gl_shader_compiler_options
*options
=
5247 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5249 /* If there are forms of indirect addressing that the driver
5250 * cannot handle, perform the lowering pass.
5252 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5253 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5254 lower_variable_index_to_cond_assign(ir
,
5255 options
->EmitNoIndirectInput
,
5256 options
->EmitNoIndirectOutput
,
5257 options
->EmitNoIndirectTemp
,
5258 options
->EmitNoIndirectUniform
);
5261 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5262 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5263 LOWER_UNPACK_SNORM_2x16
|
5264 LOWER_PACK_UNORM_2x16
|
5265 LOWER_UNPACK_UNORM_2x16
|
5266 LOWER_PACK_SNORM_4x8
|
5267 LOWER_UNPACK_SNORM_4x8
|
5268 LOWER_UNPACK_UNORM_4x8
|
5269 LOWER_PACK_UNORM_4x8
|
5270 LOWER_PACK_HALF_2x16
|
5271 LOWER_UNPACK_HALF_2x16
;
5273 lower_packing_builtins(ir
, lower_inst
);
5276 do_mat_op_to_vec(ir
);
5277 lower_instructions(ir
,
5282 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5283 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5285 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5286 do_vec_index_to_cond_assign(ir
);
5287 lower_vector_insert(ir
, true);
5288 lower_quadop_vector(ir
, false);
5290 if (options
->MaxIfDepth
== 0) {
5297 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5299 progress
= do_common_optimization(ir
, true, true,
5300 options
->MaxUnrollIterations
, options
)
5303 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5307 validate_ir_tree(ir
);
5310 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5311 struct gl_program
*linked_prog
;
5313 if (prog
->_LinkedShaders
[i
] == NULL
)
5316 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5319 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5321 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5322 _mesa_program_index_to_target(i
),
5324 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5326 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5331 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5338 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5339 const GLuint outputMapping
[],
5340 struct pipe_stream_output_info
*so
)
5343 struct gl_transform_feedback_info
*info
=
5344 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5346 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5347 so
->output
[i
].register_index
=
5348 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5349 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5350 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5351 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5352 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5355 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5356 so
->stride
[i
] = info
->BufferStride
[i
];
5358 so
->num_outputs
= info
->NumOutputs
;