2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of arrays
80 #define MAX_ARRAYS 256
82 #define MAX_GLSL_TEXTURE_OFFSET 4
87 static int swizzle_for_size(int size
);
90 * This struct is a corresponding struct to TGSI ureg_src.
94 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
98 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
99 this->swizzle
= swizzle_for_size(type
->vector_elements
);
101 this->swizzle
= SWIZZLE_XYZW
;
104 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
105 this->reladdr
= NULL
;
106 this->reladdr2
= NULL
;
107 this->has_index2
= false;
110 st_src_reg(gl_register_file file
, int index
, int type
)
116 this->swizzle
= SWIZZLE_XYZW
;
118 this->reladdr
= NULL
;
119 this->reladdr2
= NULL
;
120 this->has_index2
= false;
123 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
128 this->index2D
= index2D
;
129 this->swizzle
= SWIZZLE_XYZW
;
131 this->reladdr
= NULL
;
132 this->reladdr2
= NULL
;
133 this->has_index2
= false;
138 this->type
= GLSL_TYPE_ERROR
;
139 this->file
= PROGRAM_UNDEFINED
;
144 this->reladdr
= NULL
;
145 this->reladdr2
= NULL
;
146 this->has_index2
= false;
149 explicit st_src_reg(st_dst_reg reg
);
151 gl_register_file file
; /**< PROGRAM_* from Mesa */
152 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
154 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
155 int negate
; /**< NEGATE_XYZW mask from mesa */
156 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
157 /** Register index should be offset by the integer in this reg. */
159 st_src_reg
*reladdr2
;
165 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
169 this->writemask
= writemask
;
170 this->cond_mask
= COND_TR
;
171 this->reladdr
= NULL
;
175 st_dst_reg(gl_register_file file
, int writemask
, int type
)
179 this->writemask
= writemask
;
180 this->cond_mask
= COND_TR
;
181 this->reladdr
= NULL
;
187 this->type
= GLSL_TYPE_ERROR
;
188 this->file
= PROGRAM_UNDEFINED
;
191 this->cond_mask
= COND_TR
;
192 this->reladdr
= NULL
;
195 explicit st_dst_reg(st_src_reg reg
);
197 gl_register_file file
; /**< PROGRAM_* from Mesa */
198 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
199 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
201 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
202 /** Register index should be offset by the integer in this reg. */
206 st_src_reg::st_src_reg(st_dst_reg reg
)
208 this->type
= reg
.type
;
209 this->file
= reg
.file
;
210 this->index
= reg
.index
;
211 this->swizzle
= SWIZZLE_XYZW
;
213 this->reladdr
= reg
.reladdr
;
215 this->reladdr2
= NULL
;
216 this->has_index2
= false;
219 st_dst_reg::st_dst_reg(st_src_reg reg
)
221 this->type
= reg
.type
;
222 this->file
= reg
.file
;
223 this->index
= reg
.index
;
224 this->writemask
= WRITEMASK_XYZW
;
225 this->cond_mask
= COND_TR
;
226 this->reladdr
= reg
.reladdr
;
229 class glsl_to_tgsi_instruction
: public exec_node
{
231 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
236 /** Pointer to the ir source this tree came from for debugging */
238 GLboolean cond_update
;
240 st_src_reg sampler
; /**< sampler register */
241 int sampler_array_size
; /**< 1-based size of sampler array, 1 if not array */
242 int tex_target
; /**< One of TEXTURE_*_INDEX */
243 GLboolean tex_shadow
;
245 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
246 unsigned tex_offset_num_offset
;
247 int dead_mask
; /**< Used in dead code elimination */
249 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
252 class variable_storage
: public exec_node
{
254 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
255 : file(file
), index(index
), var(var
)
260 gl_register_file file
;
262 ir_variable
*var
; /* variable that maps to this, if any */
265 class immediate_storage
: public exec_node
{
267 immediate_storage(gl_constant_value
*values
, int size
, int type
)
269 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
274 gl_constant_value values
[4];
275 int size
; /**< Number of components (1-4) */
276 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
279 class function_entry
: public exec_node
{
281 ir_function_signature
*sig
;
284 * identifier of this function signature used by the program.
286 * At the point that TGSI instructions for function calls are
287 * generated, we don't know the address of the first instruction of
288 * the function body. So we make the BranchTarget that is called a
289 * small integer and rewrite them during set_branchtargets().
294 * Pointer to first instruction of the function body.
296 * Set during function body emits after main() is processed.
298 glsl_to_tgsi_instruction
*bgn_inst
;
301 * Index of the first instruction of the function body in actual TGSI.
303 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
307 /** Storage for the return value. */
308 st_src_reg return_reg
;
311 struct glsl_to_tgsi_visitor
: public ir_visitor
{
313 glsl_to_tgsi_visitor();
314 ~glsl_to_tgsi_visitor();
316 function_entry
*current_function
;
318 struct gl_context
*ctx
;
319 struct gl_program
*prog
;
320 struct gl_shader_program
*shader_program
;
321 struct gl_shader
*shader
;
322 struct gl_shader_compiler_options
*options
;
326 unsigned array_sizes
[MAX_ARRAYS
];
329 int num_address_regs
;
331 bool indirect_addr_consts
;
334 bool native_integers
;
337 variable_storage
*find_variable_storage(ir_variable
*var
);
339 int add_constant(gl_register_file file
, gl_constant_value values
[4],
340 int size
, int datatype
, GLuint
*swizzle_out
);
342 function_entry
*get_function_signature(ir_function_signature
*sig
);
344 st_src_reg
get_temp(const glsl_type
*type
);
345 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
347 st_src_reg
st_src_reg_for_float(float val
);
348 st_src_reg
st_src_reg_for_int(int val
);
349 st_src_reg
st_src_reg_for_type(int type
, int val
);
352 * \name Visit methods
354 * As typical for the visitor pattern, there must be one \c visit method for
355 * each concrete subclass of \c ir_instruction. Virtual base classes within
356 * the hierarchy should not have \c visit methods.
359 virtual void visit(ir_variable
*);
360 virtual void visit(ir_loop
*);
361 virtual void visit(ir_loop_jump
*);
362 virtual void visit(ir_function_signature
*);
363 virtual void visit(ir_function
*);
364 virtual void visit(ir_expression
*);
365 virtual void visit(ir_swizzle
*);
366 virtual void visit(ir_dereference_variable
*);
367 virtual void visit(ir_dereference_array
*);
368 virtual void visit(ir_dereference_record
*);
369 virtual void visit(ir_assignment
*);
370 virtual void visit(ir_constant
*);
371 virtual void visit(ir_call
*);
372 virtual void visit(ir_return
*);
373 virtual void visit(ir_discard
*);
374 virtual void visit(ir_texture
*);
375 virtual void visit(ir_if
*);
376 virtual void visit(ir_emit_vertex
*);
377 virtual void visit(ir_end_primitive
*);
382 /** List of variable_storage */
385 /** List of immediate_storage */
386 exec_list immediates
;
387 unsigned num_immediates
;
389 /** List of function_entry */
390 exec_list function_signatures
;
391 int next_signature_id
;
393 /** List of glsl_to_tgsi_instruction */
394 exec_list instructions
;
396 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
398 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
399 st_dst_reg dst
, st_src_reg src0
);
401 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
402 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
404 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
406 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
408 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
410 st_src_reg src0
, st_src_reg src1
,
411 st_src_reg src2
, st_src_reg src3
);
413 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
415 st_src_reg src0
, st_src_reg src1
);
418 * Emit the correct dot-product instruction for the type of arguments
420 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
426 void emit_scalar(ir_instruction
*ir
, unsigned op
,
427 st_dst_reg dst
, st_src_reg src0
);
429 void emit_scalar(ir_instruction
*ir
, unsigned op
,
430 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
432 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
434 void emit_scs(ir_instruction
*ir
, unsigned op
,
435 st_dst_reg dst
, const st_src_reg
&src
);
437 bool try_emit_mad(ir_expression
*ir
,
439 bool try_emit_mad_for_and_not(ir_expression
*ir
,
442 void emit_swz(ir_expression
*ir
);
444 bool process_move_condition(ir_rvalue
*ir
);
446 void simplify_cmp(void);
448 void rename_temp_register(int index
, int new_index
);
449 int get_first_temp_read(int index
);
450 int get_first_temp_write(int index
);
451 int get_last_temp_read(int index
);
452 int get_last_temp_write(int index
);
454 void copy_propagate(void);
455 int eliminate_dead_code(void);
456 void merge_registers(void);
457 void renumber_registers(void);
459 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
460 st_dst_reg
*l
, st_src_reg
*r
);
465 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
467 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
469 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
470 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
471 static st_dst_reg sampler_reladdr
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 2);
474 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
477 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
481 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
484 prog
->LinkStatus
= GL_FALSE
;
488 swizzle_for_size(int size
)
490 int size_swizzles
[4] = {
491 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
492 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
493 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
494 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
497 assert((size
>= 1) && (size
<= 4));
498 return size_swizzles
[size
- 1];
502 is_tex_instruction(unsigned opcode
)
504 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
509 num_inst_dst_regs(unsigned opcode
)
511 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
512 return info
->num_dst
;
516 num_inst_src_regs(unsigned opcode
)
518 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
519 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
522 glsl_to_tgsi_instruction
*
523 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
525 st_src_reg src0
, st_src_reg src1
,
526 st_src_reg src2
, st_src_reg src3
)
528 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
529 int num_reladdr
= 0, i
;
531 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
533 /* If we have to do relative addressing, we want to load the ARL
534 * reg directly for one of the regs, and preload the other reladdr
535 * sources into temps.
537 num_reladdr
+= dst
.reladdr
!= NULL
;
538 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
539 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
540 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
541 num_reladdr
+= src3
.reladdr
!= NULL
|| src3
.reladdr2
!= NULL
;
543 reladdr_to_temp(ir
, &src3
, &num_reladdr
);
544 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
545 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
546 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
549 emit_arl(ir
, address_reg
, *dst
.reladdr
);
552 assert(num_reladdr
== 0);
563 inst
->function
= NULL
;
565 /* Update indirect addressing status used by TGSI */
568 case PROGRAM_STATE_VAR
:
569 case PROGRAM_CONSTANT
:
570 case PROGRAM_UNIFORM
:
571 this->indirect_addr_consts
= true;
573 case PROGRAM_IMMEDIATE
:
574 assert(!"immediates should not have indirect addressing");
581 for (i
=0; i
<4; i
++) {
582 if(inst
->src
[i
].reladdr
) {
583 switch(inst
->src
[i
].file
) {
584 case PROGRAM_STATE_VAR
:
585 case PROGRAM_CONSTANT
:
586 case PROGRAM_UNIFORM
:
587 this->indirect_addr_consts
= true;
589 case PROGRAM_IMMEDIATE
:
590 assert(!"immediates should not have indirect addressing");
599 this->instructions
.push_tail(inst
);
604 glsl_to_tgsi_instruction
*
605 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
606 st_dst_reg dst
, st_src_reg src0
,
607 st_src_reg src1
, st_src_reg src2
)
609 return emit(ir
, op
, dst
, src0
, src1
, src2
, undef_src
);
612 glsl_to_tgsi_instruction
*
613 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
614 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
616 return emit(ir
, op
, dst
, src0
, src1
, undef_src
, undef_src
);
619 glsl_to_tgsi_instruction
*
620 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
621 st_dst_reg dst
, st_src_reg src0
)
623 assert(dst
.writemask
!= 0);
624 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
, undef_src
);
627 glsl_to_tgsi_instruction
*
628 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
630 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
, undef_src
);
634 * Determines whether to use an integer, unsigned integer, or float opcode
635 * based on the operands and input opcode, then emits the result.
638 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
640 st_src_reg src0
, st_src_reg src1
)
642 int type
= GLSL_TYPE_FLOAT
;
644 if (op
== TGSI_OPCODE_MOV
)
647 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
648 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
649 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
650 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
652 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
653 type
= GLSL_TYPE_FLOAT
;
654 else if (native_integers
)
655 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
657 #define case4(c, f, i, u) \
658 case TGSI_OPCODE_##c: \
659 if (type == GLSL_TYPE_INT) \
660 op = TGSI_OPCODE_##i; \
661 else if (type == GLSL_TYPE_UINT) \
662 op = TGSI_OPCODE_##u; \
664 op = TGSI_OPCODE_##f; \
667 #define case3(f, i, u) case4(f, f, i, u)
668 #define case2fi(f, i) case4(f, f, i, i)
669 #define case2iu(i, u) case4(i, LAST, i, u)
671 #define casecomp(c, f, i, u) \
672 case TGSI_OPCODE_##c: \
673 if (type == GLSL_TYPE_INT) \
674 op = TGSI_OPCODE_##i; \
675 else if (type == GLSL_TYPE_UINT) \
676 op = TGSI_OPCODE_##u; \
677 else if (native_integers) \
678 op = TGSI_OPCODE_##f; \
680 op = TGSI_OPCODE_##c; \
687 case3(DIV
, IDIV
, UDIV
);
688 case3(MAX
, IMAX
, UMAX
);
689 case3(MIN
, IMIN
, UMIN
);
692 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
693 casecomp(SNE
, FSNE
, USNE
, USNE
);
694 casecomp(SGE
, FSGE
, ISGE
, USGE
);
695 casecomp(SLT
, FSLT
, ISLT
, USLT
);
700 case3(ABS
, IABS
, IABS
);
704 case2iu(IMUL_HI
, UMUL_HI
);
708 assert(op
!= TGSI_OPCODE_LAST
);
712 glsl_to_tgsi_instruction
*
713 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
714 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
717 static const unsigned dot_opcodes
[] = {
718 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
721 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
725 * Emits TGSI scalar opcodes to produce unique answers across channels.
727 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
728 * channel determines the result across all channels. So to do a vec4
729 * of this operation, we want to emit a scalar per source channel used
730 * to produce dest channels.
733 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
735 st_src_reg orig_src0
, st_src_reg orig_src1
)
738 int done_mask
= ~dst
.writemask
;
740 /* TGSI RCP is a scalar operation splatting results to all channels,
741 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
744 for (i
= 0; i
< 4; i
++) {
745 GLuint this_mask
= (1 << i
);
746 glsl_to_tgsi_instruction
*inst
;
747 st_src_reg src0
= orig_src0
;
748 st_src_reg src1
= orig_src1
;
750 if (done_mask
& this_mask
)
753 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
754 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
755 for (j
= i
+ 1; j
< 4; j
++) {
756 /* If there is another enabled component in the destination that is
757 * derived from the same inputs, generate its value on this pass as
760 if (!(done_mask
& (1 << j
)) &&
761 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
762 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
763 this_mask
|= (1 << j
);
766 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
767 src0_swiz
, src0_swiz
);
768 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
769 src1_swiz
, src1_swiz
);
771 inst
= emit(ir
, op
, dst
, src0
, src1
);
772 inst
->dst
.writemask
= this_mask
;
773 done_mask
|= this_mask
;
778 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
779 st_dst_reg dst
, st_src_reg src0
)
781 st_src_reg undef
= undef_src
;
783 undef
.swizzle
= SWIZZLE_XXXX
;
785 emit_scalar(ir
, op
, dst
, src0
, undef
);
789 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
790 st_dst_reg dst
, st_src_reg src0
)
792 int op
= TGSI_OPCODE_ARL
;
794 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
795 op
= TGSI_OPCODE_UARL
;
797 assert(dst
.file
== PROGRAM_ADDRESS
);
798 if (dst
.index
>= this->num_address_regs
)
799 this->num_address_regs
= dst
.index
+ 1;
801 emit(NULL
, op
, dst
, src0
);
805 * Emit an TGSI_OPCODE_SCS instruction
807 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
808 * Instead of splatting its result across all four components of the
809 * destination, it writes one value to the \c x component and another value to
810 * the \c y component.
812 * \param ir IR instruction being processed
813 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
814 * on which value is desired.
815 * \param dst Destination register
816 * \param src Source register
819 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
821 const st_src_reg
&src
)
823 /* Vertex programs cannot use the SCS opcode.
825 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
826 emit_scalar(ir
, op
, dst
, src
);
830 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
831 const unsigned scs_mask
= (1U << component
);
832 int done_mask
= ~dst
.writemask
;
835 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
837 /* If there are compnents in the destination that differ from the component
838 * that will be written by the SCS instrution, we'll need a temporary.
840 if (scs_mask
!= unsigned(dst
.writemask
)) {
841 tmp
= get_temp(glsl_type::vec4_type
);
844 for (unsigned i
= 0; i
< 4; i
++) {
845 unsigned this_mask
= (1U << i
);
846 st_src_reg src0
= src
;
848 if ((done_mask
& this_mask
) != 0)
851 /* The source swizzle specified which component of the source generates
852 * sine / cosine for the current component in the destination. The SCS
853 * instruction requires that this value be swizzle to the X component.
854 * Replace the current swizzle with a swizzle that puts the source in
857 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
859 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
860 src0_swiz
, src0_swiz
);
861 for (unsigned j
= i
+ 1; j
< 4; j
++) {
862 /* If there is another enabled component in the destination that is
863 * derived from the same inputs, generate its value on this pass as
866 if (!(done_mask
& (1 << j
)) &&
867 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
868 this_mask
|= (1 << j
);
872 if (this_mask
!= scs_mask
) {
873 glsl_to_tgsi_instruction
*inst
;
874 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
876 /* Emit the SCS instruction.
878 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
879 inst
->dst
.writemask
= scs_mask
;
881 /* Move the result of the SCS instruction to the desired location in
884 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
885 component
, component
);
886 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
887 inst
->dst
.writemask
= this_mask
;
889 /* Emit the SCS instruction to write directly to the destination.
891 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
892 inst
->dst
.writemask
= scs_mask
;
895 done_mask
|= this_mask
;
900 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
901 gl_constant_value values
[4], int size
, int datatype
,
904 if (file
== PROGRAM_CONSTANT
) {
905 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
906 size
, datatype
, swizzle_out
);
909 immediate_storage
*entry
;
910 assert(file
== PROGRAM_IMMEDIATE
);
912 /* Search immediate storage to see if we already have an identical
913 * immediate that we can use instead of adding a duplicate entry.
915 foreach_in_list(immediate_storage
, entry
, &this->immediates
) {
916 if (entry
->size
== size
&&
917 entry
->type
== datatype
&&
918 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
924 /* Add this immediate to the list. */
925 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
926 this->immediates
.push_tail(entry
);
927 this->num_immediates
++;
933 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
935 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
936 union gl_constant_value uval
;
939 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
945 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
947 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
948 union gl_constant_value uval
;
950 assert(native_integers
);
953 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
959 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
962 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
963 st_src_reg_for_int(val
);
965 return st_src_reg_for_float(val
);
969 type_size(const struct glsl_type
*type
)
974 switch (type
->base_type
) {
977 case GLSL_TYPE_FLOAT
:
979 if (type
->is_matrix()) {
980 return type
->matrix_columns
;
982 /* Regardless of size of vector, it gets a vec4. This is bad
983 * packing for things like floats, but otherwise arrays become a
984 * mess. Hopefully a later pass over the code can pack scalars
985 * down if appropriate.
989 case GLSL_TYPE_ARRAY
:
990 assert(type
->length
> 0);
991 return type_size(type
->fields
.array
) * type
->length
;
992 case GLSL_TYPE_STRUCT
:
994 for (i
= 0; i
< type
->length
; i
++) {
995 size
+= type_size(type
->fields
.structure
[i
].type
);
998 case GLSL_TYPE_SAMPLER
:
999 case GLSL_TYPE_IMAGE
:
1000 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1004 case GLSL_TYPE_ATOMIC_UINT
:
1005 case GLSL_TYPE_INTERFACE
:
1006 case GLSL_TYPE_VOID
:
1007 case GLSL_TYPE_ERROR
:
1008 assert(!"Invalid type in type_size");
1015 * In the initial pass of codegen, we assign temporary numbers to
1016 * intermediate results. (not SSA -- variable assignments will reuse
1020 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1024 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1028 if (!options
->EmitNoIndirectTemp
&&
1029 (type
->is_array() || type
->is_matrix())) {
1031 src
.file
= PROGRAM_ARRAY
;
1032 src
.index
= next_array
<< 16 | 0x8000;
1033 array_sizes
[next_array
] = type_size(type
);
1037 src
.file
= PROGRAM_TEMPORARY
;
1038 src
.index
= next_temp
;
1039 next_temp
+= type_size(type
);
1042 if (type
->is_array() || type
->is_record()) {
1043 src
.swizzle
= SWIZZLE_NOOP
;
1045 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1052 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1055 foreach_in_list(variable_storage
, entry
, &this->variables
) {
1056 if (entry
->var
== var
)
1064 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1066 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1067 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1069 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1070 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1073 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1075 const ir_state_slot
*const slots
= ir
->get_state_slots();
1076 assert(slots
!= NULL
);
1078 /* Check if this statevar's setup in the STATE file exactly
1079 * matches how we'll want to reference it as a
1080 * struct/array/whatever. If not, then we need to move it into
1081 * temporary storage and hope that it'll get copy-propagated
1084 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
1085 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1090 variable_storage
*storage
;
1092 if (i
== ir
->get_num_state_slots()) {
1093 /* We'll set the index later. */
1094 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1095 this->variables
.push_tail(storage
);
1099 /* The variable_storage constructor allocates slots based on the size
1100 * of the type. However, this had better match the number of state
1101 * elements that we're going to copy into the new temporary.
1103 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
1105 dst
= st_dst_reg(get_temp(ir
->type
));
1107 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1109 this->variables
.push_tail(storage
);
1113 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
1114 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1115 (gl_state_index
*)slots
[i
].tokens
);
1117 if (storage
->file
== PROGRAM_STATE_VAR
) {
1118 if (storage
->index
== -1) {
1119 storage
->index
= index
;
1121 assert(index
== storage
->index
+ (int)i
);
1124 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1125 * the data being moved since MOV does not care about the type of
1126 * data it is moving, and we don't want to declare registers with
1127 * array or struct types.
1129 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1130 src
.swizzle
= slots
[i
].swizzle
;
1131 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1132 /* even a float takes up a whole vec4 reg in a struct/array. */
1137 if (storage
->file
== PROGRAM_TEMPORARY
&&
1138 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
1139 fail_link(this->shader_program
,
1140 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1141 ir
->name
, dst
.index
- storage
->index
,
1142 type_size(ir
->type
));
1148 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1150 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1152 visit_exec_list(&ir
->body_instructions
, this);
1154 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1158 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1161 case ir_loop_jump::jump_break
:
1162 emit(NULL
, TGSI_OPCODE_BRK
);
1164 case ir_loop_jump::jump_continue
:
1165 emit(NULL
, TGSI_OPCODE_CONT
);
1172 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1179 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1181 /* Ignore function bodies other than main() -- we shouldn't see calls to
1182 * them since they should all be inlined before we get to glsl_to_tgsi.
1184 if (strcmp(ir
->name
, "main") == 0) {
1185 const ir_function_signature
*sig
;
1188 sig
= ir
->matching_signature(NULL
, &empty
, false);
1192 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
1199 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1201 int nonmul_operand
= 1 - mul_operand
;
1203 st_dst_reg result_dst
;
1205 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1206 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1209 expr
->operands
[0]->accept(this);
1211 expr
->operands
[1]->accept(this);
1213 ir
->operands
[nonmul_operand
]->accept(this);
1216 this->result
= get_temp(ir
->type
);
1217 result_dst
= st_dst_reg(this->result
);
1218 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1219 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1225 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1227 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1228 * implemented using multiplication, and logical-or is implemented using
1229 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1230 * As result, the logical expression (a & !b) can be rewritten as:
1234 * - (a * 1) - (a * b)
1238 * This final expression can be implemented as a single MAD(a, -b, a)
1242 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1244 const int other_operand
= 1 - try_operand
;
1247 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1248 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1251 ir
->operands
[other_operand
]->accept(this);
1253 expr
->operands
[0]->accept(this);
1256 b
.negate
= ~b
.negate
;
1258 this->result
= get_temp(ir
->type
);
1259 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1265 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1266 st_src_reg
*reg
, int *num_reladdr
)
1268 if (!reg
->reladdr
&& !reg
->reladdr2
)
1271 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1272 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1274 if (*num_reladdr
!= 1) {
1275 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1277 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1285 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1287 unsigned int operand
;
1288 st_src_reg op
[Elements(ir
->operands
)];
1289 st_src_reg result_src
;
1290 st_dst_reg result_dst
;
1292 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1294 if (ir
->operation
== ir_binop_add
) {
1295 if (try_emit_mad(ir
, 1))
1297 if (try_emit_mad(ir
, 0))
1301 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1303 if (!native_integers
&& ir
->operation
== ir_binop_logic_and
) {
1304 if (try_emit_mad_for_and_not(ir
, 1))
1306 if (try_emit_mad_for_and_not(ir
, 0))
1310 if (ir
->operation
== ir_quadop_vector
)
1311 assert(!"ir_quadop_vector should have been lowered");
1313 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1314 this->result
.file
= PROGRAM_UNDEFINED
;
1315 ir
->operands
[operand
]->accept(this);
1316 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1317 printf("Failed to get tree for expression operand:\n");
1318 ir
->operands
[operand
]->print();
1322 op
[operand
] = this->result
;
1324 /* Matrix expression operands should have been broken down to vector
1325 * operations already.
1327 assert(!ir
->operands
[operand
]->type
->is_matrix());
1330 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1331 if (ir
->operands
[1]) {
1332 vector_elements
= MAX2(vector_elements
,
1333 ir
->operands
[1]->type
->vector_elements
);
1336 this->result
.file
= PROGRAM_UNDEFINED
;
1338 /* Storage for our result. Ideally for an assignment we'd be using
1339 * the actual storage for the result here, instead.
1341 result_src
= get_temp(ir
->type
);
1342 /* convenience for the emit functions below. */
1343 result_dst
= st_dst_reg(result_src
);
1344 /* Limit writes to the channels that will be used by result_src later.
1345 * This does limit this temp's use as a temporary for multi-instruction
1348 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1350 switch (ir
->operation
) {
1351 case ir_unop_logic_not
:
1352 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1353 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1355 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1356 * older GPUs implement SEQ using multiple instructions (i915 uses two
1357 * SGE instructions and a MUL instruction). Since our logic values are
1358 * 0.0 and 1.0, 1-x also implements !x.
1360 op
[0].negate
= ~op
[0].negate
;
1361 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1365 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1366 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1368 op
[0].negate
= ~op
[0].negate
;
1373 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1376 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1379 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1383 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1387 assert(!"not reached: should be handled by ir_explog_to_explog2");
1390 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1393 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1396 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1398 case ir_unop_sin_reduced
:
1399 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1401 case ir_unop_cos_reduced
:
1402 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1404 case ir_unop_saturate
: {
1405 glsl_to_tgsi_instruction
*inst
;
1406 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, op
[0]);
1407 inst
->saturate
= true;
1412 case ir_unop_dFdx_coarse
:
1413 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1415 case ir_unop_dFdx_fine
:
1416 emit(ir
, TGSI_OPCODE_DDX_FINE
, result_dst
, op
[0]);
1419 case ir_unop_dFdy_coarse
:
1420 case ir_unop_dFdy_fine
:
1422 /* The X component contains 1 or -1 depending on whether the framebuffer
1423 * is a FBO or the window system buffer, respectively.
1424 * It is then multiplied with the source operand of DDY.
1426 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1427 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1429 unsigned transform_y_index
=
1430 _mesa_add_state_reference(this->prog
->Parameters
,
1433 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1435 glsl_type::vec4_type
);
1436 transform_y
.swizzle
= SWIZZLE_XXXX
;
1438 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1440 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1441 emit(ir
, ir
->operation
== ir_unop_dFdy_fine
?
1442 TGSI_OPCODE_DDY_FINE
: TGSI_OPCODE_DDY
, result_dst
, temp
);
1446 case ir_unop_noise
: {
1447 /* At some point, a motivated person could add a better
1448 * implementation of noise. Currently not even the nvidia
1449 * binary drivers do anything more than this. In any case, the
1450 * place to do this is in the GL state tracker, not the poor
1453 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1458 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1461 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1465 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1468 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1469 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1471 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1474 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1475 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1477 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1481 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1483 case ir_binop_greater
:
1484 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1486 case ir_binop_lequal
:
1487 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1489 case ir_binop_gequal
:
1490 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1492 case ir_binop_equal
:
1493 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1495 case ir_binop_nequal
:
1496 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1498 case ir_binop_all_equal
:
1499 /* "==" operator producing a scalar boolean. */
1500 if (ir
->operands
[0]->type
->is_vector() ||
1501 ir
->operands
[1]->type
->is_vector()) {
1502 st_src_reg temp
= get_temp(native_integers
?
1503 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1504 glsl_type::vec4_type
);
1506 if (native_integers
) {
1507 st_dst_reg temp_dst
= st_dst_reg(temp
);
1508 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1510 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1512 /* Emit 1-3 AND operations to combine the SEQ results. */
1513 switch (ir
->operands
[0]->type
->vector_elements
) {
1517 temp_dst
.writemask
= WRITEMASK_Y
;
1518 temp1
.swizzle
= SWIZZLE_YYYY
;
1519 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1520 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1523 temp_dst
.writemask
= WRITEMASK_X
;
1524 temp1
.swizzle
= SWIZZLE_XXXX
;
1525 temp2
.swizzle
= SWIZZLE_YYYY
;
1526 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1527 temp_dst
.writemask
= WRITEMASK_Y
;
1528 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1529 temp2
.swizzle
= SWIZZLE_WWWW
;
1530 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1533 temp1
.swizzle
= SWIZZLE_XXXX
;
1534 temp2
.swizzle
= SWIZZLE_YYYY
;
1535 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1537 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1539 /* After the dot-product, the value will be an integer on the
1540 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1542 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1544 /* Negating the result of the dot-product gives values on the range
1545 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1546 * This is achieved using SGE.
1548 st_src_reg sge_src
= result_src
;
1549 sge_src
.negate
= ~sge_src
.negate
;
1550 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1553 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1556 case ir_binop_any_nequal
:
1557 /* "!=" operator producing a scalar boolean. */
1558 if (ir
->operands
[0]->type
->is_vector() ||
1559 ir
->operands
[1]->type
->is_vector()) {
1560 st_src_reg temp
= get_temp(native_integers
?
1561 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1562 glsl_type::vec4_type
);
1563 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1565 if (native_integers
) {
1566 st_dst_reg temp_dst
= st_dst_reg(temp
);
1567 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1569 /* Emit 1-3 OR operations to combine the SNE results. */
1570 switch (ir
->operands
[0]->type
->vector_elements
) {
1574 temp_dst
.writemask
= WRITEMASK_Y
;
1575 temp1
.swizzle
= SWIZZLE_YYYY
;
1576 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1577 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1580 temp_dst
.writemask
= WRITEMASK_X
;
1581 temp1
.swizzle
= SWIZZLE_XXXX
;
1582 temp2
.swizzle
= SWIZZLE_YYYY
;
1583 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1584 temp_dst
.writemask
= WRITEMASK_Y
;
1585 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1586 temp2
.swizzle
= SWIZZLE_WWWW
;
1587 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1590 temp1
.swizzle
= SWIZZLE_XXXX
;
1591 temp2
.swizzle
= SWIZZLE_YYYY
;
1592 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1594 /* After the dot-product, the value will be an integer on the
1595 * range [0,4]. Zero stays zero, and positive values become 1.0.
1597 glsl_to_tgsi_instruction
*const dp
=
1598 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1599 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1600 /* The clamping to [0,1] can be done for free in the fragment
1601 * shader with a saturate.
1603 dp
->saturate
= true;
1605 /* Negating the result of the dot-product gives values on the range
1606 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1607 * achieved using SLT.
1609 st_src_reg slt_src
= result_src
;
1610 slt_src
.negate
= ~slt_src
.negate
;
1611 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1615 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1620 assert(ir
->operands
[0]->type
->is_vector());
1622 if (native_integers
) {
1623 int dst_swizzle
= 0, op0_swizzle
, i
;
1624 st_src_reg accum
= op
[0];
1626 op0_swizzle
= op
[0].swizzle
;
1627 accum
.swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 0),
1628 GET_SWZ(op0_swizzle
, 0),
1629 GET_SWZ(op0_swizzle
, 0),
1630 GET_SWZ(op0_swizzle
, 0));
1631 for (i
= 0; i
< 4; i
++) {
1632 if (result_dst
.writemask
& (1 << i
)) {
1633 dst_swizzle
= MAKE_SWIZZLE4(i
, i
, i
, i
);
1638 assert(ir
->operands
[0]->type
->is_boolean());
1640 /* OR all the components together, since they should be either 0 or ~0
1642 switch (ir
->operands
[0]->type
->vector_elements
) {
1644 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 3),
1645 GET_SWZ(op0_swizzle
, 3),
1646 GET_SWZ(op0_swizzle
, 3),
1647 GET_SWZ(op0_swizzle
, 3));
1648 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1649 accum
= st_src_reg(result_dst
);
1650 accum
.swizzle
= dst_swizzle
;
1653 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 2),
1654 GET_SWZ(op0_swizzle
, 2),
1655 GET_SWZ(op0_swizzle
, 2),
1656 GET_SWZ(op0_swizzle
, 2));
1657 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1658 accum
= st_src_reg(result_dst
);
1659 accum
.swizzle
= dst_swizzle
;
1662 op
[0].swizzle
= MAKE_SWIZZLE4(GET_SWZ(op0_swizzle
, 1),
1663 GET_SWZ(op0_swizzle
, 1),
1664 GET_SWZ(op0_swizzle
, 1),
1665 GET_SWZ(op0_swizzle
, 1));
1666 emit(ir
, TGSI_OPCODE_OR
, result_dst
, accum
, op
[0]);
1669 assert(!"Unexpected vector size");
1673 /* After the dot-product, the value will be an integer on the
1674 * range [0,4]. Zero stays zero, and positive values become 1.0.
1676 glsl_to_tgsi_instruction
*const dp
=
1677 emit_dp(ir
, result_dst
, op
[0], op
[0],
1678 ir
->operands
[0]->type
->vector_elements
);
1679 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1680 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1681 /* The clamping to [0,1] can be done for free in the fragment
1682 * shader with a saturate.
1684 dp
->saturate
= true;
1685 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1686 /* Negating the result of the dot-product gives values on the range
1687 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1688 * is achieved using SLT.
1690 st_src_reg slt_src
= result_src
;
1691 slt_src
.negate
= ~slt_src
.negate
;
1692 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1695 /* Use SNE 0 if integers are being used as boolean values. */
1696 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1702 case ir_binop_logic_xor
:
1703 if (native_integers
)
1704 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1706 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1709 case ir_binop_logic_or
: {
1710 if (native_integers
) {
1711 /* If integers are used as booleans, we can use an actual "or"
1714 assert(native_integers
);
1715 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1720 glsl_to_tgsi_instruction
*add
=
1721 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1722 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1726 add
->saturate
= true;
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1732 st_src_reg slt_src
= result_src
;
1733 slt_src
.negate
= ~slt_src
.negate
;
1734 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1740 case ir_binop_logic_and
:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1745 if (native_integers
)
1746 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1748 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1752 assert(ir
->operands
[0]->type
->is_vector());
1753 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1754 emit_dp(ir
, result_dst
, op
[0], op
[1],
1755 ir
->operands
[0]->type
->vector_elements
);
1760 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1765 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op
[0].negate
= ~op
[0].negate
;
1768 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1769 op
[0], result_src
, st_src_reg_for_float(0.0));
1773 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1776 if (native_integers
) {
1777 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1780 /* fallthrough to next case otherwise */
1782 if (native_integers
) {
1783 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1786 /* fallthrough to next case otherwise */
1789 /* Converting between signed and unsigned integers is a no-op. */
1793 if (native_integers
) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1798 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1807 if (native_integers
)
1808 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1810 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1813 if (native_integers
)
1814 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1816 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1818 case ir_unop_bitcast_f2i
:
1820 result_src
.type
= GLSL_TYPE_INT
;
1822 case ir_unop_bitcast_f2u
:
1824 result_src
.type
= GLSL_TYPE_UINT
;
1826 case ir_unop_bitcast_i2f
:
1827 case ir_unop_bitcast_u2f
:
1829 result_src
.type
= GLSL_TYPE_FLOAT
;
1832 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1835 if (native_integers
)
1836 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1838 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1841 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1844 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1847 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1849 case ir_unop_round_even
:
1850 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1853 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1857 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1860 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1863 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1866 case ir_unop_bit_not
:
1867 if (native_integers
) {
1868 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1872 if (native_integers
) {
1873 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1876 case ir_binop_lshift
:
1877 if (native_integers
) {
1878 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1881 case ir_binop_rshift
:
1882 if (native_integers
) {
1883 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1886 case ir_binop_bit_and
:
1887 if (native_integers
) {
1888 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1891 case ir_binop_bit_xor
:
1892 if (native_integers
) {
1893 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1896 case ir_binop_bit_or
:
1897 if (native_integers
) {
1898 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1902 assert(!"GLSL 1.30 features unsupported");
1905 case ir_binop_ubo_load
: {
1906 ir_constant
*const_uniform_block
= ir
->operands
[0]->as_constant();
1907 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1908 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1909 unsigned const_block
= const_uniform_block
? const_uniform_block
->value
.u
[0] + 1 : 0;
1910 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1913 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1914 cbuf
.file
= PROGRAM_CONSTANT
;
1916 cbuf
.reladdr
= NULL
;
1919 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1921 if (const_offset_ir
) {
1922 /* Constant index into constant buffer */
1923 cbuf
.reladdr
= NULL
;
1924 cbuf
.index
= const_offset
/ 16;
1927 /* Relative/variable index into constant buffer */
1928 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1],
1929 st_src_reg_for_int(4));
1930 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1931 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1934 if (const_uniform_block
) {
1935 /* Constant constant buffer */
1936 cbuf
.reladdr2
= NULL
;
1937 cbuf
.index2D
= const_block
;
1938 cbuf
.has_index2
= true;
1941 /* Relative/variable constant buffer */
1942 cbuf
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
1944 memcpy(cbuf
.reladdr2
, &op
[0], sizeof(st_src_reg
));
1945 cbuf
.has_index2
= true;
1948 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1949 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1950 const_offset
% 16 / 4,
1951 const_offset
% 16 / 4,
1952 const_offset
% 16 / 4);
1954 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1955 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1957 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1962 /* note: we have to reorder the three args here */
1963 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1966 if (this->ctx
->Const
.NativeIntegers
)
1967 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
1969 op
[0].negate
= ~op
[0].negate
;
1970 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1973 case ir_triop_bitfield_extract
:
1974 emit(ir
, TGSI_OPCODE_IBFE
, result_dst
, op
[0], op
[1], op
[2]);
1976 case ir_quadop_bitfield_insert
:
1977 emit(ir
, TGSI_OPCODE_BFI
, result_dst
, op
[0], op
[1], op
[2], op
[3]);
1979 case ir_unop_bitfield_reverse
:
1980 emit(ir
, TGSI_OPCODE_BREV
, result_dst
, op
[0]);
1982 case ir_unop_bit_count
:
1983 emit(ir
, TGSI_OPCODE_POPC
, result_dst
, op
[0]);
1985 case ir_unop_find_msb
:
1986 emit(ir
, TGSI_OPCODE_IMSB
, result_dst
, op
[0]);
1988 case ir_unop_find_lsb
:
1989 emit(ir
, TGSI_OPCODE_LSB
, result_dst
, op
[0]);
1991 case ir_binop_imul_high
:
1992 emit(ir
, TGSI_OPCODE_IMUL_HI
, result_dst
, op
[0], op
[1]);
1995 /* NOTE: Perhaps there should be a special opcode that enforces fused
1996 * mul-add. Just use MAD for now.
1998 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, op
[0], op
[1], op
[2]);
2000 case ir_unop_interpolate_at_centroid
:
2001 emit(ir
, TGSI_OPCODE_INTERP_CENTROID
, result_dst
, op
[0]);
2003 case ir_binop_interpolate_at_offset
:
2004 emit(ir
, TGSI_OPCODE_INTERP_OFFSET
, result_dst
, op
[0], op
[1]);
2006 case ir_binop_interpolate_at_sample
:
2007 emit(ir
, TGSI_OPCODE_INTERP_SAMPLE
, result_dst
, op
[0], op
[1]);
2009 case ir_unop_pack_snorm_2x16
:
2010 case ir_unop_pack_unorm_2x16
:
2011 case ir_unop_pack_half_2x16
:
2012 case ir_unop_pack_snorm_4x8
:
2013 case ir_unop_pack_unorm_4x8
:
2014 case ir_unop_unpack_snorm_2x16
:
2015 case ir_unop_unpack_unorm_2x16
:
2016 case ir_unop_unpack_half_2x16
:
2017 case ir_unop_unpack_half_2x16_split_x
:
2018 case ir_unop_unpack_half_2x16_split_y
:
2019 case ir_unop_unpack_snorm_4x8
:
2020 case ir_unop_unpack_unorm_4x8
:
2021 case ir_binop_pack_half_2x16_split
:
2024 case ir_quadop_vector
:
2025 case ir_binop_vector_extract
:
2026 case ir_triop_vector_insert
:
2027 case ir_binop_ldexp
:
2028 case ir_binop_carry
:
2029 case ir_binop_borrow
:
2030 /* This operation is not supported, or should have already been handled.
2032 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2036 this->result
= result_src
;
2041 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2047 /* Note that this is only swizzles in expressions, not those on the left
2048 * hand side of an assignment, which do write masking. See ir_assignment
2052 ir
->val
->accept(this);
2054 assert(src
.file
!= PROGRAM_UNDEFINED
);
2056 for (i
= 0; i
< 4; i
++) {
2057 if (i
< ir
->type
->vector_elements
) {
2060 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2063 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2066 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2069 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2073 /* If the type is smaller than a vec4, replicate the last
2076 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2080 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2086 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2088 variable_storage
*entry
= find_variable_storage(ir
->var
);
2089 ir_variable
*var
= ir
->var
;
2092 switch (var
->data
.mode
) {
2093 case ir_var_uniform
:
2094 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2095 var
->data
.location
);
2096 this->variables
.push_tail(entry
);
2098 case ir_var_shader_in
:
2099 /* The linker assigns locations for varyings and attributes,
2100 * including deprecated builtins (like gl_Color), user-assign
2101 * generic attributes (glBindVertexLocation), and
2102 * user-defined varyings.
2104 assert(var
->data
.location
!= -1);
2105 entry
= new(mem_ctx
) variable_storage(var
,
2107 var
->data
.location
);
2109 case ir_var_shader_out
:
2110 assert(var
->data
.location
!= -1);
2111 entry
= new(mem_ctx
) variable_storage(var
,
2116 case ir_var_system_value
:
2117 entry
= new(mem_ctx
) variable_storage(var
,
2118 PROGRAM_SYSTEM_VALUE
,
2119 var
->data
.location
);
2122 case ir_var_temporary
:
2123 st_src_reg src
= get_temp(var
->type
);
2125 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2126 this->variables
.push_tail(entry
);
2132 printf("Failed to make storage for %s\n", var
->name
);
2137 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2138 if (!native_integers
)
2139 this->result
.type
= GLSL_TYPE_FLOAT
;
2143 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2147 int element_size
= type_size(ir
->type
);
2150 index
= ir
->array_index
->constant_expression_value();
2152 ir
->array
->accept(this);
2155 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2156 src
.file
== PROGRAM_INPUT
&&
2157 ir
->array
->ir_type
!= ir_type_dereference_array
;
2164 src
.index2D
= index
->value
.i
[0];
2165 src
.has_index2
= true;
2167 src
.index
+= index
->value
.i
[0] * element_size
;
2169 /* Variable index array dereference. It eats the "vec4" of the
2170 * base of the array and an index that offsets the TGSI register
2173 ir
->array_index
->accept(this);
2175 st_src_reg index_reg
;
2177 if (element_size
== 1) {
2178 index_reg
= this->result
;
2180 index_reg
= get_temp(native_integers
?
2181 glsl_type::int_type
: glsl_type::float_type
);
2183 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2184 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2187 /* If there was already a relative address register involved, add the
2188 * new and the old together to get the new offset.
2190 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2191 st_src_reg accum_reg
= get_temp(native_integers
?
2192 glsl_type::int_type
: glsl_type::float_type
);
2194 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2195 index_reg
, *src
.reladdr
);
2197 index_reg
= accum_reg
;
2201 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2202 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2204 src
.has_index2
= true;
2206 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2207 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2211 /* If the type is smaller than a vec4, replicate the last channel out. */
2212 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2213 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2215 src
.swizzle
= SWIZZLE_NOOP
;
2217 /* Change the register type to the element type of the array. */
2218 src
.type
= ir
->type
->base_type
;
2224 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2227 const glsl_type
*struct_type
= ir
->record
->type
;
2230 ir
->record
->accept(this);
2232 for (i
= 0; i
< struct_type
->length
; i
++) {
2233 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2235 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2238 /* If the type is smaller than a vec4, replicate the last channel out. */
2239 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2240 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2242 this->result
.swizzle
= SWIZZLE_NOOP
;
2244 this->result
.index
+= offset
;
2245 this->result
.type
= ir
->type
->base_type
;
2249 * We want to be careful in assignment setup to hit the actual storage
2250 * instead of potentially using a temporary like we might with the
2251 * ir_dereference handler.
2254 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2256 /* The LHS must be a dereference. If the LHS is a variable indexed array
2257 * access of a vector, it must be separated into a series conditional moves
2258 * before reaching this point (see ir_vec_index_to_cond_assign).
2260 assert(ir
->as_dereference());
2261 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2263 assert(!deref_array
->array
->type
->is_vector());
2266 /* Use the rvalue deref handler for the most part. We'll ignore
2267 * swizzles in it and write swizzles using writemask, though.
2270 return st_dst_reg(v
->result
);
2274 * Process the condition of a conditional assignment
2276 * Examines the condition of a conditional assignment to generate the optimal
2277 * first operand of a \c CMP instruction. If the condition is a relational
2278 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2279 * used as the source for the \c CMP instruction. Otherwise the comparison
2280 * is processed to a boolean result, and the boolean result is used as the
2281 * operand to the CMP instruction.
2284 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2286 ir_rvalue
*src_ir
= ir
;
2288 bool switch_order
= false;
2290 ir_expression
*const expr
= ir
->as_expression();
2291 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2292 bool zero_on_left
= false;
2294 if (expr
->operands
[0]->is_zero()) {
2295 src_ir
= expr
->operands
[1];
2296 zero_on_left
= true;
2297 } else if (expr
->operands
[1]->is_zero()) {
2298 src_ir
= expr
->operands
[0];
2299 zero_on_left
= false;
2303 * (a < 0) T F F ( a < 0) T F F
2304 * (0 < a) F F T (-a < 0) F F T
2305 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2306 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2307 * (a > 0) F F T (-a < 0) F F T
2308 * (0 > a) T F F ( a < 0) T F F
2309 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2310 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2312 * Note that exchanging the order of 0 and 'a' in the comparison simply
2313 * means that the value of 'a' should be negated.
2316 switch (expr
->operation
) {
2318 switch_order
= false;
2319 negate
= zero_on_left
;
2322 case ir_binop_greater
:
2323 switch_order
= false;
2324 negate
= !zero_on_left
;
2327 case ir_binop_lequal
:
2328 switch_order
= true;
2329 negate
= !zero_on_left
;
2332 case ir_binop_gequal
:
2333 switch_order
= true;
2334 negate
= zero_on_left
;
2338 /* This isn't the right kind of comparison afterall, so make sure
2339 * the whole condition is visited.
2347 src_ir
->accept(this);
2349 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2350 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2351 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2352 * computing the condition.
2355 this->result
.negate
= ~this->result
.negate
;
2357 return switch_order
;
2361 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2362 st_dst_reg
*l
, st_src_reg
*r
)
2364 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2365 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2366 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2371 if (type
->is_array()) {
2372 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2373 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2378 if (type
->is_matrix()) {
2379 const struct glsl_type
*vec_type
;
2381 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2382 type
->vector_elements
, 1);
2384 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2385 emit_block_mov(ir
, vec_type
, l
, r
);
2390 assert(type
->is_scalar() || type
->is_vector());
2392 r
->type
= type
->base_type
;
2393 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2399 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2405 ir
->rhs
->accept(this);
2408 l
= get_assignment_lhs(ir
->lhs
, this);
2410 /* FINISHME: This should really set to the correct maximal writemask for each
2411 * FINISHME: component written (in the loops below). This case can only
2412 * FINISHME: occur for matrices, arrays, and structures.
2414 if (ir
->write_mask
== 0) {
2415 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2416 l
.writemask
= WRITEMASK_XYZW
;
2417 } else if (ir
->lhs
->type
->is_scalar() &&
2418 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2419 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2420 * FINISHME: W component of fragment shader output zero, work correctly.
2422 l
.writemask
= WRITEMASK_XYZW
;
2425 int first_enabled_chan
= 0;
2428 l
.writemask
= ir
->write_mask
;
2430 for (int i
= 0; i
< 4; i
++) {
2431 if (l
.writemask
& (1 << i
)) {
2432 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2437 /* Swizzle a small RHS vector into the channels being written.
2439 * glsl ir treats write_mask as dictating how many channels are
2440 * present on the RHS while TGSI treats write_mask as just
2441 * showing which channels of the vec4 RHS get written.
2443 for (int i
= 0; i
< 4; i
++) {
2444 if (l
.writemask
& (1 << i
))
2445 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2447 swizzles
[i
] = first_enabled_chan
;
2449 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2450 swizzles
[2], swizzles
[3]);
2453 assert(l
.file
!= PROGRAM_UNDEFINED
);
2454 assert(r
.file
!= PROGRAM_UNDEFINED
);
2456 if (ir
->condition
) {
2457 const bool switch_order
= this->process_move_condition(ir
->condition
);
2458 st_src_reg condition
= this->result
;
2460 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2461 st_src_reg l_src
= st_src_reg(l
);
2462 st_src_reg condition_temp
= condition
;
2463 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2465 if (native_integers
) {
2466 /* This is necessary because TGSI's CMP instruction expects the
2467 * condition to be a float, and we store booleans as integers.
2468 * TODO: really want to avoid i2f path and use UCMP. Requires
2469 * changes to process_move_condition though too.
2471 condition_temp
= get_temp(glsl_type::vec4_type
);
2472 condition
.negate
= 0;
2473 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2474 condition_temp
.swizzle
= condition
.swizzle
;
2478 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2480 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2486 } else if (ir
->rhs
->as_expression() &&
2487 this->instructions
.get_tail() &&
2488 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2489 type_size(ir
->lhs
->type
) == 1 &&
2490 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2491 /* To avoid emitting an extra MOV when assigning an expression to a
2492 * variable, emit the last instruction of the expression again, but
2493 * replace the destination register with the target of the assignment.
2494 * Dead code elimination will remove the original instruction.
2496 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2497 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2498 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2499 new_inst
->saturate
= inst
->saturate
;
2500 inst
->dead_mask
= inst
->dst
.writemask
;
2502 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2508 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2511 GLfloat stack_vals
[4] = { 0 };
2512 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2513 GLenum gl_type
= GL_NONE
;
2515 static int in_array
= 0;
2516 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2518 /* Unfortunately, 4 floats is all we can get into
2519 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2520 * aggregate constant and move each constant value into it. If we
2521 * get lucky, copy propagation will eliminate the extra moves.
2523 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2524 st_src_reg temp_base
= get_temp(ir
->type
);
2525 st_dst_reg temp
= st_dst_reg(temp_base
);
2527 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
2528 int size
= type_size(field_value
->type
);
2532 field_value
->accept(this);
2535 for (i
= 0; i
< (unsigned int)size
; i
++) {
2536 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2542 this->result
= temp_base
;
2546 if (ir
->type
->is_array()) {
2547 st_src_reg temp_base
= get_temp(ir
->type
);
2548 st_dst_reg temp
= st_dst_reg(temp_base
);
2549 int size
= type_size(ir
->type
->fields
.array
);
2554 for (i
= 0; i
< ir
->type
->length
; i
++) {
2555 ir
->array_elements
[i
]->accept(this);
2557 for (int j
= 0; j
< size
; j
++) {
2558 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2564 this->result
= temp_base
;
2569 if (ir
->type
->is_matrix()) {
2570 st_src_reg mat
= get_temp(ir
->type
);
2571 st_dst_reg mat_column
= st_dst_reg(mat
);
2573 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2574 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2575 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2577 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2578 src
.index
= add_constant(file
,
2580 ir
->type
->vector_elements
,
2583 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2592 switch (ir
->type
->base_type
) {
2593 case GLSL_TYPE_FLOAT
:
2595 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2596 values
[i
].f
= ir
->value
.f
[i
];
2599 case GLSL_TYPE_UINT
:
2600 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2601 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2602 if (native_integers
)
2603 values
[i
].u
= ir
->value
.u
[i
];
2605 values
[i
].f
= ir
->value
.u
[i
];
2609 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2610 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2611 if (native_integers
)
2612 values
[i
].i
= ir
->value
.i
[i
];
2614 values
[i
].f
= ir
->value
.i
[i
];
2617 case GLSL_TYPE_BOOL
:
2618 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2619 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2620 values
[i
].u
= ir
->value
.b
[i
] ? ctx
->Const
.UniformBooleanTrue
: 0;
2624 assert(!"Non-float/uint/int/bool constant");
2627 this->result
= st_src_reg(file
, -1, ir
->type
);
2628 this->result
.index
= add_constant(file
,
2630 ir
->type
->vector_elements
,
2632 &this->result
.swizzle
);
2636 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2638 foreach_in_list_use_after(function_entry
, entry
, &this->function_signatures
) {
2639 if (entry
->sig
== sig
)
2643 entry
= ralloc(mem_ctx
, function_entry
);
2645 entry
->sig_id
= this->next_signature_id
++;
2646 entry
->bgn_inst
= NULL
;
2648 /* Allocate storage for all the parameters. */
2649 foreach_in_list(ir_variable
, param
, &sig
->parameters
) {
2650 variable_storage
*storage
;
2652 storage
= find_variable_storage(param
);
2655 st_src_reg src
= get_temp(param
->type
);
2657 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2658 this->variables
.push_tail(storage
);
2661 if (!sig
->return_type
->is_void()) {
2662 entry
->return_reg
= get_temp(sig
->return_type
);
2664 entry
->return_reg
= undef_src
;
2667 this->function_signatures
.push_tail(entry
);
2672 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2674 glsl_to_tgsi_instruction
*call_inst
;
2675 ir_function_signature
*sig
= ir
->callee
;
2676 function_entry
*entry
= get_function_signature(sig
);
2679 /* Process in parameters. */
2680 foreach_two_lists(formal_node
, &sig
->parameters
,
2681 actual_node
, &ir
->actual_parameters
) {
2682 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2683 ir_variable
*param
= (ir_variable
*) formal_node
;
2685 if (param
->data
.mode
== ir_var_function_in
||
2686 param
->data
.mode
== ir_var_function_inout
) {
2687 variable_storage
*storage
= find_variable_storage(param
);
2690 param_rval
->accept(this);
2691 st_src_reg r
= this->result
;
2694 l
.file
= storage
->file
;
2695 l
.index
= storage
->index
;
2697 l
.writemask
= WRITEMASK_XYZW
;
2698 l
.cond_mask
= COND_TR
;
2700 for (i
= 0; i
< type_size(param
->type
); i
++) {
2701 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2708 /* Emit call instruction */
2709 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2710 call_inst
->function
= entry
;
2712 /* Process out parameters. */
2713 foreach_two_lists(formal_node
, &sig
->parameters
,
2714 actual_node
, &ir
->actual_parameters
) {
2715 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2716 ir_variable
*param
= (ir_variable
*) formal_node
;
2718 if (param
->data
.mode
== ir_var_function_out
||
2719 param
->data
.mode
== ir_var_function_inout
) {
2720 variable_storage
*storage
= find_variable_storage(param
);
2724 r
.file
= storage
->file
;
2725 r
.index
= storage
->index
;
2727 r
.swizzle
= SWIZZLE_NOOP
;
2730 param_rval
->accept(this);
2731 st_dst_reg l
= st_dst_reg(this->result
);
2733 for (i
= 0; i
< type_size(param
->type
); i
++) {
2734 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2741 /* Process return value. */
2742 this->result
= entry
->return_reg
;
2746 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2748 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
;
2749 st_src_reg offset
[MAX_GLSL_TEXTURE_OFFSET
], sample_index
, component
;
2750 st_src_reg levels_src
;
2751 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2752 glsl_to_tgsi_instruction
*inst
= NULL
;
2753 unsigned opcode
= TGSI_OPCODE_NOP
;
2754 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2755 ir_rvalue
*sampler_index
=
2756 _mesa_get_sampler_array_nonconst_index(ir
->sampler
);
2757 bool is_cube_array
= false;
2760 /* if we are a cube array sampler */
2761 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2762 sampler_type
->sampler_array
)) {
2763 is_cube_array
= true;
2766 if (ir
->coordinate
) {
2767 ir
->coordinate
->accept(this);
2769 /* Put our coords in a temp. We'll need to modify them for shadow,
2770 * projection, or LOD, so the only case we'd use it as is is if
2771 * we're doing plain old texturing. The optimization passes on
2772 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2774 coord
= get_temp(glsl_type::vec4_type
);
2775 coord_dst
= st_dst_reg(coord
);
2776 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2777 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2780 if (ir
->projector
) {
2781 ir
->projector
->accept(this);
2782 projector
= this->result
;
2785 /* Storage for our result. Ideally for an assignment we'd be using
2786 * the actual storage for the result here, instead.
2788 result_src
= get_temp(ir
->type
);
2789 result_dst
= st_dst_reg(result_src
);
2793 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2795 ir
->offset
->accept(this);
2796 offset
[0] = this->result
;
2800 if (is_cube_array
||
2801 sampler_type
== glsl_type::samplerCubeShadow_type
) {
2802 opcode
= TGSI_OPCODE_TXB2
;
2805 opcode
= TGSI_OPCODE_TXB
;
2807 ir
->lod_info
.bias
->accept(this);
2808 lod_info
= this->result
;
2810 ir
->offset
->accept(this);
2811 offset
[0] = this->result
;
2815 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2816 ir
->lod_info
.lod
->accept(this);
2817 lod_info
= this->result
;
2819 ir
->offset
->accept(this);
2820 offset
[0] = this->result
;
2824 opcode
= TGSI_OPCODE_TXD
;
2825 ir
->lod_info
.grad
.dPdx
->accept(this);
2827 ir
->lod_info
.grad
.dPdy
->accept(this);
2830 ir
->offset
->accept(this);
2831 offset
[0] = this->result
;
2835 opcode
= TGSI_OPCODE_TXQ
;
2836 ir
->lod_info
.lod
->accept(this);
2837 lod_info
= this->result
;
2839 case ir_query_levels
:
2840 opcode
= TGSI_OPCODE_TXQ
;
2841 lod_info
= st_src_reg(PROGRAM_IMMEDIATE
, 0, GLSL_TYPE_INT
);
2842 levels_src
= get_temp(ir
->type
);
2845 opcode
= TGSI_OPCODE_TXF
;
2846 ir
->lod_info
.lod
->accept(this);
2847 lod_info
= this->result
;
2849 ir
->offset
->accept(this);
2850 offset
[0] = this->result
;
2854 opcode
= TGSI_OPCODE_TXF
;
2855 ir
->lod_info
.sample_index
->accept(this);
2856 sample_index
= this->result
;
2859 opcode
= TGSI_OPCODE_TG4
;
2860 ir
->lod_info
.component
->accept(this);
2861 component
= this->result
;
2863 ir
->offset
->accept(this);
2864 if (ir
->offset
->type
->base_type
== GLSL_TYPE_ARRAY
) {
2865 const glsl_type
*elt_type
= ir
->offset
->type
->fields
.array
;
2866 for (i
= 0; i
< ir
->offset
->type
->length
; i
++) {
2867 offset
[i
] = this->result
;
2868 offset
[i
].index
+= i
* type_size(elt_type
);
2869 offset
[i
].type
= elt_type
->base_type
;
2870 offset
[i
].swizzle
= swizzle_for_size(elt_type
->vector_elements
);
2873 offset
[0] = this->result
;
2878 opcode
= TGSI_OPCODE_LODQ
;
2882 if (ir
->projector
) {
2883 if (opcode
== TGSI_OPCODE_TEX
) {
2884 /* Slot the projector in as the last component of the coord. */
2885 coord_dst
.writemask
= WRITEMASK_W
;
2886 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2887 coord_dst
.writemask
= WRITEMASK_XYZW
;
2888 opcode
= TGSI_OPCODE_TXP
;
2890 st_src_reg coord_w
= coord
;
2891 coord_w
.swizzle
= SWIZZLE_WWWW
;
2893 /* For the other TEX opcodes there's no projective version
2894 * since the last slot is taken up by LOD info. Do the
2895 * projective divide now.
2897 coord_dst
.writemask
= WRITEMASK_W
;
2898 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2900 /* In the case where we have to project the coordinates "by hand,"
2901 * the shadow comparator value must also be projected.
2903 st_src_reg tmp_src
= coord
;
2904 if (ir
->shadow_comparitor
) {
2905 /* Slot the shadow value in as the second to last component of the
2908 ir
->shadow_comparitor
->accept(this);
2910 tmp_src
= get_temp(glsl_type::vec4_type
);
2911 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2913 /* Projective division not allowed for array samplers. */
2914 assert(!sampler_type
->sampler_array
);
2916 tmp_dst
.writemask
= WRITEMASK_Z
;
2917 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2919 tmp_dst
.writemask
= WRITEMASK_XY
;
2920 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2923 coord_dst
.writemask
= WRITEMASK_XYZ
;
2924 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2926 coord_dst
.writemask
= WRITEMASK_XYZW
;
2927 coord
.swizzle
= SWIZZLE_XYZW
;
2931 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2932 * comparator was put in the correct place (and projected) by the code,
2933 * above, that handles by-hand projection.
2935 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2936 /* Slot the shadow value in as the second to last component of the
2939 ir
->shadow_comparitor
->accept(this);
2941 if (is_cube_array
) {
2942 cube_sc
= get_temp(glsl_type::float_type
);
2943 cube_sc_dst
= st_dst_reg(cube_sc
);
2944 cube_sc_dst
.writemask
= WRITEMASK_X
;
2945 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2946 cube_sc_dst
.writemask
= WRITEMASK_X
;
2949 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2950 sampler_type
->sampler_array
) ||
2951 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2952 coord_dst
.writemask
= WRITEMASK_W
;
2954 coord_dst
.writemask
= WRITEMASK_Z
;
2957 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2958 coord_dst
.writemask
= WRITEMASK_XYZW
;
2962 if (ir
->op
== ir_txf_ms
) {
2963 coord_dst
.writemask
= WRITEMASK_W
;
2964 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2965 coord_dst
.writemask
= WRITEMASK_XYZW
;
2966 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2967 opcode
== TGSI_OPCODE_TXF
) {
2968 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2969 coord_dst
.writemask
= WRITEMASK_W
;
2970 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2971 coord_dst
.writemask
= WRITEMASK_XYZW
;
2974 if (sampler_index
) {
2975 sampler_index
->accept(this);
2976 emit_arl(ir
, sampler_reladdr
, this->result
);
2979 if (opcode
== TGSI_OPCODE_TXD
)
2980 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2981 else if (opcode
== TGSI_OPCODE_TXQ
) {
2982 if (ir
->op
== ir_query_levels
) {
2983 /* the level is stored in W */
2984 inst
= emit(ir
, opcode
, st_dst_reg(levels_src
), lod_info
);
2985 result_dst
.writemask
= WRITEMASK_X
;
2986 levels_src
.swizzle
= SWIZZLE_WWWW
;
2987 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, levels_src
);
2989 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2990 } else if (opcode
== TGSI_OPCODE_TXF
) {
2991 inst
= emit(ir
, opcode
, result_dst
, coord
);
2992 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2993 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2994 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2995 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2996 } else if (opcode
== TGSI_OPCODE_TG4
) {
2997 if (is_cube_array
&& ir
->shadow_comparitor
) {
2998 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
3000 inst
= emit(ir
, opcode
, result_dst
, coord
, component
);
3003 inst
= emit(ir
, opcode
, result_dst
, coord
);
3005 if (ir
->shadow_comparitor
)
3006 inst
->tex_shadow
= GL_TRUE
;
3008 inst
->sampler
.index
= _mesa_get_sampler_uniform_value(ir
->sampler
,
3009 this->shader_program
,
3011 if (sampler_index
) {
3012 inst
->sampler
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
3013 memcpy(inst
->sampler
.reladdr
, &sampler_reladdr
, sizeof(sampler_reladdr
));
3014 inst
->sampler_array_size
=
3015 ir
->sampler
->as_dereference_array()->array
->type
->array_size();
3017 inst
->sampler_array_size
= 1;
3021 for (i
= 0; i
< MAX_GLSL_TEXTURE_OFFSET
&& offset
[i
].file
!= PROGRAM_UNDEFINED
; i
++)
3022 inst
->tex_offsets
[i
] = offset
[i
];
3023 inst
->tex_offset_num_offset
= i
;
3026 switch (sampler_type
->sampler_dimensionality
) {
3027 case GLSL_SAMPLER_DIM_1D
:
3028 inst
->tex_target
= (sampler_type
->sampler_array
)
3029 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
3031 case GLSL_SAMPLER_DIM_2D
:
3032 inst
->tex_target
= (sampler_type
->sampler_array
)
3033 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
3035 case GLSL_SAMPLER_DIM_3D
:
3036 inst
->tex_target
= TEXTURE_3D_INDEX
;
3038 case GLSL_SAMPLER_DIM_CUBE
:
3039 inst
->tex_target
= (sampler_type
->sampler_array
)
3040 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
3042 case GLSL_SAMPLER_DIM_RECT
:
3043 inst
->tex_target
= TEXTURE_RECT_INDEX
;
3045 case GLSL_SAMPLER_DIM_BUF
:
3046 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
3048 case GLSL_SAMPLER_DIM_EXTERNAL
:
3049 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
3051 case GLSL_SAMPLER_DIM_MS
:
3052 inst
->tex_target
= (sampler_type
->sampler_array
)
3053 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
3056 assert(!"Should not get here.");
3059 this->result
= result_src
;
3063 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
3065 if (ir
->get_value()) {
3069 assert(current_function
);
3071 ir
->get_value()->accept(this);
3072 st_src_reg r
= this->result
;
3074 l
= st_dst_reg(current_function
->return_reg
);
3076 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
3077 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
3083 emit(ir
, TGSI_OPCODE_RET
);
3087 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
3089 if (ir
->condition
) {
3090 ir
->condition
->accept(this);
3091 st_src_reg condition
= this->result
;
3093 /* Convert the bool condition to a float so we can negate. */
3094 if (native_integers
) {
3095 st_src_reg temp
= get_temp(ir
->condition
->type
);
3096 emit(ir
, TGSI_OPCODE_AND
, st_dst_reg(temp
),
3097 condition
, st_src_reg_for_float(1.0));
3101 condition
.negate
= ~condition
.negate
;
3102 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, condition
);
3104 /* unconditional kil */
3105 emit(ir
, TGSI_OPCODE_KILL
);
3110 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3113 glsl_to_tgsi_instruction
*if_inst
;
3115 ir
->condition
->accept(this);
3116 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3118 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3120 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3122 this->instructions
.push_tail(if_inst
);
3124 visit_exec_list(&ir
->then_instructions
, this);
3126 if (!ir
->else_instructions
.is_empty()) {
3127 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3128 visit_exec_list(&ir
->else_instructions
, this);
3131 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3136 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3138 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3140 ir
->stream
->accept(this);
3141 emit(ir
, TGSI_OPCODE_EMIT
, undef_dst
, this->result
);
3145 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3147 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3149 ir
->stream
->accept(this);
3150 emit(ir
, TGSI_OPCODE_ENDPRIM
, undef_dst
, this->result
);
3153 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3155 result
.file
= PROGRAM_UNDEFINED
;
3158 next_signature_id
= 1;
3160 current_function
= NULL
;
3161 num_address_regs
= 0;
3163 indirect_addr_consts
= false;
3165 native_integers
= false;
3166 mem_ctx
= ralloc_context(NULL
);
3169 shader_program
= NULL
;
3175 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3177 ralloc_free(mem_ctx
);
3180 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3187 * Count resources used by the given gpu program (number of texture
3191 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3193 v
->samplers_used
= 0;
3195 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &v
->instructions
) {
3196 if (is_tex_instruction(inst
->op
)) {
3197 for (int i
= 0; i
< inst
->sampler_array_size
; i
++) {
3198 v
->samplers_used
|= 1 << (inst
->sampler
.index
+ i
);
3200 if (inst
->tex_shadow
) {
3201 prog
->ShadowSamplers
|= 1 << (inst
->sampler
.index
+ i
);
3207 prog
->SamplersUsed
= v
->samplers_used
;
3209 if (v
->shader_program
!= NULL
)
3210 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3214 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3215 * are read from the given src in this instruction
3218 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3220 int read_mask
= 0, comp
;
3222 /* Now, given the src swizzle and the written channels, find which
3223 * components are actually read
3225 for (comp
= 0; comp
< 4; ++comp
) {
3226 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3228 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3229 read_mask
|= 1 << coord
;
3236 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3237 * instruction is the first instruction to write to register T0. There are
3238 * several lowering passes done in GLSL IR (e.g. branches and
3239 * relative addressing) that create a large number of conditional assignments
3240 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3242 * Here is why this conversion is safe:
3243 * CMP T0, T1 T2 T0 can be expanded to:
3249 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3250 * as the original program. If (T1 < 0.0) evaluates to false, executing
3251 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3252 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3253 * because any instruction that was going to read from T0 after this was going
3254 * to read a garbage value anyway.
3257 glsl_to_tgsi_visitor::simplify_cmp(void)
3259 int tempWritesSize
= 0;
3260 unsigned *tempWrites
= NULL
;
3261 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3263 memset(outputWrites
, 0, sizeof(outputWrites
));
3265 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3266 unsigned prevWriteMask
= 0;
3268 /* Give up if we encounter relative addressing or flow control. */
3269 if (inst
->dst
.reladdr
||
3270 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3271 inst
->op
== TGSI_OPCODE_BGNSUB
||
3272 inst
->op
== TGSI_OPCODE_CONT
||
3273 inst
->op
== TGSI_OPCODE_END
||
3274 inst
->op
== TGSI_OPCODE_ENDSUB
||
3275 inst
->op
== TGSI_OPCODE_RET
) {
3279 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3280 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3281 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3282 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3283 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3284 if (inst
->dst
.index
>= tempWritesSize
) {
3285 const int inc
= 4096;
3287 tempWrites
= (unsigned*)
3289 (tempWritesSize
+ inc
) * sizeof(unsigned));
3293 memset(tempWrites
+ tempWritesSize
, 0, inc
* sizeof(unsigned));
3294 tempWritesSize
+= inc
;
3297 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3298 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3302 /* For a CMP to be considered a conditional write, the destination
3303 * register and source register two must be the same. */
3304 if (inst
->op
== TGSI_OPCODE_CMP
3305 && !(inst
->dst
.writemask
& prevWriteMask
)
3306 && inst
->src
[2].file
== inst
->dst
.file
3307 && inst
->src
[2].index
== inst
->dst
.index
3308 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3310 inst
->op
= TGSI_OPCODE_MOV
;
3311 inst
->src
[0] = inst
->src
[1];
3318 /* Replaces all references to a temporary register index with another index. */
3320 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3322 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3325 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3326 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3327 inst
->src
[j
].index
== index
) {
3328 inst
->src
[j
].index
= new_index
;
3332 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3333 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3334 inst
->tex_offsets
[j
].index
== index
) {
3335 inst
->tex_offsets
[j
].index
= new_index
;
3339 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3340 inst
->dst
.index
= new_index
;
3346 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3348 int depth
= 0; /* loop depth */
3349 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3352 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3353 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3354 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3355 inst
->src
[j
].index
== index
) {
3356 return (depth
== 0) ? i
: loop_start
;
3359 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3360 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3361 inst
->tex_offsets
[j
].index
== index
) {
3362 return (depth
== 0) ? i
: loop_start
;
3366 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3369 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3382 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3384 int depth
= 0; /* loop depth */
3385 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3388 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3389 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3390 return (depth
== 0) ? i
: loop_start
;
3393 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3396 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3409 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3411 int depth
= 0; /* loop depth */
3412 int last
= -1; /* index of last instruction that reads the temporary */
3415 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3416 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3417 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3418 inst
->src
[j
].index
== index
) {
3419 last
= (depth
== 0) ? i
: -2;
3422 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3423 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3424 inst
->tex_offsets
[j
].index
== index
)
3425 last
= (depth
== 0) ? i
: -2;
3428 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3430 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3431 if (--depth
== 0 && last
== -2)
3443 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3445 int depth
= 0; /* loop depth */
3446 int last
= -1; /* index of last instruction that writes to the temporary */
3449 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3450 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3451 last
= (depth
== 0) ? i
: -2;
3453 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3455 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3456 if (--depth
== 0 && last
== -2)
3468 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3469 * channels for copy propagation and updates following instructions to
3470 * use the original versions.
3472 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3473 * will occur. As an example, a TXP production before this pass:
3475 * 0: MOV TEMP[1], INPUT[4].xyyy;
3476 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3477 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3481 * 0: MOV TEMP[1], INPUT[4].xyyy;
3482 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3483 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3485 * which allows for dead code elimination on TEMP[1]'s writes.
3488 glsl_to_tgsi_visitor::copy_propagate(void)
3490 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3491 glsl_to_tgsi_instruction
*,
3492 this->next_temp
* 4);
3493 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3496 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3497 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3498 || inst
->dst
.index
< this->next_temp
);
3500 /* First, do any copy propagation possible into the src regs. */
3501 for (int r
= 0; r
< 3; r
++) {
3502 glsl_to_tgsi_instruction
*first
= NULL
;
3504 int acp_base
= inst
->src
[r
].index
* 4;
3506 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3507 inst
->src
[r
].reladdr
||
3508 inst
->src
[r
].reladdr2
)
3511 /* See if we can find entries in the ACP consisting of MOVs
3512 * from the same src register for all the swizzled channels
3513 * of this src register reference.
3515 for (int i
= 0; i
< 4; i
++) {
3516 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3517 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3524 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3529 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3530 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3538 /* We've now validated that we can copy-propagate to
3539 * replace this src register reference. Do it.
3541 inst
->src
[r
].file
= first
->src
[0].file
;
3542 inst
->src
[r
].index
= first
->src
[0].index
;
3543 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3544 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3547 for (int i
= 0; i
< 4; i
++) {
3548 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3549 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3550 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3553 inst
->src
[r
].swizzle
= swizzle
;
3558 case TGSI_OPCODE_BGNLOOP
:
3559 case TGSI_OPCODE_ENDLOOP
:
3560 /* End of a basic block, clear the ACP entirely. */
3561 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3564 case TGSI_OPCODE_IF
:
3565 case TGSI_OPCODE_UIF
:
3569 case TGSI_OPCODE_ENDIF
:
3570 case TGSI_OPCODE_ELSE
:
3571 /* Clear all channels written inside the block from the ACP, but
3572 * leaving those that were not touched.
3574 for (int r
= 0; r
< this->next_temp
; r
++) {
3575 for (int c
= 0; c
< 4; c
++) {
3576 if (!acp
[4 * r
+ c
])
3579 if (acp_level
[4 * r
+ c
] >= level
)
3580 acp
[4 * r
+ c
] = NULL
;
3583 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3588 /* Continuing the block, clear any written channels from
3591 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3592 /* Any temporary might be written, so no copy propagation
3593 * across this instruction.
3595 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3596 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3597 inst
->dst
.reladdr
) {
3598 /* Any output might be written, so no copy propagation
3599 * from outputs across this instruction.
3601 for (int r
= 0; r
< this->next_temp
; r
++) {
3602 for (int c
= 0; c
< 4; c
++) {
3603 if (!acp
[4 * r
+ c
])
3606 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3607 acp
[4 * r
+ c
] = NULL
;
3610 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3611 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3612 /* Clear where it's used as dst. */
3613 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3614 for (int c
= 0; c
< 4; c
++) {
3615 if (inst
->dst
.writemask
& (1 << c
)) {
3616 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3621 /* Clear where it's used as src. */
3622 for (int r
= 0; r
< this->next_temp
; r
++) {
3623 for (int c
= 0; c
< 4; c
++) {
3624 if (!acp
[4 * r
+ c
])
3627 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3629 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3630 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3631 inst
->dst
.writemask
& (1 << src_chan
))
3633 acp
[4 * r
+ c
] = NULL
;
3641 /* If this is a copy, add it to the ACP. */
3642 if (inst
->op
== TGSI_OPCODE_MOV
&&
3643 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3644 !(inst
->dst
.file
== inst
->src
[0].file
&&
3645 inst
->dst
.index
== inst
->src
[0].index
) &&
3646 !inst
->dst
.reladdr
&&
3648 !inst
->src
[0].reladdr
&&
3649 !inst
->src
[0].reladdr2
&&
3650 !inst
->src
[0].negate
) {
3651 for (int i
= 0; i
< 4; i
++) {
3652 if (inst
->dst
.writemask
& (1 << i
)) {
3653 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3654 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3660 ralloc_free(acp_level
);
3665 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3668 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3669 * will occur. As an example, a TXP production after copy propagation but
3672 * 0: MOV TEMP[1], INPUT[4].xyyy;
3673 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3674 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3676 * and after this pass:
3678 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3681 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3683 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3684 glsl_to_tgsi_instruction
*,
3685 this->next_temp
* 4);
3686 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3690 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3691 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3692 || inst
->dst
.index
< this->next_temp
);
3695 case TGSI_OPCODE_BGNLOOP
:
3696 case TGSI_OPCODE_ENDLOOP
:
3697 case TGSI_OPCODE_CONT
:
3698 case TGSI_OPCODE_BRK
:
3699 /* End of a basic block, clear the write array entirely.
3701 * This keeps us from killing dead code when the writes are
3702 * on either side of a loop, even when the register isn't touched
3703 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3704 * dead code of this type, so it shouldn't make a difference as long as
3705 * the dead code elimination pass in the GLSL compiler does its job.
3707 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3710 case TGSI_OPCODE_ENDIF
:
3711 case TGSI_OPCODE_ELSE
:
3712 /* Promote the recorded level of all channels written inside the
3713 * preceding if or else block to the level above the if/else block.
3715 for (int r
= 0; r
< this->next_temp
; r
++) {
3716 for (int c
= 0; c
< 4; c
++) {
3717 if (!writes
[4 * r
+ c
])
3720 if (write_level
[4 * r
+ c
] == level
)
3721 write_level
[4 * r
+ c
] = level
-1;
3725 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3730 case TGSI_OPCODE_IF
:
3731 case TGSI_OPCODE_UIF
:
3733 /* fallthrough to default case to mark the condition as read */
3736 /* Continuing the block, clear any channels from the write array that
3737 * are read by this instruction.
3739 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3740 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3741 /* Any temporary might be read, so no dead code elimination
3742 * across this instruction.
3744 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3745 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3746 /* Clear where it's used as src. */
3747 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3748 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3749 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3750 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3752 for (int c
= 0; c
< 4; c
++) {
3753 if (src_chans
& (1 << c
)) {
3754 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3759 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
3760 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
3761 /* Any temporary might be read, so no dead code elimination
3762 * across this instruction.
3764 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3765 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
3766 /* Clear where it's used as src. */
3767 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
3768 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
3769 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
3770 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
3772 for (int c
= 0; c
< 4; c
++) {
3773 if (src_chans
& (1 << c
)) {
3774 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
3782 /* If this instruction writes to a temporary, add it to the write array.
3783 * If there is already an instruction in the write array for one or more
3784 * of the channels, flag that channel write as dead.
3786 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3787 !inst
->dst
.reladdr
&&
3789 for (int c
= 0; c
< 4; c
++) {
3790 if (inst
->dst
.writemask
& (1 << c
)) {
3791 if (writes
[4 * inst
->dst
.index
+ c
]) {
3792 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3795 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3797 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3798 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3804 /* Anything still in the write array at this point is dead code. */
3805 for (int r
= 0; r
< this->next_temp
; r
++) {
3806 for (int c
= 0; c
< 4; c
++) {
3807 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3809 inst
->dead_mask
|= (1 << c
);
3813 /* Now actually remove the instructions that are completely dead and update
3814 * the writemask of other instructions with dead channels.
3816 foreach_in_list_safe(glsl_to_tgsi_instruction
, inst
, &this->instructions
) {
3817 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3819 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3824 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3827 ralloc_free(write_level
);
3828 ralloc_free(writes
);
3833 /* Merges temporary registers together where possible to reduce the number of
3834 * registers needed to run a program.
3836 * Produces optimal code only after copy propagation and dead code elimination
3839 glsl_to_tgsi_visitor::merge_registers(void)
3841 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3842 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3845 /* Read the indices of the last read and first write to each temp register
3846 * into an array so that we don't have to traverse the instruction list as
3848 for (i
=0; i
< this->next_temp
; i
++) {
3849 last_reads
[i
] = get_last_temp_read(i
);
3850 first_writes
[i
] = get_first_temp_write(i
);
3853 /* Start looking for registers with non-overlapping usages that can be
3854 * merged together. */
3855 for (i
=0; i
< this->next_temp
; i
++) {
3856 /* Don't touch unused registers. */
3857 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3859 for (j
=0; j
< this->next_temp
; j
++) {
3860 /* Don't touch unused registers. */
3861 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3863 /* We can merge the two registers if the first write to j is after or
3864 * in the same instruction as the last read from i. Note that the
3865 * register at index i will always be used earlier or at the same time
3866 * as the register at index j. */
3867 if (first_writes
[i
] <= first_writes
[j
] &&
3868 last_reads
[i
] <= first_writes
[j
])
3870 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3872 /* Update the first_writes and last_reads arrays with the new
3873 * values for the merged register index, and mark the newly unused
3874 * register index as such. */
3875 last_reads
[i
] = last_reads
[j
];
3876 first_writes
[j
] = -1;
3882 ralloc_free(last_reads
);
3883 ralloc_free(first_writes
);
3886 /* Reassign indices to temporary registers by reusing unused indices created
3887 * by optimization passes. */
3889 glsl_to_tgsi_visitor::renumber_registers(void)
3894 for (i
=0; i
< this->next_temp
; i
++) {
3895 if (get_first_temp_read(i
) < 0) continue;
3897 rename_temp_register(i
, new_index
);
3901 this->next_temp
= new_index
;
3905 * Returns a fragment program which implements the current pixel transfer ops.
3906 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3909 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3910 glsl_to_tgsi_visitor
*original
,
3911 int scale_and_bias
, int pixel_maps
)
3913 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3914 struct st_context
*st
= st_context(original
->ctx
);
3915 struct gl_program
*prog
= &fp
->Base
.Base
;
3916 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3917 st_src_reg coord
, src0
;
3919 glsl_to_tgsi_instruction
*inst
;
3921 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3922 v
->ctx
= original
->ctx
;
3924 v
->shader_program
= NULL
;
3926 v
->glsl_version
= original
->glsl_version
;
3927 v
->native_integers
= original
->native_integers
;
3928 v
->options
= original
->options
;
3929 v
->next_temp
= original
->next_temp
;
3930 v
->num_address_regs
= original
->num_address_regs
;
3931 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3932 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3933 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3934 v
->num_immediates
= original
->num_immediates
;
3937 * Get initial pixel color from the texture.
3938 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3940 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3941 src0
= v
->get_temp(glsl_type::vec4_type
);
3942 dst0
= st_dst_reg(src0
);
3943 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3944 inst
->sampler_array_size
= 1;
3945 inst
->tex_target
= TEXTURE_2D_INDEX
;
3947 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3948 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3949 v
->samplers_used
|= (1 << 0);
3951 if (scale_and_bias
) {
3952 static const gl_state_index scale_state
[STATE_LENGTH
] =
3953 { STATE_INTERNAL
, STATE_PT_SCALE
,
3954 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3955 static const gl_state_index bias_state
[STATE_LENGTH
] =
3956 { STATE_INTERNAL
, STATE_PT_BIAS
,
3957 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3958 GLint scale_p
, bias_p
;
3959 st_src_reg scale
, bias
;
3961 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3962 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3964 /* MAD colorTemp, colorTemp, scale, bias; */
3965 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3966 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3967 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3971 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3972 st_dst_reg temp_dst
= st_dst_reg(temp
);
3974 assert(st
->pixel_xfer
.pixelmap_texture
);
3976 /* With a little effort, we can do four pixel map look-ups with
3977 * two TEX instructions:
3980 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3981 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3982 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3983 inst
->sampler
.index
= 1;
3984 inst
->sampler_array_size
= 1;
3985 inst
->tex_target
= TEXTURE_2D_INDEX
;
3987 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3988 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3989 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3990 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3991 inst
->sampler
.index
= 1;
3992 inst
->sampler_array_size
= 1;
3993 inst
->tex_target
= TEXTURE_2D_INDEX
;
3995 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3996 v
->samplers_used
|= (1 << 1);
3998 /* MOV colorTemp, temp; */
3999 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4002 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4004 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &original
->instructions
) {
4005 glsl_to_tgsi_instruction
*newinst
;
4006 st_src_reg src_regs
[3];
4008 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4009 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4011 for (int i
=0; i
<3; i
++) {
4012 src_regs
[i
] = inst
->src
[i
];
4013 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4014 src_regs
[i
].index
== VARYING_SLOT_COL0
)
4016 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4017 src_regs
[i
].index
= src0
.index
;
4019 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4020 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4023 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4024 newinst
->tex_target
= inst
->tex_target
;
4027 /* Make modifications to fragment program info. */
4028 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4029 original
->prog
->Parameters
);
4030 _mesa_free_parameter_list(params
);
4031 count_resources(v
, prog
);
4032 fp
->glsl_to_tgsi
= v
;
4036 * Make fragment program for glBitmap:
4037 * Sample the texture and kill the fragment if the bit is 0.
4038 * This program will be combined with the user's fragment program.
4040 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4043 get_bitmap_visitor(struct st_fragment_program
*fp
,
4044 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4046 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4047 struct st_context
*st
= st_context(original
->ctx
);
4048 struct gl_program
*prog
= &fp
->Base
.Base
;
4049 st_src_reg coord
, src0
;
4051 glsl_to_tgsi_instruction
*inst
;
4053 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4054 v
->ctx
= original
->ctx
;
4056 v
->shader_program
= NULL
;
4058 v
->glsl_version
= original
->glsl_version
;
4059 v
->native_integers
= original
->native_integers
;
4060 v
->options
= original
->options
;
4061 v
->next_temp
= original
->next_temp
;
4062 v
->num_address_regs
= original
->num_address_regs
;
4063 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4064 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4065 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4066 v
->num_immediates
= original
->num_immediates
;
4068 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4069 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4070 src0
= v
->get_temp(glsl_type::vec4_type
);
4071 dst0
= st_dst_reg(src0
);
4072 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4073 inst
->sampler
.index
= samplerIndex
;
4074 inst
->sampler_array_size
= 1;
4075 inst
->tex_target
= TEXTURE_2D_INDEX
;
4077 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4078 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4079 v
->samplers_used
|= (1 << samplerIndex
);
4081 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4082 src0
.negate
= NEGATE_XYZW
;
4083 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4084 src0
.swizzle
= SWIZZLE_XXXX
;
4085 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4087 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4089 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &original
->instructions
) {
4090 glsl_to_tgsi_instruction
*newinst
;
4091 st_src_reg src_regs
[3];
4093 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4094 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4096 for (int i
=0; i
<3; i
++) {
4097 src_regs
[i
] = inst
->src
[i
];
4098 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4099 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4102 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4103 newinst
->tex_target
= inst
->tex_target
;
4106 /* Make modifications to fragment program info. */
4107 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4108 count_resources(v
, prog
);
4109 fp
->glsl_to_tgsi
= v
;
4112 /* ------------------------- TGSI conversion stuff -------------------------- */
4114 unsigned branch_target
;
4119 * Intermediate state used during shader translation.
4121 struct st_translate
{
4122 struct ureg_program
*ureg
;
4124 unsigned temps_size
;
4125 struct ureg_dst
*temps
;
4127 struct ureg_dst arrays
[MAX_ARRAYS
];
4128 struct ureg_src
*constants
;
4129 struct ureg_src
*immediates
;
4130 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4131 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4132 struct ureg_dst address
[3];
4133 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4134 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4135 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4136 unsigned array_sizes
[MAX_ARRAYS
];
4138 const GLuint
*inputMapping
;
4139 const GLuint
*outputMapping
;
4141 /* For every instruction that contains a label (eg CALL), keep
4142 * details so that we can go back afterwards and emit the correct
4143 * tgsi instruction number for each label.
4145 struct label
*labels
;
4146 unsigned labels_size
;
4147 unsigned labels_count
;
4149 /* Keep a record of the tgsi instruction number that each mesa
4150 * instruction starts at, will be used to fix up labels after
4155 unsigned insn_count
;
4157 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4162 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4163 const unsigned _mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4166 TGSI_SEMANTIC_VERTEXID
,
4167 TGSI_SEMANTIC_INSTANCEID
,
4173 TGSI_SEMANTIC_INVOCATIONID
,
4178 TGSI_SEMANTIC_SAMPLEID
,
4179 TGSI_SEMANTIC_SAMPLEPOS
,
4180 TGSI_SEMANTIC_SAMPLEMASK
,
4184 * Make note of a branch to a label in the TGSI code.
4185 * After we've emitted all instructions, we'll go over the list
4186 * of labels built here and patch the TGSI code with the actual
4187 * location of each label.
4189 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4193 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4194 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4195 t
->labels
= (struct label
*)realloc(t
->labels
,
4196 t
->labels_size
* sizeof(struct label
));
4197 if (t
->labels
== NULL
) {
4198 static unsigned dummy
;
4204 i
= t
->labels_count
++;
4205 t
->labels
[i
].branch_target
= branch_target
;
4206 return &t
->labels
[i
].token
;
4210 * Called prior to emitting the TGSI code for each instruction.
4211 * Allocate additional space for instructions if needed.
4212 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4213 * the next TGSI instruction.
4215 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4217 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4218 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4219 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4220 if (t
->insn
== NULL
) {
4226 t
->insn
[t
->insn_count
++] = start
;
4230 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4232 static struct ureg_src
4233 emit_immediate(struct st_translate
*t
,
4234 gl_constant_value values
[4],
4237 struct ureg_program
*ureg
= t
->ureg
;
4242 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4244 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4245 case GL_UNSIGNED_INT
:
4247 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4249 assert(!"should not get here - type must be float, int, uint, or bool");
4250 return ureg_src_undef();
4255 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4257 static struct ureg_dst
4258 dst_register(struct st_translate
*t
,
4259 gl_register_file file
,
4265 case PROGRAM_UNDEFINED
:
4266 return ureg_dst_undef();
4268 case PROGRAM_TEMPORARY
:
4269 /* Allocate space for temporaries on demand. */
4270 if (index
>= t
->temps_size
) {
4271 const int inc
= 4096;
4273 t
->temps
= (struct ureg_dst
*)
4275 (t
->temps_size
+ inc
) * sizeof(struct ureg_dst
));
4277 return ureg_dst_undef();
4279 memset(t
->temps
+ t
->temps_size
, 0, inc
* sizeof(struct ureg_dst
));
4280 t
->temps_size
+= inc
;
4283 if (ureg_dst_is_undef(t
->temps
[index
]))
4284 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4286 return t
->temps
[index
];
4289 array
= index
>> 16;
4291 assert(array
< Elements(t
->arrays
));
4293 if (ureg_dst_is_undef(t
->arrays
[array
]))
4294 t
->arrays
[array
] = ureg_DECL_array_temporary(
4295 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4297 return ureg_dst_array_offset(t
->arrays
[array
],
4298 (int)(index
& 0xFFFF) - 0x8000);
4300 case PROGRAM_OUTPUT
:
4301 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4302 assert(index
< VARYING_SLOT_MAX
);
4303 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4304 assert(index
< FRAG_RESULT_MAX
);
4306 assert(index
< VARYING_SLOT_MAX
);
4308 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4310 return t
->outputs
[t
->outputMapping
[index
]];
4312 case PROGRAM_ADDRESS
:
4313 return t
->address
[index
];
4316 assert(!"unknown dst register file");
4317 return ureg_dst_undef();
4322 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4324 static struct ureg_src
4325 src_register(struct st_translate
*t
, const struct st_src_reg
*reg
)
4328 case PROGRAM_UNDEFINED
:
4329 return ureg_src_undef();
4331 case PROGRAM_TEMPORARY
:
4333 return ureg_src(dst_register(t
, reg
->file
, reg
->index
));
4335 case PROGRAM_UNIFORM
:
4336 assert(reg
->index
>= 0);
4337 return t
->constants
[reg
->index
];
4338 case PROGRAM_STATE_VAR
:
4339 case PROGRAM_CONSTANT
: /* ie, immediate */
4340 if (reg
->has_index2
)
4341 return ureg_src_register(TGSI_FILE_CONSTANT
, reg
->index
);
4342 else if (reg
->index
< 0)
4343 return ureg_DECL_constant(t
->ureg
, 0);
4345 return t
->constants
[reg
->index
];
4347 case PROGRAM_IMMEDIATE
:
4348 return t
->immediates
[reg
->index
];
4351 assert(t
->inputMapping
[reg
->index
] < Elements(t
->inputs
));
4352 return t
->inputs
[t
->inputMapping
[reg
->index
]];
4354 case PROGRAM_OUTPUT
:
4355 assert(t
->outputMapping
[reg
->index
] < Elements(t
->outputs
));
4356 return ureg_src(t
->outputs
[t
->outputMapping
[reg
->index
]]); /* not needed? */
4358 case PROGRAM_ADDRESS
:
4359 return ureg_src(t
->address
[reg
->index
]);
4361 case PROGRAM_SYSTEM_VALUE
:
4362 assert(reg
->index
< (int) Elements(t
->systemValues
));
4363 return t
->systemValues
[reg
->index
];
4366 assert(!"unknown src register file");
4367 return ureg_src_undef();
4372 * Create a TGSI ureg_dst register from an st_dst_reg.
4374 static struct ureg_dst
4375 translate_dst(struct st_translate
*t
,
4376 const st_dst_reg
*dst_reg
,
4377 bool saturate
, bool clamp_color
)
4379 struct ureg_dst dst
= dst_register(t
,
4383 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4386 dst
= ureg_saturate(dst
);
4387 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4388 /* Clamp colors for ARB_color_buffer_float. */
4389 switch (t
->procType
) {
4390 case TGSI_PROCESSOR_VERTEX
:
4391 /* XXX if the geometry shader is present, this must be done there
4392 * instead of here. */
4393 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4394 dst_reg
->index
== VARYING_SLOT_COL1
||
4395 dst_reg
->index
== VARYING_SLOT_BFC0
||
4396 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4397 dst
= ureg_saturate(dst
);
4401 case TGSI_PROCESSOR_FRAGMENT
:
4402 if (dst_reg
->index
== FRAG_RESULT_COLOR
||
4403 dst_reg
->index
>= FRAG_RESULT_DATA0
) {
4404 dst
= ureg_saturate(dst
);
4410 if (dst_reg
->reladdr
!= NULL
) {
4411 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4412 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4419 * Create a TGSI ureg_src register from an st_src_reg.
4421 static struct ureg_src
4422 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4424 struct ureg_src src
= src_register(t
, src_reg
);
4426 if (src_reg
->has_index2
) {
4427 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4428 * and UBO constant buffers (buffer, position).
4430 if (src_reg
->reladdr2
)
4431 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4434 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4437 src
= ureg_swizzle(src
,
4438 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4439 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4440 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4441 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4443 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4444 src
= ureg_negate(src
);
4446 if (src_reg
->reladdr
!= NULL
) {
4447 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4448 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4454 static struct tgsi_texture_offset
4455 translate_tex_offset(struct st_translate
*t
,
4456 const st_src_reg
*in_offset
, int idx
)
4458 struct tgsi_texture_offset offset
;
4459 struct ureg_src imm_src
;
4460 struct ureg_dst dst
;
4463 switch (in_offset
->file
) {
4464 case PROGRAM_IMMEDIATE
:
4465 imm_src
= t
->immediates
[in_offset
->index
];
4467 offset
.File
= imm_src
.File
;
4468 offset
.Index
= imm_src
.Index
;
4469 offset
.SwizzleX
= imm_src
.SwizzleX
;
4470 offset
.SwizzleY
= imm_src
.SwizzleY
;
4471 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4474 case PROGRAM_TEMPORARY
:
4475 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4476 offset
.File
= imm_src
.File
;
4477 offset
.Index
= imm_src
.Index
;
4478 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4479 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4480 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4484 array
= in_offset
->index
>> 16;
4487 assert(array
< (int) Elements(t
->arrays
));
4489 dst
= t
->arrays
[array
];
4490 offset
.File
= dst
.File
;
4491 offset
.Index
= dst
.Index
+ (in_offset
->index
& 0xFFFF) - 0x8000;
4492 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4493 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4494 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4504 compile_tgsi_instruction(struct st_translate
*t
,
4505 const glsl_to_tgsi_instruction
*inst
,
4506 bool clamp_dst_color_output
)
4508 struct ureg_program
*ureg
= t
->ureg
;
4510 struct ureg_dst dst
[1];
4511 struct ureg_src src
[4];
4512 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4516 unsigned tex_target
;
4518 num_dst
= num_inst_dst_regs(inst
->op
);
4519 num_src
= num_inst_src_regs(inst
->op
);
4522 dst
[0] = translate_dst(t
,
4525 clamp_dst_color_output
);
4527 for (i
= 0; i
< num_src
; i
++)
4528 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4531 case TGSI_OPCODE_BGNLOOP
:
4532 case TGSI_OPCODE_CAL
:
4533 case TGSI_OPCODE_ELSE
:
4534 case TGSI_OPCODE_ENDLOOP
:
4535 case TGSI_OPCODE_IF
:
4536 case TGSI_OPCODE_UIF
:
4537 assert(num_dst
== 0);
4538 ureg_label_insn(ureg
,
4542 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4545 case TGSI_OPCODE_TEX
:
4546 case TGSI_OPCODE_TXB
:
4547 case TGSI_OPCODE_TXD
:
4548 case TGSI_OPCODE_TXL
:
4549 case TGSI_OPCODE_TXP
:
4550 case TGSI_OPCODE_TXQ
:
4551 case TGSI_OPCODE_TXF
:
4552 case TGSI_OPCODE_TEX2
:
4553 case TGSI_OPCODE_TXB2
:
4554 case TGSI_OPCODE_TXL2
:
4555 case TGSI_OPCODE_TG4
:
4556 case TGSI_OPCODE_LODQ
:
4557 src
[num_src
] = t
->samplers
[inst
->sampler
.index
];
4558 if (inst
->sampler
.reladdr
)
4560 ureg_src_indirect(src
[num_src
], ureg_src(t
->address
[2]));
4562 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4563 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
4565 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4571 texoffsets
, inst
->tex_offset_num_offset
,
4575 case TGSI_OPCODE_SCS
:
4576 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4577 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4590 * Emit the TGSI instructions for inverting and adjusting WPOS.
4591 * This code is unavoidable because it also depends on whether
4592 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4595 emit_wpos_adjustment( struct st_translate
*t
,
4596 const struct gl_program
*program
,
4598 GLfloat adjX
, GLfloat adjY
[2])
4600 struct ureg_program
*ureg
= t
->ureg
;
4602 /* Fragment program uses fragment position input.
4603 * Need to replace instances of INPUT[WPOS] with temp T
4604 * where T = INPUT[WPOS] by y is inverted.
4606 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4607 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4608 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4610 /* XXX: note we are modifying the incoming shader here! Need to
4611 * do this before emitting the constant decls below, or this
4614 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4615 wposTransformState
);
4617 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4618 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4619 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4621 /* First, apply the coordinate shift: */
4622 if (adjX
|| adjY
[0] || adjY
[1]) {
4623 if (adjY
[0] != adjY
[1]) {
4624 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4625 * depending on whether inversion is actually going to be applied
4626 * or not, which is determined by testing against the inversion
4627 * state variable used below, which will be either +1 or -1.
4629 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4631 ureg_CMP(ureg
, adj_temp
,
4632 ureg_scalar(wpostrans
, invert
? 2 : 0),
4633 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4634 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4635 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4637 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4638 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4640 wpos_input
= ureg_src(wpos_temp
);
4642 /* MOV wpos_temp, input[wpos]
4644 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4647 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4648 * inversion/identity, or the other way around if we're drawing to an FBO.
4651 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4654 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4656 ureg_scalar(wpostrans
, 0),
4657 ureg_scalar(wpostrans
, 1));
4659 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4662 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4664 ureg_scalar(wpostrans
, 2),
4665 ureg_scalar(wpostrans
, 3));
4668 /* Use wpos_temp as position input from here on:
4670 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4675 * Emit fragment position/ooordinate code.
4678 emit_wpos(struct st_context
*st
,
4679 struct st_translate
*t
,
4680 const struct gl_program
*program
,
4681 struct ureg_program
*ureg
)
4683 const struct gl_fragment_program
*fp
=
4684 (const struct gl_fragment_program
*) program
;
4685 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4686 GLfloat adjX
= 0.0f
;
4687 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4688 boolean invert
= FALSE
;
4690 /* Query the pixel center conventions supported by the pipe driver and set
4691 * adjX, adjY to help out if it cannot handle the requested one internally.
4693 * The bias of the y-coordinate depends on whether y-inversion takes place
4694 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4695 * drawing to an FBO (causes additional inversion), and whether the the pipe
4696 * driver origin and the requested origin differ (the latter condition is
4697 * stored in the 'invert' variable).
4699 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4701 * center shift only:
4706 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4707 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4708 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4709 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4711 * inversion and center shift:
4712 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4713 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4714 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4715 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4717 if (fp
->OriginUpperLeft
) {
4718 /* Fragment shader wants origin in upper-left */
4719 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4720 /* the driver supports upper-left origin */
4722 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4723 /* the driver supports lower-left origin, need to invert Y */
4724 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4731 /* Fragment shader wants origin in lower-left */
4732 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4733 /* the driver supports lower-left origin */
4734 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4735 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4736 /* the driver supports upper-left origin, need to invert Y */
4742 if (fp
->PixelCenterInteger
) {
4743 /* Fragment shader wants pixel center integer */
4744 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4745 /* the driver supports pixel center integer */
4747 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4749 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4750 /* the driver supports pixel center half integer, need to bias X,Y */
4759 /* Fragment shader wants pixel center half integer */
4760 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4761 /* the driver supports pixel center half integer */
4763 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4764 /* the driver supports pixel center integer, need to bias X,Y */
4765 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4766 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4772 /* we invert after adjustment so that we avoid the MOV to temporary,
4773 * and reuse the adjustment ADD instead */
4774 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4778 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4779 * TGSI uses +1 for front, -1 for back.
4780 * This function converts the TGSI value to the GL value. Simply clamping/
4781 * saturating the value to [0,1] does the job.
4784 emit_face_var(struct gl_context
*ctx
, struct st_translate
*t
)
4786 struct ureg_program
*ureg
= t
->ureg
;
4787 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4788 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4790 if (ctx
->Const
.NativeIntegers
) {
4791 ureg_FSGE(ureg
, face_temp
, face_input
, ureg_imm1f(ureg
, 0));
4794 /* MOV_SAT face_temp, input[face] */
4795 ureg_MOV(ureg
, ureg_saturate(face_temp
), face_input
);
4798 /* Use face_temp as face input from here on: */
4799 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4803 emit_edgeflags(struct st_translate
*t
)
4805 struct ureg_program
*ureg
= t
->ureg
;
4806 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4807 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4809 ureg_MOV(ureg
, edge_dst
, edge_src
);
4813 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4814 * \param program the program to translate
4815 * \param numInputs number of input registers used
4816 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4818 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4819 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4821 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4822 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4823 * \param numOutputs number of output registers used
4824 * \param outputMapping maps Mesa fragment program outputs to TGSI
4826 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4827 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4830 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4832 extern "C" enum pipe_error
4833 st_translate_program(
4834 struct gl_context
*ctx
,
4836 struct ureg_program
*ureg
,
4837 glsl_to_tgsi_visitor
*program
,
4838 const struct gl_program
*proginfo
,
4840 const GLuint inputMapping
[],
4841 const ubyte inputSemanticName
[],
4842 const ubyte inputSemanticIndex
[],
4843 const GLuint interpMode
[],
4844 const GLuint interpLocation
[],
4846 const GLuint outputMapping
[],
4847 const ubyte outputSemanticName
[],
4848 const ubyte outputSemanticIndex
[],
4849 boolean passthrough_edgeflags
,
4850 boolean clamp_color
)
4852 struct st_translate
*t
;
4854 enum pipe_error ret
= PIPE_OK
;
4856 assert(numInputs
<= Elements(t
->inputs
));
4857 assert(numOutputs
<= Elements(t
->outputs
));
4859 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_FRONT_FACE
] ==
4860 TGSI_SEMANTIC_FACE
);
4861 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_VERTEX_ID
] ==
4862 TGSI_SEMANTIC_VERTEXID
);
4863 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_INSTANCE_ID
] ==
4864 TGSI_SEMANTIC_INSTANCEID
);
4865 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_ID
] ==
4866 TGSI_SEMANTIC_SAMPLEID
);
4867 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_POS
] ==
4868 TGSI_SEMANTIC_SAMPLEPOS
);
4869 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_SAMPLE_MASK_IN
] ==
4870 TGSI_SEMANTIC_SAMPLEMASK
);
4871 assert(_mesa_sysval_to_semantic
[SYSTEM_VALUE_INVOCATION_ID
] ==
4872 TGSI_SEMANTIC_INVOCATIONID
);
4874 t
= CALLOC_STRUCT(st_translate
);
4876 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4880 memset(t
, 0, sizeof *t
);
4882 t
->procType
= procType
;
4883 t
->inputMapping
= inputMapping
;
4884 t
->outputMapping
= outputMapping
;
4887 if (program
->shader_program
) {
4888 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4889 struct gl_uniform_storage
*const storage
=
4890 &program
->shader_program
->UniformStorage
[i
];
4892 _mesa_uniform_detach_all_driver_storage(storage
);
4897 * Declare input attributes.
4899 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4900 for (i
= 0; i
< numInputs
; i
++) {
4901 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4902 inputSemanticName
[i
],
4903 inputSemanticIndex
[i
],
4908 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4909 /* Must do this after setting up t->inputs, and before
4910 * emitting constant references, below:
4912 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4915 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4916 emit_face_var(ctx
, t
);
4919 * Declare output attributes.
4921 for (i
= 0; i
< numOutputs
; i
++) {
4922 switch (outputSemanticName
[i
]) {
4923 case TGSI_SEMANTIC_POSITION
:
4924 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4925 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4926 outputSemanticIndex
[i
]);
4927 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4929 case TGSI_SEMANTIC_STENCIL
:
4930 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4931 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4932 outputSemanticIndex
[i
]);
4933 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4935 case TGSI_SEMANTIC_COLOR
:
4936 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4937 TGSI_SEMANTIC_COLOR
,
4938 outputSemanticIndex
[i
]);
4940 case TGSI_SEMANTIC_SAMPLEMASK
:
4941 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4942 TGSI_SEMANTIC_SAMPLEMASK
,
4943 outputSemanticIndex
[i
]);
4944 /* TODO: If we ever support more than 32 samples, this will have
4945 * to become an array.
4947 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4950 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4951 ret
= PIPE_ERROR_BAD_INPUT
;
4956 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4957 for (i
= 0; i
< numInputs
; i
++) {
4958 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4960 inputSemanticName
[i
],
4961 inputSemanticIndex
[i
]);
4964 for (i
= 0; i
< numOutputs
; i
++) {
4965 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4966 outputSemanticName
[i
],
4967 outputSemanticIndex
[i
]);
4971 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4973 for (i
= 0; i
< numInputs
; i
++) {
4974 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4977 for (i
= 0; i
< numOutputs
; i
++) {
4978 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4979 outputSemanticName
[i
],
4980 outputSemanticIndex
[i
]);
4981 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
4982 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4984 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
4985 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
4986 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4989 if (passthrough_edgeflags
)
4993 /* Declare address register.
4995 if (program
->num_address_regs
> 0) {
4996 assert(program
->num_address_regs
<= 3);
4997 for (int i
= 0; i
< program
->num_address_regs
; i
++)
4998 t
->address
[i
] = ureg_DECL_address(ureg
);
5001 /* Declare misc input registers
5004 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
5005 unsigned numSys
= 0;
5006 for (i
= 0; sysInputs
; i
++) {
5007 if (sysInputs
& (1 << i
)) {
5008 unsigned semName
= _mesa_sysval_to_semantic
[i
];
5009 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
5010 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
5011 semName
== TGSI_SEMANTIC_VERTEXID
) {
5012 /* From Gallium perspective, these system values are always
5013 * integer, and require native integer support. However, if
5014 * native integer is supported on the vertex stage but not the
5015 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5016 * assumes these system values are floats. To resolve the
5017 * inconsistency, we insert a U2F.
5019 struct st_context
*st
= st_context(ctx
);
5020 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
5021 assert(procType
== TGSI_PROCESSOR_VERTEX
);
5022 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
5023 if (!ctx
->Const
.NativeIntegers
) {
5024 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
5025 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
5026 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
5030 sysInputs
&= ~(1 << i
);
5035 /* Copy over array sizes
5037 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
5039 /* Emit constants and uniforms. TGSI uses a single index space for these,
5040 * so we put all the translated regs in t->constants.
5042 if (proginfo
->Parameters
) {
5043 t
->constants
= (struct ureg_src
*)
5044 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
5045 if (t
->constants
== NULL
) {
5046 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5050 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
5051 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
5052 case PROGRAM_STATE_VAR
:
5053 case PROGRAM_UNIFORM
:
5054 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5057 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5058 * addressing of the const buffer.
5059 * FIXME: Be smarter and recognize param arrays:
5060 * indirect addressing is only valid within the referenced
5063 case PROGRAM_CONSTANT
:
5064 if (program
->indirect_addr_consts
)
5065 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
5067 t
->constants
[i
] = emit_immediate(t
,
5068 proginfo
->Parameters
->ParameterValues
[i
],
5069 proginfo
->Parameters
->Parameters
[i
].DataType
,
5078 if (program
->shader
) {
5079 unsigned num_ubos
= program
->shader
->NumUniformBlocks
;
5081 for (i
= 0; i
< num_ubos
; i
++) {
5082 unsigned size
= program
->shader
->UniformBlocks
[i
].UniformBufferSize
;
5083 unsigned num_const_vecs
= (size
+ 15) / 16;
5084 unsigned first
, last
;
5085 assert(num_const_vecs
> 0);
5087 last
= num_const_vecs
> 0 ? num_const_vecs
- 1 : 0;
5088 ureg_DECL_constant2D(t
->ureg
, first
, last
, i
+ 1);
5092 /* Emit immediate values.
5094 t
->immediates
= (struct ureg_src
*)
5095 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5096 if (t
->immediates
== NULL
) {
5097 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5101 foreach_in_list(immediate_storage
, imm
, &program
->immediates
) {
5102 assert(i
< program
->num_immediates
);
5103 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
5105 assert(i
== program
->num_immediates
);
5107 /* texture samplers */
5108 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5109 if (program
->samplers_used
& (1 << i
)) {
5110 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5114 /* Emit each instruction in turn:
5116 foreach_in_list(glsl_to_tgsi_instruction
, inst
, &program
->instructions
) {
5117 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5118 compile_tgsi_instruction(t
, inst
, clamp_color
);
5121 /* Fix up all emitted labels:
5123 for (i
= 0; i
< t
->labels_count
; i
++) {
5124 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5125 t
->insn
[t
->labels
[i
].branch_target
]);
5128 if (program
->shader_program
) {
5129 /* This has to be done last. Any operation the can cause
5130 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5131 * program constant) has to happen before creating this linkage.
5133 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5134 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5137 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5138 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5148 free(t
->immediates
);
5151 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5159 /* ----------------------------- End TGSI code ------------------------------ */
5163 shader_stage_to_ptarget(gl_shader_stage stage
)
5166 case MESA_SHADER_VERTEX
:
5167 return PIPE_SHADER_VERTEX
;
5168 case MESA_SHADER_FRAGMENT
:
5169 return PIPE_SHADER_FRAGMENT
;
5170 case MESA_SHADER_GEOMETRY
:
5171 return PIPE_SHADER_GEOMETRY
;
5172 case MESA_SHADER_COMPUTE
:
5173 return PIPE_SHADER_COMPUTE
;
5176 assert(!"should not be reached");
5177 return PIPE_SHADER_VERTEX
;
5182 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5183 * generating Mesa IR.
5185 static struct gl_program
*
5186 get_mesa_program(struct gl_context
*ctx
,
5187 struct gl_shader_program
*shader_program
,
5188 struct gl_shader
*shader
)
5190 glsl_to_tgsi_visitor
* v
;
5191 struct gl_program
*prog
;
5192 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5194 struct gl_shader_compiler_options
*options
=
5195 &ctx
->Const
.ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5196 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5197 unsigned ptarget
= shader_stage_to_ptarget(shader
->Stage
);
5199 validate_ir_tree(shader
->ir
);
5201 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5204 prog
->Parameters
= _mesa_new_parameter_list();
5205 v
= new glsl_to_tgsi_visitor();
5208 v
->shader_program
= shader_program
;
5210 v
->options
= options
;
5211 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5212 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5214 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5215 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5217 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5220 /* Remove reads from output registers. */
5221 lower_output_reads(shader
->ir
);
5223 /* Emit intermediate IR for main(). */
5224 visit_exec_list(shader
->ir
, v
);
5226 /* Now emit bodies for any functions that were used. */
5228 progress
= GL_FALSE
;
5230 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
5231 if (!entry
->bgn_inst
) {
5232 v
->current_function
= entry
;
5234 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5235 entry
->bgn_inst
->function
= entry
;
5237 visit_exec_list(&entry
->sig
->body
, v
);
5239 glsl_to_tgsi_instruction
*last
;
5240 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5241 if (last
->op
!= TGSI_OPCODE_RET
)
5242 v
->emit(NULL
, TGSI_OPCODE_RET
);
5244 glsl_to_tgsi_instruction
*end
;
5245 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5246 end
->function
= entry
;
5254 /* Print out some information (for debugging purposes) used by the
5255 * optimization passes. */
5256 for (i
=0; i
< v
->next_temp
; i
++) {
5257 int fr
= v
->get_first_temp_read(i
);
5258 int fw
= v
->get_first_temp_write(i
);
5259 int lr
= v
->get_last_temp_read(i
);
5260 int lw
= v
->get_last_temp_write(i
);
5262 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5267 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5269 v
->copy_propagate();
5270 while (v
->eliminate_dead_code());
5272 v
->merge_registers();
5273 v
->renumber_registers();
5275 /* Write the END instruction. */
5276 v
->emit(NULL
, TGSI_OPCODE_END
);
5278 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5280 printf("GLSL IR for linked %s program %d:\n",
5281 _mesa_shader_stage_to_string(shader
->Stage
),
5282 shader_program
->Name
);
5283 _mesa_print_ir(stdout
, shader
->ir
, NULL
);
5289 prog
->Instructions
= NULL
;
5290 prog
->NumInstructions
= 0;
5292 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5293 count_resources(v
, prog
);
5295 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5297 /* This has to be done last. Any operation the can cause
5298 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5299 * program constant) has to happen before creating this linkage.
5301 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5302 if (!shader_program
->LinkStatus
) {
5306 struct st_vertex_program
*stvp
;
5307 struct st_fragment_program
*stfp
;
5308 struct st_geometry_program
*stgp
;
5310 switch (shader
->Type
) {
5311 case GL_VERTEX_SHADER
:
5312 stvp
= (struct st_vertex_program
*)prog
;
5313 stvp
->glsl_to_tgsi
= v
;
5315 case GL_FRAGMENT_SHADER
:
5316 stfp
= (struct st_fragment_program
*)prog
;
5317 stfp
->glsl_to_tgsi
= v
;
5319 case GL_GEOMETRY_SHADER
:
5320 stgp
= (struct st_geometry_program
*)prog
;
5321 stgp
->glsl_to_tgsi
= v
;
5322 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5323 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5324 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5325 stgp
->Base
.Invocations
= shader_program
->Geom
.Invocations
;
5328 assert(!"should not be reached");
5338 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5340 struct gl_shader
*shader
;
5341 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5342 type
== GL_GEOMETRY_SHADER_ARB
);
5343 shader
= rzalloc(NULL
, struct gl_shader
);
5345 shader
->Type
= type
;
5346 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5347 shader
->Name
= name
;
5348 _mesa_init_shader(ctx
, shader
);
5353 struct gl_shader_program
*
5354 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5356 struct gl_shader_program
*shProg
;
5357 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5359 shProg
->Name
= name
;
5360 _mesa_init_shader_program(ctx
, shProg
);
5367 * Called via ctx->Driver.LinkShader()
5368 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5369 * with code lowering and other optimizations.
5372 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5374 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5375 assert(prog
->LinkStatus
);
5377 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5378 if (prog
->_LinkedShaders
[i
] == NULL
)
5382 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5383 const struct gl_shader_compiler_options
*options
=
5384 &ctx
->Const
.ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5386 /* If there are forms of indirect addressing that the driver
5387 * cannot handle, perform the lowering pass.
5389 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5390 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5391 lower_variable_index_to_cond_assign(ir
,
5392 options
->EmitNoIndirectInput
,
5393 options
->EmitNoIndirectOutput
,
5394 options
->EmitNoIndirectTemp
,
5395 options
->EmitNoIndirectUniform
);
5398 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5399 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5400 LOWER_UNPACK_SNORM_2x16
|
5401 LOWER_PACK_UNORM_2x16
|
5402 LOWER_UNPACK_UNORM_2x16
|
5403 LOWER_PACK_SNORM_4x8
|
5404 LOWER_UNPACK_SNORM_4x8
|
5405 LOWER_UNPACK_UNORM_4x8
|
5406 LOWER_PACK_UNORM_4x8
|
5407 LOWER_PACK_HALF_2x16
|
5408 LOWER_UNPACK_HALF_2x16
;
5410 lower_packing_builtins(ir
, lower_inst
);
5413 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TEXTURE_GATHER_OFFSETS
))
5414 lower_offset_arrays(ir
);
5415 do_mat_op_to_vec(ir
);
5416 /* Emit saturates in the vertex shader only if SM 3.0 is supported. */
5417 bool vs_sm3
= (_mesa_shader_stage_to_program(prog
->_LinkedShaders
[i
]->Stage
) ==
5418 GL_VERTEX_PROGRAM_ARB
) && st_context(ctx
)->has_shader_model3
;
5419 lower_instructions(ir
,
5427 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5428 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0) |
5429 (vs_sm3
? SAT_TO_CLAMP
: 0));
5431 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5432 do_vec_index_to_cond_assign(ir
);
5433 lower_vector_insert(ir
, true);
5434 lower_quadop_vector(ir
, false);
5436 if (options
->MaxIfDepth
== 0) {
5443 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5445 progress
= do_common_optimization(ir
, true, true, options
,
5446 ctx
->Const
.NativeIntegers
)
5449 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5453 validate_ir_tree(ir
);
5456 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5457 struct gl_program
*linked_prog
;
5459 if (prog
->_LinkedShaders
[i
] == NULL
)
5462 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5465 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5467 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5468 _mesa_shader_stage_to_program(i
),
5470 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5472 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5477 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5484 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5485 const GLuint outputMapping
[],
5486 struct pipe_stream_output_info
*so
)
5489 struct gl_transform_feedback_info
*info
=
5490 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5492 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5493 so
->output
[i
].register_index
=
5494 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5495 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5496 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5497 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5498 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5499 so
->output
[i
].stream
= info
->Outputs
[i
].StreamId
;
5502 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5503 so
->stride
[i
] = info
->BufferStride
[i
];
5505 so
->num_outputs
= info
->NumOutputs
;