2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
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18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "program/hash_table.h"
49 #include "main/shaderapi.h"
50 #include "main/uniforms.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
74 (1 << PROGRAM_ENV_PARAM) | \
75 (1 << PROGRAM_STATE_VAR) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
80 * Maximum number of temporary registers.
82 * It is too big for stack allocated arrays -- it will cause stack overflow on
83 * Windows and likely Mac OS X.
85 #define MAX_TEMPS 4096
88 * Maximum number of arrays
90 #define MAX_ARRAYS 256
92 /* will be 4 for GLSL 4.00 */
93 #define MAX_GLSL_TEXTURE_OFFSET 1
98 static int swizzle_for_size(int size
);
101 * This struct is a corresponding struct to TGSI ureg_src.
105 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
109 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
110 this->swizzle
= swizzle_for_size(type
->vector_elements
);
112 this->swizzle
= SWIZZLE_XYZW
;
115 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
116 this->reladdr
= NULL
;
119 st_src_reg(gl_register_file file
, int index
, int type
)
125 this->swizzle
= SWIZZLE_XYZW
;
127 this->reladdr
= NULL
;
130 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
135 this->index2D
= index2D
;
136 this->swizzle
= SWIZZLE_XYZW
;
138 this->reladdr
= NULL
;
143 this->type
= GLSL_TYPE_ERROR
;
144 this->file
= PROGRAM_UNDEFINED
;
149 this->reladdr
= NULL
;
152 explicit st_src_reg(st_dst_reg reg
);
154 gl_register_file file
; /**< PROGRAM_* from Mesa */
155 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
157 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
158 int negate
; /**< NEGATE_XYZW mask from mesa */
159 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
160 /** Register index should be offset by the integer in this reg. */
166 st_dst_reg(gl_register_file file
, int writemask
, int type
)
170 this->writemask
= writemask
;
171 this->cond_mask
= COND_TR
;
172 this->reladdr
= NULL
;
178 this->type
= GLSL_TYPE_ERROR
;
179 this->file
= PROGRAM_UNDEFINED
;
182 this->cond_mask
= COND_TR
;
183 this->reladdr
= NULL
;
186 explicit st_dst_reg(st_src_reg reg
);
188 gl_register_file file
; /**< PROGRAM_* from Mesa */
189 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
190 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
192 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
193 /** Register index should be offset by the integer in this reg. */
197 st_src_reg::st_src_reg(st_dst_reg reg
)
199 this->type
= reg
.type
;
200 this->file
= reg
.file
;
201 this->index
= reg
.index
;
202 this->swizzle
= SWIZZLE_XYZW
;
204 this->reladdr
= reg
.reladdr
;
208 st_dst_reg::st_dst_reg(st_src_reg reg
)
210 this->type
= reg
.type
;
211 this->file
= reg
.file
;
212 this->index
= reg
.index
;
213 this->writemask
= WRITEMASK_XYZW
;
214 this->cond_mask
= COND_TR
;
215 this->reladdr
= reg
.reladdr
;
218 class glsl_to_tgsi_instruction
: public exec_node
{
220 /* Callers of this ralloc-based new need not call delete. It's
221 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
222 static void* operator new(size_t size
, void *ctx
)
226 node
= rzalloc_size(ctx
, size
);
227 assert(node
!= NULL
);
235 /** Pointer to the ir source this tree came from for debugging */
237 GLboolean cond_update
;
239 int sampler
; /**< sampler index */
240 int tex_target
; /**< One of TEXTURE_*_INDEX */
241 GLboolean tex_shadow
;
242 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
243 unsigned tex_offset_num_offset
;
244 int dead_mask
; /**< Used in dead code elimination */
246 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
249 class variable_storage
: public exec_node
{
251 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
252 : file(file
), index(index
), var(var
)
257 gl_register_file file
;
259 ir_variable
*var
; /* variable that maps to this, if any */
262 class immediate_storage
: public exec_node
{
264 immediate_storage(gl_constant_value
*values
, int size
, int type
)
266 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
271 gl_constant_value values
[4];
272 int size
; /**< Number of components (1-4) */
273 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
276 class function_entry
: public exec_node
{
278 ir_function_signature
*sig
;
281 * identifier of this function signature used by the program.
283 * At the point that TGSI instructions for function calls are
284 * generated, we don't know the address of the first instruction of
285 * the function body. So we make the BranchTarget that is called a
286 * small integer and rewrite them during set_branchtargets().
291 * Pointer to first instruction of the function body.
293 * Set during function body emits after main() is processed.
295 glsl_to_tgsi_instruction
*bgn_inst
;
298 * Index of the first instruction of the function body in actual TGSI.
300 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
304 /** Storage for the return value. */
305 st_src_reg return_reg
;
308 struct glsl_to_tgsi_visitor
: public ir_visitor
{
310 glsl_to_tgsi_visitor();
311 ~glsl_to_tgsi_visitor();
313 function_entry
*current_function
;
315 struct gl_context
*ctx
;
316 struct gl_program
*prog
;
317 struct gl_shader_program
*shader_program
;
318 struct gl_shader_compiler_options
*options
;
322 unsigned array_sizes
[MAX_ARRAYS
];
325 int num_address_regs
;
327 bool indirect_addr_consts
;
330 bool native_integers
;
333 variable_storage
*find_variable_storage(ir_variable
*var
);
335 int add_constant(gl_register_file file
, gl_constant_value values
[4],
336 int size
, int datatype
, GLuint
*swizzle_out
);
338 function_entry
*get_function_signature(ir_function_signature
*sig
);
340 st_src_reg
get_temp(const glsl_type
*type
);
341 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
343 st_src_reg
st_src_reg_for_float(float val
);
344 st_src_reg
st_src_reg_for_int(int val
);
345 st_src_reg
st_src_reg_for_type(int type
, int val
);
348 * \name Visit methods
350 * As typical for the visitor pattern, there must be one \c visit method for
351 * each concrete subclass of \c ir_instruction. Virtual base classes within
352 * the hierarchy should not have \c visit methods.
355 virtual void visit(ir_variable
*);
356 virtual void visit(ir_loop
*);
357 virtual void visit(ir_loop_jump
*);
358 virtual void visit(ir_function_signature
*);
359 virtual void visit(ir_function
*);
360 virtual void visit(ir_expression
*);
361 virtual void visit(ir_swizzle
*);
362 virtual void visit(ir_dereference_variable
*);
363 virtual void visit(ir_dereference_array
*);
364 virtual void visit(ir_dereference_record
*);
365 virtual void visit(ir_assignment
*);
366 virtual void visit(ir_constant
*);
367 virtual void visit(ir_call
*);
368 virtual void visit(ir_return
*);
369 virtual void visit(ir_discard
*);
370 virtual void visit(ir_texture
*);
371 virtual void visit(ir_if
*);
372 virtual void visit(ir_emit_vertex
*);
373 virtual void visit(ir_end_primitive
*);
378 /** List of variable_storage */
381 /** List of immediate_storage */
382 exec_list immediates
;
383 unsigned num_immediates
;
385 /** List of function_entry */
386 exec_list function_signatures
;
387 int next_signature_id
;
389 /** List of glsl_to_tgsi_instruction */
390 exec_list instructions
;
392 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
394 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
395 st_dst_reg dst
, st_src_reg src0
);
397 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
398 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
400 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
402 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
404 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
406 st_src_reg src0
, st_src_reg src1
);
409 * Emit the correct dot-product instruction for the type of arguments
411 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
417 void emit_scalar(ir_instruction
*ir
, unsigned op
,
418 st_dst_reg dst
, st_src_reg src0
);
420 void emit_scalar(ir_instruction
*ir
, unsigned op
,
421 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
423 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
425 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
427 void emit_scs(ir_instruction
*ir
, unsigned op
,
428 st_dst_reg dst
, const st_src_reg
&src
);
430 bool try_emit_mad(ir_expression
*ir
,
432 bool try_emit_mad_for_and_not(ir_expression
*ir
,
434 bool try_emit_sat(ir_expression
*ir
);
436 void emit_swz(ir_expression
*ir
);
438 bool process_move_condition(ir_rvalue
*ir
);
440 void simplify_cmp(void);
442 void rename_temp_register(int index
, int new_index
);
443 int get_first_temp_read(int index
);
444 int get_first_temp_write(int index
);
445 int get_last_temp_read(int index
);
446 int get_last_temp_write(int index
);
448 void copy_propagate(void);
449 void eliminate_dead_code(void);
450 int eliminate_dead_code_advanced(void);
451 void merge_registers(void);
452 void renumber_registers(void);
454 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
455 st_dst_reg
*l
, st_src_reg
*r
);
460 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
462 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
464 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
467 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
470 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
474 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
477 prog
->LinkStatus
= GL_FALSE
;
481 swizzle_for_size(int size
)
483 int size_swizzles
[4] = {
484 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
485 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
486 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
487 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
490 assert((size
>= 1) && (size
<= 4));
491 return size_swizzles
[size
- 1];
495 is_tex_instruction(unsigned opcode
)
497 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
502 num_inst_dst_regs(unsigned opcode
)
504 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
505 return info
->num_dst
;
509 num_inst_src_regs(unsigned opcode
)
511 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
512 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
515 glsl_to_tgsi_instruction
*
516 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
518 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
520 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
521 int num_reladdr
= 0, i
;
523 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
525 /* If we have to do relative addressing, we want to load the ARL
526 * reg directly for one of the regs, and preload the other reladdr
527 * sources into temps.
529 num_reladdr
+= dst
.reladdr
!= NULL
;
530 num_reladdr
+= src0
.reladdr
!= NULL
;
531 num_reladdr
+= src1
.reladdr
!= NULL
;
532 num_reladdr
+= src2
.reladdr
!= NULL
;
534 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
535 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
536 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
539 emit_arl(ir
, address_reg
, *dst
.reladdr
);
542 assert(num_reladdr
== 0);
552 inst
->function
= NULL
;
554 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
555 this->num_address_regs
= 1;
557 /* Update indirect addressing status used by TGSI */
560 case PROGRAM_LOCAL_PARAM
:
561 case PROGRAM_ENV_PARAM
:
562 case PROGRAM_STATE_VAR
:
563 case PROGRAM_CONSTANT
:
564 case PROGRAM_UNIFORM
:
565 this->indirect_addr_consts
= true;
567 case PROGRAM_IMMEDIATE
:
568 assert(!"immediates should not have indirect addressing");
575 for (i
=0; i
<3; i
++) {
576 if(inst
->src
[i
].reladdr
) {
577 switch(inst
->src
[i
].file
) {
578 case PROGRAM_LOCAL_PARAM
:
579 case PROGRAM_ENV_PARAM
:
580 case PROGRAM_STATE_VAR
:
581 case PROGRAM_CONSTANT
:
582 case PROGRAM_UNIFORM
:
583 this->indirect_addr_consts
= true;
585 case PROGRAM_IMMEDIATE
:
586 assert(!"immediates should not have indirect addressing");
595 this->instructions
.push_tail(inst
);
598 try_emit_float_set(ir
, op
, dst
);
604 glsl_to_tgsi_instruction
*
605 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
606 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
608 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
611 glsl_to_tgsi_instruction
*
612 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
613 st_dst_reg dst
, st_src_reg src0
)
615 assert(dst
.writemask
!= 0);
616 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
619 glsl_to_tgsi_instruction
*
620 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
622 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
626 * Emits the code to convert the result of float SET instructions to integers.
629 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
632 if ((op
== TGSI_OPCODE_SEQ
||
633 op
== TGSI_OPCODE_SNE
||
634 op
== TGSI_OPCODE_SGE
||
635 op
== TGSI_OPCODE_SLT
))
637 st_src_reg src
= st_src_reg(dst
);
638 src
.negate
= ~src
.negate
;
639 dst
.type
= GLSL_TYPE_FLOAT
;
640 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
645 * Determines whether to use an integer, unsigned integer, or float opcode
646 * based on the operands and input opcode, then emits the result.
649 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
651 st_src_reg src0
, st_src_reg src1
)
653 int type
= GLSL_TYPE_FLOAT
;
655 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
656 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
657 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
658 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
660 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
661 type
= GLSL_TYPE_FLOAT
;
662 else if (native_integers
)
663 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
665 #define case4(c, f, i, u) \
666 case TGSI_OPCODE_##c: \
667 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
668 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
669 else op = TGSI_OPCODE_##f; \
671 #define case3(f, i, u) case4(f, f, i, u)
672 #define case2fi(f, i) case4(f, f, i, i)
673 #define case2iu(i, u) case4(i, LAST, i, u)
679 case3(DIV
, IDIV
, UDIV
);
680 case3(MAX
, IMAX
, UMAX
);
681 case3(MIN
, IMIN
, UMIN
);
686 case3(SGE
, ISGE
, USGE
);
687 case3(SLT
, ISLT
, USLT
);
692 case3(ABS
, IABS
, IABS
);
697 assert(op
!= TGSI_OPCODE_LAST
);
701 glsl_to_tgsi_instruction
*
702 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
703 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
706 static const unsigned dot_opcodes
[] = {
707 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
710 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
714 * Emits TGSI scalar opcodes to produce unique answers across channels.
716 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
717 * channel determines the result across all channels. So to do a vec4
718 * of this operation, we want to emit a scalar per source channel used
719 * to produce dest channels.
722 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
724 st_src_reg orig_src0
, st_src_reg orig_src1
)
727 int done_mask
= ~dst
.writemask
;
729 /* TGSI RCP is a scalar operation splatting results to all channels,
730 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
733 for (i
= 0; i
< 4; i
++) {
734 GLuint this_mask
= (1 << i
);
735 glsl_to_tgsi_instruction
*inst
;
736 st_src_reg src0
= orig_src0
;
737 st_src_reg src1
= orig_src1
;
739 if (done_mask
& this_mask
)
742 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
743 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
744 for (j
= i
+ 1; j
< 4; j
++) {
745 /* If there is another enabled component in the destination that is
746 * derived from the same inputs, generate its value on this pass as
749 if (!(done_mask
& (1 << j
)) &&
750 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
751 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
752 this_mask
|= (1 << j
);
755 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
756 src0_swiz
, src0_swiz
);
757 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
758 src1_swiz
, src1_swiz
);
760 inst
= emit(ir
, op
, dst
, src0
, src1
);
761 inst
->dst
.writemask
= this_mask
;
762 done_mask
|= this_mask
;
767 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
768 st_dst_reg dst
, st_src_reg src0
)
770 st_src_reg undef
= undef_src
;
772 undef
.swizzle
= SWIZZLE_XXXX
;
774 emit_scalar(ir
, op
, dst
, src0
, undef
);
778 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
779 st_dst_reg dst
, st_src_reg src0
)
781 int op
= TGSI_OPCODE_ARL
;
783 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
784 op
= TGSI_OPCODE_UARL
;
786 emit(NULL
, op
, dst
, src0
);
790 * Emit an TGSI_OPCODE_SCS instruction
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
806 const st_src_reg
&src
)
808 /* Vertex programs cannot use the SCS opcode.
810 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
811 emit_scalar(ir
, op
, dst
, src
);
815 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
816 const unsigned scs_mask
= (1U << component
);
817 int done_mask
= ~dst
.writemask
;
820 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
825 if (scs_mask
!= unsigned(dst
.writemask
)) {
826 tmp
= get_temp(glsl_type::vec4_type
);
829 for (unsigned i
= 0; i
< 4; i
++) {
830 unsigned this_mask
= (1U << i
);
831 st_src_reg src0
= src
;
833 if ((done_mask
& this_mask
) != 0)
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
842 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
844 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
845 src0_swiz
, src0_swiz
);
846 for (unsigned j
= i
+ 1; j
< 4; j
++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
851 if (!(done_mask
& (1 << j
)) &&
852 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
853 this_mask
|= (1 << j
);
857 if (this_mask
!= scs_mask
) {
858 glsl_to_tgsi_instruction
*inst
;
859 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
861 /* Emit the SCS instruction.
863 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
864 inst
->dst
.writemask
= scs_mask
;
866 /* Move the result of the SCS instruction to the desired location in
869 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
870 component
, component
);
871 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
872 inst
->dst
.writemask
= this_mask
;
874 /* Emit the SCS instruction to write directly to the destination.
876 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
877 inst
->dst
.writemask
= scs_mask
;
880 done_mask
|= this_mask
;
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
886 gl_constant_value values
[4], int size
, int datatype
,
889 if (file
== PROGRAM_CONSTANT
) {
890 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
891 size
, datatype
, swizzle_out
);
894 immediate_storage
*entry
;
895 assert(file
== PROGRAM_IMMEDIATE
);
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
900 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
901 entry
= (immediate_storage
*)iter
.get();
903 if (entry
->size
== size
&&
904 entry
->type
== datatype
&&
905 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
911 /* Add this immediate to the list. */
912 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
913 this->immediates
.push_tail(entry
);
914 this->num_immediates
++;
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
922 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
923 union gl_constant_value uval
;
926 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
934 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
935 union gl_constant_value uval
;
937 assert(native_integers
);
940 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
949 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
950 st_src_reg_for_int(val
);
952 return st_src_reg_for_float(val
);
956 type_size(const struct glsl_type
*type
)
961 switch (type
->base_type
) {
964 case GLSL_TYPE_FLOAT
:
966 if (type
->is_matrix()) {
967 return type
->matrix_columns
;
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
976 case GLSL_TYPE_ARRAY
:
977 assert(type
->length
> 0);
978 return type_size(type
->fields
.array
) * type
->length
;
979 case GLSL_TYPE_STRUCT
:
981 for (i
= 0; i
< type
->length
; i
++) {
982 size
+= type_size(type
->fields
.structure
[i
].type
);
985 case GLSL_TYPE_SAMPLER
:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
990 case GLSL_TYPE_INTERFACE
:
992 case GLSL_TYPE_ERROR
:
993 assert(!"Invalid type in type_size");
1000 * In the initial pass of codegen, we assign temporary numbers to
1001 * intermediate results. (not SSA -- variable assignments will reuse
1005 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1009 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1013 if (!options
->EmitNoIndirectTemp
&&
1014 (type
->is_array() || type
->is_matrix())) {
1016 src
.file
= PROGRAM_ARRAY
;
1017 src
.index
= next_array
<< 16 | 0x8000;
1018 array_sizes
[next_array
] = type_size(type
);
1022 src
.file
= PROGRAM_TEMPORARY
;
1023 src
.index
= next_temp
;
1024 next_temp
+= type_size(type
);
1027 if (type
->is_array() || type
->is_record()) {
1028 src
.swizzle
= SWIZZLE_NOOP
;
1030 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1037 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1040 variable_storage
*entry
;
1042 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1043 entry
= (variable_storage
*)iter
.get();
1045 if (entry
->var
== var
)
1053 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1055 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1056 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1058 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1059 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1062 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1064 const ir_state_slot
*const slots
= ir
->state_slots
;
1065 assert(ir
->state_slots
!= NULL
);
1067 /* Check if this statevar's setup in the STATE file exactly
1068 * matches how we'll want to reference it as a
1069 * struct/array/whatever. If not, then we need to move it into
1070 * temporary storage and hope that it'll get copy-propagated
1073 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1074 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1079 variable_storage
*storage
;
1081 if (i
== ir
->num_state_slots
) {
1082 /* We'll set the index later. */
1083 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1084 this->variables
.push_tail(storage
);
1088 /* The variable_storage constructor allocates slots based on the size
1089 * of the type. However, this had better match the number of state
1090 * elements that we're going to copy into the new temporary.
1092 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1094 dst
= st_dst_reg(get_temp(ir
->type
));
1096 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1098 this->variables
.push_tail(storage
);
1102 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1103 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1104 (gl_state_index
*)slots
[i
].tokens
);
1106 if (storage
->file
== PROGRAM_STATE_VAR
) {
1107 if (storage
->index
== -1) {
1108 storage
->index
= index
;
1110 assert(index
== storage
->index
+ (int)i
);
1113 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1114 * the data being moved since MOV does not care about the type of
1115 * data it is moving, and we don't want to declare registers with
1116 * array or struct types.
1118 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1119 src
.swizzle
= slots
[i
].swizzle
;
1120 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1121 /* even a float takes up a whole vec4 reg in a struct/array. */
1126 if (storage
->file
== PROGRAM_TEMPORARY
&&
1127 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1128 fail_link(this->shader_program
,
1129 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1130 ir
->name
, dst
.index
- storage
->index
,
1131 type_size(ir
->type
));
1137 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1139 ir_dereference_variable
*counter
= NULL
;
1141 if (ir
->counter
!= NULL
)
1142 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1144 if (ir
->from
!= NULL
) {
1145 assert(ir
->counter
!= NULL
);
1147 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1153 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1157 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1159 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1161 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1163 if_stmt
->then_instructions
.push_tail(brk
);
1165 if_stmt
->accept(this);
1172 visit_exec_list(&ir
->body_instructions
, this);
1174 if (ir
->increment
) {
1176 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1177 counter
, ir
->increment
);
1179 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1186 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1190 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1193 case ir_loop_jump::jump_break
:
1194 emit(NULL
, TGSI_OPCODE_BRK
);
1196 case ir_loop_jump::jump_continue
:
1197 emit(NULL
, TGSI_OPCODE_CONT
);
1204 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1211 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1213 /* Ignore function bodies other than main() -- we shouldn't see calls to
1214 * them since they should all be inlined before we get to glsl_to_tgsi.
1216 if (strcmp(ir
->name
, "main") == 0) {
1217 const ir_function_signature
*sig
;
1220 sig
= ir
->matching_signature(&empty
);
1224 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1225 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1233 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1235 int nonmul_operand
= 1 - mul_operand
;
1237 st_dst_reg result_dst
;
1239 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1240 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1243 expr
->operands
[0]->accept(this);
1245 expr
->operands
[1]->accept(this);
1247 ir
->operands
[nonmul_operand
]->accept(this);
1250 this->result
= get_temp(ir
->type
);
1251 result_dst
= st_dst_reg(this->result
);
1252 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1253 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1259 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1261 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1262 * implemented using multiplication, and logical-or is implemented using
1263 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1264 * As result, the logical expression (a & !b) can be rewritten as:
1268 * - (a * 1) - (a * b)
1272 * This final expression can be implemented as a single MAD(a, -b, a)
1276 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1278 const int other_operand
= 1 - try_operand
;
1281 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1282 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1285 ir
->operands
[other_operand
]->accept(this);
1287 expr
->operands
[0]->accept(this);
1290 b
.negate
= ~b
.negate
;
1292 this->result
= get_temp(ir
->type
);
1293 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1299 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1301 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1303 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1304 !st_context(this->ctx
)->has_shader_model3
) {
1308 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1312 sat_src
->accept(this);
1313 st_src_reg src
= this->result
;
1315 /* If we generated an expression instruction into a temporary in
1316 * processing the saturate's operand, apply the saturate to that
1317 * instruction. Otherwise, generate a MOV to do the saturate.
1319 * Note that we have to be careful to only do this optimization if
1320 * the instruction in question was what generated src->result. For
1321 * example, ir_dereference_array might generate a MUL instruction
1322 * to create the reladdr, and return us a src reg using that
1323 * reladdr. That MUL result is not the value we're trying to
1326 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1327 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1328 sat_src_expr
->operation
== ir_binop_add
||
1329 sat_src_expr
->operation
== ir_binop_dot
)) {
1330 glsl_to_tgsi_instruction
*new_inst
;
1331 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1332 new_inst
->saturate
= true;
1334 this->result
= get_temp(ir
->type
);
1335 st_dst_reg result_dst
= st_dst_reg(this->result
);
1336 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1337 glsl_to_tgsi_instruction
*inst
;
1338 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1339 inst
->saturate
= true;
1346 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1347 st_src_reg
*reg
, int *num_reladdr
)
1352 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1354 if (*num_reladdr
!= 1) {
1355 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1357 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1365 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1367 unsigned int operand
;
1368 st_src_reg op
[Elements(ir
->operands
)];
1369 st_src_reg result_src
;
1370 st_dst_reg result_dst
;
1372 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1374 if (ir
->operation
== ir_binop_add
) {
1375 if (try_emit_mad(ir
, 1))
1377 if (try_emit_mad(ir
, 0))
1381 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1383 if (ir
->operation
== ir_binop_logic_and
) {
1384 if (try_emit_mad_for_and_not(ir
, 1))
1386 if (try_emit_mad_for_and_not(ir
, 0))
1390 if (try_emit_sat(ir
))
1393 if (ir
->operation
== ir_quadop_vector
)
1394 assert(!"ir_quadop_vector should have been lowered");
1396 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1397 this->result
.file
= PROGRAM_UNDEFINED
;
1398 ir
->operands
[operand
]->accept(this);
1399 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1400 printf("Failed to get tree for expression operand:\n");
1401 ir
->operands
[operand
]->print();
1405 op
[operand
] = this->result
;
1407 /* Matrix expression operands should have been broken down to vector
1408 * operations already.
1410 assert(!ir
->operands
[operand
]->type
->is_matrix());
1413 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1414 if (ir
->operands
[1]) {
1415 vector_elements
= MAX2(vector_elements
,
1416 ir
->operands
[1]->type
->vector_elements
);
1419 this->result
.file
= PROGRAM_UNDEFINED
;
1421 /* Storage for our result. Ideally for an assignment we'd be using
1422 * the actual storage for the result here, instead.
1424 result_src
= get_temp(ir
->type
);
1425 /* convenience for the emit functions below. */
1426 result_dst
= st_dst_reg(result_src
);
1427 /* Limit writes to the channels that will be used by result_src later.
1428 * This does limit this temp's use as a temporary for multi-instruction
1431 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1433 switch (ir
->operation
) {
1434 case ir_unop_logic_not
:
1435 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1436 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1438 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1439 * older GPUs implement SEQ using multiple instructions (i915 uses two
1440 * SGE instructions and a MUL instruction). Since our logic values are
1441 * 0.0 and 1.0, 1-x also implements !x.
1443 op
[0].negate
= ~op
[0].negate
;
1444 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1448 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1449 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1451 op
[0].negate
= ~op
[0].negate
;
1456 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1459 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1462 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1466 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1470 assert(!"not reached: should be handled by ir_explog_to_explog2");
1473 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1476 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1479 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1481 case ir_unop_sin_reduced
:
1482 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1484 case ir_unop_cos_reduced
:
1485 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1489 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1493 /* The X component contains 1 or -1 depending on whether the framebuffer
1494 * is a FBO or the window system buffer, respectively.
1495 * It is then multiplied with the source operand of DDY.
1497 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1498 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1500 unsigned transform_y_index
=
1501 _mesa_add_state_reference(this->prog
->Parameters
,
1504 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1506 glsl_type::vec4_type
);
1507 transform_y
.swizzle
= SWIZZLE_XXXX
;
1509 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1511 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1512 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1516 case ir_unop_noise
: {
1517 /* At some point, a motivated person could add a better
1518 * implementation of noise. Currently not even the nvidia
1519 * binary drivers do anything more than this. In any case, the
1520 * place to do this is in the GL state tracker, not the poor
1523 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1528 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1531 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1535 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1538 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1539 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1541 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1544 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1545 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1547 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1551 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1553 case ir_binop_greater
:
1554 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1556 case ir_binop_lequal
:
1557 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1559 case ir_binop_gequal
:
1560 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1562 case ir_binop_equal
:
1563 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1565 case ir_binop_nequal
:
1566 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1568 case ir_binop_all_equal
:
1569 /* "==" operator producing a scalar boolean. */
1570 if (ir
->operands
[0]->type
->is_vector() ||
1571 ir
->operands
[1]->type
->is_vector()) {
1572 st_src_reg temp
= get_temp(native_integers
?
1573 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1574 glsl_type::vec4_type
);
1576 if (native_integers
) {
1577 st_dst_reg temp_dst
= st_dst_reg(temp
);
1578 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1580 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1582 /* Emit 1-3 AND operations to combine the SEQ results. */
1583 switch (ir
->operands
[0]->type
->vector_elements
) {
1587 temp_dst
.writemask
= WRITEMASK_Y
;
1588 temp1
.swizzle
= SWIZZLE_YYYY
;
1589 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1590 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1593 temp_dst
.writemask
= WRITEMASK_X
;
1594 temp1
.swizzle
= SWIZZLE_XXXX
;
1595 temp2
.swizzle
= SWIZZLE_YYYY
;
1596 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1597 temp_dst
.writemask
= WRITEMASK_Y
;
1598 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1599 temp2
.swizzle
= SWIZZLE_WWWW
;
1600 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1603 temp1
.swizzle
= SWIZZLE_XXXX
;
1604 temp2
.swizzle
= SWIZZLE_YYYY
;
1605 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1607 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1609 /* After the dot-product, the value will be an integer on the
1610 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1612 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1614 /* Negating the result of the dot-product gives values on the range
1615 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1616 * This is achieved using SGE.
1618 st_src_reg sge_src
= result_src
;
1619 sge_src
.negate
= ~sge_src
.negate
;
1620 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1623 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1626 case ir_binop_any_nequal
:
1627 /* "!=" operator producing a scalar boolean. */
1628 if (ir
->operands
[0]->type
->is_vector() ||
1629 ir
->operands
[1]->type
->is_vector()) {
1630 st_src_reg temp
= get_temp(native_integers
?
1631 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1632 glsl_type::vec4_type
);
1633 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1635 if (native_integers
) {
1636 st_dst_reg temp_dst
= st_dst_reg(temp
);
1637 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1639 /* Emit 1-3 OR operations to combine the SNE results. */
1640 switch (ir
->operands
[0]->type
->vector_elements
) {
1644 temp_dst
.writemask
= WRITEMASK_Y
;
1645 temp1
.swizzle
= SWIZZLE_YYYY
;
1646 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1647 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1650 temp_dst
.writemask
= WRITEMASK_X
;
1651 temp1
.swizzle
= SWIZZLE_XXXX
;
1652 temp2
.swizzle
= SWIZZLE_YYYY
;
1653 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1654 temp_dst
.writemask
= WRITEMASK_Y
;
1655 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1656 temp2
.swizzle
= SWIZZLE_WWWW
;
1657 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1660 temp1
.swizzle
= SWIZZLE_XXXX
;
1661 temp2
.swizzle
= SWIZZLE_YYYY
;
1662 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1664 /* After the dot-product, the value will be an integer on the
1665 * range [0,4]. Zero stays zero, and positive values become 1.0.
1667 glsl_to_tgsi_instruction
*const dp
=
1668 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1669 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1670 /* The clamping to [0,1] can be done for free in the fragment
1671 * shader with a saturate.
1673 dp
->saturate
= true;
1675 /* Negating the result of the dot-product gives values on the range
1676 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1677 * achieved using SLT.
1679 st_src_reg slt_src
= result_src
;
1680 slt_src
.negate
= ~slt_src
.negate
;
1681 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1685 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1690 assert(ir
->operands
[0]->type
->is_vector());
1692 /* After the dot-product, the value will be an integer on the
1693 * range [0,4]. Zero stays zero, and positive values become 1.0.
1695 glsl_to_tgsi_instruction
*const dp
=
1696 emit_dp(ir
, result_dst
, op
[0], op
[0],
1697 ir
->operands
[0]->type
->vector_elements
);
1698 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1699 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate.
1703 dp
->saturate
= true;
1704 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1705 /* Negating the result of the dot-product gives values on the range
1706 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1709 st_src_reg slt_src
= result_src
;
1710 slt_src
.negate
= ~slt_src
.negate
;
1711 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1714 /* Use SNE 0 if integers are being used as boolean values. */
1715 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1720 case ir_binop_logic_xor
:
1721 if (native_integers
)
1722 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1724 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1727 case ir_binop_logic_or
: {
1728 if (native_integers
) {
1729 /* If integers are used as booleans, we can use an actual "or"
1732 assert(native_integers
);
1733 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1735 /* After the addition, the value will be an integer on the
1736 * range [0,2]. Zero stays zero, and positive values become 1.0.
1738 glsl_to_tgsi_instruction
*add
=
1739 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1740 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1741 /* The clamping to [0,1] can be done for free in the fragment
1742 * shader with a saturate if floats are being used as boolean values.
1744 add
->saturate
= true;
1746 /* Negating the result of the addition gives values on the range
1747 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1748 * is achieved using SLT.
1750 st_src_reg slt_src
= result_src
;
1751 slt_src
.negate
= ~slt_src
.negate
;
1752 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1758 case ir_binop_logic_and
:
1759 /* If native integers are disabled, the bool args are stored as float 0.0
1760 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1761 * actual AND opcode.
1763 if (native_integers
)
1764 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1766 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1770 assert(ir
->operands
[0]->type
->is_vector());
1771 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1772 emit_dp(ir
, result_dst
, op
[0], op
[1],
1773 ir
->operands
[0]->type
->vector_elements
);
1778 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1781 /* sqrt(x) = x * rsq(x). */
1782 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1783 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1784 /* For incoming channels <= 0, set the result to 0. */
1785 op
[0].negate
= ~op
[0].negate
;
1786 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1787 op
[0], result_src
, st_src_reg_for_float(0.0));
1791 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1794 if (native_integers
) {
1795 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1798 /* fallthrough to next case otherwise */
1800 if (native_integers
) {
1801 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1804 /* fallthrough to next case otherwise */
1807 /* Converting between signed and unsigned integers is a no-op. */
1811 if (native_integers
) {
1812 /* Booleans are stored as integers using ~0 for true and 0 for false.
1813 * GLSL requires that int(bool) return 1 for true and 0 for false.
1814 * This conversion is done with AND, but it could be done with NEG.
1816 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1818 /* Booleans and integers are both stored as floats when native
1819 * integers are disabled.
1825 if (native_integers
)
1826 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1828 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1831 if (native_integers
)
1832 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1834 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1836 case ir_unop_bitcast_f2i
:
1838 result_src
.type
= GLSL_TYPE_INT
;
1840 case ir_unop_bitcast_f2u
:
1842 result_src
.type
= GLSL_TYPE_UINT
;
1844 case ir_unop_bitcast_i2f
:
1845 case ir_unop_bitcast_u2f
:
1847 result_src
.type
= GLSL_TYPE_FLOAT
;
1850 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1853 if (native_integers
)
1854 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1856 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1859 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1862 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1865 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1867 case ir_unop_round_even
:
1868 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1871 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1875 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1878 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1881 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1884 case ir_unop_bit_not
:
1885 if (native_integers
) {
1886 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1890 if (native_integers
) {
1891 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1894 case ir_binop_lshift
:
1895 if (native_integers
) {
1896 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1899 case ir_binop_rshift
:
1900 if (native_integers
) {
1901 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1904 case ir_binop_bit_and
:
1905 if (native_integers
) {
1906 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1909 case ir_binop_bit_xor
:
1910 if (native_integers
) {
1911 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1914 case ir_binop_bit_or
:
1915 if (native_integers
) {
1916 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1920 assert(!"GLSL 1.30 features unsupported");
1923 case ir_binop_ubo_load
: {
1924 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1925 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1926 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1927 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1930 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1931 cbuf
.file
= PROGRAM_CONSTANT
;
1933 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1934 cbuf
.reladdr
= NULL
;
1937 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1939 if (const_offset_ir
) {
1940 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1942 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1945 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1946 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1947 const_offset
% 16 / 4,
1948 const_offset
% 16 / 4,
1949 const_offset
% 16 / 4);
1951 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1952 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1954 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1955 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1957 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1962 /* note: we have to reorder the three args here */
1963 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1965 case ir_unop_pack_snorm_2x16
:
1966 case ir_unop_pack_unorm_2x16
:
1967 case ir_unop_pack_half_2x16
:
1968 case ir_unop_pack_snorm_4x8
:
1969 case ir_unop_pack_unorm_4x8
:
1970 case ir_unop_unpack_snorm_2x16
:
1971 case ir_unop_unpack_unorm_2x16
:
1972 case ir_unop_unpack_half_2x16
:
1973 case ir_unop_unpack_half_2x16_split_x
:
1974 case ir_unop_unpack_half_2x16_split_y
:
1975 case ir_unop_unpack_snorm_4x8
:
1976 case ir_unop_unpack_unorm_4x8
:
1977 case ir_binop_pack_half_2x16_split
:
1978 case ir_unop_bitfield_reverse
:
1979 case ir_unop_bit_count
:
1980 case ir_unop_find_msb
:
1981 case ir_unop_find_lsb
:
1984 case ir_triop_bitfield_extract
:
1985 case ir_quadop_bitfield_insert
:
1986 case ir_quadop_vector
:
1987 case ir_binop_vector_extract
:
1988 case ir_triop_vector_insert
:
1989 /* This operation is not supported, or should have already been handled.
1991 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1995 this->result
= result_src
;
2000 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
2006 /* Note that this is only swizzles in expressions, not those on the left
2007 * hand side of an assignment, which do write masking. See ir_assignment
2011 ir
->val
->accept(this);
2013 assert(src
.file
!= PROGRAM_UNDEFINED
);
2015 for (i
= 0; i
< 4; i
++) {
2016 if (i
< ir
->type
->vector_elements
) {
2019 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2022 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2025 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2028 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2032 /* If the type is smaller than a vec4, replicate the last
2035 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2039 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2045 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2047 variable_storage
*entry
= find_variable_storage(ir
->var
);
2048 ir_variable
*var
= ir
->var
;
2051 switch (var
->mode
) {
2052 case ir_var_uniform
:
2053 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2055 this->variables
.push_tail(entry
);
2057 case ir_var_shader_in
:
2058 /* The linker assigns locations for varyings and attributes,
2059 * including deprecated builtins (like gl_Color), user-assign
2060 * generic attributes (glBindVertexLocation), and
2061 * user-defined varyings.
2063 assert(var
->location
!= -1);
2064 entry
= new(mem_ctx
) variable_storage(var
,
2068 case ir_var_shader_out
:
2069 assert(var
->location
!= -1);
2070 entry
= new(mem_ctx
) variable_storage(var
,
2072 var
->location
+ var
->index
);
2074 case ir_var_system_value
:
2075 entry
= new(mem_ctx
) variable_storage(var
,
2076 PROGRAM_SYSTEM_VALUE
,
2080 case ir_var_temporary
:
2081 st_src_reg src
= get_temp(var
->type
);
2083 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2084 this->variables
.push_tail(entry
);
2090 printf("Failed to make storage for %s\n", var
->name
);
2095 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2096 if (!native_integers
)
2097 this->result
.type
= GLSL_TYPE_FLOAT
;
2101 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2105 int element_size
= type_size(ir
->type
);
2107 index
= ir
->array_index
->constant_expression_value();
2109 ir
->array
->accept(this);
2113 src
.index
+= index
->value
.i
[0] * element_size
;
2115 /* Variable index array dereference. It eats the "vec4" of the
2116 * base of the array and an index that offsets the TGSI register
2119 ir
->array_index
->accept(this);
2121 st_src_reg index_reg
;
2123 if (element_size
== 1) {
2124 index_reg
= this->result
;
2126 index_reg
= get_temp(native_integers
?
2127 glsl_type::int_type
: glsl_type::float_type
);
2129 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2130 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2133 /* If there was already a relative address register involved, add the
2134 * new and the old together to get the new offset.
2136 if (src
.reladdr
!= NULL
) {
2137 st_src_reg accum_reg
= get_temp(native_integers
?
2138 glsl_type::int_type
: glsl_type::float_type
);
2140 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2141 index_reg
, *src
.reladdr
);
2143 index_reg
= accum_reg
;
2146 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2147 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2150 /* If the type is smaller than a vec4, replicate the last channel out. */
2151 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2152 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2154 src
.swizzle
= SWIZZLE_NOOP
;
2156 /* Change the register type to the element type of the array. */
2157 src
.type
= ir
->type
->base_type
;
2163 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2166 const glsl_type
*struct_type
= ir
->record
->type
;
2169 ir
->record
->accept(this);
2171 for (i
= 0; i
< struct_type
->length
; i
++) {
2172 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2174 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2177 /* If the type is smaller than a vec4, replicate the last channel out. */
2178 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2179 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2181 this->result
.swizzle
= SWIZZLE_NOOP
;
2183 this->result
.index
+= offset
;
2184 this->result
.type
= ir
->type
->base_type
;
2188 * We want to be careful in assignment setup to hit the actual storage
2189 * instead of potentially using a temporary like we might with the
2190 * ir_dereference handler.
2193 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2195 /* The LHS must be a dereference. If the LHS is a variable indexed array
2196 * access of a vector, it must be separated into a series conditional moves
2197 * before reaching this point (see ir_vec_index_to_cond_assign).
2199 assert(ir
->as_dereference());
2200 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2202 assert(!deref_array
->array
->type
->is_vector());
2205 /* Use the rvalue deref handler for the most part. We'll ignore
2206 * swizzles in it and write swizzles using writemask, though.
2209 return st_dst_reg(v
->result
);
2213 * Process the condition of a conditional assignment
2215 * Examines the condition of a conditional assignment to generate the optimal
2216 * first operand of a \c CMP instruction. If the condition is a relational
2217 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2218 * used as the source for the \c CMP instruction. Otherwise the comparison
2219 * is processed to a boolean result, and the boolean result is used as the
2220 * operand to the CMP instruction.
2223 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2225 ir_rvalue
*src_ir
= ir
;
2227 bool switch_order
= false;
2229 ir_expression
*const expr
= ir
->as_expression();
2230 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2231 bool zero_on_left
= false;
2233 if (expr
->operands
[0]->is_zero()) {
2234 src_ir
= expr
->operands
[1];
2235 zero_on_left
= true;
2236 } else if (expr
->operands
[1]->is_zero()) {
2237 src_ir
= expr
->operands
[0];
2238 zero_on_left
= false;
2242 * (a < 0) T F F ( a < 0) T F F
2243 * (0 < a) F F T (-a < 0) F F T
2244 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2245 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2246 * (a > 0) F F T (-a < 0) F F T
2247 * (0 > a) T F F ( a < 0) T F F
2248 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2249 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2251 * Note that exchanging the order of 0 and 'a' in the comparison simply
2252 * means that the value of 'a' should be negated.
2255 switch (expr
->operation
) {
2257 switch_order
= false;
2258 negate
= zero_on_left
;
2261 case ir_binop_greater
:
2262 switch_order
= false;
2263 negate
= !zero_on_left
;
2266 case ir_binop_lequal
:
2267 switch_order
= true;
2268 negate
= !zero_on_left
;
2271 case ir_binop_gequal
:
2272 switch_order
= true;
2273 negate
= zero_on_left
;
2277 /* This isn't the right kind of comparison afterall, so make sure
2278 * the whole condition is visited.
2286 src_ir
->accept(this);
2288 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2289 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2290 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2291 * computing the condition.
2294 this->result
.negate
= ~this->result
.negate
;
2296 return switch_order
;
2300 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2301 st_dst_reg
*l
, st_src_reg
*r
)
2303 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2304 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2305 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2310 if (type
->is_array()) {
2311 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2312 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2317 if (type
->is_matrix()) {
2318 const struct glsl_type
*vec_type
;
2320 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2321 type
->vector_elements
, 1);
2323 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2324 emit_block_mov(ir
, vec_type
, l
, r
);
2329 assert(type
->is_scalar() || type
->is_vector());
2331 r
->type
= type
->base_type
;
2332 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2338 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2344 ir
->rhs
->accept(this);
2347 l
= get_assignment_lhs(ir
->lhs
, this);
2349 /* FINISHME: This should really set to the correct maximal writemask for each
2350 * FINISHME: component written (in the loops below). This case can only
2351 * FINISHME: occur for matrices, arrays, and structures.
2353 if (ir
->write_mask
== 0) {
2354 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2355 l
.writemask
= WRITEMASK_XYZW
;
2356 } else if (ir
->lhs
->type
->is_scalar() &&
2357 ir
->lhs
->variable_referenced()->mode
== ir_var_shader_out
) {
2358 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2359 * FINISHME: W component of fragment shader output zero, work correctly.
2361 l
.writemask
= WRITEMASK_XYZW
;
2364 int first_enabled_chan
= 0;
2367 l
.writemask
= ir
->write_mask
;
2369 for (int i
= 0; i
< 4; i
++) {
2370 if (l
.writemask
& (1 << i
)) {
2371 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2376 /* Swizzle a small RHS vector into the channels being written.
2378 * glsl ir treats write_mask as dictating how many channels are
2379 * present on the RHS while TGSI treats write_mask as just
2380 * showing which channels of the vec4 RHS get written.
2382 for (int i
= 0; i
< 4; i
++) {
2383 if (l
.writemask
& (1 << i
))
2384 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2386 swizzles
[i
] = first_enabled_chan
;
2388 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2389 swizzles
[2], swizzles
[3]);
2392 assert(l
.file
!= PROGRAM_UNDEFINED
);
2393 assert(r
.file
!= PROGRAM_UNDEFINED
);
2395 if (ir
->condition
) {
2396 const bool switch_order
= this->process_move_condition(ir
->condition
);
2397 st_src_reg condition
= this->result
;
2399 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2400 st_src_reg l_src
= st_src_reg(l
);
2401 st_src_reg condition_temp
= condition
;
2402 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2404 if (native_integers
) {
2405 /* This is necessary because TGSI's CMP instruction expects the
2406 * condition to be a float, and we store booleans as integers.
2407 * TODO: really want to avoid i2f path and use UCMP. Requires
2408 * changes to process_move_condition though too.
2410 condition_temp
= get_temp(glsl_type::vec4_type
);
2411 condition
.negate
= 0;
2412 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2413 condition_temp
.swizzle
= condition
.swizzle
;
2417 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2419 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2425 } else if (ir
->rhs
->as_expression() &&
2426 this->instructions
.get_tail() &&
2427 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2428 type_size(ir
->lhs
->type
) == 1 &&
2429 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2430 /* To avoid emitting an extra MOV when assigning an expression to a
2431 * variable, emit the last instruction of the expression again, but
2432 * replace the destination register with the target of the assignment.
2433 * Dead code elimination will remove the original instruction.
2435 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2436 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2437 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2438 new_inst
->saturate
= inst
->saturate
;
2439 inst
->dead_mask
= inst
->dst
.writemask
;
2441 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2447 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2450 GLfloat stack_vals
[4] = { 0 };
2451 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2452 GLenum gl_type
= GL_NONE
;
2454 static int in_array
= 0;
2455 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2457 /* Unfortunately, 4 floats is all we can get into
2458 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2459 * aggregate constant and move each constant value into it. If we
2460 * get lucky, copy propagation will eliminate the extra moves.
2462 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2463 st_src_reg temp_base
= get_temp(ir
->type
);
2464 st_dst_reg temp
= st_dst_reg(temp_base
);
2466 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2467 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2468 int size
= type_size(field_value
->type
);
2472 field_value
->accept(this);
2475 for (i
= 0; i
< (unsigned int)size
; i
++) {
2476 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2482 this->result
= temp_base
;
2486 if (ir
->type
->is_array()) {
2487 st_src_reg temp_base
= get_temp(ir
->type
);
2488 st_dst_reg temp
= st_dst_reg(temp_base
);
2489 int size
= type_size(ir
->type
->fields
.array
);
2494 for (i
= 0; i
< ir
->type
->length
; i
++) {
2495 ir
->array_elements
[i
]->accept(this);
2497 for (int j
= 0; j
< size
; j
++) {
2498 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2504 this->result
= temp_base
;
2509 if (ir
->type
->is_matrix()) {
2510 st_src_reg mat
= get_temp(ir
->type
);
2511 st_dst_reg mat_column
= st_dst_reg(mat
);
2513 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2514 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2515 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2517 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2518 src
.index
= add_constant(file
,
2520 ir
->type
->vector_elements
,
2523 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2532 switch (ir
->type
->base_type
) {
2533 case GLSL_TYPE_FLOAT
:
2535 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2536 values
[i
].f
= ir
->value
.f
[i
];
2539 case GLSL_TYPE_UINT
:
2540 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2541 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2542 if (native_integers
)
2543 values
[i
].u
= ir
->value
.u
[i
];
2545 values
[i
].f
= ir
->value
.u
[i
];
2549 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2550 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2551 if (native_integers
)
2552 values
[i
].i
= ir
->value
.i
[i
];
2554 values
[i
].f
= ir
->value
.i
[i
];
2557 case GLSL_TYPE_BOOL
:
2558 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2559 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2560 if (native_integers
)
2561 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2563 values
[i
].f
= ir
->value
.b
[i
];
2567 assert(!"Non-float/uint/int/bool constant");
2570 this->result
= st_src_reg(file
, -1, ir
->type
);
2571 this->result
.index
= add_constant(file
,
2573 ir
->type
->vector_elements
,
2575 &this->result
.swizzle
);
2579 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2581 function_entry
*entry
;
2583 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2584 entry
= (function_entry
*)iter
.get();
2586 if (entry
->sig
== sig
)
2590 entry
= ralloc(mem_ctx
, function_entry
);
2592 entry
->sig_id
= this->next_signature_id
++;
2593 entry
->bgn_inst
= NULL
;
2595 /* Allocate storage for all the parameters. */
2596 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2597 ir_variable
*param
= (ir_variable
*)iter
.get();
2598 variable_storage
*storage
;
2600 storage
= find_variable_storage(param
);
2603 st_src_reg src
= get_temp(param
->type
);
2605 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2606 this->variables
.push_tail(storage
);
2609 if (!sig
->return_type
->is_void()) {
2610 entry
->return_reg
= get_temp(sig
->return_type
);
2612 entry
->return_reg
= undef_src
;
2615 this->function_signatures
.push_tail(entry
);
2620 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2622 glsl_to_tgsi_instruction
*call_inst
;
2623 ir_function_signature
*sig
= ir
->callee
;
2624 function_entry
*entry
= get_function_signature(sig
);
2627 /* Process in parameters. */
2628 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2629 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2630 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2631 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2633 if (param
->mode
== ir_var_function_in
||
2634 param
->mode
== ir_var_function_inout
) {
2635 variable_storage
*storage
= find_variable_storage(param
);
2638 param_rval
->accept(this);
2639 st_src_reg r
= this->result
;
2642 l
.file
= storage
->file
;
2643 l
.index
= storage
->index
;
2645 l
.writemask
= WRITEMASK_XYZW
;
2646 l
.cond_mask
= COND_TR
;
2648 for (i
= 0; i
< type_size(param
->type
); i
++) {
2649 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2657 assert(!sig_iter
.has_next());
2659 /* Emit call instruction */
2660 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2661 call_inst
->function
= entry
;
2663 /* Process out parameters. */
2664 sig_iter
= sig
->parameters
.iterator();
2665 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2666 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2667 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2669 if (param
->mode
== ir_var_function_out
||
2670 param
->mode
== ir_var_function_inout
) {
2671 variable_storage
*storage
= find_variable_storage(param
);
2675 r
.file
= storage
->file
;
2676 r
.index
= storage
->index
;
2678 r
.swizzle
= SWIZZLE_NOOP
;
2681 param_rval
->accept(this);
2682 st_dst_reg l
= st_dst_reg(this->result
);
2684 for (i
= 0; i
< type_size(param
->type
); i
++) {
2685 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2693 assert(!sig_iter
.has_next());
2695 /* Process return value. */
2696 this->result
= entry
->return_reg
;
2700 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2702 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2703 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2704 glsl_to_tgsi_instruction
*inst
= NULL
;
2705 unsigned opcode
= TGSI_OPCODE_NOP
;
2706 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2707 bool is_cube_array
= false;
2709 /* if we are a cube array sampler */
2710 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2711 sampler_type
->sampler_array
)) {
2712 is_cube_array
= true;
2715 if (ir
->coordinate
) {
2716 ir
->coordinate
->accept(this);
2718 /* Put our coords in a temp. We'll need to modify them for shadow,
2719 * projection, or LOD, so the only case we'd use it as is is if
2720 * we're doing plain old texturing. The optimization passes on
2721 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2723 coord
= get_temp(glsl_type::vec4_type
);
2724 coord_dst
= st_dst_reg(coord
);
2725 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2726 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2729 if (ir
->projector
) {
2730 ir
->projector
->accept(this);
2731 projector
= this->result
;
2734 /* Storage for our result. Ideally for an assignment we'd be using
2735 * the actual storage for the result here, instead.
2737 result_src
= get_temp(ir
->type
);
2738 result_dst
= st_dst_reg(result_src
);
2742 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2744 ir
->offset
->accept(this);
2745 offset
= this->result
;
2749 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2750 ir
->lod_info
.bias
->accept(this);
2751 lod_info
= this->result
;
2753 ir
->offset
->accept(this);
2754 offset
= this->result
;
2758 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2759 ir
->lod_info
.lod
->accept(this);
2760 lod_info
= this->result
;
2762 ir
->offset
->accept(this);
2763 offset
= this->result
;
2767 opcode
= TGSI_OPCODE_TXD
;
2768 ir
->lod_info
.grad
.dPdx
->accept(this);
2770 ir
->lod_info
.grad
.dPdy
->accept(this);
2773 ir
->offset
->accept(this);
2774 offset
= this->result
;
2778 opcode
= TGSI_OPCODE_TXQ
;
2779 ir
->lod_info
.lod
->accept(this);
2780 lod_info
= this->result
;
2783 opcode
= TGSI_OPCODE_TXF
;
2784 ir
->lod_info
.lod
->accept(this);
2785 lod_info
= this->result
;
2787 ir
->offset
->accept(this);
2788 offset
= this->result
;
2792 opcode
= TGSI_OPCODE_TXF
;
2793 ir
->lod_info
.sample_index
->accept(this);
2794 sample_index
= this->result
;
2797 assert(!"Unexpected ir_lod opcode");
2801 if (ir
->projector
) {
2802 if (opcode
== TGSI_OPCODE_TEX
) {
2803 /* Slot the projector in as the last component of the coord. */
2804 coord_dst
.writemask
= WRITEMASK_W
;
2805 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2806 coord_dst
.writemask
= WRITEMASK_XYZW
;
2807 opcode
= TGSI_OPCODE_TXP
;
2809 st_src_reg coord_w
= coord
;
2810 coord_w
.swizzle
= SWIZZLE_WWWW
;
2812 /* For the other TEX opcodes there's no projective version
2813 * since the last slot is taken up by LOD info. Do the
2814 * projective divide now.
2816 coord_dst
.writemask
= WRITEMASK_W
;
2817 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2819 /* In the case where we have to project the coordinates "by hand,"
2820 * the shadow comparator value must also be projected.
2822 st_src_reg tmp_src
= coord
;
2823 if (ir
->shadow_comparitor
) {
2824 /* Slot the shadow value in as the second to last component of the
2827 ir
->shadow_comparitor
->accept(this);
2829 tmp_src
= get_temp(glsl_type::vec4_type
);
2830 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2832 /* Projective division not allowed for array samplers. */
2833 assert(!sampler_type
->sampler_array
);
2835 tmp_dst
.writemask
= WRITEMASK_Z
;
2836 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2838 tmp_dst
.writemask
= WRITEMASK_XY
;
2839 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2842 coord_dst
.writemask
= WRITEMASK_XYZ
;
2843 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2845 coord_dst
.writemask
= WRITEMASK_XYZW
;
2846 coord
.swizzle
= SWIZZLE_XYZW
;
2850 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2851 * comparator was put in the correct place (and projected) by the code,
2852 * above, that handles by-hand projection.
2854 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2855 /* Slot the shadow value in as the second to last component of the
2858 ir
->shadow_comparitor
->accept(this);
2860 if (is_cube_array
) {
2861 cube_sc
= get_temp(glsl_type::float_type
);
2862 cube_sc_dst
= st_dst_reg(cube_sc
);
2863 cube_sc_dst
.writemask
= WRITEMASK_X
;
2864 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2865 cube_sc_dst
.writemask
= WRITEMASK_X
;
2868 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2869 sampler_type
->sampler_array
) ||
2870 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2871 coord_dst
.writemask
= WRITEMASK_W
;
2873 coord_dst
.writemask
= WRITEMASK_Z
;
2876 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2877 coord_dst
.writemask
= WRITEMASK_XYZW
;
2881 if (ir
->op
== ir_txf_ms
) {
2882 coord_dst
.writemask
= WRITEMASK_W
;
2883 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2884 coord_dst
.writemask
= WRITEMASK_XYZW
;
2885 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2886 opcode
== TGSI_OPCODE_TXF
) {
2887 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2888 coord_dst
.writemask
= WRITEMASK_W
;
2889 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2890 coord_dst
.writemask
= WRITEMASK_XYZW
;
2893 if (opcode
== TGSI_OPCODE_TXD
)
2894 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2895 else if (opcode
== TGSI_OPCODE_TXQ
)
2896 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2897 else if (opcode
== TGSI_OPCODE_TXF
) {
2898 inst
= emit(ir
, opcode
, result_dst
, coord
);
2899 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2900 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2901 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2902 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2904 inst
= emit(ir
, opcode
, result_dst
, coord
);
2906 if (ir
->shadow_comparitor
)
2907 inst
->tex_shadow
= GL_TRUE
;
2909 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2910 this->shader_program
,
2914 inst
->tex_offset_num_offset
= 1;
2915 inst
->tex_offsets
[0].Index
= offset
.index
;
2916 inst
->tex_offsets
[0].File
= offset
.file
;
2917 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2918 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2919 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2922 switch (sampler_type
->sampler_dimensionality
) {
2923 case GLSL_SAMPLER_DIM_1D
:
2924 inst
->tex_target
= (sampler_type
->sampler_array
)
2925 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2927 case GLSL_SAMPLER_DIM_2D
:
2928 inst
->tex_target
= (sampler_type
->sampler_array
)
2929 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2931 case GLSL_SAMPLER_DIM_3D
:
2932 inst
->tex_target
= TEXTURE_3D_INDEX
;
2934 case GLSL_SAMPLER_DIM_CUBE
:
2935 inst
->tex_target
= (sampler_type
->sampler_array
)
2936 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2938 case GLSL_SAMPLER_DIM_RECT
:
2939 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2941 case GLSL_SAMPLER_DIM_BUF
:
2942 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2944 case GLSL_SAMPLER_DIM_EXTERNAL
:
2945 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2947 case GLSL_SAMPLER_DIM_MS
:
2948 inst
->tex_target
= (sampler_type
->sampler_array
)
2949 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2952 assert(!"Should not get here.");
2955 this->result
= result_src
;
2959 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2961 if (ir
->get_value()) {
2965 assert(current_function
);
2967 ir
->get_value()->accept(this);
2968 st_src_reg r
= this->result
;
2970 l
= st_dst_reg(current_function
->return_reg
);
2972 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2973 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2979 emit(ir
, TGSI_OPCODE_RET
);
2983 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2985 if (ir
->condition
) {
2986 ir
->condition
->accept(this);
2987 this->result
.negate
= ~this->result
.negate
;
2988 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
2990 /* unconditional kil */
2991 emit(ir
, TGSI_OPCODE_KILL
);
2996 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2999 glsl_to_tgsi_instruction
*if_inst
;
3001 ir
->condition
->accept(this);
3002 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3004 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3006 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3008 this->instructions
.push_tail(if_inst
);
3010 visit_exec_list(&ir
->then_instructions
, this);
3012 if (!ir
->else_instructions
.is_empty()) {
3013 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3014 visit_exec_list(&ir
->else_instructions
, this);
3017 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3021 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3023 assert(!"Geometry shaders not supported.");
3027 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3029 assert(!"Geometry shaders not supported.");
3032 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3034 result
.file
= PROGRAM_UNDEFINED
;
3037 next_signature_id
= 1;
3039 current_function
= NULL
;
3040 num_address_regs
= 0;
3042 indirect_addr_consts
= false;
3044 native_integers
= false;
3045 mem_ctx
= ralloc_context(NULL
);
3048 shader_program
= NULL
;
3052 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3054 ralloc_free(mem_ctx
);
3057 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3064 * Count resources used by the given gpu program (number of texture
3068 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3070 v
->samplers_used
= 0;
3072 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3073 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3075 if (is_tex_instruction(inst
->op
)) {
3076 v
->samplers_used
|= 1 << inst
->sampler
;
3078 if (inst
->tex_shadow
) {
3079 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3084 prog
->SamplersUsed
= v
->samplers_used
;
3086 if (v
->shader_program
!= NULL
)
3087 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3091 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3092 struct gl_shader_program
*shader_program
,
3093 const char *name
, const glsl_type
*type
,
3096 if (type
->is_record()) {
3097 ir_constant
*field_constant
;
3099 field_constant
= (ir_constant
*)val
->components
.get_head();
3101 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3102 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3103 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3104 type
->fields
.structure
[i
].name
);
3105 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3106 field_type
, field_constant
);
3107 field_constant
= (ir_constant
*)field_constant
->next
;
3113 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3115 if (offset
== GL_INVALID_INDEX
) {
3116 fail_link(shader_program
,
3117 "Couldn't find uniform for initializer %s\n", name
);
3120 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3122 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3123 ir_constant
*element
;
3124 const glsl_type
*element_type
;
3125 if (type
->is_array()) {
3126 element
= val
->array_elements
[i
];
3127 element_type
= type
->fields
.array
;
3130 element_type
= type
;
3135 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3136 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3137 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3138 conv
[j
] = element
->value
.b
[j
];
3140 values
= (void *)conv
;
3141 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3142 element_type
->vector_elements
,
3145 values
= &element
->value
;
3148 if (element_type
->is_matrix()) {
3149 _mesa_uniform_matrix(ctx
, shader_program
,
3150 element_type
->matrix_columns
,
3151 element_type
->vector_elements
,
3152 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3154 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3155 values
, element_type
->gl_type
);
3163 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3164 * are read from the given src in this instruction
3167 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3169 int read_mask
= 0, comp
;
3171 /* Now, given the src swizzle and the written channels, find which
3172 * components are actually read
3174 for (comp
= 0; comp
< 4; ++comp
) {
3175 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3177 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3178 read_mask
|= 1 << coord
;
3185 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3186 * instruction is the first instruction to write to register T0. There are
3187 * several lowering passes done in GLSL IR (e.g. branches and
3188 * relative addressing) that create a large number of conditional assignments
3189 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3191 * Here is why this conversion is safe:
3192 * CMP T0, T1 T2 T0 can be expanded to:
3198 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3199 * as the original program. If (T1 < 0.0) evaluates to false, executing
3200 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3201 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3202 * because any instruction that was going to read from T0 after this was going
3203 * to read a garbage value anyway.
3206 glsl_to_tgsi_visitor::simplify_cmp(void)
3208 unsigned *tempWrites
;
3209 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3211 tempWrites
= new unsigned[MAX_TEMPS
];
3215 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3216 memset(outputWrites
, 0, sizeof(outputWrites
));
3218 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3219 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3220 unsigned prevWriteMask
= 0;
3222 /* Give up if we encounter relative addressing or flow control. */
3223 if (inst
->dst
.reladdr
||
3224 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3225 inst
->op
== TGSI_OPCODE_BGNSUB
||
3226 inst
->op
== TGSI_OPCODE_CONT
||
3227 inst
->op
== TGSI_OPCODE_END
||
3228 inst
->op
== TGSI_OPCODE_ENDSUB
||
3229 inst
->op
== TGSI_OPCODE_RET
) {
3233 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3234 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3235 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3236 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3237 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3238 assert(inst
->dst
.index
< MAX_TEMPS
);
3239 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3240 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3244 /* For a CMP to be considered a conditional write, the destination
3245 * register and source register two must be the same. */
3246 if (inst
->op
== TGSI_OPCODE_CMP
3247 && !(inst
->dst
.writemask
& prevWriteMask
)
3248 && inst
->src
[2].file
== inst
->dst
.file
3249 && inst
->src
[2].index
== inst
->dst
.index
3250 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3252 inst
->op
= TGSI_OPCODE_MOV
;
3253 inst
->src
[0] = inst
->src
[1];
3257 delete [] tempWrites
;
3260 /* Replaces all references to a temporary register index with another index. */
3262 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3264 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3265 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3268 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3269 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3270 inst
->src
[j
].index
== index
) {
3271 inst
->src
[j
].index
= new_index
;
3275 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3276 inst
->dst
.index
= new_index
;
3282 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3284 int depth
= 0; /* loop depth */
3285 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3288 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3289 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3291 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3292 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3293 inst
->src
[j
].index
== index
) {
3294 return (depth
== 0) ? i
: loop_start
;
3298 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3301 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3314 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3316 int depth
= 0; /* loop depth */
3317 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3320 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3321 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3323 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3324 return (depth
== 0) ? i
: loop_start
;
3327 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3330 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3343 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3345 int depth
= 0; /* loop depth */
3346 int last
= -1; /* index of last instruction that reads the temporary */
3349 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3350 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3352 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3353 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3354 inst
->src
[j
].index
== index
) {
3355 last
= (depth
== 0) ? i
: -2;
3359 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3361 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3362 if (--depth
== 0 && last
== -2)
3374 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3376 int depth
= 0; /* loop depth */
3377 int last
= -1; /* index of last instruction that writes to the temporary */
3380 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3381 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3383 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3384 last
= (depth
== 0) ? i
: -2;
3386 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3388 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3389 if (--depth
== 0 && last
== -2)
3401 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3402 * channels for copy propagation and updates following instructions to
3403 * use the original versions.
3405 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3406 * will occur. As an example, a TXP production before this pass:
3408 * 0: MOV TEMP[1], INPUT[4].xyyy;
3409 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3410 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3414 * 0: MOV TEMP[1], INPUT[4].xyyy;
3415 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3416 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3418 * which allows for dead code elimination on TEMP[1]'s writes.
3421 glsl_to_tgsi_visitor::copy_propagate(void)
3423 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3424 glsl_to_tgsi_instruction
*,
3425 this->next_temp
* 4);
3426 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3429 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3430 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3432 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3433 || inst
->dst
.index
< this->next_temp
);
3435 /* First, do any copy propagation possible into the src regs. */
3436 for (int r
= 0; r
< 3; r
++) {
3437 glsl_to_tgsi_instruction
*first
= NULL
;
3439 int acp_base
= inst
->src
[r
].index
* 4;
3441 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3442 inst
->src
[r
].reladdr
)
3445 /* See if we can find entries in the ACP consisting of MOVs
3446 * from the same src register for all the swizzled channels
3447 * of this src register reference.
3449 for (int i
= 0; i
< 4; i
++) {
3450 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3451 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3458 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3463 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3464 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3472 /* We've now validated that we can copy-propagate to
3473 * replace this src register reference. Do it.
3475 inst
->src
[r
].file
= first
->src
[0].file
;
3476 inst
->src
[r
].index
= first
->src
[0].index
;
3479 for (int i
= 0; i
< 4; i
++) {
3480 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3481 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3482 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3485 inst
->src
[r
].swizzle
= swizzle
;
3490 case TGSI_OPCODE_BGNLOOP
:
3491 case TGSI_OPCODE_ENDLOOP
:
3492 /* End of a basic block, clear the ACP entirely. */
3493 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3496 case TGSI_OPCODE_IF
:
3497 case TGSI_OPCODE_UIF
:
3501 case TGSI_OPCODE_ENDIF
:
3502 case TGSI_OPCODE_ELSE
:
3503 /* Clear all channels written inside the block from the ACP, but
3504 * leaving those that were not touched.
3506 for (int r
= 0; r
< this->next_temp
; r
++) {
3507 for (int c
= 0; c
< 4; c
++) {
3508 if (!acp
[4 * r
+ c
])
3511 if (acp_level
[4 * r
+ c
] >= level
)
3512 acp
[4 * r
+ c
] = NULL
;
3515 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3520 /* Continuing the block, clear any written channels from
3523 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3524 /* Any temporary might be written, so no copy propagation
3525 * across this instruction.
3527 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3528 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3529 inst
->dst
.reladdr
) {
3530 /* Any output might be written, so no copy propagation
3531 * from outputs across this instruction.
3533 for (int r
= 0; r
< this->next_temp
; r
++) {
3534 for (int c
= 0; c
< 4; c
++) {
3535 if (!acp
[4 * r
+ c
])
3538 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3539 acp
[4 * r
+ c
] = NULL
;
3542 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3543 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3544 /* Clear where it's used as dst. */
3545 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3546 for (int c
= 0; c
< 4; c
++) {
3547 if (inst
->dst
.writemask
& (1 << c
)) {
3548 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3553 /* Clear where it's used as src. */
3554 for (int r
= 0; r
< this->next_temp
; r
++) {
3555 for (int c
= 0; c
< 4; c
++) {
3556 if (!acp
[4 * r
+ c
])
3559 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3561 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3562 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3563 inst
->dst
.writemask
& (1 << src_chan
))
3565 acp
[4 * r
+ c
] = NULL
;
3573 /* If this is a copy, add it to the ACP. */
3574 if (inst
->op
== TGSI_OPCODE_MOV
&&
3575 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3576 !(inst
->dst
.file
== inst
->src
[0].file
&&
3577 inst
->dst
.index
== inst
->src
[0].index
) &&
3578 !inst
->dst
.reladdr
&&
3580 !inst
->src
[0].reladdr
&&
3581 !inst
->src
[0].negate
) {
3582 for (int i
= 0; i
< 4; i
++) {
3583 if (inst
->dst
.writemask
& (1 << i
)) {
3584 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3585 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3591 ralloc_free(acp_level
);
3596 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3598 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3599 * will occur. As an example, a TXP production after copy propagation but
3602 * 0: MOV TEMP[1], INPUT[4].xyyy;
3603 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3604 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3606 * and after this pass:
3608 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3610 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3611 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3614 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3618 for (i
=0; i
< this->next_temp
; i
++) {
3619 int last_read
= get_last_temp_read(i
);
3622 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3623 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3625 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3638 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3639 * code elimination. This is less primitive than eliminate_dead_code(), as it
3640 * is per-channel and can detect consecutive writes without a read between them
3641 * as dead code. However, there is some dead code that can be eliminated by
3642 * eliminate_dead_code() but not this function - for example, this function
3643 * cannot eliminate an instruction writing to a register that is never read and
3644 * is the only instruction writing to that register.
3646 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3650 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3652 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3653 glsl_to_tgsi_instruction
*,
3654 this->next_temp
* 4);
3655 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3659 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3660 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3662 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3663 || inst
->dst
.index
< this->next_temp
);
3666 case TGSI_OPCODE_BGNLOOP
:
3667 case TGSI_OPCODE_ENDLOOP
:
3668 case TGSI_OPCODE_CONT
:
3669 case TGSI_OPCODE_BRK
:
3670 /* End of a basic block, clear the write array entirely.
3672 * This keeps us from killing dead code when the writes are
3673 * on either side of a loop, even when the register isn't touched
3674 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3675 * dead code of this type, so it shouldn't make a difference as long as
3676 * the dead code elimination pass in the GLSL compiler does its job.
3678 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3681 case TGSI_OPCODE_ENDIF
:
3682 case TGSI_OPCODE_ELSE
:
3683 /* Promote the recorded level of all channels written inside the
3684 * preceding if or else block to the level above the if/else block.
3686 for (int r
= 0; r
< this->next_temp
; r
++) {
3687 for (int c
= 0; c
< 4; c
++) {
3688 if (!writes
[4 * r
+ c
])
3691 if (write_level
[4 * r
+ c
] == level
)
3692 write_level
[4 * r
+ c
] = level
-1;
3696 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3701 case TGSI_OPCODE_IF
:
3702 case TGSI_OPCODE_UIF
:
3704 /* fallthrough to default case to mark the condition as read */
3707 /* Continuing the block, clear any channels from the write array that
3708 * are read by this instruction.
3710 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3711 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3712 /* Any temporary might be read, so no dead code elimination
3713 * across this instruction.
3715 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3716 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3717 /* Clear where it's used as src. */
3718 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3719 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3720 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3721 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3723 for (int c
= 0; c
< 4; c
++) {
3724 if (src_chans
& (1 << c
)) {
3725 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3733 /* If this instruction writes to a temporary, add it to the write array.
3734 * If there is already an instruction in the write array for one or more
3735 * of the channels, flag that channel write as dead.
3737 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3738 !inst
->dst
.reladdr
&&
3740 for (int c
= 0; c
< 4; c
++) {
3741 if (inst
->dst
.writemask
& (1 << c
)) {
3742 if (writes
[4 * inst
->dst
.index
+ c
]) {
3743 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3746 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3748 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3749 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3755 /* Anything still in the write array at this point is dead code. */
3756 for (int r
= 0; r
< this->next_temp
; r
++) {
3757 for (int c
= 0; c
< 4; c
++) {
3758 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3760 inst
->dead_mask
|= (1 << c
);
3764 /* Now actually remove the instructions that are completely dead and update
3765 * the writemask of other instructions with dead channels.
3767 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3768 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3770 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3772 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3777 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3780 ralloc_free(write_level
);
3781 ralloc_free(writes
);
3786 /* Merges temporary registers together where possible to reduce the number of
3787 * registers needed to run a program.
3789 * Produces optimal code only after copy propagation and dead code elimination
3792 glsl_to_tgsi_visitor::merge_registers(void)
3794 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3795 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3798 /* Read the indices of the last read and first write to each temp register
3799 * into an array so that we don't have to traverse the instruction list as
3801 for (i
=0; i
< this->next_temp
; i
++) {
3802 last_reads
[i
] = get_last_temp_read(i
);
3803 first_writes
[i
] = get_first_temp_write(i
);
3806 /* Start looking for registers with non-overlapping usages that can be
3807 * merged together. */
3808 for (i
=0; i
< this->next_temp
; i
++) {
3809 /* Don't touch unused registers. */
3810 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3812 for (j
=0; j
< this->next_temp
; j
++) {
3813 /* Don't touch unused registers. */
3814 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3816 /* We can merge the two registers if the first write to j is after or
3817 * in the same instruction as the last read from i. Note that the
3818 * register at index i will always be used earlier or at the same time
3819 * as the register at index j. */
3820 if (first_writes
[i
] <= first_writes
[j
] &&
3821 last_reads
[i
] <= first_writes
[j
])
3823 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3825 /* Update the first_writes and last_reads arrays with the new
3826 * values for the merged register index, and mark the newly unused
3827 * register index as such. */
3828 last_reads
[i
] = last_reads
[j
];
3829 first_writes
[j
] = -1;
3835 ralloc_free(last_reads
);
3836 ralloc_free(first_writes
);
3839 /* Reassign indices to temporary registers by reusing unused indices created
3840 * by optimization passes. */
3842 glsl_to_tgsi_visitor::renumber_registers(void)
3847 for (i
=0; i
< this->next_temp
; i
++) {
3848 if (get_first_temp_read(i
) < 0) continue;
3850 rename_temp_register(i
, new_index
);
3854 this->next_temp
= new_index
;
3858 * Returns a fragment program which implements the current pixel transfer ops.
3859 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3862 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3863 glsl_to_tgsi_visitor
*original
,
3864 int scale_and_bias
, int pixel_maps
)
3866 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3867 struct st_context
*st
= st_context(original
->ctx
);
3868 struct gl_program
*prog
= &fp
->Base
.Base
;
3869 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3870 st_src_reg coord
, src0
;
3872 glsl_to_tgsi_instruction
*inst
;
3874 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3875 v
->ctx
= original
->ctx
;
3877 v
->shader_program
= NULL
;
3878 v
->glsl_version
= original
->glsl_version
;
3879 v
->native_integers
= original
->native_integers
;
3880 v
->options
= original
->options
;
3881 v
->next_temp
= original
->next_temp
;
3882 v
->num_address_regs
= original
->num_address_regs
;
3883 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3884 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3885 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3886 v
->num_immediates
= original
->num_immediates
;
3889 * Get initial pixel color from the texture.
3890 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3892 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3893 src0
= v
->get_temp(glsl_type::vec4_type
);
3894 dst0
= st_dst_reg(src0
);
3895 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3897 inst
->tex_target
= TEXTURE_2D_INDEX
;
3899 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3900 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3901 v
->samplers_used
|= (1 << 0);
3903 if (scale_and_bias
) {
3904 static const gl_state_index scale_state
[STATE_LENGTH
] =
3905 { STATE_INTERNAL
, STATE_PT_SCALE
,
3906 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3907 static const gl_state_index bias_state
[STATE_LENGTH
] =
3908 { STATE_INTERNAL
, STATE_PT_BIAS
,
3909 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3910 GLint scale_p
, bias_p
;
3911 st_src_reg scale
, bias
;
3913 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3914 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3916 /* MAD colorTemp, colorTemp, scale, bias; */
3917 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3918 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3919 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3923 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3924 st_dst_reg temp_dst
= st_dst_reg(temp
);
3926 assert(st
->pixel_xfer
.pixelmap_texture
);
3928 /* With a little effort, we can do four pixel map look-ups with
3929 * two TEX instructions:
3932 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3933 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3934 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3936 inst
->tex_target
= TEXTURE_2D_INDEX
;
3938 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3939 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3940 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3941 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3943 inst
->tex_target
= TEXTURE_2D_INDEX
;
3945 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3946 v
->samplers_used
|= (1 << 1);
3948 /* MOV colorTemp, temp; */
3949 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3952 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3954 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3955 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3956 glsl_to_tgsi_instruction
*newinst
;
3957 st_src_reg src_regs
[3];
3959 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3960 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3962 for (int i
=0; i
<3; i
++) {
3963 src_regs
[i
] = inst
->src
[i
];
3964 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3965 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3967 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3968 src_regs
[i
].index
= src0
.index
;
3970 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3971 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3974 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3975 newinst
->tex_target
= inst
->tex_target
;
3978 /* Make modifications to fragment program info. */
3979 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3980 original
->prog
->Parameters
);
3981 _mesa_free_parameter_list(params
);
3982 count_resources(v
, prog
);
3983 fp
->glsl_to_tgsi
= v
;
3987 * Make fragment program for glBitmap:
3988 * Sample the texture and kill the fragment if the bit is 0.
3989 * This program will be combined with the user's fragment program.
3991 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3994 get_bitmap_visitor(struct st_fragment_program
*fp
,
3995 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3997 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3998 struct st_context
*st
= st_context(original
->ctx
);
3999 struct gl_program
*prog
= &fp
->Base
.Base
;
4000 st_src_reg coord
, src0
;
4002 glsl_to_tgsi_instruction
*inst
;
4004 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4005 v
->ctx
= original
->ctx
;
4007 v
->shader_program
= NULL
;
4008 v
->glsl_version
= original
->glsl_version
;
4009 v
->native_integers
= original
->native_integers
;
4010 v
->options
= original
->options
;
4011 v
->next_temp
= original
->next_temp
;
4012 v
->num_address_regs
= original
->num_address_regs
;
4013 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4014 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4015 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4016 v
->num_immediates
= original
->num_immediates
;
4018 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4019 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4020 src0
= v
->get_temp(glsl_type::vec4_type
);
4021 dst0
= st_dst_reg(src0
);
4022 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4023 inst
->sampler
= samplerIndex
;
4024 inst
->tex_target
= TEXTURE_2D_INDEX
;
4026 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4027 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4028 v
->samplers_used
|= (1 << samplerIndex
);
4030 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4031 src0
.negate
= NEGATE_XYZW
;
4032 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4033 src0
.swizzle
= SWIZZLE_XXXX
;
4034 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4036 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4038 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4039 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4040 glsl_to_tgsi_instruction
*newinst
;
4041 st_src_reg src_regs
[3];
4043 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4044 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4046 for (int i
=0; i
<3; i
++) {
4047 src_regs
[i
] = inst
->src
[i
];
4048 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4049 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4052 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4053 newinst
->tex_target
= inst
->tex_target
;
4056 /* Make modifications to fragment program info. */
4057 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4058 count_resources(v
, prog
);
4059 fp
->glsl_to_tgsi
= v
;
4062 /* ------------------------- TGSI conversion stuff -------------------------- */
4064 unsigned branch_target
;
4069 * Intermediate state used during shader translation.
4071 struct st_translate
{
4072 struct ureg_program
*ureg
;
4074 struct ureg_dst temps
[MAX_TEMPS
];
4075 struct ureg_dst arrays
[MAX_ARRAYS
];
4076 struct ureg_src
*constants
;
4077 struct ureg_src
*immediates
;
4078 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4079 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4080 struct ureg_dst address
[1];
4081 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4082 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4084 unsigned array_sizes
[MAX_ARRAYS
];
4086 const GLuint
*inputMapping
;
4087 const GLuint
*outputMapping
;
4089 /* For every instruction that contains a label (eg CALL), keep
4090 * details so that we can go back afterwards and emit the correct
4091 * tgsi instruction number for each label.
4093 struct label
*labels
;
4094 unsigned labels_size
;
4095 unsigned labels_count
;
4097 /* Keep a record of the tgsi instruction number that each mesa
4098 * instruction starts at, will be used to fix up labels after
4103 unsigned insn_count
;
4105 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4110 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4111 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4113 TGSI_SEMANTIC_VERTEXID
,
4114 TGSI_SEMANTIC_INSTANCEID
4118 * Make note of a branch to a label in the TGSI code.
4119 * After we've emitted all instructions, we'll go over the list
4120 * of labels built here and patch the TGSI code with the actual
4121 * location of each label.
4123 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4127 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4128 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4129 t
->labels
= (struct label
*)realloc(t
->labels
,
4130 t
->labels_size
* sizeof(struct label
));
4131 if (t
->labels
== NULL
) {
4132 static unsigned dummy
;
4138 i
= t
->labels_count
++;
4139 t
->labels
[i
].branch_target
= branch_target
;
4140 return &t
->labels
[i
].token
;
4144 * Called prior to emitting the TGSI code for each instruction.
4145 * Allocate additional space for instructions if needed.
4146 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4147 * the next TGSI instruction.
4149 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4151 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4152 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4153 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4154 if (t
->insn
== NULL
) {
4160 t
->insn
[t
->insn_count
++] = start
;
4164 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4166 static struct ureg_src
4167 emit_immediate(struct st_translate
*t
,
4168 gl_constant_value values
[4],
4171 struct ureg_program
*ureg
= t
->ureg
;
4176 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4178 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4179 case GL_UNSIGNED_INT
:
4181 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4183 assert(!"should not get here - type must be float, int, uint, or bool");
4184 return ureg_src_undef();
4189 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4191 static struct ureg_dst
4192 dst_register(struct st_translate
*t
,
4193 gl_register_file file
,
4199 case PROGRAM_UNDEFINED
:
4200 return ureg_dst_undef();
4202 case PROGRAM_TEMPORARY
:
4204 assert(index
< (int) Elements(t
->temps
));
4206 if (ureg_dst_is_undef(t
->temps
[index
]))
4207 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4209 return t
->temps
[index
];
4212 array
= index
>> 16;
4215 assert(array
< (int) Elements(t
->arrays
));
4217 if (ureg_dst_is_undef(t
->arrays
[array
]))
4218 t
->arrays
[array
] = ureg_DECL_array_temporary(
4219 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4221 return ureg_dst_array_offset(t
->arrays
[array
],
4222 (int)(index
& 0xFFFF) - 0x8000);
4224 case PROGRAM_OUTPUT
:
4225 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4226 assert(index
< VARYING_SLOT_MAX
);
4227 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4228 assert(index
< FRAG_RESULT_MAX
);
4230 assert(index
< VARYING_SLOT_MAX
);
4232 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4234 return t
->outputs
[t
->outputMapping
[index
]];
4236 case PROGRAM_ADDRESS
:
4237 return t
->address
[index
];
4240 assert(!"unknown dst register file");
4241 return ureg_dst_undef();
4246 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4248 static struct ureg_src
4249 src_register(struct st_translate
*t
,
4250 gl_register_file file
,
4251 GLint index
, GLint index2D
)
4254 case PROGRAM_UNDEFINED
:
4255 return ureg_src_undef();
4257 case PROGRAM_TEMPORARY
:
4259 return ureg_src(dst_register(t
, file
, index
));
4261 case PROGRAM_ENV_PARAM
:
4262 case PROGRAM_LOCAL_PARAM
:
4263 case PROGRAM_UNIFORM
:
4265 return t
->constants
[index
];
4266 case PROGRAM_STATE_VAR
:
4267 case PROGRAM_CONSTANT
: /* ie, immediate */
4269 struct ureg_src src
;
4270 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4272 src
.DimensionIndex
= index2D
;
4274 } else if (index
< 0)
4275 return ureg_DECL_constant(t
->ureg
, 0);
4277 return t
->constants
[index
];
4279 case PROGRAM_IMMEDIATE
:
4280 return t
->immediates
[index
];
4283 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4284 return t
->inputs
[t
->inputMapping
[index
]];
4286 case PROGRAM_OUTPUT
:
4287 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4288 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4290 case PROGRAM_ADDRESS
:
4291 return ureg_src(t
->address
[index
]);
4293 case PROGRAM_SYSTEM_VALUE
:
4294 assert(index
< (int) Elements(t
->systemValues
));
4295 return t
->systemValues
[index
];
4298 assert(!"unknown src register file");
4299 return ureg_src_undef();
4304 * Create a TGSI ureg_dst register from an st_dst_reg.
4306 static struct ureg_dst
4307 translate_dst(struct st_translate
*t
,
4308 const st_dst_reg
*dst_reg
,
4309 bool saturate
, bool clamp_color
)
4311 struct ureg_dst dst
= dst_register(t
,
4315 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4318 dst
= ureg_saturate(dst
);
4319 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4320 /* Clamp colors for ARB_color_buffer_float. */
4321 switch (t
->procType
) {
4322 case TGSI_PROCESSOR_VERTEX
:
4323 /* XXX if the geometry shader is present, this must be done there
4324 * instead of here. */
4325 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4326 dst_reg
->index
== VARYING_SLOT_COL1
||
4327 dst_reg
->index
== VARYING_SLOT_BFC0
||
4328 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4329 dst
= ureg_saturate(dst
);
4333 case TGSI_PROCESSOR_FRAGMENT
:
4334 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4335 dst
= ureg_saturate(dst
);
4341 if (dst_reg
->reladdr
!= NULL
) {
4342 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4343 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4350 * Create a TGSI ureg_src register from an st_src_reg.
4352 static struct ureg_src
4353 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4355 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4357 src
= ureg_swizzle(src
,
4358 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4359 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4360 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4361 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4363 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4364 src
= ureg_negate(src
);
4366 if (src_reg
->reladdr
!= NULL
) {
4367 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4368 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4374 static struct tgsi_texture_offset
4375 translate_tex_offset(struct st_translate
*t
,
4376 const struct tgsi_texture_offset
*in_offset
)
4378 struct tgsi_texture_offset offset
;
4379 struct ureg_src imm_src
;
4381 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4382 imm_src
= t
->immediates
[in_offset
->Index
];
4384 offset
.File
= imm_src
.File
;
4385 offset
.Index
= imm_src
.Index
;
4386 offset
.SwizzleX
= imm_src
.SwizzleX
;
4387 offset
.SwizzleY
= imm_src
.SwizzleY
;
4388 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4389 offset
.File
= TGSI_FILE_IMMEDIATE
;
4396 compile_tgsi_instruction(struct st_translate
*t
,
4397 const glsl_to_tgsi_instruction
*inst
,
4398 bool clamp_dst_color_output
)
4400 struct ureg_program
*ureg
= t
->ureg
;
4402 struct ureg_dst dst
[1];
4403 struct ureg_src src
[4];
4404 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4408 unsigned tex_target
;
4410 num_dst
= num_inst_dst_regs(inst
->op
);
4411 num_src
= num_inst_src_regs(inst
->op
);
4414 dst
[0] = translate_dst(t
,
4417 clamp_dst_color_output
);
4419 for (i
= 0; i
< num_src
; i
++)
4420 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4423 case TGSI_OPCODE_BGNLOOP
:
4424 case TGSI_OPCODE_CAL
:
4425 case TGSI_OPCODE_ELSE
:
4426 case TGSI_OPCODE_ENDLOOP
:
4427 case TGSI_OPCODE_IF
:
4428 case TGSI_OPCODE_UIF
:
4429 assert(num_dst
== 0);
4430 ureg_label_insn(ureg
,
4434 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4437 case TGSI_OPCODE_TEX
:
4438 case TGSI_OPCODE_TXB
:
4439 case TGSI_OPCODE_TXD
:
4440 case TGSI_OPCODE_TXL
:
4441 case TGSI_OPCODE_TXP
:
4442 case TGSI_OPCODE_TXQ
:
4443 case TGSI_OPCODE_TXF
:
4444 case TGSI_OPCODE_TEX2
:
4445 case TGSI_OPCODE_TXB2
:
4446 case TGSI_OPCODE_TXL2
:
4447 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4448 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4449 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4451 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4457 texoffsets
, inst
->tex_offset_num_offset
,
4461 case TGSI_OPCODE_SCS
:
4462 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4463 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4476 * Emit the TGSI instructions for inverting and adjusting WPOS.
4477 * This code is unavoidable because it also depends on whether
4478 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4481 emit_wpos_adjustment( struct st_translate
*t
,
4482 const struct gl_program
*program
,
4484 GLfloat adjX
, GLfloat adjY
[2])
4486 struct ureg_program
*ureg
= t
->ureg
;
4488 /* Fragment program uses fragment position input.
4489 * Need to replace instances of INPUT[WPOS] with temp T
4490 * where T = INPUT[WPOS] by y is inverted.
4492 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4493 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4494 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4496 /* XXX: note we are modifying the incoming shader here! Need to
4497 * do this before emitting the constant decls below, or this
4500 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4501 wposTransformState
);
4503 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4504 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4505 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4507 /* First, apply the coordinate shift: */
4508 if (adjX
|| adjY
[0] || adjY
[1]) {
4509 if (adjY
[0] != adjY
[1]) {
4510 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4511 * depending on whether inversion is actually going to be applied
4512 * or not, which is determined by testing against the inversion
4513 * state variable used below, which will be either +1 or -1.
4515 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4517 ureg_CMP(ureg
, adj_temp
,
4518 ureg_scalar(wpostrans
, invert
? 2 : 0),
4519 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4520 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4521 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4523 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4524 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4526 wpos_input
= ureg_src(wpos_temp
);
4528 /* MOV wpos_temp, input[wpos]
4530 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4533 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4534 * inversion/identity, or the other way around if we're drawing to an FBO.
4537 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4540 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4542 ureg_scalar(wpostrans
, 0),
4543 ureg_scalar(wpostrans
, 1));
4545 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4548 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4550 ureg_scalar(wpostrans
, 2),
4551 ureg_scalar(wpostrans
, 3));
4554 /* Use wpos_temp as position input from here on:
4556 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4561 * Emit fragment position/ooordinate code.
4564 emit_wpos(struct st_context
*st
,
4565 struct st_translate
*t
,
4566 const struct gl_program
*program
,
4567 struct ureg_program
*ureg
)
4569 const struct gl_fragment_program
*fp
=
4570 (const struct gl_fragment_program
*) program
;
4571 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4572 GLfloat adjX
= 0.0f
;
4573 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4574 boolean invert
= FALSE
;
4576 /* Query the pixel center conventions supported by the pipe driver and set
4577 * adjX, adjY to help out if it cannot handle the requested one internally.
4579 * The bias of the y-coordinate depends on whether y-inversion takes place
4580 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4581 * drawing to an FBO (causes additional inversion), and whether the the pipe
4582 * driver origin and the requested origin differ (the latter condition is
4583 * stored in the 'invert' variable).
4585 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4587 * center shift only:
4592 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4593 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4594 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4595 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4597 * inversion and center shift:
4598 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4599 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4600 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4601 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4603 if (fp
->OriginUpperLeft
) {
4604 /* Fragment shader wants origin in upper-left */
4605 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4606 /* the driver supports upper-left origin */
4608 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4609 /* the driver supports lower-left origin, need to invert Y */
4610 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4617 /* Fragment shader wants origin in lower-left */
4618 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4619 /* the driver supports lower-left origin */
4620 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4621 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4622 /* the driver supports upper-left origin, need to invert Y */
4628 if (fp
->PixelCenterInteger
) {
4629 /* Fragment shader wants pixel center integer */
4630 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4631 /* the driver supports pixel center integer */
4633 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4635 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4636 /* the driver supports pixel center half integer, need to bias X,Y */
4645 /* Fragment shader wants pixel center half integer */
4646 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4647 /* the driver supports pixel center half integer */
4649 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4650 /* the driver supports pixel center integer, need to bias X,Y */
4651 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4652 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4658 /* we invert after adjustment so that we avoid the MOV to temporary,
4659 * and reuse the adjustment ADD instead */
4660 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4664 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4665 * TGSI uses +1 for front, -1 for back.
4666 * This function converts the TGSI value to the GL value. Simply clamping/
4667 * saturating the value to [0,1] does the job.
4670 emit_face_var(struct st_translate
*t
)
4672 struct ureg_program
*ureg
= t
->ureg
;
4673 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4674 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4676 /* MOV_SAT face_temp, input[face] */
4677 face_temp
= ureg_saturate(face_temp
);
4678 ureg_MOV(ureg
, face_temp
, face_input
);
4680 /* Use face_temp as face input from here on: */
4681 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4685 emit_edgeflags(struct st_translate
*t
)
4687 struct ureg_program
*ureg
= t
->ureg
;
4688 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4689 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4691 ureg_MOV(ureg
, edge_dst
, edge_src
);
4695 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4696 * \param program the program to translate
4697 * \param numInputs number of input registers used
4698 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4700 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4701 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4703 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4704 * \param numOutputs number of output registers used
4705 * \param outputMapping maps Mesa fragment program outputs to TGSI
4707 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4708 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4711 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4713 extern "C" enum pipe_error
4714 st_translate_program(
4715 struct gl_context
*ctx
,
4717 struct ureg_program
*ureg
,
4718 glsl_to_tgsi_visitor
*program
,
4719 const struct gl_program
*proginfo
,
4721 const GLuint inputMapping
[],
4722 const ubyte inputSemanticName
[],
4723 const ubyte inputSemanticIndex
[],
4724 const GLuint interpMode
[],
4725 const GLboolean is_centroid
[],
4727 const GLuint outputMapping
[],
4728 const ubyte outputSemanticName
[],
4729 const ubyte outputSemanticIndex
[],
4730 boolean passthrough_edgeflags
,
4731 boolean clamp_color
)
4733 struct st_translate
*t
;
4735 enum pipe_error ret
= PIPE_OK
;
4737 assert(numInputs
<= Elements(t
->inputs
));
4738 assert(numOutputs
<= Elements(t
->outputs
));
4740 t
= CALLOC_STRUCT(st_translate
);
4742 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4746 memset(t
, 0, sizeof *t
);
4748 t
->procType
= procType
;
4749 t
->inputMapping
= inputMapping
;
4750 t
->outputMapping
= outputMapping
;
4753 if (program
->shader_program
) {
4754 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4755 struct gl_uniform_storage
*const storage
=
4756 &program
->shader_program
->UniformStorage
[i
];
4758 _mesa_uniform_detach_all_driver_storage(storage
);
4763 * Declare input attributes.
4765 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4766 for (i
= 0; i
< numInputs
; i
++) {
4767 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4768 inputSemanticName
[i
],
4769 inputSemanticIndex
[i
],
4774 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4775 /* Must do this after setting up t->inputs, and before
4776 * emitting constant references, below:
4778 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4781 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4785 * Declare output attributes.
4787 for (i
= 0; i
< numOutputs
; i
++) {
4788 switch (outputSemanticName
[i
]) {
4789 case TGSI_SEMANTIC_POSITION
:
4790 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4791 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4792 outputSemanticIndex
[i
]);
4793 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4795 case TGSI_SEMANTIC_STENCIL
:
4796 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4797 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4798 outputSemanticIndex
[i
]);
4799 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4801 case TGSI_SEMANTIC_COLOR
:
4802 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4803 TGSI_SEMANTIC_COLOR
,
4804 outputSemanticIndex
[i
]);
4807 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4808 ret
= PIPE_ERROR_BAD_INPUT
;
4813 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4814 for (i
= 0; i
< numInputs
; i
++) {
4815 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4817 inputSemanticName
[i
],
4818 inputSemanticIndex
[i
]);
4821 for (i
= 0; i
< numOutputs
; i
++) {
4822 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4823 outputSemanticName
[i
],
4824 outputSemanticIndex
[i
]);
4828 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4830 for (i
= 0; i
< numInputs
; i
++) {
4831 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4834 for (i
= 0; i
< numOutputs
; i
++) {
4835 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4836 outputSemanticName
[i
],
4837 outputSemanticIndex
[i
]);
4839 if (passthrough_edgeflags
)
4843 /* Declare address register.
4845 if (program
->num_address_regs
> 0) {
4846 assert(program
->num_address_regs
== 1);
4847 t
->address
[0] = ureg_DECL_address(ureg
);
4850 /* Declare misc input registers
4853 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4854 unsigned numSys
= 0;
4855 for (i
= 0; sysInputs
; i
++) {
4856 if (sysInputs
& (1 << i
)) {
4857 unsigned semName
= mesa_sysval_to_semantic
[i
];
4858 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4859 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4860 semName
== TGSI_SEMANTIC_VERTEXID
) {
4861 /* From Gallium perspective, these system values are always
4862 * integer, and require native integer support. However, if
4863 * native integer is supported on the vertex stage but not the
4864 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4865 * assumes these system values are floats. To resolve the
4866 * inconsistency, we insert a U2F.
4868 struct st_context
*st
= st_context(ctx
);
4869 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4870 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4871 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4872 if (!ctx
->Const
.NativeIntegers
) {
4873 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4874 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4875 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4879 sysInputs
&= ~(1 << i
);
4884 /* Copy over array sizes
4886 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4888 /* Emit constants and uniforms. TGSI uses a single index space for these,
4889 * so we put all the translated regs in t->constants.
4891 if (proginfo
->Parameters
) {
4892 t
->constants
= (struct ureg_src
*)
4893 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4894 if (t
->constants
== NULL
) {
4895 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4899 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4900 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4901 case PROGRAM_ENV_PARAM
:
4902 case PROGRAM_LOCAL_PARAM
:
4903 case PROGRAM_STATE_VAR
:
4904 case PROGRAM_UNIFORM
:
4905 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4908 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4909 * addressing of the const buffer.
4910 * FIXME: Be smarter and recognize param arrays:
4911 * indirect addressing is only valid within the referenced
4914 case PROGRAM_CONSTANT
:
4915 if (program
->indirect_addr_consts
)
4916 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4918 t
->constants
[i
] = emit_immediate(t
,
4919 proginfo
->Parameters
->ParameterValues
[i
],
4920 proginfo
->Parameters
->Parameters
[i
].DataType
,
4929 if (program
->shader_program
) {
4930 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4932 for (i
= 0; i
< num_ubos
; i
++) {
4933 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4937 /* Emit immediate values.
4939 t
->immediates
= (struct ureg_src
*)
4940 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4941 if (t
->immediates
== NULL
) {
4942 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4946 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4947 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4948 assert(i
< program
->num_immediates
);
4949 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4951 assert(i
== program
->num_immediates
);
4953 /* texture samplers */
4954 for (i
= 0; i
< ctx
->Const
.FragmentProgram
.MaxTextureImageUnits
; i
++) {
4955 if (program
->samplers_used
& (1 << i
)) {
4956 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4960 /* Emit each instruction in turn:
4962 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4963 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4964 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4968 /* Fix up all emitted labels:
4970 for (i
= 0; i
< t
->labels_count
; i
++) {
4971 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4972 t
->insn
[t
->labels
[i
].branch_target
]);
4975 if (program
->shader_program
) {
4976 /* This has to be done last. Any operation the can cause
4977 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4978 * program constant) has to happen before creating this linkage.
4980 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4981 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4984 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4985 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4994 free(t
->immediates
);
4997 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5005 /* ----------------------------- End TGSI code ------------------------------ */
5008 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5009 * generating Mesa IR.
5011 static struct gl_program
*
5012 get_mesa_program(struct gl_context
*ctx
,
5013 struct gl_shader_program
*shader_program
,
5014 struct gl_shader
*shader
)
5016 glsl_to_tgsi_visitor
* v
;
5017 struct gl_program
*prog
;
5020 struct gl_shader_compiler_options
*options
=
5021 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
5022 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5025 switch (shader
->Type
) {
5026 case GL_VERTEX_SHADER
:
5027 target
= GL_VERTEX_PROGRAM_ARB
;
5028 ptarget
= PIPE_SHADER_VERTEX
;
5030 case GL_FRAGMENT_SHADER
:
5031 target
= GL_FRAGMENT_PROGRAM_ARB
;
5032 ptarget
= PIPE_SHADER_FRAGMENT
;
5034 case GL_GEOMETRY_SHADER
:
5035 target
= GL_GEOMETRY_PROGRAM_NV
;
5036 ptarget
= PIPE_SHADER_GEOMETRY
;
5039 assert(!"should not be reached");
5043 validate_ir_tree(shader
->ir
);
5045 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5048 prog
->Parameters
= _mesa_new_parameter_list();
5049 v
= new glsl_to_tgsi_visitor();
5052 v
->shader_program
= shader_program
;
5053 v
->options
= options
;
5054 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5055 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5057 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5058 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5060 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5063 /* Remove reads from output registers. */
5064 lower_output_reads(shader
->ir
);
5066 /* Emit intermediate IR for main(). */
5067 visit_exec_list(shader
->ir
, v
);
5069 /* Now emit bodies for any functions that were used. */
5071 progress
= GL_FALSE
;
5073 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5074 function_entry
*entry
= (function_entry
*)iter
.get();
5076 if (!entry
->bgn_inst
) {
5077 v
->current_function
= entry
;
5079 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5080 entry
->bgn_inst
->function
= entry
;
5082 visit_exec_list(&entry
->sig
->body
, v
);
5084 glsl_to_tgsi_instruction
*last
;
5085 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5086 if (last
->op
!= TGSI_OPCODE_RET
)
5087 v
->emit(NULL
, TGSI_OPCODE_RET
);
5089 glsl_to_tgsi_instruction
*end
;
5090 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5091 end
->function
= entry
;
5099 /* Print out some information (for debugging purposes) used by the
5100 * optimization passes. */
5101 for (i
=0; i
< v
->next_temp
; i
++) {
5102 int fr
= v
->get_first_temp_read(i
);
5103 int fw
= v
->get_first_temp_write(i
);
5104 int lr
= v
->get_last_temp_read(i
);
5105 int lw
= v
->get_last_temp_write(i
);
5107 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5112 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5114 v
->copy_propagate();
5115 while (v
->eliminate_dead_code_advanced());
5117 v
->eliminate_dead_code();
5118 v
->merge_registers();
5119 v
->renumber_registers();
5121 /* Write the END instruction. */
5122 v
->emit(NULL
, TGSI_OPCODE_END
);
5124 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5126 printf("GLSL IR for linked %s program %d:\n",
5127 _mesa_glsl_shader_target_name(shader
->Type
),
5128 shader_program
->Name
);
5129 _mesa_print_ir(shader
->ir
, NULL
);
5135 prog
->Instructions
= NULL
;
5136 prog
->NumInstructions
= 0;
5138 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
);
5139 count_resources(v
, prog
);
5141 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5143 /* This has to be done last. Any operation the can cause
5144 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5145 * program constant) has to happen before creating this linkage.
5147 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5148 if (!shader_program
->LinkStatus
) {
5152 struct st_vertex_program
*stvp
;
5153 struct st_fragment_program
*stfp
;
5154 struct st_geometry_program
*stgp
;
5156 switch (shader
->Type
) {
5157 case GL_VERTEX_SHADER
:
5158 stvp
= (struct st_vertex_program
*)prog
;
5159 stvp
->glsl_to_tgsi
= v
;
5161 case GL_FRAGMENT_SHADER
:
5162 stfp
= (struct st_fragment_program
*)prog
;
5163 stfp
->glsl_to_tgsi
= v
;
5165 case GL_GEOMETRY_SHADER
:
5166 stgp
= (struct st_geometry_program
*)prog
;
5167 stgp
->glsl_to_tgsi
= v
;
5170 assert(!"should not be reached");
5180 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5182 struct gl_shader
*shader
;
5183 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5184 type
== GL_GEOMETRY_SHADER_ARB
);
5185 shader
= rzalloc(NULL
, struct gl_shader
);
5187 shader
->Type
= type
;
5188 shader
->Name
= name
;
5189 _mesa_init_shader(ctx
, shader
);
5194 struct gl_shader_program
*
5195 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5197 struct gl_shader_program
*shProg
;
5198 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5200 shProg
->Name
= name
;
5201 _mesa_init_shader_program(ctx
, shProg
);
5208 * Called via ctx->Driver.LinkShader()
5209 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5210 * with code lowering and other optimizations.
5213 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5215 assert(prog
->LinkStatus
);
5217 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5218 if (prog
->_LinkedShaders
[i
] == NULL
)
5222 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5223 const struct gl_shader_compiler_options
*options
=
5224 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5226 /* If there are forms of indirect addressing that the driver
5227 * cannot handle, perform the lowering pass.
5229 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5230 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5231 lower_variable_index_to_cond_assign(ir
,
5232 options
->EmitNoIndirectInput
,
5233 options
->EmitNoIndirectOutput
,
5234 options
->EmitNoIndirectTemp
,
5235 options
->EmitNoIndirectUniform
);
5238 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5239 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5240 LOWER_UNPACK_SNORM_2x16
|
5241 LOWER_PACK_UNORM_2x16
|
5242 LOWER_UNPACK_UNORM_2x16
|
5243 LOWER_PACK_SNORM_4x8
|
5244 LOWER_UNPACK_SNORM_4x8
|
5245 LOWER_UNPACK_UNORM_4x8
|
5246 LOWER_PACK_UNORM_4x8
|
5247 LOWER_PACK_HALF_2x16
|
5248 LOWER_UNPACK_HALF_2x16
;
5250 lower_packing_builtins(ir
, lower_inst
);
5253 do_mat_op_to_vec(ir
);
5254 lower_instructions(ir
,
5259 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5260 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5262 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5263 do_vec_index_to_cond_assign(ir
);
5264 lower_vector_insert(ir
, true);
5265 lower_quadop_vector(ir
, false);
5267 if (options
->MaxIfDepth
== 0) {
5274 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5276 progress
= do_common_optimization(ir
, true, true,
5277 options
->MaxUnrollIterations
, options
)
5280 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5284 validate_ir_tree(ir
);
5287 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5288 struct gl_program
*linked_prog
;
5290 if (prog
->_LinkedShaders
[i
] == NULL
)
5293 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5296 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5298 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5299 _mesa_program_index_to_target(i
),
5301 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5303 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5308 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5315 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5316 const GLuint outputMapping
[],
5317 struct pipe_stream_output_info
*so
)
5320 struct gl_transform_feedback_info
*info
=
5321 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5323 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5324 so
->output
[i
].register_index
=
5325 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5326 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5327 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5328 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5329 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5332 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5333 so
->stride
[i
] = info
->BufferStride
[i
];
5335 so
->num_outputs
= info
->NumOutputs
;