glsl: add ir_emit_vertex and ir_end_primitive instruction types
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "program/hash_table.h"
47
48 extern "C" {
49 #include "main/shaderapi.h"
50 #include "main/uniforms.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
74 (1 << PROGRAM_ENV_PARAM) | \
75 (1 << PROGRAM_STATE_VAR) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
78
79 /**
80 * Maximum number of temporary registers.
81 *
82 * It is too big for stack allocated arrays -- it will cause stack overflow on
83 * Windows and likely Mac OS X.
84 */
85 #define MAX_TEMPS 4096
86
87 /**
88 * Maximum number of arrays
89 */
90 #define MAX_ARRAYS 256
91
92 /* will be 4 for GLSL 4.00 */
93 #define MAX_GLSL_TEXTURE_OFFSET 1
94
95 class st_src_reg;
96 class st_dst_reg;
97
98 static int swizzle_for_size(int size);
99
100 /**
101 * This struct is a corresponding struct to TGSI ureg_src.
102 */
103 class st_src_reg {
104 public:
105 st_src_reg(gl_register_file file, int index, const glsl_type *type)
106 {
107 this->file = file;
108 this->index = index;
109 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
110 this->swizzle = swizzle_for_size(type->vector_elements);
111 else
112 this->swizzle = SWIZZLE_XYZW;
113 this->negate = 0;
114 this->index2D = 0;
115 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
116 this->reladdr = NULL;
117 }
118
119 st_src_reg(gl_register_file file, int index, int type)
120 {
121 this->type = type;
122 this->file = file;
123 this->index = index;
124 this->index2D = 0;
125 this->swizzle = SWIZZLE_XYZW;
126 this->negate = 0;
127 this->reladdr = NULL;
128 }
129
130 st_src_reg(gl_register_file file, int index, int type, int index2D)
131 {
132 this->type = type;
133 this->file = file;
134 this->index = index;
135 this->index2D = index2D;
136 this->swizzle = SWIZZLE_XYZW;
137 this->negate = 0;
138 this->reladdr = NULL;
139 }
140
141 st_src_reg()
142 {
143 this->type = GLSL_TYPE_ERROR;
144 this->file = PROGRAM_UNDEFINED;
145 this->index = 0;
146 this->index2D = 0;
147 this->swizzle = 0;
148 this->negate = 0;
149 this->reladdr = NULL;
150 }
151
152 explicit st_src_reg(st_dst_reg reg);
153
154 gl_register_file file; /**< PROGRAM_* from Mesa */
155 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
156 int index2D;
157 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
158 int negate; /**< NEGATE_XYZW mask from mesa */
159 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
160 /** Register index should be offset by the integer in this reg. */
161 st_src_reg *reladdr;
162 };
163
164 class st_dst_reg {
165 public:
166 st_dst_reg(gl_register_file file, int writemask, int type)
167 {
168 this->file = file;
169 this->index = 0;
170 this->writemask = writemask;
171 this->cond_mask = COND_TR;
172 this->reladdr = NULL;
173 this->type = type;
174 }
175
176 st_dst_reg()
177 {
178 this->type = GLSL_TYPE_ERROR;
179 this->file = PROGRAM_UNDEFINED;
180 this->index = 0;
181 this->writemask = 0;
182 this->cond_mask = COND_TR;
183 this->reladdr = NULL;
184 }
185
186 explicit st_dst_reg(st_src_reg reg);
187
188 gl_register_file file; /**< PROGRAM_* from Mesa */
189 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
190 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
191 GLuint cond_mask:4;
192 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
193 /** Register index should be offset by the integer in this reg. */
194 st_src_reg *reladdr;
195 };
196
197 st_src_reg::st_src_reg(st_dst_reg reg)
198 {
199 this->type = reg.type;
200 this->file = reg.file;
201 this->index = reg.index;
202 this->swizzle = SWIZZLE_XYZW;
203 this->negate = 0;
204 this->reladdr = reg.reladdr;
205 this->index2D = 0;
206 }
207
208 st_dst_reg::st_dst_reg(st_src_reg reg)
209 {
210 this->type = reg.type;
211 this->file = reg.file;
212 this->index = reg.index;
213 this->writemask = WRITEMASK_XYZW;
214 this->cond_mask = COND_TR;
215 this->reladdr = reg.reladdr;
216 }
217
218 class glsl_to_tgsi_instruction : public exec_node {
219 public:
220 /* Callers of this ralloc-based new need not call delete. It's
221 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
222 static void* operator new(size_t size, void *ctx)
223 {
224 void *node;
225
226 node = rzalloc_size(ctx, size);
227 assert(node != NULL);
228
229 return node;
230 }
231
232 unsigned op;
233 st_dst_reg dst;
234 st_src_reg src[3];
235 /** Pointer to the ir source this tree came from for debugging */
236 ir_instruction *ir;
237 GLboolean cond_update;
238 bool saturate;
239 int sampler; /**< sampler index */
240 int tex_target; /**< One of TEXTURE_*_INDEX */
241 GLboolean tex_shadow;
242 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
243 unsigned tex_offset_num_offset;
244 int dead_mask; /**< Used in dead code elimination */
245
246 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
247 };
248
249 class variable_storage : public exec_node {
250 public:
251 variable_storage(ir_variable *var, gl_register_file file, int index)
252 : file(file), index(index), var(var)
253 {
254 /* empty */
255 }
256
257 gl_register_file file;
258 int index;
259 ir_variable *var; /* variable that maps to this, if any */
260 };
261
262 class immediate_storage : public exec_node {
263 public:
264 immediate_storage(gl_constant_value *values, int size, int type)
265 {
266 memcpy(this->values, values, size * sizeof(gl_constant_value));
267 this->size = size;
268 this->type = type;
269 }
270
271 gl_constant_value values[4];
272 int size; /**< Number of components (1-4) */
273 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
274 };
275
276 class function_entry : public exec_node {
277 public:
278 ir_function_signature *sig;
279
280 /**
281 * identifier of this function signature used by the program.
282 *
283 * At the point that TGSI instructions for function calls are
284 * generated, we don't know the address of the first instruction of
285 * the function body. So we make the BranchTarget that is called a
286 * small integer and rewrite them during set_branchtargets().
287 */
288 int sig_id;
289
290 /**
291 * Pointer to first instruction of the function body.
292 *
293 * Set during function body emits after main() is processed.
294 */
295 glsl_to_tgsi_instruction *bgn_inst;
296
297 /**
298 * Index of the first instruction of the function body in actual TGSI.
299 *
300 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
301 */
302 int inst;
303
304 /** Storage for the return value. */
305 st_src_reg return_reg;
306 };
307
308 struct glsl_to_tgsi_visitor : public ir_visitor {
309 public:
310 glsl_to_tgsi_visitor();
311 ~glsl_to_tgsi_visitor();
312
313 function_entry *current_function;
314
315 struct gl_context *ctx;
316 struct gl_program *prog;
317 struct gl_shader_program *shader_program;
318 struct gl_shader_compiler_options *options;
319
320 int next_temp;
321
322 unsigned array_sizes[MAX_ARRAYS];
323 unsigned next_array;
324
325 int num_address_regs;
326 int samplers_used;
327 bool indirect_addr_consts;
328
329 int glsl_version;
330 bool native_integers;
331 bool have_sqrt;
332
333 variable_storage *find_variable_storage(ir_variable *var);
334
335 int add_constant(gl_register_file file, gl_constant_value values[4],
336 int size, int datatype, GLuint *swizzle_out);
337
338 function_entry *get_function_signature(ir_function_signature *sig);
339
340 st_src_reg get_temp(const glsl_type *type);
341 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
342
343 st_src_reg st_src_reg_for_float(float val);
344 st_src_reg st_src_reg_for_int(int val);
345 st_src_reg st_src_reg_for_type(int type, int val);
346
347 /**
348 * \name Visit methods
349 *
350 * As typical for the visitor pattern, there must be one \c visit method for
351 * each concrete subclass of \c ir_instruction. Virtual base classes within
352 * the hierarchy should not have \c visit methods.
353 */
354 /*@{*/
355 virtual void visit(ir_variable *);
356 virtual void visit(ir_loop *);
357 virtual void visit(ir_loop_jump *);
358 virtual void visit(ir_function_signature *);
359 virtual void visit(ir_function *);
360 virtual void visit(ir_expression *);
361 virtual void visit(ir_swizzle *);
362 virtual void visit(ir_dereference_variable *);
363 virtual void visit(ir_dereference_array *);
364 virtual void visit(ir_dereference_record *);
365 virtual void visit(ir_assignment *);
366 virtual void visit(ir_constant *);
367 virtual void visit(ir_call *);
368 virtual void visit(ir_return *);
369 virtual void visit(ir_discard *);
370 virtual void visit(ir_texture *);
371 virtual void visit(ir_if *);
372 virtual void visit(ir_emit_vertex *);
373 virtual void visit(ir_end_primitive *);
374 /*@}*/
375
376 st_src_reg result;
377
378 /** List of variable_storage */
379 exec_list variables;
380
381 /** List of immediate_storage */
382 exec_list immediates;
383 unsigned num_immediates;
384
385 /** List of function_entry */
386 exec_list function_signatures;
387 int next_signature_id;
388
389 /** List of glsl_to_tgsi_instruction */
390 exec_list instructions;
391
392 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
393
394 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
395 st_dst_reg dst, st_src_reg src0);
396
397 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
398 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
399
400 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
401 st_dst_reg dst,
402 st_src_reg src0, st_src_reg src1, st_src_reg src2);
403
404 unsigned get_opcode(ir_instruction *ir, unsigned op,
405 st_dst_reg dst,
406 st_src_reg src0, st_src_reg src1);
407
408 /**
409 * Emit the correct dot-product instruction for the type of arguments
410 */
411 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
412 st_dst_reg dst,
413 st_src_reg src0,
414 st_src_reg src1,
415 unsigned elements);
416
417 void emit_scalar(ir_instruction *ir, unsigned op,
418 st_dst_reg dst, st_src_reg src0);
419
420 void emit_scalar(ir_instruction *ir, unsigned op,
421 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
422
423 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst);
424
425 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
426
427 void emit_scs(ir_instruction *ir, unsigned op,
428 st_dst_reg dst, const st_src_reg &src);
429
430 bool try_emit_mad(ir_expression *ir,
431 int mul_operand);
432 bool try_emit_mad_for_and_not(ir_expression *ir,
433 int mul_operand);
434 bool try_emit_sat(ir_expression *ir);
435
436 void emit_swz(ir_expression *ir);
437
438 bool process_move_condition(ir_rvalue *ir);
439
440 void simplify_cmp(void);
441
442 void rename_temp_register(int index, int new_index);
443 int get_first_temp_read(int index);
444 int get_first_temp_write(int index);
445 int get_last_temp_read(int index);
446 int get_last_temp_write(int index);
447
448 void copy_propagate(void);
449 void eliminate_dead_code(void);
450 int eliminate_dead_code_advanced(void);
451 void merge_registers(void);
452 void renumber_registers(void);
453
454 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
455 st_dst_reg *l, st_src_reg *r);
456
457 void *mem_ctx;
458 };
459
460 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
461
462 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
463
464 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
465
466 static void
467 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
468
469 static void
470 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
471 {
472 va_list args;
473 va_start(args, fmt);
474 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
475 va_end(args);
476
477 prog->LinkStatus = GL_FALSE;
478 }
479
480 static int
481 swizzle_for_size(int size)
482 {
483 int size_swizzles[4] = {
484 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
485 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
486 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
487 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
488 };
489
490 assert((size >= 1) && (size <= 4));
491 return size_swizzles[size - 1];
492 }
493
494 static bool
495 is_tex_instruction(unsigned opcode)
496 {
497 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
498 return info->is_tex;
499 }
500
501 static unsigned
502 num_inst_dst_regs(unsigned opcode)
503 {
504 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
505 return info->num_dst;
506 }
507
508 static unsigned
509 num_inst_src_regs(unsigned opcode)
510 {
511 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
512 return info->is_tex ? info->num_src - 1 : info->num_src;
513 }
514
515 glsl_to_tgsi_instruction *
516 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
517 st_dst_reg dst,
518 st_src_reg src0, st_src_reg src1, st_src_reg src2)
519 {
520 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
521 int num_reladdr = 0, i;
522
523 op = get_opcode(ir, op, dst, src0, src1);
524
525 /* If we have to do relative addressing, we want to load the ARL
526 * reg directly for one of the regs, and preload the other reladdr
527 * sources into temps.
528 */
529 num_reladdr += dst.reladdr != NULL;
530 num_reladdr += src0.reladdr != NULL;
531 num_reladdr += src1.reladdr != NULL;
532 num_reladdr += src2.reladdr != NULL;
533
534 reladdr_to_temp(ir, &src2, &num_reladdr);
535 reladdr_to_temp(ir, &src1, &num_reladdr);
536 reladdr_to_temp(ir, &src0, &num_reladdr);
537
538 if (dst.reladdr) {
539 emit_arl(ir, address_reg, *dst.reladdr);
540 num_reladdr--;
541 }
542 assert(num_reladdr == 0);
543
544 inst->op = op;
545 inst->dst = dst;
546 inst->src[0] = src0;
547 inst->src[1] = src1;
548 inst->src[2] = src2;
549 inst->ir = ir;
550 inst->dead_mask = 0;
551
552 inst->function = NULL;
553
554 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
555 this->num_address_regs = 1;
556
557 /* Update indirect addressing status used by TGSI */
558 if (dst.reladdr) {
559 switch(dst.file) {
560 case PROGRAM_LOCAL_PARAM:
561 case PROGRAM_ENV_PARAM:
562 case PROGRAM_STATE_VAR:
563 case PROGRAM_CONSTANT:
564 case PROGRAM_UNIFORM:
565 this->indirect_addr_consts = true;
566 break;
567 case PROGRAM_IMMEDIATE:
568 assert(!"immediates should not have indirect addressing");
569 break;
570 default:
571 break;
572 }
573 }
574 else {
575 for (i=0; i<3; i++) {
576 if(inst->src[i].reladdr) {
577 switch(inst->src[i].file) {
578 case PROGRAM_LOCAL_PARAM:
579 case PROGRAM_ENV_PARAM:
580 case PROGRAM_STATE_VAR:
581 case PROGRAM_CONSTANT:
582 case PROGRAM_UNIFORM:
583 this->indirect_addr_consts = true;
584 break;
585 case PROGRAM_IMMEDIATE:
586 assert(!"immediates should not have indirect addressing");
587 break;
588 default:
589 break;
590 }
591 }
592 }
593 }
594
595 this->instructions.push_tail(inst);
596
597 if (native_integers)
598 try_emit_float_set(ir, op, dst);
599
600 return inst;
601 }
602
603
604 glsl_to_tgsi_instruction *
605 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
606 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
607 {
608 return emit(ir, op, dst, src0, src1, undef_src);
609 }
610
611 glsl_to_tgsi_instruction *
612 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
613 st_dst_reg dst, st_src_reg src0)
614 {
615 assert(dst.writemask != 0);
616 return emit(ir, op, dst, src0, undef_src, undef_src);
617 }
618
619 glsl_to_tgsi_instruction *
620 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
621 {
622 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
623 }
624
625 /**
626 * Emits the code to convert the result of float SET instructions to integers.
627 */
628 void
629 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op,
630 st_dst_reg dst)
631 {
632 if ((op == TGSI_OPCODE_SEQ ||
633 op == TGSI_OPCODE_SNE ||
634 op == TGSI_OPCODE_SGE ||
635 op == TGSI_OPCODE_SLT))
636 {
637 st_src_reg src = st_src_reg(dst);
638 src.negate = ~src.negate;
639 dst.type = GLSL_TYPE_FLOAT;
640 emit(ir, TGSI_OPCODE_F2I, dst, src);
641 }
642 }
643
644 /**
645 * Determines whether to use an integer, unsigned integer, or float opcode
646 * based on the operands and input opcode, then emits the result.
647 */
648 unsigned
649 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
650 st_dst_reg dst,
651 st_src_reg src0, st_src_reg src1)
652 {
653 int type = GLSL_TYPE_FLOAT;
654
655 assert(src0.type != GLSL_TYPE_ARRAY);
656 assert(src0.type != GLSL_TYPE_STRUCT);
657 assert(src1.type != GLSL_TYPE_ARRAY);
658 assert(src1.type != GLSL_TYPE_STRUCT);
659
660 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
661 type = GLSL_TYPE_FLOAT;
662 else if (native_integers)
663 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
664
665 #define case4(c, f, i, u) \
666 case TGSI_OPCODE_##c: \
667 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
668 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
669 else op = TGSI_OPCODE_##f; \
670 break;
671 #define case3(f, i, u) case4(f, f, i, u)
672 #define case2fi(f, i) case4(f, f, i, i)
673 #define case2iu(i, u) case4(i, LAST, i, u)
674
675 switch(op) {
676 case2fi(ADD, UADD);
677 case2fi(MUL, UMUL);
678 case2fi(MAD, UMAD);
679 case3(DIV, IDIV, UDIV);
680 case3(MAX, IMAX, UMAX);
681 case3(MIN, IMIN, UMIN);
682 case2iu(MOD, UMOD);
683
684 case2fi(SEQ, USEQ);
685 case2fi(SNE, USNE);
686 case3(SGE, ISGE, USGE);
687 case3(SLT, ISLT, USLT);
688
689 case2iu(ISHR, USHR);
690
691 case2fi(SSG, ISSG);
692 case3(ABS, IABS, IABS);
693
694 default: break;
695 }
696
697 assert(op != TGSI_OPCODE_LAST);
698 return op;
699 }
700
701 glsl_to_tgsi_instruction *
702 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
703 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
704 unsigned elements)
705 {
706 static const unsigned dot_opcodes[] = {
707 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
708 };
709
710 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
711 }
712
713 /**
714 * Emits TGSI scalar opcodes to produce unique answers across channels.
715 *
716 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
717 * channel determines the result across all channels. So to do a vec4
718 * of this operation, we want to emit a scalar per source channel used
719 * to produce dest channels.
720 */
721 void
722 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
723 st_dst_reg dst,
724 st_src_reg orig_src0, st_src_reg orig_src1)
725 {
726 int i, j;
727 int done_mask = ~dst.writemask;
728
729 /* TGSI RCP is a scalar operation splatting results to all channels,
730 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
731 * dst channels.
732 */
733 for (i = 0; i < 4; i++) {
734 GLuint this_mask = (1 << i);
735 glsl_to_tgsi_instruction *inst;
736 st_src_reg src0 = orig_src0;
737 st_src_reg src1 = orig_src1;
738
739 if (done_mask & this_mask)
740 continue;
741
742 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
743 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
744 for (j = i + 1; j < 4; j++) {
745 /* If there is another enabled component in the destination that is
746 * derived from the same inputs, generate its value on this pass as
747 * well.
748 */
749 if (!(done_mask & (1 << j)) &&
750 GET_SWZ(src0.swizzle, j) == src0_swiz &&
751 GET_SWZ(src1.swizzle, j) == src1_swiz) {
752 this_mask |= (1 << j);
753 }
754 }
755 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
756 src0_swiz, src0_swiz);
757 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
758 src1_swiz, src1_swiz);
759
760 inst = emit(ir, op, dst, src0, src1);
761 inst->dst.writemask = this_mask;
762 done_mask |= this_mask;
763 }
764 }
765
766 void
767 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
768 st_dst_reg dst, st_src_reg src0)
769 {
770 st_src_reg undef = undef_src;
771
772 undef.swizzle = SWIZZLE_XXXX;
773
774 emit_scalar(ir, op, dst, src0, undef);
775 }
776
777 void
778 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
779 st_dst_reg dst, st_src_reg src0)
780 {
781 int op = TGSI_OPCODE_ARL;
782
783 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
784 op = TGSI_OPCODE_UARL;
785
786 emit(NULL, op, dst, src0);
787 }
788
789 /**
790 * Emit an TGSI_OPCODE_SCS instruction
791 *
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
796 *
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
802 */
803 void
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
805 st_dst_reg dst,
806 const st_src_reg &src)
807 {
808 /* Vertex programs cannot use the SCS opcode.
809 */
810 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
811 emit_scalar(ir, op, dst, src);
812 return;
813 }
814
815 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
816 const unsigned scs_mask = (1U << component);
817 int done_mask = ~dst.writemask;
818 st_src_reg tmp;
819
820 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
821
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
824 */
825 if (scs_mask != unsigned(dst.writemask)) {
826 tmp = get_temp(glsl_type::vec4_type);
827 }
828
829 for (unsigned i = 0; i < 4; i++) {
830 unsigned this_mask = (1U << i);
831 st_src_reg src0 = src;
832
833 if ((done_mask & this_mask) != 0)
834 continue;
835
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
840 * the X component.
841 */
842 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
843
844 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
845 src0_swiz, src0_swiz);
846 for (unsigned j = i + 1; j < 4; j++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
849 * well.
850 */
851 if (!(done_mask & (1 << j)) &&
852 GET_SWZ(src0.swizzle, j) == src0_swiz) {
853 this_mask |= (1 << j);
854 }
855 }
856
857 if (this_mask != scs_mask) {
858 glsl_to_tgsi_instruction *inst;
859 st_dst_reg tmp_dst = st_dst_reg(tmp);
860
861 /* Emit the SCS instruction.
862 */
863 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
864 inst->dst.writemask = scs_mask;
865
866 /* Move the result of the SCS instruction to the desired location in
867 * the destination.
868 */
869 tmp.swizzle = MAKE_SWIZZLE4(component, component,
870 component, component);
871 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
872 inst->dst.writemask = this_mask;
873 } else {
874 /* Emit the SCS instruction to write directly to the destination.
875 */
876 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
877 inst->dst.writemask = scs_mask;
878 }
879
880 done_mask |= this_mask;
881 }
882 }
883
884 int
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
886 gl_constant_value values[4], int size, int datatype,
887 GLuint *swizzle_out)
888 {
889 if (file == PROGRAM_CONSTANT) {
890 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
891 size, datatype, swizzle_out);
892 } else {
893 int index = 0;
894 immediate_storage *entry;
895 assert(file == PROGRAM_IMMEDIATE);
896
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
899 */
900 foreach_iter(exec_list_iterator, iter, this->immediates) {
901 entry = (immediate_storage *)iter.get();
902
903 if (entry->size == size &&
904 entry->type == datatype &&
905 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
906 return index;
907 }
908 index++;
909 }
910
911 /* Add this immediate to the list. */
912 entry = new(mem_ctx) immediate_storage(values, size, datatype);
913 this->immediates.push_tail(entry);
914 this->num_immediates++;
915 return index;
916 }
917 }
918
919 st_src_reg
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
921 {
922 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
923 union gl_constant_value uval;
924
925 uval.f = val;
926 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
927
928 return src;
929 }
930
931 st_src_reg
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
933 {
934 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
935 union gl_constant_value uval;
936
937 assert(native_integers);
938
939 uval.i = val;
940 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
941
942 return src;
943 }
944
945 st_src_reg
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
947 {
948 if (native_integers)
949 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
950 st_src_reg_for_int(val);
951 else
952 return st_src_reg_for_float(val);
953 }
954
955 static int
956 type_size(const struct glsl_type *type)
957 {
958 unsigned int i;
959 int size;
960
961 switch (type->base_type) {
962 case GLSL_TYPE_UINT:
963 case GLSL_TYPE_INT:
964 case GLSL_TYPE_FLOAT:
965 case GLSL_TYPE_BOOL:
966 if (type->is_matrix()) {
967 return type->matrix_columns;
968 } else {
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
973 */
974 return 1;
975 }
976 case GLSL_TYPE_ARRAY:
977 assert(type->length > 0);
978 return type_size(type->fields.array) * type->length;
979 case GLSL_TYPE_STRUCT:
980 size = 0;
981 for (i = 0; i < type->length; i++) {
982 size += type_size(type->fields.structure[i].type);
983 }
984 return size;
985 case GLSL_TYPE_SAMPLER:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
987 * at link time.
988 */
989 return 1;
990 case GLSL_TYPE_INTERFACE:
991 case GLSL_TYPE_VOID:
992 case GLSL_TYPE_ERROR:
993 assert(!"Invalid type in type_size");
994 break;
995 }
996 return 0;
997 }
998
999 /**
1000 * In the initial pass of codegen, we assign temporary numbers to
1001 * intermediate results. (not SSA -- variable assignments will reuse
1002 * storage).
1003 */
1004 st_src_reg
1005 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1006 {
1007 st_src_reg src;
1008
1009 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1010 src.reladdr = NULL;
1011 src.negate = 0;
1012
1013 if (!options->EmitNoIndirectTemp &&
1014 (type->is_array() || type->is_matrix())) {
1015
1016 src.file = PROGRAM_ARRAY;
1017 src.index = next_array << 16 | 0x8000;
1018 array_sizes[next_array] = type_size(type);
1019 ++next_array;
1020
1021 } else {
1022 src.file = PROGRAM_TEMPORARY;
1023 src.index = next_temp;
1024 next_temp += type_size(type);
1025 }
1026
1027 if (type->is_array() || type->is_record()) {
1028 src.swizzle = SWIZZLE_NOOP;
1029 } else {
1030 src.swizzle = swizzle_for_size(type->vector_elements);
1031 }
1032
1033 return src;
1034 }
1035
1036 variable_storage *
1037 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1038 {
1039
1040 variable_storage *entry;
1041
1042 foreach_iter(exec_list_iterator, iter, this->variables) {
1043 entry = (variable_storage *)iter.get();
1044
1045 if (entry->var == var)
1046 return entry;
1047 }
1048
1049 return NULL;
1050 }
1051
1052 void
1053 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1054 {
1055 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1056 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1057
1058 fp->OriginUpperLeft = ir->origin_upper_left;
1059 fp->PixelCenterInteger = ir->pixel_center_integer;
1060 }
1061
1062 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1063 unsigned int i;
1064 const ir_state_slot *const slots = ir->state_slots;
1065 assert(ir->state_slots != NULL);
1066
1067 /* Check if this statevar's setup in the STATE file exactly
1068 * matches how we'll want to reference it as a
1069 * struct/array/whatever. If not, then we need to move it into
1070 * temporary storage and hope that it'll get copy-propagated
1071 * out.
1072 */
1073 for (i = 0; i < ir->num_state_slots; i++) {
1074 if (slots[i].swizzle != SWIZZLE_XYZW) {
1075 break;
1076 }
1077 }
1078
1079 variable_storage *storage;
1080 st_dst_reg dst;
1081 if (i == ir->num_state_slots) {
1082 /* We'll set the index later. */
1083 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1084 this->variables.push_tail(storage);
1085
1086 dst = undef_dst;
1087 } else {
1088 /* The variable_storage constructor allocates slots based on the size
1089 * of the type. However, this had better match the number of state
1090 * elements that we're going to copy into the new temporary.
1091 */
1092 assert((int) ir->num_state_slots == type_size(ir->type));
1093
1094 dst = st_dst_reg(get_temp(ir->type));
1095
1096 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1097
1098 this->variables.push_tail(storage);
1099 }
1100
1101
1102 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1103 int index = _mesa_add_state_reference(this->prog->Parameters,
1104 (gl_state_index *)slots[i].tokens);
1105
1106 if (storage->file == PROGRAM_STATE_VAR) {
1107 if (storage->index == -1) {
1108 storage->index = index;
1109 } else {
1110 assert(index == storage->index + (int)i);
1111 }
1112 } else {
1113 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1114 * the data being moved since MOV does not care about the type of
1115 * data it is moving, and we don't want to declare registers with
1116 * array or struct types.
1117 */
1118 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1119 src.swizzle = slots[i].swizzle;
1120 emit(ir, TGSI_OPCODE_MOV, dst, src);
1121 /* even a float takes up a whole vec4 reg in a struct/array. */
1122 dst.index++;
1123 }
1124 }
1125
1126 if (storage->file == PROGRAM_TEMPORARY &&
1127 dst.index != storage->index + (int) ir->num_state_slots) {
1128 fail_link(this->shader_program,
1129 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1130 ir->name, dst.index - storage->index,
1131 type_size(ir->type));
1132 }
1133 }
1134 }
1135
1136 void
1137 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1138 {
1139 ir_dereference_variable *counter = NULL;
1140
1141 if (ir->counter != NULL)
1142 counter = new(ir) ir_dereference_variable(ir->counter);
1143
1144 if (ir->from != NULL) {
1145 assert(ir->counter != NULL);
1146
1147 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1148
1149 a->accept(this);
1150 delete a;
1151 }
1152
1153 emit(NULL, TGSI_OPCODE_BGNLOOP);
1154
1155 if (ir->to) {
1156 ir_expression *e =
1157 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1158 counter, ir->to);
1159 ir_if *if_stmt = new(ir) ir_if(e);
1160
1161 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1162
1163 if_stmt->then_instructions.push_tail(brk);
1164
1165 if_stmt->accept(this);
1166
1167 delete if_stmt;
1168 delete e;
1169 delete brk;
1170 }
1171
1172 visit_exec_list(&ir->body_instructions, this);
1173
1174 if (ir->increment) {
1175 ir_expression *e =
1176 new(ir) ir_expression(ir_binop_add, counter->type,
1177 counter, ir->increment);
1178
1179 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1180
1181 a->accept(this);
1182 delete a;
1183 delete e;
1184 }
1185
1186 emit(NULL, TGSI_OPCODE_ENDLOOP);
1187 }
1188
1189 void
1190 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1191 {
1192 switch (ir->mode) {
1193 case ir_loop_jump::jump_break:
1194 emit(NULL, TGSI_OPCODE_BRK);
1195 break;
1196 case ir_loop_jump::jump_continue:
1197 emit(NULL, TGSI_OPCODE_CONT);
1198 break;
1199 }
1200 }
1201
1202
1203 void
1204 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1205 {
1206 assert(0);
1207 (void)ir;
1208 }
1209
1210 void
1211 glsl_to_tgsi_visitor::visit(ir_function *ir)
1212 {
1213 /* Ignore function bodies other than main() -- we shouldn't see calls to
1214 * them since they should all be inlined before we get to glsl_to_tgsi.
1215 */
1216 if (strcmp(ir->name, "main") == 0) {
1217 const ir_function_signature *sig;
1218 exec_list empty;
1219
1220 sig = ir->matching_signature(&empty);
1221
1222 assert(sig);
1223
1224 foreach_iter(exec_list_iterator, iter, sig->body) {
1225 ir_instruction *ir = (ir_instruction *)iter.get();
1226
1227 ir->accept(this);
1228 }
1229 }
1230 }
1231
1232 bool
1233 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1234 {
1235 int nonmul_operand = 1 - mul_operand;
1236 st_src_reg a, b, c;
1237 st_dst_reg result_dst;
1238
1239 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1240 if (!expr || expr->operation != ir_binop_mul)
1241 return false;
1242
1243 expr->operands[0]->accept(this);
1244 a = this->result;
1245 expr->operands[1]->accept(this);
1246 b = this->result;
1247 ir->operands[nonmul_operand]->accept(this);
1248 c = this->result;
1249
1250 this->result = get_temp(ir->type);
1251 result_dst = st_dst_reg(this->result);
1252 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1253 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1254
1255 return true;
1256 }
1257
1258 /**
1259 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1260 *
1261 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1262 * implemented using multiplication, and logical-or is implemented using
1263 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1264 * As result, the logical expression (a & !b) can be rewritten as:
1265 *
1266 * - a * !b
1267 * - a * (1 - b)
1268 * - (a * 1) - (a * b)
1269 * - a + -(a * b)
1270 * - a + (a * -b)
1271 *
1272 * This final expression can be implemented as a single MAD(a, -b, a)
1273 * instruction.
1274 */
1275 bool
1276 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1277 {
1278 const int other_operand = 1 - try_operand;
1279 st_src_reg a, b;
1280
1281 ir_expression *expr = ir->operands[try_operand]->as_expression();
1282 if (!expr || expr->operation != ir_unop_logic_not)
1283 return false;
1284
1285 ir->operands[other_operand]->accept(this);
1286 a = this->result;
1287 expr->operands[0]->accept(this);
1288 b = this->result;
1289
1290 b.negate = ~b.negate;
1291
1292 this->result = get_temp(ir->type);
1293 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1294
1295 return true;
1296 }
1297
1298 bool
1299 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1300 {
1301 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1302 */
1303 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1304 !st_context(this->ctx)->has_shader_model3) {
1305 return false;
1306 }
1307
1308 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1309 if (!sat_src)
1310 return false;
1311
1312 sat_src->accept(this);
1313 st_src_reg src = this->result;
1314
1315 /* If we generated an expression instruction into a temporary in
1316 * processing the saturate's operand, apply the saturate to that
1317 * instruction. Otherwise, generate a MOV to do the saturate.
1318 *
1319 * Note that we have to be careful to only do this optimization if
1320 * the instruction in question was what generated src->result. For
1321 * example, ir_dereference_array might generate a MUL instruction
1322 * to create the reladdr, and return us a src reg using that
1323 * reladdr. That MUL result is not the value we're trying to
1324 * saturate.
1325 */
1326 ir_expression *sat_src_expr = sat_src->as_expression();
1327 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1328 sat_src_expr->operation == ir_binop_add ||
1329 sat_src_expr->operation == ir_binop_dot)) {
1330 glsl_to_tgsi_instruction *new_inst;
1331 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1332 new_inst->saturate = true;
1333 } else {
1334 this->result = get_temp(ir->type);
1335 st_dst_reg result_dst = st_dst_reg(this->result);
1336 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1337 glsl_to_tgsi_instruction *inst;
1338 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1339 inst->saturate = true;
1340 }
1341
1342 return true;
1343 }
1344
1345 void
1346 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1347 st_src_reg *reg, int *num_reladdr)
1348 {
1349 if (!reg->reladdr)
1350 return;
1351
1352 emit_arl(ir, address_reg, *reg->reladdr);
1353
1354 if (*num_reladdr != 1) {
1355 st_src_reg temp = get_temp(glsl_type::vec4_type);
1356
1357 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1358 *reg = temp;
1359 }
1360
1361 (*num_reladdr)--;
1362 }
1363
1364 void
1365 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1366 {
1367 unsigned int operand;
1368 st_src_reg op[Elements(ir->operands)];
1369 st_src_reg result_src;
1370 st_dst_reg result_dst;
1371
1372 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1373 */
1374 if (ir->operation == ir_binop_add) {
1375 if (try_emit_mad(ir, 1))
1376 return;
1377 if (try_emit_mad(ir, 0))
1378 return;
1379 }
1380
1381 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1382 */
1383 if (ir->operation == ir_binop_logic_and) {
1384 if (try_emit_mad_for_and_not(ir, 1))
1385 return;
1386 if (try_emit_mad_for_and_not(ir, 0))
1387 return;
1388 }
1389
1390 if (try_emit_sat(ir))
1391 return;
1392
1393 if (ir->operation == ir_quadop_vector)
1394 assert(!"ir_quadop_vector should have been lowered");
1395
1396 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1397 this->result.file = PROGRAM_UNDEFINED;
1398 ir->operands[operand]->accept(this);
1399 if (this->result.file == PROGRAM_UNDEFINED) {
1400 printf("Failed to get tree for expression operand:\n");
1401 ir->operands[operand]->print();
1402 printf("\n");
1403 exit(1);
1404 }
1405 op[operand] = this->result;
1406
1407 /* Matrix expression operands should have been broken down to vector
1408 * operations already.
1409 */
1410 assert(!ir->operands[operand]->type->is_matrix());
1411 }
1412
1413 int vector_elements = ir->operands[0]->type->vector_elements;
1414 if (ir->operands[1]) {
1415 vector_elements = MAX2(vector_elements,
1416 ir->operands[1]->type->vector_elements);
1417 }
1418
1419 this->result.file = PROGRAM_UNDEFINED;
1420
1421 /* Storage for our result. Ideally for an assignment we'd be using
1422 * the actual storage for the result here, instead.
1423 */
1424 result_src = get_temp(ir->type);
1425 /* convenience for the emit functions below. */
1426 result_dst = st_dst_reg(result_src);
1427 /* Limit writes to the channels that will be used by result_src later.
1428 * This does limit this temp's use as a temporary for multi-instruction
1429 * sequences.
1430 */
1431 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1432
1433 switch (ir->operation) {
1434 case ir_unop_logic_not:
1435 if (result_dst.type != GLSL_TYPE_FLOAT)
1436 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1437 else {
1438 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1439 * older GPUs implement SEQ using multiple instructions (i915 uses two
1440 * SGE instructions and a MUL instruction). Since our logic values are
1441 * 0.0 and 1.0, 1-x also implements !x.
1442 */
1443 op[0].negate = ~op[0].negate;
1444 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1445 }
1446 break;
1447 case ir_unop_neg:
1448 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1449 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1450 else {
1451 op[0].negate = ~op[0].negate;
1452 result_src = op[0];
1453 }
1454 break;
1455 case ir_unop_abs:
1456 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1457 break;
1458 case ir_unop_sign:
1459 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1460 break;
1461 case ir_unop_rcp:
1462 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1463 break;
1464
1465 case ir_unop_exp2:
1466 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1467 break;
1468 case ir_unop_exp:
1469 case ir_unop_log:
1470 assert(!"not reached: should be handled by ir_explog_to_explog2");
1471 break;
1472 case ir_unop_log2:
1473 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1474 break;
1475 case ir_unop_sin:
1476 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1477 break;
1478 case ir_unop_cos:
1479 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1480 break;
1481 case ir_unop_sin_reduced:
1482 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1483 break;
1484 case ir_unop_cos_reduced:
1485 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1486 break;
1487
1488 case ir_unop_dFdx:
1489 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1490 break;
1491 case ir_unop_dFdy:
1492 {
1493 /* The X component contains 1 or -1 depending on whether the framebuffer
1494 * is a FBO or the window system buffer, respectively.
1495 * It is then multiplied with the source operand of DDY.
1496 */
1497 static const gl_state_index transform_y_state[STATE_LENGTH]
1498 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1499
1500 unsigned transform_y_index =
1501 _mesa_add_state_reference(this->prog->Parameters,
1502 transform_y_state);
1503
1504 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1505 transform_y_index,
1506 glsl_type::vec4_type);
1507 transform_y.swizzle = SWIZZLE_XXXX;
1508
1509 st_src_reg temp = get_temp(glsl_type::vec4_type);
1510
1511 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1512 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1513 break;
1514 }
1515
1516 case ir_unop_noise: {
1517 /* At some point, a motivated person could add a better
1518 * implementation of noise. Currently not even the nvidia
1519 * binary drivers do anything more than this. In any case, the
1520 * place to do this is in the GL state tracker, not the poor
1521 * driver.
1522 */
1523 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1524 break;
1525 }
1526
1527 case ir_binop_add:
1528 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1529 break;
1530 case ir_binop_sub:
1531 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1532 break;
1533
1534 case ir_binop_mul:
1535 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1536 break;
1537 case ir_binop_div:
1538 if (result_dst.type == GLSL_TYPE_FLOAT)
1539 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1540 else
1541 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1542 break;
1543 case ir_binop_mod:
1544 if (result_dst.type == GLSL_TYPE_FLOAT)
1545 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1546 else
1547 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1548 break;
1549
1550 case ir_binop_less:
1551 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1552 break;
1553 case ir_binop_greater:
1554 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1555 break;
1556 case ir_binop_lequal:
1557 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1558 break;
1559 case ir_binop_gequal:
1560 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1561 break;
1562 case ir_binop_equal:
1563 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1564 break;
1565 case ir_binop_nequal:
1566 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1567 break;
1568 case ir_binop_all_equal:
1569 /* "==" operator producing a scalar boolean. */
1570 if (ir->operands[0]->type->is_vector() ||
1571 ir->operands[1]->type->is_vector()) {
1572 st_src_reg temp = get_temp(native_integers ?
1573 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1574 glsl_type::vec4_type);
1575
1576 if (native_integers) {
1577 st_dst_reg temp_dst = st_dst_reg(temp);
1578 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1579
1580 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1581
1582 /* Emit 1-3 AND operations to combine the SEQ results. */
1583 switch (ir->operands[0]->type->vector_elements) {
1584 case 2:
1585 break;
1586 case 3:
1587 temp_dst.writemask = WRITEMASK_Y;
1588 temp1.swizzle = SWIZZLE_YYYY;
1589 temp2.swizzle = SWIZZLE_ZZZZ;
1590 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1591 break;
1592 case 4:
1593 temp_dst.writemask = WRITEMASK_X;
1594 temp1.swizzle = SWIZZLE_XXXX;
1595 temp2.swizzle = SWIZZLE_YYYY;
1596 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1597 temp_dst.writemask = WRITEMASK_Y;
1598 temp1.swizzle = SWIZZLE_ZZZZ;
1599 temp2.swizzle = SWIZZLE_WWWW;
1600 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1601 }
1602
1603 temp1.swizzle = SWIZZLE_XXXX;
1604 temp2.swizzle = SWIZZLE_YYYY;
1605 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1606 } else {
1607 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1608
1609 /* After the dot-product, the value will be an integer on the
1610 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1611 */
1612 emit_dp(ir, result_dst, temp, temp, vector_elements);
1613
1614 /* Negating the result of the dot-product gives values on the range
1615 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1616 * This is achieved using SGE.
1617 */
1618 st_src_reg sge_src = result_src;
1619 sge_src.negate = ~sge_src.negate;
1620 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1621 }
1622 } else {
1623 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1624 }
1625 break;
1626 case ir_binop_any_nequal:
1627 /* "!=" operator producing a scalar boolean. */
1628 if (ir->operands[0]->type->is_vector() ||
1629 ir->operands[1]->type->is_vector()) {
1630 st_src_reg temp = get_temp(native_integers ?
1631 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1632 glsl_type::vec4_type);
1633 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1634
1635 if (native_integers) {
1636 st_dst_reg temp_dst = st_dst_reg(temp);
1637 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1638
1639 /* Emit 1-3 OR operations to combine the SNE results. */
1640 switch (ir->operands[0]->type->vector_elements) {
1641 case 2:
1642 break;
1643 case 3:
1644 temp_dst.writemask = WRITEMASK_Y;
1645 temp1.swizzle = SWIZZLE_YYYY;
1646 temp2.swizzle = SWIZZLE_ZZZZ;
1647 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1648 break;
1649 case 4:
1650 temp_dst.writemask = WRITEMASK_X;
1651 temp1.swizzle = SWIZZLE_XXXX;
1652 temp2.swizzle = SWIZZLE_YYYY;
1653 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1654 temp_dst.writemask = WRITEMASK_Y;
1655 temp1.swizzle = SWIZZLE_ZZZZ;
1656 temp2.swizzle = SWIZZLE_WWWW;
1657 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1658 }
1659
1660 temp1.swizzle = SWIZZLE_XXXX;
1661 temp2.swizzle = SWIZZLE_YYYY;
1662 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1663 } else {
1664 /* After the dot-product, the value will be an integer on the
1665 * range [0,4]. Zero stays zero, and positive values become 1.0.
1666 */
1667 glsl_to_tgsi_instruction *const dp =
1668 emit_dp(ir, result_dst, temp, temp, vector_elements);
1669 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1670 /* The clamping to [0,1] can be done for free in the fragment
1671 * shader with a saturate.
1672 */
1673 dp->saturate = true;
1674 } else {
1675 /* Negating the result of the dot-product gives values on the range
1676 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1677 * achieved using SLT.
1678 */
1679 st_src_reg slt_src = result_src;
1680 slt_src.negate = ~slt_src.negate;
1681 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1682 }
1683 }
1684 } else {
1685 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1686 }
1687 break;
1688
1689 case ir_unop_any: {
1690 assert(ir->operands[0]->type->is_vector());
1691
1692 /* After the dot-product, the value will be an integer on the
1693 * range [0,4]. Zero stays zero, and positive values become 1.0.
1694 */
1695 glsl_to_tgsi_instruction *const dp =
1696 emit_dp(ir, result_dst, op[0], op[0],
1697 ir->operands[0]->type->vector_elements);
1698 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1699 result_dst.type == GLSL_TYPE_FLOAT) {
1700 /* The clamping to [0,1] can be done for free in the fragment
1701 * shader with a saturate.
1702 */
1703 dp->saturate = true;
1704 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1705 /* Negating the result of the dot-product gives values on the range
1706 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1707 * is achieved using SLT.
1708 */
1709 st_src_reg slt_src = result_src;
1710 slt_src.negate = ~slt_src.negate;
1711 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1712 }
1713 else {
1714 /* Use SNE 0 if integers are being used as boolean values. */
1715 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1716 }
1717 break;
1718 }
1719
1720 case ir_binop_logic_xor:
1721 if (native_integers)
1722 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1723 else
1724 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1725 break;
1726
1727 case ir_binop_logic_or: {
1728 if (native_integers) {
1729 /* If integers are used as booleans, we can use an actual "or"
1730 * instruction.
1731 */
1732 assert(native_integers);
1733 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1734 } else {
1735 /* After the addition, the value will be an integer on the
1736 * range [0,2]. Zero stays zero, and positive values become 1.0.
1737 */
1738 glsl_to_tgsi_instruction *add =
1739 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1740 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1741 /* The clamping to [0,1] can be done for free in the fragment
1742 * shader with a saturate if floats are being used as boolean values.
1743 */
1744 add->saturate = true;
1745 } else {
1746 /* Negating the result of the addition gives values on the range
1747 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1748 * is achieved using SLT.
1749 */
1750 st_src_reg slt_src = result_src;
1751 slt_src.negate = ~slt_src.negate;
1752 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1753 }
1754 }
1755 break;
1756 }
1757
1758 case ir_binop_logic_and:
1759 /* If native integers are disabled, the bool args are stored as float 0.0
1760 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1761 * actual AND opcode.
1762 */
1763 if (native_integers)
1764 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1765 else
1766 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1767 break;
1768
1769 case ir_binop_dot:
1770 assert(ir->operands[0]->type->is_vector());
1771 assert(ir->operands[0]->type == ir->operands[1]->type);
1772 emit_dp(ir, result_dst, op[0], op[1],
1773 ir->operands[0]->type->vector_elements);
1774 break;
1775
1776 case ir_unop_sqrt:
1777 if (have_sqrt) {
1778 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1779 }
1780 else {
1781 /* sqrt(x) = x * rsq(x). */
1782 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1783 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1784 /* For incoming channels <= 0, set the result to 0. */
1785 op[0].negate = ~op[0].negate;
1786 emit(ir, TGSI_OPCODE_CMP, result_dst,
1787 op[0], result_src, st_src_reg_for_float(0.0));
1788 }
1789 break;
1790 case ir_unop_rsq:
1791 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1792 break;
1793 case ir_unop_i2f:
1794 if (native_integers) {
1795 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1796 break;
1797 }
1798 /* fallthrough to next case otherwise */
1799 case ir_unop_b2f:
1800 if (native_integers) {
1801 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1802 break;
1803 }
1804 /* fallthrough to next case otherwise */
1805 case ir_unop_i2u:
1806 case ir_unop_u2i:
1807 /* Converting between signed and unsigned integers is a no-op. */
1808 result_src = op[0];
1809 break;
1810 case ir_unop_b2i:
1811 if (native_integers) {
1812 /* Booleans are stored as integers using ~0 for true and 0 for false.
1813 * GLSL requires that int(bool) return 1 for true and 0 for false.
1814 * This conversion is done with AND, but it could be done with NEG.
1815 */
1816 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1817 } else {
1818 /* Booleans and integers are both stored as floats when native
1819 * integers are disabled.
1820 */
1821 result_src = op[0];
1822 }
1823 break;
1824 case ir_unop_f2i:
1825 if (native_integers)
1826 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1827 else
1828 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1829 break;
1830 case ir_unop_f2u:
1831 if (native_integers)
1832 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1833 else
1834 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1835 break;
1836 case ir_unop_bitcast_f2i:
1837 result_src = op[0];
1838 result_src.type = GLSL_TYPE_INT;
1839 break;
1840 case ir_unop_bitcast_f2u:
1841 result_src = op[0];
1842 result_src.type = GLSL_TYPE_UINT;
1843 break;
1844 case ir_unop_bitcast_i2f:
1845 case ir_unop_bitcast_u2f:
1846 result_src = op[0];
1847 result_src.type = GLSL_TYPE_FLOAT;
1848 break;
1849 case ir_unop_f2b:
1850 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1851 break;
1852 case ir_unop_i2b:
1853 if (native_integers)
1854 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1855 else
1856 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1857 break;
1858 case ir_unop_trunc:
1859 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1860 break;
1861 case ir_unop_ceil:
1862 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1863 break;
1864 case ir_unop_floor:
1865 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1866 break;
1867 case ir_unop_round_even:
1868 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1869 break;
1870 case ir_unop_fract:
1871 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1872 break;
1873
1874 case ir_binop_min:
1875 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1876 break;
1877 case ir_binop_max:
1878 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1879 break;
1880 case ir_binop_pow:
1881 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1882 break;
1883
1884 case ir_unop_bit_not:
1885 if (native_integers) {
1886 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1887 break;
1888 }
1889 case ir_unop_u2f:
1890 if (native_integers) {
1891 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1892 break;
1893 }
1894 case ir_binop_lshift:
1895 if (native_integers) {
1896 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1897 break;
1898 }
1899 case ir_binop_rshift:
1900 if (native_integers) {
1901 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1902 break;
1903 }
1904 case ir_binop_bit_and:
1905 if (native_integers) {
1906 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1907 break;
1908 }
1909 case ir_binop_bit_xor:
1910 if (native_integers) {
1911 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1912 break;
1913 }
1914 case ir_binop_bit_or:
1915 if (native_integers) {
1916 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1917 break;
1918 }
1919
1920 assert(!"GLSL 1.30 features unsupported");
1921 break;
1922
1923 case ir_binop_ubo_load: {
1924 ir_constant *uniform_block = ir->operands[0]->as_constant();
1925 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1926 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1927 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1928 st_src_reg cbuf;
1929
1930 cbuf.type = glsl_type::vec4_type->base_type;
1931 cbuf.file = PROGRAM_CONSTANT;
1932 cbuf.index = 0;
1933 cbuf.index2D = uniform_block->value.u[0] + 1;
1934 cbuf.reladdr = NULL;
1935 cbuf.negate = 0;
1936
1937 assert(ir->type->is_vector() || ir->type->is_scalar());
1938
1939 if (const_offset_ir) {
1940 index_reg = st_src_reg_for_int(const_offset / 16);
1941 } else {
1942 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1943 }
1944
1945 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1946 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1947 const_offset % 16 / 4,
1948 const_offset % 16 / 4,
1949 const_offset % 16 / 4);
1950
1951 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1952 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1953
1954 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1955 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1956 } else {
1957 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1958 }
1959 break;
1960 }
1961 case ir_triop_lrp:
1962 /* note: we have to reorder the three args here */
1963 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1964 break;
1965 case ir_unop_pack_snorm_2x16:
1966 case ir_unop_pack_unorm_2x16:
1967 case ir_unop_pack_half_2x16:
1968 case ir_unop_pack_snorm_4x8:
1969 case ir_unop_pack_unorm_4x8:
1970 case ir_unop_unpack_snorm_2x16:
1971 case ir_unop_unpack_unorm_2x16:
1972 case ir_unop_unpack_half_2x16:
1973 case ir_unop_unpack_half_2x16_split_x:
1974 case ir_unop_unpack_half_2x16_split_y:
1975 case ir_unop_unpack_snorm_4x8:
1976 case ir_unop_unpack_unorm_4x8:
1977 case ir_binop_pack_half_2x16_split:
1978 case ir_unop_bitfield_reverse:
1979 case ir_unop_bit_count:
1980 case ir_unop_find_msb:
1981 case ir_unop_find_lsb:
1982 case ir_binop_bfm:
1983 case ir_triop_bfi:
1984 case ir_triop_bitfield_extract:
1985 case ir_quadop_bitfield_insert:
1986 case ir_quadop_vector:
1987 case ir_binop_vector_extract:
1988 case ir_triop_vector_insert:
1989 /* This operation is not supported, or should have already been handled.
1990 */
1991 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1992 break;
1993 }
1994
1995 this->result = result_src;
1996 }
1997
1998
1999 void
2000 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2001 {
2002 st_src_reg src;
2003 int i;
2004 int swizzle[4];
2005
2006 /* Note that this is only swizzles in expressions, not those on the left
2007 * hand side of an assignment, which do write masking. See ir_assignment
2008 * for that.
2009 */
2010
2011 ir->val->accept(this);
2012 src = this->result;
2013 assert(src.file != PROGRAM_UNDEFINED);
2014
2015 for (i = 0; i < 4; i++) {
2016 if (i < ir->type->vector_elements) {
2017 switch (i) {
2018 case 0:
2019 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2020 break;
2021 case 1:
2022 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2023 break;
2024 case 2:
2025 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2026 break;
2027 case 3:
2028 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2029 break;
2030 }
2031 } else {
2032 /* If the type is smaller than a vec4, replicate the last
2033 * channel out.
2034 */
2035 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2036 }
2037 }
2038
2039 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2040
2041 this->result = src;
2042 }
2043
2044 void
2045 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2046 {
2047 variable_storage *entry = find_variable_storage(ir->var);
2048 ir_variable *var = ir->var;
2049
2050 if (!entry) {
2051 switch (var->mode) {
2052 case ir_var_uniform:
2053 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2054 var->location);
2055 this->variables.push_tail(entry);
2056 break;
2057 case ir_var_shader_in:
2058 /* The linker assigns locations for varyings and attributes,
2059 * including deprecated builtins (like gl_Color), user-assign
2060 * generic attributes (glBindVertexLocation), and
2061 * user-defined varyings.
2062 */
2063 assert(var->location != -1);
2064 entry = new(mem_ctx) variable_storage(var,
2065 PROGRAM_INPUT,
2066 var->location);
2067 break;
2068 case ir_var_shader_out:
2069 assert(var->location != -1);
2070 entry = new(mem_ctx) variable_storage(var,
2071 PROGRAM_OUTPUT,
2072 var->location + var->index);
2073 break;
2074 case ir_var_system_value:
2075 entry = new(mem_ctx) variable_storage(var,
2076 PROGRAM_SYSTEM_VALUE,
2077 var->location);
2078 break;
2079 case ir_var_auto:
2080 case ir_var_temporary:
2081 st_src_reg src = get_temp(var->type);
2082
2083 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2084 this->variables.push_tail(entry);
2085
2086 break;
2087 }
2088
2089 if (!entry) {
2090 printf("Failed to make storage for %s\n", var->name);
2091 exit(1);
2092 }
2093 }
2094
2095 this->result = st_src_reg(entry->file, entry->index, var->type);
2096 if (!native_integers)
2097 this->result.type = GLSL_TYPE_FLOAT;
2098 }
2099
2100 void
2101 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2102 {
2103 ir_constant *index;
2104 st_src_reg src;
2105 int element_size = type_size(ir->type);
2106
2107 index = ir->array_index->constant_expression_value();
2108
2109 ir->array->accept(this);
2110 src = this->result;
2111
2112 if (index) {
2113 src.index += index->value.i[0] * element_size;
2114 } else {
2115 /* Variable index array dereference. It eats the "vec4" of the
2116 * base of the array and an index that offsets the TGSI register
2117 * index.
2118 */
2119 ir->array_index->accept(this);
2120
2121 st_src_reg index_reg;
2122
2123 if (element_size == 1) {
2124 index_reg = this->result;
2125 } else {
2126 index_reg = get_temp(native_integers ?
2127 glsl_type::int_type : glsl_type::float_type);
2128
2129 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2130 this->result, st_src_reg_for_type(index_reg.type, element_size));
2131 }
2132
2133 /* If there was already a relative address register involved, add the
2134 * new and the old together to get the new offset.
2135 */
2136 if (src.reladdr != NULL) {
2137 st_src_reg accum_reg = get_temp(native_integers ?
2138 glsl_type::int_type : glsl_type::float_type);
2139
2140 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2141 index_reg, *src.reladdr);
2142
2143 index_reg = accum_reg;
2144 }
2145
2146 src.reladdr = ralloc(mem_ctx, st_src_reg);
2147 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2148 }
2149
2150 /* If the type is smaller than a vec4, replicate the last channel out. */
2151 if (ir->type->is_scalar() || ir->type->is_vector())
2152 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2153 else
2154 src.swizzle = SWIZZLE_NOOP;
2155
2156 /* Change the register type to the element type of the array. */
2157 src.type = ir->type->base_type;
2158
2159 this->result = src;
2160 }
2161
2162 void
2163 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2164 {
2165 unsigned int i;
2166 const glsl_type *struct_type = ir->record->type;
2167 int offset = 0;
2168
2169 ir->record->accept(this);
2170
2171 for (i = 0; i < struct_type->length; i++) {
2172 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2173 break;
2174 offset += type_size(struct_type->fields.structure[i].type);
2175 }
2176
2177 /* If the type is smaller than a vec4, replicate the last channel out. */
2178 if (ir->type->is_scalar() || ir->type->is_vector())
2179 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2180 else
2181 this->result.swizzle = SWIZZLE_NOOP;
2182
2183 this->result.index += offset;
2184 this->result.type = ir->type->base_type;
2185 }
2186
2187 /**
2188 * We want to be careful in assignment setup to hit the actual storage
2189 * instead of potentially using a temporary like we might with the
2190 * ir_dereference handler.
2191 */
2192 static st_dst_reg
2193 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2194 {
2195 /* The LHS must be a dereference. If the LHS is a variable indexed array
2196 * access of a vector, it must be separated into a series conditional moves
2197 * before reaching this point (see ir_vec_index_to_cond_assign).
2198 */
2199 assert(ir->as_dereference());
2200 ir_dereference_array *deref_array = ir->as_dereference_array();
2201 if (deref_array) {
2202 assert(!deref_array->array->type->is_vector());
2203 }
2204
2205 /* Use the rvalue deref handler for the most part. We'll ignore
2206 * swizzles in it and write swizzles using writemask, though.
2207 */
2208 ir->accept(v);
2209 return st_dst_reg(v->result);
2210 }
2211
2212 /**
2213 * Process the condition of a conditional assignment
2214 *
2215 * Examines the condition of a conditional assignment to generate the optimal
2216 * first operand of a \c CMP instruction. If the condition is a relational
2217 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2218 * used as the source for the \c CMP instruction. Otherwise the comparison
2219 * is processed to a boolean result, and the boolean result is used as the
2220 * operand to the CMP instruction.
2221 */
2222 bool
2223 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2224 {
2225 ir_rvalue *src_ir = ir;
2226 bool negate = true;
2227 bool switch_order = false;
2228
2229 ir_expression *const expr = ir->as_expression();
2230 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2231 bool zero_on_left = false;
2232
2233 if (expr->operands[0]->is_zero()) {
2234 src_ir = expr->operands[1];
2235 zero_on_left = true;
2236 } else if (expr->operands[1]->is_zero()) {
2237 src_ir = expr->operands[0];
2238 zero_on_left = false;
2239 }
2240
2241 /* a is - 0 + - 0 +
2242 * (a < 0) T F F ( a < 0) T F F
2243 * (0 < a) F F T (-a < 0) F F T
2244 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2245 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2246 * (a > 0) F F T (-a < 0) F F T
2247 * (0 > a) T F F ( a < 0) T F F
2248 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2249 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2250 *
2251 * Note that exchanging the order of 0 and 'a' in the comparison simply
2252 * means that the value of 'a' should be negated.
2253 */
2254 if (src_ir != ir) {
2255 switch (expr->operation) {
2256 case ir_binop_less:
2257 switch_order = false;
2258 negate = zero_on_left;
2259 break;
2260
2261 case ir_binop_greater:
2262 switch_order = false;
2263 negate = !zero_on_left;
2264 break;
2265
2266 case ir_binop_lequal:
2267 switch_order = true;
2268 negate = !zero_on_left;
2269 break;
2270
2271 case ir_binop_gequal:
2272 switch_order = true;
2273 negate = zero_on_left;
2274 break;
2275
2276 default:
2277 /* This isn't the right kind of comparison afterall, so make sure
2278 * the whole condition is visited.
2279 */
2280 src_ir = ir;
2281 break;
2282 }
2283 }
2284 }
2285
2286 src_ir->accept(this);
2287
2288 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2289 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2290 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2291 * computing the condition.
2292 */
2293 if (negate)
2294 this->result.negate = ~this->result.negate;
2295
2296 return switch_order;
2297 }
2298
2299 void
2300 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2301 st_dst_reg *l, st_src_reg *r)
2302 {
2303 if (type->base_type == GLSL_TYPE_STRUCT) {
2304 for (unsigned int i = 0; i < type->length; i++) {
2305 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2306 }
2307 return;
2308 }
2309
2310 if (type->is_array()) {
2311 for (unsigned int i = 0; i < type->length; i++) {
2312 emit_block_mov(ir, type->fields.array, l, r);
2313 }
2314 return;
2315 }
2316
2317 if (type->is_matrix()) {
2318 const struct glsl_type *vec_type;
2319
2320 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2321 type->vector_elements, 1);
2322
2323 for (int i = 0; i < type->matrix_columns; i++) {
2324 emit_block_mov(ir, vec_type, l, r);
2325 }
2326 return;
2327 }
2328
2329 assert(type->is_scalar() || type->is_vector());
2330
2331 r->type = type->base_type;
2332 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2333 l->index++;
2334 r->index++;
2335 }
2336
2337 void
2338 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2339 {
2340 st_dst_reg l;
2341 st_src_reg r;
2342 int i;
2343
2344 ir->rhs->accept(this);
2345 r = this->result;
2346
2347 l = get_assignment_lhs(ir->lhs, this);
2348
2349 /* FINISHME: This should really set to the correct maximal writemask for each
2350 * FINISHME: component written (in the loops below). This case can only
2351 * FINISHME: occur for matrices, arrays, and structures.
2352 */
2353 if (ir->write_mask == 0) {
2354 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2355 l.writemask = WRITEMASK_XYZW;
2356 } else if (ir->lhs->type->is_scalar() &&
2357 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2358 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2359 * FINISHME: W component of fragment shader output zero, work correctly.
2360 */
2361 l.writemask = WRITEMASK_XYZW;
2362 } else {
2363 int swizzles[4];
2364 int first_enabled_chan = 0;
2365 int rhs_chan = 0;
2366
2367 l.writemask = ir->write_mask;
2368
2369 for (int i = 0; i < 4; i++) {
2370 if (l.writemask & (1 << i)) {
2371 first_enabled_chan = GET_SWZ(r.swizzle, i);
2372 break;
2373 }
2374 }
2375
2376 /* Swizzle a small RHS vector into the channels being written.
2377 *
2378 * glsl ir treats write_mask as dictating how many channels are
2379 * present on the RHS while TGSI treats write_mask as just
2380 * showing which channels of the vec4 RHS get written.
2381 */
2382 for (int i = 0; i < 4; i++) {
2383 if (l.writemask & (1 << i))
2384 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2385 else
2386 swizzles[i] = first_enabled_chan;
2387 }
2388 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2389 swizzles[2], swizzles[3]);
2390 }
2391
2392 assert(l.file != PROGRAM_UNDEFINED);
2393 assert(r.file != PROGRAM_UNDEFINED);
2394
2395 if (ir->condition) {
2396 const bool switch_order = this->process_move_condition(ir->condition);
2397 st_src_reg condition = this->result;
2398
2399 for (i = 0; i < type_size(ir->lhs->type); i++) {
2400 st_src_reg l_src = st_src_reg(l);
2401 st_src_reg condition_temp = condition;
2402 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2403
2404 if (native_integers) {
2405 /* This is necessary because TGSI's CMP instruction expects the
2406 * condition to be a float, and we store booleans as integers.
2407 * TODO: really want to avoid i2f path and use UCMP. Requires
2408 * changes to process_move_condition though too.
2409 */
2410 condition_temp = get_temp(glsl_type::vec4_type);
2411 condition.negate = 0;
2412 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2413 condition_temp.swizzle = condition.swizzle;
2414 }
2415
2416 if (switch_order) {
2417 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2418 } else {
2419 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2420 }
2421
2422 l.index++;
2423 r.index++;
2424 }
2425 } else if (ir->rhs->as_expression() &&
2426 this->instructions.get_tail() &&
2427 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2428 type_size(ir->lhs->type) == 1 &&
2429 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2430 /* To avoid emitting an extra MOV when assigning an expression to a
2431 * variable, emit the last instruction of the expression again, but
2432 * replace the destination register with the target of the assignment.
2433 * Dead code elimination will remove the original instruction.
2434 */
2435 glsl_to_tgsi_instruction *inst, *new_inst;
2436 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2437 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2438 new_inst->saturate = inst->saturate;
2439 inst->dead_mask = inst->dst.writemask;
2440 } else {
2441 emit_block_mov(ir, ir->rhs->type, &l, &r);
2442 }
2443 }
2444
2445
2446 void
2447 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2448 {
2449 st_src_reg src;
2450 GLfloat stack_vals[4] = { 0 };
2451 gl_constant_value *values = (gl_constant_value *) stack_vals;
2452 GLenum gl_type = GL_NONE;
2453 unsigned int i;
2454 static int in_array = 0;
2455 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2456
2457 /* Unfortunately, 4 floats is all we can get into
2458 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2459 * aggregate constant and move each constant value into it. If we
2460 * get lucky, copy propagation will eliminate the extra moves.
2461 */
2462 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2463 st_src_reg temp_base = get_temp(ir->type);
2464 st_dst_reg temp = st_dst_reg(temp_base);
2465
2466 foreach_iter(exec_list_iterator, iter, ir->components) {
2467 ir_constant *field_value = (ir_constant *)iter.get();
2468 int size = type_size(field_value->type);
2469
2470 assert(size > 0);
2471
2472 field_value->accept(this);
2473 src = this->result;
2474
2475 for (i = 0; i < (unsigned int)size; i++) {
2476 emit(ir, TGSI_OPCODE_MOV, temp, src);
2477
2478 src.index++;
2479 temp.index++;
2480 }
2481 }
2482 this->result = temp_base;
2483 return;
2484 }
2485
2486 if (ir->type->is_array()) {
2487 st_src_reg temp_base = get_temp(ir->type);
2488 st_dst_reg temp = st_dst_reg(temp_base);
2489 int size = type_size(ir->type->fields.array);
2490
2491 assert(size > 0);
2492 in_array++;
2493
2494 for (i = 0; i < ir->type->length; i++) {
2495 ir->array_elements[i]->accept(this);
2496 src = this->result;
2497 for (int j = 0; j < size; j++) {
2498 emit(ir, TGSI_OPCODE_MOV, temp, src);
2499
2500 src.index++;
2501 temp.index++;
2502 }
2503 }
2504 this->result = temp_base;
2505 in_array--;
2506 return;
2507 }
2508
2509 if (ir->type->is_matrix()) {
2510 st_src_reg mat = get_temp(ir->type);
2511 st_dst_reg mat_column = st_dst_reg(mat);
2512
2513 for (i = 0; i < ir->type->matrix_columns; i++) {
2514 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2515 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2516
2517 src = st_src_reg(file, -1, ir->type->base_type);
2518 src.index = add_constant(file,
2519 values,
2520 ir->type->vector_elements,
2521 GL_FLOAT,
2522 &src.swizzle);
2523 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2524
2525 mat_column.index++;
2526 }
2527
2528 this->result = mat;
2529 return;
2530 }
2531
2532 switch (ir->type->base_type) {
2533 case GLSL_TYPE_FLOAT:
2534 gl_type = GL_FLOAT;
2535 for (i = 0; i < ir->type->vector_elements; i++) {
2536 values[i].f = ir->value.f[i];
2537 }
2538 break;
2539 case GLSL_TYPE_UINT:
2540 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2541 for (i = 0; i < ir->type->vector_elements; i++) {
2542 if (native_integers)
2543 values[i].u = ir->value.u[i];
2544 else
2545 values[i].f = ir->value.u[i];
2546 }
2547 break;
2548 case GLSL_TYPE_INT:
2549 gl_type = native_integers ? GL_INT : GL_FLOAT;
2550 for (i = 0; i < ir->type->vector_elements; i++) {
2551 if (native_integers)
2552 values[i].i = ir->value.i[i];
2553 else
2554 values[i].f = ir->value.i[i];
2555 }
2556 break;
2557 case GLSL_TYPE_BOOL:
2558 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2559 for (i = 0; i < ir->type->vector_elements; i++) {
2560 if (native_integers)
2561 values[i].u = ir->value.b[i] ? ~0 : 0;
2562 else
2563 values[i].f = ir->value.b[i];
2564 }
2565 break;
2566 default:
2567 assert(!"Non-float/uint/int/bool constant");
2568 }
2569
2570 this->result = st_src_reg(file, -1, ir->type);
2571 this->result.index = add_constant(file,
2572 values,
2573 ir->type->vector_elements,
2574 gl_type,
2575 &this->result.swizzle);
2576 }
2577
2578 function_entry *
2579 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2580 {
2581 function_entry *entry;
2582
2583 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2584 entry = (function_entry *)iter.get();
2585
2586 if (entry->sig == sig)
2587 return entry;
2588 }
2589
2590 entry = ralloc(mem_ctx, function_entry);
2591 entry->sig = sig;
2592 entry->sig_id = this->next_signature_id++;
2593 entry->bgn_inst = NULL;
2594
2595 /* Allocate storage for all the parameters. */
2596 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2597 ir_variable *param = (ir_variable *)iter.get();
2598 variable_storage *storage;
2599
2600 storage = find_variable_storage(param);
2601 assert(!storage);
2602
2603 st_src_reg src = get_temp(param->type);
2604
2605 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2606 this->variables.push_tail(storage);
2607 }
2608
2609 if (!sig->return_type->is_void()) {
2610 entry->return_reg = get_temp(sig->return_type);
2611 } else {
2612 entry->return_reg = undef_src;
2613 }
2614
2615 this->function_signatures.push_tail(entry);
2616 return entry;
2617 }
2618
2619 void
2620 glsl_to_tgsi_visitor::visit(ir_call *ir)
2621 {
2622 glsl_to_tgsi_instruction *call_inst;
2623 ir_function_signature *sig = ir->callee;
2624 function_entry *entry = get_function_signature(sig);
2625 int i;
2626
2627 /* Process in parameters. */
2628 exec_list_iterator sig_iter = sig->parameters.iterator();
2629 foreach_iter(exec_list_iterator, iter, *ir) {
2630 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2631 ir_variable *param = (ir_variable *)sig_iter.get();
2632
2633 if (param->mode == ir_var_function_in ||
2634 param->mode == ir_var_function_inout) {
2635 variable_storage *storage = find_variable_storage(param);
2636 assert(storage);
2637
2638 param_rval->accept(this);
2639 st_src_reg r = this->result;
2640
2641 st_dst_reg l;
2642 l.file = storage->file;
2643 l.index = storage->index;
2644 l.reladdr = NULL;
2645 l.writemask = WRITEMASK_XYZW;
2646 l.cond_mask = COND_TR;
2647
2648 for (i = 0; i < type_size(param->type); i++) {
2649 emit(ir, TGSI_OPCODE_MOV, l, r);
2650 l.index++;
2651 r.index++;
2652 }
2653 }
2654
2655 sig_iter.next();
2656 }
2657 assert(!sig_iter.has_next());
2658
2659 /* Emit call instruction */
2660 call_inst = emit(ir, TGSI_OPCODE_CAL);
2661 call_inst->function = entry;
2662
2663 /* Process out parameters. */
2664 sig_iter = sig->parameters.iterator();
2665 foreach_iter(exec_list_iterator, iter, *ir) {
2666 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2667 ir_variable *param = (ir_variable *)sig_iter.get();
2668
2669 if (param->mode == ir_var_function_out ||
2670 param->mode == ir_var_function_inout) {
2671 variable_storage *storage = find_variable_storage(param);
2672 assert(storage);
2673
2674 st_src_reg r;
2675 r.file = storage->file;
2676 r.index = storage->index;
2677 r.reladdr = NULL;
2678 r.swizzle = SWIZZLE_NOOP;
2679 r.negate = 0;
2680
2681 param_rval->accept(this);
2682 st_dst_reg l = st_dst_reg(this->result);
2683
2684 for (i = 0; i < type_size(param->type); i++) {
2685 emit(ir, TGSI_OPCODE_MOV, l, r);
2686 l.index++;
2687 r.index++;
2688 }
2689 }
2690
2691 sig_iter.next();
2692 }
2693 assert(!sig_iter.has_next());
2694
2695 /* Process return value. */
2696 this->result = entry->return_reg;
2697 }
2698
2699 void
2700 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2701 {
2702 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset, sample_index;
2703 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2704 glsl_to_tgsi_instruction *inst = NULL;
2705 unsigned opcode = TGSI_OPCODE_NOP;
2706 const glsl_type *sampler_type = ir->sampler->type;
2707 bool is_cube_array = false;
2708
2709 /* if we are a cube array sampler */
2710 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2711 sampler_type->sampler_array)) {
2712 is_cube_array = true;
2713 }
2714
2715 if (ir->coordinate) {
2716 ir->coordinate->accept(this);
2717
2718 /* Put our coords in a temp. We'll need to modify them for shadow,
2719 * projection, or LOD, so the only case we'd use it as is is if
2720 * we're doing plain old texturing. The optimization passes on
2721 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2722 */
2723 coord = get_temp(glsl_type::vec4_type);
2724 coord_dst = st_dst_reg(coord);
2725 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2726 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2727 }
2728
2729 if (ir->projector) {
2730 ir->projector->accept(this);
2731 projector = this->result;
2732 }
2733
2734 /* Storage for our result. Ideally for an assignment we'd be using
2735 * the actual storage for the result here, instead.
2736 */
2737 result_src = get_temp(ir->type);
2738 result_dst = st_dst_reg(result_src);
2739
2740 switch (ir->op) {
2741 case ir_tex:
2742 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2743 if (ir->offset) {
2744 ir->offset->accept(this);
2745 offset = this->result;
2746 }
2747 break;
2748 case ir_txb:
2749 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2750 ir->lod_info.bias->accept(this);
2751 lod_info = this->result;
2752 if (ir->offset) {
2753 ir->offset->accept(this);
2754 offset = this->result;
2755 }
2756 break;
2757 case ir_txl:
2758 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2759 ir->lod_info.lod->accept(this);
2760 lod_info = this->result;
2761 if (ir->offset) {
2762 ir->offset->accept(this);
2763 offset = this->result;
2764 }
2765 break;
2766 case ir_txd:
2767 opcode = TGSI_OPCODE_TXD;
2768 ir->lod_info.grad.dPdx->accept(this);
2769 dx = this->result;
2770 ir->lod_info.grad.dPdy->accept(this);
2771 dy = this->result;
2772 if (ir->offset) {
2773 ir->offset->accept(this);
2774 offset = this->result;
2775 }
2776 break;
2777 case ir_txs:
2778 opcode = TGSI_OPCODE_TXQ;
2779 ir->lod_info.lod->accept(this);
2780 lod_info = this->result;
2781 break;
2782 case ir_txf:
2783 opcode = TGSI_OPCODE_TXF;
2784 ir->lod_info.lod->accept(this);
2785 lod_info = this->result;
2786 if (ir->offset) {
2787 ir->offset->accept(this);
2788 offset = this->result;
2789 }
2790 break;
2791 case ir_txf_ms:
2792 opcode = TGSI_OPCODE_TXF;
2793 ir->lod_info.sample_index->accept(this);
2794 sample_index = this->result;
2795 break;
2796 case ir_lod:
2797 assert(!"Unexpected ir_lod opcode");
2798 break;
2799 }
2800
2801 if (ir->projector) {
2802 if (opcode == TGSI_OPCODE_TEX) {
2803 /* Slot the projector in as the last component of the coord. */
2804 coord_dst.writemask = WRITEMASK_W;
2805 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2806 coord_dst.writemask = WRITEMASK_XYZW;
2807 opcode = TGSI_OPCODE_TXP;
2808 } else {
2809 st_src_reg coord_w = coord;
2810 coord_w.swizzle = SWIZZLE_WWWW;
2811
2812 /* For the other TEX opcodes there's no projective version
2813 * since the last slot is taken up by LOD info. Do the
2814 * projective divide now.
2815 */
2816 coord_dst.writemask = WRITEMASK_W;
2817 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2818
2819 /* In the case where we have to project the coordinates "by hand,"
2820 * the shadow comparator value must also be projected.
2821 */
2822 st_src_reg tmp_src = coord;
2823 if (ir->shadow_comparitor) {
2824 /* Slot the shadow value in as the second to last component of the
2825 * coord.
2826 */
2827 ir->shadow_comparitor->accept(this);
2828
2829 tmp_src = get_temp(glsl_type::vec4_type);
2830 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2831
2832 /* Projective division not allowed for array samplers. */
2833 assert(!sampler_type->sampler_array);
2834
2835 tmp_dst.writemask = WRITEMASK_Z;
2836 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2837
2838 tmp_dst.writemask = WRITEMASK_XY;
2839 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2840 }
2841
2842 coord_dst.writemask = WRITEMASK_XYZ;
2843 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2844
2845 coord_dst.writemask = WRITEMASK_XYZW;
2846 coord.swizzle = SWIZZLE_XYZW;
2847 }
2848 }
2849
2850 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2851 * comparator was put in the correct place (and projected) by the code,
2852 * above, that handles by-hand projection.
2853 */
2854 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2855 /* Slot the shadow value in as the second to last component of the
2856 * coord.
2857 */
2858 ir->shadow_comparitor->accept(this);
2859
2860 if (is_cube_array) {
2861 cube_sc = get_temp(glsl_type::float_type);
2862 cube_sc_dst = st_dst_reg(cube_sc);
2863 cube_sc_dst.writemask = WRITEMASK_X;
2864 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2865 cube_sc_dst.writemask = WRITEMASK_X;
2866 }
2867 else {
2868 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2869 sampler_type->sampler_array) ||
2870 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2871 coord_dst.writemask = WRITEMASK_W;
2872 } else {
2873 coord_dst.writemask = WRITEMASK_Z;
2874 }
2875
2876 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2877 coord_dst.writemask = WRITEMASK_XYZW;
2878 }
2879 }
2880
2881 if (ir->op == ir_txf_ms) {
2882 coord_dst.writemask = WRITEMASK_W;
2883 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2884 coord_dst.writemask = WRITEMASK_XYZW;
2885 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2886 opcode == TGSI_OPCODE_TXF) {
2887 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2888 coord_dst.writemask = WRITEMASK_W;
2889 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2890 coord_dst.writemask = WRITEMASK_XYZW;
2891 }
2892
2893 if (opcode == TGSI_OPCODE_TXD)
2894 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2895 else if (opcode == TGSI_OPCODE_TXQ)
2896 inst = emit(ir, opcode, result_dst, lod_info);
2897 else if (opcode == TGSI_OPCODE_TXF) {
2898 inst = emit(ir, opcode, result_dst, coord);
2899 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2900 inst = emit(ir, opcode, result_dst, coord, lod_info);
2901 } else if (opcode == TGSI_OPCODE_TEX2) {
2902 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2903 } else
2904 inst = emit(ir, opcode, result_dst, coord);
2905
2906 if (ir->shadow_comparitor)
2907 inst->tex_shadow = GL_TRUE;
2908
2909 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2910 this->shader_program,
2911 this->prog);
2912
2913 if (ir->offset) {
2914 inst->tex_offset_num_offset = 1;
2915 inst->tex_offsets[0].Index = offset.index;
2916 inst->tex_offsets[0].File = offset.file;
2917 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2918 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2919 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2920 }
2921
2922 switch (sampler_type->sampler_dimensionality) {
2923 case GLSL_SAMPLER_DIM_1D:
2924 inst->tex_target = (sampler_type->sampler_array)
2925 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2926 break;
2927 case GLSL_SAMPLER_DIM_2D:
2928 inst->tex_target = (sampler_type->sampler_array)
2929 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2930 break;
2931 case GLSL_SAMPLER_DIM_3D:
2932 inst->tex_target = TEXTURE_3D_INDEX;
2933 break;
2934 case GLSL_SAMPLER_DIM_CUBE:
2935 inst->tex_target = (sampler_type->sampler_array)
2936 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2937 break;
2938 case GLSL_SAMPLER_DIM_RECT:
2939 inst->tex_target = TEXTURE_RECT_INDEX;
2940 break;
2941 case GLSL_SAMPLER_DIM_BUF:
2942 inst->tex_target = TEXTURE_BUFFER_INDEX;
2943 break;
2944 case GLSL_SAMPLER_DIM_EXTERNAL:
2945 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2946 break;
2947 case GLSL_SAMPLER_DIM_MS:
2948 inst->tex_target = (sampler_type->sampler_array)
2949 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
2950 break;
2951 default:
2952 assert(!"Should not get here.");
2953 }
2954
2955 this->result = result_src;
2956 }
2957
2958 void
2959 glsl_to_tgsi_visitor::visit(ir_return *ir)
2960 {
2961 if (ir->get_value()) {
2962 st_dst_reg l;
2963 int i;
2964
2965 assert(current_function);
2966
2967 ir->get_value()->accept(this);
2968 st_src_reg r = this->result;
2969
2970 l = st_dst_reg(current_function->return_reg);
2971
2972 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2973 emit(ir, TGSI_OPCODE_MOV, l, r);
2974 l.index++;
2975 r.index++;
2976 }
2977 }
2978
2979 emit(ir, TGSI_OPCODE_RET);
2980 }
2981
2982 void
2983 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2984 {
2985 if (ir->condition) {
2986 ir->condition->accept(this);
2987 this->result.negate = ~this->result.negate;
2988 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
2989 } else {
2990 /* unconditional kil */
2991 emit(ir, TGSI_OPCODE_KILL);
2992 }
2993 }
2994
2995 void
2996 glsl_to_tgsi_visitor::visit(ir_if *ir)
2997 {
2998 unsigned if_opcode;
2999 glsl_to_tgsi_instruction *if_inst;
3000
3001 ir->condition->accept(this);
3002 assert(this->result.file != PROGRAM_UNDEFINED);
3003
3004 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3005
3006 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3007
3008 this->instructions.push_tail(if_inst);
3009
3010 visit_exec_list(&ir->then_instructions, this);
3011
3012 if (!ir->else_instructions.is_empty()) {
3013 emit(ir->condition, TGSI_OPCODE_ELSE);
3014 visit_exec_list(&ir->else_instructions, this);
3015 }
3016
3017 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3018 }
3019
3020 void
3021 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3022 {
3023 assert(!"Geometry shaders not supported.");
3024 }
3025
3026 void
3027 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3028 {
3029 assert(!"Geometry shaders not supported.");
3030 }
3031
3032 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3033 {
3034 result.file = PROGRAM_UNDEFINED;
3035 next_temp = 1;
3036 next_array = 0;
3037 next_signature_id = 1;
3038 num_immediates = 0;
3039 current_function = NULL;
3040 num_address_regs = 0;
3041 samplers_used = 0;
3042 indirect_addr_consts = false;
3043 glsl_version = 0;
3044 native_integers = false;
3045 mem_ctx = ralloc_context(NULL);
3046 ctx = NULL;
3047 prog = NULL;
3048 shader_program = NULL;
3049 options = NULL;
3050 }
3051
3052 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3053 {
3054 ralloc_free(mem_ctx);
3055 }
3056
3057 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3058 {
3059 delete v;
3060 }
3061
3062
3063 /**
3064 * Count resources used by the given gpu program (number of texture
3065 * samplers, etc).
3066 */
3067 static void
3068 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3069 {
3070 v->samplers_used = 0;
3071
3072 foreach_iter(exec_list_iterator, iter, v->instructions) {
3073 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3074
3075 if (is_tex_instruction(inst->op)) {
3076 v->samplers_used |= 1 << inst->sampler;
3077
3078 if (inst->tex_shadow) {
3079 prog->ShadowSamplers |= 1 << inst->sampler;
3080 }
3081 }
3082 }
3083
3084 prog->SamplersUsed = v->samplers_used;
3085
3086 if (v->shader_program != NULL)
3087 _mesa_update_shader_textures_used(v->shader_program, prog);
3088 }
3089
3090 static void
3091 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3092 struct gl_shader_program *shader_program,
3093 const char *name, const glsl_type *type,
3094 ir_constant *val)
3095 {
3096 if (type->is_record()) {
3097 ir_constant *field_constant;
3098
3099 field_constant = (ir_constant *)val->components.get_head();
3100
3101 for (unsigned int i = 0; i < type->length; i++) {
3102 const glsl_type *field_type = type->fields.structure[i].type;
3103 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3104 type->fields.structure[i].name);
3105 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3106 field_type, field_constant);
3107 field_constant = (ir_constant *)field_constant->next;
3108 }
3109 return;
3110 }
3111
3112 unsigned offset;
3113 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3114 &offset);
3115 if (offset == GL_INVALID_INDEX) {
3116 fail_link(shader_program,
3117 "Couldn't find uniform for initializer %s\n", name);
3118 return;
3119 }
3120 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3121
3122 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3123 ir_constant *element;
3124 const glsl_type *element_type;
3125 if (type->is_array()) {
3126 element = val->array_elements[i];
3127 element_type = type->fields.array;
3128 } else {
3129 element = val;
3130 element_type = type;
3131 }
3132
3133 void *values;
3134
3135 if (element_type->base_type == GLSL_TYPE_BOOL) {
3136 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3137 for (unsigned int j = 0; j < element_type->components(); j++) {
3138 conv[j] = element->value.b[j];
3139 }
3140 values = (void *)conv;
3141 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3142 element_type->vector_elements,
3143 1);
3144 } else {
3145 values = &element->value;
3146 }
3147
3148 if (element_type->is_matrix()) {
3149 _mesa_uniform_matrix(ctx, shader_program,
3150 element_type->matrix_columns,
3151 element_type->vector_elements,
3152 loc, 1, GL_FALSE, (GLfloat *)values);
3153 } else {
3154 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3155 values, element_type->gl_type);
3156 }
3157
3158 loc++;
3159 }
3160 }
3161
3162 /**
3163 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3164 * are read from the given src in this instruction
3165 */
3166 static int
3167 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3168 {
3169 int read_mask = 0, comp;
3170
3171 /* Now, given the src swizzle and the written channels, find which
3172 * components are actually read
3173 */
3174 for (comp = 0; comp < 4; ++comp) {
3175 const unsigned coord = GET_SWZ(src.swizzle, comp);
3176 ASSERT(coord < 4);
3177 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3178 read_mask |= 1 << coord;
3179 }
3180
3181 return read_mask;
3182 }
3183
3184 /**
3185 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3186 * instruction is the first instruction to write to register T0. There are
3187 * several lowering passes done in GLSL IR (e.g. branches and
3188 * relative addressing) that create a large number of conditional assignments
3189 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3190 *
3191 * Here is why this conversion is safe:
3192 * CMP T0, T1 T2 T0 can be expanded to:
3193 * if (T1 < 0.0)
3194 * MOV T0, T2;
3195 * else
3196 * MOV T0, T0;
3197 *
3198 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3199 * as the original program. If (T1 < 0.0) evaluates to false, executing
3200 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3201 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3202 * because any instruction that was going to read from T0 after this was going
3203 * to read a garbage value anyway.
3204 */
3205 void
3206 glsl_to_tgsi_visitor::simplify_cmp(void)
3207 {
3208 unsigned *tempWrites;
3209 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3210
3211 tempWrites = new unsigned[MAX_TEMPS];
3212 if (!tempWrites) {
3213 return;
3214 }
3215 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3216 memset(outputWrites, 0, sizeof(outputWrites));
3217
3218 foreach_iter(exec_list_iterator, iter, this->instructions) {
3219 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3220 unsigned prevWriteMask = 0;
3221
3222 /* Give up if we encounter relative addressing or flow control. */
3223 if (inst->dst.reladdr ||
3224 tgsi_get_opcode_info(inst->op)->is_branch ||
3225 inst->op == TGSI_OPCODE_BGNSUB ||
3226 inst->op == TGSI_OPCODE_CONT ||
3227 inst->op == TGSI_OPCODE_END ||
3228 inst->op == TGSI_OPCODE_ENDSUB ||
3229 inst->op == TGSI_OPCODE_RET) {
3230 break;
3231 }
3232
3233 if (inst->dst.file == PROGRAM_OUTPUT) {
3234 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3235 prevWriteMask = outputWrites[inst->dst.index];
3236 outputWrites[inst->dst.index] |= inst->dst.writemask;
3237 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3238 assert(inst->dst.index < MAX_TEMPS);
3239 prevWriteMask = tempWrites[inst->dst.index];
3240 tempWrites[inst->dst.index] |= inst->dst.writemask;
3241 } else
3242 continue;
3243
3244 /* For a CMP to be considered a conditional write, the destination
3245 * register and source register two must be the same. */
3246 if (inst->op == TGSI_OPCODE_CMP
3247 && !(inst->dst.writemask & prevWriteMask)
3248 && inst->src[2].file == inst->dst.file
3249 && inst->src[2].index == inst->dst.index
3250 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3251
3252 inst->op = TGSI_OPCODE_MOV;
3253 inst->src[0] = inst->src[1];
3254 }
3255 }
3256
3257 delete [] tempWrites;
3258 }
3259
3260 /* Replaces all references to a temporary register index with another index. */
3261 void
3262 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3263 {
3264 foreach_iter(exec_list_iterator, iter, this->instructions) {
3265 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3266 unsigned j;
3267
3268 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3269 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3270 inst->src[j].index == index) {
3271 inst->src[j].index = new_index;
3272 }
3273 }
3274
3275 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3276 inst->dst.index = new_index;
3277 }
3278 }
3279 }
3280
3281 int
3282 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3283 {
3284 int depth = 0; /* loop depth */
3285 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3286 unsigned i = 0, j;
3287
3288 foreach_iter(exec_list_iterator, iter, this->instructions) {
3289 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3290
3291 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3292 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3293 inst->src[j].index == index) {
3294 return (depth == 0) ? i : loop_start;
3295 }
3296 }
3297
3298 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3299 if(depth++ == 0)
3300 loop_start = i;
3301 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3302 if (--depth == 0)
3303 loop_start = -1;
3304 }
3305 assert(depth >= 0);
3306
3307 i++;
3308 }
3309
3310 return -1;
3311 }
3312
3313 int
3314 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3315 {
3316 int depth = 0; /* loop depth */
3317 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3318 int i = 0;
3319
3320 foreach_iter(exec_list_iterator, iter, this->instructions) {
3321 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3322
3323 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3324 return (depth == 0) ? i : loop_start;
3325 }
3326
3327 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3328 if(depth++ == 0)
3329 loop_start = i;
3330 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3331 if (--depth == 0)
3332 loop_start = -1;
3333 }
3334 assert(depth >= 0);
3335
3336 i++;
3337 }
3338
3339 return -1;
3340 }
3341
3342 int
3343 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3344 {
3345 int depth = 0; /* loop depth */
3346 int last = -1; /* index of last instruction that reads the temporary */
3347 unsigned i = 0, j;
3348
3349 foreach_iter(exec_list_iterator, iter, this->instructions) {
3350 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3351
3352 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3353 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3354 inst->src[j].index == index) {
3355 last = (depth == 0) ? i : -2;
3356 }
3357 }
3358
3359 if (inst->op == TGSI_OPCODE_BGNLOOP)
3360 depth++;
3361 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3362 if (--depth == 0 && last == -2)
3363 last = i;
3364 assert(depth >= 0);
3365
3366 i++;
3367 }
3368
3369 assert(last >= -1);
3370 return last;
3371 }
3372
3373 int
3374 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3375 {
3376 int depth = 0; /* loop depth */
3377 int last = -1; /* index of last instruction that writes to the temporary */
3378 int i = 0;
3379
3380 foreach_iter(exec_list_iterator, iter, this->instructions) {
3381 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3382
3383 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3384 last = (depth == 0) ? i : -2;
3385
3386 if (inst->op == TGSI_OPCODE_BGNLOOP)
3387 depth++;
3388 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3389 if (--depth == 0 && last == -2)
3390 last = i;
3391 assert(depth >= 0);
3392
3393 i++;
3394 }
3395
3396 assert(last >= -1);
3397 return last;
3398 }
3399
3400 /*
3401 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3402 * channels for copy propagation and updates following instructions to
3403 * use the original versions.
3404 *
3405 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3406 * will occur. As an example, a TXP production before this pass:
3407 *
3408 * 0: MOV TEMP[1], INPUT[4].xyyy;
3409 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3410 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3411 *
3412 * and after:
3413 *
3414 * 0: MOV TEMP[1], INPUT[4].xyyy;
3415 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3416 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3417 *
3418 * which allows for dead code elimination on TEMP[1]'s writes.
3419 */
3420 void
3421 glsl_to_tgsi_visitor::copy_propagate(void)
3422 {
3423 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3424 glsl_to_tgsi_instruction *,
3425 this->next_temp * 4);
3426 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3427 int level = 0;
3428
3429 foreach_iter(exec_list_iterator, iter, this->instructions) {
3430 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3431
3432 assert(inst->dst.file != PROGRAM_TEMPORARY
3433 || inst->dst.index < this->next_temp);
3434
3435 /* First, do any copy propagation possible into the src regs. */
3436 for (int r = 0; r < 3; r++) {
3437 glsl_to_tgsi_instruction *first = NULL;
3438 bool good = true;
3439 int acp_base = inst->src[r].index * 4;
3440
3441 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3442 inst->src[r].reladdr)
3443 continue;
3444
3445 /* See if we can find entries in the ACP consisting of MOVs
3446 * from the same src register for all the swizzled channels
3447 * of this src register reference.
3448 */
3449 for (int i = 0; i < 4; i++) {
3450 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3451 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3452
3453 if (!copy_chan) {
3454 good = false;
3455 break;
3456 }
3457
3458 assert(acp_level[acp_base + src_chan] <= level);
3459
3460 if (!first) {
3461 first = copy_chan;
3462 } else {
3463 if (first->src[0].file != copy_chan->src[0].file ||
3464 first->src[0].index != copy_chan->src[0].index) {
3465 good = false;
3466 break;
3467 }
3468 }
3469 }
3470
3471 if (good) {
3472 /* We've now validated that we can copy-propagate to
3473 * replace this src register reference. Do it.
3474 */
3475 inst->src[r].file = first->src[0].file;
3476 inst->src[r].index = first->src[0].index;
3477
3478 int swizzle = 0;
3479 for (int i = 0; i < 4; i++) {
3480 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3481 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3482 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3483 (3 * i));
3484 }
3485 inst->src[r].swizzle = swizzle;
3486 }
3487 }
3488
3489 switch (inst->op) {
3490 case TGSI_OPCODE_BGNLOOP:
3491 case TGSI_OPCODE_ENDLOOP:
3492 /* End of a basic block, clear the ACP entirely. */
3493 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3494 break;
3495
3496 case TGSI_OPCODE_IF:
3497 case TGSI_OPCODE_UIF:
3498 ++level;
3499 break;
3500
3501 case TGSI_OPCODE_ENDIF:
3502 case TGSI_OPCODE_ELSE:
3503 /* Clear all channels written inside the block from the ACP, but
3504 * leaving those that were not touched.
3505 */
3506 for (int r = 0; r < this->next_temp; r++) {
3507 for (int c = 0; c < 4; c++) {
3508 if (!acp[4 * r + c])
3509 continue;
3510
3511 if (acp_level[4 * r + c] >= level)
3512 acp[4 * r + c] = NULL;
3513 }
3514 }
3515 if (inst->op == TGSI_OPCODE_ENDIF)
3516 --level;
3517 break;
3518
3519 default:
3520 /* Continuing the block, clear any written channels from
3521 * the ACP.
3522 */
3523 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3524 /* Any temporary might be written, so no copy propagation
3525 * across this instruction.
3526 */
3527 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3528 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3529 inst->dst.reladdr) {
3530 /* Any output might be written, so no copy propagation
3531 * from outputs across this instruction.
3532 */
3533 for (int r = 0; r < this->next_temp; r++) {
3534 for (int c = 0; c < 4; c++) {
3535 if (!acp[4 * r + c])
3536 continue;
3537
3538 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3539 acp[4 * r + c] = NULL;
3540 }
3541 }
3542 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3543 inst->dst.file == PROGRAM_OUTPUT) {
3544 /* Clear where it's used as dst. */
3545 if (inst->dst.file == PROGRAM_TEMPORARY) {
3546 for (int c = 0; c < 4; c++) {
3547 if (inst->dst.writemask & (1 << c)) {
3548 acp[4 * inst->dst.index + c] = NULL;
3549 }
3550 }
3551 }
3552
3553 /* Clear where it's used as src. */
3554 for (int r = 0; r < this->next_temp; r++) {
3555 for (int c = 0; c < 4; c++) {
3556 if (!acp[4 * r + c])
3557 continue;
3558
3559 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3560
3561 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3562 acp[4 * r + c]->src[0].index == inst->dst.index &&
3563 inst->dst.writemask & (1 << src_chan))
3564 {
3565 acp[4 * r + c] = NULL;
3566 }
3567 }
3568 }
3569 }
3570 break;
3571 }
3572
3573 /* If this is a copy, add it to the ACP. */
3574 if (inst->op == TGSI_OPCODE_MOV &&
3575 inst->dst.file == PROGRAM_TEMPORARY &&
3576 !(inst->dst.file == inst->src[0].file &&
3577 inst->dst.index == inst->src[0].index) &&
3578 !inst->dst.reladdr &&
3579 !inst->saturate &&
3580 !inst->src[0].reladdr &&
3581 !inst->src[0].negate) {
3582 for (int i = 0; i < 4; i++) {
3583 if (inst->dst.writemask & (1 << i)) {
3584 acp[4 * inst->dst.index + i] = inst;
3585 acp_level[4 * inst->dst.index + i] = level;
3586 }
3587 }
3588 }
3589 }
3590
3591 ralloc_free(acp_level);
3592 ralloc_free(acp);
3593 }
3594
3595 /*
3596 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3597 *
3598 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3599 * will occur. As an example, a TXP production after copy propagation but
3600 * before this pass:
3601 *
3602 * 0: MOV TEMP[1], INPUT[4].xyyy;
3603 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3604 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3605 *
3606 * and after this pass:
3607 *
3608 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3609 *
3610 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3611 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3612 */
3613 void
3614 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3615 {
3616 int i;
3617
3618 for (i=0; i < this->next_temp; i++) {
3619 int last_read = get_last_temp_read(i);
3620 int j = 0;
3621
3622 foreach_iter(exec_list_iterator, iter, this->instructions) {
3623 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3624
3625 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3626 j > last_read)
3627 {
3628 iter.remove();
3629 delete inst;
3630 }
3631
3632 j++;
3633 }
3634 }
3635 }
3636
3637 /*
3638 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3639 * code elimination. This is less primitive than eliminate_dead_code(), as it
3640 * is per-channel and can detect consecutive writes without a read between them
3641 * as dead code. However, there is some dead code that can be eliminated by
3642 * eliminate_dead_code() but not this function - for example, this function
3643 * cannot eliminate an instruction writing to a register that is never read and
3644 * is the only instruction writing to that register.
3645 *
3646 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3647 * will occur.
3648 */
3649 int
3650 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3651 {
3652 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3653 glsl_to_tgsi_instruction *,
3654 this->next_temp * 4);
3655 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3656 int level = 0;
3657 int removed = 0;
3658
3659 foreach_iter(exec_list_iterator, iter, this->instructions) {
3660 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3661
3662 assert(inst->dst.file != PROGRAM_TEMPORARY
3663 || inst->dst.index < this->next_temp);
3664
3665 switch (inst->op) {
3666 case TGSI_OPCODE_BGNLOOP:
3667 case TGSI_OPCODE_ENDLOOP:
3668 case TGSI_OPCODE_CONT:
3669 case TGSI_OPCODE_BRK:
3670 /* End of a basic block, clear the write array entirely.
3671 *
3672 * This keeps us from killing dead code when the writes are
3673 * on either side of a loop, even when the register isn't touched
3674 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3675 * dead code of this type, so it shouldn't make a difference as long as
3676 * the dead code elimination pass in the GLSL compiler does its job.
3677 */
3678 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3679 break;
3680
3681 case TGSI_OPCODE_ENDIF:
3682 case TGSI_OPCODE_ELSE:
3683 /* Promote the recorded level of all channels written inside the
3684 * preceding if or else block to the level above the if/else block.
3685 */
3686 for (int r = 0; r < this->next_temp; r++) {
3687 for (int c = 0; c < 4; c++) {
3688 if (!writes[4 * r + c])
3689 continue;
3690
3691 if (write_level[4 * r + c] == level)
3692 write_level[4 * r + c] = level-1;
3693 }
3694 }
3695
3696 if(inst->op == TGSI_OPCODE_ENDIF)
3697 --level;
3698
3699 break;
3700
3701 case TGSI_OPCODE_IF:
3702 case TGSI_OPCODE_UIF:
3703 ++level;
3704 /* fallthrough to default case to mark the condition as read */
3705
3706 default:
3707 /* Continuing the block, clear any channels from the write array that
3708 * are read by this instruction.
3709 */
3710 for (unsigned i = 0; i < Elements(inst->src); i++) {
3711 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3712 /* Any temporary might be read, so no dead code elimination
3713 * across this instruction.
3714 */
3715 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3716 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3717 /* Clear where it's used as src. */
3718 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3719 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3720 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3721 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3722
3723 for (int c = 0; c < 4; c++) {
3724 if (src_chans & (1 << c)) {
3725 writes[4 * inst->src[i].index + c] = NULL;
3726 }
3727 }
3728 }
3729 }
3730 break;
3731 }
3732
3733 /* If this instruction writes to a temporary, add it to the write array.
3734 * If there is already an instruction in the write array for one or more
3735 * of the channels, flag that channel write as dead.
3736 */
3737 if (inst->dst.file == PROGRAM_TEMPORARY &&
3738 !inst->dst.reladdr &&
3739 !inst->saturate) {
3740 for (int c = 0; c < 4; c++) {
3741 if (inst->dst.writemask & (1 << c)) {
3742 if (writes[4 * inst->dst.index + c]) {
3743 if (write_level[4 * inst->dst.index + c] < level)
3744 continue;
3745 else
3746 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3747 }
3748 writes[4 * inst->dst.index + c] = inst;
3749 write_level[4 * inst->dst.index + c] = level;
3750 }
3751 }
3752 }
3753 }
3754
3755 /* Anything still in the write array at this point is dead code. */
3756 for (int r = 0; r < this->next_temp; r++) {
3757 for (int c = 0; c < 4; c++) {
3758 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3759 if (inst)
3760 inst->dead_mask |= (1 << c);
3761 }
3762 }
3763
3764 /* Now actually remove the instructions that are completely dead and update
3765 * the writemask of other instructions with dead channels.
3766 */
3767 foreach_iter(exec_list_iterator, iter, this->instructions) {
3768 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3769
3770 if (!inst->dead_mask || !inst->dst.writemask)
3771 continue;
3772 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3773 iter.remove();
3774 delete inst;
3775 removed++;
3776 } else
3777 inst->dst.writemask &= ~(inst->dead_mask);
3778 }
3779
3780 ralloc_free(write_level);
3781 ralloc_free(writes);
3782
3783 return removed;
3784 }
3785
3786 /* Merges temporary registers together where possible to reduce the number of
3787 * registers needed to run a program.
3788 *
3789 * Produces optimal code only after copy propagation and dead code elimination
3790 * have been run. */
3791 void
3792 glsl_to_tgsi_visitor::merge_registers(void)
3793 {
3794 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3795 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3796 int i, j;
3797
3798 /* Read the indices of the last read and first write to each temp register
3799 * into an array so that we don't have to traverse the instruction list as
3800 * much. */
3801 for (i=0; i < this->next_temp; i++) {
3802 last_reads[i] = get_last_temp_read(i);
3803 first_writes[i] = get_first_temp_write(i);
3804 }
3805
3806 /* Start looking for registers with non-overlapping usages that can be
3807 * merged together. */
3808 for (i=0; i < this->next_temp; i++) {
3809 /* Don't touch unused registers. */
3810 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3811
3812 for (j=0; j < this->next_temp; j++) {
3813 /* Don't touch unused registers. */
3814 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3815
3816 /* We can merge the two registers if the first write to j is after or
3817 * in the same instruction as the last read from i. Note that the
3818 * register at index i will always be used earlier or at the same time
3819 * as the register at index j. */
3820 if (first_writes[i] <= first_writes[j] &&
3821 last_reads[i] <= first_writes[j])
3822 {
3823 rename_temp_register(j, i); /* Replace all references to j with i.*/
3824
3825 /* Update the first_writes and last_reads arrays with the new
3826 * values for the merged register index, and mark the newly unused
3827 * register index as such. */
3828 last_reads[i] = last_reads[j];
3829 first_writes[j] = -1;
3830 last_reads[j] = -1;
3831 }
3832 }
3833 }
3834
3835 ralloc_free(last_reads);
3836 ralloc_free(first_writes);
3837 }
3838
3839 /* Reassign indices to temporary registers by reusing unused indices created
3840 * by optimization passes. */
3841 void
3842 glsl_to_tgsi_visitor::renumber_registers(void)
3843 {
3844 int i = 0;
3845 int new_index = 0;
3846
3847 for (i=0; i < this->next_temp; i++) {
3848 if (get_first_temp_read(i) < 0) continue;
3849 if (i != new_index)
3850 rename_temp_register(i, new_index);
3851 new_index++;
3852 }
3853
3854 this->next_temp = new_index;
3855 }
3856
3857 /**
3858 * Returns a fragment program which implements the current pixel transfer ops.
3859 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3860 */
3861 extern "C" void
3862 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3863 glsl_to_tgsi_visitor *original,
3864 int scale_and_bias, int pixel_maps)
3865 {
3866 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3867 struct st_context *st = st_context(original->ctx);
3868 struct gl_program *prog = &fp->Base.Base;
3869 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3870 st_src_reg coord, src0;
3871 st_dst_reg dst0;
3872 glsl_to_tgsi_instruction *inst;
3873
3874 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3875 v->ctx = original->ctx;
3876 v->prog = prog;
3877 v->shader_program = NULL;
3878 v->glsl_version = original->glsl_version;
3879 v->native_integers = original->native_integers;
3880 v->options = original->options;
3881 v->next_temp = original->next_temp;
3882 v->num_address_regs = original->num_address_regs;
3883 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3884 v->indirect_addr_consts = original->indirect_addr_consts;
3885 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3886 v->num_immediates = original->num_immediates;
3887
3888 /*
3889 * Get initial pixel color from the texture.
3890 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3891 */
3892 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3893 src0 = v->get_temp(glsl_type::vec4_type);
3894 dst0 = st_dst_reg(src0);
3895 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3896 inst->sampler = 0;
3897 inst->tex_target = TEXTURE_2D_INDEX;
3898
3899 prog->InputsRead |= VARYING_BIT_TEX0;
3900 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3901 v->samplers_used |= (1 << 0);
3902
3903 if (scale_and_bias) {
3904 static const gl_state_index scale_state[STATE_LENGTH] =
3905 { STATE_INTERNAL, STATE_PT_SCALE,
3906 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3907 static const gl_state_index bias_state[STATE_LENGTH] =
3908 { STATE_INTERNAL, STATE_PT_BIAS,
3909 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3910 GLint scale_p, bias_p;
3911 st_src_reg scale, bias;
3912
3913 scale_p = _mesa_add_state_reference(params, scale_state);
3914 bias_p = _mesa_add_state_reference(params, bias_state);
3915
3916 /* MAD colorTemp, colorTemp, scale, bias; */
3917 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3918 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3919 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3920 }
3921
3922 if (pixel_maps) {
3923 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3924 st_dst_reg temp_dst = st_dst_reg(temp);
3925
3926 assert(st->pixel_xfer.pixelmap_texture);
3927
3928 /* With a little effort, we can do four pixel map look-ups with
3929 * two TEX instructions:
3930 */
3931
3932 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3933 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3934 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3935 inst->sampler = 1;
3936 inst->tex_target = TEXTURE_2D_INDEX;
3937
3938 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3939 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3940 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3941 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3942 inst->sampler = 1;
3943 inst->tex_target = TEXTURE_2D_INDEX;
3944
3945 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3946 v->samplers_used |= (1 << 1);
3947
3948 /* MOV colorTemp, temp; */
3949 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3950 }
3951
3952 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3953 * new visitor. */
3954 foreach_iter(exec_list_iterator, iter, original->instructions) {
3955 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3956 glsl_to_tgsi_instruction *newinst;
3957 st_src_reg src_regs[3];
3958
3959 if (inst->dst.file == PROGRAM_OUTPUT)
3960 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3961
3962 for (int i=0; i<3; i++) {
3963 src_regs[i] = inst->src[i];
3964 if (src_regs[i].file == PROGRAM_INPUT &&
3965 src_regs[i].index == VARYING_SLOT_COL0)
3966 {
3967 src_regs[i].file = PROGRAM_TEMPORARY;
3968 src_regs[i].index = src0.index;
3969 }
3970 else if (src_regs[i].file == PROGRAM_INPUT)
3971 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3972 }
3973
3974 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3975 newinst->tex_target = inst->tex_target;
3976 }
3977
3978 /* Make modifications to fragment program info. */
3979 prog->Parameters = _mesa_combine_parameter_lists(params,
3980 original->prog->Parameters);
3981 _mesa_free_parameter_list(params);
3982 count_resources(v, prog);
3983 fp->glsl_to_tgsi = v;
3984 }
3985
3986 /**
3987 * Make fragment program for glBitmap:
3988 * Sample the texture and kill the fragment if the bit is 0.
3989 * This program will be combined with the user's fragment program.
3990 *
3991 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3992 */
3993 extern "C" void
3994 get_bitmap_visitor(struct st_fragment_program *fp,
3995 glsl_to_tgsi_visitor *original, int samplerIndex)
3996 {
3997 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3998 struct st_context *st = st_context(original->ctx);
3999 struct gl_program *prog = &fp->Base.Base;
4000 st_src_reg coord, src0;
4001 st_dst_reg dst0;
4002 glsl_to_tgsi_instruction *inst;
4003
4004 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4005 v->ctx = original->ctx;
4006 v->prog = prog;
4007 v->shader_program = NULL;
4008 v->glsl_version = original->glsl_version;
4009 v->native_integers = original->native_integers;
4010 v->options = original->options;
4011 v->next_temp = original->next_temp;
4012 v->num_address_regs = original->num_address_regs;
4013 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4014 v->indirect_addr_consts = original->indirect_addr_consts;
4015 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4016 v->num_immediates = original->num_immediates;
4017
4018 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4019 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4020 src0 = v->get_temp(glsl_type::vec4_type);
4021 dst0 = st_dst_reg(src0);
4022 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4023 inst->sampler = samplerIndex;
4024 inst->tex_target = TEXTURE_2D_INDEX;
4025
4026 prog->InputsRead |= VARYING_BIT_TEX0;
4027 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4028 v->samplers_used |= (1 << samplerIndex);
4029
4030 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4031 src0.negate = NEGATE_XYZW;
4032 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4033 src0.swizzle = SWIZZLE_XXXX;
4034 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4035
4036 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4037 * new visitor. */
4038 foreach_iter(exec_list_iterator, iter, original->instructions) {
4039 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
4040 glsl_to_tgsi_instruction *newinst;
4041 st_src_reg src_regs[3];
4042
4043 if (inst->dst.file == PROGRAM_OUTPUT)
4044 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4045
4046 for (int i=0; i<3; i++) {
4047 src_regs[i] = inst->src[i];
4048 if (src_regs[i].file == PROGRAM_INPUT)
4049 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4050 }
4051
4052 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4053 newinst->tex_target = inst->tex_target;
4054 }
4055
4056 /* Make modifications to fragment program info. */
4057 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4058 count_resources(v, prog);
4059 fp->glsl_to_tgsi = v;
4060 }
4061
4062 /* ------------------------- TGSI conversion stuff -------------------------- */
4063 struct label {
4064 unsigned branch_target;
4065 unsigned token;
4066 };
4067
4068 /**
4069 * Intermediate state used during shader translation.
4070 */
4071 struct st_translate {
4072 struct ureg_program *ureg;
4073
4074 struct ureg_dst temps[MAX_TEMPS];
4075 struct ureg_dst arrays[MAX_ARRAYS];
4076 struct ureg_src *constants;
4077 struct ureg_src *immediates;
4078 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4079 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4080 struct ureg_dst address[1];
4081 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4082 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4083
4084 unsigned array_sizes[MAX_ARRAYS];
4085
4086 const GLuint *inputMapping;
4087 const GLuint *outputMapping;
4088
4089 /* For every instruction that contains a label (eg CALL), keep
4090 * details so that we can go back afterwards and emit the correct
4091 * tgsi instruction number for each label.
4092 */
4093 struct label *labels;
4094 unsigned labels_size;
4095 unsigned labels_count;
4096
4097 /* Keep a record of the tgsi instruction number that each mesa
4098 * instruction starts at, will be used to fix up labels after
4099 * translation.
4100 */
4101 unsigned *insn;
4102 unsigned insn_size;
4103 unsigned insn_count;
4104
4105 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4106
4107 boolean error;
4108 };
4109
4110 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4111 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4112 TGSI_SEMANTIC_FACE,
4113 TGSI_SEMANTIC_VERTEXID,
4114 TGSI_SEMANTIC_INSTANCEID
4115 };
4116
4117 /**
4118 * Make note of a branch to a label in the TGSI code.
4119 * After we've emitted all instructions, we'll go over the list
4120 * of labels built here and patch the TGSI code with the actual
4121 * location of each label.
4122 */
4123 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4124 {
4125 unsigned i;
4126
4127 if (t->labels_count + 1 >= t->labels_size) {
4128 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4129 t->labels = (struct label *)realloc(t->labels,
4130 t->labels_size * sizeof(struct label));
4131 if (t->labels == NULL) {
4132 static unsigned dummy;
4133 t->error = TRUE;
4134 return &dummy;
4135 }
4136 }
4137
4138 i = t->labels_count++;
4139 t->labels[i].branch_target = branch_target;
4140 return &t->labels[i].token;
4141 }
4142
4143 /**
4144 * Called prior to emitting the TGSI code for each instruction.
4145 * Allocate additional space for instructions if needed.
4146 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4147 * the next TGSI instruction.
4148 */
4149 static void set_insn_start(struct st_translate *t, unsigned start)
4150 {
4151 if (t->insn_count + 1 >= t->insn_size) {
4152 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4153 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4154 if (t->insn == NULL) {
4155 t->error = TRUE;
4156 return;
4157 }
4158 }
4159
4160 t->insn[t->insn_count++] = start;
4161 }
4162
4163 /**
4164 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4165 */
4166 static struct ureg_src
4167 emit_immediate(struct st_translate *t,
4168 gl_constant_value values[4],
4169 int type, int size)
4170 {
4171 struct ureg_program *ureg = t->ureg;
4172
4173 switch(type)
4174 {
4175 case GL_FLOAT:
4176 return ureg_DECL_immediate(ureg, &values[0].f, size);
4177 case GL_INT:
4178 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4179 case GL_UNSIGNED_INT:
4180 case GL_BOOL:
4181 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4182 default:
4183 assert(!"should not get here - type must be float, int, uint, or bool");
4184 return ureg_src_undef();
4185 }
4186 }
4187
4188 /**
4189 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4190 */
4191 static struct ureg_dst
4192 dst_register(struct st_translate *t,
4193 gl_register_file file,
4194 GLuint index)
4195 {
4196 unsigned array;
4197
4198 switch(file) {
4199 case PROGRAM_UNDEFINED:
4200 return ureg_dst_undef();
4201
4202 case PROGRAM_TEMPORARY:
4203 assert(index >= 0);
4204 assert(index < (int) Elements(t->temps));
4205
4206 if (ureg_dst_is_undef(t->temps[index]))
4207 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4208
4209 return t->temps[index];
4210
4211 case PROGRAM_ARRAY:
4212 array = index >> 16;
4213
4214 assert(array >= 0);
4215 assert(array < (int) Elements(t->arrays));
4216
4217 if (ureg_dst_is_undef(t->arrays[array]))
4218 t->arrays[array] = ureg_DECL_array_temporary(
4219 t->ureg, t->array_sizes[array], TRUE);
4220
4221 return ureg_dst_array_offset(t->arrays[array],
4222 (int)(index & 0xFFFF) - 0x8000);
4223
4224 case PROGRAM_OUTPUT:
4225 if (t->procType == TGSI_PROCESSOR_VERTEX)
4226 assert(index < VARYING_SLOT_MAX);
4227 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4228 assert(index < FRAG_RESULT_MAX);
4229 else
4230 assert(index < VARYING_SLOT_MAX);
4231
4232 assert(t->outputMapping[index] < Elements(t->outputs));
4233
4234 return t->outputs[t->outputMapping[index]];
4235
4236 case PROGRAM_ADDRESS:
4237 return t->address[index];
4238
4239 default:
4240 assert(!"unknown dst register file");
4241 return ureg_dst_undef();
4242 }
4243 }
4244
4245 /**
4246 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4247 */
4248 static struct ureg_src
4249 src_register(struct st_translate *t,
4250 gl_register_file file,
4251 GLint index, GLint index2D)
4252 {
4253 switch(file) {
4254 case PROGRAM_UNDEFINED:
4255 return ureg_src_undef();
4256
4257 case PROGRAM_TEMPORARY:
4258 case PROGRAM_ARRAY:
4259 return ureg_src(dst_register(t, file, index));
4260
4261 case PROGRAM_ENV_PARAM:
4262 case PROGRAM_LOCAL_PARAM:
4263 case PROGRAM_UNIFORM:
4264 assert(index >= 0);
4265 return t->constants[index];
4266 case PROGRAM_STATE_VAR:
4267 case PROGRAM_CONSTANT: /* ie, immediate */
4268 if (index2D) {
4269 struct ureg_src src;
4270 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4271 src.Dimension = 1;
4272 src.DimensionIndex = index2D;
4273 return src;
4274 } else if (index < 0)
4275 return ureg_DECL_constant(t->ureg, 0);
4276 else
4277 return t->constants[index];
4278
4279 case PROGRAM_IMMEDIATE:
4280 return t->immediates[index];
4281
4282 case PROGRAM_INPUT:
4283 assert(t->inputMapping[index] < Elements(t->inputs));
4284 return t->inputs[t->inputMapping[index]];
4285
4286 case PROGRAM_OUTPUT:
4287 assert(t->outputMapping[index] < Elements(t->outputs));
4288 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4289
4290 case PROGRAM_ADDRESS:
4291 return ureg_src(t->address[index]);
4292
4293 case PROGRAM_SYSTEM_VALUE:
4294 assert(index < (int) Elements(t->systemValues));
4295 return t->systemValues[index];
4296
4297 default:
4298 assert(!"unknown src register file");
4299 return ureg_src_undef();
4300 }
4301 }
4302
4303 /**
4304 * Create a TGSI ureg_dst register from an st_dst_reg.
4305 */
4306 static struct ureg_dst
4307 translate_dst(struct st_translate *t,
4308 const st_dst_reg *dst_reg,
4309 bool saturate, bool clamp_color)
4310 {
4311 struct ureg_dst dst = dst_register(t,
4312 dst_reg->file,
4313 dst_reg->index);
4314
4315 dst = ureg_writemask(dst, dst_reg->writemask);
4316
4317 if (saturate)
4318 dst = ureg_saturate(dst);
4319 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4320 /* Clamp colors for ARB_color_buffer_float. */
4321 switch (t->procType) {
4322 case TGSI_PROCESSOR_VERTEX:
4323 /* XXX if the geometry shader is present, this must be done there
4324 * instead of here. */
4325 if (dst_reg->index == VARYING_SLOT_COL0 ||
4326 dst_reg->index == VARYING_SLOT_COL1 ||
4327 dst_reg->index == VARYING_SLOT_BFC0 ||
4328 dst_reg->index == VARYING_SLOT_BFC1) {
4329 dst = ureg_saturate(dst);
4330 }
4331 break;
4332
4333 case TGSI_PROCESSOR_FRAGMENT:
4334 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4335 dst = ureg_saturate(dst);
4336 }
4337 break;
4338 }
4339 }
4340
4341 if (dst_reg->reladdr != NULL) {
4342 assert(dst_reg->file != PROGRAM_TEMPORARY);
4343 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4344 }
4345
4346 return dst;
4347 }
4348
4349 /**
4350 * Create a TGSI ureg_src register from an st_src_reg.
4351 */
4352 static struct ureg_src
4353 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4354 {
4355 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4356
4357 src = ureg_swizzle(src,
4358 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4359 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4360 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4361 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4362
4363 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4364 src = ureg_negate(src);
4365
4366 if (src_reg->reladdr != NULL) {
4367 assert(src_reg->file != PROGRAM_TEMPORARY);
4368 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4369 }
4370
4371 return src;
4372 }
4373
4374 static struct tgsi_texture_offset
4375 translate_tex_offset(struct st_translate *t,
4376 const struct tgsi_texture_offset *in_offset)
4377 {
4378 struct tgsi_texture_offset offset;
4379 struct ureg_src imm_src;
4380
4381 assert(in_offset->File == PROGRAM_IMMEDIATE);
4382 imm_src = t->immediates[in_offset->Index];
4383
4384 offset.File = imm_src.File;
4385 offset.Index = imm_src.Index;
4386 offset.SwizzleX = imm_src.SwizzleX;
4387 offset.SwizzleY = imm_src.SwizzleY;
4388 offset.SwizzleZ = imm_src.SwizzleZ;
4389 offset.File = TGSI_FILE_IMMEDIATE;
4390 offset.Padding = 0;
4391
4392 return offset;
4393 }
4394
4395 static void
4396 compile_tgsi_instruction(struct st_translate *t,
4397 const glsl_to_tgsi_instruction *inst,
4398 bool clamp_dst_color_output)
4399 {
4400 struct ureg_program *ureg = t->ureg;
4401 GLuint i;
4402 struct ureg_dst dst[1];
4403 struct ureg_src src[4];
4404 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4405
4406 unsigned num_dst;
4407 unsigned num_src;
4408 unsigned tex_target;
4409
4410 num_dst = num_inst_dst_regs(inst->op);
4411 num_src = num_inst_src_regs(inst->op);
4412
4413 if (num_dst)
4414 dst[0] = translate_dst(t,
4415 &inst->dst,
4416 inst->saturate,
4417 clamp_dst_color_output);
4418
4419 for (i = 0; i < num_src; i++)
4420 src[i] = translate_src(t, &inst->src[i]);
4421
4422 switch(inst->op) {
4423 case TGSI_OPCODE_BGNLOOP:
4424 case TGSI_OPCODE_CAL:
4425 case TGSI_OPCODE_ELSE:
4426 case TGSI_OPCODE_ENDLOOP:
4427 case TGSI_OPCODE_IF:
4428 case TGSI_OPCODE_UIF:
4429 assert(num_dst == 0);
4430 ureg_label_insn(ureg,
4431 inst->op,
4432 src, num_src,
4433 get_label(t,
4434 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4435 return;
4436
4437 case TGSI_OPCODE_TEX:
4438 case TGSI_OPCODE_TXB:
4439 case TGSI_OPCODE_TXD:
4440 case TGSI_OPCODE_TXL:
4441 case TGSI_OPCODE_TXP:
4442 case TGSI_OPCODE_TXQ:
4443 case TGSI_OPCODE_TXF:
4444 case TGSI_OPCODE_TEX2:
4445 case TGSI_OPCODE_TXB2:
4446 case TGSI_OPCODE_TXL2:
4447 src[num_src++] = t->samplers[inst->sampler];
4448 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4449 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4450 }
4451 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4452
4453 ureg_tex_insn(ureg,
4454 inst->op,
4455 dst, num_dst,
4456 tex_target,
4457 texoffsets, inst->tex_offset_num_offset,
4458 src, num_src);
4459 return;
4460
4461 case TGSI_OPCODE_SCS:
4462 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4463 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4464 break;
4465
4466 default:
4467 ureg_insn(ureg,
4468 inst->op,
4469 dst, num_dst,
4470 src, num_src);
4471 break;
4472 }
4473 }
4474
4475 /**
4476 * Emit the TGSI instructions for inverting and adjusting WPOS.
4477 * This code is unavoidable because it also depends on whether
4478 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4479 */
4480 static void
4481 emit_wpos_adjustment( struct st_translate *t,
4482 const struct gl_program *program,
4483 boolean invert,
4484 GLfloat adjX, GLfloat adjY[2])
4485 {
4486 struct ureg_program *ureg = t->ureg;
4487
4488 /* Fragment program uses fragment position input.
4489 * Need to replace instances of INPUT[WPOS] with temp T
4490 * where T = INPUT[WPOS] by y is inverted.
4491 */
4492 static const gl_state_index wposTransformState[STATE_LENGTH]
4493 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4494 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4495
4496 /* XXX: note we are modifying the incoming shader here! Need to
4497 * do this before emitting the constant decls below, or this
4498 * will be missed:
4499 */
4500 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4501 wposTransformState);
4502
4503 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4504 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4505 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4506
4507 /* First, apply the coordinate shift: */
4508 if (adjX || adjY[0] || adjY[1]) {
4509 if (adjY[0] != adjY[1]) {
4510 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4511 * depending on whether inversion is actually going to be applied
4512 * or not, which is determined by testing against the inversion
4513 * state variable used below, which will be either +1 or -1.
4514 */
4515 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4516
4517 ureg_CMP(ureg, adj_temp,
4518 ureg_scalar(wpostrans, invert ? 2 : 0),
4519 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4520 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4521 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4522 } else {
4523 ureg_ADD(ureg, wpos_temp, wpos_input,
4524 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4525 }
4526 wpos_input = ureg_src(wpos_temp);
4527 } else {
4528 /* MOV wpos_temp, input[wpos]
4529 */
4530 ureg_MOV( ureg, wpos_temp, wpos_input );
4531 }
4532
4533 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4534 * inversion/identity, or the other way around if we're drawing to an FBO.
4535 */
4536 if (invert) {
4537 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4538 */
4539 ureg_MAD( ureg,
4540 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4541 wpos_input,
4542 ureg_scalar(wpostrans, 0),
4543 ureg_scalar(wpostrans, 1));
4544 } else {
4545 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4546 */
4547 ureg_MAD( ureg,
4548 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4549 wpos_input,
4550 ureg_scalar(wpostrans, 2),
4551 ureg_scalar(wpostrans, 3));
4552 }
4553
4554 /* Use wpos_temp as position input from here on:
4555 */
4556 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4557 }
4558
4559
4560 /**
4561 * Emit fragment position/ooordinate code.
4562 */
4563 static void
4564 emit_wpos(struct st_context *st,
4565 struct st_translate *t,
4566 const struct gl_program *program,
4567 struct ureg_program *ureg)
4568 {
4569 const struct gl_fragment_program *fp =
4570 (const struct gl_fragment_program *) program;
4571 struct pipe_screen *pscreen = st->pipe->screen;
4572 GLfloat adjX = 0.0f;
4573 GLfloat adjY[2] = { 0.0f, 0.0f };
4574 boolean invert = FALSE;
4575
4576 /* Query the pixel center conventions supported by the pipe driver and set
4577 * adjX, adjY to help out if it cannot handle the requested one internally.
4578 *
4579 * The bias of the y-coordinate depends on whether y-inversion takes place
4580 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4581 * drawing to an FBO (causes additional inversion), and whether the the pipe
4582 * driver origin and the requested origin differ (the latter condition is
4583 * stored in the 'invert' variable).
4584 *
4585 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4586 *
4587 * center shift only:
4588 * i -> h: +0.5
4589 * h -> i: -0.5
4590 *
4591 * inversion only:
4592 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4593 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4594 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4595 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4596 *
4597 * inversion and center shift:
4598 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4599 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4600 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4601 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4602 */
4603 if (fp->OriginUpperLeft) {
4604 /* Fragment shader wants origin in upper-left */
4605 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4606 /* the driver supports upper-left origin */
4607 }
4608 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4609 /* the driver supports lower-left origin, need to invert Y */
4610 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4611 invert = TRUE;
4612 }
4613 else
4614 assert(0);
4615 }
4616 else {
4617 /* Fragment shader wants origin in lower-left */
4618 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4619 /* the driver supports lower-left origin */
4620 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4621 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4622 /* the driver supports upper-left origin, need to invert Y */
4623 invert = TRUE;
4624 else
4625 assert(0);
4626 }
4627
4628 if (fp->PixelCenterInteger) {
4629 /* Fragment shader wants pixel center integer */
4630 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4631 /* the driver supports pixel center integer */
4632 adjY[1] = 1.0f;
4633 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4634 }
4635 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4636 /* the driver supports pixel center half integer, need to bias X,Y */
4637 adjX = -0.5f;
4638 adjY[0] = -0.5f;
4639 adjY[1] = 0.5f;
4640 }
4641 else
4642 assert(0);
4643 }
4644 else {
4645 /* Fragment shader wants pixel center half integer */
4646 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4647 /* the driver supports pixel center half integer */
4648 }
4649 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4650 /* the driver supports pixel center integer, need to bias X,Y */
4651 adjX = adjY[0] = adjY[1] = 0.5f;
4652 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4653 }
4654 else
4655 assert(0);
4656 }
4657
4658 /* we invert after adjustment so that we avoid the MOV to temporary,
4659 * and reuse the adjustment ADD instead */
4660 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4661 }
4662
4663 /**
4664 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4665 * TGSI uses +1 for front, -1 for back.
4666 * This function converts the TGSI value to the GL value. Simply clamping/
4667 * saturating the value to [0,1] does the job.
4668 */
4669 static void
4670 emit_face_var(struct st_translate *t)
4671 {
4672 struct ureg_program *ureg = t->ureg;
4673 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4674 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4675
4676 /* MOV_SAT face_temp, input[face] */
4677 face_temp = ureg_saturate(face_temp);
4678 ureg_MOV(ureg, face_temp, face_input);
4679
4680 /* Use face_temp as face input from here on: */
4681 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4682 }
4683
4684 static void
4685 emit_edgeflags(struct st_translate *t)
4686 {
4687 struct ureg_program *ureg = t->ureg;
4688 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4689 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4690
4691 ureg_MOV(ureg, edge_dst, edge_src);
4692 }
4693
4694 /**
4695 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4696 * \param program the program to translate
4697 * \param numInputs number of input registers used
4698 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4699 * input indexes
4700 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4701 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4702 * each input
4703 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4704 * \param numOutputs number of output registers used
4705 * \param outputMapping maps Mesa fragment program outputs to TGSI
4706 * generic outputs
4707 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4708 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4709 * each output
4710 *
4711 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4712 */
4713 extern "C" enum pipe_error
4714 st_translate_program(
4715 struct gl_context *ctx,
4716 uint procType,
4717 struct ureg_program *ureg,
4718 glsl_to_tgsi_visitor *program,
4719 const struct gl_program *proginfo,
4720 GLuint numInputs,
4721 const GLuint inputMapping[],
4722 const ubyte inputSemanticName[],
4723 const ubyte inputSemanticIndex[],
4724 const GLuint interpMode[],
4725 const GLboolean is_centroid[],
4726 GLuint numOutputs,
4727 const GLuint outputMapping[],
4728 const ubyte outputSemanticName[],
4729 const ubyte outputSemanticIndex[],
4730 boolean passthrough_edgeflags,
4731 boolean clamp_color)
4732 {
4733 struct st_translate *t;
4734 unsigned i;
4735 enum pipe_error ret = PIPE_OK;
4736
4737 assert(numInputs <= Elements(t->inputs));
4738 assert(numOutputs <= Elements(t->outputs));
4739
4740 t = CALLOC_STRUCT(st_translate);
4741 if (!t) {
4742 ret = PIPE_ERROR_OUT_OF_MEMORY;
4743 goto out;
4744 }
4745
4746 memset(t, 0, sizeof *t);
4747
4748 t->procType = procType;
4749 t->inputMapping = inputMapping;
4750 t->outputMapping = outputMapping;
4751 t->ureg = ureg;
4752
4753 if (program->shader_program) {
4754 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4755 struct gl_uniform_storage *const storage =
4756 &program->shader_program->UniformStorage[i];
4757
4758 _mesa_uniform_detach_all_driver_storage(storage);
4759 }
4760 }
4761
4762 /*
4763 * Declare input attributes.
4764 */
4765 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4766 for (i = 0; i < numInputs; i++) {
4767 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4768 inputSemanticName[i],
4769 inputSemanticIndex[i],
4770 interpMode[i], 0,
4771 is_centroid[i]);
4772 }
4773
4774 if (proginfo->InputsRead & VARYING_BIT_POS) {
4775 /* Must do this after setting up t->inputs, and before
4776 * emitting constant references, below:
4777 */
4778 emit_wpos(st_context(ctx), t, proginfo, ureg);
4779 }
4780
4781 if (proginfo->InputsRead & VARYING_BIT_FACE)
4782 emit_face_var(t);
4783
4784 /*
4785 * Declare output attributes.
4786 */
4787 for (i = 0; i < numOutputs; i++) {
4788 switch (outputSemanticName[i]) {
4789 case TGSI_SEMANTIC_POSITION:
4790 t->outputs[i] = ureg_DECL_output(ureg,
4791 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4792 outputSemanticIndex[i]);
4793 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4794 break;
4795 case TGSI_SEMANTIC_STENCIL:
4796 t->outputs[i] = ureg_DECL_output(ureg,
4797 TGSI_SEMANTIC_STENCIL, /* Stencil */
4798 outputSemanticIndex[i]);
4799 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4800 break;
4801 case TGSI_SEMANTIC_COLOR:
4802 t->outputs[i] = ureg_DECL_output(ureg,
4803 TGSI_SEMANTIC_COLOR,
4804 outputSemanticIndex[i]);
4805 break;
4806 default:
4807 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4808 ret = PIPE_ERROR_BAD_INPUT;
4809 goto out;
4810 }
4811 }
4812 }
4813 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4814 for (i = 0; i < numInputs; i++) {
4815 t->inputs[i] = ureg_DECL_gs_input(ureg,
4816 i,
4817 inputSemanticName[i],
4818 inputSemanticIndex[i]);
4819 }
4820
4821 for (i = 0; i < numOutputs; i++) {
4822 t->outputs[i] = ureg_DECL_output(ureg,
4823 outputSemanticName[i],
4824 outputSemanticIndex[i]);
4825 }
4826 }
4827 else {
4828 assert(procType == TGSI_PROCESSOR_VERTEX);
4829
4830 for (i = 0; i < numInputs; i++) {
4831 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4832 }
4833
4834 for (i = 0; i < numOutputs; i++) {
4835 t->outputs[i] = ureg_DECL_output(ureg,
4836 outputSemanticName[i],
4837 outputSemanticIndex[i]);
4838 }
4839 if (passthrough_edgeflags)
4840 emit_edgeflags(t);
4841 }
4842
4843 /* Declare address register.
4844 */
4845 if (program->num_address_regs > 0) {
4846 assert(program->num_address_regs == 1);
4847 t->address[0] = ureg_DECL_address(ureg);
4848 }
4849
4850 /* Declare misc input registers
4851 */
4852 {
4853 GLbitfield sysInputs = proginfo->SystemValuesRead;
4854 unsigned numSys = 0;
4855 for (i = 0; sysInputs; i++) {
4856 if (sysInputs & (1 << i)) {
4857 unsigned semName = mesa_sysval_to_semantic[i];
4858 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4859 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4860 semName == TGSI_SEMANTIC_VERTEXID) {
4861 /* From Gallium perspective, these system values are always
4862 * integer, and require native integer support. However, if
4863 * native integer is supported on the vertex stage but not the
4864 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4865 * assumes these system values are floats. To resolve the
4866 * inconsistency, we insert a U2F.
4867 */
4868 struct st_context *st = st_context(ctx);
4869 struct pipe_screen *pscreen = st->pipe->screen;
4870 assert(procType == TGSI_PROCESSOR_VERTEX);
4871 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4872 if (!ctx->Const.NativeIntegers) {
4873 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4874 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4875 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4876 }
4877 }
4878 numSys++;
4879 sysInputs &= ~(1 << i);
4880 }
4881 }
4882 }
4883
4884 /* Copy over array sizes
4885 */
4886 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4887
4888 /* Emit constants and uniforms. TGSI uses a single index space for these,
4889 * so we put all the translated regs in t->constants.
4890 */
4891 if (proginfo->Parameters) {
4892 t->constants = (struct ureg_src *)
4893 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4894 if (t->constants == NULL) {
4895 ret = PIPE_ERROR_OUT_OF_MEMORY;
4896 goto out;
4897 }
4898
4899 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4900 switch (proginfo->Parameters->Parameters[i].Type) {
4901 case PROGRAM_ENV_PARAM:
4902 case PROGRAM_LOCAL_PARAM:
4903 case PROGRAM_STATE_VAR:
4904 case PROGRAM_UNIFORM:
4905 t->constants[i] = ureg_DECL_constant(ureg, i);
4906 break;
4907
4908 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4909 * addressing of the const buffer.
4910 * FIXME: Be smarter and recognize param arrays:
4911 * indirect addressing is only valid within the referenced
4912 * array.
4913 */
4914 case PROGRAM_CONSTANT:
4915 if (program->indirect_addr_consts)
4916 t->constants[i] = ureg_DECL_constant(ureg, i);
4917 else
4918 t->constants[i] = emit_immediate(t,
4919 proginfo->Parameters->ParameterValues[i],
4920 proginfo->Parameters->Parameters[i].DataType,
4921 4);
4922 break;
4923 default:
4924 break;
4925 }
4926 }
4927 }
4928
4929 if (program->shader_program) {
4930 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4931
4932 for (i = 0; i < num_ubos; i++) {
4933 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4934 }
4935 }
4936
4937 /* Emit immediate values.
4938 */
4939 t->immediates = (struct ureg_src *)
4940 calloc(program->num_immediates, sizeof(struct ureg_src));
4941 if (t->immediates == NULL) {
4942 ret = PIPE_ERROR_OUT_OF_MEMORY;
4943 goto out;
4944 }
4945 i = 0;
4946 foreach_iter(exec_list_iterator, iter, program->immediates) {
4947 immediate_storage *imm = (immediate_storage *)iter.get();
4948 assert(i < program->num_immediates);
4949 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4950 }
4951 assert(i == program->num_immediates);
4952
4953 /* texture samplers */
4954 for (i = 0; i < ctx->Const.FragmentProgram.MaxTextureImageUnits; i++) {
4955 if (program->samplers_used & (1 << i)) {
4956 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4957 }
4958 }
4959
4960 /* Emit each instruction in turn:
4961 */
4962 foreach_iter(exec_list_iterator, iter, program->instructions) {
4963 set_insn_start(t, ureg_get_instruction_number(ureg));
4964 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4965 clamp_color);
4966 }
4967
4968 /* Fix up all emitted labels:
4969 */
4970 for (i = 0; i < t->labels_count; i++) {
4971 ureg_fixup_label(ureg, t->labels[i].token,
4972 t->insn[t->labels[i].branch_target]);
4973 }
4974
4975 if (program->shader_program) {
4976 /* This has to be done last. Any operation the can cause
4977 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4978 * program constant) has to happen before creating this linkage.
4979 */
4980 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4981 if (program->shader_program->_LinkedShaders[i] == NULL)
4982 continue;
4983
4984 _mesa_associate_uniform_storage(ctx, program->shader_program,
4985 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4986 }
4987 }
4988
4989 out:
4990 if (t) {
4991 free(t->insn);
4992 free(t->labels);
4993 free(t->constants);
4994 free(t->immediates);
4995
4996 if (t->error) {
4997 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4998 }
4999
5000 free(t);
5001 }
5002
5003 return ret;
5004 }
5005 /* ----------------------------- End TGSI code ------------------------------ */
5006
5007 /**
5008 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5009 * generating Mesa IR.
5010 */
5011 static struct gl_program *
5012 get_mesa_program(struct gl_context *ctx,
5013 struct gl_shader_program *shader_program,
5014 struct gl_shader *shader)
5015 {
5016 glsl_to_tgsi_visitor* v;
5017 struct gl_program *prog;
5018 GLenum target;
5019 bool progress;
5020 struct gl_shader_compiler_options *options =
5021 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
5022 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5023 unsigned ptarget;
5024
5025 switch (shader->Type) {
5026 case GL_VERTEX_SHADER:
5027 target = GL_VERTEX_PROGRAM_ARB;
5028 ptarget = PIPE_SHADER_VERTEX;
5029 break;
5030 case GL_FRAGMENT_SHADER:
5031 target = GL_FRAGMENT_PROGRAM_ARB;
5032 ptarget = PIPE_SHADER_FRAGMENT;
5033 break;
5034 case GL_GEOMETRY_SHADER:
5035 target = GL_GEOMETRY_PROGRAM_NV;
5036 ptarget = PIPE_SHADER_GEOMETRY;
5037 break;
5038 default:
5039 assert(!"should not be reached");
5040 return NULL;
5041 }
5042
5043 validate_ir_tree(shader->ir);
5044
5045 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5046 if (!prog)
5047 return NULL;
5048 prog->Parameters = _mesa_new_parameter_list();
5049 v = new glsl_to_tgsi_visitor();
5050 v->ctx = ctx;
5051 v->prog = prog;
5052 v->shader_program = shader_program;
5053 v->options = options;
5054 v->glsl_version = ctx->Const.GLSLVersion;
5055 v->native_integers = ctx->Const.NativeIntegers;
5056
5057 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5058 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5059
5060 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5061 prog->Parameters);
5062
5063 /* Remove reads from output registers. */
5064 lower_output_reads(shader->ir);
5065
5066 /* Emit intermediate IR for main(). */
5067 visit_exec_list(shader->ir, v);
5068
5069 /* Now emit bodies for any functions that were used. */
5070 do {
5071 progress = GL_FALSE;
5072
5073 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5074 function_entry *entry = (function_entry *)iter.get();
5075
5076 if (!entry->bgn_inst) {
5077 v->current_function = entry;
5078
5079 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5080 entry->bgn_inst->function = entry;
5081
5082 visit_exec_list(&entry->sig->body, v);
5083
5084 glsl_to_tgsi_instruction *last;
5085 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5086 if (last->op != TGSI_OPCODE_RET)
5087 v->emit(NULL, TGSI_OPCODE_RET);
5088
5089 glsl_to_tgsi_instruction *end;
5090 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5091 end->function = entry;
5092
5093 progress = GL_TRUE;
5094 }
5095 }
5096 } while (progress);
5097
5098 #if 0
5099 /* Print out some information (for debugging purposes) used by the
5100 * optimization passes. */
5101 for (i=0; i < v->next_temp; i++) {
5102 int fr = v->get_first_temp_read(i);
5103 int fw = v->get_first_temp_write(i);
5104 int lr = v->get_last_temp_read(i);
5105 int lw = v->get_last_temp_write(i);
5106
5107 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5108 assert(fw <= fr);
5109 }
5110 #endif
5111
5112 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5113 v->simplify_cmp();
5114 v->copy_propagate();
5115 while (v->eliminate_dead_code_advanced());
5116
5117 v->eliminate_dead_code();
5118 v->merge_registers();
5119 v->renumber_registers();
5120
5121 /* Write the END instruction. */
5122 v->emit(NULL, TGSI_OPCODE_END);
5123
5124 if (ctx->Shader.Flags & GLSL_DUMP) {
5125 printf("\n");
5126 printf("GLSL IR for linked %s program %d:\n",
5127 _mesa_glsl_shader_target_name(shader->Type),
5128 shader_program->Name);
5129 _mesa_print_ir(shader->ir, NULL);
5130 printf("\n");
5131 printf("\n");
5132 fflush(stdout);
5133 }
5134
5135 prog->Instructions = NULL;
5136 prog->NumInstructions = 0;
5137
5138 do_set_program_inouts(shader->ir, prog, shader->Type);
5139 count_resources(v, prog);
5140
5141 _mesa_reference_program(ctx, &shader->Program, prog);
5142
5143 /* This has to be done last. Any operation the can cause
5144 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5145 * program constant) has to happen before creating this linkage.
5146 */
5147 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5148 if (!shader_program->LinkStatus) {
5149 return NULL;
5150 }
5151
5152 struct st_vertex_program *stvp;
5153 struct st_fragment_program *stfp;
5154 struct st_geometry_program *stgp;
5155
5156 switch (shader->Type) {
5157 case GL_VERTEX_SHADER:
5158 stvp = (struct st_vertex_program *)prog;
5159 stvp->glsl_to_tgsi = v;
5160 break;
5161 case GL_FRAGMENT_SHADER:
5162 stfp = (struct st_fragment_program *)prog;
5163 stfp->glsl_to_tgsi = v;
5164 break;
5165 case GL_GEOMETRY_SHADER:
5166 stgp = (struct st_geometry_program *)prog;
5167 stgp->glsl_to_tgsi = v;
5168 break;
5169 default:
5170 assert(!"should not be reached");
5171 return NULL;
5172 }
5173
5174 return prog;
5175 }
5176
5177 extern "C" {
5178
5179 struct gl_shader *
5180 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5181 {
5182 struct gl_shader *shader;
5183 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5184 type == GL_GEOMETRY_SHADER_ARB);
5185 shader = rzalloc(NULL, struct gl_shader);
5186 if (shader) {
5187 shader->Type = type;
5188 shader->Name = name;
5189 _mesa_init_shader(ctx, shader);
5190 }
5191 return shader;
5192 }
5193
5194 struct gl_shader_program *
5195 st_new_shader_program(struct gl_context *ctx, GLuint name)
5196 {
5197 struct gl_shader_program *shProg;
5198 shProg = rzalloc(NULL, struct gl_shader_program);
5199 if (shProg) {
5200 shProg->Name = name;
5201 _mesa_init_shader_program(ctx, shProg);
5202 }
5203 return shProg;
5204 }
5205
5206 /**
5207 * Link a shader.
5208 * Called via ctx->Driver.LinkShader()
5209 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5210 * with code lowering and other optimizations.
5211 */
5212 GLboolean
5213 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5214 {
5215 assert(prog->LinkStatus);
5216
5217 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5218 if (prog->_LinkedShaders[i] == NULL)
5219 continue;
5220
5221 bool progress;
5222 exec_list *ir = prog->_LinkedShaders[i]->ir;
5223 const struct gl_shader_compiler_options *options =
5224 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5225
5226 /* If there are forms of indirect addressing that the driver
5227 * cannot handle, perform the lowering pass.
5228 */
5229 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5230 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5231 lower_variable_index_to_cond_assign(ir,
5232 options->EmitNoIndirectInput,
5233 options->EmitNoIndirectOutput,
5234 options->EmitNoIndirectTemp,
5235 options->EmitNoIndirectUniform);
5236 }
5237
5238 if (ctx->Extensions.ARB_shading_language_packing) {
5239 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5240 LOWER_UNPACK_SNORM_2x16 |
5241 LOWER_PACK_UNORM_2x16 |
5242 LOWER_UNPACK_UNORM_2x16 |
5243 LOWER_PACK_SNORM_4x8 |
5244 LOWER_UNPACK_SNORM_4x8 |
5245 LOWER_UNPACK_UNORM_4x8 |
5246 LOWER_PACK_UNORM_4x8 |
5247 LOWER_PACK_HALF_2x16 |
5248 LOWER_UNPACK_HALF_2x16;
5249
5250 lower_packing_builtins(ir, lower_inst);
5251 }
5252
5253 do_mat_op_to_vec(ir);
5254 lower_instructions(ir,
5255 MOD_TO_FRACT |
5256 DIV_TO_MUL_RCP |
5257 EXP_TO_EXP2 |
5258 LOG_TO_LOG2 |
5259 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5260 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5261
5262 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5263 do_vec_index_to_cond_assign(ir);
5264 lower_vector_insert(ir, true);
5265 lower_quadop_vector(ir, false);
5266 lower_noise(ir);
5267 if (options->MaxIfDepth == 0) {
5268 lower_discard(ir);
5269 }
5270
5271 do {
5272 progress = false;
5273
5274 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5275
5276 progress = do_common_optimization(ir, true, true,
5277 options->MaxUnrollIterations, options)
5278 || progress;
5279
5280 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5281
5282 } while (progress);
5283
5284 validate_ir_tree(ir);
5285 }
5286
5287 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5288 struct gl_program *linked_prog;
5289
5290 if (prog->_LinkedShaders[i] == NULL)
5291 continue;
5292
5293 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5294
5295 if (linked_prog) {
5296 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5297 linked_prog);
5298 if (!ctx->Driver.ProgramStringNotify(ctx,
5299 _mesa_program_index_to_target(i),
5300 linked_prog)) {
5301 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5302 NULL);
5303 _mesa_reference_program(ctx, &linked_prog, NULL);
5304 return GL_FALSE;
5305 }
5306 }
5307
5308 _mesa_reference_program(ctx, &linked_prog, NULL);
5309 }
5310
5311 return GL_TRUE;
5312 }
5313
5314 void
5315 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5316 const GLuint outputMapping[],
5317 struct pipe_stream_output_info *so)
5318 {
5319 unsigned i;
5320 struct gl_transform_feedback_info *info =
5321 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5322
5323 for (i = 0; i < info->NumOutputs; i++) {
5324 so->output[i].register_index =
5325 outputMapping[info->Outputs[i].OutputRegister];
5326 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5327 so->output[i].num_components = info->Outputs[i].NumComponents;
5328 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5329 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5330 }
5331
5332 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5333 so->stride[i] = info->BufferStride[i];
5334 }
5335 so->num_outputs = info->NumOutputs;
5336 }
5337
5338 } /* extern "C" */