ir_to_mesa, glsl_to_tgsi: lower ir_unop_saturate
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 #define MAX_GLSL_TEXTURE_OFFSET 4
91
92 class st_src_reg;
93 class st_dst_reg;
94
95 static int swizzle_for_size(int size);
96
97 /**
98 * This struct is a corresponding struct to TGSI ureg_src.
99 */
100 class st_src_reg {
101 public:
102 st_src_reg(gl_register_file file, int index, const glsl_type *type)
103 {
104 this->file = file;
105 this->index = index;
106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
107 this->swizzle = swizzle_for_size(type->vector_elements);
108 else
109 this->swizzle = SWIZZLE_XYZW;
110 this->negate = 0;
111 this->index2D = 0;
112 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
113 this->reladdr = NULL;
114 this->reladdr2 = NULL;
115 this->has_index2 = false;
116 }
117
118 st_src_reg(gl_register_file file, int index, int type)
119 {
120 this->type = type;
121 this->file = file;
122 this->index = index;
123 this->index2D = 0;
124 this->swizzle = SWIZZLE_XYZW;
125 this->negate = 0;
126 this->reladdr = NULL;
127 this->reladdr2 = NULL;
128 this->has_index2 = false;
129 }
130
131 st_src_reg(gl_register_file file, int index, int type, int index2D)
132 {
133 this->type = type;
134 this->file = file;
135 this->index = index;
136 this->index2D = index2D;
137 this->swizzle = SWIZZLE_XYZW;
138 this->negate = 0;
139 this->reladdr = NULL;
140 this->reladdr2 = NULL;
141 this->has_index2 = false;
142 }
143
144 st_src_reg()
145 {
146 this->type = GLSL_TYPE_ERROR;
147 this->file = PROGRAM_UNDEFINED;
148 this->index = 0;
149 this->index2D = 0;
150 this->swizzle = 0;
151 this->negate = 0;
152 this->reladdr = NULL;
153 this->reladdr2 = NULL;
154 this->has_index2 = false;
155 }
156
157 explicit st_src_reg(st_dst_reg reg);
158
159 gl_register_file file; /**< PROGRAM_* from Mesa */
160 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
161 int index2D;
162 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
163 int negate; /**< NEGATE_XYZW mask from mesa */
164 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
165 /** Register index should be offset by the integer in this reg. */
166 st_src_reg *reladdr;
167 st_src_reg *reladdr2;
168 bool has_index2;
169 };
170
171 class st_dst_reg {
172 public:
173 st_dst_reg(gl_register_file file, int writemask, int type, int index)
174 {
175 this->file = file;
176 this->index = index;
177 this->writemask = writemask;
178 this->cond_mask = COND_TR;
179 this->reladdr = NULL;
180 this->type = type;
181 }
182
183 st_dst_reg(gl_register_file file, int writemask, int type)
184 {
185 this->file = file;
186 this->index = 0;
187 this->writemask = writemask;
188 this->cond_mask = COND_TR;
189 this->reladdr = NULL;
190 this->type = type;
191 }
192
193 st_dst_reg()
194 {
195 this->type = GLSL_TYPE_ERROR;
196 this->file = PROGRAM_UNDEFINED;
197 this->index = 0;
198 this->writemask = 0;
199 this->cond_mask = COND_TR;
200 this->reladdr = NULL;
201 }
202
203 explicit st_dst_reg(st_src_reg reg);
204
205 gl_register_file file; /**< PROGRAM_* from Mesa */
206 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
207 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
208 GLuint cond_mask:4;
209 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
210 /** Register index should be offset by the integer in this reg. */
211 st_src_reg *reladdr;
212 };
213
214 st_src_reg::st_src_reg(st_dst_reg reg)
215 {
216 this->type = reg.type;
217 this->file = reg.file;
218 this->index = reg.index;
219 this->swizzle = SWIZZLE_XYZW;
220 this->negate = 0;
221 this->reladdr = reg.reladdr;
222 this->index2D = 0;
223 this->reladdr2 = NULL;
224 this->has_index2 = false;
225 }
226
227 st_dst_reg::st_dst_reg(st_src_reg reg)
228 {
229 this->type = reg.type;
230 this->file = reg.file;
231 this->index = reg.index;
232 this->writemask = WRITEMASK_XYZW;
233 this->cond_mask = COND_TR;
234 this->reladdr = reg.reladdr;
235 }
236
237 class glsl_to_tgsi_instruction : public exec_node {
238 public:
239 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
240
241 unsigned op;
242 st_dst_reg dst;
243 st_src_reg src[4];
244 /** Pointer to the ir source this tree came from for debugging */
245 ir_instruction *ir;
246 GLboolean cond_update;
247 bool saturate;
248 st_src_reg sampler; /**< sampler register */
249 int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */
250 int tex_target; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow;
252
253 st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
254 unsigned tex_offset_num_offset;
255 int dead_mask; /**< Used in dead code elimination */
256
257 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
258 };
259
260 class variable_storage : public exec_node {
261 public:
262 variable_storage(ir_variable *var, gl_register_file file, int index)
263 : file(file), index(index), var(var)
264 {
265 /* empty */
266 }
267
268 gl_register_file file;
269 int index;
270 ir_variable *var; /* variable that maps to this, if any */
271 };
272
273 class immediate_storage : public exec_node {
274 public:
275 immediate_storage(gl_constant_value *values, int size, int type)
276 {
277 memcpy(this->values, values, size * sizeof(gl_constant_value));
278 this->size = size;
279 this->type = type;
280 }
281
282 gl_constant_value values[4];
283 int size; /**< Number of components (1-4) */
284 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
285 };
286
287 class function_entry : public exec_node {
288 public:
289 ir_function_signature *sig;
290
291 /**
292 * identifier of this function signature used by the program.
293 *
294 * At the point that TGSI instructions for function calls are
295 * generated, we don't know the address of the first instruction of
296 * the function body. So we make the BranchTarget that is called a
297 * small integer and rewrite them during set_branchtargets().
298 */
299 int sig_id;
300
301 /**
302 * Pointer to first instruction of the function body.
303 *
304 * Set during function body emits after main() is processed.
305 */
306 glsl_to_tgsi_instruction *bgn_inst;
307
308 /**
309 * Index of the first instruction of the function body in actual TGSI.
310 *
311 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
312 */
313 int inst;
314
315 /** Storage for the return value. */
316 st_src_reg return_reg;
317 };
318
319 struct glsl_to_tgsi_visitor : public ir_visitor {
320 public:
321 glsl_to_tgsi_visitor();
322 ~glsl_to_tgsi_visitor();
323
324 function_entry *current_function;
325
326 struct gl_context *ctx;
327 struct gl_program *prog;
328 struct gl_shader_program *shader_program;
329 struct gl_shader *shader;
330 struct gl_shader_compiler_options *options;
331
332 int next_temp;
333
334 unsigned array_sizes[MAX_ARRAYS];
335 unsigned next_array;
336
337 int num_address_regs;
338 int samplers_used;
339 bool indirect_addr_consts;
340
341 int glsl_version;
342 bool native_integers;
343 bool have_sqrt;
344
345 variable_storage *find_variable_storage(ir_variable *var);
346
347 int add_constant(gl_register_file file, gl_constant_value values[4],
348 int size, int datatype, GLuint *swizzle_out);
349
350 function_entry *get_function_signature(ir_function_signature *sig);
351
352 st_src_reg get_temp(const glsl_type *type);
353 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
354
355 st_src_reg st_src_reg_for_float(float val);
356 st_src_reg st_src_reg_for_int(int val);
357 st_src_reg st_src_reg_for_type(int type, int val);
358
359 /**
360 * \name Visit methods
361 *
362 * As typical for the visitor pattern, there must be one \c visit method for
363 * each concrete subclass of \c ir_instruction. Virtual base classes within
364 * the hierarchy should not have \c visit methods.
365 */
366 /*@{*/
367 virtual void visit(ir_variable *);
368 virtual void visit(ir_loop *);
369 virtual void visit(ir_loop_jump *);
370 virtual void visit(ir_function_signature *);
371 virtual void visit(ir_function *);
372 virtual void visit(ir_expression *);
373 virtual void visit(ir_swizzle *);
374 virtual void visit(ir_dereference_variable *);
375 virtual void visit(ir_dereference_array *);
376 virtual void visit(ir_dereference_record *);
377 virtual void visit(ir_assignment *);
378 virtual void visit(ir_constant *);
379 virtual void visit(ir_call *);
380 virtual void visit(ir_return *);
381 virtual void visit(ir_discard *);
382 virtual void visit(ir_texture *);
383 virtual void visit(ir_if *);
384 virtual void visit(ir_emit_vertex *);
385 virtual void visit(ir_end_primitive *);
386 /*@}*/
387
388 st_src_reg result;
389
390 /** List of variable_storage */
391 exec_list variables;
392
393 /** List of immediate_storage */
394 exec_list immediates;
395 unsigned num_immediates;
396
397 /** List of function_entry */
398 exec_list function_signatures;
399 int next_signature_id;
400
401 /** List of glsl_to_tgsi_instruction */
402 exec_list instructions;
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
405
406 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
407 st_dst_reg dst, st_src_reg src0);
408
409 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
410 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
411
412 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
413 st_dst_reg dst,
414 st_src_reg src0, st_src_reg src1, st_src_reg src2);
415
416 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
417 st_dst_reg dst,
418 st_src_reg src0, st_src_reg src1,
419 st_src_reg src2, st_src_reg src3);
420
421 unsigned get_opcode(ir_instruction *ir, unsigned op,
422 st_dst_reg dst,
423 st_src_reg src0, st_src_reg src1);
424
425 /**
426 * Emit the correct dot-product instruction for the type of arguments
427 */
428 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
429 st_dst_reg dst,
430 st_src_reg src0,
431 st_src_reg src1,
432 unsigned elements);
433
434 void emit_scalar(ir_instruction *ir, unsigned op,
435 st_dst_reg dst, st_src_reg src0);
436
437 void emit_scalar(ir_instruction *ir, unsigned op,
438 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
439
440 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
441
442 void emit_scs(ir_instruction *ir, unsigned op,
443 st_dst_reg dst, const st_src_reg &src);
444
445 bool try_emit_mad(ir_expression *ir,
446 int mul_operand);
447 bool try_emit_mad_for_and_not(ir_expression *ir,
448 int mul_operand);
449 bool try_emit_sat(ir_expression *ir);
450
451 void emit_swz(ir_expression *ir);
452
453 bool process_move_condition(ir_rvalue *ir);
454
455 void simplify_cmp(void);
456
457 void rename_temp_register(int index, int new_index);
458 int get_first_temp_read(int index);
459 int get_first_temp_write(int index);
460 int get_last_temp_read(int index);
461 int get_last_temp_write(int index);
462
463 void copy_propagate(void);
464 int eliminate_dead_code(void);
465 void merge_registers(void);
466 void renumber_registers(void);
467
468 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
469 st_dst_reg *l, st_src_reg *r);
470
471 void *mem_ctx;
472 };
473
474 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
475
476 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
477
478 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
479 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
480 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
481
482 static void
483 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
484
485 static void
486 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
487 {
488 va_list args;
489 va_start(args, fmt);
490 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
491 va_end(args);
492
493 prog->LinkStatus = GL_FALSE;
494 }
495
496 static int
497 swizzle_for_size(int size)
498 {
499 int size_swizzles[4] = {
500 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
501 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
502 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
503 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
504 };
505
506 assert((size >= 1) && (size <= 4));
507 return size_swizzles[size - 1];
508 }
509
510 static bool
511 is_tex_instruction(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->is_tex;
515 }
516
517 static unsigned
518 num_inst_dst_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->num_dst;
522 }
523
524 static unsigned
525 num_inst_src_regs(unsigned opcode)
526 {
527 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
528 return info->is_tex ? info->num_src - 1 : info->num_src;
529 }
530
531 glsl_to_tgsi_instruction *
532 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
533 st_dst_reg dst,
534 st_src_reg src0, st_src_reg src1,
535 st_src_reg src2, st_src_reg src3)
536 {
537 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
538 int num_reladdr = 0, i;
539
540 op = get_opcode(ir, op, dst, src0, src1);
541
542 /* If we have to do relative addressing, we want to load the ARL
543 * reg directly for one of the regs, and preload the other reladdr
544 * sources into temps.
545 */
546 num_reladdr += dst.reladdr != NULL;
547 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
548 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
549 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
550 num_reladdr += src3.reladdr != NULL || src3.reladdr2 != NULL;
551
552 reladdr_to_temp(ir, &src3, &num_reladdr);
553 reladdr_to_temp(ir, &src2, &num_reladdr);
554 reladdr_to_temp(ir, &src1, &num_reladdr);
555 reladdr_to_temp(ir, &src0, &num_reladdr);
556
557 if (dst.reladdr) {
558 emit_arl(ir, address_reg, *dst.reladdr);
559 num_reladdr--;
560 }
561 assert(num_reladdr == 0);
562
563 inst->op = op;
564 inst->dst = dst;
565 inst->src[0] = src0;
566 inst->src[1] = src1;
567 inst->src[2] = src2;
568 inst->src[3] = src3;
569 inst->ir = ir;
570 inst->dead_mask = 0;
571
572 inst->function = NULL;
573
574 /* Update indirect addressing status used by TGSI */
575 if (dst.reladdr) {
576 switch(dst.file) {
577 case PROGRAM_STATE_VAR:
578 case PROGRAM_CONSTANT:
579 case PROGRAM_UNIFORM:
580 this->indirect_addr_consts = true;
581 break;
582 case PROGRAM_IMMEDIATE:
583 assert(!"immediates should not have indirect addressing");
584 break;
585 default:
586 break;
587 }
588 }
589 else {
590 for (i=0; i<4; i++) {
591 if(inst->src[i].reladdr) {
592 switch(inst->src[i].file) {
593 case PROGRAM_STATE_VAR:
594 case PROGRAM_CONSTANT:
595 case PROGRAM_UNIFORM:
596 this->indirect_addr_consts = true;
597 break;
598 case PROGRAM_IMMEDIATE:
599 assert(!"immediates should not have indirect addressing");
600 break;
601 default:
602 break;
603 }
604 }
605 }
606 }
607
608 this->instructions.push_tail(inst);
609
610 return inst;
611 }
612
613 glsl_to_tgsi_instruction *
614 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
615 st_dst_reg dst, st_src_reg src0,
616 st_src_reg src1, st_src_reg src2)
617 {
618 return emit(ir, op, dst, src0, src1, src2, undef_src);
619 }
620
621 glsl_to_tgsi_instruction *
622 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
623 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
624 {
625 return emit(ir, op, dst, src0, src1, undef_src, undef_src);
626 }
627
628 glsl_to_tgsi_instruction *
629 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
630 st_dst_reg dst, st_src_reg src0)
631 {
632 assert(dst.writemask != 0);
633 return emit(ir, op, dst, src0, undef_src, undef_src, undef_src);
634 }
635
636 glsl_to_tgsi_instruction *
637 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
638 {
639 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src);
640 }
641
642 /**
643 * Determines whether to use an integer, unsigned integer, or float opcode
644 * based on the operands and input opcode, then emits the result.
645 */
646 unsigned
647 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
648 st_dst_reg dst,
649 st_src_reg src0, st_src_reg src1)
650 {
651 int type = GLSL_TYPE_FLOAT;
652
653 if (op == TGSI_OPCODE_MOV)
654 return op;
655
656 assert(src0.type != GLSL_TYPE_ARRAY);
657 assert(src0.type != GLSL_TYPE_STRUCT);
658 assert(src1.type != GLSL_TYPE_ARRAY);
659 assert(src1.type != GLSL_TYPE_STRUCT);
660
661 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
662 type = GLSL_TYPE_FLOAT;
663 else if (native_integers)
664 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
665
666 #define case4(c, f, i, u) \
667 case TGSI_OPCODE_##c: \
668 if (type == GLSL_TYPE_INT) \
669 op = TGSI_OPCODE_##i; \
670 else if (type == GLSL_TYPE_UINT) \
671 op = TGSI_OPCODE_##u; \
672 else \
673 op = TGSI_OPCODE_##f; \
674 break;
675
676 #define case3(f, i, u) case4(f, f, i, u)
677 #define case2fi(f, i) case4(f, f, i, i)
678 #define case2iu(i, u) case4(i, LAST, i, u)
679
680 #define casecomp(c, f, i, u) \
681 case TGSI_OPCODE_##c: \
682 if (type == GLSL_TYPE_INT) \
683 op = TGSI_OPCODE_##i; \
684 else if (type == GLSL_TYPE_UINT) \
685 op = TGSI_OPCODE_##u; \
686 else if (native_integers) \
687 op = TGSI_OPCODE_##f; \
688 else \
689 op = TGSI_OPCODE_##c; \
690 break;
691
692 switch(op) {
693 case2fi(ADD, UADD);
694 case2fi(MUL, UMUL);
695 case2fi(MAD, UMAD);
696 case3(DIV, IDIV, UDIV);
697 case3(MAX, IMAX, UMAX);
698 case3(MIN, IMIN, UMIN);
699 case2iu(MOD, UMOD);
700
701 casecomp(SEQ, FSEQ, USEQ, USEQ);
702 casecomp(SNE, FSNE, USNE, USNE);
703 casecomp(SGE, FSGE, ISGE, USGE);
704 casecomp(SLT, FSLT, ISLT, USLT);
705
706 case2iu(ISHR, USHR);
707
708 case2fi(SSG, ISSG);
709 case3(ABS, IABS, IABS);
710
711 case2iu(IBFE, UBFE);
712 case2iu(IMSB, UMSB);
713 case2iu(IMUL_HI, UMUL_HI);
714 default: break;
715 }
716
717 assert(op != TGSI_OPCODE_LAST);
718 return op;
719 }
720
721 glsl_to_tgsi_instruction *
722 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
723 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
724 unsigned elements)
725 {
726 static const unsigned dot_opcodes[] = {
727 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
728 };
729
730 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
731 }
732
733 /**
734 * Emits TGSI scalar opcodes to produce unique answers across channels.
735 *
736 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
737 * channel determines the result across all channels. So to do a vec4
738 * of this operation, we want to emit a scalar per source channel used
739 * to produce dest channels.
740 */
741 void
742 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
743 st_dst_reg dst,
744 st_src_reg orig_src0, st_src_reg orig_src1)
745 {
746 int i, j;
747 int done_mask = ~dst.writemask;
748
749 /* TGSI RCP is a scalar operation splatting results to all channels,
750 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
751 * dst channels.
752 */
753 for (i = 0; i < 4; i++) {
754 GLuint this_mask = (1 << i);
755 glsl_to_tgsi_instruction *inst;
756 st_src_reg src0 = orig_src0;
757 st_src_reg src1 = orig_src1;
758
759 if (done_mask & this_mask)
760 continue;
761
762 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
763 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
764 for (j = i + 1; j < 4; j++) {
765 /* If there is another enabled component in the destination that is
766 * derived from the same inputs, generate its value on this pass as
767 * well.
768 */
769 if (!(done_mask & (1 << j)) &&
770 GET_SWZ(src0.swizzle, j) == src0_swiz &&
771 GET_SWZ(src1.swizzle, j) == src1_swiz) {
772 this_mask |= (1 << j);
773 }
774 }
775 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
776 src0_swiz, src0_swiz);
777 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
778 src1_swiz, src1_swiz);
779
780 inst = emit(ir, op, dst, src0, src1);
781 inst->dst.writemask = this_mask;
782 done_mask |= this_mask;
783 }
784 }
785
786 void
787 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
788 st_dst_reg dst, st_src_reg src0)
789 {
790 st_src_reg undef = undef_src;
791
792 undef.swizzle = SWIZZLE_XXXX;
793
794 emit_scalar(ir, op, dst, src0, undef);
795 }
796
797 void
798 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
799 st_dst_reg dst, st_src_reg src0)
800 {
801 int op = TGSI_OPCODE_ARL;
802
803 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
804 op = TGSI_OPCODE_UARL;
805
806 assert(dst.file == PROGRAM_ADDRESS);
807 if (dst.index >= this->num_address_regs)
808 this->num_address_regs = dst.index + 1;
809
810 emit(NULL, op, dst, src0);
811 }
812
813 /**
814 * Emit an TGSI_OPCODE_SCS instruction
815 *
816 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
817 * Instead of splatting its result across all four components of the
818 * destination, it writes one value to the \c x component and another value to
819 * the \c y component.
820 *
821 * \param ir IR instruction being processed
822 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
823 * on which value is desired.
824 * \param dst Destination register
825 * \param src Source register
826 */
827 void
828 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
829 st_dst_reg dst,
830 const st_src_reg &src)
831 {
832 /* Vertex programs cannot use the SCS opcode.
833 */
834 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
835 emit_scalar(ir, op, dst, src);
836 return;
837 }
838
839 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
840 const unsigned scs_mask = (1U << component);
841 int done_mask = ~dst.writemask;
842 st_src_reg tmp;
843
844 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
845
846 /* If there are compnents in the destination that differ from the component
847 * that will be written by the SCS instrution, we'll need a temporary.
848 */
849 if (scs_mask != unsigned(dst.writemask)) {
850 tmp = get_temp(glsl_type::vec4_type);
851 }
852
853 for (unsigned i = 0; i < 4; i++) {
854 unsigned this_mask = (1U << i);
855 st_src_reg src0 = src;
856
857 if ((done_mask & this_mask) != 0)
858 continue;
859
860 /* The source swizzle specified which component of the source generates
861 * sine / cosine for the current component in the destination. The SCS
862 * instruction requires that this value be swizzle to the X component.
863 * Replace the current swizzle with a swizzle that puts the source in
864 * the X component.
865 */
866 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
867
868 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
869 src0_swiz, src0_swiz);
870 for (unsigned j = i + 1; j < 4; j++) {
871 /* If there is another enabled component in the destination that is
872 * derived from the same inputs, generate its value on this pass as
873 * well.
874 */
875 if (!(done_mask & (1 << j)) &&
876 GET_SWZ(src0.swizzle, j) == src0_swiz) {
877 this_mask |= (1 << j);
878 }
879 }
880
881 if (this_mask != scs_mask) {
882 glsl_to_tgsi_instruction *inst;
883 st_dst_reg tmp_dst = st_dst_reg(tmp);
884
885 /* Emit the SCS instruction.
886 */
887 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
888 inst->dst.writemask = scs_mask;
889
890 /* Move the result of the SCS instruction to the desired location in
891 * the destination.
892 */
893 tmp.swizzle = MAKE_SWIZZLE4(component, component,
894 component, component);
895 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
896 inst->dst.writemask = this_mask;
897 } else {
898 /* Emit the SCS instruction to write directly to the destination.
899 */
900 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
901 inst->dst.writemask = scs_mask;
902 }
903
904 done_mask |= this_mask;
905 }
906 }
907
908 int
909 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
910 gl_constant_value values[4], int size, int datatype,
911 GLuint *swizzle_out)
912 {
913 if (file == PROGRAM_CONSTANT) {
914 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
915 size, datatype, swizzle_out);
916 } else {
917 int index = 0;
918 immediate_storage *entry;
919 assert(file == PROGRAM_IMMEDIATE);
920
921 /* Search immediate storage to see if we already have an identical
922 * immediate that we can use instead of adding a duplicate entry.
923 */
924 foreach_in_list(immediate_storage, entry, &this->immediates) {
925 if (entry->size == size &&
926 entry->type == datatype &&
927 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
928 return index;
929 }
930 index++;
931 }
932
933 /* Add this immediate to the list. */
934 entry = new(mem_ctx) immediate_storage(values, size, datatype);
935 this->immediates.push_tail(entry);
936 this->num_immediates++;
937 return index;
938 }
939 }
940
941 st_src_reg
942 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
943 {
944 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
945 union gl_constant_value uval;
946
947 uval.f = val;
948 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
949
950 return src;
951 }
952
953 st_src_reg
954 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
955 {
956 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
957 union gl_constant_value uval;
958
959 assert(native_integers);
960
961 uval.i = val;
962 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
963
964 return src;
965 }
966
967 st_src_reg
968 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
969 {
970 if (native_integers)
971 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
972 st_src_reg_for_int(val);
973 else
974 return st_src_reg_for_float(val);
975 }
976
977 static int
978 type_size(const struct glsl_type *type)
979 {
980 unsigned int i;
981 int size;
982
983 switch (type->base_type) {
984 case GLSL_TYPE_UINT:
985 case GLSL_TYPE_INT:
986 case GLSL_TYPE_FLOAT:
987 case GLSL_TYPE_BOOL:
988 if (type->is_matrix()) {
989 return type->matrix_columns;
990 } else {
991 /* Regardless of size of vector, it gets a vec4. This is bad
992 * packing for things like floats, but otherwise arrays become a
993 * mess. Hopefully a later pass over the code can pack scalars
994 * down if appropriate.
995 */
996 return 1;
997 }
998 case GLSL_TYPE_ARRAY:
999 assert(type->length > 0);
1000 return type_size(type->fields.array) * type->length;
1001 case GLSL_TYPE_STRUCT:
1002 size = 0;
1003 for (i = 0; i < type->length; i++) {
1004 size += type_size(type->fields.structure[i].type);
1005 }
1006 return size;
1007 case GLSL_TYPE_SAMPLER:
1008 case GLSL_TYPE_IMAGE:
1009 /* Samplers take up one slot in UNIFORMS[], but they're baked in
1010 * at link time.
1011 */
1012 return 1;
1013 case GLSL_TYPE_ATOMIC_UINT:
1014 case GLSL_TYPE_INTERFACE:
1015 case GLSL_TYPE_VOID:
1016 case GLSL_TYPE_ERROR:
1017 assert(!"Invalid type in type_size");
1018 break;
1019 }
1020 return 0;
1021 }
1022
1023 /**
1024 * In the initial pass of codegen, we assign temporary numbers to
1025 * intermediate results. (not SSA -- variable assignments will reuse
1026 * storage).
1027 */
1028 st_src_reg
1029 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1030 {
1031 st_src_reg src;
1032
1033 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1034 src.reladdr = NULL;
1035 src.negate = 0;
1036
1037 if (!options->EmitNoIndirectTemp &&
1038 (type->is_array() || type->is_matrix())) {
1039
1040 src.file = PROGRAM_ARRAY;
1041 src.index = next_array << 16 | 0x8000;
1042 array_sizes[next_array] = type_size(type);
1043 ++next_array;
1044
1045 } else {
1046 src.file = PROGRAM_TEMPORARY;
1047 src.index = next_temp;
1048 next_temp += type_size(type);
1049 }
1050
1051 if (type->is_array() || type->is_record()) {
1052 src.swizzle = SWIZZLE_NOOP;
1053 } else {
1054 src.swizzle = swizzle_for_size(type->vector_elements);
1055 }
1056
1057 return src;
1058 }
1059
1060 variable_storage *
1061 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1062 {
1063
1064 foreach_in_list(variable_storage, entry, &this->variables) {
1065 if (entry->var == var)
1066 return entry;
1067 }
1068
1069 return NULL;
1070 }
1071
1072 void
1073 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1074 {
1075 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1076 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1077
1078 fp->OriginUpperLeft = ir->data.origin_upper_left;
1079 fp->PixelCenterInteger = ir->data.pixel_center_integer;
1080 }
1081
1082 if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1083 unsigned int i;
1084 const ir_state_slot *const slots = ir->state_slots;
1085 assert(ir->state_slots != NULL);
1086
1087 /* Check if this statevar's setup in the STATE file exactly
1088 * matches how we'll want to reference it as a
1089 * struct/array/whatever. If not, then we need to move it into
1090 * temporary storage and hope that it'll get copy-propagated
1091 * out.
1092 */
1093 for (i = 0; i < ir->num_state_slots; i++) {
1094 if (slots[i].swizzle != SWIZZLE_XYZW) {
1095 break;
1096 }
1097 }
1098
1099 variable_storage *storage;
1100 st_dst_reg dst;
1101 if (i == ir->num_state_slots) {
1102 /* We'll set the index later. */
1103 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1104 this->variables.push_tail(storage);
1105
1106 dst = undef_dst;
1107 } else {
1108 /* The variable_storage constructor allocates slots based on the size
1109 * of the type. However, this had better match the number of state
1110 * elements that we're going to copy into the new temporary.
1111 */
1112 assert((int) ir->num_state_slots == type_size(ir->type));
1113
1114 dst = st_dst_reg(get_temp(ir->type));
1115
1116 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1117
1118 this->variables.push_tail(storage);
1119 }
1120
1121
1122 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1123 int index = _mesa_add_state_reference(this->prog->Parameters,
1124 (gl_state_index *)slots[i].tokens);
1125
1126 if (storage->file == PROGRAM_STATE_VAR) {
1127 if (storage->index == -1) {
1128 storage->index = index;
1129 } else {
1130 assert(index == storage->index + (int)i);
1131 }
1132 } else {
1133 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1134 * the data being moved since MOV does not care about the type of
1135 * data it is moving, and we don't want to declare registers with
1136 * array or struct types.
1137 */
1138 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1139 src.swizzle = slots[i].swizzle;
1140 emit(ir, TGSI_OPCODE_MOV, dst, src);
1141 /* even a float takes up a whole vec4 reg in a struct/array. */
1142 dst.index++;
1143 }
1144 }
1145
1146 if (storage->file == PROGRAM_TEMPORARY &&
1147 dst.index != storage->index + (int) ir->num_state_slots) {
1148 fail_link(this->shader_program,
1149 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1150 ir->name, dst.index - storage->index,
1151 type_size(ir->type));
1152 }
1153 }
1154 }
1155
1156 void
1157 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1158 {
1159 emit(NULL, TGSI_OPCODE_BGNLOOP);
1160
1161 visit_exec_list(&ir->body_instructions, this);
1162
1163 emit(NULL, TGSI_OPCODE_ENDLOOP);
1164 }
1165
1166 void
1167 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1168 {
1169 switch (ir->mode) {
1170 case ir_loop_jump::jump_break:
1171 emit(NULL, TGSI_OPCODE_BRK);
1172 break;
1173 case ir_loop_jump::jump_continue:
1174 emit(NULL, TGSI_OPCODE_CONT);
1175 break;
1176 }
1177 }
1178
1179
1180 void
1181 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1182 {
1183 assert(0);
1184 (void)ir;
1185 }
1186
1187 void
1188 glsl_to_tgsi_visitor::visit(ir_function *ir)
1189 {
1190 /* Ignore function bodies other than main() -- we shouldn't see calls to
1191 * them since they should all be inlined before we get to glsl_to_tgsi.
1192 */
1193 if (strcmp(ir->name, "main") == 0) {
1194 const ir_function_signature *sig;
1195 exec_list empty;
1196
1197 sig = ir->matching_signature(NULL, &empty, false);
1198
1199 assert(sig);
1200
1201 foreach_in_list(ir_instruction, ir, &sig->body) {
1202 ir->accept(this);
1203 }
1204 }
1205 }
1206
1207 bool
1208 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1209 {
1210 int nonmul_operand = 1 - mul_operand;
1211 st_src_reg a, b, c;
1212 st_dst_reg result_dst;
1213
1214 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1215 if (!expr || expr->operation != ir_binop_mul)
1216 return false;
1217
1218 expr->operands[0]->accept(this);
1219 a = this->result;
1220 expr->operands[1]->accept(this);
1221 b = this->result;
1222 ir->operands[nonmul_operand]->accept(this);
1223 c = this->result;
1224
1225 this->result = get_temp(ir->type);
1226 result_dst = st_dst_reg(this->result);
1227 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1228 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1229
1230 return true;
1231 }
1232
1233 /**
1234 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1235 *
1236 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1237 * implemented using multiplication, and logical-or is implemented using
1238 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1239 * As result, the logical expression (a & !b) can be rewritten as:
1240 *
1241 * - a * !b
1242 * - a * (1 - b)
1243 * - (a * 1) - (a * b)
1244 * - a + -(a * b)
1245 * - a + (a * -b)
1246 *
1247 * This final expression can be implemented as a single MAD(a, -b, a)
1248 * instruction.
1249 */
1250 bool
1251 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1252 {
1253 const int other_operand = 1 - try_operand;
1254 st_src_reg a, b;
1255
1256 ir_expression *expr = ir->operands[try_operand]->as_expression();
1257 if (!expr || expr->operation != ir_unop_logic_not)
1258 return false;
1259
1260 ir->operands[other_operand]->accept(this);
1261 a = this->result;
1262 expr->operands[0]->accept(this);
1263 b = this->result;
1264
1265 b.negate = ~b.negate;
1266
1267 this->result = get_temp(ir->type);
1268 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1269
1270 return true;
1271 }
1272
1273 bool
1274 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1275 {
1276 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1277 */
1278 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1279 !st_context(this->ctx)->has_shader_model3) {
1280 return false;
1281 }
1282
1283 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1284 if (!sat_src)
1285 return false;
1286
1287 sat_src->accept(this);
1288 st_src_reg src = this->result;
1289
1290 /* If we generated an expression instruction into a temporary in
1291 * processing the saturate's operand, apply the saturate to that
1292 * instruction. Otherwise, generate a MOV to do the saturate.
1293 *
1294 * Note that we have to be careful to only do this optimization if
1295 * the instruction in question was what generated src->result. For
1296 * example, ir_dereference_array might generate a MUL instruction
1297 * to create the reladdr, and return us a src reg using that
1298 * reladdr. That MUL result is not the value we're trying to
1299 * saturate.
1300 */
1301 ir_expression *sat_src_expr = sat_src->as_expression();
1302 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1303 sat_src_expr->operation == ir_binop_add ||
1304 sat_src_expr->operation == ir_binop_dot)) {
1305 glsl_to_tgsi_instruction *new_inst;
1306 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1307 new_inst->saturate = true;
1308 } else {
1309 this->result = get_temp(ir->type);
1310 st_dst_reg result_dst = st_dst_reg(this->result);
1311 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1312 glsl_to_tgsi_instruction *inst;
1313 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1314 inst->saturate = true;
1315 }
1316
1317 return true;
1318 }
1319
1320 void
1321 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1322 st_src_reg *reg, int *num_reladdr)
1323 {
1324 if (!reg->reladdr && !reg->reladdr2)
1325 return;
1326
1327 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1328 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1329
1330 if (*num_reladdr != 1) {
1331 st_src_reg temp = get_temp(glsl_type::vec4_type);
1332
1333 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1334 *reg = temp;
1335 }
1336
1337 (*num_reladdr)--;
1338 }
1339
1340 void
1341 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1342 {
1343 unsigned int operand;
1344 st_src_reg op[Elements(ir->operands)];
1345 st_src_reg result_src;
1346 st_dst_reg result_dst;
1347
1348 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1349 */
1350 if (ir->operation == ir_binop_add) {
1351 if (try_emit_mad(ir, 1))
1352 return;
1353 if (try_emit_mad(ir, 0))
1354 return;
1355 }
1356
1357 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1358 */
1359 if (!native_integers && ir->operation == ir_binop_logic_and) {
1360 if (try_emit_mad_for_and_not(ir, 1))
1361 return;
1362 if (try_emit_mad_for_and_not(ir, 0))
1363 return;
1364 }
1365
1366 if (try_emit_sat(ir))
1367 return;
1368
1369 if (ir->operation == ir_quadop_vector)
1370 assert(!"ir_quadop_vector should have been lowered");
1371
1372 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1373 this->result.file = PROGRAM_UNDEFINED;
1374 ir->operands[operand]->accept(this);
1375 if (this->result.file == PROGRAM_UNDEFINED) {
1376 printf("Failed to get tree for expression operand:\n");
1377 ir->operands[operand]->print();
1378 printf("\n");
1379 exit(1);
1380 }
1381 op[operand] = this->result;
1382
1383 /* Matrix expression operands should have been broken down to vector
1384 * operations already.
1385 */
1386 assert(!ir->operands[operand]->type->is_matrix());
1387 }
1388
1389 int vector_elements = ir->operands[0]->type->vector_elements;
1390 if (ir->operands[1]) {
1391 vector_elements = MAX2(vector_elements,
1392 ir->operands[1]->type->vector_elements);
1393 }
1394
1395 this->result.file = PROGRAM_UNDEFINED;
1396
1397 /* Storage for our result. Ideally for an assignment we'd be using
1398 * the actual storage for the result here, instead.
1399 */
1400 result_src = get_temp(ir->type);
1401 /* convenience for the emit functions below. */
1402 result_dst = st_dst_reg(result_src);
1403 /* Limit writes to the channels that will be used by result_src later.
1404 * This does limit this temp's use as a temporary for multi-instruction
1405 * sequences.
1406 */
1407 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1408
1409 switch (ir->operation) {
1410 case ir_unop_logic_not:
1411 if (result_dst.type != GLSL_TYPE_FLOAT)
1412 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1413 else {
1414 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1415 * older GPUs implement SEQ using multiple instructions (i915 uses two
1416 * SGE instructions and a MUL instruction). Since our logic values are
1417 * 0.0 and 1.0, 1-x also implements !x.
1418 */
1419 op[0].negate = ~op[0].negate;
1420 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1421 }
1422 break;
1423 case ir_unop_neg:
1424 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1425 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1426 else {
1427 op[0].negate = ~op[0].negate;
1428 result_src = op[0];
1429 }
1430 break;
1431 case ir_unop_abs:
1432 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1433 break;
1434 case ir_unop_sign:
1435 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1436 break;
1437 case ir_unop_rcp:
1438 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1439 break;
1440
1441 case ir_unop_exp2:
1442 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1443 break;
1444 case ir_unop_exp:
1445 case ir_unop_log:
1446 assert(!"not reached: should be handled by ir_explog_to_explog2");
1447 break;
1448 case ir_unop_log2:
1449 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1450 break;
1451 case ir_unop_sin:
1452 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1453 break;
1454 case ir_unop_cos:
1455 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1456 break;
1457 case ir_unop_sin_reduced:
1458 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1459 break;
1460 case ir_unop_cos_reduced:
1461 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1462 break;
1463
1464 case ir_unop_dFdx:
1465 case ir_unop_dFdx_coarse:
1466 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1467 break;
1468 case ir_unop_dFdx_fine:
1469 emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]);
1470 break;
1471 case ir_unop_dFdy:
1472 case ir_unop_dFdy_coarse:
1473 case ir_unop_dFdy_fine:
1474 {
1475 /* The X component contains 1 or -1 depending on whether the framebuffer
1476 * is a FBO or the window system buffer, respectively.
1477 * It is then multiplied with the source operand of DDY.
1478 */
1479 static const gl_state_index transform_y_state[STATE_LENGTH]
1480 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1481
1482 unsigned transform_y_index =
1483 _mesa_add_state_reference(this->prog->Parameters,
1484 transform_y_state);
1485
1486 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1487 transform_y_index,
1488 glsl_type::vec4_type);
1489 transform_y.swizzle = SWIZZLE_XXXX;
1490
1491 st_src_reg temp = get_temp(glsl_type::vec4_type);
1492
1493 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1494 emit(ir, ir->operation == ir_unop_dFdy_fine ?
1495 TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp);
1496 break;
1497 }
1498
1499 case ir_unop_noise: {
1500 /* At some point, a motivated person could add a better
1501 * implementation of noise. Currently not even the nvidia
1502 * binary drivers do anything more than this. In any case, the
1503 * place to do this is in the GL state tracker, not the poor
1504 * driver.
1505 */
1506 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1507 break;
1508 }
1509
1510 case ir_binop_add:
1511 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1512 break;
1513 case ir_binop_sub:
1514 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1515 break;
1516
1517 case ir_binop_mul:
1518 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1519 break;
1520 case ir_binop_div:
1521 if (result_dst.type == GLSL_TYPE_FLOAT)
1522 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1523 else
1524 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1525 break;
1526 case ir_binop_mod:
1527 if (result_dst.type == GLSL_TYPE_FLOAT)
1528 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1529 else
1530 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1531 break;
1532
1533 case ir_binop_less:
1534 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1535 break;
1536 case ir_binop_greater:
1537 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1538 break;
1539 case ir_binop_lequal:
1540 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1541 break;
1542 case ir_binop_gequal:
1543 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1544 break;
1545 case ir_binop_equal:
1546 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1547 break;
1548 case ir_binop_nequal:
1549 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1550 break;
1551 case ir_binop_all_equal:
1552 /* "==" operator producing a scalar boolean. */
1553 if (ir->operands[0]->type->is_vector() ||
1554 ir->operands[1]->type->is_vector()) {
1555 st_src_reg temp = get_temp(native_integers ?
1556 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1557 glsl_type::vec4_type);
1558
1559 if (native_integers) {
1560 st_dst_reg temp_dst = st_dst_reg(temp);
1561 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1562
1563 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1564
1565 /* Emit 1-3 AND operations to combine the SEQ results. */
1566 switch (ir->operands[0]->type->vector_elements) {
1567 case 2:
1568 break;
1569 case 3:
1570 temp_dst.writemask = WRITEMASK_Y;
1571 temp1.swizzle = SWIZZLE_YYYY;
1572 temp2.swizzle = SWIZZLE_ZZZZ;
1573 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1574 break;
1575 case 4:
1576 temp_dst.writemask = WRITEMASK_X;
1577 temp1.swizzle = SWIZZLE_XXXX;
1578 temp2.swizzle = SWIZZLE_YYYY;
1579 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1580 temp_dst.writemask = WRITEMASK_Y;
1581 temp1.swizzle = SWIZZLE_ZZZZ;
1582 temp2.swizzle = SWIZZLE_WWWW;
1583 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1584 }
1585
1586 temp1.swizzle = SWIZZLE_XXXX;
1587 temp2.swizzle = SWIZZLE_YYYY;
1588 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1589 } else {
1590 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1591
1592 /* After the dot-product, the value will be an integer on the
1593 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1594 */
1595 emit_dp(ir, result_dst, temp, temp, vector_elements);
1596
1597 /* Negating the result of the dot-product gives values on the range
1598 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1599 * This is achieved using SGE.
1600 */
1601 st_src_reg sge_src = result_src;
1602 sge_src.negate = ~sge_src.negate;
1603 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1604 }
1605 } else {
1606 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1607 }
1608 break;
1609 case ir_binop_any_nequal:
1610 /* "!=" operator producing a scalar boolean. */
1611 if (ir->operands[0]->type->is_vector() ||
1612 ir->operands[1]->type->is_vector()) {
1613 st_src_reg temp = get_temp(native_integers ?
1614 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1615 glsl_type::vec4_type);
1616 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1617
1618 if (native_integers) {
1619 st_dst_reg temp_dst = st_dst_reg(temp);
1620 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1621
1622 /* Emit 1-3 OR operations to combine the SNE results. */
1623 switch (ir->operands[0]->type->vector_elements) {
1624 case 2:
1625 break;
1626 case 3:
1627 temp_dst.writemask = WRITEMASK_Y;
1628 temp1.swizzle = SWIZZLE_YYYY;
1629 temp2.swizzle = SWIZZLE_ZZZZ;
1630 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1631 break;
1632 case 4:
1633 temp_dst.writemask = WRITEMASK_X;
1634 temp1.swizzle = SWIZZLE_XXXX;
1635 temp2.swizzle = SWIZZLE_YYYY;
1636 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1637 temp_dst.writemask = WRITEMASK_Y;
1638 temp1.swizzle = SWIZZLE_ZZZZ;
1639 temp2.swizzle = SWIZZLE_WWWW;
1640 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1641 }
1642
1643 temp1.swizzle = SWIZZLE_XXXX;
1644 temp2.swizzle = SWIZZLE_YYYY;
1645 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1646 } else {
1647 /* After the dot-product, the value will be an integer on the
1648 * range [0,4]. Zero stays zero, and positive values become 1.0.
1649 */
1650 glsl_to_tgsi_instruction *const dp =
1651 emit_dp(ir, result_dst, temp, temp, vector_elements);
1652 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1653 /* The clamping to [0,1] can be done for free in the fragment
1654 * shader with a saturate.
1655 */
1656 dp->saturate = true;
1657 } else {
1658 /* Negating the result of the dot-product gives values on the range
1659 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1660 * achieved using SLT.
1661 */
1662 st_src_reg slt_src = result_src;
1663 slt_src.negate = ~slt_src.negate;
1664 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1665 }
1666 }
1667 } else {
1668 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1669 }
1670 break;
1671
1672 case ir_unop_any: {
1673 assert(ir->operands[0]->type->is_vector());
1674
1675 if (native_integers) {
1676 int dst_swizzle = 0, op0_swizzle, i;
1677 st_src_reg accum = op[0];
1678
1679 op0_swizzle = op[0].swizzle;
1680 accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0),
1681 GET_SWZ(op0_swizzle, 0),
1682 GET_SWZ(op0_swizzle, 0),
1683 GET_SWZ(op0_swizzle, 0));
1684 for (i = 0; i < 4; i++) {
1685 if (result_dst.writemask & (1 << i)) {
1686 dst_swizzle = MAKE_SWIZZLE4(i, i, i, i);
1687 break;
1688 }
1689 }
1690 assert(i != 4);
1691 assert(ir->operands[0]->type->is_boolean());
1692
1693 /* OR all the components together, since they should be either 0 or ~0
1694 */
1695 switch (ir->operands[0]->type->vector_elements) {
1696 case 4:
1697 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3),
1698 GET_SWZ(op0_swizzle, 3),
1699 GET_SWZ(op0_swizzle, 3),
1700 GET_SWZ(op0_swizzle, 3));
1701 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1702 accum = st_src_reg(result_dst);
1703 accum.swizzle = dst_swizzle;
1704 /* fallthrough */
1705 case 3:
1706 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2),
1707 GET_SWZ(op0_swizzle, 2),
1708 GET_SWZ(op0_swizzle, 2),
1709 GET_SWZ(op0_swizzle, 2));
1710 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1711 accum = st_src_reg(result_dst);
1712 accum.swizzle = dst_swizzle;
1713 /* fallthrough */
1714 case 2:
1715 op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1),
1716 GET_SWZ(op0_swizzle, 1),
1717 GET_SWZ(op0_swizzle, 1),
1718 GET_SWZ(op0_swizzle, 1));
1719 emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]);
1720 break;
1721 default:
1722 assert(!"Unexpected vector size");
1723 break;
1724 }
1725 } else {
1726 /* After the dot-product, the value will be an integer on the
1727 * range [0,4]. Zero stays zero, and positive values become 1.0.
1728 */
1729 glsl_to_tgsi_instruction *const dp =
1730 emit_dp(ir, result_dst, op[0], op[0],
1731 ir->operands[0]->type->vector_elements);
1732 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1733 result_dst.type == GLSL_TYPE_FLOAT) {
1734 /* The clamping to [0,1] can be done for free in the fragment
1735 * shader with a saturate.
1736 */
1737 dp->saturate = true;
1738 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1739 /* Negating the result of the dot-product gives values on the range
1740 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1741 * is achieved using SLT.
1742 */
1743 st_src_reg slt_src = result_src;
1744 slt_src.negate = ~slt_src.negate;
1745 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1746 }
1747 else {
1748 /* Use SNE 0 if integers are being used as boolean values. */
1749 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1750 }
1751 }
1752 break;
1753 }
1754
1755 case ir_binop_logic_xor:
1756 if (native_integers)
1757 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1758 else
1759 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1760 break;
1761
1762 case ir_binop_logic_or: {
1763 if (native_integers) {
1764 /* If integers are used as booleans, we can use an actual "or"
1765 * instruction.
1766 */
1767 assert(native_integers);
1768 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1769 } else {
1770 /* After the addition, the value will be an integer on the
1771 * range [0,2]. Zero stays zero, and positive values become 1.0.
1772 */
1773 glsl_to_tgsi_instruction *add =
1774 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1775 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1776 /* The clamping to [0,1] can be done for free in the fragment
1777 * shader with a saturate if floats are being used as boolean values.
1778 */
1779 add->saturate = true;
1780 } else {
1781 /* Negating the result of the addition gives values on the range
1782 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1783 * is achieved using SLT.
1784 */
1785 st_src_reg slt_src = result_src;
1786 slt_src.negate = ~slt_src.negate;
1787 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1788 }
1789 }
1790 break;
1791 }
1792
1793 case ir_binop_logic_and:
1794 /* If native integers are disabled, the bool args are stored as float 0.0
1795 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1796 * actual AND opcode.
1797 */
1798 if (native_integers)
1799 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1800 else
1801 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1802 break;
1803
1804 case ir_binop_dot:
1805 assert(ir->operands[0]->type->is_vector());
1806 assert(ir->operands[0]->type == ir->operands[1]->type);
1807 emit_dp(ir, result_dst, op[0], op[1],
1808 ir->operands[0]->type->vector_elements);
1809 break;
1810
1811 case ir_unop_sqrt:
1812 if (have_sqrt) {
1813 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1814 }
1815 else {
1816 /* sqrt(x) = x * rsq(x). */
1817 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1818 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1819 /* For incoming channels <= 0, set the result to 0. */
1820 op[0].negate = ~op[0].negate;
1821 emit(ir, TGSI_OPCODE_CMP, result_dst,
1822 op[0], result_src, st_src_reg_for_float(0.0));
1823 }
1824 break;
1825 case ir_unop_rsq:
1826 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1827 break;
1828 case ir_unop_i2f:
1829 if (native_integers) {
1830 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1831 break;
1832 }
1833 /* fallthrough to next case otherwise */
1834 case ir_unop_b2f:
1835 if (native_integers) {
1836 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1837 break;
1838 }
1839 /* fallthrough to next case otherwise */
1840 case ir_unop_i2u:
1841 case ir_unop_u2i:
1842 /* Converting between signed and unsigned integers is a no-op. */
1843 result_src = op[0];
1844 break;
1845 case ir_unop_b2i:
1846 if (native_integers) {
1847 /* Booleans are stored as integers using ~0 for true and 0 for false.
1848 * GLSL requires that int(bool) return 1 for true and 0 for false.
1849 * This conversion is done with AND, but it could be done with NEG.
1850 */
1851 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1852 } else {
1853 /* Booleans and integers are both stored as floats when native
1854 * integers are disabled.
1855 */
1856 result_src = op[0];
1857 }
1858 break;
1859 case ir_unop_f2i:
1860 if (native_integers)
1861 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1862 else
1863 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1864 break;
1865 case ir_unop_f2u:
1866 if (native_integers)
1867 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1868 else
1869 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1870 break;
1871 case ir_unop_bitcast_f2i:
1872 result_src = op[0];
1873 result_src.type = GLSL_TYPE_INT;
1874 break;
1875 case ir_unop_bitcast_f2u:
1876 result_src = op[0];
1877 result_src.type = GLSL_TYPE_UINT;
1878 break;
1879 case ir_unop_bitcast_i2f:
1880 case ir_unop_bitcast_u2f:
1881 result_src = op[0];
1882 result_src.type = GLSL_TYPE_FLOAT;
1883 break;
1884 case ir_unop_f2b:
1885 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1886 break;
1887 case ir_unop_i2b:
1888 if (native_integers)
1889 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1890 else
1891 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1892 break;
1893 case ir_unop_trunc:
1894 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1895 break;
1896 case ir_unop_ceil:
1897 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1898 break;
1899 case ir_unop_floor:
1900 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1901 break;
1902 case ir_unop_round_even:
1903 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1904 break;
1905 case ir_unop_fract:
1906 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1907 break;
1908
1909 case ir_binop_min:
1910 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1911 break;
1912 case ir_binop_max:
1913 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1914 break;
1915 case ir_binop_pow:
1916 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1917 break;
1918
1919 case ir_unop_bit_not:
1920 if (native_integers) {
1921 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1922 break;
1923 }
1924 case ir_unop_u2f:
1925 if (native_integers) {
1926 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1927 break;
1928 }
1929 case ir_binop_lshift:
1930 if (native_integers) {
1931 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1932 break;
1933 }
1934 case ir_binop_rshift:
1935 if (native_integers) {
1936 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1937 break;
1938 }
1939 case ir_binop_bit_and:
1940 if (native_integers) {
1941 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1942 break;
1943 }
1944 case ir_binop_bit_xor:
1945 if (native_integers) {
1946 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1947 break;
1948 }
1949 case ir_binop_bit_or:
1950 if (native_integers) {
1951 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1952 break;
1953 }
1954
1955 assert(!"GLSL 1.30 features unsupported");
1956 break;
1957
1958 case ir_binop_ubo_load: {
1959 ir_constant *const_uniform_block = ir->operands[0]->as_constant();
1960 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1961 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1962 unsigned const_block = const_uniform_block ? const_uniform_block->value.u[0] + 1 : 0;
1963 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1964 st_src_reg cbuf;
1965
1966 cbuf.type = glsl_type::vec4_type->base_type;
1967 cbuf.file = PROGRAM_CONSTANT;
1968 cbuf.index = 0;
1969 cbuf.reladdr = NULL;
1970 cbuf.negate = 0;
1971
1972 assert(ir->type->is_vector() || ir->type->is_scalar());
1973
1974 if (const_offset_ir) {
1975 /* Constant index into constant buffer */
1976 cbuf.reladdr = NULL;
1977 cbuf.index = const_offset / 16;
1978 }
1979 else {
1980 /* Relative/variable index into constant buffer */
1981 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1],
1982 st_src_reg_for_int(4));
1983 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1984 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1985 }
1986
1987 if (const_uniform_block) {
1988 /* Constant constant buffer */
1989 cbuf.reladdr2 = NULL;
1990 cbuf.index2D = const_block;
1991 cbuf.has_index2 = true;
1992 }
1993 else {
1994 /* Relative/variable constant buffer */
1995 cbuf.reladdr2 = ralloc(mem_ctx, st_src_reg);
1996 cbuf.index2D = 1;
1997 memcpy(cbuf.reladdr2, &op[0], sizeof(st_src_reg));
1998 cbuf.has_index2 = true;
1999 }
2000
2001 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
2002 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
2003 const_offset % 16 / 4,
2004 const_offset % 16 / 4,
2005 const_offset % 16 / 4);
2006
2007 if (ir->type->base_type == GLSL_TYPE_BOOL) {
2008 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
2009 } else {
2010 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
2011 }
2012 break;
2013 }
2014 case ir_triop_lrp:
2015 /* note: we have to reorder the three args here */
2016 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
2017 break;
2018 case ir_triop_csel:
2019 if (this->ctx->Const.NativeIntegers)
2020 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
2021 else {
2022 op[0].negate = ~op[0].negate;
2023 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
2024 }
2025 break;
2026 case ir_triop_bitfield_extract:
2027 emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]);
2028 break;
2029 case ir_quadop_bitfield_insert:
2030 emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]);
2031 break;
2032 case ir_unop_bitfield_reverse:
2033 emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]);
2034 break;
2035 case ir_unop_bit_count:
2036 emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]);
2037 break;
2038 case ir_unop_find_msb:
2039 emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]);
2040 break;
2041 case ir_unop_find_lsb:
2042 emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]);
2043 break;
2044 case ir_binop_imul_high:
2045 emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]);
2046 break;
2047 case ir_triop_fma:
2048 /* NOTE: Perhaps there should be a special opcode that enforces fused
2049 * mul-add. Just use MAD for now.
2050 */
2051 emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]);
2052 break;
2053 case ir_unop_interpolate_at_centroid:
2054 emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]);
2055 break;
2056 case ir_binop_interpolate_at_offset:
2057 emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]);
2058 break;
2059 case ir_binop_interpolate_at_sample:
2060 emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]);
2061 break;
2062 case ir_unop_pack_snorm_2x16:
2063 case ir_unop_pack_unorm_2x16:
2064 case ir_unop_pack_half_2x16:
2065 case ir_unop_pack_snorm_4x8:
2066 case ir_unop_pack_unorm_4x8:
2067 case ir_unop_unpack_snorm_2x16:
2068 case ir_unop_unpack_unorm_2x16:
2069 case ir_unop_unpack_half_2x16:
2070 case ir_unop_unpack_half_2x16_split_x:
2071 case ir_unop_unpack_half_2x16_split_y:
2072 case ir_unop_unpack_snorm_4x8:
2073 case ir_unop_unpack_unorm_4x8:
2074 case ir_binop_pack_half_2x16_split:
2075 case ir_binop_bfm:
2076 case ir_triop_bfi:
2077 case ir_quadop_vector:
2078 case ir_binop_vector_extract:
2079 case ir_triop_vector_insert:
2080 case ir_binop_ldexp:
2081 case ir_binop_carry:
2082 case ir_binop_borrow:
2083 /* This operation is not supported, or should have already been handled.
2084 */
2085 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
2086 break;
2087 }
2088
2089 this->result = result_src;
2090 }
2091
2092
2093 void
2094 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
2095 {
2096 st_src_reg src;
2097 int i;
2098 int swizzle[4];
2099
2100 /* Note that this is only swizzles in expressions, not those on the left
2101 * hand side of an assignment, which do write masking. See ir_assignment
2102 * for that.
2103 */
2104
2105 ir->val->accept(this);
2106 src = this->result;
2107 assert(src.file != PROGRAM_UNDEFINED);
2108
2109 for (i = 0; i < 4; i++) {
2110 if (i < ir->type->vector_elements) {
2111 switch (i) {
2112 case 0:
2113 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2114 break;
2115 case 1:
2116 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2117 break;
2118 case 2:
2119 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2120 break;
2121 case 3:
2122 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2123 break;
2124 }
2125 } else {
2126 /* If the type is smaller than a vec4, replicate the last
2127 * channel out.
2128 */
2129 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2130 }
2131 }
2132
2133 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2134
2135 this->result = src;
2136 }
2137
2138 void
2139 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2140 {
2141 variable_storage *entry = find_variable_storage(ir->var);
2142 ir_variable *var = ir->var;
2143
2144 if (!entry) {
2145 switch (var->data.mode) {
2146 case ir_var_uniform:
2147 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2148 var->data.location);
2149 this->variables.push_tail(entry);
2150 break;
2151 case ir_var_shader_in:
2152 /* The linker assigns locations for varyings and attributes,
2153 * including deprecated builtins (like gl_Color), user-assign
2154 * generic attributes (glBindVertexLocation), and
2155 * user-defined varyings.
2156 */
2157 assert(var->data.location != -1);
2158 entry = new(mem_ctx) variable_storage(var,
2159 PROGRAM_INPUT,
2160 var->data.location);
2161 break;
2162 case ir_var_shader_out:
2163 assert(var->data.location != -1);
2164 entry = new(mem_ctx) variable_storage(var,
2165 PROGRAM_OUTPUT,
2166 var->data.location
2167 + var->data.index);
2168 break;
2169 case ir_var_system_value:
2170 entry = new(mem_ctx) variable_storage(var,
2171 PROGRAM_SYSTEM_VALUE,
2172 var->data.location);
2173 break;
2174 case ir_var_auto:
2175 case ir_var_temporary:
2176 st_src_reg src = get_temp(var->type);
2177
2178 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2179 this->variables.push_tail(entry);
2180
2181 break;
2182 }
2183
2184 if (!entry) {
2185 printf("Failed to make storage for %s\n", var->name);
2186 exit(1);
2187 }
2188 }
2189
2190 this->result = st_src_reg(entry->file, entry->index, var->type);
2191 if (!native_integers)
2192 this->result.type = GLSL_TYPE_FLOAT;
2193 }
2194
2195 void
2196 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2197 {
2198 ir_constant *index;
2199 st_src_reg src;
2200 int element_size = type_size(ir->type);
2201 bool is_2D_input;
2202
2203 index = ir->array_index->constant_expression_value();
2204
2205 ir->array->accept(this);
2206 src = this->result;
2207
2208 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2209 src.file == PROGRAM_INPUT &&
2210 ir->array->ir_type != ir_type_dereference_array;
2211
2212 if (is_2D_input)
2213 element_size = 1;
2214
2215 if (index) {
2216 if (is_2D_input) {
2217 src.index2D = index->value.i[0];
2218 src.has_index2 = true;
2219 } else
2220 src.index += index->value.i[0] * element_size;
2221 } else {
2222 /* Variable index array dereference. It eats the "vec4" of the
2223 * base of the array and an index that offsets the TGSI register
2224 * index.
2225 */
2226 ir->array_index->accept(this);
2227
2228 st_src_reg index_reg;
2229
2230 if (element_size == 1) {
2231 index_reg = this->result;
2232 } else {
2233 index_reg = get_temp(native_integers ?
2234 glsl_type::int_type : glsl_type::float_type);
2235
2236 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2237 this->result, st_src_reg_for_type(index_reg.type, element_size));
2238 }
2239
2240 /* If there was already a relative address register involved, add the
2241 * new and the old together to get the new offset.
2242 */
2243 if (!is_2D_input && src.reladdr != NULL) {
2244 st_src_reg accum_reg = get_temp(native_integers ?
2245 glsl_type::int_type : glsl_type::float_type);
2246
2247 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2248 index_reg, *src.reladdr);
2249
2250 index_reg = accum_reg;
2251 }
2252
2253 if (is_2D_input) {
2254 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2255 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2256 src.index2D = 0;
2257 src.has_index2 = true;
2258 } else {
2259 src.reladdr = ralloc(mem_ctx, st_src_reg);
2260 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2261 }
2262 }
2263
2264 /* If the type is smaller than a vec4, replicate the last channel out. */
2265 if (ir->type->is_scalar() || ir->type->is_vector())
2266 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2267 else
2268 src.swizzle = SWIZZLE_NOOP;
2269
2270 /* Change the register type to the element type of the array. */
2271 src.type = ir->type->base_type;
2272
2273 this->result = src;
2274 }
2275
2276 void
2277 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2278 {
2279 unsigned int i;
2280 const glsl_type *struct_type = ir->record->type;
2281 int offset = 0;
2282
2283 ir->record->accept(this);
2284
2285 for (i = 0; i < struct_type->length; i++) {
2286 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2287 break;
2288 offset += type_size(struct_type->fields.structure[i].type);
2289 }
2290
2291 /* If the type is smaller than a vec4, replicate the last channel out. */
2292 if (ir->type->is_scalar() || ir->type->is_vector())
2293 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2294 else
2295 this->result.swizzle = SWIZZLE_NOOP;
2296
2297 this->result.index += offset;
2298 this->result.type = ir->type->base_type;
2299 }
2300
2301 /**
2302 * We want to be careful in assignment setup to hit the actual storage
2303 * instead of potentially using a temporary like we might with the
2304 * ir_dereference handler.
2305 */
2306 static st_dst_reg
2307 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2308 {
2309 /* The LHS must be a dereference. If the LHS is a variable indexed array
2310 * access of a vector, it must be separated into a series conditional moves
2311 * before reaching this point (see ir_vec_index_to_cond_assign).
2312 */
2313 assert(ir->as_dereference());
2314 ir_dereference_array *deref_array = ir->as_dereference_array();
2315 if (deref_array) {
2316 assert(!deref_array->array->type->is_vector());
2317 }
2318
2319 /* Use the rvalue deref handler for the most part. We'll ignore
2320 * swizzles in it and write swizzles using writemask, though.
2321 */
2322 ir->accept(v);
2323 return st_dst_reg(v->result);
2324 }
2325
2326 /**
2327 * Process the condition of a conditional assignment
2328 *
2329 * Examines the condition of a conditional assignment to generate the optimal
2330 * first operand of a \c CMP instruction. If the condition is a relational
2331 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2332 * used as the source for the \c CMP instruction. Otherwise the comparison
2333 * is processed to a boolean result, and the boolean result is used as the
2334 * operand to the CMP instruction.
2335 */
2336 bool
2337 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2338 {
2339 ir_rvalue *src_ir = ir;
2340 bool negate = true;
2341 bool switch_order = false;
2342
2343 ir_expression *const expr = ir->as_expression();
2344 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2345 bool zero_on_left = false;
2346
2347 if (expr->operands[0]->is_zero()) {
2348 src_ir = expr->operands[1];
2349 zero_on_left = true;
2350 } else if (expr->operands[1]->is_zero()) {
2351 src_ir = expr->operands[0];
2352 zero_on_left = false;
2353 }
2354
2355 /* a is - 0 + - 0 +
2356 * (a < 0) T F F ( a < 0) T F F
2357 * (0 < a) F F T (-a < 0) F F T
2358 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2359 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2360 * (a > 0) F F T (-a < 0) F F T
2361 * (0 > a) T F F ( a < 0) T F F
2362 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2363 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2364 *
2365 * Note that exchanging the order of 0 and 'a' in the comparison simply
2366 * means that the value of 'a' should be negated.
2367 */
2368 if (src_ir != ir) {
2369 switch (expr->operation) {
2370 case ir_binop_less:
2371 switch_order = false;
2372 negate = zero_on_left;
2373 break;
2374
2375 case ir_binop_greater:
2376 switch_order = false;
2377 negate = !zero_on_left;
2378 break;
2379
2380 case ir_binop_lequal:
2381 switch_order = true;
2382 negate = !zero_on_left;
2383 break;
2384
2385 case ir_binop_gequal:
2386 switch_order = true;
2387 negate = zero_on_left;
2388 break;
2389
2390 default:
2391 /* This isn't the right kind of comparison afterall, so make sure
2392 * the whole condition is visited.
2393 */
2394 src_ir = ir;
2395 break;
2396 }
2397 }
2398 }
2399
2400 src_ir->accept(this);
2401
2402 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2403 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2404 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2405 * computing the condition.
2406 */
2407 if (negate)
2408 this->result.negate = ~this->result.negate;
2409
2410 return switch_order;
2411 }
2412
2413 void
2414 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2415 st_dst_reg *l, st_src_reg *r)
2416 {
2417 if (type->base_type == GLSL_TYPE_STRUCT) {
2418 for (unsigned int i = 0; i < type->length; i++) {
2419 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2420 }
2421 return;
2422 }
2423
2424 if (type->is_array()) {
2425 for (unsigned int i = 0; i < type->length; i++) {
2426 emit_block_mov(ir, type->fields.array, l, r);
2427 }
2428 return;
2429 }
2430
2431 if (type->is_matrix()) {
2432 const struct glsl_type *vec_type;
2433
2434 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2435 type->vector_elements, 1);
2436
2437 for (int i = 0; i < type->matrix_columns; i++) {
2438 emit_block_mov(ir, vec_type, l, r);
2439 }
2440 return;
2441 }
2442
2443 assert(type->is_scalar() || type->is_vector());
2444
2445 r->type = type->base_type;
2446 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2447 l->index++;
2448 r->index++;
2449 }
2450
2451 void
2452 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2453 {
2454 st_dst_reg l;
2455 st_src_reg r;
2456 int i;
2457
2458 ir->rhs->accept(this);
2459 r = this->result;
2460
2461 l = get_assignment_lhs(ir->lhs, this);
2462
2463 /* FINISHME: This should really set to the correct maximal writemask for each
2464 * FINISHME: component written (in the loops below). This case can only
2465 * FINISHME: occur for matrices, arrays, and structures.
2466 */
2467 if (ir->write_mask == 0) {
2468 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2469 l.writemask = WRITEMASK_XYZW;
2470 } else if (ir->lhs->type->is_scalar() &&
2471 ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) {
2472 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2473 * FINISHME: W component of fragment shader output zero, work correctly.
2474 */
2475 l.writemask = WRITEMASK_XYZW;
2476 } else {
2477 int swizzles[4];
2478 int first_enabled_chan = 0;
2479 int rhs_chan = 0;
2480
2481 l.writemask = ir->write_mask;
2482
2483 for (int i = 0; i < 4; i++) {
2484 if (l.writemask & (1 << i)) {
2485 first_enabled_chan = GET_SWZ(r.swizzle, i);
2486 break;
2487 }
2488 }
2489
2490 /* Swizzle a small RHS vector into the channels being written.
2491 *
2492 * glsl ir treats write_mask as dictating how many channels are
2493 * present on the RHS while TGSI treats write_mask as just
2494 * showing which channels of the vec4 RHS get written.
2495 */
2496 for (int i = 0; i < 4; i++) {
2497 if (l.writemask & (1 << i))
2498 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2499 else
2500 swizzles[i] = first_enabled_chan;
2501 }
2502 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2503 swizzles[2], swizzles[3]);
2504 }
2505
2506 assert(l.file != PROGRAM_UNDEFINED);
2507 assert(r.file != PROGRAM_UNDEFINED);
2508
2509 if (ir->condition) {
2510 const bool switch_order = this->process_move_condition(ir->condition);
2511 st_src_reg condition = this->result;
2512
2513 for (i = 0; i < type_size(ir->lhs->type); i++) {
2514 st_src_reg l_src = st_src_reg(l);
2515 st_src_reg condition_temp = condition;
2516 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2517
2518 if (native_integers) {
2519 /* This is necessary because TGSI's CMP instruction expects the
2520 * condition to be a float, and we store booleans as integers.
2521 * TODO: really want to avoid i2f path and use UCMP. Requires
2522 * changes to process_move_condition though too.
2523 */
2524 condition_temp = get_temp(glsl_type::vec4_type);
2525 condition.negate = 0;
2526 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2527 condition_temp.swizzle = condition.swizzle;
2528 }
2529
2530 if (switch_order) {
2531 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2532 } else {
2533 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2534 }
2535
2536 l.index++;
2537 r.index++;
2538 }
2539 } else if (ir->rhs->as_expression() &&
2540 this->instructions.get_tail() &&
2541 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2542 type_size(ir->lhs->type) == 1 &&
2543 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2544 /* To avoid emitting an extra MOV when assigning an expression to a
2545 * variable, emit the last instruction of the expression again, but
2546 * replace the destination register with the target of the assignment.
2547 * Dead code elimination will remove the original instruction.
2548 */
2549 glsl_to_tgsi_instruction *inst, *new_inst;
2550 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2551 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2552 new_inst->saturate = inst->saturate;
2553 inst->dead_mask = inst->dst.writemask;
2554 } else {
2555 emit_block_mov(ir, ir->rhs->type, &l, &r);
2556 }
2557 }
2558
2559
2560 void
2561 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2562 {
2563 st_src_reg src;
2564 GLfloat stack_vals[4] = { 0 };
2565 gl_constant_value *values = (gl_constant_value *) stack_vals;
2566 GLenum gl_type = GL_NONE;
2567 unsigned int i;
2568 static int in_array = 0;
2569 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2570
2571 /* Unfortunately, 4 floats is all we can get into
2572 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2573 * aggregate constant and move each constant value into it. If we
2574 * get lucky, copy propagation will eliminate the extra moves.
2575 */
2576 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2577 st_src_reg temp_base = get_temp(ir->type);
2578 st_dst_reg temp = st_dst_reg(temp_base);
2579
2580 foreach_in_list(ir_constant, field_value, &ir->components) {
2581 int size = type_size(field_value->type);
2582
2583 assert(size > 0);
2584
2585 field_value->accept(this);
2586 src = this->result;
2587
2588 for (i = 0; i < (unsigned int)size; i++) {
2589 emit(ir, TGSI_OPCODE_MOV, temp, src);
2590
2591 src.index++;
2592 temp.index++;
2593 }
2594 }
2595 this->result = temp_base;
2596 return;
2597 }
2598
2599 if (ir->type->is_array()) {
2600 st_src_reg temp_base = get_temp(ir->type);
2601 st_dst_reg temp = st_dst_reg(temp_base);
2602 int size = type_size(ir->type->fields.array);
2603
2604 assert(size > 0);
2605 in_array++;
2606
2607 for (i = 0; i < ir->type->length; i++) {
2608 ir->array_elements[i]->accept(this);
2609 src = this->result;
2610 for (int j = 0; j < size; j++) {
2611 emit(ir, TGSI_OPCODE_MOV, temp, src);
2612
2613 src.index++;
2614 temp.index++;
2615 }
2616 }
2617 this->result = temp_base;
2618 in_array--;
2619 return;
2620 }
2621
2622 if (ir->type->is_matrix()) {
2623 st_src_reg mat = get_temp(ir->type);
2624 st_dst_reg mat_column = st_dst_reg(mat);
2625
2626 for (i = 0; i < ir->type->matrix_columns; i++) {
2627 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2628 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2629
2630 src = st_src_reg(file, -1, ir->type->base_type);
2631 src.index = add_constant(file,
2632 values,
2633 ir->type->vector_elements,
2634 GL_FLOAT,
2635 &src.swizzle);
2636 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2637
2638 mat_column.index++;
2639 }
2640
2641 this->result = mat;
2642 return;
2643 }
2644
2645 switch (ir->type->base_type) {
2646 case GLSL_TYPE_FLOAT:
2647 gl_type = GL_FLOAT;
2648 for (i = 0; i < ir->type->vector_elements; i++) {
2649 values[i].f = ir->value.f[i];
2650 }
2651 break;
2652 case GLSL_TYPE_UINT:
2653 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2654 for (i = 0; i < ir->type->vector_elements; i++) {
2655 if (native_integers)
2656 values[i].u = ir->value.u[i];
2657 else
2658 values[i].f = ir->value.u[i];
2659 }
2660 break;
2661 case GLSL_TYPE_INT:
2662 gl_type = native_integers ? GL_INT : GL_FLOAT;
2663 for (i = 0; i < ir->type->vector_elements; i++) {
2664 if (native_integers)
2665 values[i].i = ir->value.i[i];
2666 else
2667 values[i].f = ir->value.i[i];
2668 }
2669 break;
2670 case GLSL_TYPE_BOOL:
2671 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2672 for (i = 0; i < ir->type->vector_elements; i++) {
2673 if (native_integers)
2674 values[i].u = ir->value.b[i] ? ~0 : 0;
2675 else
2676 values[i].f = ir->value.b[i];
2677 }
2678 break;
2679 default:
2680 assert(!"Non-float/uint/int/bool constant");
2681 }
2682
2683 this->result = st_src_reg(file, -1, ir->type);
2684 this->result.index = add_constant(file,
2685 values,
2686 ir->type->vector_elements,
2687 gl_type,
2688 &this->result.swizzle);
2689 }
2690
2691 function_entry *
2692 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2693 {
2694 foreach_in_list_use_after(function_entry, entry, &this->function_signatures) {
2695 if (entry->sig == sig)
2696 return entry;
2697 }
2698
2699 entry = ralloc(mem_ctx, function_entry);
2700 entry->sig = sig;
2701 entry->sig_id = this->next_signature_id++;
2702 entry->bgn_inst = NULL;
2703
2704 /* Allocate storage for all the parameters. */
2705 foreach_in_list(ir_variable, param, &sig->parameters) {
2706 variable_storage *storage;
2707
2708 storage = find_variable_storage(param);
2709 assert(!storage);
2710
2711 st_src_reg src = get_temp(param->type);
2712
2713 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2714 this->variables.push_tail(storage);
2715 }
2716
2717 if (!sig->return_type->is_void()) {
2718 entry->return_reg = get_temp(sig->return_type);
2719 } else {
2720 entry->return_reg = undef_src;
2721 }
2722
2723 this->function_signatures.push_tail(entry);
2724 return entry;
2725 }
2726
2727 void
2728 glsl_to_tgsi_visitor::visit(ir_call *ir)
2729 {
2730 glsl_to_tgsi_instruction *call_inst;
2731 ir_function_signature *sig = ir->callee;
2732 function_entry *entry = get_function_signature(sig);
2733 int i;
2734
2735 /* Process in parameters. */
2736 foreach_two_lists(formal_node, &sig->parameters,
2737 actual_node, &ir->actual_parameters) {
2738 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2739 ir_variable *param = (ir_variable *) formal_node;
2740
2741 if (param->data.mode == ir_var_function_in ||
2742 param->data.mode == ir_var_function_inout) {
2743 variable_storage *storage = find_variable_storage(param);
2744 assert(storage);
2745
2746 param_rval->accept(this);
2747 st_src_reg r = this->result;
2748
2749 st_dst_reg l;
2750 l.file = storage->file;
2751 l.index = storage->index;
2752 l.reladdr = NULL;
2753 l.writemask = WRITEMASK_XYZW;
2754 l.cond_mask = COND_TR;
2755
2756 for (i = 0; i < type_size(param->type); i++) {
2757 emit(ir, TGSI_OPCODE_MOV, l, r);
2758 l.index++;
2759 r.index++;
2760 }
2761 }
2762 }
2763
2764 /* Emit call instruction */
2765 call_inst = emit(ir, TGSI_OPCODE_CAL);
2766 call_inst->function = entry;
2767
2768 /* Process out parameters. */
2769 foreach_two_lists(formal_node, &sig->parameters,
2770 actual_node, &ir->actual_parameters) {
2771 ir_rvalue *param_rval = (ir_rvalue *) actual_node;
2772 ir_variable *param = (ir_variable *) formal_node;
2773
2774 if (param->data.mode == ir_var_function_out ||
2775 param->data.mode == ir_var_function_inout) {
2776 variable_storage *storage = find_variable_storage(param);
2777 assert(storage);
2778
2779 st_src_reg r;
2780 r.file = storage->file;
2781 r.index = storage->index;
2782 r.reladdr = NULL;
2783 r.swizzle = SWIZZLE_NOOP;
2784 r.negate = 0;
2785
2786 param_rval->accept(this);
2787 st_dst_reg l = st_dst_reg(this->result);
2788
2789 for (i = 0; i < type_size(param->type); i++) {
2790 emit(ir, TGSI_OPCODE_MOV, l, r);
2791 l.index++;
2792 r.index++;
2793 }
2794 }
2795 }
2796
2797 /* Process return value. */
2798 this->result = entry->return_reg;
2799 }
2800
2801 void
2802 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2803 {
2804 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy;
2805 st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component;
2806 st_src_reg levels_src;
2807 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2808 glsl_to_tgsi_instruction *inst = NULL;
2809 unsigned opcode = TGSI_OPCODE_NOP;
2810 const glsl_type *sampler_type = ir->sampler->type;
2811 ir_rvalue *sampler_index =
2812 _mesa_get_sampler_array_nonconst_index(ir->sampler);
2813 bool is_cube_array = false;
2814 unsigned i;
2815
2816 /* if we are a cube array sampler */
2817 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2818 sampler_type->sampler_array)) {
2819 is_cube_array = true;
2820 }
2821
2822 if (ir->coordinate) {
2823 ir->coordinate->accept(this);
2824
2825 /* Put our coords in a temp. We'll need to modify them for shadow,
2826 * projection, or LOD, so the only case we'd use it as is is if
2827 * we're doing plain old texturing. The optimization passes on
2828 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2829 */
2830 coord = get_temp(glsl_type::vec4_type);
2831 coord_dst = st_dst_reg(coord);
2832 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2833 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2834 }
2835
2836 if (ir->projector) {
2837 ir->projector->accept(this);
2838 projector = this->result;
2839 }
2840
2841 /* Storage for our result. Ideally for an assignment we'd be using
2842 * the actual storage for the result here, instead.
2843 */
2844 result_src = get_temp(ir->type);
2845 result_dst = st_dst_reg(result_src);
2846
2847 switch (ir->op) {
2848 case ir_tex:
2849 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2850 if (ir->offset) {
2851 ir->offset->accept(this);
2852 offset[0] = this->result;
2853 }
2854 break;
2855 case ir_txb:
2856 if (is_cube_array ||
2857 sampler_type == glsl_type::samplerCubeShadow_type) {
2858 opcode = TGSI_OPCODE_TXB2;
2859 }
2860 else {
2861 opcode = TGSI_OPCODE_TXB;
2862 }
2863 ir->lod_info.bias->accept(this);
2864 lod_info = this->result;
2865 if (ir->offset) {
2866 ir->offset->accept(this);
2867 offset[0] = this->result;
2868 }
2869 break;
2870 case ir_txl:
2871 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2872 ir->lod_info.lod->accept(this);
2873 lod_info = this->result;
2874 if (ir->offset) {
2875 ir->offset->accept(this);
2876 offset[0] = this->result;
2877 }
2878 break;
2879 case ir_txd:
2880 opcode = TGSI_OPCODE_TXD;
2881 ir->lod_info.grad.dPdx->accept(this);
2882 dx = this->result;
2883 ir->lod_info.grad.dPdy->accept(this);
2884 dy = this->result;
2885 if (ir->offset) {
2886 ir->offset->accept(this);
2887 offset[0] = this->result;
2888 }
2889 break;
2890 case ir_txs:
2891 opcode = TGSI_OPCODE_TXQ;
2892 ir->lod_info.lod->accept(this);
2893 lod_info = this->result;
2894 break;
2895 case ir_query_levels:
2896 opcode = TGSI_OPCODE_TXQ;
2897 lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT);
2898 levels_src = get_temp(ir->type);
2899 break;
2900 case ir_txf:
2901 opcode = TGSI_OPCODE_TXF;
2902 ir->lod_info.lod->accept(this);
2903 lod_info = this->result;
2904 if (ir->offset) {
2905 ir->offset->accept(this);
2906 offset[0] = this->result;
2907 }
2908 break;
2909 case ir_txf_ms:
2910 opcode = TGSI_OPCODE_TXF;
2911 ir->lod_info.sample_index->accept(this);
2912 sample_index = this->result;
2913 break;
2914 case ir_tg4:
2915 opcode = TGSI_OPCODE_TG4;
2916 ir->lod_info.component->accept(this);
2917 component = this->result;
2918 if (ir->offset) {
2919 ir->offset->accept(this);
2920 if (ir->offset->type->base_type == GLSL_TYPE_ARRAY) {
2921 const glsl_type *elt_type = ir->offset->type->fields.array;
2922 for (i = 0; i < ir->offset->type->length; i++) {
2923 offset[i] = this->result;
2924 offset[i].index += i * type_size(elt_type);
2925 offset[i].type = elt_type->base_type;
2926 offset[i].swizzle = swizzle_for_size(elt_type->vector_elements);
2927 }
2928 } else {
2929 offset[0] = this->result;
2930 }
2931 }
2932 break;
2933 case ir_lod:
2934 opcode = TGSI_OPCODE_LODQ;
2935 break;
2936 }
2937
2938 if (ir->projector) {
2939 if (opcode == TGSI_OPCODE_TEX) {
2940 /* Slot the projector in as the last component of the coord. */
2941 coord_dst.writemask = WRITEMASK_W;
2942 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2943 coord_dst.writemask = WRITEMASK_XYZW;
2944 opcode = TGSI_OPCODE_TXP;
2945 } else {
2946 st_src_reg coord_w = coord;
2947 coord_w.swizzle = SWIZZLE_WWWW;
2948
2949 /* For the other TEX opcodes there's no projective version
2950 * since the last slot is taken up by LOD info. Do the
2951 * projective divide now.
2952 */
2953 coord_dst.writemask = WRITEMASK_W;
2954 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2955
2956 /* In the case where we have to project the coordinates "by hand,"
2957 * the shadow comparator value must also be projected.
2958 */
2959 st_src_reg tmp_src = coord;
2960 if (ir->shadow_comparitor) {
2961 /* Slot the shadow value in as the second to last component of the
2962 * coord.
2963 */
2964 ir->shadow_comparitor->accept(this);
2965
2966 tmp_src = get_temp(glsl_type::vec4_type);
2967 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2968
2969 /* Projective division not allowed for array samplers. */
2970 assert(!sampler_type->sampler_array);
2971
2972 tmp_dst.writemask = WRITEMASK_Z;
2973 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2974
2975 tmp_dst.writemask = WRITEMASK_XY;
2976 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2977 }
2978
2979 coord_dst.writemask = WRITEMASK_XYZ;
2980 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2981
2982 coord_dst.writemask = WRITEMASK_XYZW;
2983 coord.swizzle = SWIZZLE_XYZW;
2984 }
2985 }
2986
2987 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2988 * comparator was put in the correct place (and projected) by the code,
2989 * above, that handles by-hand projection.
2990 */
2991 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2992 /* Slot the shadow value in as the second to last component of the
2993 * coord.
2994 */
2995 ir->shadow_comparitor->accept(this);
2996
2997 if (is_cube_array) {
2998 cube_sc = get_temp(glsl_type::float_type);
2999 cube_sc_dst = st_dst_reg(cube_sc);
3000 cube_sc_dst.writemask = WRITEMASK_X;
3001 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
3002 cube_sc_dst.writemask = WRITEMASK_X;
3003 }
3004 else {
3005 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
3006 sampler_type->sampler_array) ||
3007 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
3008 coord_dst.writemask = WRITEMASK_W;
3009 } else {
3010 coord_dst.writemask = WRITEMASK_Z;
3011 }
3012
3013 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
3014 coord_dst.writemask = WRITEMASK_XYZW;
3015 }
3016 }
3017
3018 if (ir->op == ir_txf_ms) {
3019 coord_dst.writemask = WRITEMASK_W;
3020 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
3021 coord_dst.writemask = WRITEMASK_XYZW;
3022 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
3023 opcode == TGSI_OPCODE_TXF) {
3024 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
3025 coord_dst.writemask = WRITEMASK_W;
3026 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
3027 coord_dst.writemask = WRITEMASK_XYZW;
3028 }
3029
3030 if (sampler_index) {
3031 sampler_index->accept(this);
3032 emit_arl(ir, sampler_reladdr, this->result);
3033 }
3034
3035 if (opcode == TGSI_OPCODE_TXD)
3036 inst = emit(ir, opcode, result_dst, coord, dx, dy);
3037 else if (opcode == TGSI_OPCODE_TXQ) {
3038 if (ir->op == ir_query_levels) {
3039 /* the level is stored in W */
3040 inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info);
3041 result_dst.writemask = WRITEMASK_X;
3042 levels_src.swizzle = SWIZZLE_WWWW;
3043 emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
3044 } else
3045 inst = emit(ir, opcode, result_dst, lod_info);
3046 } else if (opcode == TGSI_OPCODE_TXF) {
3047 inst = emit(ir, opcode, result_dst, coord);
3048 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
3049 inst = emit(ir, opcode, result_dst, coord, lod_info);
3050 } else if (opcode == TGSI_OPCODE_TEX2) {
3051 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3052 } else if (opcode == TGSI_OPCODE_TG4) {
3053 if (is_cube_array && ir->shadow_comparitor) {
3054 inst = emit(ir, opcode, result_dst, coord, cube_sc);
3055 } else {
3056 inst = emit(ir, opcode, result_dst, coord, component);
3057 }
3058 } else
3059 inst = emit(ir, opcode, result_dst, coord);
3060
3061 if (ir->shadow_comparitor)
3062 inst->tex_shadow = GL_TRUE;
3063
3064 inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler,
3065 this->shader_program,
3066 this->prog);
3067 if (sampler_index) {
3068 inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg);
3069 memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr));
3070 inst->sampler_array_size =
3071 ir->sampler->as_dereference_array()->array->type->array_size();
3072 } else {
3073 inst->sampler_array_size = 1;
3074 }
3075
3076 if (ir->offset) {
3077 for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++)
3078 inst->tex_offsets[i] = offset[i];
3079 inst->tex_offset_num_offset = i;
3080 }
3081
3082 switch (sampler_type->sampler_dimensionality) {
3083 case GLSL_SAMPLER_DIM_1D:
3084 inst->tex_target = (sampler_type->sampler_array)
3085 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
3086 break;
3087 case GLSL_SAMPLER_DIM_2D:
3088 inst->tex_target = (sampler_type->sampler_array)
3089 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
3090 break;
3091 case GLSL_SAMPLER_DIM_3D:
3092 inst->tex_target = TEXTURE_3D_INDEX;
3093 break;
3094 case GLSL_SAMPLER_DIM_CUBE:
3095 inst->tex_target = (sampler_type->sampler_array)
3096 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
3097 break;
3098 case GLSL_SAMPLER_DIM_RECT:
3099 inst->tex_target = TEXTURE_RECT_INDEX;
3100 break;
3101 case GLSL_SAMPLER_DIM_BUF:
3102 inst->tex_target = TEXTURE_BUFFER_INDEX;
3103 break;
3104 case GLSL_SAMPLER_DIM_EXTERNAL:
3105 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
3106 break;
3107 case GLSL_SAMPLER_DIM_MS:
3108 inst->tex_target = (sampler_type->sampler_array)
3109 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
3110 break;
3111 default:
3112 assert(!"Should not get here.");
3113 }
3114
3115 this->result = result_src;
3116 }
3117
3118 void
3119 glsl_to_tgsi_visitor::visit(ir_return *ir)
3120 {
3121 if (ir->get_value()) {
3122 st_dst_reg l;
3123 int i;
3124
3125 assert(current_function);
3126
3127 ir->get_value()->accept(this);
3128 st_src_reg r = this->result;
3129
3130 l = st_dst_reg(current_function->return_reg);
3131
3132 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
3133 emit(ir, TGSI_OPCODE_MOV, l, r);
3134 l.index++;
3135 r.index++;
3136 }
3137 }
3138
3139 emit(ir, TGSI_OPCODE_RET);
3140 }
3141
3142 void
3143 glsl_to_tgsi_visitor::visit(ir_discard *ir)
3144 {
3145 if (ir->condition) {
3146 ir->condition->accept(this);
3147 this->result.negate = ~this->result.negate;
3148 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
3149 } else {
3150 /* unconditional kil */
3151 emit(ir, TGSI_OPCODE_KILL);
3152 }
3153 }
3154
3155 void
3156 glsl_to_tgsi_visitor::visit(ir_if *ir)
3157 {
3158 unsigned if_opcode;
3159 glsl_to_tgsi_instruction *if_inst;
3160
3161 ir->condition->accept(this);
3162 assert(this->result.file != PROGRAM_UNDEFINED);
3163
3164 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3165
3166 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3167
3168 this->instructions.push_tail(if_inst);
3169
3170 visit_exec_list(&ir->then_instructions, this);
3171
3172 if (!ir->else_instructions.is_empty()) {
3173 emit(ir->condition, TGSI_OPCODE_ELSE);
3174 visit_exec_list(&ir->else_instructions, this);
3175 }
3176
3177 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3178 }
3179
3180
3181 void
3182 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3183 {
3184 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3185
3186 ir->stream->accept(this);
3187 emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result);
3188 }
3189
3190 void
3191 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3192 {
3193 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3194
3195 ir->stream->accept(this);
3196 emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result);
3197 }
3198
3199 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3200 {
3201 result.file = PROGRAM_UNDEFINED;
3202 next_temp = 1;
3203 next_array = 0;
3204 next_signature_id = 1;
3205 num_immediates = 0;
3206 current_function = NULL;
3207 num_address_regs = 0;
3208 samplers_used = 0;
3209 indirect_addr_consts = false;
3210 glsl_version = 0;
3211 native_integers = false;
3212 mem_ctx = ralloc_context(NULL);
3213 ctx = NULL;
3214 prog = NULL;
3215 shader_program = NULL;
3216 shader = NULL;
3217 options = NULL;
3218 }
3219
3220 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3221 {
3222 ralloc_free(mem_ctx);
3223 }
3224
3225 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3226 {
3227 delete v;
3228 }
3229
3230
3231 /**
3232 * Count resources used by the given gpu program (number of texture
3233 * samplers, etc).
3234 */
3235 static void
3236 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3237 {
3238 v->samplers_used = 0;
3239
3240 foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) {
3241 if (is_tex_instruction(inst->op)) {
3242 for (int i = 0; i < inst->sampler_array_size; i++) {
3243 v->samplers_used |= 1 << (inst->sampler.index + i);
3244
3245 if (inst->tex_shadow) {
3246 prog->ShadowSamplers |= 1 << (inst->sampler.index + i);
3247 }
3248 }
3249 }
3250 }
3251
3252 prog->SamplersUsed = v->samplers_used;
3253
3254 if (v->shader_program != NULL)
3255 _mesa_update_shader_textures_used(v->shader_program, prog);
3256 }
3257
3258 /**
3259 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3260 * are read from the given src in this instruction
3261 */
3262 static int
3263 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3264 {
3265 int read_mask = 0, comp;
3266
3267 /* Now, given the src swizzle and the written channels, find which
3268 * components are actually read
3269 */
3270 for (comp = 0; comp < 4; ++comp) {
3271 const unsigned coord = GET_SWZ(src.swizzle, comp);
3272 ASSERT(coord < 4);
3273 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3274 read_mask |= 1 << coord;
3275 }
3276
3277 return read_mask;
3278 }
3279
3280 /**
3281 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3282 * instruction is the first instruction to write to register T0. There are
3283 * several lowering passes done in GLSL IR (e.g. branches and
3284 * relative addressing) that create a large number of conditional assignments
3285 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3286 *
3287 * Here is why this conversion is safe:
3288 * CMP T0, T1 T2 T0 can be expanded to:
3289 * if (T1 < 0.0)
3290 * MOV T0, T2;
3291 * else
3292 * MOV T0, T0;
3293 *
3294 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3295 * as the original program. If (T1 < 0.0) evaluates to false, executing
3296 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3297 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3298 * because any instruction that was going to read from T0 after this was going
3299 * to read a garbage value anyway.
3300 */
3301 void
3302 glsl_to_tgsi_visitor::simplify_cmp(void)
3303 {
3304 unsigned *tempWrites;
3305 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3306
3307 tempWrites = new unsigned[MAX_TEMPS];
3308 if (!tempWrites) {
3309 return;
3310 }
3311 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3312 memset(outputWrites, 0, sizeof(outputWrites));
3313
3314 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3315 unsigned prevWriteMask = 0;
3316
3317 /* Give up if we encounter relative addressing or flow control. */
3318 if (inst->dst.reladdr ||
3319 tgsi_get_opcode_info(inst->op)->is_branch ||
3320 inst->op == TGSI_OPCODE_BGNSUB ||
3321 inst->op == TGSI_OPCODE_CONT ||
3322 inst->op == TGSI_OPCODE_END ||
3323 inst->op == TGSI_OPCODE_ENDSUB ||
3324 inst->op == TGSI_OPCODE_RET) {
3325 break;
3326 }
3327
3328 if (inst->dst.file == PROGRAM_OUTPUT) {
3329 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3330 prevWriteMask = outputWrites[inst->dst.index];
3331 outputWrites[inst->dst.index] |= inst->dst.writemask;
3332 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3333 assert(inst->dst.index < MAX_TEMPS);
3334 prevWriteMask = tempWrites[inst->dst.index];
3335 tempWrites[inst->dst.index] |= inst->dst.writemask;
3336 } else
3337 continue;
3338
3339 /* For a CMP to be considered a conditional write, the destination
3340 * register and source register two must be the same. */
3341 if (inst->op == TGSI_OPCODE_CMP
3342 && !(inst->dst.writemask & prevWriteMask)
3343 && inst->src[2].file == inst->dst.file
3344 && inst->src[2].index == inst->dst.index
3345 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3346
3347 inst->op = TGSI_OPCODE_MOV;
3348 inst->src[0] = inst->src[1];
3349 }
3350 }
3351
3352 delete [] tempWrites;
3353 }
3354
3355 /* Replaces all references to a temporary register index with another index. */
3356 void
3357 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3358 {
3359 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3360 unsigned j;
3361
3362 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3363 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3364 inst->src[j].index == index) {
3365 inst->src[j].index = new_index;
3366 }
3367 }
3368
3369 for (j=0; j < inst->tex_offset_num_offset; j++) {
3370 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3371 inst->tex_offsets[j].index == index) {
3372 inst->tex_offsets[j].index = new_index;
3373 }
3374 }
3375
3376 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3377 inst->dst.index = new_index;
3378 }
3379 }
3380 }
3381
3382 int
3383 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3384 {
3385 int depth = 0; /* loop depth */
3386 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3387 unsigned i = 0, j;
3388
3389 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3390 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3391 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3392 inst->src[j].index == index) {
3393 return (depth == 0) ? i : loop_start;
3394 }
3395 }
3396 for (j=0; j < inst->tex_offset_num_offset; j++) {
3397 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3398 inst->tex_offsets[j].index == index) {
3399 return (depth == 0) ? i : loop_start;
3400 }
3401 }
3402
3403 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3404 if(depth++ == 0)
3405 loop_start = i;
3406 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3407 if (--depth == 0)
3408 loop_start = -1;
3409 }
3410 assert(depth >= 0);
3411
3412 i++;
3413 }
3414
3415 return -1;
3416 }
3417
3418 int
3419 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3420 {
3421 int depth = 0; /* loop depth */
3422 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3423 int i = 0;
3424
3425 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3426 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3427 return (depth == 0) ? i : loop_start;
3428 }
3429
3430 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3431 if(depth++ == 0)
3432 loop_start = i;
3433 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3434 if (--depth == 0)
3435 loop_start = -1;
3436 }
3437 assert(depth >= 0);
3438
3439 i++;
3440 }
3441
3442 return -1;
3443 }
3444
3445 int
3446 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3447 {
3448 int depth = 0; /* loop depth */
3449 int last = -1; /* index of last instruction that reads the temporary */
3450 unsigned i = 0, j;
3451
3452 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3453 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3454 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3455 inst->src[j].index == index) {
3456 last = (depth == 0) ? i : -2;
3457 }
3458 }
3459 for (j=0; j < inst->tex_offset_num_offset; j++) {
3460 if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY &&
3461 inst->tex_offsets[j].index == index)
3462 last = (depth == 0) ? i : -2;
3463 }
3464
3465 if (inst->op == TGSI_OPCODE_BGNLOOP)
3466 depth++;
3467 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3468 if (--depth == 0 && last == -2)
3469 last = i;
3470 assert(depth >= 0);
3471
3472 i++;
3473 }
3474
3475 assert(last >= -1);
3476 return last;
3477 }
3478
3479 int
3480 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3481 {
3482 int depth = 0; /* loop depth */
3483 int last = -1; /* index of last instruction that writes to the temporary */
3484 int i = 0;
3485
3486 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3487 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3488 last = (depth == 0) ? i : -2;
3489
3490 if (inst->op == TGSI_OPCODE_BGNLOOP)
3491 depth++;
3492 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3493 if (--depth == 0 && last == -2)
3494 last = i;
3495 assert(depth >= 0);
3496
3497 i++;
3498 }
3499
3500 assert(last >= -1);
3501 return last;
3502 }
3503
3504 /*
3505 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3506 * channels for copy propagation and updates following instructions to
3507 * use the original versions.
3508 *
3509 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3510 * will occur. As an example, a TXP production before this pass:
3511 *
3512 * 0: MOV TEMP[1], INPUT[4].xyyy;
3513 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3514 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3515 *
3516 * and after:
3517 *
3518 * 0: MOV TEMP[1], INPUT[4].xyyy;
3519 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3520 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3521 *
3522 * which allows for dead code elimination on TEMP[1]'s writes.
3523 */
3524 void
3525 glsl_to_tgsi_visitor::copy_propagate(void)
3526 {
3527 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3528 glsl_to_tgsi_instruction *,
3529 this->next_temp * 4);
3530 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3531 int level = 0;
3532
3533 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3534 assert(inst->dst.file != PROGRAM_TEMPORARY
3535 || inst->dst.index < this->next_temp);
3536
3537 /* First, do any copy propagation possible into the src regs. */
3538 for (int r = 0; r < 3; r++) {
3539 glsl_to_tgsi_instruction *first = NULL;
3540 bool good = true;
3541 int acp_base = inst->src[r].index * 4;
3542
3543 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3544 inst->src[r].reladdr ||
3545 inst->src[r].reladdr2)
3546 continue;
3547
3548 /* See if we can find entries in the ACP consisting of MOVs
3549 * from the same src register for all the swizzled channels
3550 * of this src register reference.
3551 */
3552 for (int i = 0; i < 4; i++) {
3553 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3554 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3555
3556 if (!copy_chan) {
3557 good = false;
3558 break;
3559 }
3560
3561 assert(acp_level[acp_base + src_chan] <= level);
3562
3563 if (!first) {
3564 first = copy_chan;
3565 } else {
3566 if (first->src[0].file != copy_chan->src[0].file ||
3567 first->src[0].index != copy_chan->src[0].index) {
3568 good = false;
3569 break;
3570 }
3571 }
3572 }
3573
3574 if (good) {
3575 /* We've now validated that we can copy-propagate to
3576 * replace this src register reference. Do it.
3577 */
3578 inst->src[r].file = first->src[0].file;
3579 inst->src[r].index = first->src[0].index;
3580 inst->src[r].index2D = first->src[0].index2D;
3581 inst->src[r].has_index2 = first->src[0].has_index2;
3582
3583 int swizzle = 0;
3584 for (int i = 0; i < 4; i++) {
3585 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3586 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3587 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3588 (3 * i));
3589 }
3590 inst->src[r].swizzle = swizzle;
3591 }
3592 }
3593
3594 switch (inst->op) {
3595 case TGSI_OPCODE_BGNLOOP:
3596 case TGSI_OPCODE_ENDLOOP:
3597 /* End of a basic block, clear the ACP entirely. */
3598 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3599 break;
3600
3601 case TGSI_OPCODE_IF:
3602 case TGSI_OPCODE_UIF:
3603 ++level;
3604 break;
3605
3606 case TGSI_OPCODE_ENDIF:
3607 case TGSI_OPCODE_ELSE:
3608 /* Clear all channels written inside the block from the ACP, but
3609 * leaving those that were not touched.
3610 */
3611 for (int r = 0; r < this->next_temp; r++) {
3612 for (int c = 0; c < 4; c++) {
3613 if (!acp[4 * r + c])
3614 continue;
3615
3616 if (acp_level[4 * r + c] >= level)
3617 acp[4 * r + c] = NULL;
3618 }
3619 }
3620 if (inst->op == TGSI_OPCODE_ENDIF)
3621 --level;
3622 break;
3623
3624 default:
3625 /* Continuing the block, clear any written channels from
3626 * the ACP.
3627 */
3628 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3629 /* Any temporary might be written, so no copy propagation
3630 * across this instruction.
3631 */
3632 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3633 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3634 inst->dst.reladdr) {
3635 /* Any output might be written, so no copy propagation
3636 * from outputs across this instruction.
3637 */
3638 for (int r = 0; r < this->next_temp; r++) {
3639 for (int c = 0; c < 4; c++) {
3640 if (!acp[4 * r + c])
3641 continue;
3642
3643 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3644 acp[4 * r + c] = NULL;
3645 }
3646 }
3647 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3648 inst->dst.file == PROGRAM_OUTPUT) {
3649 /* Clear where it's used as dst. */
3650 if (inst->dst.file == PROGRAM_TEMPORARY) {
3651 for (int c = 0; c < 4; c++) {
3652 if (inst->dst.writemask & (1 << c)) {
3653 acp[4 * inst->dst.index + c] = NULL;
3654 }
3655 }
3656 }
3657
3658 /* Clear where it's used as src. */
3659 for (int r = 0; r < this->next_temp; r++) {
3660 for (int c = 0; c < 4; c++) {
3661 if (!acp[4 * r + c])
3662 continue;
3663
3664 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3665
3666 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3667 acp[4 * r + c]->src[0].index == inst->dst.index &&
3668 inst->dst.writemask & (1 << src_chan))
3669 {
3670 acp[4 * r + c] = NULL;
3671 }
3672 }
3673 }
3674 }
3675 break;
3676 }
3677
3678 /* If this is a copy, add it to the ACP. */
3679 if (inst->op == TGSI_OPCODE_MOV &&
3680 inst->dst.file == PROGRAM_TEMPORARY &&
3681 !(inst->dst.file == inst->src[0].file &&
3682 inst->dst.index == inst->src[0].index) &&
3683 !inst->dst.reladdr &&
3684 !inst->saturate &&
3685 !inst->src[0].reladdr &&
3686 !inst->src[0].reladdr2 &&
3687 !inst->src[0].negate) {
3688 for (int i = 0; i < 4; i++) {
3689 if (inst->dst.writemask & (1 << i)) {
3690 acp[4 * inst->dst.index + i] = inst;
3691 acp_level[4 * inst->dst.index + i] = level;
3692 }
3693 }
3694 }
3695 }
3696
3697 ralloc_free(acp_level);
3698 ralloc_free(acp);
3699 }
3700
3701 /*
3702 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3703 * code elimination.
3704 *
3705 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3706 * will occur. As an example, a TXP production after copy propagation but
3707 * before this pass:
3708 *
3709 * 0: MOV TEMP[1], INPUT[4].xyyy;
3710 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3711 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3712 *
3713 * and after this pass:
3714 *
3715 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3716 */
3717 int
3718 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3719 {
3720 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3721 glsl_to_tgsi_instruction *,
3722 this->next_temp * 4);
3723 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3724 int level = 0;
3725 int removed = 0;
3726
3727 foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) {
3728 assert(inst->dst.file != PROGRAM_TEMPORARY
3729 || inst->dst.index < this->next_temp);
3730
3731 switch (inst->op) {
3732 case TGSI_OPCODE_BGNLOOP:
3733 case TGSI_OPCODE_ENDLOOP:
3734 case TGSI_OPCODE_CONT:
3735 case TGSI_OPCODE_BRK:
3736 /* End of a basic block, clear the write array entirely.
3737 *
3738 * This keeps us from killing dead code when the writes are
3739 * on either side of a loop, even when the register isn't touched
3740 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3741 * dead code of this type, so it shouldn't make a difference as long as
3742 * the dead code elimination pass in the GLSL compiler does its job.
3743 */
3744 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3745 break;
3746
3747 case TGSI_OPCODE_ENDIF:
3748 case TGSI_OPCODE_ELSE:
3749 /* Promote the recorded level of all channels written inside the
3750 * preceding if or else block to the level above the if/else block.
3751 */
3752 for (int r = 0; r < this->next_temp; r++) {
3753 for (int c = 0; c < 4; c++) {
3754 if (!writes[4 * r + c])
3755 continue;
3756
3757 if (write_level[4 * r + c] == level)
3758 write_level[4 * r + c] = level-1;
3759 }
3760 }
3761
3762 if(inst->op == TGSI_OPCODE_ENDIF)
3763 --level;
3764
3765 break;
3766
3767 case TGSI_OPCODE_IF:
3768 case TGSI_OPCODE_UIF:
3769 ++level;
3770 /* fallthrough to default case to mark the condition as read */
3771
3772 default:
3773 /* Continuing the block, clear any channels from the write array that
3774 * are read by this instruction.
3775 */
3776 for (unsigned i = 0; i < Elements(inst->src); i++) {
3777 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3778 /* Any temporary might be read, so no dead code elimination
3779 * across this instruction.
3780 */
3781 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3782 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3783 /* Clear where it's used as src. */
3784 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3785 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3786 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3787 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3788
3789 for (int c = 0; c < 4; c++) {
3790 if (src_chans & (1 << c)) {
3791 writes[4 * inst->src[i].index + c] = NULL;
3792 }
3793 }
3794 }
3795 }
3796 for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) {
3797 if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){
3798 /* Any temporary might be read, so no dead code elimination
3799 * across this instruction.
3800 */
3801 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3802 } else if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY) {
3803 /* Clear where it's used as src. */
3804 int src_chans = 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 0);
3805 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1);
3806 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2);
3807 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
3808
3809 for (int c = 0; c < 4; c++) {
3810 if (src_chans & (1 << c)) {
3811 writes[4 * inst->tex_offsets[i].index + c] = NULL;
3812 }
3813 }
3814 }
3815 }
3816 break;
3817 }
3818
3819 /* If this instruction writes to a temporary, add it to the write array.
3820 * If there is already an instruction in the write array for one or more
3821 * of the channels, flag that channel write as dead.
3822 */
3823 if (inst->dst.file == PROGRAM_TEMPORARY &&
3824 !inst->dst.reladdr &&
3825 !inst->saturate) {
3826 for (int c = 0; c < 4; c++) {
3827 if (inst->dst.writemask & (1 << c)) {
3828 if (writes[4 * inst->dst.index + c]) {
3829 if (write_level[4 * inst->dst.index + c] < level)
3830 continue;
3831 else
3832 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3833 }
3834 writes[4 * inst->dst.index + c] = inst;
3835 write_level[4 * inst->dst.index + c] = level;
3836 }
3837 }
3838 }
3839 }
3840
3841 /* Anything still in the write array at this point is dead code. */
3842 for (int r = 0; r < this->next_temp; r++) {
3843 for (int c = 0; c < 4; c++) {
3844 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3845 if (inst)
3846 inst->dead_mask |= (1 << c);
3847 }
3848 }
3849
3850 /* Now actually remove the instructions that are completely dead and update
3851 * the writemask of other instructions with dead channels.
3852 */
3853 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) {
3854 if (!inst->dead_mask || !inst->dst.writemask)
3855 continue;
3856 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3857 inst->remove();
3858 delete inst;
3859 removed++;
3860 } else
3861 inst->dst.writemask &= ~(inst->dead_mask);
3862 }
3863
3864 ralloc_free(write_level);
3865 ralloc_free(writes);
3866
3867 return removed;
3868 }
3869
3870 /* Merges temporary registers together where possible to reduce the number of
3871 * registers needed to run a program.
3872 *
3873 * Produces optimal code only after copy propagation and dead code elimination
3874 * have been run. */
3875 void
3876 glsl_to_tgsi_visitor::merge_registers(void)
3877 {
3878 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3879 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3880 int i, j;
3881
3882 /* Read the indices of the last read and first write to each temp register
3883 * into an array so that we don't have to traverse the instruction list as
3884 * much. */
3885 for (i=0; i < this->next_temp; i++) {
3886 last_reads[i] = get_last_temp_read(i);
3887 first_writes[i] = get_first_temp_write(i);
3888 }
3889
3890 /* Start looking for registers with non-overlapping usages that can be
3891 * merged together. */
3892 for (i=0; i < this->next_temp; i++) {
3893 /* Don't touch unused registers. */
3894 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3895
3896 for (j=0; j < this->next_temp; j++) {
3897 /* Don't touch unused registers. */
3898 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3899
3900 /* We can merge the two registers if the first write to j is after or
3901 * in the same instruction as the last read from i. Note that the
3902 * register at index i will always be used earlier or at the same time
3903 * as the register at index j. */
3904 if (first_writes[i] <= first_writes[j] &&
3905 last_reads[i] <= first_writes[j])
3906 {
3907 rename_temp_register(j, i); /* Replace all references to j with i.*/
3908
3909 /* Update the first_writes and last_reads arrays with the new
3910 * values for the merged register index, and mark the newly unused
3911 * register index as such. */
3912 last_reads[i] = last_reads[j];
3913 first_writes[j] = -1;
3914 last_reads[j] = -1;
3915 }
3916 }
3917 }
3918
3919 ralloc_free(last_reads);
3920 ralloc_free(first_writes);
3921 }
3922
3923 /* Reassign indices to temporary registers by reusing unused indices created
3924 * by optimization passes. */
3925 void
3926 glsl_to_tgsi_visitor::renumber_registers(void)
3927 {
3928 int i = 0;
3929 int new_index = 0;
3930
3931 for (i=0; i < this->next_temp; i++) {
3932 if (get_first_temp_read(i) < 0) continue;
3933 if (i != new_index)
3934 rename_temp_register(i, new_index);
3935 new_index++;
3936 }
3937
3938 this->next_temp = new_index;
3939 }
3940
3941 /**
3942 * Returns a fragment program which implements the current pixel transfer ops.
3943 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3944 */
3945 extern "C" void
3946 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3947 glsl_to_tgsi_visitor *original,
3948 int scale_and_bias, int pixel_maps)
3949 {
3950 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3951 struct st_context *st = st_context(original->ctx);
3952 struct gl_program *prog = &fp->Base.Base;
3953 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3954 st_src_reg coord, src0;
3955 st_dst_reg dst0;
3956 glsl_to_tgsi_instruction *inst;
3957
3958 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3959 v->ctx = original->ctx;
3960 v->prog = prog;
3961 v->shader_program = NULL;
3962 v->shader = NULL;
3963 v->glsl_version = original->glsl_version;
3964 v->native_integers = original->native_integers;
3965 v->options = original->options;
3966 v->next_temp = original->next_temp;
3967 v->num_address_regs = original->num_address_regs;
3968 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3969 v->indirect_addr_consts = original->indirect_addr_consts;
3970 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3971 v->num_immediates = original->num_immediates;
3972
3973 /*
3974 * Get initial pixel color from the texture.
3975 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3976 */
3977 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3978 src0 = v->get_temp(glsl_type::vec4_type);
3979 dst0 = st_dst_reg(src0);
3980 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3981 inst->sampler_array_size = 1;
3982 inst->tex_target = TEXTURE_2D_INDEX;
3983
3984 prog->InputsRead |= VARYING_BIT_TEX0;
3985 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3986 v->samplers_used |= (1 << 0);
3987
3988 if (scale_and_bias) {
3989 static const gl_state_index scale_state[STATE_LENGTH] =
3990 { STATE_INTERNAL, STATE_PT_SCALE,
3991 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3992 static const gl_state_index bias_state[STATE_LENGTH] =
3993 { STATE_INTERNAL, STATE_PT_BIAS,
3994 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3995 GLint scale_p, bias_p;
3996 st_src_reg scale, bias;
3997
3998 scale_p = _mesa_add_state_reference(params, scale_state);
3999 bias_p = _mesa_add_state_reference(params, bias_state);
4000
4001 /* MAD colorTemp, colorTemp, scale, bias; */
4002 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
4003 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
4004 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
4005 }
4006
4007 if (pixel_maps) {
4008 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
4009 st_dst_reg temp_dst = st_dst_reg(temp);
4010
4011 assert(st->pixel_xfer.pixelmap_texture);
4012
4013 /* With a little effort, we can do four pixel map look-ups with
4014 * two TEX instructions:
4015 */
4016
4017 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
4018 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
4019 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4020 inst->sampler.index = 1;
4021 inst->sampler_array_size = 1;
4022 inst->tex_target = TEXTURE_2D_INDEX;
4023
4024 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
4025 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
4026 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
4027 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
4028 inst->sampler.index = 1;
4029 inst->sampler_array_size = 1;
4030 inst->tex_target = TEXTURE_2D_INDEX;
4031
4032 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
4033 v->samplers_used |= (1 << 1);
4034
4035 /* MOV colorTemp, temp; */
4036 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
4037 }
4038
4039 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4040 * new visitor. */
4041 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4042 glsl_to_tgsi_instruction *newinst;
4043 st_src_reg src_regs[3];
4044
4045 if (inst->dst.file == PROGRAM_OUTPUT)
4046 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4047
4048 for (int i=0; i<3; i++) {
4049 src_regs[i] = inst->src[i];
4050 if (src_regs[i].file == PROGRAM_INPUT &&
4051 src_regs[i].index == VARYING_SLOT_COL0)
4052 {
4053 src_regs[i].file = PROGRAM_TEMPORARY;
4054 src_regs[i].index = src0.index;
4055 }
4056 else if (src_regs[i].file == PROGRAM_INPUT)
4057 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4058 }
4059
4060 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4061 newinst->tex_target = inst->tex_target;
4062 }
4063
4064 /* Make modifications to fragment program info. */
4065 prog->Parameters = _mesa_combine_parameter_lists(params,
4066 original->prog->Parameters);
4067 _mesa_free_parameter_list(params);
4068 count_resources(v, prog);
4069 fp->glsl_to_tgsi = v;
4070 }
4071
4072 /**
4073 * Make fragment program for glBitmap:
4074 * Sample the texture and kill the fragment if the bit is 0.
4075 * This program will be combined with the user's fragment program.
4076 *
4077 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4078 */
4079 extern "C" void
4080 get_bitmap_visitor(struct st_fragment_program *fp,
4081 glsl_to_tgsi_visitor *original, int samplerIndex)
4082 {
4083 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4084 struct st_context *st = st_context(original->ctx);
4085 struct gl_program *prog = &fp->Base.Base;
4086 st_src_reg coord, src0;
4087 st_dst_reg dst0;
4088 glsl_to_tgsi_instruction *inst;
4089
4090 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4091 v->ctx = original->ctx;
4092 v->prog = prog;
4093 v->shader_program = NULL;
4094 v->shader = NULL;
4095 v->glsl_version = original->glsl_version;
4096 v->native_integers = original->native_integers;
4097 v->options = original->options;
4098 v->next_temp = original->next_temp;
4099 v->num_address_regs = original->num_address_regs;
4100 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4101 v->indirect_addr_consts = original->indirect_addr_consts;
4102 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4103 v->num_immediates = original->num_immediates;
4104
4105 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4106 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4107 src0 = v->get_temp(glsl_type::vec4_type);
4108 dst0 = st_dst_reg(src0);
4109 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4110 inst->sampler.index = samplerIndex;
4111 inst->sampler_array_size = 1;
4112 inst->tex_target = TEXTURE_2D_INDEX;
4113
4114 prog->InputsRead |= VARYING_BIT_TEX0;
4115 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4116 v->samplers_used |= (1 << samplerIndex);
4117
4118 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4119 src0.negate = NEGATE_XYZW;
4120 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4121 src0.swizzle = SWIZZLE_XXXX;
4122 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4123
4124 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4125 * new visitor. */
4126 foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) {
4127 glsl_to_tgsi_instruction *newinst;
4128 st_src_reg src_regs[3];
4129
4130 if (inst->dst.file == PROGRAM_OUTPUT)
4131 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4132
4133 for (int i=0; i<3; i++) {
4134 src_regs[i] = inst->src[i];
4135 if (src_regs[i].file == PROGRAM_INPUT)
4136 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4137 }
4138
4139 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4140 newinst->tex_target = inst->tex_target;
4141 }
4142
4143 /* Make modifications to fragment program info. */
4144 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4145 count_resources(v, prog);
4146 fp->glsl_to_tgsi = v;
4147 }
4148
4149 /* ------------------------- TGSI conversion stuff -------------------------- */
4150 struct label {
4151 unsigned branch_target;
4152 unsigned token;
4153 };
4154
4155 /**
4156 * Intermediate state used during shader translation.
4157 */
4158 struct st_translate {
4159 struct ureg_program *ureg;
4160
4161 struct ureg_dst temps[MAX_TEMPS];
4162 struct ureg_dst arrays[MAX_ARRAYS];
4163 struct ureg_src *constants;
4164 struct ureg_src *immediates;
4165 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4166 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4167 struct ureg_dst address[3];
4168 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4169 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4170 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
4171 unsigned array_sizes[MAX_ARRAYS];
4172
4173 const GLuint *inputMapping;
4174 const GLuint *outputMapping;
4175
4176 /* For every instruction that contains a label (eg CALL), keep
4177 * details so that we can go back afterwards and emit the correct
4178 * tgsi instruction number for each label.
4179 */
4180 struct label *labels;
4181 unsigned labels_size;
4182 unsigned labels_count;
4183
4184 /* Keep a record of the tgsi instruction number that each mesa
4185 * instruction starts at, will be used to fix up labels after
4186 * translation.
4187 */
4188 unsigned *insn;
4189 unsigned insn_size;
4190 unsigned insn_count;
4191
4192 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4193
4194 boolean error;
4195 };
4196
4197 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4198 const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4199 /* Vertex shader
4200 */
4201 TGSI_SEMANTIC_VERTEXID,
4202 TGSI_SEMANTIC_INSTANCEID,
4203
4204 /* Geometry shader
4205 */
4206 TGSI_SEMANTIC_INVOCATIONID,
4207
4208 /* Fragment shader
4209 */
4210 TGSI_SEMANTIC_FACE,
4211 TGSI_SEMANTIC_SAMPLEID,
4212 TGSI_SEMANTIC_SAMPLEPOS,
4213 TGSI_SEMANTIC_SAMPLEMASK,
4214 };
4215
4216 /**
4217 * Make note of a branch to a label in the TGSI code.
4218 * After we've emitted all instructions, we'll go over the list
4219 * of labels built here and patch the TGSI code with the actual
4220 * location of each label.
4221 */
4222 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4223 {
4224 unsigned i;
4225
4226 if (t->labels_count + 1 >= t->labels_size) {
4227 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4228 t->labels = (struct label *)realloc(t->labels,
4229 t->labels_size * sizeof(struct label));
4230 if (t->labels == NULL) {
4231 static unsigned dummy;
4232 t->error = TRUE;
4233 return &dummy;
4234 }
4235 }
4236
4237 i = t->labels_count++;
4238 t->labels[i].branch_target = branch_target;
4239 return &t->labels[i].token;
4240 }
4241
4242 /**
4243 * Called prior to emitting the TGSI code for each instruction.
4244 * Allocate additional space for instructions if needed.
4245 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4246 * the next TGSI instruction.
4247 */
4248 static void set_insn_start(struct st_translate *t, unsigned start)
4249 {
4250 if (t->insn_count + 1 >= t->insn_size) {
4251 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4252 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4253 if (t->insn == NULL) {
4254 t->error = TRUE;
4255 return;
4256 }
4257 }
4258
4259 t->insn[t->insn_count++] = start;
4260 }
4261
4262 /**
4263 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4264 */
4265 static struct ureg_src
4266 emit_immediate(struct st_translate *t,
4267 gl_constant_value values[4],
4268 int type, int size)
4269 {
4270 struct ureg_program *ureg = t->ureg;
4271
4272 switch(type)
4273 {
4274 case GL_FLOAT:
4275 return ureg_DECL_immediate(ureg, &values[0].f, size);
4276 case GL_INT:
4277 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4278 case GL_UNSIGNED_INT:
4279 case GL_BOOL:
4280 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4281 default:
4282 assert(!"should not get here - type must be float, int, uint, or bool");
4283 return ureg_src_undef();
4284 }
4285 }
4286
4287 /**
4288 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4289 */
4290 static struct ureg_dst
4291 dst_register(struct st_translate *t,
4292 gl_register_file file,
4293 GLuint index)
4294 {
4295 unsigned array;
4296
4297 switch(file) {
4298 case PROGRAM_UNDEFINED:
4299 return ureg_dst_undef();
4300
4301 case PROGRAM_TEMPORARY:
4302 assert(index < Elements(t->temps));
4303
4304 if (ureg_dst_is_undef(t->temps[index]))
4305 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4306
4307 return t->temps[index];
4308
4309 case PROGRAM_ARRAY:
4310 array = index >> 16;
4311
4312 assert(array < Elements(t->arrays));
4313
4314 if (ureg_dst_is_undef(t->arrays[array]))
4315 t->arrays[array] = ureg_DECL_array_temporary(
4316 t->ureg, t->array_sizes[array], TRUE);
4317
4318 return ureg_dst_array_offset(t->arrays[array],
4319 (int)(index & 0xFFFF) - 0x8000);
4320
4321 case PROGRAM_OUTPUT:
4322 if (t->procType == TGSI_PROCESSOR_VERTEX)
4323 assert(index < VARYING_SLOT_MAX);
4324 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4325 assert(index < FRAG_RESULT_MAX);
4326 else
4327 assert(index < VARYING_SLOT_MAX);
4328
4329 assert(t->outputMapping[index] < Elements(t->outputs));
4330
4331 return t->outputs[t->outputMapping[index]];
4332
4333 case PROGRAM_ADDRESS:
4334 return t->address[index];
4335
4336 default:
4337 assert(!"unknown dst register file");
4338 return ureg_dst_undef();
4339 }
4340 }
4341
4342 /**
4343 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4344 */
4345 static struct ureg_src
4346 src_register(struct st_translate *t, const struct st_src_reg *reg)
4347 {
4348 switch(reg->file) {
4349 case PROGRAM_UNDEFINED:
4350 return ureg_src_undef();
4351
4352 case PROGRAM_TEMPORARY:
4353 case PROGRAM_ARRAY:
4354 return ureg_src(dst_register(t, reg->file, reg->index));
4355
4356 case PROGRAM_UNIFORM:
4357 assert(reg->index >= 0);
4358 return t->constants[reg->index];
4359 case PROGRAM_STATE_VAR:
4360 case PROGRAM_CONSTANT: /* ie, immediate */
4361 if (reg->has_index2)
4362 return ureg_src_register(TGSI_FILE_CONSTANT, reg->index);
4363 else if (reg->index < 0)
4364 return ureg_DECL_constant(t->ureg, 0);
4365 else
4366 return t->constants[reg->index];
4367
4368 case PROGRAM_IMMEDIATE:
4369 return t->immediates[reg->index];
4370
4371 case PROGRAM_INPUT:
4372 assert(t->inputMapping[reg->index] < Elements(t->inputs));
4373 return t->inputs[t->inputMapping[reg->index]];
4374
4375 case PROGRAM_OUTPUT:
4376 assert(t->outputMapping[reg->index] < Elements(t->outputs));
4377 return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */
4378
4379 case PROGRAM_ADDRESS:
4380 return ureg_src(t->address[reg->index]);
4381
4382 case PROGRAM_SYSTEM_VALUE:
4383 assert(reg->index < (int) Elements(t->systemValues));
4384 return t->systemValues[reg->index];
4385
4386 default:
4387 assert(!"unknown src register file");
4388 return ureg_src_undef();
4389 }
4390 }
4391
4392 /**
4393 * Create a TGSI ureg_dst register from an st_dst_reg.
4394 */
4395 static struct ureg_dst
4396 translate_dst(struct st_translate *t,
4397 const st_dst_reg *dst_reg,
4398 bool saturate, bool clamp_color)
4399 {
4400 struct ureg_dst dst = dst_register(t,
4401 dst_reg->file,
4402 dst_reg->index);
4403
4404 dst = ureg_writemask(dst, dst_reg->writemask);
4405
4406 if (saturate)
4407 dst = ureg_saturate(dst);
4408 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4409 /* Clamp colors for ARB_color_buffer_float. */
4410 switch (t->procType) {
4411 case TGSI_PROCESSOR_VERTEX:
4412 /* XXX if the geometry shader is present, this must be done there
4413 * instead of here. */
4414 if (dst_reg->index == VARYING_SLOT_COL0 ||
4415 dst_reg->index == VARYING_SLOT_COL1 ||
4416 dst_reg->index == VARYING_SLOT_BFC0 ||
4417 dst_reg->index == VARYING_SLOT_BFC1) {
4418 dst = ureg_saturate(dst);
4419 }
4420 break;
4421
4422 case TGSI_PROCESSOR_FRAGMENT:
4423 if (dst_reg->index == FRAG_RESULT_COLOR ||
4424 dst_reg->index >= FRAG_RESULT_DATA0) {
4425 dst = ureg_saturate(dst);
4426 }
4427 break;
4428 }
4429 }
4430
4431 if (dst_reg->reladdr != NULL) {
4432 assert(dst_reg->file != PROGRAM_TEMPORARY);
4433 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4434 }
4435
4436 return dst;
4437 }
4438
4439 /**
4440 * Create a TGSI ureg_src register from an st_src_reg.
4441 */
4442 static struct ureg_src
4443 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4444 {
4445 struct ureg_src src = src_register(t, src_reg);
4446
4447 if (src_reg->has_index2) {
4448 /* 2D indexes occur with geometry shader inputs (attrib, vertex)
4449 * and UBO constant buffers (buffer, position).
4450 */
4451 if (src_reg->reladdr2)
4452 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4453 src_reg->index2D);
4454 else
4455 src = ureg_src_dimension(src, src_reg->index2D);
4456 }
4457
4458 src = ureg_swizzle(src,
4459 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4460 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4461 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4462 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4463
4464 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4465 src = ureg_negate(src);
4466
4467 if (src_reg->reladdr != NULL) {
4468 assert(src_reg->file != PROGRAM_TEMPORARY);
4469 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4470 }
4471
4472 return src;
4473 }
4474
4475 static struct tgsi_texture_offset
4476 translate_tex_offset(struct st_translate *t,
4477 const st_src_reg *in_offset, int idx)
4478 {
4479 struct tgsi_texture_offset offset;
4480 struct ureg_src imm_src;
4481 struct ureg_dst dst;
4482 int array;
4483
4484 switch (in_offset->file) {
4485 case PROGRAM_IMMEDIATE:
4486 imm_src = t->immediates[in_offset->index];
4487
4488 offset.File = imm_src.File;
4489 offset.Index = imm_src.Index;
4490 offset.SwizzleX = imm_src.SwizzleX;
4491 offset.SwizzleY = imm_src.SwizzleY;
4492 offset.SwizzleZ = imm_src.SwizzleZ;
4493 offset.Padding = 0;
4494 break;
4495 case PROGRAM_TEMPORARY:
4496 imm_src = ureg_src(t->temps[in_offset->index]);
4497 offset.File = imm_src.File;
4498 offset.Index = imm_src.Index;
4499 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4500 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4501 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4502 offset.Padding = 0;
4503 break;
4504 case PROGRAM_ARRAY:
4505 array = in_offset->index >> 16;
4506
4507 assert(array >= 0);
4508 assert(array < (int) Elements(t->arrays));
4509
4510 dst = t->arrays[array];
4511 offset.File = dst.File;
4512 offset.Index = dst.Index + (in_offset->index & 0xFFFF) - 0x8000;
4513 offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0);
4514 offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1);
4515 offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2);
4516 offset.Padding = 0;
4517 break;
4518 default:
4519 break;
4520 }
4521 return offset;
4522 }
4523
4524 static void
4525 compile_tgsi_instruction(struct st_translate *t,
4526 const glsl_to_tgsi_instruction *inst,
4527 bool clamp_dst_color_output)
4528 {
4529 struct ureg_program *ureg = t->ureg;
4530 GLuint i;
4531 struct ureg_dst dst[1];
4532 struct ureg_src src[4];
4533 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4534
4535 unsigned num_dst;
4536 unsigned num_src;
4537 unsigned tex_target;
4538
4539 num_dst = num_inst_dst_regs(inst->op);
4540 num_src = num_inst_src_regs(inst->op);
4541
4542 if (num_dst)
4543 dst[0] = translate_dst(t,
4544 &inst->dst,
4545 inst->saturate,
4546 clamp_dst_color_output);
4547
4548 for (i = 0; i < num_src; i++)
4549 src[i] = translate_src(t, &inst->src[i]);
4550
4551 switch(inst->op) {
4552 case TGSI_OPCODE_BGNLOOP:
4553 case TGSI_OPCODE_CAL:
4554 case TGSI_OPCODE_ELSE:
4555 case TGSI_OPCODE_ENDLOOP:
4556 case TGSI_OPCODE_IF:
4557 case TGSI_OPCODE_UIF:
4558 assert(num_dst == 0);
4559 ureg_label_insn(ureg,
4560 inst->op,
4561 src, num_src,
4562 get_label(t,
4563 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4564 return;
4565
4566 case TGSI_OPCODE_TEX:
4567 case TGSI_OPCODE_TXB:
4568 case TGSI_OPCODE_TXD:
4569 case TGSI_OPCODE_TXL:
4570 case TGSI_OPCODE_TXP:
4571 case TGSI_OPCODE_TXQ:
4572 case TGSI_OPCODE_TXF:
4573 case TGSI_OPCODE_TEX2:
4574 case TGSI_OPCODE_TXB2:
4575 case TGSI_OPCODE_TXL2:
4576 case TGSI_OPCODE_TG4:
4577 case TGSI_OPCODE_LODQ:
4578 src[num_src] = t->samplers[inst->sampler.index];
4579 if (inst->sampler.reladdr)
4580 src[num_src] =
4581 ureg_src_indirect(src[num_src], ureg_src(t->address[2]));
4582 num_src++;
4583 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4584 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i);
4585 }
4586 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4587
4588 ureg_tex_insn(ureg,
4589 inst->op,
4590 dst, num_dst,
4591 tex_target,
4592 texoffsets, inst->tex_offset_num_offset,
4593 src, num_src);
4594 return;
4595
4596 case TGSI_OPCODE_SCS:
4597 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4598 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4599 break;
4600
4601 default:
4602 ureg_insn(ureg,
4603 inst->op,
4604 dst, num_dst,
4605 src, num_src);
4606 break;
4607 }
4608 }
4609
4610 /**
4611 * Emit the TGSI instructions for inverting and adjusting WPOS.
4612 * This code is unavoidable because it also depends on whether
4613 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4614 */
4615 static void
4616 emit_wpos_adjustment( struct st_translate *t,
4617 const struct gl_program *program,
4618 boolean invert,
4619 GLfloat adjX, GLfloat adjY[2])
4620 {
4621 struct ureg_program *ureg = t->ureg;
4622
4623 /* Fragment program uses fragment position input.
4624 * Need to replace instances of INPUT[WPOS] with temp T
4625 * where T = INPUT[WPOS] by y is inverted.
4626 */
4627 static const gl_state_index wposTransformState[STATE_LENGTH]
4628 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4629 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4630
4631 /* XXX: note we are modifying the incoming shader here! Need to
4632 * do this before emitting the constant decls below, or this
4633 * will be missed:
4634 */
4635 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4636 wposTransformState);
4637
4638 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4639 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4640 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4641
4642 /* First, apply the coordinate shift: */
4643 if (adjX || adjY[0] || adjY[1]) {
4644 if (adjY[0] != adjY[1]) {
4645 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4646 * depending on whether inversion is actually going to be applied
4647 * or not, which is determined by testing against the inversion
4648 * state variable used below, which will be either +1 or -1.
4649 */
4650 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4651
4652 ureg_CMP(ureg, adj_temp,
4653 ureg_scalar(wpostrans, invert ? 2 : 0),
4654 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4655 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4656 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4657 } else {
4658 ureg_ADD(ureg, wpos_temp, wpos_input,
4659 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4660 }
4661 wpos_input = ureg_src(wpos_temp);
4662 } else {
4663 /* MOV wpos_temp, input[wpos]
4664 */
4665 ureg_MOV( ureg, wpos_temp, wpos_input );
4666 }
4667
4668 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4669 * inversion/identity, or the other way around if we're drawing to an FBO.
4670 */
4671 if (invert) {
4672 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4673 */
4674 ureg_MAD( ureg,
4675 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4676 wpos_input,
4677 ureg_scalar(wpostrans, 0),
4678 ureg_scalar(wpostrans, 1));
4679 } else {
4680 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4681 */
4682 ureg_MAD( ureg,
4683 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4684 wpos_input,
4685 ureg_scalar(wpostrans, 2),
4686 ureg_scalar(wpostrans, 3));
4687 }
4688
4689 /* Use wpos_temp as position input from here on:
4690 */
4691 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4692 }
4693
4694
4695 /**
4696 * Emit fragment position/ooordinate code.
4697 */
4698 static void
4699 emit_wpos(struct st_context *st,
4700 struct st_translate *t,
4701 const struct gl_program *program,
4702 struct ureg_program *ureg)
4703 {
4704 const struct gl_fragment_program *fp =
4705 (const struct gl_fragment_program *) program;
4706 struct pipe_screen *pscreen = st->pipe->screen;
4707 GLfloat adjX = 0.0f;
4708 GLfloat adjY[2] = { 0.0f, 0.0f };
4709 boolean invert = FALSE;
4710
4711 /* Query the pixel center conventions supported by the pipe driver and set
4712 * adjX, adjY to help out if it cannot handle the requested one internally.
4713 *
4714 * The bias of the y-coordinate depends on whether y-inversion takes place
4715 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4716 * drawing to an FBO (causes additional inversion), and whether the the pipe
4717 * driver origin and the requested origin differ (the latter condition is
4718 * stored in the 'invert' variable).
4719 *
4720 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4721 *
4722 * center shift only:
4723 * i -> h: +0.5
4724 * h -> i: -0.5
4725 *
4726 * inversion only:
4727 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4728 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4729 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4730 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4731 *
4732 * inversion and center shift:
4733 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4734 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4735 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4736 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4737 */
4738 if (fp->OriginUpperLeft) {
4739 /* Fragment shader wants origin in upper-left */
4740 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4741 /* the driver supports upper-left origin */
4742 }
4743 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4744 /* the driver supports lower-left origin, need to invert Y */
4745 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4746 invert = TRUE;
4747 }
4748 else
4749 assert(0);
4750 }
4751 else {
4752 /* Fragment shader wants origin in lower-left */
4753 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4754 /* the driver supports lower-left origin */
4755 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4756 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4757 /* the driver supports upper-left origin, need to invert Y */
4758 invert = TRUE;
4759 else
4760 assert(0);
4761 }
4762
4763 if (fp->PixelCenterInteger) {
4764 /* Fragment shader wants pixel center integer */
4765 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4766 /* the driver supports pixel center integer */
4767 adjY[1] = 1.0f;
4768 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4769 }
4770 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4771 /* the driver supports pixel center half integer, need to bias X,Y */
4772 adjX = -0.5f;
4773 adjY[0] = -0.5f;
4774 adjY[1] = 0.5f;
4775 }
4776 else
4777 assert(0);
4778 }
4779 else {
4780 /* Fragment shader wants pixel center half integer */
4781 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4782 /* the driver supports pixel center half integer */
4783 }
4784 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4785 /* the driver supports pixel center integer, need to bias X,Y */
4786 adjX = adjY[0] = adjY[1] = 0.5f;
4787 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4788 }
4789 else
4790 assert(0);
4791 }
4792
4793 /* we invert after adjustment so that we avoid the MOV to temporary,
4794 * and reuse the adjustment ADD instead */
4795 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4796 }
4797
4798 /**
4799 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4800 * TGSI uses +1 for front, -1 for back.
4801 * This function converts the TGSI value to the GL value. Simply clamping/
4802 * saturating the value to [0,1] does the job.
4803 */
4804 static void
4805 emit_face_var(struct st_translate *t)
4806 {
4807 struct ureg_program *ureg = t->ureg;
4808 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4809 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4810
4811 /* MOV_SAT face_temp, input[face] */
4812 face_temp = ureg_saturate(face_temp);
4813 ureg_MOV(ureg, face_temp, face_input);
4814
4815 /* Use face_temp as face input from here on: */
4816 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4817 }
4818
4819 static void
4820 emit_edgeflags(struct st_translate *t)
4821 {
4822 struct ureg_program *ureg = t->ureg;
4823 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4824 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4825
4826 ureg_MOV(ureg, edge_dst, edge_src);
4827 }
4828
4829 /**
4830 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4831 * \param program the program to translate
4832 * \param numInputs number of input registers used
4833 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4834 * input indexes
4835 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4836 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4837 * each input
4838 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4839 * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input
4840 * \param numOutputs number of output registers used
4841 * \param outputMapping maps Mesa fragment program outputs to TGSI
4842 * generic outputs
4843 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4844 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4845 * each output
4846 *
4847 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4848 */
4849 extern "C" enum pipe_error
4850 st_translate_program(
4851 struct gl_context *ctx,
4852 uint procType,
4853 struct ureg_program *ureg,
4854 glsl_to_tgsi_visitor *program,
4855 const struct gl_program *proginfo,
4856 GLuint numInputs,
4857 const GLuint inputMapping[],
4858 const ubyte inputSemanticName[],
4859 const ubyte inputSemanticIndex[],
4860 const GLuint interpMode[],
4861 const GLuint interpLocation[],
4862 GLuint numOutputs,
4863 const GLuint outputMapping[],
4864 const ubyte outputSemanticName[],
4865 const ubyte outputSemanticIndex[],
4866 boolean passthrough_edgeflags,
4867 boolean clamp_color)
4868 {
4869 struct st_translate *t;
4870 unsigned i;
4871 enum pipe_error ret = PIPE_OK;
4872
4873 assert(numInputs <= Elements(t->inputs));
4874 assert(numOutputs <= Elements(t->outputs));
4875
4876 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] ==
4877 TGSI_SEMANTIC_FACE);
4878 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] ==
4879 TGSI_SEMANTIC_VERTEXID);
4880 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] ==
4881 TGSI_SEMANTIC_INSTANCEID);
4882 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] ==
4883 TGSI_SEMANTIC_SAMPLEID);
4884 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] ==
4885 TGSI_SEMANTIC_SAMPLEPOS);
4886 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] ==
4887 TGSI_SEMANTIC_SAMPLEMASK);
4888 assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] ==
4889 TGSI_SEMANTIC_INVOCATIONID);
4890
4891 t = CALLOC_STRUCT(st_translate);
4892 if (!t) {
4893 ret = PIPE_ERROR_OUT_OF_MEMORY;
4894 goto out;
4895 }
4896
4897 memset(t, 0, sizeof *t);
4898
4899 t->procType = procType;
4900 t->inputMapping = inputMapping;
4901 t->outputMapping = outputMapping;
4902 t->ureg = ureg;
4903
4904 if (program->shader_program) {
4905 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4906 struct gl_uniform_storage *const storage =
4907 &program->shader_program->UniformStorage[i];
4908
4909 _mesa_uniform_detach_all_driver_storage(storage);
4910 }
4911 }
4912
4913 /*
4914 * Declare input attributes.
4915 */
4916 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4917 for (i = 0; i < numInputs; i++) {
4918 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4919 inputSemanticName[i],
4920 inputSemanticIndex[i],
4921 interpMode[i], 0,
4922 interpLocation[i]);
4923 }
4924
4925 if (proginfo->InputsRead & VARYING_BIT_POS) {
4926 /* Must do this after setting up t->inputs, and before
4927 * emitting constant references, below:
4928 */
4929 emit_wpos(st_context(ctx), t, proginfo, ureg);
4930 }
4931
4932 if (proginfo->InputsRead & VARYING_BIT_FACE)
4933 emit_face_var(t);
4934
4935 /*
4936 * Declare output attributes.
4937 */
4938 for (i = 0; i < numOutputs; i++) {
4939 switch (outputSemanticName[i]) {
4940 case TGSI_SEMANTIC_POSITION:
4941 t->outputs[i] = ureg_DECL_output(ureg,
4942 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4943 outputSemanticIndex[i]);
4944 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4945 break;
4946 case TGSI_SEMANTIC_STENCIL:
4947 t->outputs[i] = ureg_DECL_output(ureg,
4948 TGSI_SEMANTIC_STENCIL, /* Stencil */
4949 outputSemanticIndex[i]);
4950 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4951 break;
4952 case TGSI_SEMANTIC_COLOR:
4953 t->outputs[i] = ureg_DECL_output(ureg,
4954 TGSI_SEMANTIC_COLOR,
4955 outputSemanticIndex[i]);
4956 break;
4957 case TGSI_SEMANTIC_SAMPLEMASK:
4958 t->outputs[i] = ureg_DECL_output(ureg,
4959 TGSI_SEMANTIC_SAMPLEMASK,
4960 outputSemanticIndex[i]);
4961 /* TODO: If we ever support more than 32 samples, this will have
4962 * to become an array.
4963 */
4964 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4965 break;
4966 default:
4967 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4968 ret = PIPE_ERROR_BAD_INPUT;
4969 goto out;
4970 }
4971 }
4972 }
4973 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4974 for (i = 0; i < numInputs; i++) {
4975 t->inputs[i] = ureg_DECL_gs_input(ureg,
4976 i,
4977 inputSemanticName[i],
4978 inputSemanticIndex[i]);
4979 }
4980
4981 for (i = 0; i < numOutputs; i++) {
4982 t->outputs[i] = ureg_DECL_output(ureg,
4983 outputSemanticName[i],
4984 outputSemanticIndex[i]);
4985 }
4986 }
4987 else {
4988 assert(procType == TGSI_PROCESSOR_VERTEX);
4989
4990 for (i = 0; i < numInputs; i++) {
4991 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4992 }
4993
4994 for (i = 0; i < numOutputs; i++) {
4995 t->outputs[i] = ureg_DECL_output(ureg,
4996 outputSemanticName[i],
4997 outputSemanticIndex[i]);
4998 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4999 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
5000 ureg_MOV(ureg,
5001 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
5002 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
5003 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
5004 }
5005 }
5006 if (passthrough_edgeflags)
5007 emit_edgeflags(t);
5008 }
5009
5010 /* Declare address register.
5011 */
5012 if (program->num_address_regs > 0) {
5013 assert(program->num_address_regs <= 3);
5014 for (int i = 0; i < program->num_address_regs; i++)
5015 t->address[i] = ureg_DECL_address(ureg);
5016 }
5017
5018 /* Declare misc input registers
5019 */
5020 {
5021 GLbitfield sysInputs = proginfo->SystemValuesRead;
5022 unsigned numSys = 0;
5023 for (i = 0; sysInputs; i++) {
5024 if (sysInputs & (1 << i)) {
5025 unsigned semName = _mesa_sysval_to_semantic[i];
5026 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
5027 if (semName == TGSI_SEMANTIC_INSTANCEID ||
5028 semName == TGSI_SEMANTIC_VERTEXID) {
5029 /* From Gallium perspective, these system values are always
5030 * integer, and require native integer support. However, if
5031 * native integer is supported on the vertex stage but not the
5032 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
5033 * assumes these system values are floats. To resolve the
5034 * inconsistency, we insert a U2F.
5035 */
5036 struct st_context *st = st_context(ctx);
5037 struct pipe_screen *pscreen = st->pipe->screen;
5038 assert(procType == TGSI_PROCESSOR_VERTEX);
5039 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
5040 if (!ctx->Const.NativeIntegers) {
5041 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
5042 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
5043 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
5044 }
5045 }
5046 numSys++;
5047 sysInputs &= ~(1 << i);
5048 }
5049 }
5050 }
5051
5052 /* Copy over array sizes
5053 */
5054 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
5055
5056 /* Emit constants and uniforms. TGSI uses a single index space for these,
5057 * so we put all the translated regs in t->constants.
5058 */
5059 if (proginfo->Parameters) {
5060 t->constants = (struct ureg_src *)
5061 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
5062 if (t->constants == NULL) {
5063 ret = PIPE_ERROR_OUT_OF_MEMORY;
5064 goto out;
5065 }
5066
5067 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
5068 switch (proginfo->Parameters->Parameters[i].Type) {
5069 case PROGRAM_STATE_VAR:
5070 case PROGRAM_UNIFORM:
5071 t->constants[i] = ureg_DECL_constant(ureg, i);
5072 break;
5073
5074 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
5075 * addressing of the const buffer.
5076 * FIXME: Be smarter and recognize param arrays:
5077 * indirect addressing is only valid within the referenced
5078 * array.
5079 */
5080 case PROGRAM_CONSTANT:
5081 if (program->indirect_addr_consts)
5082 t->constants[i] = ureg_DECL_constant(ureg, i);
5083 else
5084 t->constants[i] = emit_immediate(t,
5085 proginfo->Parameters->ParameterValues[i],
5086 proginfo->Parameters->Parameters[i].DataType,
5087 4);
5088 break;
5089 default:
5090 break;
5091 }
5092 }
5093 }
5094
5095 if (program->shader) {
5096 unsigned num_ubos = program->shader->NumUniformBlocks;
5097
5098 for (i = 0; i < num_ubos; i++) {
5099 unsigned size = program->shader->UniformBlocks[i].UniformBufferSize;
5100 unsigned num_const_vecs = (size + 15) / 16;
5101 unsigned first, last;
5102 assert(num_const_vecs > 0);
5103 first = 0;
5104 last = num_const_vecs > 0 ? num_const_vecs - 1 : 0;
5105 ureg_DECL_constant2D(t->ureg, first, last, i + 1);
5106 }
5107 }
5108
5109 /* Emit immediate values.
5110 */
5111 t->immediates = (struct ureg_src *)
5112 calloc(program->num_immediates, sizeof(struct ureg_src));
5113 if (t->immediates == NULL) {
5114 ret = PIPE_ERROR_OUT_OF_MEMORY;
5115 goto out;
5116 }
5117 i = 0;
5118 foreach_in_list(immediate_storage, imm, &program->immediates) {
5119 assert(i < program->num_immediates);
5120 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
5121 }
5122 assert(i == program->num_immediates);
5123
5124 /* texture samplers */
5125 for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
5126 if (program->samplers_used & (1 << i)) {
5127 t->samplers[i] = ureg_DECL_sampler(ureg, i);
5128 }
5129 }
5130
5131 /* Emit each instruction in turn:
5132 */
5133 foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) {
5134 set_insn_start(t, ureg_get_instruction_number(ureg));
5135 compile_tgsi_instruction(t, inst, clamp_color);
5136 }
5137
5138 /* Fix up all emitted labels:
5139 */
5140 for (i = 0; i < t->labels_count; i++) {
5141 ureg_fixup_label(ureg, t->labels[i].token,
5142 t->insn[t->labels[i].branch_target]);
5143 }
5144
5145 if (program->shader_program) {
5146 /* This has to be done last. Any operation the can cause
5147 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5148 * program constant) has to happen before creating this linkage.
5149 */
5150 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5151 if (program->shader_program->_LinkedShaders[i] == NULL)
5152 continue;
5153
5154 _mesa_associate_uniform_storage(ctx, program->shader_program,
5155 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5156 }
5157 }
5158
5159 out:
5160 if (t) {
5161 free(t->insn);
5162 free(t->labels);
5163 free(t->constants);
5164 free(t->immediates);
5165
5166 if (t->error) {
5167 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5168 }
5169
5170 free(t);
5171 }
5172
5173 return ret;
5174 }
5175 /* ----------------------------- End TGSI code ------------------------------ */
5176
5177
5178 static unsigned
5179 shader_stage_to_ptarget(gl_shader_stage stage)
5180 {
5181 switch (stage) {
5182 case MESA_SHADER_VERTEX:
5183 return PIPE_SHADER_VERTEX;
5184 case MESA_SHADER_FRAGMENT:
5185 return PIPE_SHADER_FRAGMENT;
5186 case MESA_SHADER_GEOMETRY:
5187 return PIPE_SHADER_GEOMETRY;
5188 case MESA_SHADER_COMPUTE:
5189 return PIPE_SHADER_COMPUTE;
5190 }
5191
5192 assert(!"should not be reached");
5193 return PIPE_SHADER_VERTEX;
5194 }
5195
5196
5197 /**
5198 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5199 * generating Mesa IR.
5200 */
5201 static struct gl_program *
5202 get_mesa_program(struct gl_context *ctx,
5203 struct gl_shader_program *shader_program,
5204 struct gl_shader *shader)
5205 {
5206 glsl_to_tgsi_visitor* v;
5207 struct gl_program *prog;
5208 GLenum target = _mesa_shader_stage_to_program(shader->Stage);
5209 bool progress;
5210 struct gl_shader_compiler_options *options =
5211 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)];
5212 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5213 unsigned ptarget = shader_stage_to_ptarget(shader->Stage);
5214
5215 validate_ir_tree(shader->ir);
5216
5217 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5218 if (!prog)
5219 return NULL;
5220 prog->Parameters = _mesa_new_parameter_list();
5221 v = new glsl_to_tgsi_visitor();
5222 v->ctx = ctx;
5223 v->prog = prog;
5224 v->shader_program = shader_program;
5225 v->shader = shader;
5226 v->options = options;
5227 v->glsl_version = ctx->Const.GLSLVersion;
5228 v->native_integers = ctx->Const.NativeIntegers;
5229
5230 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5231 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5232
5233 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5234 prog->Parameters);
5235
5236 /* Remove reads from output registers. */
5237 lower_output_reads(shader->ir);
5238
5239 /* Emit intermediate IR for main(). */
5240 visit_exec_list(shader->ir, v);
5241
5242 /* Now emit bodies for any functions that were used. */
5243 do {
5244 progress = GL_FALSE;
5245
5246 foreach_in_list(function_entry, entry, &v->function_signatures) {
5247 if (!entry->bgn_inst) {
5248 v->current_function = entry;
5249
5250 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5251 entry->bgn_inst->function = entry;
5252
5253 visit_exec_list(&entry->sig->body, v);
5254
5255 glsl_to_tgsi_instruction *last;
5256 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5257 if (last->op != TGSI_OPCODE_RET)
5258 v->emit(NULL, TGSI_OPCODE_RET);
5259
5260 glsl_to_tgsi_instruction *end;
5261 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5262 end->function = entry;
5263
5264 progress = GL_TRUE;
5265 }
5266 }
5267 } while (progress);
5268
5269 #if 0
5270 /* Print out some information (for debugging purposes) used by the
5271 * optimization passes. */
5272 for (i=0; i < v->next_temp; i++) {
5273 int fr = v->get_first_temp_read(i);
5274 int fw = v->get_first_temp_write(i);
5275 int lr = v->get_last_temp_read(i);
5276 int lw = v->get_last_temp_write(i);
5277
5278 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5279 assert(fw <= fr);
5280 }
5281 #endif
5282
5283 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5284 v->simplify_cmp();
5285 v->copy_propagate();
5286 while (v->eliminate_dead_code());
5287
5288 v->merge_registers();
5289 v->renumber_registers();
5290
5291 /* Write the END instruction. */
5292 v->emit(NULL, TGSI_OPCODE_END);
5293
5294 if (ctx->_Shader->Flags & GLSL_DUMP) {
5295 printf("\n");
5296 printf("GLSL IR for linked %s program %d:\n",
5297 _mesa_shader_stage_to_string(shader->Stage),
5298 shader_program->Name);
5299 _mesa_print_ir(stdout, shader->ir, NULL);
5300 printf("\n");
5301 printf("\n");
5302 fflush(stdout);
5303 }
5304
5305 prog->Instructions = NULL;
5306 prog->NumInstructions = 0;
5307
5308 do_set_program_inouts(shader->ir, prog, shader->Stage);
5309 count_resources(v, prog);
5310
5311 _mesa_reference_program(ctx, &shader->Program, prog);
5312
5313 /* This has to be done last. Any operation the can cause
5314 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5315 * program constant) has to happen before creating this linkage.
5316 */
5317 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5318 if (!shader_program->LinkStatus) {
5319 return NULL;
5320 }
5321
5322 struct st_vertex_program *stvp;
5323 struct st_fragment_program *stfp;
5324 struct st_geometry_program *stgp;
5325
5326 switch (shader->Type) {
5327 case GL_VERTEX_SHADER:
5328 stvp = (struct st_vertex_program *)prog;
5329 stvp->glsl_to_tgsi = v;
5330 break;
5331 case GL_FRAGMENT_SHADER:
5332 stfp = (struct st_fragment_program *)prog;
5333 stfp->glsl_to_tgsi = v;
5334 break;
5335 case GL_GEOMETRY_SHADER:
5336 stgp = (struct st_geometry_program *)prog;
5337 stgp->glsl_to_tgsi = v;
5338 stgp->Base.InputType = shader_program->Geom.InputType;
5339 stgp->Base.OutputType = shader_program->Geom.OutputType;
5340 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5341 stgp->Base.Invocations = shader_program->Geom.Invocations;
5342 break;
5343 default:
5344 assert(!"should not be reached");
5345 return NULL;
5346 }
5347
5348 return prog;
5349 }
5350
5351 extern "C" {
5352
5353 struct gl_shader *
5354 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5355 {
5356 struct gl_shader *shader;
5357 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5358 type == GL_GEOMETRY_SHADER_ARB);
5359 shader = rzalloc(NULL, struct gl_shader);
5360 if (shader) {
5361 shader->Type = type;
5362 shader->Stage = _mesa_shader_enum_to_shader_stage(type);
5363 shader->Name = name;
5364 _mesa_init_shader(ctx, shader);
5365 }
5366 return shader;
5367 }
5368
5369 struct gl_shader_program *
5370 st_new_shader_program(struct gl_context *ctx, GLuint name)
5371 {
5372 struct gl_shader_program *shProg;
5373 shProg = rzalloc(NULL, struct gl_shader_program);
5374 if (shProg) {
5375 shProg->Name = name;
5376 _mesa_init_shader_program(ctx, shProg);
5377 }
5378 return shProg;
5379 }
5380
5381 /**
5382 * Link a shader.
5383 * Called via ctx->Driver.LinkShader()
5384 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5385 * with code lowering and other optimizations.
5386 */
5387 GLboolean
5388 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5389 {
5390 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5391 assert(prog->LinkStatus);
5392
5393 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5394 if (prog->_LinkedShaders[i] == NULL)
5395 continue;
5396
5397 bool progress;
5398 exec_list *ir = prog->_LinkedShaders[i]->ir;
5399 const struct gl_shader_compiler_options *options =
5400 &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)];
5401
5402 /* If there are forms of indirect addressing that the driver
5403 * cannot handle, perform the lowering pass.
5404 */
5405 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5406 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5407 lower_variable_index_to_cond_assign(ir,
5408 options->EmitNoIndirectInput,
5409 options->EmitNoIndirectOutput,
5410 options->EmitNoIndirectTemp,
5411 options->EmitNoIndirectUniform);
5412 }
5413
5414 if (ctx->Extensions.ARB_shading_language_packing) {
5415 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5416 LOWER_UNPACK_SNORM_2x16 |
5417 LOWER_PACK_UNORM_2x16 |
5418 LOWER_UNPACK_UNORM_2x16 |
5419 LOWER_PACK_SNORM_4x8 |
5420 LOWER_UNPACK_SNORM_4x8 |
5421 LOWER_UNPACK_UNORM_4x8 |
5422 LOWER_PACK_UNORM_4x8 |
5423 LOWER_PACK_HALF_2x16 |
5424 LOWER_UNPACK_HALF_2x16;
5425
5426 lower_packing_builtins(ir, lower_inst);
5427 }
5428
5429 if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS))
5430 lower_offset_arrays(ir);
5431 do_mat_op_to_vec(ir);
5432 /* Emit saturates in the vertex shader only if SM 3.0 is supported. */
5433 bool vs_sm3 = (_mesa_shader_stage_to_program(prog->_LinkedShaders[i]->Stage) ==
5434 GL_VERTEX_PROGRAM_ARB) && st_context(ctx)->has_shader_model3;
5435 lower_instructions(ir,
5436 MOD_TO_FRACT |
5437 DIV_TO_MUL_RCP |
5438 EXP_TO_EXP2 |
5439 LOG_TO_LOG2 |
5440 LDEXP_TO_ARITH |
5441 CARRY_TO_ARITH |
5442 BORROW_TO_ARITH |
5443 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5444 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) |
5445 (vs_sm3 ? SAT_TO_CLAMP : 0));
5446
5447 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5448 do_vec_index_to_cond_assign(ir);
5449 lower_vector_insert(ir, true);
5450 lower_quadop_vector(ir, false);
5451 lower_noise(ir);
5452 if (options->MaxIfDepth == 0) {
5453 lower_discard(ir);
5454 }
5455
5456 do {
5457 progress = false;
5458
5459 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5460
5461 progress = do_common_optimization(ir, true, true, options,
5462 ctx->Const.NativeIntegers)
5463 || progress;
5464
5465 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5466
5467 } while (progress);
5468
5469 validate_ir_tree(ir);
5470 }
5471
5472 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
5473 struct gl_program *linked_prog;
5474
5475 if (prog->_LinkedShaders[i] == NULL)
5476 continue;
5477
5478 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5479
5480 if (linked_prog) {
5481 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5482 linked_prog);
5483 if (!ctx->Driver.ProgramStringNotify(ctx,
5484 _mesa_shader_stage_to_program(i),
5485 linked_prog)) {
5486 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5487 NULL);
5488 _mesa_reference_program(ctx, &linked_prog, NULL);
5489 return GL_FALSE;
5490 }
5491 }
5492
5493 _mesa_reference_program(ctx, &linked_prog, NULL);
5494 }
5495
5496 return GL_TRUE;
5497 }
5498
5499 void
5500 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5501 const GLuint outputMapping[],
5502 struct pipe_stream_output_info *so)
5503 {
5504 unsigned i;
5505 struct gl_transform_feedback_info *info =
5506 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5507
5508 for (i = 0; i < info->NumOutputs; i++) {
5509 so->output[i].register_index =
5510 outputMapping[info->Outputs[i].OutputRegister];
5511 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5512 so->output[i].num_components = info->Outputs[i].NumComponents;
5513 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5514 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5515 so->output[i].stream = info->Outputs[i].StreamId;
5516 }
5517
5518 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5519 so->stride[i] = info->BufferStride[i];
5520 }
5521 so->num_outputs = info->NumOutputs;
5522 }
5523
5524 } /* extern "C" */