2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
78 * Maximum number of temporary registers.
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
83 #define MAX_TEMPS 4096
86 * Maximum number of arrays
88 #define MAX_ARRAYS 256
90 /* if we support a native gallium TG4 with the ability to take 4 texoffsets then bump this */
91 #define MAX_GLSL_TEXTURE_OFFSET 1
96 static int swizzle_for_size(int size
);
99 * This struct is a corresponding struct to TGSI ureg_src.
103 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
107 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
108 this->swizzle
= swizzle_for_size(type
->vector_elements
);
110 this->swizzle
= SWIZZLE_XYZW
;
113 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
114 this->reladdr
= NULL
;
115 this->reladdr2
= NULL
;
116 this->has_index2
= false;
119 st_src_reg(gl_register_file file
, int index
, int type
)
125 this->swizzle
= SWIZZLE_XYZW
;
127 this->reladdr
= NULL
;
128 this->reladdr2
= NULL
;
129 this->has_index2
= false;
132 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
137 this->index2D
= index2D
;
138 this->swizzle
= SWIZZLE_XYZW
;
140 this->reladdr
= NULL
;
141 this->reladdr2
= NULL
;
142 this->has_index2
= false;
147 this->type
= GLSL_TYPE_ERROR
;
148 this->file
= PROGRAM_UNDEFINED
;
153 this->reladdr
= NULL
;
154 this->reladdr2
= NULL
;
155 this->has_index2
= false;
158 explicit st_src_reg(st_dst_reg reg
);
160 gl_register_file file
; /**< PROGRAM_* from Mesa */
161 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
163 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
164 int negate
; /**< NEGATE_XYZW mask from mesa */
165 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
166 /** Register index should be offset by the integer in this reg. */
168 st_src_reg
*reladdr2
;
174 st_dst_reg(gl_register_file file
, int writemask
, int type
, int index
)
178 this->writemask
= writemask
;
179 this->cond_mask
= COND_TR
;
180 this->reladdr
= NULL
;
184 st_dst_reg(gl_register_file file
, int writemask
, int type
)
188 this->writemask
= writemask
;
189 this->cond_mask
= COND_TR
;
190 this->reladdr
= NULL
;
196 this->type
= GLSL_TYPE_ERROR
;
197 this->file
= PROGRAM_UNDEFINED
;
200 this->cond_mask
= COND_TR
;
201 this->reladdr
= NULL
;
204 explicit st_dst_reg(st_src_reg reg
);
206 gl_register_file file
; /**< PROGRAM_* from Mesa */
207 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
208 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
210 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
211 /** Register index should be offset by the integer in this reg. */
215 st_src_reg::st_src_reg(st_dst_reg reg
)
217 this->type
= reg
.type
;
218 this->file
= reg
.file
;
219 this->index
= reg
.index
;
220 this->swizzle
= SWIZZLE_XYZW
;
222 this->reladdr
= reg
.reladdr
;
224 this->reladdr2
= NULL
;
225 this->has_index2
= false;
228 st_dst_reg::st_dst_reg(st_src_reg reg
)
230 this->type
= reg
.type
;
231 this->file
= reg
.file
;
232 this->index
= reg
.index
;
233 this->writemask
= WRITEMASK_XYZW
;
234 this->cond_mask
= COND_TR
;
235 this->reladdr
= reg
.reladdr
;
238 class glsl_to_tgsi_instruction
: public exec_node
{
240 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction
)
245 /** Pointer to the ir source this tree came from for debugging */
247 GLboolean cond_update
;
249 int sampler
; /**< sampler index */
250 int tex_target
; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow
;
253 st_src_reg tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
254 unsigned tex_offset_num_offset
;
255 int dead_mask
; /**< Used in dead code elimination */
257 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
260 class variable_storage
: public exec_node
{
262 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
263 : file(file
), index(index
), var(var
)
268 gl_register_file file
;
270 ir_variable
*var
; /* variable that maps to this, if any */
273 class immediate_storage
: public exec_node
{
275 immediate_storage(gl_constant_value
*values
, int size
, int type
)
277 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
282 gl_constant_value values
[4];
283 int size
; /**< Number of components (1-4) */
284 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
287 class function_entry
: public exec_node
{
289 ir_function_signature
*sig
;
292 * identifier of this function signature used by the program.
294 * At the point that TGSI instructions for function calls are
295 * generated, we don't know the address of the first instruction of
296 * the function body. So we make the BranchTarget that is called a
297 * small integer and rewrite them during set_branchtargets().
302 * Pointer to first instruction of the function body.
304 * Set during function body emits after main() is processed.
306 glsl_to_tgsi_instruction
*bgn_inst
;
309 * Index of the first instruction of the function body in actual TGSI.
311 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
315 /** Storage for the return value. */
316 st_src_reg return_reg
;
319 struct glsl_to_tgsi_visitor
: public ir_visitor
{
321 glsl_to_tgsi_visitor();
322 ~glsl_to_tgsi_visitor();
324 function_entry
*current_function
;
326 struct gl_context
*ctx
;
327 struct gl_program
*prog
;
328 struct gl_shader_program
*shader_program
;
329 struct gl_shader_compiler_options
*options
;
333 unsigned array_sizes
[MAX_ARRAYS
];
336 int num_address_regs
;
338 bool indirect_addr_consts
;
341 bool native_integers
;
344 variable_storage
*find_variable_storage(ir_variable
*var
);
346 int add_constant(gl_register_file file
, gl_constant_value values
[4],
347 int size
, int datatype
, GLuint
*swizzle_out
);
349 function_entry
*get_function_signature(ir_function_signature
*sig
);
351 st_src_reg
get_temp(const glsl_type
*type
);
352 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
354 st_src_reg
st_src_reg_for_float(float val
);
355 st_src_reg
st_src_reg_for_int(int val
);
356 st_src_reg
st_src_reg_for_type(int type
, int val
);
359 * \name Visit methods
361 * As typical for the visitor pattern, there must be one \c visit method for
362 * each concrete subclass of \c ir_instruction. Virtual base classes within
363 * the hierarchy should not have \c visit methods.
366 virtual void visit(ir_variable
*);
367 virtual void visit(ir_loop
*);
368 virtual void visit(ir_loop_jump
*);
369 virtual void visit(ir_function_signature
*);
370 virtual void visit(ir_function
*);
371 virtual void visit(ir_expression
*);
372 virtual void visit(ir_swizzle
*);
373 virtual void visit(ir_dereference_variable
*);
374 virtual void visit(ir_dereference_array
*);
375 virtual void visit(ir_dereference_record
*);
376 virtual void visit(ir_assignment
*);
377 virtual void visit(ir_constant
*);
378 virtual void visit(ir_call
*);
379 virtual void visit(ir_return
*);
380 virtual void visit(ir_discard
*);
381 virtual void visit(ir_texture
*);
382 virtual void visit(ir_if
*);
383 virtual void visit(ir_emit_vertex
*);
384 virtual void visit(ir_end_primitive
*);
389 /** List of variable_storage */
392 /** List of immediate_storage */
393 exec_list immediates
;
394 unsigned num_immediates
;
396 /** List of function_entry */
397 exec_list function_signatures
;
398 int next_signature_id
;
400 /** List of glsl_to_tgsi_instruction */
401 exec_list instructions
;
403 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
405 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
406 st_dst_reg dst
, st_src_reg src0
);
408 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
409 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
411 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
413 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
415 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
417 st_src_reg src0
, st_src_reg src1
);
420 * Emit the correct dot-product instruction for the type of arguments
422 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
428 void emit_scalar(ir_instruction
*ir
, unsigned op
,
429 st_dst_reg dst
, st_src_reg src0
);
431 void emit_scalar(ir_instruction
*ir
, unsigned op
,
432 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
434 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
436 void emit_scs(ir_instruction
*ir
, unsigned op
,
437 st_dst_reg dst
, const st_src_reg
&src
);
439 bool try_emit_mad(ir_expression
*ir
,
441 bool try_emit_mad_for_and_not(ir_expression
*ir
,
443 bool try_emit_sat(ir_expression
*ir
);
445 void emit_swz(ir_expression
*ir
);
447 bool process_move_condition(ir_rvalue
*ir
);
449 void simplify_cmp(void);
451 void rename_temp_register(int index
, int new_index
);
452 int get_first_temp_read(int index
);
453 int get_first_temp_write(int index
);
454 int get_last_temp_read(int index
);
455 int get_last_temp_write(int index
);
457 void copy_propagate(void);
458 void eliminate_dead_code(void);
459 int eliminate_dead_code_advanced(void);
460 void merge_registers(void);
461 void renumber_registers(void);
463 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
464 st_dst_reg
*l
, st_src_reg
*r
);
469 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
471 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
473 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 0);
474 static st_dst_reg address_reg2
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
, 1);
477 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
480 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
484 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
487 prog
->LinkStatus
= GL_FALSE
;
491 swizzle_for_size(int size
)
493 int size_swizzles
[4] = {
494 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
495 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
496 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
497 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
500 assert((size
>= 1) && (size
<= 4));
501 return size_swizzles
[size
- 1];
505 is_tex_instruction(unsigned opcode
)
507 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
512 num_inst_dst_regs(unsigned opcode
)
514 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
515 return info
->num_dst
;
519 num_inst_src_regs(unsigned opcode
)
521 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
522 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
525 glsl_to_tgsi_instruction
*
526 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
528 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
530 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
531 int num_reladdr
= 0, i
;
533 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
535 /* If we have to do relative addressing, we want to load the ARL
536 * reg directly for one of the regs, and preload the other reladdr
537 * sources into temps.
539 num_reladdr
+= dst
.reladdr
!= NULL
;
540 num_reladdr
+= src0
.reladdr
!= NULL
|| src0
.reladdr2
!= NULL
;
541 num_reladdr
+= src1
.reladdr
!= NULL
|| src1
.reladdr2
!= NULL
;
542 num_reladdr
+= src2
.reladdr
!= NULL
|| src2
.reladdr2
!= NULL
;
544 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
545 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
546 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
549 emit_arl(ir
, address_reg
, *dst
.reladdr
);
552 assert(num_reladdr
== 0);
562 inst
->function
= NULL
;
564 /* Update indirect addressing status used by TGSI */
567 case PROGRAM_STATE_VAR
:
568 case PROGRAM_CONSTANT
:
569 case PROGRAM_UNIFORM
:
570 this->indirect_addr_consts
= true;
572 case PROGRAM_IMMEDIATE
:
573 assert(!"immediates should not have indirect addressing");
580 for (i
=0; i
<3; i
++) {
581 if(inst
->src
[i
].reladdr
) {
582 switch(inst
->src
[i
].file
) {
583 case PROGRAM_STATE_VAR
:
584 case PROGRAM_CONSTANT
:
585 case PROGRAM_UNIFORM
:
586 this->indirect_addr_consts
= true;
588 case PROGRAM_IMMEDIATE
:
589 assert(!"immediates should not have indirect addressing");
598 this->instructions
.push_tail(inst
);
604 glsl_to_tgsi_instruction
*
605 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
606 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
608 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
611 glsl_to_tgsi_instruction
*
612 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
613 st_dst_reg dst
, st_src_reg src0
)
615 assert(dst
.writemask
!= 0);
616 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
619 glsl_to_tgsi_instruction
*
620 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
622 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
626 * Determines whether to use an integer, unsigned integer, or float opcode
627 * based on the operands and input opcode, then emits the result.
630 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
632 st_src_reg src0
, st_src_reg src1
)
634 int type
= GLSL_TYPE_FLOAT
;
636 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
637 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
638 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
639 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
641 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
642 type
= GLSL_TYPE_FLOAT
;
643 else if (native_integers
)
644 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
646 #define case4(c, f, i, u) \
647 case TGSI_OPCODE_##c: \
648 if (type == GLSL_TYPE_INT) \
649 op = TGSI_OPCODE_##i; \
650 else if (type == GLSL_TYPE_UINT) \
651 op = TGSI_OPCODE_##u; \
653 op = TGSI_OPCODE_##f; \
656 #define case3(f, i, u) case4(f, f, i, u)
657 #define case2fi(f, i) case4(f, f, i, i)
658 #define case2iu(i, u) case4(i, LAST, i, u)
660 #define casecomp(c, f, i, u) \
661 case TGSI_OPCODE_##c: \
662 if (type == GLSL_TYPE_INT) \
663 op = TGSI_OPCODE_##i; \
664 else if (type == GLSL_TYPE_UINT) \
665 op = TGSI_OPCODE_##u; \
666 else if (native_integers) \
667 op = TGSI_OPCODE_##f; \
669 op = TGSI_OPCODE_##c; \
676 case3(DIV
, IDIV
, UDIV
);
677 case3(MAX
, IMAX
, UMAX
);
678 case3(MIN
, IMIN
, UMIN
);
681 casecomp(SEQ
, FSEQ
, USEQ
, USEQ
);
682 casecomp(SNE
, FSNE
, USNE
, USNE
);
683 casecomp(SGE
, FSGE
, ISGE
, USGE
);
684 casecomp(SLT
, FSLT
, ISLT
, USLT
);
689 case3(ABS
, IABS
, IABS
);
694 assert(op
!= TGSI_OPCODE_LAST
);
698 glsl_to_tgsi_instruction
*
699 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
700 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
703 static const unsigned dot_opcodes
[] = {
704 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
707 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
711 * Emits TGSI scalar opcodes to produce unique answers across channels.
713 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
714 * channel determines the result across all channels. So to do a vec4
715 * of this operation, we want to emit a scalar per source channel used
716 * to produce dest channels.
719 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
721 st_src_reg orig_src0
, st_src_reg orig_src1
)
724 int done_mask
= ~dst
.writemask
;
726 /* TGSI RCP is a scalar operation splatting results to all channels,
727 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
730 for (i
= 0; i
< 4; i
++) {
731 GLuint this_mask
= (1 << i
);
732 glsl_to_tgsi_instruction
*inst
;
733 st_src_reg src0
= orig_src0
;
734 st_src_reg src1
= orig_src1
;
736 if (done_mask
& this_mask
)
739 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
740 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
741 for (j
= i
+ 1; j
< 4; j
++) {
742 /* If there is another enabled component in the destination that is
743 * derived from the same inputs, generate its value on this pass as
746 if (!(done_mask
& (1 << j
)) &&
747 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
748 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
749 this_mask
|= (1 << j
);
752 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
753 src0_swiz
, src0_swiz
);
754 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
755 src1_swiz
, src1_swiz
);
757 inst
= emit(ir
, op
, dst
, src0
, src1
);
758 inst
->dst
.writemask
= this_mask
;
759 done_mask
|= this_mask
;
764 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
765 st_dst_reg dst
, st_src_reg src0
)
767 st_src_reg undef
= undef_src
;
769 undef
.swizzle
= SWIZZLE_XXXX
;
771 emit_scalar(ir
, op
, dst
, src0
, undef
);
775 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
776 st_dst_reg dst
, st_src_reg src0
)
778 int op
= TGSI_OPCODE_ARL
;
780 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
781 op
= TGSI_OPCODE_UARL
;
783 assert(dst
.file
== PROGRAM_ADDRESS
);
784 if (dst
.index
>= this->num_address_regs
)
785 this->num_address_regs
= dst
.index
+ 1;
787 emit(NULL
, op
, dst
, src0
);
791 * Emit an TGSI_OPCODE_SCS instruction
793 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
794 * Instead of splatting its result across all four components of the
795 * destination, it writes one value to the \c x component and another value to
796 * the \c y component.
798 * \param ir IR instruction being processed
799 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
800 * on which value is desired.
801 * \param dst Destination register
802 * \param src Source register
805 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
807 const st_src_reg
&src
)
809 /* Vertex programs cannot use the SCS opcode.
811 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
812 emit_scalar(ir
, op
, dst
, src
);
816 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
817 const unsigned scs_mask
= (1U << component
);
818 int done_mask
= ~dst
.writemask
;
821 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
823 /* If there are compnents in the destination that differ from the component
824 * that will be written by the SCS instrution, we'll need a temporary.
826 if (scs_mask
!= unsigned(dst
.writemask
)) {
827 tmp
= get_temp(glsl_type::vec4_type
);
830 for (unsigned i
= 0; i
< 4; i
++) {
831 unsigned this_mask
= (1U << i
);
832 st_src_reg src0
= src
;
834 if ((done_mask
& this_mask
) != 0)
837 /* The source swizzle specified which component of the source generates
838 * sine / cosine for the current component in the destination. The SCS
839 * instruction requires that this value be swizzle to the X component.
840 * Replace the current swizzle with a swizzle that puts the source in
843 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
845 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
846 src0_swiz
, src0_swiz
);
847 for (unsigned j
= i
+ 1; j
< 4; j
++) {
848 /* If there is another enabled component in the destination that is
849 * derived from the same inputs, generate its value on this pass as
852 if (!(done_mask
& (1 << j
)) &&
853 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
854 this_mask
|= (1 << j
);
858 if (this_mask
!= scs_mask
) {
859 glsl_to_tgsi_instruction
*inst
;
860 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
862 /* Emit the SCS instruction.
864 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
865 inst
->dst
.writemask
= scs_mask
;
867 /* Move the result of the SCS instruction to the desired location in
870 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
871 component
, component
);
872 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
873 inst
->dst
.writemask
= this_mask
;
875 /* Emit the SCS instruction to write directly to the destination.
877 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
878 inst
->dst
.writemask
= scs_mask
;
881 done_mask
|= this_mask
;
886 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
887 gl_constant_value values
[4], int size
, int datatype
,
890 if (file
== PROGRAM_CONSTANT
) {
891 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
892 size
, datatype
, swizzle_out
);
895 immediate_storage
*entry
;
896 assert(file
== PROGRAM_IMMEDIATE
);
898 /* Search immediate storage to see if we already have an identical
899 * immediate that we can use instead of adding a duplicate entry.
901 foreach_list(node
, &this->immediates
) {
902 entry
= (immediate_storage
*) node
;
904 if (entry
->size
== size
&&
905 entry
->type
== datatype
&&
906 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
912 /* Add this immediate to the list. */
913 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
914 this->immediates
.push_tail(entry
);
915 this->num_immediates
++;
921 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
923 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
924 union gl_constant_value uval
;
927 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
933 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
935 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
936 union gl_constant_value uval
;
938 assert(native_integers
);
941 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
947 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
950 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
951 st_src_reg_for_int(val
);
953 return st_src_reg_for_float(val
);
957 type_size(const struct glsl_type
*type
)
962 switch (type
->base_type
) {
965 case GLSL_TYPE_FLOAT
:
967 if (type
->is_matrix()) {
968 return type
->matrix_columns
;
970 /* Regardless of size of vector, it gets a vec4. This is bad
971 * packing for things like floats, but otherwise arrays become a
972 * mess. Hopefully a later pass over the code can pack scalars
973 * down if appropriate.
977 case GLSL_TYPE_ARRAY
:
978 assert(type
->length
> 0);
979 return type_size(type
->fields
.array
) * type
->length
;
980 case GLSL_TYPE_STRUCT
:
982 for (i
= 0; i
< type
->length
; i
++) {
983 size
+= type_size(type
->fields
.structure
[i
].type
);
986 case GLSL_TYPE_SAMPLER
:
987 case GLSL_TYPE_IMAGE
:
988 /* Samplers take up one slot in UNIFORMS[], but they're baked in
992 case GLSL_TYPE_ATOMIC_UINT
:
993 case GLSL_TYPE_INTERFACE
:
995 case GLSL_TYPE_ERROR
:
996 assert(!"Invalid type in type_size");
1003 * In the initial pass of codegen, we assign temporary numbers to
1004 * intermediate results. (not SSA -- variable assignments will reuse
1008 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1012 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1016 if (!options
->EmitNoIndirectTemp
&&
1017 (type
->is_array() || type
->is_matrix())) {
1019 src
.file
= PROGRAM_ARRAY
;
1020 src
.index
= next_array
<< 16 | 0x8000;
1021 array_sizes
[next_array
] = type_size(type
);
1025 src
.file
= PROGRAM_TEMPORARY
;
1026 src
.index
= next_temp
;
1027 next_temp
+= type_size(type
);
1030 if (type
->is_array() || type
->is_record()) {
1031 src
.swizzle
= SWIZZLE_NOOP
;
1033 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1040 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1043 variable_storage
*entry
;
1045 foreach_list(node
, &this->variables
) {
1046 entry
= (variable_storage
*) node
;
1048 if (entry
->var
== var
)
1056 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1058 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1059 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1061 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
1062 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
1065 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1067 const ir_state_slot
*const slots
= ir
->state_slots
;
1068 assert(ir
->state_slots
!= NULL
);
1070 /* Check if this statevar's setup in the STATE file exactly
1071 * matches how we'll want to reference it as a
1072 * struct/array/whatever. If not, then we need to move it into
1073 * temporary storage and hope that it'll get copy-propagated
1076 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1077 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1082 variable_storage
*storage
;
1084 if (i
== ir
->num_state_slots
) {
1085 /* We'll set the index later. */
1086 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1087 this->variables
.push_tail(storage
);
1091 /* The variable_storage constructor allocates slots based on the size
1092 * of the type. However, this had better match the number of state
1093 * elements that we're going to copy into the new temporary.
1095 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1097 dst
= st_dst_reg(get_temp(ir
->type
));
1099 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1101 this->variables
.push_tail(storage
);
1105 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1106 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1107 (gl_state_index
*)slots
[i
].tokens
);
1109 if (storage
->file
== PROGRAM_STATE_VAR
) {
1110 if (storage
->index
== -1) {
1111 storage
->index
= index
;
1113 assert(index
== storage
->index
+ (int)i
);
1116 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1117 * the data being moved since MOV does not care about the type of
1118 * data it is moving, and we don't want to declare registers with
1119 * array or struct types.
1121 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1122 src
.swizzle
= slots
[i
].swizzle
;
1123 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1124 /* even a float takes up a whole vec4 reg in a struct/array. */
1129 if (storage
->file
== PROGRAM_TEMPORARY
&&
1130 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1131 fail_link(this->shader_program
,
1132 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1133 ir
->name
, dst
.index
- storage
->index
,
1134 type_size(ir
->type
));
1140 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1142 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1144 visit_exec_list(&ir
->body_instructions
, this);
1146 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1150 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1153 case ir_loop_jump::jump_break
:
1154 emit(NULL
, TGSI_OPCODE_BRK
);
1156 case ir_loop_jump::jump_continue
:
1157 emit(NULL
, TGSI_OPCODE_CONT
);
1164 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1171 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1173 /* Ignore function bodies other than main() -- we shouldn't see calls to
1174 * them since they should all be inlined before we get to glsl_to_tgsi.
1176 if (strcmp(ir
->name
, "main") == 0) {
1177 const ir_function_signature
*sig
;
1180 sig
= ir
->matching_signature(NULL
, &empty
);
1184 foreach_list(node
, &sig
->body
) {
1185 ir_instruction
*ir
= (ir_instruction
*) node
;
1193 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1195 int nonmul_operand
= 1 - mul_operand
;
1197 st_dst_reg result_dst
;
1199 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1200 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1203 expr
->operands
[0]->accept(this);
1205 expr
->operands
[1]->accept(this);
1207 ir
->operands
[nonmul_operand
]->accept(this);
1210 this->result
= get_temp(ir
->type
);
1211 result_dst
= st_dst_reg(this->result
);
1212 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1213 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1219 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1221 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1222 * implemented using multiplication, and logical-or is implemented using
1223 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1224 * As result, the logical expression (a & !b) can be rewritten as:
1228 * - (a * 1) - (a * b)
1232 * This final expression can be implemented as a single MAD(a, -b, a)
1236 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1238 const int other_operand
= 1 - try_operand
;
1241 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1242 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1245 ir
->operands
[other_operand
]->accept(this);
1247 expr
->operands
[0]->accept(this);
1250 b
.negate
= ~b
.negate
;
1252 this->result
= get_temp(ir
->type
);
1253 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1259 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1261 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1263 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1264 !st_context(this->ctx
)->has_shader_model3
) {
1268 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1272 sat_src
->accept(this);
1273 st_src_reg src
= this->result
;
1275 /* If we generated an expression instruction into a temporary in
1276 * processing the saturate's operand, apply the saturate to that
1277 * instruction. Otherwise, generate a MOV to do the saturate.
1279 * Note that we have to be careful to only do this optimization if
1280 * the instruction in question was what generated src->result. For
1281 * example, ir_dereference_array might generate a MUL instruction
1282 * to create the reladdr, and return us a src reg using that
1283 * reladdr. That MUL result is not the value we're trying to
1286 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1287 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1288 sat_src_expr
->operation
== ir_binop_add
||
1289 sat_src_expr
->operation
== ir_binop_dot
)) {
1290 glsl_to_tgsi_instruction
*new_inst
;
1291 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1292 new_inst
->saturate
= true;
1294 this->result
= get_temp(ir
->type
);
1295 st_dst_reg result_dst
= st_dst_reg(this->result
);
1296 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1297 glsl_to_tgsi_instruction
*inst
;
1298 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1299 inst
->saturate
= true;
1306 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1307 st_src_reg
*reg
, int *num_reladdr
)
1309 if (!reg
->reladdr
&& !reg
->reladdr2
)
1312 if (reg
->reladdr
) emit_arl(ir
, address_reg
, *reg
->reladdr
);
1313 if (reg
->reladdr2
) emit_arl(ir
, address_reg2
, *reg
->reladdr2
);
1315 if (*num_reladdr
!= 1) {
1316 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1318 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1326 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1328 unsigned int operand
;
1329 st_src_reg op
[Elements(ir
->operands
)];
1330 st_src_reg result_src
;
1331 st_dst_reg result_dst
;
1333 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1335 if (ir
->operation
== ir_binop_add
) {
1336 if (try_emit_mad(ir
, 1))
1338 if (try_emit_mad(ir
, 0))
1342 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1344 if (ir
->operation
== ir_binop_logic_and
) {
1345 if (try_emit_mad_for_and_not(ir
, 1))
1347 if (try_emit_mad_for_and_not(ir
, 0))
1351 if (try_emit_sat(ir
))
1354 if (ir
->operation
== ir_quadop_vector
)
1355 assert(!"ir_quadop_vector should have been lowered");
1357 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1358 this->result
.file
= PROGRAM_UNDEFINED
;
1359 ir
->operands
[operand
]->accept(this);
1360 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1361 printf("Failed to get tree for expression operand:\n");
1362 ir
->operands
[operand
]->print();
1366 op
[operand
] = this->result
;
1368 /* Matrix expression operands should have been broken down to vector
1369 * operations already.
1371 assert(!ir
->operands
[operand
]->type
->is_matrix());
1374 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1375 if (ir
->operands
[1]) {
1376 vector_elements
= MAX2(vector_elements
,
1377 ir
->operands
[1]->type
->vector_elements
);
1380 this->result
.file
= PROGRAM_UNDEFINED
;
1382 /* Storage for our result. Ideally for an assignment we'd be using
1383 * the actual storage for the result here, instead.
1385 result_src
= get_temp(ir
->type
);
1386 /* convenience for the emit functions below. */
1387 result_dst
= st_dst_reg(result_src
);
1388 /* Limit writes to the channels that will be used by result_src later.
1389 * This does limit this temp's use as a temporary for multi-instruction
1392 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1394 switch (ir
->operation
) {
1395 case ir_unop_logic_not
:
1396 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1397 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1399 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1400 * older GPUs implement SEQ using multiple instructions (i915 uses two
1401 * SGE instructions and a MUL instruction). Since our logic values are
1402 * 0.0 and 1.0, 1-x also implements !x.
1404 op
[0].negate
= ~op
[0].negate
;
1405 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1409 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1410 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1412 op
[0].negate
= ~op
[0].negate
;
1417 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1420 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1423 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1427 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1431 assert(!"not reached: should be handled by ir_explog_to_explog2");
1434 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1437 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1440 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1442 case ir_unop_sin_reduced
:
1443 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1445 case ir_unop_cos_reduced
:
1446 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1450 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1454 /* The X component contains 1 or -1 depending on whether the framebuffer
1455 * is a FBO or the window system buffer, respectively.
1456 * It is then multiplied with the source operand of DDY.
1458 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1459 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1461 unsigned transform_y_index
=
1462 _mesa_add_state_reference(this->prog
->Parameters
,
1465 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1467 glsl_type::vec4_type
);
1468 transform_y
.swizzle
= SWIZZLE_XXXX
;
1470 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1472 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1473 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1477 case ir_unop_noise
: {
1478 /* At some point, a motivated person could add a better
1479 * implementation of noise. Currently not even the nvidia
1480 * binary drivers do anything more than this. In any case, the
1481 * place to do this is in the GL state tracker, not the poor
1484 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1489 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1492 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1496 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1499 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1500 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1502 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1505 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1506 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1508 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1512 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1514 case ir_binop_greater
:
1515 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1517 case ir_binop_lequal
:
1518 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1520 case ir_binop_gequal
:
1521 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1523 case ir_binop_equal
:
1524 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1526 case ir_binop_nequal
:
1527 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1529 case ir_binop_all_equal
:
1530 /* "==" operator producing a scalar boolean. */
1531 if (ir
->operands
[0]->type
->is_vector() ||
1532 ir
->operands
[1]->type
->is_vector()) {
1533 st_src_reg temp
= get_temp(native_integers
?
1534 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1535 glsl_type::vec4_type
);
1537 if (native_integers
) {
1538 st_dst_reg temp_dst
= st_dst_reg(temp
);
1539 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1541 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1543 /* Emit 1-3 AND operations to combine the SEQ results. */
1544 switch (ir
->operands
[0]->type
->vector_elements
) {
1548 temp_dst
.writemask
= WRITEMASK_Y
;
1549 temp1
.swizzle
= SWIZZLE_YYYY
;
1550 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1551 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1554 temp_dst
.writemask
= WRITEMASK_X
;
1555 temp1
.swizzle
= SWIZZLE_XXXX
;
1556 temp2
.swizzle
= SWIZZLE_YYYY
;
1557 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1558 temp_dst
.writemask
= WRITEMASK_Y
;
1559 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1560 temp2
.swizzle
= SWIZZLE_WWWW
;
1561 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1564 temp1
.swizzle
= SWIZZLE_XXXX
;
1565 temp2
.swizzle
= SWIZZLE_YYYY
;
1566 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1568 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1570 /* After the dot-product, the value will be an integer on the
1571 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1573 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1575 /* Negating the result of the dot-product gives values on the range
1576 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1577 * This is achieved using SGE.
1579 st_src_reg sge_src
= result_src
;
1580 sge_src
.negate
= ~sge_src
.negate
;
1581 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1584 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1587 case ir_binop_any_nequal
:
1588 /* "!=" operator producing a scalar boolean. */
1589 if (ir
->operands
[0]->type
->is_vector() ||
1590 ir
->operands
[1]->type
->is_vector()) {
1591 st_src_reg temp
= get_temp(native_integers
?
1592 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1593 glsl_type::vec4_type
);
1594 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1596 if (native_integers
) {
1597 st_dst_reg temp_dst
= st_dst_reg(temp
);
1598 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1600 /* Emit 1-3 OR operations to combine the SNE results. */
1601 switch (ir
->operands
[0]->type
->vector_elements
) {
1605 temp_dst
.writemask
= WRITEMASK_Y
;
1606 temp1
.swizzle
= SWIZZLE_YYYY
;
1607 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1608 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1611 temp_dst
.writemask
= WRITEMASK_X
;
1612 temp1
.swizzle
= SWIZZLE_XXXX
;
1613 temp2
.swizzle
= SWIZZLE_YYYY
;
1614 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1615 temp_dst
.writemask
= WRITEMASK_Y
;
1616 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1617 temp2
.swizzle
= SWIZZLE_WWWW
;
1618 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1621 temp1
.swizzle
= SWIZZLE_XXXX
;
1622 temp2
.swizzle
= SWIZZLE_YYYY
;
1623 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1625 /* After the dot-product, the value will be an integer on the
1626 * range [0,4]. Zero stays zero, and positive values become 1.0.
1628 glsl_to_tgsi_instruction
*const dp
=
1629 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1630 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1631 /* The clamping to [0,1] can be done for free in the fragment
1632 * shader with a saturate.
1634 dp
->saturate
= true;
1636 /* Negating the result of the dot-product gives values on the range
1637 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1638 * achieved using SLT.
1640 st_src_reg slt_src
= result_src
;
1641 slt_src
.negate
= ~slt_src
.negate
;
1642 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1646 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1651 assert(ir
->operands
[0]->type
->is_vector());
1653 /* After the dot-product, the value will be an integer on the
1654 * range [0,4]. Zero stays zero, and positive values become 1.0.
1656 glsl_to_tgsi_instruction
*const dp
=
1657 emit_dp(ir
, result_dst
, op
[0], op
[0],
1658 ir
->operands
[0]->type
->vector_elements
);
1659 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1660 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1661 /* The clamping to [0,1] can be done for free in the fragment
1662 * shader with a saturate.
1664 dp
->saturate
= true;
1665 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1666 /* Negating the result of the dot-product gives values on the range
1667 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1668 * is achieved using SLT.
1670 st_src_reg slt_src
= result_src
;
1671 slt_src
.negate
= ~slt_src
.negate
;
1672 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1675 /* Use SNE 0 if integers are being used as boolean values. */
1676 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1681 case ir_binop_logic_xor
:
1682 if (native_integers
)
1683 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1685 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1688 case ir_binop_logic_or
: {
1689 if (native_integers
) {
1690 /* If integers are used as booleans, we can use an actual "or"
1693 assert(native_integers
);
1694 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1696 /* After the addition, the value will be an integer on the
1697 * range [0,2]. Zero stays zero, and positive values become 1.0.
1699 glsl_to_tgsi_instruction
*add
=
1700 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1701 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1702 /* The clamping to [0,1] can be done for free in the fragment
1703 * shader with a saturate if floats are being used as boolean values.
1705 add
->saturate
= true;
1707 /* Negating the result of the addition gives values on the range
1708 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1709 * is achieved using SLT.
1711 st_src_reg slt_src
= result_src
;
1712 slt_src
.negate
= ~slt_src
.negate
;
1713 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1719 case ir_binop_logic_and
:
1720 /* If native integers are disabled, the bool args are stored as float 0.0
1721 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1722 * actual AND opcode.
1724 if (native_integers
)
1725 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1727 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1731 assert(ir
->operands
[0]->type
->is_vector());
1732 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1733 emit_dp(ir
, result_dst
, op
[0], op
[1],
1734 ir
->operands
[0]->type
->vector_elements
);
1739 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1742 /* sqrt(x) = x * rsq(x). */
1743 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1744 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1745 /* For incoming channels <= 0, set the result to 0. */
1746 op
[0].negate
= ~op
[0].negate
;
1747 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1748 op
[0], result_src
, st_src_reg_for_float(0.0));
1752 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1755 if (native_integers
) {
1756 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1759 /* fallthrough to next case otherwise */
1761 if (native_integers
) {
1762 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1765 /* fallthrough to next case otherwise */
1768 /* Converting between signed and unsigned integers is a no-op. */
1772 if (native_integers
) {
1773 /* Booleans are stored as integers using ~0 for true and 0 for false.
1774 * GLSL requires that int(bool) return 1 for true and 0 for false.
1775 * This conversion is done with AND, but it could be done with NEG.
1777 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1779 /* Booleans and integers are both stored as floats when native
1780 * integers are disabled.
1786 if (native_integers
)
1787 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1789 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1792 if (native_integers
)
1793 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1795 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1797 case ir_unop_bitcast_f2i
:
1799 result_src
.type
= GLSL_TYPE_INT
;
1801 case ir_unop_bitcast_f2u
:
1803 result_src
.type
= GLSL_TYPE_UINT
;
1805 case ir_unop_bitcast_i2f
:
1806 case ir_unop_bitcast_u2f
:
1808 result_src
.type
= GLSL_TYPE_FLOAT
;
1811 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1814 if (native_integers
)
1815 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1817 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1820 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1823 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1826 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1828 case ir_unop_round_even
:
1829 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1832 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1836 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1839 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1842 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1845 case ir_unop_bit_not
:
1846 if (native_integers
) {
1847 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1851 if (native_integers
) {
1852 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1855 case ir_binop_lshift
:
1856 if (native_integers
) {
1857 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1860 case ir_binop_rshift
:
1861 if (native_integers
) {
1862 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1865 case ir_binop_bit_and
:
1866 if (native_integers
) {
1867 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1870 case ir_binop_bit_xor
:
1871 if (native_integers
) {
1872 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1875 case ir_binop_bit_or
:
1876 if (native_integers
) {
1877 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1881 assert(!"GLSL 1.30 features unsupported");
1884 case ir_binop_ubo_load
: {
1885 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1886 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1887 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1888 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1891 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1892 cbuf
.file
= PROGRAM_CONSTANT
;
1894 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1895 cbuf
.reladdr
= NULL
;
1898 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1900 if (const_offset_ir
) {
1901 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1903 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1906 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1907 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1908 const_offset
% 16 / 4,
1909 const_offset
% 16 / 4,
1910 const_offset
% 16 / 4);
1912 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1913 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1915 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1916 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1918 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1923 /* note: we have to reorder the three args here */
1924 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1927 if (this->ctx
->Const
.NativeIntegers
)
1928 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, op
[0], op
[1], op
[2]);
1930 op
[0].negate
= ~op
[0].negate
;
1931 emit(ir
, TGSI_OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1934 case ir_unop_pack_snorm_2x16
:
1935 case ir_unop_pack_unorm_2x16
:
1936 case ir_unop_pack_half_2x16
:
1937 case ir_unop_pack_snorm_4x8
:
1938 case ir_unop_pack_unorm_4x8
:
1939 case ir_unop_unpack_snorm_2x16
:
1940 case ir_unop_unpack_unorm_2x16
:
1941 case ir_unop_unpack_half_2x16
:
1942 case ir_unop_unpack_half_2x16_split_x
:
1943 case ir_unop_unpack_half_2x16_split_y
:
1944 case ir_unop_unpack_snorm_4x8
:
1945 case ir_unop_unpack_unorm_4x8
:
1946 case ir_binop_pack_half_2x16_split
:
1947 case ir_unop_bitfield_reverse
:
1948 case ir_unop_bit_count
:
1949 case ir_unop_find_msb
:
1950 case ir_unop_find_lsb
:
1954 case ir_triop_bitfield_extract
:
1955 case ir_quadop_bitfield_insert
:
1956 case ir_quadop_vector
:
1957 case ir_binop_vector_extract
:
1958 case ir_triop_vector_insert
:
1959 case ir_binop_ldexp
:
1960 case ir_binop_carry
:
1961 case ir_binop_borrow
:
1962 case ir_binop_imul_high
:
1963 /* This operation is not supported, or should have already been handled.
1965 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1969 this->result
= result_src
;
1974 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1980 /* Note that this is only swizzles in expressions, not those on the left
1981 * hand side of an assignment, which do write masking. See ir_assignment
1985 ir
->val
->accept(this);
1987 assert(src
.file
!= PROGRAM_UNDEFINED
);
1989 for (i
= 0; i
< 4; i
++) {
1990 if (i
< ir
->type
->vector_elements
) {
1993 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1996 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1999 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2002 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2006 /* If the type is smaller than a vec4, replicate the last
2009 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2013 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2019 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2021 variable_storage
*entry
= find_variable_storage(ir
->var
);
2022 ir_variable
*var
= ir
->var
;
2025 switch (var
->data
.mode
) {
2026 case ir_var_uniform
:
2027 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2028 var
->data
.location
);
2029 this->variables
.push_tail(entry
);
2031 case ir_var_shader_in
:
2032 /* The linker assigns locations for varyings and attributes,
2033 * including deprecated builtins (like gl_Color), user-assign
2034 * generic attributes (glBindVertexLocation), and
2035 * user-defined varyings.
2037 assert(var
->data
.location
!= -1);
2038 entry
= new(mem_ctx
) variable_storage(var
,
2040 var
->data
.location
);
2042 case ir_var_shader_out
:
2043 assert(var
->data
.location
!= -1);
2044 entry
= new(mem_ctx
) variable_storage(var
,
2049 case ir_var_system_value
:
2050 entry
= new(mem_ctx
) variable_storage(var
,
2051 PROGRAM_SYSTEM_VALUE
,
2052 var
->data
.location
);
2055 case ir_var_temporary
:
2056 st_src_reg src
= get_temp(var
->type
);
2058 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2059 this->variables
.push_tail(entry
);
2065 printf("Failed to make storage for %s\n", var
->name
);
2070 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2071 if (!native_integers
)
2072 this->result
.type
= GLSL_TYPE_FLOAT
;
2076 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2080 int element_size
= type_size(ir
->type
);
2083 index
= ir
->array_index
->constant_expression_value();
2085 ir
->array
->accept(this);
2088 is_2D_input
= this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
&&
2089 src
.file
== PROGRAM_INPUT
&&
2090 ir
->array
->ir_type
!= ir_type_dereference_array
;
2097 src
.index2D
= index
->value
.i
[0];
2098 src
.has_index2
= true;
2100 src
.index
+= index
->value
.i
[0] * element_size
;
2102 /* Variable index array dereference. It eats the "vec4" of the
2103 * base of the array and an index that offsets the TGSI register
2106 ir
->array_index
->accept(this);
2108 st_src_reg index_reg
;
2110 if (element_size
== 1) {
2111 index_reg
= this->result
;
2113 index_reg
= get_temp(native_integers
?
2114 glsl_type::int_type
: glsl_type::float_type
);
2116 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2117 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2120 /* If there was already a relative address register involved, add the
2121 * new and the old together to get the new offset.
2123 if (!is_2D_input
&& src
.reladdr
!= NULL
) {
2124 st_src_reg accum_reg
= get_temp(native_integers
?
2125 glsl_type::int_type
: glsl_type::float_type
);
2127 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2128 index_reg
, *src
.reladdr
);
2130 index_reg
= accum_reg
;
2134 src
.reladdr2
= ralloc(mem_ctx
, st_src_reg
);
2135 memcpy(src
.reladdr2
, &index_reg
, sizeof(index_reg
));
2137 src
.has_index2
= true;
2139 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2140 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2144 /* If the type is smaller than a vec4, replicate the last channel out. */
2145 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2146 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2148 src
.swizzle
= SWIZZLE_NOOP
;
2150 /* Change the register type to the element type of the array. */
2151 src
.type
= ir
->type
->base_type
;
2157 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2160 const glsl_type
*struct_type
= ir
->record
->type
;
2163 ir
->record
->accept(this);
2165 for (i
= 0; i
< struct_type
->length
; i
++) {
2166 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2168 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2171 /* If the type is smaller than a vec4, replicate the last channel out. */
2172 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2173 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2175 this->result
.swizzle
= SWIZZLE_NOOP
;
2177 this->result
.index
+= offset
;
2178 this->result
.type
= ir
->type
->base_type
;
2182 * We want to be careful in assignment setup to hit the actual storage
2183 * instead of potentially using a temporary like we might with the
2184 * ir_dereference handler.
2187 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2189 /* The LHS must be a dereference. If the LHS is a variable indexed array
2190 * access of a vector, it must be separated into a series conditional moves
2191 * before reaching this point (see ir_vec_index_to_cond_assign).
2193 assert(ir
->as_dereference());
2194 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2196 assert(!deref_array
->array
->type
->is_vector());
2199 /* Use the rvalue deref handler for the most part. We'll ignore
2200 * swizzles in it and write swizzles using writemask, though.
2203 return st_dst_reg(v
->result
);
2207 * Process the condition of a conditional assignment
2209 * Examines the condition of a conditional assignment to generate the optimal
2210 * first operand of a \c CMP instruction. If the condition is a relational
2211 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2212 * used as the source for the \c CMP instruction. Otherwise the comparison
2213 * is processed to a boolean result, and the boolean result is used as the
2214 * operand to the CMP instruction.
2217 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2219 ir_rvalue
*src_ir
= ir
;
2221 bool switch_order
= false;
2223 ir_expression
*const expr
= ir
->as_expression();
2224 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2225 bool zero_on_left
= false;
2227 if (expr
->operands
[0]->is_zero()) {
2228 src_ir
= expr
->operands
[1];
2229 zero_on_left
= true;
2230 } else if (expr
->operands
[1]->is_zero()) {
2231 src_ir
= expr
->operands
[0];
2232 zero_on_left
= false;
2236 * (a < 0) T F F ( a < 0) T F F
2237 * (0 < a) F F T (-a < 0) F F T
2238 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2239 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2240 * (a > 0) F F T (-a < 0) F F T
2241 * (0 > a) T F F ( a < 0) T F F
2242 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2243 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2245 * Note that exchanging the order of 0 and 'a' in the comparison simply
2246 * means that the value of 'a' should be negated.
2249 switch (expr
->operation
) {
2251 switch_order
= false;
2252 negate
= zero_on_left
;
2255 case ir_binop_greater
:
2256 switch_order
= false;
2257 negate
= !zero_on_left
;
2260 case ir_binop_lequal
:
2261 switch_order
= true;
2262 negate
= !zero_on_left
;
2265 case ir_binop_gequal
:
2266 switch_order
= true;
2267 negate
= zero_on_left
;
2271 /* This isn't the right kind of comparison afterall, so make sure
2272 * the whole condition is visited.
2280 src_ir
->accept(this);
2282 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2283 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2284 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2285 * computing the condition.
2288 this->result
.negate
= ~this->result
.negate
;
2290 return switch_order
;
2294 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2295 st_dst_reg
*l
, st_src_reg
*r
)
2297 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2298 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2299 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2304 if (type
->is_array()) {
2305 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2306 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2311 if (type
->is_matrix()) {
2312 const struct glsl_type
*vec_type
;
2314 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2315 type
->vector_elements
, 1);
2317 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2318 emit_block_mov(ir
, vec_type
, l
, r
);
2323 assert(type
->is_scalar() || type
->is_vector());
2325 r
->type
= type
->base_type
;
2326 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2332 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2338 ir
->rhs
->accept(this);
2341 l
= get_assignment_lhs(ir
->lhs
, this);
2343 /* FINISHME: This should really set to the correct maximal writemask for each
2344 * FINISHME: component written (in the loops below). This case can only
2345 * FINISHME: occur for matrices, arrays, and structures.
2347 if (ir
->write_mask
== 0) {
2348 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2349 l
.writemask
= WRITEMASK_XYZW
;
2350 } else if (ir
->lhs
->type
->is_scalar() &&
2351 ir
->lhs
->variable_referenced()->data
.mode
== ir_var_shader_out
) {
2352 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2353 * FINISHME: W component of fragment shader output zero, work correctly.
2355 l
.writemask
= WRITEMASK_XYZW
;
2358 int first_enabled_chan
= 0;
2361 l
.writemask
= ir
->write_mask
;
2363 for (int i
= 0; i
< 4; i
++) {
2364 if (l
.writemask
& (1 << i
)) {
2365 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2370 /* Swizzle a small RHS vector into the channels being written.
2372 * glsl ir treats write_mask as dictating how many channels are
2373 * present on the RHS while TGSI treats write_mask as just
2374 * showing which channels of the vec4 RHS get written.
2376 for (int i
= 0; i
< 4; i
++) {
2377 if (l
.writemask
& (1 << i
))
2378 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2380 swizzles
[i
] = first_enabled_chan
;
2382 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2383 swizzles
[2], swizzles
[3]);
2386 assert(l
.file
!= PROGRAM_UNDEFINED
);
2387 assert(r
.file
!= PROGRAM_UNDEFINED
);
2389 if (ir
->condition
) {
2390 const bool switch_order
= this->process_move_condition(ir
->condition
);
2391 st_src_reg condition
= this->result
;
2393 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2394 st_src_reg l_src
= st_src_reg(l
);
2395 st_src_reg condition_temp
= condition
;
2396 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2398 if (native_integers
) {
2399 /* This is necessary because TGSI's CMP instruction expects the
2400 * condition to be a float, and we store booleans as integers.
2401 * TODO: really want to avoid i2f path and use UCMP. Requires
2402 * changes to process_move_condition though too.
2404 condition_temp
= get_temp(glsl_type::vec4_type
);
2405 condition
.negate
= 0;
2406 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2407 condition_temp
.swizzle
= condition
.swizzle
;
2411 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2413 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2419 } else if (ir
->rhs
->as_expression() &&
2420 this->instructions
.get_tail() &&
2421 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2422 type_size(ir
->lhs
->type
) == 1 &&
2423 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2424 /* To avoid emitting an extra MOV when assigning an expression to a
2425 * variable, emit the last instruction of the expression again, but
2426 * replace the destination register with the target of the assignment.
2427 * Dead code elimination will remove the original instruction.
2429 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2430 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2431 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2432 new_inst
->saturate
= inst
->saturate
;
2433 inst
->dead_mask
= inst
->dst
.writemask
;
2435 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2441 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2444 GLfloat stack_vals
[4] = { 0 };
2445 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2446 GLenum gl_type
= GL_NONE
;
2448 static int in_array
= 0;
2449 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2451 /* Unfortunately, 4 floats is all we can get into
2452 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2453 * aggregate constant and move each constant value into it. If we
2454 * get lucky, copy propagation will eliminate the extra moves.
2456 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2457 st_src_reg temp_base
= get_temp(ir
->type
);
2458 st_dst_reg temp
= st_dst_reg(temp_base
);
2460 foreach_list(node
, &ir
->components
) {
2461 ir_constant
*field_value
= (ir_constant
*) node
;
2462 int size
= type_size(field_value
->type
);
2466 field_value
->accept(this);
2469 for (i
= 0; i
< (unsigned int)size
; i
++) {
2470 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2476 this->result
= temp_base
;
2480 if (ir
->type
->is_array()) {
2481 st_src_reg temp_base
= get_temp(ir
->type
);
2482 st_dst_reg temp
= st_dst_reg(temp_base
);
2483 int size
= type_size(ir
->type
->fields
.array
);
2488 for (i
= 0; i
< ir
->type
->length
; i
++) {
2489 ir
->array_elements
[i
]->accept(this);
2491 for (int j
= 0; j
< size
; j
++) {
2492 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2498 this->result
= temp_base
;
2503 if (ir
->type
->is_matrix()) {
2504 st_src_reg mat
= get_temp(ir
->type
);
2505 st_dst_reg mat_column
= st_dst_reg(mat
);
2507 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2508 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2509 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2511 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2512 src
.index
= add_constant(file
,
2514 ir
->type
->vector_elements
,
2517 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2526 switch (ir
->type
->base_type
) {
2527 case GLSL_TYPE_FLOAT
:
2529 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2530 values
[i
].f
= ir
->value
.f
[i
];
2533 case GLSL_TYPE_UINT
:
2534 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2535 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2536 if (native_integers
)
2537 values
[i
].u
= ir
->value
.u
[i
];
2539 values
[i
].f
= ir
->value
.u
[i
];
2543 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2544 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2545 if (native_integers
)
2546 values
[i
].i
= ir
->value
.i
[i
];
2548 values
[i
].f
= ir
->value
.i
[i
];
2551 case GLSL_TYPE_BOOL
:
2552 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2553 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2554 if (native_integers
)
2555 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2557 values
[i
].f
= ir
->value
.b
[i
];
2561 assert(!"Non-float/uint/int/bool constant");
2564 this->result
= st_src_reg(file
, -1, ir
->type
);
2565 this->result
.index
= add_constant(file
,
2567 ir
->type
->vector_elements
,
2569 &this->result
.swizzle
);
2573 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2575 function_entry
*entry
;
2577 foreach_list(node
, &this->function_signatures
) {
2578 entry
= (function_entry
*) node
;
2580 if (entry
->sig
== sig
)
2584 entry
= ralloc(mem_ctx
, function_entry
);
2586 entry
->sig_id
= this->next_signature_id
++;
2587 entry
->bgn_inst
= NULL
;
2589 /* Allocate storage for all the parameters. */
2590 foreach_list(node
, &sig
->parameters
) {
2591 ir_variable
*param
= (ir_variable
*) node
;
2592 variable_storage
*storage
;
2594 storage
= find_variable_storage(param
);
2597 st_src_reg src
= get_temp(param
->type
);
2599 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2600 this->variables
.push_tail(storage
);
2603 if (!sig
->return_type
->is_void()) {
2604 entry
->return_reg
= get_temp(sig
->return_type
);
2606 entry
->return_reg
= undef_src
;
2609 this->function_signatures
.push_tail(entry
);
2614 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2616 glsl_to_tgsi_instruction
*call_inst
;
2617 ir_function_signature
*sig
= ir
->callee
;
2618 function_entry
*entry
= get_function_signature(sig
);
2621 /* Process in parameters. */
2622 foreach_two_lists(formal_node
, &sig
->parameters
,
2623 actual_node
, &ir
->actual_parameters
) {
2624 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2625 ir_variable
*param
= (ir_variable
*) formal_node
;
2627 if (param
->data
.mode
== ir_var_function_in
||
2628 param
->data
.mode
== ir_var_function_inout
) {
2629 variable_storage
*storage
= find_variable_storage(param
);
2632 param_rval
->accept(this);
2633 st_src_reg r
= this->result
;
2636 l
.file
= storage
->file
;
2637 l
.index
= storage
->index
;
2639 l
.writemask
= WRITEMASK_XYZW
;
2640 l
.cond_mask
= COND_TR
;
2642 for (i
= 0; i
< type_size(param
->type
); i
++) {
2643 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2650 /* Emit call instruction */
2651 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2652 call_inst
->function
= entry
;
2654 /* Process out parameters. */
2655 foreach_two_lists(formal_node
, &sig
->parameters
,
2656 actual_node
, &ir
->actual_parameters
) {
2657 ir_rvalue
*param_rval
= (ir_rvalue
*) actual_node
;
2658 ir_variable
*param
= (ir_variable
*) formal_node
;
2660 if (param
->data
.mode
== ir_var_function_out
||
2661 param
->data
.mode
== ir_var_function_inout
) {
2662 variable_storage
*storage
= find_variable_storage(param
);
2666 r
.file
= storage
->file
;
2667 r
.index
= storage
->index
;
2669 r
.swizzle
= SWIZZLE_NOOP
;
2672 param_rval
->accept(this);
2673 st_dst_reg l
= st_dst_reg(this->result
);
2675 for (i
= 0; i
< type_size(param
->type
); i
++) {
2676 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2683 /* Process return value. */
2684 this->result
= entry
->return_reg
;
2688 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2690 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
, component
;
2691 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2692 glsl_to_tgsi_instruction
*inst
= NULL
;
2693 unsigned opcode
= TGSI_OPCODE_NOP
;
2694 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2695 bool is_cube_array
= false;
2697 /* if we are a cube array sampler */
2698 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2699 sampler_type
->sampler_array
)) {
2700 is_cube_array
= true;
2703 if (ir
->coordinate
) {
2704 ir
->coordinate
->accept(this);
2706 /* Put our coords in a temp. We'll need to modify them for shadow,
2707 * projection, or LOD, so the only case we'd use it as is is if
2708 * we're doing plain old texturing. The optimization passes on
2709 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2711 coord
= get_temp(glsl_type::vec4_type
);
2712 coord_dst
= st_dst_reg(coord
);
2713 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2714 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2717 if (ir
->projector
) {
2718 ir
->projector
->accept(this);
2719 projector
= this->result
;
2722 /* Storage for our result. Ideally for an assignment we'd be using
2723 * the actual storage for the result here, instead.
2725 result_src
= get_temp(ir
->type
);
2726 result_dst
= st_dst_reg(result_src
);
2730 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2732 ir
->offset
->accept(this);
2733 offset
= this->result
;
2737 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2738 ir
->lod_info
.bias
->accept(this);
2739 lod_info
= this->result
;
2741 ir
->offset
->accept(this);
2742 offset
= this->result
;
2746 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2747 ir
->lod_info
.lod
->accept(this);
2748 lod_info
= this->result
;
2750 ir
->offset
->accept(this);
2751 offset
= this->result
;
2755 opcode
= TGSI_OPCODE_TXD
;
2756 ir
->lod_info
.grad
.dPdx
->accept(this);
2758 ir
->lod_info
.grad
.dPdy
->accept(this);
2761 ir
->offset
->accept(this);
2762 offset
= this->result
;
2766 opcode
= TGSI_OPCODE_TXQ
;
2767 ir
->lod_info
.lod
->accept(this);
2768 lod_info
= this->result
;
2771 opcode
= TGSI_OPCODE_TXF
;
2772 ir
->lod_info
.lod
->accept(this);
2773 lod_info
= this->result
;
2775 ir
->offset
->accept(this);
2776 offset
= this->result
;
2780 opcode
= TGSI_OPCODE_TXF
;
2781 ir
->lod_info
.sample_index
->accept(this);
2782 sample_index
= this->result
;
2785 opcode
= TGSI_OPCODE_TG4
;
2786 ir
->lod_info
.component
->accept(this);
2787 component
= this->result
;
2789 ir
->offset
->accept(this);
2790 /* this should have been lowered */
2791 assert(ir
->offset
->type
->base_type
!= GLSL_TYPE_ARRAY
);
2792 offset
= this->result
;
2796 opcode
= TGSI_OPCODE_LODQ
;
2798 case ir_query_levels
:
2799 assert(!"Unexpected ir_query_levels opcode");
2803 if (ir
->projector
) {
2804 if (opcode
== TGSI_OPCODE_TEX
) {
2805 /* Slot the projector in as the last component of the coord. */
2806 coord_dst
.writemask
= WRITEMASK_W
;
2807 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2808 coord_dst
.writemask
= WRITEMASK_XYZW
;
2809 opcode
= TGSI_OPCODE_TXP
;
2811 st_src_reg coord_w
= coord
;
2812 coord_w
.swizzle
= SWIZZLE_WWWW
;
2814 /* For the other TEX opcodes there's no projective version
2815 * since the last slot is taken up by LOD info. Do the
2816 * projective divide now.
2818 coord_dst
.writemask
= WRITEMASK_W
;
2819 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2821 /* In the case where we have to project the coordinates "by hand,"
2822 * the shadow comparator value must also be projected.
2824 st_src_reg tmp_src
= coord
;
2825 if (ir
->shadow_comparitor
) {
2826 /* Slot the shadow value in as the second to last component of the
2829 ir
->shadow_comparitor
->accept(this);
2831 tmp_src
= get_temp(glsl_type::vec4_type
);
2832 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2834 /* Projective division not allowed for array samplers. */
2835 assert(!sampler_type
->sampler_array
);
2837 tmp_dst
.writemask
= WRITEMASK_Z
;
2838 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2840 tmp_dst
.writemask
= WRITEMASK_XY
;
2841 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2844 coord_dst
.writemask
= WRITEMASK_XYZ
;
2845 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2847 coord_dst
.writemask
= WRITEMASK_XYZW
;
2848 coord
.swizzle
= SWIZZLE_XYZW
;
2852 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2853 * comparator was put in the correct place (and projected) by the code,
2854 * above, that handles by-hand projection.
2856 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2857 /* Slot the shadow value in as the second to last component of the
2860 ir
->shadow_comparitor
->accept(this);
2862 if (is_cube_array
) {
2863 cube_sc
= get_temp(glsl_type::float_type
);
2864 cube_sc_dst
= st_dst_reg(cube_sc
);
2865 cube_sc_dst
.writemask
= WRITEMASK_X
;
2866 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2867 cube_sc_dst
.writemask
= WRITEMASK_X
;
2870 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2871 sampler_type
->sampler_array
) ||
2872 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2873 coord_dst
.writemask
= WRITEMASK_W
;
2875 coord_dst
.writemask
= WRITEMASK_Z
;
2878 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2879 coord_dst
.writemask
= WRITEMASK_XYZW
;
2883 if (ir
->op
== ir_txf_ms
) {
2884 coord_dst
.writemask
= WRITEMASK_W
;
2885 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2886 coord_dst
.writemask
= WRITEMASK_XYZW
;
2887 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2888 opcode
== TGSI_OPCODE_TXF
) {
2889 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2890 coord_dst
.writemask
= WRITEMASK_W
;
2891 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2892 coord_dst
.writemask
= WRITEMASK_XYZW
;
2895 if (opcode
== TGSI_OPCODE_TXD
)
2896 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2897 else if (opcode
== TGSI_OPCODE_TXQ
)
2898 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2899 else if (opcode
== TGSI_OPCODE_TXF
) {
2900 inst
= emit(ir
, opcode
, result_dst
, coord
);
2901 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2902 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2903 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2904 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2905 } else if (opcode
== TGSI_OPCODE_TG4
) {
2906 if (is_cube_array
&& ir
->shadow_comparitor
) {
2907 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2909 inst
= emit(ir
, opcode
, result_dst
, coord
, component
);
2912 inst
= emit(ir
, opcode
, result_dst
, coord
);
2914 if (ir
->shadow_comparitor
)
2915 inst
->tex_shadow
= GL_TRUE
;
2917 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2918 this->shader_program
,
2922 inst
->tex_offset_num_offset
= 1;
2923 inst
->tex_offsets
[0] = offset
;
2926 switch (sampler_type
->sampler_dimensionality
) {
2927 case GLSL_SAMPLER_DIM_1D
:
2928 inst
->tex_target
= (sampler_type
->sampler_array
)
2929 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2931 case GLSL_SAMPLER_DIM_2D
:
2932 inst
->tex_target
= (sampler_type
->sampler_array
)
2933 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2935 case GLSL_SAMPLER_DIM_3D
:
2936 inst
->tex_target
= TEXTURE_3D_INDEX
;
2938 case GLSL_SAMPLER_DIM_CUBE
:
2939 inst
->tex_target
= (sampler_type
->sampler_array
)
2940 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2942 case GLSL_SAMPLER_DIM_RECT
:
2943 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2945 case GLSL_SAMPLER_DIM_BUF
:
2946 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2948 case GLSL_SAMPLER_DIM_EXTERNAL
:
2949 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2951 case GLSL_SAMPLER_DIM_MS
:
2952 inst
->tex_target
= (sampler_type
->sampler_array
)
2953 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2956 assert(!"Should not get here.");
2959 this->result
= result_src
;
2963 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2965 if (ir
->get_value()) {
2969 assert(current_function
);
2971 ir
->get_value()->accept(this);
2972 st_src_reg r
= this->result
;
2974 l
= st_dst_reg(current_function
->return_reg
);
2976 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2977 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2983 emit(ir
, TGSI_OPCODE_RET
);
2987 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2989 if (ir
->condition
) {
2990 ir
->condition
->accept(this);
2991 this->result
.negate
= ~this->result
.negate
;
2992 emit(ir
, TGSI_OPCODE_KILL_IF
, undef_dst
, this->result
);
2994 /* unconditional kil */
2995 emit(ir
, TGSI_OPCODE_KILL
);
3000 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
3003 glsl_to_tgsi_instruction
*if_inst
;
3005 ir
->condition
->accept(this);
3006 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
3008 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
3010 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
3012 this->instructions
.push_tail(if_inst
);
3014 visit_exec_list(&ir
->then_instructions
, this);
3016 if (!ir
->else_instructions
.is_empty()) {
3017 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3018 visit_exec_list(&ir
->else_instructions
, this);
3021 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3026 glsl_to_tgsi_visitor::visit(ir_emit_vertex
*ir
)
3028 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3029 emit(ir
, TGSI_OPCODE_EMIT
);
3033 glsl_to_tgsi_visitor::visit(ir_end_primitive
*ir
)
3035 assert(this->prog
->Target
== GL_GEOMETRY_PROGRAM_NV
);
3036 emit(ir
, TGSI_OPCODE_ENDPRIM
);
3039 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3041 result
.file
= PROGRAM_UNDEFINED
;
3044 next_signature_id
= 1;
3046 current_function
= NULL
;
3047 num_address_regs
= 0;
3049 indirect_addr_consts
= false;
3051 native_integers
= false;
3052 mem_ctx
= ralloc_context(NULL
);
3055 shader_program
= NULL
;
3059 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3061 ralloc_free(mem_ctx
);
3064 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3071 * Count resources used by the given gpu program (number of texture
3075 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3077 v
->samplers_used
= 0;
3079 foreach_list(node
, &v
->instructions
) {
3080 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3082 if (is_tex_instruction(inst
->op
)) {
3083 v
->samplers_used
|= 1 << inst
->sampler
;
3085 if (inst
->tex_shadow
) {
3086 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3091 prog
->SamplersUsed
= v
->samplers_used
;
3093 if (v
->shader_program
!= NULL
)
3094 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3098 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3099 struct gl_shader_program
*shader_program
,
3100 const char *name
, const glsl_type
*type
,
3103 if (type
->is_record()) {
3104 ir_constant
*field_constant
;
3106 field_constant
= (ir_constant
*)val
->components
.get_head();
3108 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3109 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3110 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3111 type
->fields
.structure
[i
].name
);
3112 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3113 field_type
, field_constant
);
3114 field_constant
= (ir_constant
*)field_constant
->next
;
3120 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3122 if (offset
== GL_INVALID_INDEX
) {
3123 fail_link(shader_program
,
3124 "Couldn't find uniform for initializer %s\n", name
);
3127 int loc
= _mesa_uniform_merge_location_offset(shader_program
, index
, offset
);
3129 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3130 ir_constant
*element
;
3131 const glsl_type
*element_type
;
3132 if (type
->is_array()) {
3133 element
= val
->array_elements
[i
];
3134 element_type
= type
->fields
.array
;
3137 element_type
= type
;
3142 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3143 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3144 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3145 conv
[j
] = element
->value
.b
[j
];
3147 values
= (void *)conv
;
3148 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3149 element_type
->vector_elements
,
3152 values
= &element
->value
;
3155 if (element_type
->is_matrix()) {
3156 _mesa_uniform_matrix(ctx
, shader_program
,
3157 element_type
->matrix_columns
,
3158 element_type
->vector_elements
,
3159 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3161 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3162 values
, element_type
->gl_type
);
3170 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3171 * are read from the given src in this instruction
3174 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3176 int read_mask
= 0, comp
;
3178 /* Now, given the src swizzle and the written channels, find which
3179 * components are actually read
3181 for (comp
= 0; comp
< 4; ++comp
) {
3182 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3184 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3185 read_mask
|= 1 << coord
;
3192 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3193 * instruction is the first instruction to write to register T0. There are
3194 * several lowering passes done in GLSL IR (e.g. branches and
3195 * relative addressing) that create a large number of conditional assignments
3196 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3198 * Here is why this conversion is safe:
3199 * CMP T0, T1 T2 T0 can be expanded to:
3205 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3206 * as the original program. If (T1 < 0.0) evaluates to false, executing
3207 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3208 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3209 * because any instruction that was going to read from T0 after this was going
3210 * to read a garbage value anyway.
3213 glsl_to_tgsi_visitor::simplify_cmp(void)
3215 unsigned *tempWrites
;
3216 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3218 tempWrites
= new unsigned[MAX_TEMPS
];
3222 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3223 memset(outputWrites
, 0, sizeof(outputWrites
));
3225 foreach_list(node
, &this->instructions
) {
3226 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3227 unsigned prevWriteMask
= 0;
3229 /* Give up if we encounter relative addressing or flow control. */
3230 if (inst
->dst
.reladdr
||
3231 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3232 inst
->op
== TGSI_OPCODE_BGNSUB
||
3233 inst
->op
== TGSI_OPCODE_CONT
||
3234 inst
->op
== TGSI_OPCODE_END
||
3235 inst
->op
== TGSI_OPCODE_ENDSUB
||
3236 inst
->op
== TGSI_OPCODE_RET
) {
3240 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3241 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3242 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3243 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3244 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3245 assert(inst
->dst
.index
< MAX_TEMPS
);
3246 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3247 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3251 /* For a CMP to be considered a conditional write, the destination
3252 * register and source register two must be the same. */
3253 if (inst
->op
== TGSI_OPCODE_CMP
3254 && !(inst
->dst
.writemask
& prevWriteMask
)
3255 && inst
->src
[2].file
== inst
->dst
.file
3256 && inst
->src
[2].index
== inst
->dst
.index
3257 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3259 inst
->op
= TGSI_OPCODE_MOV
;
3260 inst
->src
[0] = inst
->src
[1];
3264 delete [] tempWrites
;
3267 /* Replaces all references to a temporary register index with another index. */
3269 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3271 foreach_list(node
, &this->instructions
) {
3272 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3275 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3276 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3277 inst
->src
[j
].index
== index
) {
3278 inst
->src
[j
].index
= new_index
;
3282 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3283 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3284 inst
->tex_offsets
[j
].index
== index
) {
3285 inst
->tex_offsets
[j
].index
= new_index
;
3289 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3290 inst
->dst
.index
= new_index
;
3296 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3298 int depth
= 0; /* loop depth */
3299 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3302 foreach_list(node
, &this->instructions
) {
3303 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3305 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3306 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3307 inst
->src
[j
].index
== index
) {
3308 return (depth
== 0) ? i
: loop_start
;
3311 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3312 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3313 inst
->tex_offsets
[j
].index
== index
) {
3314 return (depth
== 0) ? i
: loop_start
;
3318 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3321 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3334 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3336 int depth
= 0; /* loop depth */
3337 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3340 foreach_list(node
, &this->instructions
) {
3341 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3343 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3344 return (depth
== 0) ? i
: loop_start
;
3347 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3350 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3363 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3365 int depth
= 0; /* loop depth */
3366 int last
= -1; /* index of last instruction that reads the temporary */
3369 foreach_list(node
, &this->instructions
) {
3370 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3372 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3373 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3374 inst
->src
[j
].index
== index
) {
3375 last
= (depth
== 0) ? i
: -2;
3378 for (j
=0; j
< inst
->tex_offset_num_offset
; j
++) {
3379 if (inst
->tex_offsets
[j
].file
== PROGRAM_TEMPORARY
&&
3380 inst
->tex_offsets
[j
].index
== index
)
3381 last
= (depth
== 0) ? i
: -2;
3384 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3386 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3387 if (--depth
== 0 && last
== -2)
3399 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3401 int depth
= 0; /* loop depth */
3402 int last
= -1; /* index of last instruction that writes to the temporary */
3405 foreach_list(node
, &this->instructions
) {
3406 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3408 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3409 last
= (depth
== 0) ? i
: -2;
3411 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3413 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3414 if (--depth
== 0 && last
== -2)
3426 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3427 * channels for copy propagation and updates following instructions to
3428 * use the original versions.
3430 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3431 * will occur. As an example, a TXP production before this pass:
3433 * 0: MOV TEMP[1], INPUT[4].xyyy;
3434 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3435 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3439 * 0: MOV TEMP[1], INPUT[4].xyyy;
3440 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3441 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3443 * which allows for dead code elimination on TEMP[1]'s writes.
3446 glsl_to_tgsi_visitor::copy_propagate(void)
3448 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3449 glsl_to_tgsi_instruction
*,
3450 this->next_temp
* 4);
3451 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3454 foreach_list(node
, &this->instructions
) {
3455 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3457 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3458 || inst
->dst
.index
< this->next_temp
);
3460 /* First, do any copy propagation possible into the src regs. */
3461 for (int r
= 0; r
< 3; r
++) {
3462 glsl_to_tgsi_instruction
*first
= NULL
;
3464 int acp_base
= inst
->src
[r
].index
* 4;
3466 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3467 inst
->src
[r
].reladdr
||
3468 inst
->src
[r
].reladdr2
)
3471 /* See if we can find entries in the ACP consisting of MOVs
3472 * from the same src register for all the swizzled channels
3473 * of this src register reference.
3475 for (int i
= 0; i
< 4; i
++) {
3476 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3477 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3484 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3489 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3490 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3498 /* We've now validated that we can copy-propagate to
3499 * replace this src register reference. Do it.
3501 inst
->src
[r
].file
= first
->src
[0].file
;
3502 inst
->src
[r
].index
= first
->src
[0].index
;
3503 inst
->src
[r
].index2D
= first
->src
[0].index2D
;
3504 inst
->src
[r
].has_index2
= first
->src
[0].has_index2
;
3507 for (int i
= 0; i
< 4; i
++) {
3508 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3509 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3510 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3513 inst
->src
[r
].swizzle
= swizzle
;
3518 case TGSI_OPCODE_BGNLOOP
:
3519 case TGSI_OPCODE_ENDLOOP
:
3520 /* End of a basic block, clear the ACP entirely. */
3521 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3524 case TGSI_OPCODE_IF
:
3525 case TGSI_OPCODE_UIF
:
3529 case TGSI_OPCODE_ENDIF
:
3530 case TGSI_OPCODE_ELSE
:
3531 /* Clear all channels written inside the block from the ACP, but
3532 * leaving those that were not touched.
3534 for (int r
= 0; r
< this->next_temp
; r
++) {
3535 for (int c
= 0; c
< 4; c
++) {
3536 if (!acp
[4 * r
+ c
])
3539 if (acp_level
[4 * r
+ c
] >= level
)
3540 acp
[4 * r
+ c
] = NULL
;
3543 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3548 /* Continuing the block, clear any written channels from
3551 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3552 /* Any temporary might be written, so no copy propagation
3553 * across this instruction.
3555 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3556 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3557 inst
->dst
.reladdr
) {
3558 /* Any output might be written, so no copy propagation
3559 * from outputs across this instruction.
3561 for (int r
= 0; r
< this->next_temp
; r
++) {
3562 for (int c
= 0; c
< 4; c
++) {
3563 if (!acp
[4 * r
+ c
])
3566 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3567 acp
[4 * r
+ c
] = NULL
;
3570 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3571 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3572 /* Clear where it's used as dst. */
3573 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3574 for (int c
= 0; c
< 4; c
++) {
3575 if (inst
->dst
.writemask
& (1 << c
)) {
3576 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3581 /* Clear where it's used as src. */
3582 for (int r
= 0; r
< this->next_temp
; r
++) {
3583 for (int c
= 0; c
< 4; c
++) {
3584 if (!acp
[4 * r
+ c
])
3587 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3589 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3590 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3591 inst
->dst
.writemask
& (1 << src_chan
))
3593 acp
[4 * r
+ c
] = NULL
;
3601 /* If this is a copy, add it to the ACP. */
3602 if (inst
->op
== TGSI_OPCODE_MOV
&&
3603 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3604 !(inst
->dst
.file
== inst
->src
[0].file
&&
3605 inst
->dst
.index
== inst
->src
[0].index
) &&
3606 !inst
->dst
.reladdr
&&
3608 !inst
->src
[0].reladdr
&&
3609 !inst
->src
[0].reladdr2
&&
3610 !inst
->src
[0].negate
) {
3611 for (int i
= 0; i
< 4; i
++) {
3612 if (inst
->dst
.writemask
& (1 << i
)) {
3613 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3614 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3620 ralloc_free(acp_level
);
3625 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3627 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3628 * will occur. As an example, a TXP production after copy propagation but
3631 * 0: MOV TEMP[1], INPUT[4].xyyy;
3632 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3633 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3635 * and after this pass:
3637 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3639 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3640 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3643 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3647 for (i
=0; i
< this->next_temp
; i
++) {
3648 int last_read
= get_last_temp_read(i
);
3651 foreach_list_safe(node
, &this->instructions
) {
3652 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3654 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3667 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3668 * code elimination. This is less primitive than eliminate_dead_code(), as it
3669 * is per-channel and can detect consecutive writes without a read between them
3670 * as dead code. However, there is some dead code that can be eliminated by
3671 * eliminate_dead_code() but not this function - for example, this function
3672 * cannot eliminate an instruction writing to a register that is never read and
3673 * is the only instruction writing to that register.
3675 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3679 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3681 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3682 glsl_to_tgsi_instruction
*,
3683 this->next_temp
* 4);
3684 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3688 foreach_list(node
, &this->instructions
) {
3689 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3691 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3692 || inst
->dst
.index
< this->next_temp
);
3695 case TGSI_OPCODE_BGNLOOP
:
3696 case TGSI_OPCODE_ENDLOOP
:
3697 case TGSI_OPCODE_CONT
:
3698 case TGSI_OPCODE_BRK
:
3699 /* End of a basic block, clear the write array entirely.
3701 * This keeps us from killing dead code when the writes are
3702 * on either side of a loop, even when the register isn't touched
3703 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3704 * dead code of this type, so it shouldn't make a difference as long as
3705 * the dead code elimination pass in the GLSL compiler does its job.
3707 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3710 case TGSI_OPCODE_ENDIF
:
3711 case TGSI_OPCODE_ELSE
:
3712 /* Promote the recorded level of all channels written inside the
3713 * preceding if or else block to the level above the if/else block.
3715 for (int r
= 0; r
< this->next_temp
; r
++) {
3716 for (int c
= 0; c
< 4; c
++) {
3717 if (!writes
[4 * r
+ c
])
3720 if (write_level
[4 * r
+ c
] == level
)
3721 write_level
[4 * r
+ c
] = level
-1;
3725 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3730 case TGSI_OPCODE_IF
:
3731 case TGSI_OPCODE_UIF
:
3733 /* fallthrough to default case to mark the condition as read */
3736 /* Continuing the block, clear any channels from the write array that
3737 * are read by this instruction.
3739 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3740 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3741 /* Any temporary might be read, so no dead code elimination
3742 * across this instruction.
3744 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3745 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3746 /* Clear where it's used as src. */
3747 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3748 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3749 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3750 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3752 for (int c
= 0; c
< 4; c
++) {
3753 if (src_chans
& (1 << c
)) {
3754 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3759 for (unsigned i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
3760 if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
&& inst
->tex_offsets
[i
].reladdr
){
3761 /* Any temporary might be read, so no dead code elimination
3762 * across this instruction.
3764 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3765 } else if (inst
->tex_offsets
[i
].file
== PROGRAM_TEMPORARY
) {
3766 /* Clear where it's used as src. */
3767 int src_chans
= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 0);
3768 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 1);
3769 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 2);
3770 src_chans
|= 1 << GET_SWZ(inst
->tex_offsets
[i
].swizzle
, 3);
3772 for (int c
= 0; c
< 4; c
++) {
3773 if (src_chans
& (1 << c
)) {
3774 writes
[4 * inst
->tex_offsets
[i
].index
+ c
] = NULL
;
3782 /* If this instruction writes to a temporary, add it to the write array.
3783 * If there is already an instruction in the write array for one or more
3784 * of the channels, flag that channel write as dead.
3786 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3787 !inst
->dst
.reladdr
&&
3789 for (int c
= 0; c
< 4; c
++) {
3790 if (inst
->dst
.writemask
& (1 << c
)) {
3791 if (writes
[4 * inst
->dst
.index
+ c
]) {
3792 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3795 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3797 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3798 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3804 /* Anything still in the write array at this point is dead code. */
3805 for (int r
= 0; r
< this->next_temp
; r
++) {
3806 for (int c
= 0; c
< 4; c
++) {
3807 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3809 inst
->dead_mask
|= (1 << c
);
3813 /* Now actually remove the instructions that are completely dead and update
3814 * the writemask of other instructions with dead channels.
3816 foreach_list_safe(node
, &this->instructions
) {
3817 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
3819 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3821 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3826 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3829 ralloc_free(write_level
);
3830 ralloc_free(writes
);
3835 /* Merges temporary registers together where possible to reduce the number of
3836 * registers needed to run a program.
3838 * Produces optimal code only after copy propagation and dead code elimination
3841 glsl_to_tgsi_visitor::merge_registers(void)
3843 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3844 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3847 /* Read the indices of the last read and first write to each temp register
3848 * into an array so that we don't have to traverse the instruction list as
3850 for (i
=0; i
< this->next_temp
; i
++) {
3851 last_reads
[i
] = get_last_temp_read(i
);
3852 first_writes
[i
] = get_first_temp_write(i
);
3855 /* Start looking for registers with non-overlapping usages that can be
3856 * merged together. */
3857 for (i
=0; i
< this->next_temp
; i
++) {
3858 /* Don't touch unused registers. */
3859 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3861 for (j
=0; j
< this->next_temp
; j
++) {
3862 /* Don't touch unused registers. */
3863 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3865 /* We can merge the two registers if the first write to j is after or
3866 * in the same instruction as the last read from i. Note that the
3867 * register at index i will always be used earlier or at the same time
3868 * as the register at index j. */
3869 if (first_writes
[i
] <= first_writes
[j
] &&
3870 last_reads
[i
] <= first_writes
[j
])
3872 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3874 /* Update the first_writes and last_reads arrays with the new
3875 * values for the merged register index, and mark the newly unused
3876 * register index as such. */
3877 last_reads
[i
] = last_reads
[j
];
3878 first_writes
[j
] = -1;
3884 ralloc_free(last_reads
);
3885 ralloc_free(first_writes
);
3888 /* Reassign indices to temporary registers by reusing unused indices created
3889 * by optimization passes. */
3891 glsl_to_tgsi_visitor::renumber_registers(void)
3896 for (i
=0; i
< this->next_temp
; i
++) {
3897 if (get_first_temp_read(i
) < 0) continue;
3899 rename_temp_register(i
, new_index
);
3903 this->next_temp
= new_index
;
3907 * Returns a fragment program which implements the current pixel transfer ops.
3908 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3911 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3912 glsl_to_tgsi_visitor
*original
,
3913 int scale_and_bias
, int pixel_maps
)
3915 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3916 struct st_context
*st
= st_context(original
->ctx
);
3917 struct gl_program
*prog
= &fp
->Base
.Base
;
3918 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3919 st_src_reg coord
, src0
;
3921 glsl_to_tgsi_instruction
*inst
;
3923 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3924 v
->ctx
= original
->ctx
;
3926 v
->shader_program
= NULL
;
3927 v
->glsl_version
= original
->glsl_version
;
3928 v
->native_integers
= original
->native_integers
;
3929 v
->options
= original
->options
;
3930 v
->next_temp
= original
->next_temp
;
3931 v
->num_address_regs
= original
->num_address_regs
;
3932 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3933 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3934 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3935 v
->num_immediates
= original
->num_immediates
;
3938 * Get initial pixel color from the texture.
3939 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3941 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3942 src0
= v
->get_temp(glsl_type::vec4_type
);
3943 dst0
= st_dst_reg(src0
);
3944 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3946 inst
->tex_target
= TEXTURE_2D_INDEX
;
3948 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3949 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3950 v
->samplers_used
|= (1 << 0);
3952 if (scale_and_bias
) {
3953 static const gl_state_index scale_state
[STATE_LENGTH
] =
3954 { STATE_INTERNAL
, STATE_PT_SCALE
,
3955 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3956 static const gl_state_index bias_state
[STATE_LENGTH
] =
3957 { STATE_INTERNAL
, STATE_PT_BIAS
,
3958 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3959 GLint scale_p
, bias_p
;
3960 st_src_reg scale
, bias
;
3962 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3963 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3965 /* MAD colorTemp, colorTemp, scale, bias; */
3966 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3967 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3968 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3972 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3973 st_dst_reg temp_dst
= st_dst_reg(temp
);
3975 assert(st
->pixel_xfer
.pixelmap_texture
);
3977 /* With a little effort, we can do four pixel map look-ups with
3978 * two TEX instructions:
3981 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3982 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3983 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3985 inst
->tex_target
= TEXTURE_2D_INDEX
;
3987 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3988 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3989 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3990 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3992 inst
->tex_target
= TEXTURE_2D_INDEX
;
3994 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3995 v
->samplers_used
|= (1 << 1);
3997 /* MOV colorTemp, temp; */
3998 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
4001 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4003 foreach_list(node
, &original
->instructions
) {
4004 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4005 glsl_to_tgsi_instruction
*newinst
;
4006 st_src_reg src_regs
[3];
4008 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4009 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4011 for (int i
=0; i
<3; i
++) {
4012 src_regs
[i
] = inst
->src
[i
];
4013 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
4014 src_regs
[i
].index
== VARYING_SLOT_COL0
)
4016 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
4017 src_regs
[i
].index
= src0
.index
;
4019 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
4020 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4023 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4024 newinst
->tex_target
= inst
->tex_target
;
4027 /* Make modifications to fragment program info. */
4028 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
4029 original
->prog
->Parameters
);
4030 _mesa_free_parameter_list(params
);
4031 count_resources(v
, prog
);
4032 fp
->glsl_to_tgsi
= v
;
4036 * Make fragment program for glBitmap:
4037 * Sample the texture and kill the fragment if the bit is 0.
4038 * This program will be combined with the user's fragment program.
4040 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4043 get_bitmap_visitor(struct st_fragment_program
*fp
,
4044 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
4046 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
4047 struct st_context
*st
= st_context(original
->ctx
);
4048 struct gl_program
*prog
= &fp
->Base
.Base
;
4049 st_src_reg coord
, src0
;
4051 glsl_to_tgsi_instruction
*inst
;
4053 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4054 v
->ctx
= original
->ctx
;
4056 v
->shader_program
= NULL
;
4057 v
->glsl_version
= original
->glsl_version
;
4058 v
->native_integers
= original
->native_integers
;
4059 v
->options
= original
->options
;
4060 v
->next_temp
= original
->next_temp
;
4061 v
->num_address_regs
= original
->num_address_regs
;
4062 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
4063 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
4064 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
4065 v
->num_immediates
= original
->num_immediates
;
4067 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4068 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
4069 src0
= v
->get_temp(glsl_type::vec4_type
);
4070 dst0
= st_dst_reg(src0
);
4071 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4072 inst
->sampler
= samplerIndex
;
4073 inst
->tex_target
= TEXTURE_2D_INDEX
;
4075 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4076 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4077 v
->samplers_used
|= (1 << samplerIndex
);
4079 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4080 src0
.negate
= NEGATE_XYZW
;
4081 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4082 src0
.swizzle
= SWIZZLE_XXXX
;
4083 inst
= v
->emit(NULL
, TGSI_OPCODE_KILL_IF
, undef_dst
, src0
);
4085 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4087 foreach_list(node
, &original
->instructions
) {
4088 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*) node
;
4089 glsl_to_tgsi_instruction
*newinst
;
4090 st_src_reg src_regs
[3];
4092 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4093 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4095 for (int i
=0; i
<3; i
++) {
4096 src_regs
[i
] = inst
->src
[i
];
4097 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4098 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4101 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4102 newinst
->tex_target
= inst
->tex_target
;
4105 /* Make modifications to fragment program info. */
4106 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4107 count_resources(v
, prog
);
4108 fp
->glsl_to_tgsi
= v
;
4111 /* ------------------------- TGSI conversion stuff -------------------------- */
4113 unsigned branch_target
;
4118 * Intermediate state used during shader translation.
4120 struct st_translate
{
4121 struct ureg_program
*ureg
;
4123 struct ureg_dst temps
[MAX_TEMPS
];
4124 struct ureg_dst arrays
[MAX_ARRAYS
];
4125 struct ureg_src
*constants
;
4126 struct ureg_src
*immediates
;
4127 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4128 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4129 struct ureg_dst address
[2];
4130 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4131 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4132 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
4133 unsigned array_sizes
[MAX_ARRAYS
];
4135 const GLuint
*inputMapping
;
4136 const GLuint
*outputMapping
;
4138 /* For every instruction that contains a label (eg CALL), keep
4139 * details so that we can go back afterwards and emit the correct
4140 * tgsi instruction number for each label.
4142 struct label
*labels
;
4143 unsigned labels_size
;
4144 unsigned labels_count
;
4146 /* Keep a record of the tgsi instruction number that each mesa
4147 * instruction starts at, will be used to fix up labels after
4152 unsigned insn_count
;
4154 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4159 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4160 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4162 TGSI_SEMANTIC_VERTEXID
,
4163 TGSI_SEMANTIC_INSTANCEID
4167 * Make note of a branch to a label in the TGSI code.
4168 * After we've emitted all instructions, we'll go over the list
4169 * of labels built here and patch the TGSI code with the actual
4170 * location of each label.
4172 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4176 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4177 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4178 t
->labels
= (struct label
*)realloc(t
->labels
,
4179 t
->labels_size
* sizeof(struct label
));
4180 if (t
->labels
== NULL
) {
4181 static unsigned dummy
;
4187 i
= t
->labels_count
++;
4188 t
->labels
[i
].branch_target
= branch_target
;
4189 return &t
->labels
[i
].token
;
4193 * Called prior to emitting the TGSI code for each instruction.
4194 * Allocate additional space for instructions if needed.
4195 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4196 * the next TGSI instruction.
4198 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4200 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4201 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4202 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4203 if (t
->insn
== NULL
) {
4209 t
->insn
[t
->insn_count
++] = start
;
4213 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4215 static struct ureg_src
4216 emit_immediate(struct st_translate
*t
,
4217 gl_constant_value values
[4],
4220 struct ureg_program
*ureg
= t
->ureg
;
4225 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4227 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4228 case GL_UNSIGNED_INT
:
4230 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4232 assert(!"should not get here - type must be float, int, uint, or bool");
4233 return ureg_src_undef();
4238 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4240 static struct ureg_dst
4241 dst_register(struct st_translate
*t
,
4242 gl_register_file file
,
4248 case PROGRAM_UNDEFINED
:
4249 return ureg_dst_undef();
4251 case PROGRAM_TEMPORARY
:
4253 assert(index
< (int) Elements(t
->temps
));
4255 if (ureg_dst_is_undef(t
->temps
[index
]))
4256 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4258 return t
->temps
[index
];
4261 array
= index
>> 16;
4264 assert(array
< (int) Elements(t
->arrays
));
4266 if (ureg_dst_is_undef(t
->arrays
[array
]))
4267 t
->arrays
[array
] = ureg_DECL_array_temporary(
4268 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4270 return ureg_dst_array_offset(t
->arrays
[array
],
4271 (int)(index
& 0xFFFF) - 0x8000);
4273 case PROGRAM_OUTPUT
:
4274 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4275 assert(index
< VARYING_SLOT_MAX
);
4276 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4277 assert(index
< FRAG_RESULT_MAX
);
4279 assert(index
< VARYING_SLOT_MAX
);
4281 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4283 return t
->outputs
[t
->outputMapping
[index
]];
4285 case PROGRAM_ADDRESS
:
4286 return t
->address
[index
];
4289 assert(!"unknown dst register file");
4290 return ureg_dst_undef();
4295 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4297 static struct ureg_src
4298 src_register(struct st_translate
*t
,
4299 gl_register_file file
,
4300 GLint index
, GLint index2D
)
4303 case PROGRAM_UNDEFINED
:
4304 return ureg_src_undef();
4306 case PROGRAM_TEMPORARY
:
4308 return ureg_src(dst_register(t
, file
, index
));
4310 case PROGRAM_UNIFORM
:
4312 return t
->constants
[index
];
4313 case PROGRAM_STATE_VAR
:
4314 case PROGRAM_CONSTANT
: /* ie, immediate */
4316 struct ureg_src src
;
4317 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4319 src
.DimensionIndex
= index2D
;
4321 } else if (index
< 0)
4322 return ureg_DECL_constant(t
->ureg
, 0);
4324 return t
->constants
[index
];
4326 case PROGRAM_IMMEDIATE
:
4327 return t
->immediates
[index
];
4330 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4331 return t
->inputs
[t
->inputMapping
[index
]];
4333 case PROGRAM_OUTPUT
:
4334 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4335 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4337 case PROGRAM_ADDRESS
:
4338 return ureg_src(t
->address
[index
]);
4340 case PROGRAM_SYSTEM_VALUE
:
4341 assert(index
< (int) Elements(t
->systemValues
));
4342 return t
->systemValues
[index
];
4345 assert(!"unknown src register file");
4346 return ureg_src_undef();
4351 * Create a TGSI ureg_dst register from an st_dst_reg.
4353 static struct ureg_dst
4354 translate_dst(struct st_translate
*t
,
4355 const st_dst_reg
*dst_reg
,
4356 bool saturate
, bool clamp_color
)
4358 struct ureg_dst dst
= dst_register(t
,
4362 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4365 dst
= ureg_saturate(dst
);
4366 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4367 /* Clamp colors for ARB_color_buffer_float. */
4368 switch (t
->procType
) {
4369 case TGSI_PROCESSOR_VERTEX
:
4370 /* XXX if the geometry shader is present, this must be done there
4371 * instead of here. */
4372 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4373 dst_reg
->index
== VARYING_SLOT_COL1
||
4374 dst_reg
->index
== VARYING_SLOT_BFC0
||
4375 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4376 dst
= ureg_saturate(dst
);
4380 case TGSI_PROCESSOR_FRAGMENT
:
4381 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4382 dst
= ureg_saturate(dst
);
4388 if (dst_reg
->reladdr
!= NULL
) {
4389 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4390 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4397 * Create a TGSI ureg_src register from an st_src_reg.
4399 static struct ureg_src
4400 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4402 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4404 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& src_reg
->has_index2
) {
4405 src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4406 if (src_reg
->reladdr2
)
4407 src
= ureg_src_dimension_indirect(src
, ureg_src(t
->address
[1]),
4410 src
= ureg_src_dimension(src
, src_reg
->index2D
);
4413 src
= ureg_swizzle(src
,
4414 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4415 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4416 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4417 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4419 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4420 src
= ureg_negate(src
);
4422 if (src_reg
->reladdr
!= NULL
) {
4423 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4424 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4430 static struct tgsi_texture_offset
4431 translate_tex_offset(struct st_translate
*t
,
4432 const st_src_reg
*in_offset
, int idx
)
4434 struct tgsi_texture_offset offset
;
4435 struct ureg_src imm_src
;
4437 switch (in_offset
->file
) {
4438 case PROGRAM_IMMEDIATE
:
4439 imm_src
= t
->immediates
[in_offset
->index
];
4441 offset
.File
= imm_src
.File
;
4442 offset
.Index
= imm_src
.Index
;
4443 offset
.SwizzleX
= imm_src
.SwizzleX
;
4444 offset
.SwizzleY
= imm_src
.SwizzleY
;
4445 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4448 case PROGRAM_TEMPORARY
:
4449 imm_src
= ureg_src(t
->temps
[in_offset
->index
]);
4450 offset
.File
= imm_src
.File
;
4451 offset
.Index
= imm_src
.Index
;
4452 offset
.SwizzleX
= GET_SWZ(in_offset
->swizzle
, 0);
4453 offset
.SwizzleY
= GET_SWZ(in_offset
->swizzle
, 1);
4454 offset
.SwizzleZ
= GET_SWZ(in_offset
->swizzle
, 2);
4464 compile_tgsi_instruction(struct st_translate
*t
,
4465 const glsl_to_tgsi_instruction
*inst
,
4466 bool clamp_dst_color_output
)
4468 struct ureg_program
*ureg
= t
->ureg
;
4470 struct ureg_dst dst
[1];
4471 struct ureg_src src
[4];
4472 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4476 unsigned tex_target
;
4478 num_dst
= num_inst_dst_regs(inst
->op
);
4479 num_src
= num_inst_src_regs(inst
->op
);
4482 dst
[0] = translate_dst(t
,
4485 clamp_dst_color_output
);
4487 for (i
= 0; i
< num_src
; i
++)
4488 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4491 case TGSI_OPCODE_BGNLOOP
:
4492 case TGSI_OPCODE_CAL
:
4493 case TGSI_OPCODE_ELSE
:
4494 case TGSI_OPCODE_ENDLOOP
:
4495 case TGSI_OPCODE_IF
:
4496 case TGSI_OPCODE_UIF
:
4497 assert(num_dst
== 0);
4498 ureg_label_insn(ureg
,
4502 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4505 case TGSI_OPCODE_TEX
:
4506 case TGSI_OPCODE_TXB
:
4507 case TGSI_OPCODE_TXD
:
4508 case TGSI_OPCODE_TXL
:
4509 case TGSI_OPCODE_TXP
:
4510 case TGSI_OPCODE_TXQ
:
4511 case TGSI_OPCODE_TXF
:
4512 case TGSI_OPCODE_TEX2
:
4513 case TGSI_OPCODE_TXB2
:
4514 case TGSI_OPCODE_TXL2
:
4515 case TGSI_OPCODE_TG4
:
4516 case TGSI_OPCODE_LODQ
:
4517 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4518 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4519 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
], i
);
4521 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4527 texoffsets
, inst
->tex_offset_num_offset
,
4531 case TGSI_OPCODE_SCS
:
4532 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4533 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4546 * Emit the TGSI instructions for inverting and adjusting WPOS.
4547 * This code is unavoidable because it also depends on whether
4548 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4551 emit_wpos_adjustment( struct st_translate
*t
,
4552 const struct gl_program
*program
,
4554 GLfloat adjX
, GLfloat adjY
[2])
4556 struct ureg_program
*ureg
= t
->ureg
;
4558 /* Fragment program uses fragment position input.
4559 * Need to replace instances of INPUT[WPOS] with temp T
4560 * where T = INPUT[WPOS] by y is inverted.
4562 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4563 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4564 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4566 /* XXX: note we are modifying the incoming shader here! Need to
4567 * do this before emitting the constant decls below, or this
4570 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4571 wposTransformState
);
4573 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4574 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4575 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4577 /* First, apply the coordinate shift: */
4578 if (adjX
|| adjY
[0] || adjY
[1]) {
4579 if (adjY
[0] != adjY
[1]) {
4580 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4581 * depending on whether inversion is actually going to be applied
4582 * or not, which is determined by testing against the inversion
4583 * state variable used below, which will be either +1 or -1.
4585 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4587 ureg_CMP(ureg
, adj_temp
,
4588 ureg_scalar(wpostrans
, invert
? 2 : 0),
4589 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4590 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4591 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4593 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4594 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4596 wpos_input
= ureg_src(wpos_temp
);
4598 /* MOV wpos_temp, input[wpos]
4600 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4603 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4604 * inversion/identity, or the other way around if we're drawing to an FBO.
4607 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4610 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4612 ureg_scalar(wpostrans
, 0),
4613 ureg_scalar(wpostrans
, 1));
4615 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4618 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4620 ureg_scalar(wpostrans
, 2),
4621 ureg_scalar(wpostrans
, 3));
4624 /* Use wpos_temp as position input from here on:
4626 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4631 * Emit fragment position/ooordinate code.
4634 emit_wpos(struct st_context
*st
,
4635 struct st_translate
*t
,
4636 const struct gl_program
*program
,
4637 struct ureg_program
*ureg
)
4639 const struct gl_fragment_program
*fp
=
4640 (const struct gl_fragment_program
*) program
;
4641 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4642 GLfloat adjX
= 0.0f
;
4643 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4644 boolean invert
= FALSE
;
4646 /* Query the pixel center conventions supported by the pipe driver and set
4647 * adjX, adjY to help out if it cannot handle the requested one internally.
4649 * The bias of the y-coordinate depends on whether y-inversion takes place
4650 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4651 * drawing to an FBO (causes additional inversion), and whether the the pipe
4652 * driver origin and the requested origin differ (the latter condition is
4653 * stored in the 'invert' variable).
4655 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4657 * center shift only:
4662 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4663 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4664 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4665 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4667 * inversion and center shift:
4668 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4669 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4670 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4671 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4673 if (fp
->OriginUpperLeft
) {
4674 /* Fragment shader wants origin in upper-left */
4675 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4676 /* the driver supports upper-left origin */
4678 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4679 /* the driver supports lower-left origin, need to invert Y */
4680 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4687 /* Fragment shader wants origin in lower-left */
4688 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4689 /* the driver supports lower-left origin */
4690 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4691 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4692 /* the driver supports upper-left origin, need to invert Y */
4698 if (fp
->PixelCenterInteger
) {
4699 /* Fragment shader wants pixel center integer */
4700 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4701 /* the driver supports pixel center integer */
4703 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4705 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4706 /* the driver supports pixel center half integer, need to bias X,Y */
4715 /* Fragment shader wants pixel center half integer */
4716 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4717 /* the driver supports pixel center half integer */
4719 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4720 /* the driver supports pixel center integer, need to bias X,Y */
4721 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4722 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4728 /* we invert after adjustment so that we avoid the MOV to temporary,
4729 * and reuse the adjustment ADD instead */
4730 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4734 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4735 * TGSI uses +1 for front, -1 for back.
4736 * This function converts the TGSI value to the GL value. Simply clamping/
4737 * saturating the value to [0,1] does the job.
4740 emit_face_var(struct st_translate
*t
)
4742 struct ureg_program
*ureg
= t
->ureg
;
4743 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4744 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4746 /* MOV_SAT face_temp, input[face] */
4747 face_temp
= ureg_saturate(face_temp
);
4748 ureg_MOV(ureg
, face_temp
, face_input
);
4750 /* Use face_temp as face input from here on: */
4751 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4755 emit_edgeflags(struct st_translate
*t
)
4757 struct ureg_program
*ureg
= t
->ureg
;
4758 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4759 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4761 ureg_MOV(ureg
, edge_dst
, edge_src
);
4765 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4766 * \param program the program to translate
4767 * \param numInputs number of input registers used
4768 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4770 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4771 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4773 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4774 * \param numOutputs number of output registers used
4775 * \param outputMapping maps Mesa fragment program outputs to TGSI
4777 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4778 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4781 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4783 extern "C" enum pipe_error
4784 st_translate_program(
4785 struct gl_context
*ctx
,
4787 struct ureg_program
*ureg
,
4788 glsl_to_tgsi_visitor
*program
,
4789 const struct gl_program
*proginfo
,
4791 const GLuint inputMapping
[],
4792 const ubyte inputSemanticName
[],
4793 const ubyte inputSemanticIndex
[],
4794 const GLuint interpMode
[],
4795 const GLboolean is_centroid
[],
4797 const GLuint outputMapping
[],
4798 const ubyte outputSemanticName
[],
4799 const ubyte outputSemanticIndex
[],
4800 boolean passthrough_edgeflags
,
4801 boolean clamp_color
)
4803 struct st_translate
*t
;
4805 enum pipe_error ret
= PIPE_OK
;
4807 assert(numInputs
<= Elements(t
->inputs
));
4808 assert(numOutputs
<= Elements(t
->outputs
));
4810 t
= CALLOC_STRUCT(st_translate
);
4812 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4816 memset(t
, 0, sizeof *t
);
4818 t
->procType
= procType
;
4819 t
->inputMapping
= inputMapping
;
4820 t
->outputMapping
= outputMapping
;
4823 if (program
->shader_program
) {
4824 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4825 struct gl_uniform_storage
*const storage
=
4826 &program
->shader_program
->UniformStorage
[i
];
4828 _mesa_uniform_detach_all_driver_storage(storage
);
4833 * Declare input attributes.
4835 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4836 for (i
= 0; i
< numInputs
; i
++) {
4837 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4838 inputSemanticName
[i
],
4839 inputSemanticIndex
[i
],
4844 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4845 /* Must do this after setting up t->inputs, and before
4846 * emitting constant references, below:
4848 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4851 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4855 * Declare output attributes.
4857 for (i
= 0; i
< numOutputs
; i
++) {
4858 switch (outputSemanticName
[i
]) {
4859 case TGSI_SEMANTIC_POSITION
:
4860 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4861 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4862 outputSemanticIndex
[i
]);
4863 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4865 case TGSI_SEMANTIC_STENCIL
:
4866 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4867 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4868 outputSemanticIndex
[i
]);
4869 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4871 case TGSI_SEMANTIC_COLOR
:
4872 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4873 TGSI_SEMANTIC_COLOR
,
4874 outputSemanticIndex
[i
]);
4877 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4878 ret
= PIPE_ERROR_BAD_INPUT
;
4883 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4884 for (i
= 0; i
< numInputs
; i
++) {
4885 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4887 inputSemanticName
[i
],
4888 inputSemanticIndex
[i
]);
4891 for (i
= 0; i
< numOutputs
; i
++) {
4892 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4893 outputSemanticName
[i
],
4894 outputSemanticIndex
[i
]);
4898 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4900 for (i
= 0; i
< numInputs
; i
++) {
4901 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4904 for (i
= 0; i
< numOutputs
; i
++) {
4905 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4906 outputSemanticName
[i
],
4907 outputSemanticIndex
[i
]);
4908 if (outputSemanticName
[i
] == TGSI_SEMANTIC_FOG
) {
4909 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4911 ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_YZW
),
4912 ureg_imm4f(ureg
, 0.0f
, 0.0f
, 0.0f
, 1.0f
));
4913 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_X
);
4916 if (passthrough_edgeflags
)
4920 /* Declare address register.
4922 if (program
->num_address_regs
> 0) {
4923 assert(program
->num_address_regs
<= 2);
4924 t
->address
[0] = ureg_DECL_address(ureg
);
4925 if (program
->num_address_regs
== 2)
4926 t
->address
[1] = ureg_DECL_address(ureg
);
4929 /* Declare misc input registers
4932 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4933 unsigned numSys
= 0;
4934 for (i
= 0; sysInputs
; i
++) {
4935 if (sysInputs
& (1 << i
)) {
4936 unsigned semName
= mesa_sysval_to_semantic
[i
];
4937 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4938 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4939 semName
== TGSI_SEMANTIC_VERTEXID
) {
4940 /* From Gallium perspective, these system values are always
4941 * integer, and require native integer support. However, if
4942 * native integer is supported on the vertex stage but not the
4943 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4944 * assumes these system values are floats. To resolve the
4945 * inconsistency, we insert a U2F.
4947 struct st_context
*st
= st_context(ctx
);
4948 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4949 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4950 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4951 if (!ctx
->Const
.NativeIntegers
) {
4952 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4953 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4954 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4958 sysInputs
&= ~(1 << i
);
4963 /* Copy over array sizes
4965 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4967 /* Emit constants and uniforms. TGSI uses a single index space for these,
4968 * so we put all the translated regs in t->constants.
4970 if (proginfo
->Parameters
) {
4971 t
->constants
= (struct ureg_src
*)
4972 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4973 if (t
->constants
== NULL
) {
4974 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4978 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4979 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4980 case PROGRAM_STATE_VAR
:
4981 case PROGRAM_UNIFORM
:
4982 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4985 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4986 * addressing of the const buffer.
4987 * FIXME: Be smarter and recognize param arrays:
4988 * indirect addressing is only valid within the referenced
4991 case PROGRAM_CONSTANT
:
4992 if (program
->indirect_addr_consts
)
4993 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4995 t
->constants
[i
] = emit_immediate(t
,
4996 proginfo
->Parameters
->ParameterValues
[i
],
4997 proginfo
->Parameters
->Parameters
[i
].DataType
,
5006 if (program
->shader_program
) {
5007 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
5009 for (i
= 0; i
< num_ubos
; i
++) {
5010 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
5014 /* Emit immediate values.
5016 t
->immediates
= (struct ureg_src
*)
5017 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
5018 if (t
->immediates
== NULL
) {
5019 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
5023 foreach_list(node
, &program
->immediates
) {
5024 immediate_storage
*imm
= (immediate_storage
*) node
;
5025 assert(i
< program
->num_immediates
);
5026 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
5028 assert(i
== program
->num_immediates
);
5030 /* texture samplers */
5031 for (i
= 0; i
< ctx
->Const
.Program
[MESA_SHADER_FRAGMENT
].MaxTextureImageUnits
; i
++) {
5032 if (program
->samplers_used
& (1 << i
)) {
5033 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
5037 /* Emit each instruction in turn:
5039 foreach_list(n
, &program
->instructions
) {
5040 set_insn_start(t
, ureg_get_instruction_number(ureg
));
5041 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*) n
, clamp_color
);
5044 /* Fix up all emitted labels:
5046 for (i
= 0; i
< t
->labels_count
; i
++) {
5047 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
5048 t
->insn
[t
->labels
[i
].branch_target
]);
5051 if (program
->shader_program
) {
5052 /* This has to be done last. Any operation the can cause
5053 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5054 * program constant) has to happen before creating this linkage.
5056 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5057 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
5060 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
5061 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
5070 free(t
->immediates
);
5073 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
5081 /* ----------------------------- End TGSI code ------------------------------ */
5085 shader_stage_to_ptarget(gl_shader_stage stage
)
5088 case MESA_SHADER_VERTEX
:
5089 return PIPE_SHADER_VERTEX
;
5090 case MESA_SHADER_FRAGMENT
:
5091 return PIPE_SHADER_FRAGMENT
;
5092 case MESA_SHADER_GEOMETRY
:
5093 return PIPE_SHADER_GEOMETRY
;
5094 case MESA_SHADER_COMPUTE
:
5095 return PIPE_SHADER_COMPUTE
;
5098 assert(!"should not be reached");
5099 return PIPE_SHADER_VERTEX
;
5104 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5105 * generating Mesa IR.
5107 static struct gl_program
*
5108 get_mesa_program(struct gl_context
*ctx
,
5109 struct gl_shader_program
*shader_program
,
5110 struct gl_shader
*shader
)
5112 glsl_to_tgsi_visitor
* v
;
5113 struct gl_program
*prog
;
5114 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
5116 struct gl_shader_compiler_options
*options
=
5117 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(shader
->Type
)];
5118 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5119 unsigned ptarget
= shader_stage_to_ptarget(shader
->Stage
);
5121 validate_ir_tree(shader
->ir
);
5123 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5126 prog
->Parameters
= _mesa_new_parameter_list();
5127 v
= new glsl_to_tgsi_visitor();
5130 v
->shader_program
= shader_program
;
5131 v
->options
= options
;
5132 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5133 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5135 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5136 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5138 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5141 /* Remove reads from output registers. */
5142 lower_output_reads(shader
->ir
);
5144 /* Emit intermediate IR for main(). */
5145 visit_exec_list(shader
->ir
, v
);
5147 /* Now emit bodies for any functions that were used. */
5149 progress
= GL_FALSE
;
5151 foreach_list(node
, &v
->function_signatures
) {
5152 function_entry
*entry
= (function_entry
*) node
;
5154 if (!entry
->bgn_inst
) {
5155 v
->current_function
= entry
;
5157 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5158 entry
->bgn_inst
->function
= entry
;
5160 visit_exec_list(&entry
->sig
->body
, v
);
5162 glsl_to_tgsi_instruction
*last
;
5163 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5164 if (last
->op
!= TGSI_OPCODE_RET
)
5165 v
->emit(NULL
, TGSI_OPCODE_RET
);
5167 glsl_to_tgsi_instruction
*end
;
5168 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5169 end
->function
= entry
;
5177 /* Print out some information (for debugging purposes) used by the
5178 * optimization passes. */
5179 for (i
=0; i
< v
->next_temp
; i
++) {
5180 int fr
= v
->get_first_temp_read(i
);
5181 int fw
= v
->get_first_temp_write(i
);
5182 int lr
= v
->get_last_temp_read(i
);
5183 int lw
= v
->get_last_temp_write(i
);
5185 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5190 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5192 v
->copy_propagate();
5193 while (v
->eliminate_dead_code_advanced());
5195 v
->eliminate_dead_code();
5196 v
->merge_registers();
5197 v
->renumber_registers();
5199 /* Write the END instruction. */
5200 v
->emit(NULL
, TGSI_OPCODE_END
);
5202 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
5204 printf("GLSL IR for linked %s program %d:\n",
5205 _mesa_shader_stage_to_string(shader
->Stage
),
5206 shader_program
->Name
);
5207 _mesa_print_ir(stdout
, shader
->ir
, NULL
);
5213 prog
->Instructions
= NULL
;
5214 prog
->NumInstructions
= 0;
5216 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
5217 count_resources(v
, prog
);
5219 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5221 /* This has to be done last. Any operation the can cause
5222 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5223 * program constant) has to happen before creating this linkage.
5225 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5226 if (!shader_program
->LinkStatus
) {
5230 struct st_vertex_program
*stvp
;
5231 struct st_fragment_program
*stfp
;
5232 struct st_geometry_program
*stgp
;
5234 switch (shader
->Type
) {
5235 case GL_VERTEX_SHADER
:
5236 stvp
= (struct st_vertex_program
*)prog
;
5237 stvp
->glsl_to_tgsi
= v
;
5239 case GL_FRAGMENT_SHADER
:
5240 stfp
= (struct st_fragment_program
*)prog
;
5241 stfp
->glsl_to_tgsi
= v
;
5243 case GL_GEOMETRY_SHADER
:
5244 stgp
= (struct st_geometry_program
*)prog
;
5245 stgp
->glsl_to_tgsi
= v
;
5246 stgp
->Base
.InputType
= shader_program
->Geom
.InputType
;
5247 stgp
->Base
.OutputType
= shader_program
->Geom
.OutputType
;
5248 stgp
->Base
.VerticesOut
= shader_program
->Geom
.VerticesOut
;
5249 stgp
->Base
.Invocations
= shader_program
->Geom
.Invocations
;
5252 assert(!"should not be reached");
5262 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5264 struct gl_shader
*shader
;
5265 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5266 type
== GL_GEOMETRY_SHADER_ARB
);
5267 shader
= rzalloc(NULL
, struct gl_shader
);
5269 shader
->Type
= type
;
5270 shader
->Stage
= _mesa_shader_enum_to_shader_stage(type
);
5271 shader
->Name
= name
;
5272 _mesa_init_shader(ctx
, shader
);
5277 struct gl_shader_program
*
5278 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5280 struct gl_shader_program
*shProg
;
5281 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5283 shProg
->Name
= name
;
5284 _mesa_init_shader_program(ctx
, shProg
);
5291 * Called via ctx->Driver.LinkShader()
5292 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5293 * with code lowering and other optimizations.
5296 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5298 assert(prog
->LinkStatus
);
5300 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5301 if (prog
->_LinkedShaders
[i
] == NULL
)
5305 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5306 const struct gl_shader_compiler_options
*options
=
5307 &ctx
->ShaderCompilerOptions
[_mesa_shader_enum_to_shader_stage(prog
->_LinkedShaders
[i
]->Type
)];
5309 /* If there are forms of indirect addressing that the driver
5310 * cannot handle, perform the lowering pass.
5312 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5313 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5314 lower_variable_index_to_cond_assign(ir
,
5315 options
->EmitNoIndirectInput
,
5316 options
->EmitNoIndirectOutput
,
5317 options
->EmitNoIndirectTemp
,
5318 options
->EmitNoIndirectUniform
);
5321 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5322 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5323 LOWER_UNPACK_SNORM_2x16
|
5324 LOWER_PACK_UNORM_2x16
|
5325 LOWER_UNPACK_UNORM_2x16
|
5326 LOWER_PACK_SNORM_4x8
|
5327 LOWER_UNPACK_SNORM_4x8
|
5328 LOWER_UNPACK_UNORM_4x8
|
5329 LOWER_PACK_UNORM_4x8
|
5330 LOWER_PACK_HALF_2x16
|
5331 LOWER_UNPACK_HALF_2x16
;
5333 lower_packing_builtins(ir
, lower_inst
);
5336 lower_offset_arrays(ir
);
5337 do_mat_op_to_vec(ir
);
5338 lower_instructions(ir
,
5343 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5344 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5346 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5347 do_vec_index_to_cond_assign(ir
);
5348 lower_vector_insert(ir
, true);
5349 lower_quadop_vector(ir
, false);
5351 if (options
->MaxIfDepth
== 0) {
5358 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5360 progress
= do_common_optimization(ir
, true, true, options
,
5361 ctx
->Const
.NativeIntegers
)
5364 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5368 validate_ir_tree(ir
);
5371 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
5372 struct gl_program
*linked_prog
;
5374 if (prog
->_LinkedShaders
[i
] == NULL
)
5377 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5380 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5382 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
5383 _mesa_shader_stage_to_program(i
),
5385 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5387 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5392 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5399 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5400 const GLuint outputMapping
[],
5401 struct pipe_stream_output_info
*so
)
5404 struct gl_transform_feedback_info
*info
=
5405 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5407 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5408 so
->output
[i
].register_index
=
5409 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5410 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5411 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5412 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5413 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5416 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5417 so
->stride
[i
] = info
->BufferStride
[i
];
5419 so
->num_outputs
= info
->NumOutputs
;