2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
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8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
28 * \file glsl_to_tgsi.cpp
30 * Translate GLSL IR to TGSI.
34 #include "main/compiler.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "program/hash_table.h"
50 #include "main/shaderapi.h"
51 #include "main/uniforms.h"
52 #include "program/prog_instruction.h"
53 #include "program/prog_optimize.h"
54 #include "program/prog_print.h"
55 #include "program/program.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_info.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
73 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
74 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
75 (1 << PROGRAM_ENV_PARAM) | \
76 (1 << PROGRAM_STATE_VAR) | \
77 (1 << PROGRAM_CONSTANT) | \
78 (1 << PROGRAM_UNIFORM))
81 * Maximum number of temporary registers.
83 * It is too big for stack allocated arrays -- it will cause stack overflow on
84 * Windows and likely Mac OS X.
86 #define MAX_TEMPS 4096
89 * Maximum number of arrays
91 #define MAX_ARRAYS 256
93 /* will be 4 for GLSL 4.00 */
94 #define MAX_GLSL_TEXTURE_OFFSET 1
99 static int swizzle_for_size(int size
);
102 * This struct is a corresponding struct to TGSI ureg_src.
106 st_src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
110 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
111 this->swizzle
= swizzle_for_size(type
->vector_elements
);
113 this->swizzle
= SWIZZLE_XYZW
;
116 this->type
= type
? type
->base_type
: GLSL_TYPE_ERROR
;
117 this->reladdr
= NULL
;
120 st_src_reg(gl_register_file file
, int index
, int type
)
126 this->swizzle
= SWIZZLE_XYZW
;
128 this->reladdr
= NULL
;
131 st_src_reg(gl_register_file file
, int index
, int type
, int index2D
)
136 this->index2D
= index2D
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= NULL
;
144 this->type
= GLSL_TYPE_ERROR
;
145 this->file
= PROGRAM_UNDEFINED
;
150 this->reladdr
= NULL
;
153 explicit st_src_reg(st_dst_reg reg
);
155 gl_register_file file
; /**< PROGRAM_* from Mesa */
156 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
158 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
159 int negate
; /**< NEGATE_XYZW mask from mesa */
160 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
161 /** Register index should be offset by the integer in this reg. */
167 st_dst_reg(gl_register_file file
, int writemask
, int type
)
171 this->writemask
= writemask
;
172 this->cond_mask
= COND_TR
;
173 this->reladdr
= NULL
;
179 this->type
= GLSL_TYPE_ERROR
;
180 this->file
= PROGRAM_UNDEFINED
;
183 this->cond_mask
= COND_TR
;
184 this->reladdr
= NULL
;
187 explicit st_dst_reg(st_src_reg reg
);
189 gl_register_file file
; /**< PROGRAM_* from Mesa */
190 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
191 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
193 int type
; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
194 /** Register index should be offset by the integer in this reg. */
198 st_src_reg::st_src_reg(st_dst_reg reg
)
200 this->type
= reg
.type
;
201 this->file
= reg
.file
;
202 this->index
= reg
.index
;
203 this->swizzle
= SWIZZLE_XYZW
;
205 this->reladdr
= reg
.reladdr
;
209 st_dst_reg::st_dst_reg(st_src_reg reg
)
211 this->type
= reg
.type
;
212 this->file
= reg
.file
;
213 this->index
= reg
.index
;
214 this->writemask
= WRITEMASK_XYZW
;
215 this->cond_mask
= COND_TR
;
216 this->reladdr
= reg
.reladdr
;
219 class glsl_to_tgsi_instruction
: public exec_node
{
221 /* Callers of this ralloc-based new need not call delete. It's
222 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
223 static void* operator new(size_t size
, void *ctx
)
227 node
= rzalloc_size(ctx
, size
);
228 assert(node
!= NULL
);
236 /** Pointer to the ir source this tree came from for debugging */
238 GLboolean cond_update
;
240 int sampler
; /**< sampler index */
241 int tex_target
; /**< One of TEXTURE_*_INDEX */
242 GLboolean tex_shadow
;
243 struct tgsi_texture_offset tex_offsets
[MAX_GLSL_TEXTURE_OFFSET
];
244 unsigned tex_offset_num_offset
;
245 int dead_mask
; /**< Used in dead code elimination */
247 class function_entry
*function
; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
250 class variable_storage
: public exec_node
{
252 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
253 : file(file
), index(index
), var(var
)
258 gl_register_file file
;
260 ir_variable
*var
; /* variable that maps to this, if any */
263 class immediate_storage
: public exec_node
{
265 immediate_storage(gl_constant_value
*values
, int size
, int type
)
267 memcpy(this->values
, values
, size
* sizeof(gl_constant_value
));
272 gl_constant_value values
[4];
273 int size
; /**< Number of components (1-4) */
274 int type
; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
277 class function_entry
: public exec_node
{
279 ir_function_signature
*sig
;
282 * identifier of this function signature used by the program.
284 * At the point that TGSI instructions for function calls are
285 * generated, we don't know the address of the first instruction of
286 * the function body. So we make the BranchTarget that is called a
287 * small integer and rewrite them during set_branchtargets().
292 * Pointer to first instruction of the function body.
294 * Set during function body emits after main() is processed.
296 glsl_to_tgsi_instruction
*bgn_inst
;
299 * Index of the first instruction of the function body in actual TGSI.
301 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
305 /** Storage for the return value. */
306 st_src_reg return_reg
;
309 struct glsl_to_tgsi_visitor
: public ir_visitor
{
311 glsl_to_tgsi_visitor();
312 ~glsl_to_tgsi_visitor();
314 function_entry
*current_function
;
316 struct gl_context
*ctx
;
317 struct gl_program
*prog
;
318 struct gl_shader_program
*shader_program
;
319 struct gl_shader_compiler_options
*options
;
323 unsigned array_sizes
[MAX_ARRAYS
];
326 int num_address_regs
;
328 bool indirect_addr_consts
;
331 bool native_integers
;
334 variable_storage
*find_variable_storage(ir_variable
*var
);
336 int add_constant(gl_register_file file
, gl_constant_value values
[4],
337 int size
, int datatype
, GLuint
*swizzle_out
);
339 function_entry
*get_function_signature(ir_function_signature
*sig
);
341 st_src_reg
get_temp(const glsl_type
*type
);
342 void reladdr_to_temp(ir_instruction
*ir
, st_src_reg
*reg
, int *num_reladdr
);
344 st_src_reg
st_src_reg_for_float(float val
);
345 st_src_reg
st_src_reg_for_int(int val
);
346 st_src_reg
st_src_reg_for_type(int type
, int val
);
349 * \name Visit methods
351 * As typical for the visitor pattern, there must be one \c visit method for
352 * each concrete subclass of \c ir_instruction. Virtual base classes within
353 * the hierarchy should not have \c visit methods.
356 virtual void visit(ir_variable
*);
357 virtual void visit(ir_loop
*);
358 virtual void visit(ir_loop_jump
*);
359 virtual void visit(ir_function_signature
*);
360 virtual void visit(ir_function
*);
361 virtual void visit(ir_expression
*);
362 virtual void visit(ir_swizzle
*);
363 virtual void visit(ir_dereference_variable
*);
364 virtual void visit(ir_dereference_array
*);
365 virtual void visit(ir_dereference_record
*);
366 virtual void visit(ir_assignment
*);
367 virtual void visit(ir_constant
*);
368 virtual void visit(ir_call
*);
369 virtual void visit(ir_return
*);
370 virtual void visit(ir_discard
*);
371 virtual void visit(ir_texture
*);
372 virtual void visit(ir_if
*);
377 /** List of variable_storage */
380 /** List of immediate_storage */
381 exec_list immediates
;
382 unsigned num_immediates
;
384 /** List of function_entry */
385 exec_list function_signatures
;
386 int next_signature_id
;
388 /** List of glsl_to_tgsi_instruction */
389 exec_list instructions
;
391 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
);
393 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
394 st_dst_reg dst
, st_src_reg src0
);
396 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
397 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
399 glsl_to_tgsi_instruction
*emit(ir_instruction
*ir
, unsigned op
,
401 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
);
403 unsigned get_opcode(ir_instruction
*ir
, unsigned op
,
405 st_src_reg src0
, st_src_reg src1
);
408 * Emit the correct dot-product instruction for the type of arguments
410 glsl_to_tgsi_instruction
*emit_dp(ir_instruction
*ir
,
416 void emit_scalar(ir_instruction
*ir
, unsigned op
,
417 st_dst_reg dst
, st_src_reg src0
);
419 void emit_scalar(ir_instruction
*ir
, unsigned op
,
420 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
);
422 void try_emit_float_set(ir_instruction
*ir
, unsigned op
, st_dst_reg dst
);
424 void emit_arl(ir_instruction
*ir
, st_dst_reg dst
, st_src_reg src0
);
426 void emit_scs(ir_instruction
*ir
, unsigned op
,
427 st_dst_reg dst
, const st_src_reg
&src
);
429 bool try_emit_mad(ir_expression
*ir
,
431 bool try_emit_mad_for_and_not(ir_expression
*ir
,
433 bool try_emit_sat(ir_expression
*ir
);
435 void emit_swz(ir_expression
*ir
);
437 bool process_move_condition(ir_rvalue
*ir
);
439 void simplify_cmp(void);
441 void rename_temp_register(int index
, int new_index
);
442 int get_first_temp_read(int index
);
443 int get_first_temp_write(int index
);
444 int get_last_temp_read(int index
);
445 int get_last_temp_write(int index
);
447 void copy_propagate(void);
448 void eliminate_dead_code(void);
449 int eliminate_dead_code_advanced(void);
450 void merge_registers(void);
451 void renumber_registers(void);
453 void emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
454 st_dst_reg
*l
, st_src_reg
*r
);
459 static st_src_reg undef_src
= st_src_reg(PROGRAM_UNDEFINED
, 0, GLSL_TYPE_ERROR
);
461 static st_dst_reg undef_dst
= st_dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
, GLSL_TYPE_ERROR
);
463 static st_dst_reg address_reg
= st_dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
, GLSL_TYPE_FLOAT
);
466 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...) PRINTFLIKE(2, 3);
469 fail_link(struct gl_shader_program
*prog
, const char *fmt
, ...)
473 ralloc_vasprintf_append(&prog
->InfoLog
, fmt
, args
);
476 prog
->LinkStatus
= GL_FALSE
;
480 swizzle_for_size(int size
)
482 int size_swizzles
[4] = {
483 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
484 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
485 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
486 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
489 assert((size
>= 1) && (size
<= 4));
490 return size_swizzles
[size
- 1];
494 is_tex_instruction(unsigned opcode
)
496 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
501 num_inst_dst_regs(unsigned opcode
)
503 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
504 return info
->num_dst
;
508 num_inst_src_regs(unsigned opcode
)
510 const tgsi_opcode_info
* info
= tgsi_get_opcode_info(opcode
);
511 return info
->is_tex
? info
->num_src
- 1 : info
->num_src
;
514 glsl_to_tgsi_instruction
*
515 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
517 st_src_reg src0
, st_src_reg src1
, st_src_reg src2
)
519 glsl_to_tgsi_instruction
*inst
= new(mem_ctx
) glsl_to_tgsi_instruction();
520 int num_reladdr
= 0, i
;
522 op
= get_opcode(ir
, op
, dst
, src0
, src1
);
524 /* If we have to do relative addressing, we want to load the ARL
525 * reg directly for one of the regs, and preload the other reladdr
526 * sources into temps.
528 num_reladdr
+= dst
.reladdr
!= NULL
;
529 num_reladdr
+= src0
.reladdr
!= NULL
;
530 num_reladdr
+= src1
.reladdr
!= NULL
;
531 num_reladdr
+= src2
.reladdr
!= NULL
;
533 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
534 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
535 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
538 emit_arl(ir
, address_reg
, *dst
.reladdr
);
541 assert(num_reladdr
== 0);
551 inst
->function
= NULL
;
553 if (op
== TGSI_OPCODE_ARL
|| op
== TGSI_OPCODE_UARL
)
554 this->num_address_regs
= 1;
556 /* Update indirect addressing status used by TGSI */
559 case PROGRAM_LOCAL_PARAM
:
560 case PROGRAM_ENV_PARAM
:
561 case PROGRAM_STATE_VAR
:
562 case PROGRAM_CONSTANT
:
563 case PROGRAM_UNIFORM
:
564 this->indirect_addr_consts
= true;
566 case PROGRAM_IMMEDIATE
:
567 assert(!"immediates should not have indirect addressing");
574 for (i
=0; i
<3; i
++) {
575 if(inst
->src
[i
].reladdr
) {
576 switch(inst
->src
[i
].file
) {
577 case PROGRAM_LOCAL_PARAM
:
578 case PROGRAM_ENV_PARAM
:
579 case PROGRAM_STATE_VAR
:
580 case PROGRAM_CONSTANT
:
581 case PROGRAM_UNIFORM
:
582 this->indirect_addr_consts
= true;
584 case PROGRAM_IMMEDIATE
:
585 assert(!"immediates should not have indirect addressing");
594 this->instructions
.push_tail(inst
);
597 try_emit_float_set(ir
, op
, dst
);
603 glsl_to_tgsi_instruction
*
604 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
605 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
)
607 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
610 glsl_to_tgsi_instruction
*
611 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
,
612 st_dst_reg dst
, st_src_reg src0
)
614 assert(dst
.writemask
!= 0);
615 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
618 glsl_to_tgsi_instruction
*
619 glsl_to_tgsi_visitor::emit(ir_instruction
*ir
, unsigned op
)
621 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
625 * Emits the code to convert the result of float SET instructions to integers.
628 glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction
*ir
, unsigned op
,
631 if ((op
== TGSI_OPCODE_SEQ
||
632 op
== TGSI_OPCODE_SNE
||
633 op
== TGSI_OPCODE_SGE
||
634 op
== TGSI_OPCODE_SLT
))
636 st_src_reg src
= st_src_reg(dst
);
637 src
.negate
= ~src
.negate
;
638 dst
.type
= GLSL_TYPE_FLOAT
;
639 emit(ir
, TGSI_OPCODE_F2I
, dst
, src
);
644 * Determines whether to use an integer, unsigned integer, or float opcode
645 * based on the operands and input opcode, then emits the result.
648 glsl_to_tgsi_visitor::get_opcode(ir_instruction
*ir
, unsigned op
,
650 st_src_reg src0
, st_src_reg src1
)
652 int type
= GLSL_TYPE_FLOAT
;
654 assert(src0
.type
!= GLSL_TYPE_ARRAY
);
655 assert(src0
.type
!= GLSL_TYPE_STRUCT
);
656 assert(src1
.type
!= GLSL_TYPE_ARRAY
);
657 assert(src1
.type
!= GLSL_TYPE_STRUCT
);
659 if (src0
.type
== GLSL_TYPE_FLOAT
|| src1
.type
== GLSL_TYPE_FLOAT
)
660 type
= GLSL_TYPE_FLOAT
;
661 else if (native_integers
)
662 type
= src0
.type
== GLSL_TYPE_BOOL
? GLSL_TYPE_INT
: src0
.type
;
664 #define case4(c, f, i, u) \
665 case TGSI_OPCODE_##c: \
666 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \
667 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \
668 else op = TGSI_OPCODE_##f; \
670 #define case3(f, i, u) case4(f, f, i, u)
671 #define case2fi(f, i) case4(f, f, i, i)
672 #define case2iu(i, u) case4(i, LAST, i, u)
678 case3(DIV
, IDIV
, UDIV
);
679 case3(MAX
, IMAX
, UMAX
);
680 case3(MIN
, IMIN
, UMIN
);
685 case3(SGE
, ISGE
, USGE
);
686 case3(SLT
, ISLT
, USLT
);
691 case3(ABS
, IABS
, IABS
);
696 assert(op
!= TGSI_OPCODE_LAST
);
700 glsl_to_tgsi_instruction
*
701 glsl_to_tgsi_visitor::emit_dp(ir_instruction
*ir
,
702 st_dst_reg dst
, st_src_reg src0
, st_src_reg src1
,
705 static const unsigned dot_opcodes
[] = {
706 TGSI_OPCODE_DP2
, TGSI_OPCODE_DP3
, TGSI_OPCODE_DP4
709 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
713 * Emits TGSI scalar opcodes to produce unique answers across channels.
715 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
716 * channel determines the result across all channels. So to do a vec4
717 * of this operation, we want to emit a scalar per source channel used
718 * to produce dest channels.
721 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
723 st_src_reg orig_src0
, st_src_reg orig_src1
)
726 int done_mask
= ~dst
.writemask
;
728 /* TGSI RCP is a scalar operation splatting results to all channels,
729 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
732 for (i
= 0; i
< 4; i
++) {
733 GLuint this_mask
= (1 << i
);
734 glsl_to_tgsi_instruction
*inst
;
735 st_src_reg src0
= orig_src0
;
736 st_src_reg src1
= orig_src1
;
738 if (done_mask
& this_mask
)
741 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
742 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
743 for (j
= i
+ 1; j
< 4; j
++) {
744 /* If there is another enabled component in the destination that is
745 * derived from the same inputs, generate its value on this pass as
748 if (!(done_mask
& (1 << j
)) &&
749 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
750 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
751 this_mask
|= (1 << j
);
754 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
755 src0_swiz
, src0_swiz
);
756 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
757 src1_swiz
, src1_swiz
);
759 inst
= emit(ir
, op
, dst
, src0
, src1
);
760 inst
->dst
.writemask
= this_mask
;
761 done_mask
|= this_mask
;
766 glsl_to_tgsi_visitor::emit_scalar(ir_instruction
*ir
, unsigned op
,
767 st_dst_reg dst
, st_src_reg src0
)
769 st_src_reg undef
= undef_src
;
771 undef
.swizzle
= SWIZZLE_XXXX
;
773 emit_scalar(ir
, op
, dst
, src0
, undef
);
777 glsl_to_tgsi_visitor::emit_arl(ir_instruction
*ir
,
778 st_dst_reg dst
, st_src_reg src0
)
780 int op
= TGSI_OPCODE_ARL
;
782 if (src0
.type
== GLSL_TYPE_INT
|| src0
.type
== GLSL_TYPE_UINT
)
783 op
= TGSI_OPCODE_UARL
;
785 emit(NULL
, op
, dst
, src0
);
789 * Emit an TGSI_OPCODE_SCS instruction
791 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
792 * Instead of splatting its result across all four components of the
793 * destination, it writes one value to the \c x component and another value to
794 * the \c y component.
796 * \param ir IR instruction being processed
797 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
798 * on which value is desired.
799 * \param dst Destination register
800 * \param src Source register
803 glsl_to_tgsi_visitor::emit_scs(ir_instruction
*ir
, unsigned op
,
805 const st_src_reg
&src
)
807 /* Vertex programs cannot use the SCS opcode.
809 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
810 emit_scalar(ir
, op
, dst
, src
);
814 const unsigned component
= (op
== TGSI_OPCODE_SIN
) ? 0 : 1;
815 const unsigned scs_mask
= (1U << component
);
816 int done_mask
= ~dst
.writemask
;
819 assert(op
== TGSI_OPCODE_SIN
|| op
== TGSI_OPCODE_COS
);
821 /* If there are compnents in the destination that differ from the component
822 * that will be written by the SCS instrution, we'll need a temporary.
824 if (scs_mask
!= unsigned(dst
.writemask
)) {
825 tmp
= get_temp(glsl_type::vec4_type
);
828 for (unsigned i
= 0; i
< 4; i
++) {
829 unsigned this_mask
= (1U << i
);
830 st_src_reg src0
= src
;
832 if ((done_mask
& this_mask
) != 0)
835 /* The source swizzle specified which component of the source generates
836 * sine / cosine for the current component in the destination. The SCS
837 * instruction requires that this value be swizzle to the X component.
838 * Replace the current swizzle with a swizzle that puts the source in
841 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
843 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
844 src0_swiz
, src0_swiz
);
845 for (unsigned j
= i
+ 1; j
< 4; j
++) {
846 /* If there is another enabled component in the destination that is
847 * derived from the same inputs, generate its value on this pass as
850 if (!(done_mask
& (1 << j
)) &&
851 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
852 this_mask
|= (1 << j
);
856 if (this_mask
!= scs_mask
) {
857 glsl_to_tgsi_instruction
*inst
;
858 st_dst_reg tmp_dst
= st_dst_reg(tmp
);
860 /* Emit the SCS instruction.
862 inst
= emit(ir
, TGSI_OPCODE_SCS
, tmp_dst
, src0
);
863 inst
->dst
.writemask
= scs_mask
;
865 /* Move the result of the SCS instruction to the desired location in
868 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
869 component
, component
);
870 inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, tmp
);
871 inst
->dst
.writemask
= this_mask
;
873 /* Emit the SCS instruction to write directly to the destination.
875 glsl_to_tgsi_instruction
*inst
= emit(ir
, TGSI_OPCODE_SCS
, dst
, src0
);
876 inst
->dst
.writemask
= scs_mask
;
879 done_mask
|= this_mask
;
884 glsl_to_tgsi_visitor::add_constant(gl_register_file file
,
885 gl_constant_value values
[4], int size
, int datatype
,
888 if (file
== PROGRAM_CONSTANT
) {
889 return _mesa_add_typed_unnamed_constant(this->prog
->Parameters
, values
,
890 size
, datatype
, swizzle_out
);
893 immediate_storage
*entry
;
894 assert(file
== PROGRAM_IMMEDIATE
);
896 /* Search immediate storage to see if we already have an identical
897 * immediate that we can use instead of adding a duplicate entry.
899 foreach_iter(exec_list_iterator
, iter
, this->immediates
) {
900 entry
= (immediate_storage
*)iter
.get();
902 if (entry
->size
== size
&&
903 entry
->type
== datatype
&&
904 !memcmp(entry
->values
, values
, size
* sizeof(gl_constant_value
))) {
910 /* Add this immediate to the list. */
911 entry
= new(mem_ctx
) immediate_storage(values
, size
, datatype
);
912 this->immediates
.push_tail(entry
);
913 this->num_immediates
++;
919 glsl_to_tgsi_visitor::st_src_reg_for_float(float val
)
921 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_FLOAT
);
922 union gl_constant_value uval
;
925 src
.index
= add_constant(src
.file
, &uval
, 1, GL_FLOAT
, &src
.swizzle
);
931 glsl_to_tgsi_visitor::st_src_reg_for_int(int val
)
933 st_src_reg
src(PROGRAM_IMMEDIATE
, -1, GLSL_TYPE_INT
);
934 union gl_constant_value uval
;
936 assert(native_integers
);
939 src
.index
= add_constant(src
.file
, &uval
, 1, GL_INT
, &src
.swizzle
);
945 glsl_to_tgsi_visitor::st_src_reg_for_type(int type
, int val
)
948 return type
== GLSL_TYPE_FLOAT
? st_src_reg_for_float(val
) :
949 st_src_reg_for_int(val
);
951 return st_src_reg_for_float(val
);
955 type_size(const struct glsl_type
*type
)
960 switch (type
->base_type
) {
963 case GLSL_TYPE_FLOAT
:
965 if (type
->is_matrix()) {
966 return type
->matrix_columns
;
968 /* Regardless of size of vector, it gets a vec4. This is bad
969 * packing for things like floats, but otherwise arrays become a
970 * mess. Hopefully a later pass over the code can pack scalars
971 * down if appropriate.
975 case GLSL_TYPE_ARRAY
:
976 assert(type
->length
> 0);
977 return type_size(type
->fields
.array
) * type
->length
;
978 case GLSL_TYPE_STRUCT
:
980 for (i
= 0; i
< type
->length
; i
++) {
981 size
+= type_size(type
->fields
.structure
[i
].type
);
984 case GLSL_TYPE_SAMPLER
:
985 /* Samplers take up one slot in UNIFORMS[], but they're baked in
989 case GLSL_TYPE_INTERFACE
:
991 case GLSL_TYPE_ERROR
:
992 assert(!"Invalid type in type_size");
999 * In the initial pass of codegen, we assign temporary numbers to
1000 * intermediate results. (not SSA -- variable assignments will reuse
1004 glsl_to_tgsi_visitor::get_temp(const glsl_type
*type
)
1008 src
.type
= native_integers
? type
->base_type
: GLSL_TYPE_FLOAT
;
1012 if (!options
->EmitNoIndirectTemp
&&
1013 (type
->is_array() || type
->is_matrix())) {
1015 src
.file
= PROGRAM_ARRAY
;
1016 src
.index
= next_array
<< 16 | 0x8000;
1017 array_sizes
[next_array
] = type_size(type
);
1021 src
.file
= PROGRAM_TEMPORARY
;
1022 src
.index
= next_temp
;
1023 next_temp
+= type_size(type
);
1026 if (type
->is_array() || type
->is_record()) {
1027 src
.swizzle
= SWIZZLE_NOOP
;
1029 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
1036 glsl_to_tgsi_visitor::find_variable_storage(ir_variable
*var
)
1039 variable_storage
*entry
;
1041 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
1042 entry
= (variable_storage
*)iter
.get();
1044 if (entry
->var
== var
)
1052 glsl_to_tgsi_visitor::visit(ir_variable
*ir
)
1054 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
1055 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
1057 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
1058 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
1061 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
1063 const ir_state_slot
*const slots
= ir
->state_slots
;
1064 assert(ir
->state_slots
!= NULL
);
1066 /* Check if this statevar's setup in the STATE file exactly
1067 * matches how we'll want to reference it as a
1068 * struct/array/whatever. If not, then we need to move it into
1069 * temporary storage and hope that it'll get copy-propagated
1072 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
1073 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
1078 variable_storage
*storage
;
1080 if (i
== ir
->num_state_slots
) {
1081 /* We'll set the index later. */
1082 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
1083 this->variables
.push_tail(storage
);
1087 /* The variable_storage constructor allocates slots based on the size
1088 * of the type. However, this had better match the number of state
1089 * elements that we're going to copy into the new temporary.
1091 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
1093 dst
= st_dst_reg(get_temp(ir
->type
));
1095 storage
= new(mem_ctx
) variable_storage(ir
, dst
.file
, dst
.index
);
1097 this->variables
.push_tail(storage
);
1101 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
1102 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
1103 (gl_state_index
*)slots
[i
].tokens
);
1105 if (storage
->file
== PROGRAM_STATE_VAR
) {
1106 if (storage
->index
== -1) {
1107 storage
->index
= index
;
1109 assert(index
== storage
->index
+ (int)i
);
1112 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1113 * the data being moved since MOV does not care about the type of
1114 * data it is moving, and we don't want to declare registers with
1115 * array or struct types.
1117 st_src_reg
src(PROGRAM_STATE_VAR
, index
, GLSL_TYPE_FLOAT
);
1118 src
.swizzle
= slots
[i
].swizzle
;
1119 emit(ir
, TGSI_OPCODE_MOV
, dst
, src
);
1120 /* even a float takes up a whole vec4 reg in a struct/array. */
1125 if (storage
->file
== PROGRAM_TEMPORARY
&&
1126 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
1127 fail_link(this->shader_program
,
1128 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1129 ir
->name
, dst
.index
- storage
->index
,
1130 type_size(ir
->type
));
1136 glsl_to_tgsi_visitor::visit(ir_loop
*ir
)
1138 ir_dereference_variable
*counter
= NULL
;
1140 if (ir
->counter
!= NULL
)
1141 counter
= new(ir
) ir_dereference_variable(ir
->counter
);
1143 if (ir
->from
!= NULL
) {
1144 assert(ir
->counter
!= NULL
);
1146 ir_assignment
*a
= new(ir
) ir_assignment(counter
, ir
->from
, NULL
);
1152 emit(NULL
, TGSI_OPCODE_BGNLOOP
);
1156 new(ir
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
1158 ir_if
*if_stmt
= new(ir
) ir_if(e
);
1160 ir_loop_jump
*brk
= new(ir
) ir_loop_jump(ir_loop_jump::jump_break
);
1162 if_stmt
->then_instructions
.push_tail(brk
);
1164 if_stmt
->accept(this);
1171 visit_exec_list(&ir
->body_instructions
, this);
1173 if (ir
->increment
) {
1175 new(ir
) ir_expression(ir_binop_add
, counter
->type
,
1176 counter
, ir
->increment
);
1178 ir_assignment
*a
= new(ir
) ir_assignment(counter
, e
, NULL
);
1185 emit(NULL
, TGSI_OPCODE_ENDLOOP
);
1189 glsl_to_tgsi_visitor::visit(ir_loop_jump
*ir
)
1192 case ir_loop_jump::jump_break
:
1193 emit(NULL
, TGSI_OPCODE_BRK
);
1195 case ir_loop_jump::jump_continue
:
1196 emit(NULL
, TGSI_OPCODE_CONT
);
1203 glsl_to_tgsi_visitor::visit(ir_function_signature
*ir
)
1210 glsl_to_tgsi_visitor::visit(ir_function
*ir
)
1212 /* Ignore function bodies other than main() -- we shouldn't see calls to
1213 * them since they should all be inlined before we get to glsl_to_tgsi.
1215 if (strcmp(ir
->name
, "main") == 0) {
1216 const ir_function_signature
*sig
;
1219 sig
= ir
->matching_signature(&empty
);
1223 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
1224 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
1232 glsl_to_tgsi_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
1234 int nonmul_operand
= 1 - mul_operand
;
1236 st_dst_reg result_dst
;
1238 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
1239 if (!expr
|| expr
->operation
!= ir_binop_mul
)
1242 expr
->operands
[0]->accept(this);
1244 expr
->operands
[1]->accept(this);
1246 ir
->operands
[nonmul_operand
]->accept(this);
1249 this->result
= get_temp(ir
->type
);
1250 result_dst
= st_dst_reg(this->result
);
1251 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1252 emit(ir
, TGSI_OPCODE_MAD
, result_dst
, a
, b
, c
);
1258 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1260 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1261 * implemented using multiplication, and logical-or is implemented using
1262 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1263 * As result, the logical expression (a & !b) can be rewritten as:
1267 * - (a * 1) - (a * b)
1271 * This final expression can be implemented as a single MAD(a, -b, a)
1275 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
1277 const int other_operand
= 1 - try_operand
;
1280 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
1281 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
1284 ir
->operands
[other_operand
]->accept(this);
1286 expr
->operands
[0]->accept(this);
1289 b
.negate
= ~b
.negate
;
1291 this->result
= get_temp(ir
->type
);
1292 emit(ir
, TGSI_OPCODE_MAD
, st_dst_reg(this->result
), a
, b
, a
);
1298 glsl_to_tgsi_visitor::try_emit_sat(ir_expression
*ir
)
1300 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1302 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1303 !st_context(this->ctx
)->has_shader_model3
) {
1307 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
1311 sat_src
->accept(this);
1312 st_src_reg src
= this->result
;
1314 /* If we generated an expression instruction into a temporary in
1315 * processing the saturate's operand, apply the saturate to that
1316 * instruction. Otherwise, generate a MOV to do the saturate.
1318 * Note that we have to be careful to only do this optimization if
1319 * the instruction in question was what generated src->result. For
1320 * example, ir_dereference_array might generate a MUL instruction
1321 * to create the reladdr, and return us a src reg using that
1322 * reladdr. That MUL result is not the value we're trying to
1325 ir_expression
*sat_src_expr
= sat_src
->as_expression();
1326 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
1327 sat_src_expr
->operation
== ir_binop_add
||
1328 sat_src_expr
->operation
== ir_binop_dot
)) {
1329 glsl_to_tgsi_instruction
*new_inst
;
1330 new_inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
1331 new_inst
->saturate
= true;
1333 this->result
= get_temp(ir
->type
);
1334 st_dst_reg result_dst
= st_dst_reg(this->result
);
1335 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1336 glsl_to_tgsi_instruction
*inst
;
1337 inst
= emit(ir
, TGSI_OPCODE_MOV
, result_dst
, src
);
1338 inst
->saturate
= true;
1345 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction
*ir
,
1346 st_src_reg
*reg
, int *num_reladdr
)
1351 emit_arl(ir
, address_reg
, *reg
->reladdr
);
1353 if (*num_reladdr
!= 1) {
1354 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1356 emit(ir
, TGSI_OPCODE_MOV
, st_dst_reg(temp
), *reg
);
1364 glsl_to_tgsi_visitor::visit(ir_expression
*ir
)
1366 unsigned int operand
;
1367 st_src_reg op
[Elements(ir
->operands
)];
1368 st_src_reg result_src
;
1369 st_dst_reg result_dst
;
1371 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1373 if (ir
->operation
== ir_binop_add
) {
1374 if (try_emit_mad(ir
, 1))
1376 if (try_emit_mad(ir
, 0))
1380 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1382 if (ir
->operation
== ir_binop_logic_and
) {
1383 if (try_emit_mad_for_and_not(ir
, 1))
1385 if (try_emit_mad_for_and_not(ir
, 0))
1389 if (try_emit_sat(ir
))
1392 if (ir
->operation
== ir_quadop_vector
)
1393 assert(!"ir_quadop_vector should have been lowered");
1395 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1396 this->result
.file
= PROGRAM_UNDEFINED
;
1397 ir
->operands
[operand
]->accept(this);
1398 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1400 printf("Failed to get tree for expression operand:\n");
1401 ir
->operands
[operand
]->accept(&v
);
1404 op
[operand
] = this->result
;
1406 /* Matrix expression operands should have been broken down to vector
1407 * operations already.
1409 assert(!ir
->operands
[operand
]->type
->is_matrix());
1412 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1413 if (ir
->operands
[1]) {
1414 vector_elements
= MAX2(vector_elements
,
1415 ir
->operands
[1]->type
->vector_elements
);
1418 this->result
.file
= PROGRAM_UNDEFINED
;
1420 /* Storage for our result. Ideally for an assignment we'd be using
1421 * the actual storage for the result here, instead.
1423 result_src
= get_temp(ir
->type
);
1424 /* convenience for the emit functions below. */
1425 result_dst
= st_dst_reg(result_src
);
1426 /* Limit writes to the channels that will be used by result_src later.
1427 * This does limit this temp's use as a temporary for multi-instruction
1430 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1432 switch (ir
->operation
) {
1433 case ir_unop_logic_not
:
1434 if (result_dst
.type
!= GLSL_TYPE_FLOAT
)
1435 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1437 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1438 * older GPUs implement SEQ using multiple instructions (i915 uses two
1439 * SGE instructions and a MUL instruction). Since our logic values are
1440 * 0.0 and 1.0, 1-x also implements !x.
1442 op
[0].negate
= ~op
[0].negate
;
1443 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1447 if (result_dst
.type
== GLSL_TYPE_INT
|| result_dst
.type
== GLSL_TYPE_UINT
)
1448 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1450 op
[0].negate
= ~op
[0].negate
;
1455 emit(ir
, TGSI_OPCODE_ABS
, result_dst
, op
[0]);
1458 emit(ir
, TGSI_OPCODE_SSG
, result_dst
, op
[0]);
1461 emit_scalar(ir
, TGSI_OPCODE_RCP
, result_dst
, op
[0]);
1465 emit_scalar(ir
, TGSI_OPCODE_EX2
, result_dst
, op
[0]);
1469 assert(!"not reached: should be handled by ir_explog_to_explog2");
1472 emit_scalar(ir
, TGSI_OPCODE_LG2
, result_dst
, op
[0]);
1475 emit_scalar(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1478 emit_scalar(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1480 case ir_unop_sin_reduced
:
1481 emit_scs(ir
, TGSI_OPCODE_SIN
, result_dst
, op
[0]);
1483 case ir_unop_cos_reduced
:
1484 emit_scs(ir
, TGSI_OPCODE_COS
, result_dst
, op
[0]);
1488 emit(ir
, TGSI_OPCODE_DDX
, result_dst
, op
[0]);
1492 /* The X component contains 1 or -1 depending on whether the framebuffer
1493 * is a FBO or the window system buffer, respectively.
1494 * It is then multiplied with the source operand of DDY.
1496 static const gl_state_index transform_y_state
[STATE_LENGTH
]
1497 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
};
1499 unsigned transform_y_index
=
1500 _mesa_add_state_reference(this->prog
->Parameters
,
1503 st_src_reg transform_y
= st_src_reg(PROGRAM_STATE_VAR
,
1505 glsl_type::vec4_type
);
1506 transform_y
.swizzle
= SWIZZLE_XXXX
;
1508 st_src_reg temp
= get_temp(glsl_type::vec4_type
);
1510 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(temp
), transform_y
, op
[0]);
1511 emit(ir
, TGSI_OPCODE_DDY
, result_dst
, temp
);
1515 case ir_unop_noise
: {
1516 /* At some point, a motivated person could add a better
1517 * implementation of noise. Currently not even the nvidia
1518 * binary drivers do anything more than this. In any case, the
1519 * place to do this is in the GL state tracker, not the poor
1522 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, st_src_reg_for_float(0.5));
1527 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1530 emit(ir
, TGSI_OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1534 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1537 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1538 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1540 emit(ir
, TGSI_OPCODE_DIV
, result_dst
, op
[0], op
[1]);
1543 if (result_dst
.type
== GLSL_TYPE_FLOAT
)
1544 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1546 emit(ir
, TGSI_OPCODE_MOD
, result_dst
, op
[0], op
[1]);
1550 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1552 case ir_binop_greater
:
1553 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, op
[1], op
[0]);
1555 case ir_binop_lequal
:
1556 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[1], op
[0]);
1558 case ir_binop_gequal
:
1559 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1561 case ir_binop_equal
:
1562 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1564 case ir_binop_nequal
:
1565 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1567 case ir_binop_all_equal
:
1568 /* "==" operator producing a scalar boolean. */
1569 if (ir
->operands
[0]->type
->is_vector() ||
1570 ir
->operands
[1]->type
->is_vector()) {
1571 st_src_reg temp
= get_temp(native_integers
?
1572 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1573 glsl_type::vec4_type
);
1575 if (native_integers
) {
1576 st_dst_reg temp_dst
= st_dst_reg(temp
);
1577 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1579 emit(ir
, TGSI_OPCODE_SEQ
, st_dst_reg(temp
), op
[0], op
[1]);
1581 /* Emit 1-3 AND operations to combine the SEQ results. */
1582 switch (ir
->operands
[0]->type
->vector_elements
) {
1586 temp_dst
.writemask
= WRITEMASK_Y
;
1587 temp1
.swizzle
= SWIZZLE_YYYY
;
1588 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1589 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1592 temp_dst
.writemask
= WRITEMASK_X
;
1593 temp1
.swizzle
= SWIZZLE_XXXX
;
1594 temp2
.swizzle
= SWIZZLE_YYYY
;
1595 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1596 temp_dst
.writemask
= WRITEMASK_Y
;
1597 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1598 temp2
.swizzle
= SWIZZLE_WWWW
;
1599 emit(ir
, TGSI_OPCODE_AND
, temp_dst
, temp1
, temp2
);
1602 temp1
.swizzle
= SWIZZLE_XXXX
;
1603 temp2
.swizzle
= SWIZZLE_YYYY
;
1604 emit(ir
, TGSI_OPCODE_AND
, result_dst
, temp1
, temp2
);
1606 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1608 /* After the dot-product, the value will be an integer on the
1609 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1611 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1613 /* Negating the result of the dot-product gives values on the range
1614 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1615 * This is achieved using SGE.
1617 st_src_reg sge_src
= result_src
;
1618 sge_src
.negate
= ~sge_src
.negate
;
1619 emit(ir
, TGSI_OPCODE_SGE
, result_dst
, sge_src
, st_src_reg_for_float(0.0));
1622 emit(ir
, TGSI_OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1625 case ir_binop_any_nequal
:
1626 /* "!=" operator producing a scalar boolean. */
1627 if (ir
->operands
[0]->type
->is_vector() ||
1628 ir
->operands
[1]->type
->is_vector()) {
1629 st_src_reg temp
= get_temp(native_integers
?
1630 glsl_type::get_instance(ir
->operands
[0]->type
->base_type
, 4, 1) :
1631 glsl_type::vec4_type
);
1632 emit(ir
, TGSI_OPCODE_SNE
, st_dst_reg(temp
), op
[0], op
[1]);
1634 if (native_integers
) {
1635 st_dst_reg temp_dst
= st_dst_reg(temp
);
1636 st_src_reg temp1
= st_src_reg(temp
), temp2
= st_src_reg(temp
);
1638 /* Emit 1-3 OR operations to combine the SNE results. */
1639 switch (ir
->operands
[0]->type
->vector_elements
) {
1643 temp_dst
.writemask
= WRITEMASK_Y
;
1644 temp1
.swizzle
= SWIZZLE_YYYY
;
1645 temp2
.swizzle
= SWIZZLE_ZZZZ
;
1646 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1649 temp_dst
.writemask
= WRITEMASK_X
;
1650 temp1
.swizzle
= SWIZZLE_XXXX
;
1651 temp2
.swizzle
= SWIZZLE_YYYY
;
1652 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1653 temp_dst
.writemask
= WRITEMASK_Y
;
1654 temp1
.swizzle
= SWIZZLE_ZZZZ
;
1655 temp2
.swizzle
= SWIZZLE_WWWW
;
1656 emit(ir
, TGSI_OPCODE_OR
, temp_dst
, temp1
, temp2
);
1659 temp1
.swizzle
= SWIZZLE_XXXX
;
1660 temp2
.swizzle
= SWIZZLE_YYYY
;
1661 emit(ir
, TGSI_OPCODE_OR
, result_dst
, temp1
, temp2
);
1663 /* After the dot-product, the value will be an integer on the
1664 * range [0,4]. Zero stays zero, and positive values become 1.0.
1666 glsl_to_tgsi_instruction
*const dp
=
1667 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1668 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1669 /* The clamping to [0,1] can be done for free in the fragment
1670 * shader with a saturate.
1672 dp
->saturate
= true;
1674 /* Negating the result of the dot-product gives values on the range
1675 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1676 * achieved using SLT.
1678 st_src_reg slt_src
= result_src
;
1679 slt_src
.negate
= ~slt_src
.negate
;
1680 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1684 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1689 assert(ir
->operands
[0]->type
->is_vector());
1691 /* After the dot-product, the value will be an integer on the
1692 * range [0,4]. Zero stays zero, and positive values become 1.0.
1694 glsl_to_tgsi_instruction
*const dp
=
1695 emit_dp(ir
, result_dst
, op
[0], op
[0],
1696 ir
->operands
[0]->type
->vector_elements
);
1697 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
&&
1698 result_dst
.type
== GLSL_TYPE_FLOAT
) {
1699 /* The clamping to [0,1] can be done for free in the fragment
1700 * shader with a saturate.
1702 dp
->saturate
= true;
1703 } else if (result_dst
.type
== GLSL_TYPE_FLOAT
) {
1704 /* Negating the result of the dot-product gives values on the range
1705 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1706 * is achieved using SLT.
1708 st_src_reg slt_src
= result_src
;
1709 slt_src
.negate
= ~slt_src
.negate
;
1710 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1713 /* Use SNE 0 if integers are being used as boolean values. */
1714 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, result_src
, st_src_reg_for_int(0));
1719 case ir_binop_logic_xor
:
1720 if (native_integers
)
1721 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1723 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1726 case ir_binop_logic_or
: {
1727 if (native_integers
) {
1728 /* If integers are used as booleans, we can use an actual "or"
1731 assert(native_integers
);
1732 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1734 /* After the addition, the value will be an integer on the
1735 * range [0,2]. Zero stays zero, and positive values become 1.0.
1737 glsl_to_tgsi_instruction
*add
=
1738 emit(ir
, TGSI_OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1739 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1740 /* The clamping to [0,1] can be done for free in the fragment
1741 * shader with a saturate if floats are being used as boolean values.
1743 add
->saturate
= true;
1745 /* Negating the result of the addition gives values on the range
1746 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1747 * is achieved using SLT.
1749 st_src_reg slt_src
= result_src
;
1750 slt_src
.negate
= ~slt_src
.negate
;
1751 emit(ir
, TGSI_OPCODE_SLT
, result_dst
, slt_src
, st_src_reg_for_float(0.0));
1757 case ir_binop_logic_and
:
1758 /* If native integers are disabled, the bool args are stored as float 0.0
1759 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1760 * actual AND opcode.
1762 if (native_integers
)
1763 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1765 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1769 assert(ir
->operands
[0]->type
->is_vector());
1770 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1771 emit_dp(ir
, result_dst
, op
[0], op
[1],
1772 ir
->operands
[0]->type
->vector_elements
);
1777 emit_scalar(ir
, TGSI_OPCODE_SQRT
, result_dst
, op
[0]);
1780 /* sqrt(x) = x * rsq(x). */
1781 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1782 emit(ir
, TGSI_OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1783 /* For incoming channels <= 0, set the result to 0. */
1784 op
[0].negate
= ~op
[0].negate
;
1785 emit(ir
, TGSI_OPCODE_CMP
, result_dst
,
1786 op
[0], result_src
, st_src_reg_for_float(0.0));
1790 emit_scalar(ir
, TGSI_OPCODE_RSQ
, result_dst
, op
[0]);
1793 if (native_integers
) {
1794 emit(ir
, TGSI_OPCODE_I2F
, result_dst
, op
[0]);
1797 /* fallthrough to next case otherwise */
1799 if (native_integers
) {
1800 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_float(1.0));
1803 /* fallthrough to next case otherwise */
1806 /* Converting between signed and unsigned integers is a no-op. */
1810 if (native_integers
) {
1811 /* Booleans are stored as integers using ~0 for true and 0 for false.
1812 * GLSL requires that int(bool) return 1 for true and 0 for false.
1813 * This conversion is done with AND, but it could be done with NEG.
1815 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], st_src_reg_for_int(1));
1817 /* Booleans and integers are both stored as floats when native
1818 * integers are disabled.
1824 if (native_integers
)
1825 emit(ir
, TGSI_OPCODE_F2I
, result_dst
, op
[0]);
1827 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1830 if (native_integers
)
1831 emit(ir
, TGSI_OPCODE_F2U
, result_dst
, op
[0]);
1833 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1835 case ir_unop_bitcast_f2i
:
1836 case ir_unop_bitcast_f2u
:
1837 case ir_unop_bitcast_i2f
:
1838 case ir_unop_bitcast_u2f
:
1842 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1845 if (native_integers
)
1846 emit(ir
, TGSI_OPCODE_INEG
, result_dst
, op
[0]);
1848 emit(ir
, TGSI_OPCODE_SNE
, result_dst
, op
[0], st_src_reg_for_float(0.0));
1851 emit(ir
, TGSI_OPCODE_TRUNC
, result_dst
, op
[0]);
1854 emit(ir
, TGSI_OPCODE_CEIL
, result_dst
, op
[0]);
1857 emit(ir
, TGSI_OPCODE_FLR
, result_dst
, op
[0]);
1859 case ir_unop_round_even
:
1860 emit(ir
, TGSI_OPCODE_ROUND
, result_dst
, op
[0]);
1863 emit(ir
, TGSI_OPCODE_FRC
, result_dst
, op
[0]);
1867 emit(ir
, TGSI_OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1870 emit(ir
, TGSI_OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1873 emit_scalar(ir
, TGSI_OPCODE_POW
, result_dst
, op
[0], op
[1]);
1876 case ir_unop_bit_not
:
1877 if (native_integers
) {
1878 emit(ir
, TGSI_OPCODE_NOT
, result_dst
, op
[0]);
1882 if (native_integers
) {
1883 emit(ir
, TGSI_OPCODE_U2F
, result_dst
, op
[0]);
1886 case ir_binop_lshift
:
1887 if (native_integers
) {
1888 emit(ir
, TGSI_OPCODE_SHL
, result_dst
, op
[0], op
[1]);
1891 case ir_binop_rshift
:
1892 if (native_integers
) {
1893 emit(ir
, TGSI_OPCODE_ISHR
, result_dst
, op
[0], op
[1]);
1896 case ir_binop_bit_and
:
1897 if (native_integers
) {
1898 emit(ir
, TGSI_OPCODE_AND
, result_dst
, op
[0], op
[1]);
1901 case ir_binop_bit_xor
:
1902 if (native_integers
) {
1903 emit(ir
, TGSI_OPCODE_XOR
, result_dst
, op
[0], op
[1]);
1906 case ir_binop_bit_or
:
1907 if (native_integers
) {
1908 emit(ir
, TGSI_OPCODE_OR
, result_dst
, op
[0], op
[1]);
1912 assert(!"GLSL 1.30 features unsupported");
1915 case ir_binop_ubo_load
: {
1916 ir_constant
*uniform_block
= ir
->operands
[0]->as_constant();
1917 ir_constant
*const_offset_ir
= ir
->operands
[1]->as_constant();
1918 unsigned const_offset
= const_offset_ir
? const_offset_ir
->value
.u
[0] : 0;
1919 st_src_reg index_reg
= get_temp(glsl_type::uint_type
);
1922 cbuf
.type
= glsl_type::vec4_type
->base_type
;
1923 cbuf
.file
= PROGRAM_CONSTANT
;
1925 cbuf
.index2D
= uniform_block
->value
.u
[0] + 1;
1926 cbuf
.reladdr
= NULL
;
1929 assert(ir
->type
->is_vector() || ir
->type
->is_scalar());
1931 if (const_offset_ir
) {
1932 index_reg
= st_src_reg_for_int(const_offset
/ 16);
1934 emit(ir
, TGSI_OPCODE_USHR
, st_dst_reg(index_reg
), op
[1], st_src_reg_for_int(4));
1937 cbuf
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1938 cbuf
.swizzle
+= MAKE_SWIZZLE4(const_offset
% 16 / 4,
1939 const_offset
% 16 / 4,
1940 const_offset
% 16 / 4,
1941 const_offset
% 16 / 4);
1943 cbuf
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
1944 memcpy(cbuf
.reladdr
, &index_reg
, sizeof(index_reg
));
1946 if (ir
->type
->base_type
== GLSL_TYPE_BOOL
) {
1947 emit(ir
, TGSI_OPCODE_USNE
, result_dst
, cbuf
, st_src_reg_for_int(0));
1948 result_src
.negate
= 1;
1949 emit(ir
, TGSI_OPCODE_UCMP
, result_dst
, result_src
, st_src_reg_for_int(~0), st_src_reg_for_int(0));
1951 emit(ir
, TGSI_OPCODE_MOV
, result_dst
, cbuf
);
1956 /* note: we have to reorder the three args here */
1957 emit(ir
, TGSI_OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1959 case ir_unop_pack_snorm_2x16
:
1960 case ir_unop_pack_unorm_2x16
:
1961 case ir_unop_pack_half_2x16
:
1962 case ir_unop_pack_snorm_4x8
:
1963 case ir_unop_pack_unorm_4x8
:
1964 case ir_unop_unpack_snorm_2x16
:
1965 case ir_unop_unpack_unorm_2x16
:
1966 case ir_unop_unpack_half_2x16
:
1967 case ir_unop_unpack_half_2x16_split_x
:
1968 case ir_unop_unpack_half_2x16_split_y
:
1969 case ir_unop_unpack_snorm_4x8
:
1970 case ir_unop_unpack_unorm_4x8
:
1971 case ir_binop_pack_half_2x16_split
:
1972 case ir_unop_bitfield_reverse
:
1973 case ir_unop_bit_count
:
1974 case ir_unop_find_msb
:
1975 case ir_unop_find_lsb
:
1978 case ir_triop_bitfield_extract
:
1979 case ir_quadop_bitfield_insert
:
1980 case ir_quadop_vector
:
1981 /* This operation is not supported, or should have already been handled.
1983 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1987 this->result
= result_src
;
1992 glsl_to_tgsi_visitor::visit(ir_swizzle
*ir
)
1998 /* Note that this is only swizzles in expressions, not those on the left
1999 * hand side of an assignment, which do write masking. See ir_assignment
2003 ir
->val
->accept(this);
2005 assert(src
.file
!= PROGRAM_UNDEFINED
);
2007 for (i
= 0; i
< 4; i
++) {
2008 if (i
< ir
->type
->vector_elements
) {
2011 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
2014 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
2017 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
2020 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
2024 /* If the type is smaller than a vec4, replicate the last
2027 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
2031 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
2037 glsl_to_tgsi_visitor::visit(ir_dereference_variable
*ir
)
2039 variable_storage
*entry
= find_variable_storage(ir
->var
);
2040 ir_variable
*var
= ir
->var
;
2043 switch (var
->mode
) {
2044 case ir_var_uniform
:
2045 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
2047 this->variables
.push_tail(entry
);
2049 case ir_var_shader_in
:
2050 /* The linker assigns locations for varyings and attributes,
2051 * including deprecated builtins (like gl_Color), user-assign
2052 * generic attributes (glBindVertexLocation), and
2053 * user-defined varyings.
2055 assert(var
->location
!= -1);
2056 entry
= new(mem_ctx
) variable_storage(var
,
2060 case ir_var_shader_out
:
2061 assert(var
->location
!= -1);
2062 entry
= new(mem_ctx
) variable_storage(var
,
2064 var
->location
+ var
->index
);
2066 case ir_var_system_value
:
2067 entry
= new(mem_ctx
) variable_storage(var
,
2068 PROGRAM_SYSTEM_VALUE
,
2072 case ir_var_temporary
:
2073 st_src_reg src
= get_temp(var
->type
);
2075 entry
= new(mem_ctx
) variable_storage(var
, src
.file
, src
.index
);
2076 this->variables
.push_tail(entry
);
2082 printf("Failed to make storage for %s\n", var
->name
);
2087 this->result
= st_src_reg(entry
->file
, entry
->index
, var
->type
);
2088 if (!native_integers
)
2089 this->result
.type
= GLSL_TYPE_FLOAT
;
2093 glsl_to_tgsi_visitor::visit(ir_dereference_array
*ir
)
2097 int element_size
= type_size(ir
->type
);
2099 index
= ir
->array_index
->constant_expression_value();
2101 ir
->array
->accept(this);
2105 src
.index
+= index
->value
.i
[0] * element_size
;
2107 /* Variable index array dereference. It eats the "vec4" of the
2108 * base of the array and an index that offsets the TGSI register
2111 ir
->array_index
->accept(this);
2113 st_src_reg index_reg
;
2115 if (element_size
== 1) {
2116 index_reg
= this->result
;
2118 index_reg
= get_temp(native_integers
?
2119 glsl_type::int_type
: glsl_type::float_type
);
2121 emit(ir
, TGSI_OPCODE_MUL
, st_dst_reg(index_reg
),
2122 this->result
, st_src_reg_for_type(index_reg
.type
, element_size
));
2125 /* If there was already a relative address register involved, add the
2126 * new and the old together to get the new offset.
2128 if (src
.reladdr
!= NULL
) {
2129 st_src_reg accum_reg
= get_temp(native_integers
?
2130 glsl_type::int_type
: glsl_type::float_type
);
2132 emit(ir
, TGSI_OPCODE_ADD
, st_dst_reg(accum_reg
),
2133 index_reg
, *src
.reladdr
);
2135 index_reg
= accum_reg
;
2138 src
.reladdr
= ralloc(mem_ctx
, st_src_reg
);
2139 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
2142 /* If the type is smaller than a vec4, replicate the last channel out. */
2143 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2144 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2146 src
.swizzle
= SWIZZLE_NOOP
;
2148 /* Change the register type to the element type of the array. */
2149 src
.type
= ir
->type
->base_type
;
2155 glsl_to_tgsi_visitor::visit(ir_dereference_record
*ir
)
2158 const glsl_type
*struct_type
= ir
->record
->type
;
2161 ir
->record
->accept(this);
2163 for (i
= 0; i
< struct_type
->length
; i
++) {
2164 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
2166 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
2169 /* If the type is smaller than a vec4, replicate the last channel out. */
2170 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
2171 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
2173 this->result
.swizzle
= SWIZZLE_NOOP
;
2175 this->result
.index
+= offset
;
2176 this->result
.type
= ir
->type
->base_type
;
2180 * We want to be careful in assignment setup to hit the actual storage
2181 * instead of potentially using a temporary like we might with the
2182 * ir_dereference handler.
2185 get_assignment_lhs(ir_dereference
*ir
, glsl_to_tgsi_visitor
*v
)
2187 /* The LHS must be a dereference. If the LHS is a variable indexed array
2188 * access of a vector, it must be separated into a series conditional moves
2189 * before reaching this point (see ir_vec_index_to_cond_assign).
2191 assert(ir
->as_dereference());
2192 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
2194 assert(!deref_array
->array
->type
->is_vector());
2197 /* Use the rvalue deref handler for the most part. We'll ignore
2198 * swizzles in it and write swizzles using writemask, though.
2201 return st_dst_reg(v
->result
);
2205 * Process the condition of a conditional assignment
2207 * Examines the condition of a conditional assignment to generate the optimal
2208 * first operand of a \c CMP instruction. If the condition is a relational
2209 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2210 * used as the source for the \c CMP instruction. Otherwise the comparison
2211 * is processed to a boolean result, and the boolean result is used as the
2212 * operand to the CMP instruction.
2215 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue
*ir
)
2217 ir_rvalue
*src_ir
= ir
;
2219 bool switch_order
= false;
2221 ir_expression
*const expr
= ir
->as_expression();
2222 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
2223 bool zero_on_left
= false;
2225 if (expr
->operands
[0]->is_zero()) {
2226 src_ir
= expr
->operands
[1];
2227 zero_on_left
= true;
2228 } else if (expr
->operands
[1]->is_zero()) {
2229 src_ir
= expr
->operands
[0];
2230 zero_on_left
= false;
2234 * (a < 0) T F F ( a < 0) T F F
2235 * (0 < a) F F T (-a < 0) F F T
2236 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2237 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2238 * (a > 0) F F T (-a < 0) F F T
2239 * (0 > a) T F F ( a < 0) T F F
2240 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2241 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2243 * Note that exchanging the order of 0 and 'a' in the comparison simply
2244 * means that the value of 'a' should be negated.
2247 switch (expr
->operation
) {
2249 switch_order
= false;
2250 negate
= zero_on_left
;
2253 case ir_binop_greater
:
2254 switch_order
= false;
2255 negate
= !zero_on_left
;
2258 case ir_binop_lequal
:
2259 switch_order
= true;
2260 negate
= !zero_on_left
;
2263 case ir_binop_gequal
:
2264 switch_order
= true;
2265 negate
= zero_on_left
;
2269 /* This isn't the right kind of comparison afterall, so make sure
2270 * the whole condition is visited.
2278 src_ir
->accept(this);
2280 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2281 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2282 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2283 * computing the condition.
2286 this->result
.negate
= ~this->result
.negate
;
2288 return switch_order
;
2292 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment
*ir
, const struct glsl_type
*type
,
2293 st_dst_reg
*l
, st_src_reg
*r
)
2295 if (type
->base_type
== GLSL_TYPE_STRUCT
) {
2296 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2297 emit_block_mov(ir
, type
->fields
.structure
[i
].type
, l
, r
);
2302 if (type
->is_array()) {
2303 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2304 emit_block_mov(ir
, type
->fields
.array
, l
, r
);
2309 if (type
->is_matrix()) {
2310 const struct glsl_type
*vec_type
;
2312 vec_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
,
2313 type
->vector_elements
, 1);
2315 for (int i
= 0; i
< type
->matrix_columns
; i
++) {
2316 emit_block_mov(ir
, vec_type
, l
, r
);
2321 assert(type
->is_scalar() || type
->is_vector());
2323 r
->type
= type
->base_type
;
2324 emit(ir
, TGSI_OPCODE_MOV
, *l
, *r
);
2330 glsl_to_tgsi_visitor::visit(ir_assignment
*ir
)
2336 ir
->rhs
->accept(this);
2339 l
= get_assignment_lhs(ir
->lhs
, this);
2341 /* FINISHME: This should really set to the correct maximal writemask for each
2342 * FINISHME: component written (in the loops below). This case can only
2343 * FINISHME: occur for matrices, arrays, and structures.
2345 if (ir
->write_mask
== 0) {
2346 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
2347 l
.writemask
= WRITEMASK_XYZW
;
2348 } else if (ir
->lhs
->type
->is_scalar() &&
2349 ir
->lhs
->variable_referenced()->mode
== ir_var_shader_out
) {
2350 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2351 * FINISHME: W component of fragment shader output zero, work correctly.
2353 l
.writemask
= WRITEMASK_XYZW
;
2356 int first_enabled_chan
= 0;
2359 l
.writemask
= ir
->write_mask
;
2361 for (int i
= 0; i
< 4; i
++) {
2362 if (l
.writemask
& (1 << i
)) {
2363 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
2368 /* Swizzle a small RHS vector into the channels being written.
2370 * glsl ir treats write_mask as dictating how many channels are
2371 * present on the RHS while TGSI treats write_mask as just
2372 * showing which channels of the vec4 RHS get written.
2374 for (int i
= 0; i
< 4; i
++) {
2375 if (l
.writemask
& (1 << i
))
2376 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
2378 swizzles
[i
] = first_enabled_chan
;
2380 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
2381 swizzles
[2], swizzles
[3]);
2384 assert(l
.file
!= PROGRAM_UNDEFINED
);
2385 assert(r
.file
!= PROGRAM_UNDEFINED
);
2387 if (ir
->condition
) {
2388 const bool switch_order
= this->process_move_condition(ir
->condition
);
2389 st_src_reg condition
= this->result
;
2391 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
2392 st_src_reg l_src
= st_src_reg(l
);
2393 st_src_reg condition_temp
= condition
;
2394 l_src
.swizzle
= swizzle_for_size(ir
->lhs
->type
->vector_elements
);
2396 if (native_integers
) {
2397 /* This is necessary because TGSI's CMP instruction expects the
2398 * condition to be a float, and we store booleans as integers.
2399 * If TGSI had a UCMP instruction or similar, this extra
2400 * instruction would not be necessary.
2402 condition_temp
= get_temp(glsl_type::vec4_type
);
2403 condition
.negate
= 0;
2404 emit(ir
, TGSI_OPCODE_I2F
, st_dst_reg(condition_temp
), condition
);
2405 condition_temp
.swizzle
= condition
.swizzle
;
2409 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, l_src
, r
);
2411 emit(ir
, TGSI_OPCODE_CMP
, l
, condition_temp
, r
, l_src
);
2417 } else if (ir
->rhs
->as_expression() &&
2418 this->instructions
.get_tail() &&
2419 ir
->rhs
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->ir
&&
2420 type_size(ir
->lhs
->type
) == 1 &&
2421 l
.writemask
== ((glsl_to_tgsi_instruction
*)this->instructions
.get_tail())->dst
.writemask
) {
2422 /* To avoid emitting an extra MOV when assigning an expression to a
2423 * variable, emit the last instruction of the expression again, but
2424 * replace the destination register with the target of the assignment.
2425 * Dead code elimination will remove the original instruction.
2427 glsl_to_tgsi_instruction
*inst
, *new_inst
;
2428 inst
= (glsl_to_tgsi_instruction
*)this->instructions
.get_tail();
2429 new_inst
= emit(ir
, inst
->op
, l
, inst
->src
[0], inst
->src
[1], inst
->src
[2]);
2430 new_inst
->saturate
= inst
->saturate
;
2431 inst
->dead_mask
= inst
->dst
.writemask
;
2433 emit_block_mov(ir
, ir
->rhs
->type
, &l
, &r
);
2439 glsl_to_tgsi_visitor::visit(ir_constant
*ir
)
2442 GLfloat stack_vals
[4] = { 0 };
2443 gl_constant_value
*values
= (gl_constant_value
*) stack_vals
;
2444 GLenum gl_type
= GL_NONE
;
2446 static int in_array
= 0;
2447 gl_register_file file
= in_array
? PROGRAM_CONSTANT
: PROGRAM_IMMEDIATE
;
2449 /* Unfortunately, 4 floats is all we can get into
2450 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2451 * aggregate constant and move each constant value into it. If we
2452 * get lucky, copy propagation will eliminate the extra moves.
2454 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
2455 st_src_reg temp_base
= get_temp(ir
->type
);
2456 st_dst_reg temp
= st_dst_reg(temp_base
);
2458 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
2459 ir_constant
*field_value
= (ir_constant
*)iter
.get();
2460 int size
= type_size(field_value
->type
);
2464 field_value
->accept(this);
2467 for (i
= 0; i
< (unsigned int)size
; i
++) {
2468 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2474 this->result
= temp_base
;
2478 if (ir
->type
->is_array()) {
2479 st_src_reg temp_base
= get_temp(ir
->type
);
2480 st_dst_reg temp
= st_dst_reg(temp_base
);
2481 int size
= type_size(ir
->type
->fields
.array
);
2486 for (i
= 0; i
< ir
->type
->length
; i
++) {
2487 ir
->array_elements
[i
]->accept(this);
2489 for (int j
= 0; j
< size
; j
++) {
2490 emit(ir
, TGSI_OPCODE_MOV
, temp
, src
);
2496 this->result
= temp_base
;
2501 if (ir
->type
->is_matrix()) {
2502 st_src_reg mat
= get_temp(ir
->type
);
2503 st_dst_reg mat_column
= st_dst_reg(mat
);
2505 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
2506 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
2507 values
= (gl_constant_value
*) &ir
->value
.f
[i
* ir
->type
->vector_elements
];
2509 src
= st_src_reg(file
, -1, ir
->type
->base_type
);
2510 src
.index
= add_constant(file
,
2512 ir
->type
->vector_elements
,
2515 emit(ir
, TGSI_OPCODE_MOV
, mat_column
, src
);
2524 switch (ir
->type
->base_type
) {
2525 case GLSL_TYPE_FLOAT
:
2527 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2528 values
[i
].f
= ir
->value
.f
[i
];
2531 case GLSL_TYPE_UINT
:
2532 gl_type
= native_integers
? GL_UNSIGNED_INT
: GL_FLOAT
;
2533 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2534 if (native_integers
)
2535 values
[i
].u
= ir
->value
.u
[i
];
2537 values
[i
].f
= ir
->value
.u
[i
];
2541 gl_type
= native_integers
? GL_INT
: GL_FLOAT
;
2542 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2543 if (native_integers
)
2544 values
[i
].i
= ir
->value
.i
[i
];
2546 values
[i
].f
= ir
->value
.i
[i
];
2549 case GLSL_TYPE_BOOL
:
2550 gl_type
= native_integers
? GL_BOOL
: GL_FLOAT
;
2551 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
2552 if (native_integers
)
2553 values
[i
].u
= ir
->value
.b
[i
] ? ~0 : 0;
2555 values
[i
].f
= ir
->value
.b
[i
];
2559 assert(!"Non-float/uint/int/bool constant");
2562 this->result
= st_src_reg(file
, -1, ir
->type
);
2563 this->result
.index
= add_constant(file
,
2565 ir
->type
->vector_elements
,
2567 &this->result
.swizzle
);
2571 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature
*sig
)
2573 function_entry
*entry
;
2575 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
2576 entry
= (function_entry
*)iter
.get();
2578 if (entry
->sig
== sig
)
2582 entry
= ralloc(mem_ctx
, function_entry
);
2584 entry
->sig_id
= this->next_signature_id
++;
2585 entry
->bgn_inst
= NULL
;
2587 /* Allocate storage for all the parameters. */
2588 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2589 ir_variable
*param
= (ir_variable
*)iter
.get();
2590 variable_storage
*storage
;
2592 storage
= find_variable_storage(param
);
2595 st_src_reg src
= get_temp(param
->type
);
2597 storage
= new(mem_ctx
) variable_storage(param
, src
.file
, src
.index
);
2598 this->variables
.push_tail(storage
);
2601 if (!sig
->return_type
->is_void()) {
2602 entry
->return_reg
= get_temp(sig
->return_type
);
2604 entry
->return_reg
= undef_src
;
2607 this->function_signatures
.push_tail(entry
);
2612 glsl_to_tgsi_visitor::visit(ir_call
*ir
)
2614 glsl_to_tgsi_instruction
*call_inst
;
2615 ir_function_signature
*sig
= ir
->callee
;
2616 function_entry
*entry
= get_function_signature(sig
);
2619 /* Process in parameters. */
2620 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2621 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2622 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2623 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2625 if (param
->mode
== ir_var_function_in
||
2626 param
->mode
== ir_var_function_inout
) {
2627 variable_storage
*storage
= find_variable_storage(param
);
2630 param_rval
->accept(this);
2631 st_src_reg r
= this->result
;
2634 l
.file
= storage
->file
;
2635 l
.index
= storage
->index
;
2637 l
.writemask
= WRITEMASK_XYZW
;
2638 l
.cond_mask
= COND_TR
;
2640 for (i
= 0; i
< type_size(param
->type
); i
++) {
2641 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2649 assert(!sig_iter
.has_next());
2651 /* Emit call instruction */
2652 call_inst
= emit(ir
, TGSI_OPCODE_CAL
);
2653 call_inst
->function
= entry
;
2655 /* Process out parameters. */
2656 sig_iter
= sig
->parameters
.iterator();
2657 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2658 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2659 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2661 if (param
->mode
== ir_var_function_out
||
2662 param
->mode
== ir_var_function_inout
) {
2663 variable_storage
*storage
= find_variable_storage(param
);
2667 r
.file
= storage
->file
;
2668 r
.index
= storage
->index
;
2670 r
.swizzle
= SWIZZLE_NOOP
;
2673 param_rval
->accept(this);
2674 st_dst_reg l
= st_dst_reg(this->result
);
2676 for (i
= 0; i
< type_size(param
->type
); i
++) {
2677 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2685 assert(!sig_iter
.has_next());
2687 /* Process return value. */
2688 this->result
= entry
->return_reg
;
2692 glsl_to_tgsi_visitor::visit(ir_texture
*ir
)
2694 st_src_reg result_src
, coord
, cube_sc
, lod_info
, projector
, dx
, dy
, offset
, sample_index
;
2695 st_dst_reg result_dst
, coord_dst
, cube_sc_dst
;
2696 glsl_to_tgsi_instruction
*inst
= NULL
;
2697 unsigned opcode
= TGSI_OPCODE_NOP
;
2698 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2699 bool is_cube_array
= false;
2701 /* if we are a cube array sampler */
2702 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
&&
2703 sampler_type
->sampler_array
)) {
2704 is_cube_array
= true;
2707 if (ir
->coordinate
) {
2708 ir
->coordinate
->accept(this);
2710 /* Put our coords in a temp. We'll need to modify them for shadow,
2711 * projection, or LOD, so the only case we'd use it as is is if
2712 * we're doing plain old texturing. The optimization passes on
2713 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2715 coord
= get_temp(glsl_type::vec4_type
);
2716 coord_dst
= st_dst_reg(coord
);
2717 coord_dst
.writemask
= (1 << ir
->coordinate
->type
->vector_elements
) - 1;
2718 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2721 if (ir
->projector
) {
2722 ir
->projector
->accept(this);
2723 projector
= this->result
;
2726 /* Storage for our result. Ideally for an assignment we'd be using
2727 * the actual storage for the result here, instead.
2729 result_src
= get_temp(ir
->type
);
2730 result_dst
= st_dst_reg(result_src
);
2734 opcode
= (is_cube_array
&& ir
->shadow_comparitor
) ? TGSI_OPCODE_TEX2
: TGSI_OPCODE_TEX
;
2736 ir
->offset
->accept(this);
2737 offset
= this->result
;
2741 opcode
= is_cube_array
? TGSI_OPCODE_TXB2
: TGSI_OPCODE_TXB
;
2742 ir
->lod_info
.bias
->accept(this);
2743 lod_info
= this->result
;
2745 ir
->offset
->accept(this);
2746 offset
= this->result
;
2750 opcode
= is_cube_array
? TGSI_OPCODE_TXL2
: TGSI_OPCODE_TXL
;
2751 ir
->lod_info
.lod
->accept(this);
2752 lod_info
= this->result
;
2754 ir
->offset
->accept(this);
2755 offset
= this->result
;
2759 opcode
= TGSI_OPCODE_TXD
;
2760 ir
->lod_info
.grad
.dPdx
->accept(this);
2762 ir
->lod_info
.grad
.dPdy
->accept(this);
2765 ir
->offset
->accept(this);
2766 offset
= this->result
;
2770 opcode
= TGSI_OPCODE_TXQ
;
2771 ir
->lod_info
.lod
->accept(this);
2772 lod_info
= this->result
;
2775 opcode
= TGSI_OPCODE_TXF
;
2776 ir
->lod_info
.lod
->accept(this);
2777 lod_info
= this->result
;
2779 ir
->offset
->accept(this);
2780 offset
= this->result
;
2784 opcode
= TGSI_OPCODE_TXF
;
2785 ir
->lod_info
.sample_index
->accept(this);
2786 sample_index
= this->result
;
2789 assert(!"Unexpected ir_lod opcode");
2793 if (ir
->projector
) {
2794 if (opcode
== TGSI_OPCODE_TEX
) {
2795 /* Slot the projector in as the last component of the coord. */
2796 coord_dst
.writemask
= WRITEMASK_W
;
2797 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, projector
);
2798 coord_dst
.writemask
= WRITEMASK_XYZW
;
2799 opcode
= TGSI_OPCODE_TXP
;
2801 st_src_reg coord_w
= coord
;
2802 coord_w
.swizzle
= SWIZZLE_WWWW
;
2804 /* For the other TEX opcodes there's no projective version
2805 * since the last slot is taken up by LOD info. Do the
2806 * projective divide now.
2808 coord_dst
.writemask
= WRITEMASK_W
;
2809 emit(ir
, TGSI_OPCODE_RCP
, coord_dst
, projector
);
2811 /* In the case where we have to project the coordinates "by hand,"
2812 * the shadow comparator value must also be projected.
2814 st_src_reg tmp_src
= coord
;
2815 if (ir
->shadow_comparitor
) {
2816 /* Slot the shadow value in as the second to last component of the
2819 ir
->shadow_comparitor
->accept(this);
2821 tmp_src
= get_temp(glsl_type::vec4_type
);
2822 st_dst_reg tmp_dst
= st_dst_reg(tmp_src
);
2824 /* Projective division not allowed for array samplers. */
2825 assert(!sampler_type
->sampler_array
);
2827 tmp_dst
.writemask
= WRITEMASK_Z
;
2828 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, this->result
);
2830 tmp_dst
.writemask
= WRITEMASK_XY
;
2831 emit(ir
, TGSI_OPCODE_MOV
, tmp_dst
, coord
);
2834 coord_dst
.writemask
= WRITEMASK_XYZ
;
2835 emit(ir
, TGSI_OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2837 coord_dst
.writemask
= WRITEMASK_XYZW
;
2838 coord
.swizzle
= SWIZZLE_XYZW
;
2842 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2843 * comparator was put in the correct place (and projected) by the code,
2844 * above, that handles by-hand projection.
2846 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== TGSI_OPCODE_TXP
)) {
2847 /* Slot the shadow value in as the second to last component of the
2850 ir
->shadow_comparitor
->accept(this);
2852 if (is_cube_array
) {
2853 cube_sc
= get_temp(glsl_type::float_type
);
2854 cube_sc_dst
= st_dst_reg(cube_sc
);
2855 cube_sc_dst
.writemask
= WRITEMASK_X
;
2856 emit(ir
, TGSI_OPCODE_MOV
, cube_sc_dst
, this->result
);
2857 cube_sc_dst
.writemask
= WRITEMASK_X
;
2860 if ((sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2861 sampler_type
->sampler_array
) ||
2862 sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_CUBE
) {
2863 coord_dst
.writemask
= WRITEMASK_W
;
2865 coord_dst
.writemask
= WRITEMASK_Z
;
2868 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, this->result
);
2869 coord_dst
.writemask
= WRITEMASK_XYZW
;
2873 if (ir
->op
== ir_txf_ms
) {
2874 coord_dst
.writemask
= WRITEMASK_W
;
2875 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, sample_index
);
2876 coord_dst
.writemask
= WRITEMASK_XYZW
;
2877 } else if (opcode
== TGSI_OPCODE_TXL
|| opcode
== TGSI_OPCODE_TXB
||
2878 opcode
== TGSI_OPCODE_TXF
) {
2879 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2880 coord_dst
.writemask
= WRITEMASK_W
;
2881 emit(ir
, TGSI_OPCODE_MOV
, coord_dst
, lod_info
);
2882 coord_dst
.writemask
= WRITEMASK_XYZW
;
2885 if (opcode
== TGSI_OPCODE_TXD
)
2886 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2887 else if (opcode
== TGSI_OPCODE_TXQ
)
2888 inst
= emit(ir
, opcode
, result_dst
, lod_info
);
2889 else if (opcode
== TGSI_OPCODE_TXF
) {
2890 inst
= emit(ir
, opcode
, result_dst
, coord
);
2891 } else if (opcode
== TGSI_OPCODE_TXL2
|| opcode
== TGSI_OPCODE_TXB2
) {
2892 inst
= emit(ir
, opcode
, result_dst
, coord
, lod_info
);
2893 } else if (opcode
== TGSI_OPCODE_TEX2
) {
2894 inst
= emit(ir
, opcode
, result_dst
, coord
, cube_sc
);
2896 inst
= emit(ir
, opcode
, result_dst
, coord
);
2898 if (ir
->shadow_comparitor
)
2899 inst
->tex_shadow
= GL_TRUE
;
2901 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2902 this->shader_program
,
2906 inst
->tex_offset_num_offset
= 1;
2907 inst
->tex_offsets
[0].Index
= offset
.index
;
2908 inst
->tex_offsets
[0].File
= offset
.file
;
2909 inst
->tex_offsets
[0].SwizzleX
= GET_SWZ(offset
.swizzle
, 0);
2910 inst
->tex_offsets
[0].SwizzleY
= GET_SWZ(offset
.swizzle
, 1);
2911 inst
->tex_offsets
[0].SwizzleZ
= GET_SWZ(offset
.swizzle
, 2);
2914 switch (sampler_type
->sampler_dimensionality
) {
2915 case GLSL_SAMPLER_DIM_1D
:
2916 inst
->tex_target
= (sampler_type
->sampler_array
)
2917 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2919 case GLSL_SAMPLER_DIM_2D
:
2920 inst
->tex_target
= (sampler_type
->sampler_array
)
2921 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2923 case GLSL_SAMPLER_DIM_3D
:
2924 inst
->tex_target
= TEXTURE_3D_INDEX
;
2926 case GLSL_SAMPLER_DIM_CUBE
:
2927 inst
->tex_target
= (sampler_type
->sampler_array
)
2928 ? TEXTURE_CUBE_ARRAY_INDEX
: TEXTURE_CUBE_INDEX
;
2930 case GLSL_SAMPLER_DIM_RECT
:
2931 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2933 case GLSL_SAMPLER_DIM_BUF
:
2934 inst
->tex_target
= TEXTURE_BUFFER_INDEX
;
2936 case GLSL_SAMPLER_DIM_EXTERNAL
:
2937 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2939 case GLSL_SAMPLER_DIM_MS
:
2940 inst
->tex_target
= (sampler_type
->sampler_array
)
2941 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX
: TEXTURE_2D_MULTISAMPLE_INDEX
;
2944 assert(!"Should not get here.");
2947 this->result
= result_src
;
2951 glsl_to_tgsi_visitor::visit(ir_return
*ir
)
2953 if (ir
->get_value()) {
2957 assert(current_function
);
2959 ir
->get_value()->accept(this);
2960 st_src_reg r
= this->result
;
2962 l
= st_dst_reg(current_function
->return_reg
);
2964 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2965 emit(ir
, TGSI_OPCODE_MOV
, l
, r
);
2971 emit(ir
, TGSI_OPCODE_RET
);
2975 glsl_to_tgsi_visitor::visit(ir_discard
*ir
)
2977 if (ir
->condition
) {
2978 ir
->condition
->accept(this);
2979 this->result
.negate
= ~this->result
.negate
;
2980 emit(ir
, TGSI_OPCODE_KIL
, undef_dst
, this->result
);
2982 emit(ir
, TGSI_OPCODE_KILP
);
2987 glsl_to_tgsi_visitor::visit(ir_if
*ir
)
2990 glsl_to_tgsi_instruction
*if_inst
;
2992 ir
->condition
->accept(this);
2993 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2995 if_opcode
= native_integers
? TGSI_OPCODE_UIF
: TGSI_OPCODE_IF
;
2997 if_inst
= emit(ir
->condition
, if_opcode
, undef_dst
, this->result
);
2999 this->instructions
.push_tail(if_inst
);
3001 visit_exec_list(&ir
->then_instructions
, this);
3003 if (!ir
->else_instructions
.is_empty()) {
3004 emit(ir
->condition
, TGSI_OPCODE_ELSE
);
3005 visit_exec_list(&ir
->else_instructions
, this);
3008 if_inst
= emit(ir
->condition
, TGSI_OPCODE_ENDIF
);
3011 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3013 result
.file
= PROGRAM_UNDEFINED
;
3016 next_signature_id
= 1;
3018 current_function
= NULL
;
3019 num_address_regs
= 0;
3021 indirect_addr_consts
= false;
3023 native_integers
= false;
3024 mem_ctx
= ralloc_context(NULL
);
3027 shader_program
= NULL
;
3031 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3033 ralloc_free(mem_ctx
);
3036 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor
*v
)
3043 * Count resources used by the given gpu program (number of texture
3047 count_resources(glsl_to_tgsi_visitor
*v
, gl_program
*prog
)
3049 v
->samplers_used
= 0;
3051 foreach_iter(exec_list_iterator
, iter
, v
->instructions
) {
3052 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3054 if (is_tex_instruction(inst
->op
)) {
3055 v
->samplers_used
|= 1 << inst
->sampler
;
3057 if (inst
->tex_shadow
) {
3058 prog
->ShadowSamplers
|= 1 << inst
->sampler
;
3063 prog
->SamplersUsed
= v
->samplers_used
;
3065 if (v
->shader_program
!= NULL
)
3066 _mesa_update_shader_textures_used(v
->shader_program
, prog
);
3070 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
3071 struct gl_shader_program
*shader_program
,
3072 const char *name
, const glsl_type
*type
,
3075 if (type
->is_record()) {
3076 ir_constant
*field_constant
;
3078 field_constant
= (ir_constant
*)val
->components
.get_head();
3080 for (unsigned int i
= 0; i
< type
->length
; i
++) {
3081 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
3082 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
3083 type
->fields
.structure
[i
].name
);
3084 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
3085 field_type
, field_constant
);
3086 field_constant
= (ir_constant
*)field_constant
->next
;
3092 unsigned index
= _mesa_get_uniform_location(ctx
, shader_program
, name
,
3094 if (offset
== GL_INVALID_INDEX
) {
3095 fail_link(shader_program
,
3096 "Couldn't find uniform for initializer %s\n", name
);
3099 int loc
= _mesa_uniform_merge_location_offset(index
, offset
);
3101 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
3102 ir_constant
*element
;
3103 const glsl_type
*element_type
;
3104 if (type
->is_array()) {
3105 element
= val
->array_elements
[i
];
3106 element_type
= type
->fields
.array
;
3109 element_type
= type
;
3114 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
3115 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
3116 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
3117 conv
[j
] = element
->value
.b
[j
];
3119 values
= (void *)conv
;
3120 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
3121 element_type
->vector_elements
,
3124 values
= &element
->value
;
3127 if (element_type
->is_matrix()) {
3128 _mesa_uniform_matrix(ctx
, shader_program
,
3129 element_type
->matrix_columns
,
3130 element_type
->vector_elements
,
3131 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
3133 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
3134 values
, element_type
->gl_type
);
3142 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3143 * are read from the given src in this instruction
3146 get_src_arg_mask(st_dst_reg dst
, st_src_reg src
)
3148 int read_mask
= 0, comp
;
3150 /* Now, given the src swizzle and the written channels, find which
3151 * components are actually read
3153 for (comp
= 0; comp
< 4; ++comp
) {
3154 const unsigned coord
= GET_SWZ(src
.swizzle
, comp
);
3156 if (dst
.writemask
& (1 << comp
) && coord
<= SWIZZLE_W
)
3157 read_mask
|= 1 << coord
;
3164 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3165 * instruction is the first instruction to write to register T0. There are
3166 * several lowering passes done in GLSL IR (e.g. branches and
3167 * relative addressing) that create a large number of conditional assignments
3168 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3170 * Here is why this conversion is safe:
3171 * CMP T0, T1 T2 T0 can be expanded to:
3177 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3178 * as the original program. If (T1 < 0.0) evaluates to false, executing
3179 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3180 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3181 * because any instruction that was going to read from T0 after this was going
3182 * to read a garbage value anyway.
3185 glsl_to_tgsi_visitor::simplify_cmp(void)
3187 unsigned *tempWrites
;
3188 unsigned outputWrites
[MAX_PROGRAM_OUTPUTS
];
3190 tempWrites
= new unsigned[MAX_TEMPS
];
3194 memset(tempWrites
, 0, sizeof(unsigned) * MAX_TEMPS
);
3195 memset(outputWrites
, 0, sizeof(outputWrites
));
3197 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3198 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3199 unsigned prevWriteMask
= 0;
3201 /* Give up if we encounter relative addressing or flow control. */
3202 if (inst
->dst
.reladdr
||
3203 tgsi_get_opcode_info(inst
->op
)->is_branch
||
3204 inst
->op
== TGSI_OPCODE_BGNSUB
||
3205 inst
->op
== TGSI_OPCODE_CONT
||
3206 inst
->op
== TGSI_OPCODE_END
||
3207 inst
->op
== TGSI_OPCODE_ENDSUB
||
3208 inst
->op
== TGSI_OPCODE_RET
) {
3212 if (inst
->dst
.file
== PROGRAM_OUTPUT
) {
3213 assert(inst
->dst
.index
< MAX_PROGRAM_OUTPUTS
);
3214 prevWriteMask
= outputWrites
[inst
->dst
.index
];
3215 outputWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3216 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3217 assert(inst
->dst
.index
< MAX_TEMPS
);
3218 prevWriteMask
= tempWrites
[inst
->dst
.index
];
3219 tempWrites
[inst
->dst
.index
] |= inst
->dst
.writemask
;
3223 /* For a CMP to be considered a conditional write, the destination
3224 * register and source register two must be the same. */
3225 if (inst
->op
== TGSI_OPCODE_CMP
3226 && !(inst
->dst
.writemask
& prevWriteMask
)
3227 && inst
->src
[2].file
== inst
->dst
.file
3228 && inst
->src
[2].index
== inst
->dst
.index
3229 && inst
->dst
.writemask
== get_src_arg_mask(inst
->dst
, inst
->src
[2])) {
3231 inst
->op
= TGSI_OPCODE_MOV
;
3232 inst
->src
[0] = inst
->src
[1];
3236 delete [] tempWrites
;
3239 /* Replaces all references to a temporary register index with another index. */
3241 glsl_to_tgsi_visitor::rename_temp_register(int index
, int new_index
)
3243 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3244 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3247 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3248 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3249 inst
->src
[j
].index
== index
) {
3250 inst
->src
[j
].index
= new_index
;
3254 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3255 inst
->dst
.index
= new_index
;
3261 glsl_to_tgsi_visitor::get_first_temp_read(int index
)
3263 int depth
= 0; /* loop depth */
3264 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3267 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3268 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3270 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3271 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3272 inst
->src
[j
].index
== index
) {
3273 return (depth
== 0) ? i
: loop_start
;
3277 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3280 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3293 glsl_to_tgsi_visitor::get_first_temp_write(int index
)
3295 int depth
= 0; /* loop depth */
3296 int loop_start
= -1; /* index of the first active BGNLOOP (if any) */
3299 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3300 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3302 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
) {
3303 return (depth
== 0) ? i
: loop_start
;
3306 if (inst
->op
== TGSI_OPCODE_BGNLOOP
) {
3309 } else if (inst
->op
== TGSI_OPCODE_ENDLOOP
) {
3322 glsl_to_tgsi_visitor::get_last_temp_read(int index
)
3324 int depth
= 0; /* loop depth */
3325 int last
= -1; /* index of last instruction that reads the temporary */
3328 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3329 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3331 for (j
=0; j
< num_inst_src_regs(inst
->op
); j
++) {
3332 if (inst
->src
[j
].file
== PROGRAM_TEMPORARY
&&
3333 inst
->src
[j
].index
== index
) {
3334 last
= (depth
== 0) ? i
: -2;
3338 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3340 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3341 if (--depth
== 0 && last
== -2)
3353 glsl_to_tgsi_visitor::get_last_temp_write(int index
)
3355 int depth
= 0; /* loop depth */
3356 int last
= -1; /* index of last instruction that writes to the temporary */
3359 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3360 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3362 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== index
)
3363 last
= (depth
== 0) ? i
: -2;
3365 if (inst
->op
== TGSI_OPCODE_BGNLOOP
)
3367 else if (inst
->op
== TGSI_OPCODE_ENDLOOP
)
3368 if (--depth
== 0 && last
== -2)
3380 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3381 * channels for copy propagation and updates following instructions to
3382 * use the original versions.
3384 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3385 * will occur. As an example, a TXP production before this pass:
3387 * 0: MOV TEMP[1], INPUT[4].xyyy;
3388 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3389 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3393 * 0: MOV TEMP[1], INPUT[4].xyyy;
3394 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3395 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3397 * which allows for dead code elimination on TEMP[1]'s writes.
3400 glsl_to_tgsi_visitor::copy_propagate(void)
3402 glsl_to_tgsi_instruction
**acp
= rzalloc_array(mem_ctx
,
3403 glsl_to_tgsi_instruction
*,
3404 this->next_temp
* 4);
3405 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3408 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3409 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3411 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3412 || inst
->dst
.index
< this->next_temp
);
3414 /* First, do any copy propagation possible into the src regs. */
3415 for (int r
= 0; r
< 3; r
++) {
3416 glsl_to_tgsi_instruction
*first
= NULL
;
3418 int acp_base
= inst
->src
[r
].index
* 4;
3420 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
3421 inst
->src
[r
].reladdr
)
3424 /* See if we can find entries in the ACP consisting of MOVs
3425 * from the same src register for all the swizzled channels
3426 * of this src register reference.
3428 for (int i
= 0; i
< 4; i
++) {
3429 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3430 glsl_to_tgsi_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
3437 assert(acp_level
[acp_base
+ src_chan
] <= level
);
3442 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
3443 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
3451 /* We've now validated that we can copy-propagate to
3452 * replace this src register reference. Do it.
3454 inst
->src
[r
].file
= first
->src
[0].file
;
3455 inst
->src
[r
].index
= first
->src
[0].index
;
3458 for (int i
= 0; i
< 4; i
++) {
3459 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
3460 glsl_to_tgsi_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
3461 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
3464 inst
->src
[r
].swizzle
= swizzle
;
3469 case TGSI_OPCODE_BGNLOOP
:
3470 case TGSI_OPCODE_ENDLOOP
:
3471 /* End of a basic block, clear the ACP entirely. */
3472 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3475 case TGSI_OPCODE_IF
:
3476 case TGSI_OPCODE_UIF
:
3480 case TGSI_OPCODE_ENDIF
:
3481 case TGSI_OPCODE_ELSE
:
3482 /* Clear all channels written inside the block from the ACP, but
3483 * leaving those that were not touched.
3485 for (int r
= 0; r
< this->next_temp
; r
++) {
3486 for (int c
= 0; c
< 4; c
++) {
3487 if (!acp
[4 * r
+ c
])
3490 if (acp_level
[4 * r
+ c
] >= level
)
3491 acp
[4 * r
+ c
] = NULL
;
3494 if (inst
->op
== TGSI_OPCODE_ENDIF
)
3499 /* Continuing the block, clear any written channels from
3502 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
3503 /* Any temporary might be written, so no copy propagation
3504 * across this instruction.
3506 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
3507 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
3508 inst
->dst
.reladdr
) {
3509 /* Any output might be written, so no copy propagation
3510 * from outputs across this instruction.
3512 for (int r
= 0; r
< this->next_temp
; r
++) {
3513 for (int c
= 0; c
< 4; c
++) {
3514 if (!acp
[4 * r
+ c
])
3517 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
3518 acp
[4 * r
+ c
] = NULL
;
3521 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
3522 inst
->dst
.file
== PROGRAM_OUTPUT
) {
3523 /* Clear where it's used as dst. */
3524 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
3525 for (int c
= 0; c
< 4; c
++) {
3526 if (inst
->dst
.writemask
& (1 << c
)) {
3527 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
3532 /* Clear where it's used as src. */
3533 for (int r
= 0; r
< this->next_temp
; r
++) {
3534 for (int c
= 0; c
< 4; c
++) {
3535 if (!acp
[4 * r
+ c
])
3538 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
3540 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
3541 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
3542 inst
->dst
.writemask
& (1 << src_chan
))
3544 acp
[4 * r
+ c
] = NULL
;
3552 /* If this is a copy, add it to the ACP. */
3553 if (inst
->op
== TGSI_OPCODE_MOV
&&
3554 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3555 !inst
->dst
.reladdr
&&
3557 !inst
->src
[0].reladdr
&&
3558 !inst
->src
[0].negate
) {
3559 for (int i
= 0; i
< 4; i
++) {
3560 if (inst
->dst
.writemask
& (1 << i
)) {
3561 acp
[4 * inst
->dst
.index
+ i
] = inst
;
3562 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
3568 ralloc_free(acp_level
);
3573 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3575 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3576 * will occur. As an example, a TXP production after copy propagation but
3579 * 0: MOV TEMP[1], INPUT[4].xyyy;
3580 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3581 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3583 * and after this pass:
3585 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3587 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3588 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3591 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3595 for (i
=0; i
< this->next_temp
; i
++) {
3596 int last_read
= get_last_temp_read(i
);
3599 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3600 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3602 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.index
== i
&&
3615 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3616 * code elimination. This is less primitive than eliminate_dead_code(), as it
3617 * is per-channel and can detect consecutive writes without a read between them
3618 * as dead code. However, there is some dead code that can be eliminated by
3619 * eliminate_dead_code() but not this function - for example, this function
3620 * cannot eliminate an instruction writing to a register that is never read and
3621 * is the only instruction writing to that register.
3623 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3627 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3629 glsl_to_tgsi_instruction
**writes
= rzalloc_array(mem_ctx
,
3630 glsl_to_tgsi_instruction
*,
3631 this->next_temp
* 4);
3632 int *write_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
3636 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3637 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3639 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
3640 || inst
->dst
.index
< this->next_temp
);
3643 case TGSI_OPCODE_BGNLOOP
:
3644 case TGSI_OPCODE_ENDLOOP
:
3645 case TGSI_OPCODE_CONT
:
3646 case TGSI_OPCODE_BRK
:
3647 /* End of a basic block, clear the write array entirely.
3649 * This keeps us from killing dead code when the writes are
3650 * on either side of a loop, even when the register isn't touched
3651 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3652 * dead code of this type, so it shouldn't make a difference as long as
3653 * the dead code elimination pass in the GLSL compiler does its job.
3655 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3658 case TGSI_OPCODE_ENDIF
:
3659 case TGSI_OPCODE_ELSE
:
3660 /* Promote the recorded level of all channels written inside the
3661 * preceding if or else block to the level above the if/else block.
3663 for (int r
= 0; r
< this->next_temp
; r
++) {
3664 for (int c
= 0; c
< 4; c
++) {
3665 if (!writes
[4 * r
+ c
])
3668 if (write_level
[4 * r
+ c
] == level
)
3669 write_level
[4 * r
+ c
] = level
-1;
3673 if(inst
->op
== TGSI_OPCODE_ENDIF
)
3678 case TGSI_OPCODE_IF
:
3679 case TGSI_OPCODE_UIF
:
3681 /* fallthrough to default case to mark the condition as read */
3684 /* Continuing the block, clear any channels from the write array that
3685 * are read by this instruction.
3687 for (unsigned i
= 0; i
< Elements(inst
->src
); i
++) {
3688 if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
&& inst
->src
[i
].reladdr
){
3689 /* Any temporary might be read, so no dead code elimination
3690 * across this instruction.
3692 memset(writes
, 0, sizeof(*writes
) * this->next_temp
* 4);
3693 } else if (inst
->src
[i
].file
== PROGRAM_TEMPORARY
) {
3694 /* Clear where it's used as src. */
3695 int src_chans
= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 0);
3696 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 1);
3697 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 2);
3698 src_chans
|= 1 << GET_SWZ(inst
->src
[i
].swizzle
, 3);
3700 for (int c
= 0; c
< 4; c
++) {
3701 if (src_chans
& (1 << c
)) {
3702 writes
[4 * inst
->src
[i
].index
+ c
] = NULL
;
3710 /* If this instruction writes to a temporary, add it to the write array.
3711 * If there is already an instruction in the write array for one or more
3712 * of the channels, flag that channel write as dead.
3714 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&&
3715 !inst
->dst
.reladdr
&&
3717 for (int c
= 0; c
< 4; c
++) {
3718 if (inst
->dst
.writemask
& (1 << c
)) {
3719 if (writes
[4 * inst
->dst
.index
+ c
]) {
3720 if (write_level
[4 * inst
->dst
.index
+ c
] < level
)
3723 writes
[4 * inst
->dst
.index
+ c
]->dead_mask
|= (1 << c
);
3725 writes
[4 * inst
->dst
.index
+ c
] = inst
;
3726 write_level
[4 * inst
->dst
.index
+ c
] = level
;
3732 /* Anything still in the write array at this point is dead code. */
3733 for (int r
= 0; r
< this->next_temp
; r
++) {
3734 for (int c
= 0; c
< 4; c
++) {
3735 glsl_to_tgsi_instruction
*inst
= writes
[4 * r
+ c
];
3737 inst
->dead_mask
|= (1 << c
);
3741 /* Now actually remove the instructions that are completely dead and update
3742 * the writemask of other instructions with dead channels.
3744 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
3745 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3747 if (!inst
->dead_mask
|| !inst
->dst
.writemask
)
3749 else if ((inst
->dst
.writemask
& ~inst
->dead_mask
) == 0) {
3754 inst
->dst
.writemask
&= ~(inst
->dead_mask
);
3757 ralloc_free(write_level
);
3758 ralloc_free(writes
);
3763 /* Merges temporary registers together where possible to reduce the number of
3764 * registers needed to run a program.
3766 * Produces optimal code only after copy propagation and dead code elimination
3769 glsl_to_tgsi_visitor::merge_registers(void)
3771 int *last_reads
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3772 int *first_writes
= rzalloc_array(mem_ctx
, int, this->next_temp
);
3775 /* Read the indices of the last read and first write to each temp register
3776 * into an array so that we don't have to traverse the instruction list as
3778 for (i
=0; i
< this->next_temp
; i
++) {
3779 last_reads
[i
] = get_last_temp_read(i
);
3780 first_writes
[i
] = get_first_temp_write(i
);
3783 /* Start looking for registers with non-overlapping usages that can be
3784 * merged together. */
3785 for (i
=0; i
< this->next_temp
; i
++) {
3786 /* Don't touch unused registers. */
3787 if (last_reads
[i
] < 0 || first_writes
[i
] < 0) continue;
3789 for (j
=0; j
< this->next_temp
; j
++) {
3790 /* Don't touch unused registers. */
3791 if (last_reads
[j
] < 0 || first_writes
[j
] < 0) continue;
3793 /* We can merge the two registers if the first write to j is after or
3794 * in the same instruction as the last read from i. Note that the
3795 * register at index i will always be used earlier or at the same time
3796 * as the register at index j. */
3797 if (first_writes
[i
] <= first_writes
[j
] &&
3798 last_reads
[i
] <= first_writes
[j
])
3800 rename_temp_register(j
, i
); /* Replace all references to j with i.*/
3802 /* Update the first_writes and last_reads arrays with the new
3803 * values for the merged register index, and mark the newly unused
3804 * register index as such. */
3805 last_reads
[i
] = last_reads
[j
];
3806 first_writes
[j
] = -1;
3812 ralloc_free(last_reads
);
3813 ralloc_free(first_writes
);
3816 /* Reassign indices to temporary registers by reusing unused indices created
3817 * by optimization passes. */
3819 glsl_to_tgsi_visitor::renumber_registers(void)
3824 for (i
=0; i
< this->next_temp
; i
++) {
3825 if (get_first_temp_read(i
) < 0) continue;
3827 rename_temp_register(i
, new_index
);
3831 this->next_temp
= new_index
;
3835 * Returns a fragment program which implements the current pixel transfer ops.
3836 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3839 get_pixel_transfer_visitor(struct st_fragment_program
*fp
,
3840 glsl_to_tgsi_visitor
*original
,
3841 int scale_and_bias
, int pixel_maps
)
3843 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3844 struct st_context
*st
= st_context(original
->ctx
);
3845 struct gl_program
*prog
= &fp
->Base
.Base
;
3846 struct gl_program_parameter_list
*params
= _mesa_new_parameter_list();
3847 st_src_reg coord
, src0
;
3849 glsl_to_tgsi_instruction
*inst
;
3851 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3852 v
->ctx
= original
->ctx
;
3854 v
->shader_program
= NULL
;
3855 v
->glsl_version
= original
->glsl_version
;
3856 v
->native_integers
= original
->native_integers
;
3857 v
->options
= original
->options
;
3858 v
->next_temp
= original
->next_temp
;
3859 v
->num_address_regs
= original
->num_address_regs
;
3860 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3861 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3862 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3863 v
->num_immediates
= original
->num_immediates
;
3866 * Get initial pixel color from the texture.
3867 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3869 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3870 src0
= v
->get_temp(glsl_type::vec4_type
);
3871 dst0
= st_dst_reg(src0
);
3872 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
3874 inst
->tex_target
= TEXTURE_2D_INDEX
;
3876 prog
->InputsRead
|= VARYING_BIT_TEX0
;
3877 prog
->SamplersUsed
|= (1 << 0); /* mark sampler 0 as used */
3878 v
->samplers_used
|= (1 << 0);
3880 if (scale_and_bias
) {
3881 static const gl_state_index scale_state
[STATE_LENGTH
] =
3882 { STATE_INTERNAL
, STATE_PT_SCALE
,
3883 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3884 static const gl_state_index bias_state
[STATE_LENGTH
] =
3885 { STATE_INTERNAL
, STATE_PT_BIAS
,
3886 (gl_state_index
) 0, (gl_state_index
) 0, (gl_state_index
) 0 };
3887 GLint scale_p
, bias_p
;
3888 st_src_reg scale
, bias
;
3890 scale_p
= _mesa_add_state_reference(params
, scale_state
);
3891 bias_p
= _mesa_add_state_reference(params
, bias_state
);
3893 /* MAD colorTemp, colorTemp, scale, bias; */
3894 scale
= st_src_reg(PROGRAM_STATE_VAR
, scale_p
, GLSL_TYPE_FLOAT
);
3895 bias
= st_src_reg(PROGRAM_STATE_VAR
, bias_p
, GLSL_TYPE_FLOAT
);
3896 inst
= v
->emit(NULL
, TGSI_OPCODE_MAD
, dst0
, src0
, scale
, bias
);
3900 st_src_reg temp
= v
->get_temp(glsl_type::vec4_type
);
3901 st_dst_reg temp_dst
= st_dst_reg(temp
);
3903 assert(st
->pixel_xfer
.pixelmap_texture
);
3905 /* With a little effort, we can do four pixel map look-ups with
3906 * two TEX instructions:
3909 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3910 temp_dst
.writemask
= WRITEMASK_XY
; /* write R,G */
3911 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3913 inst
->tex_target
= TEXTURE_2D_INDEX
;
3915 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3916 src0
.swizzle
= MAKE_SWIZZLE4(SWIZZLE_Z
, SWIZZLE_W
, SWIZZLE_Z
, SWIZZLE_W
);
3917 temp_dst
.writemask
= WRITEMASK_ZW
; /* write B,A */
3918 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, temp_dst
, src0
);
3920 inst
->tex_target
= TEXTURE_2D_INDEX
;
3922 prog
->SamplersUsed
|= (1 << 1); /* mark sampler 1 as used */
3923 v
->samplers_used
|= (1 << 1);
3925 /* MOV colorTemp, temp; */
3926 inst
= v
->emit(NULL
, TGSI_OPCODE_MOV
, dst0
, temp
);
3929 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3931 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
3932 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
3933 glsl_to_tgsi_instruction
*newinst
;
3934 st_src_reg src_regs
[3];
3936 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
3937 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
3939 for (int i
=0; i
<3; i
++) {
3940 src_regs
[i
] = inst
->src
[i
];
3941 if (src_regs
[i
].file
== PROGRAM_INPUT
&&
3942 src_regs
[i
].index
== VARYING_SLOT_COL0
)
3944 src_regs
[i
].file
= PROGRAM_TEMPORARY
;
3945 src_regs
[i
].index
= src0
.index
;
3947 else if (src_regs
[i
].file
== PROGRAM_INPUT
)
3948 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
3951 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
3952 newinst
->tex_target
= inst
->tex_target
;
3955 /* Make modifications to fragment program info. */
3956 prog
->Parameters
= _mesa_combine_parameter_lists(params
,
3957 original
->prog
->Parameters
);
3958 _mesa_free_parameter_list(params
);
3959 count_resources(v
, prog
);
3960 fp
->glsl_to_tgsi
= v
;
3964 * Make fragment program for glBitmap:
3965 * Sample the texture and kill the fragment if the bit is 0.
3966 * This program will be combined with the user's fragment program.
3968 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3971 get_bitmap_visitor(struct st_fragment_program
*fp
,
3972 glsl_to_tgsi_visitor
*original
, int samplerIndex
)
3974 glsl_to_tgsi_visitor
*v
= new glsl_to_tgsi_visitor();
3975 struct st_context
*st
= st_context(original
->ctx
);
3976 struct gl_program
*prog
= &fp
->Base
.Base
;
3977 st_src_reg coord
, src0
;
3979 glsl_to_tgsi_instruction
*inst
;
3981 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3982 v
->ctx
= original
->ctx
;
3984 v
->shader_program
= NULL
;
3985 v
->glsl_version
= original
->glsl_version
;
3986 v
->native_integers
= original
->native_integers
;
3987 v
->options
= original
->options
;
3988 v
->next_temp
= original
->next_temp
;
3989 v
->num_address_regs
= original
->num_address_regs
;
3990 v
->samplers_used
= prog
->SamplersUsed
= original
->samplers_used
;
3991 v
->indirect_addr_consts
= original
->indirect_addr_consts
;
3992 memcpy(&v
->immediates
, &original
->immediates
, sizeof(v
->immediates
));
3993 v
->num_immediates
= original
->num_immediates
;
3995 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
3996 coord
= st_src_reg(PROGRAM_INPUT
, VARYING_SLOT_TEX0
, glsl_type::vec2_type
);
3997 src0
= v
->get_temp(glsl_type::vec4_type
);
3998 dst0
= st_dst_reg(src0
);
3999 inst
= v
->emit(NULL
, TGSI_OPCODE_TEX
, dst0
, coord
);
4000 inst
->sampler
= samplerIndex
;
4001 inst
->tex_target
= TEXTURE_2D_INDEX
;
4003 prog
->InputsRead
|= VARYING_BIT_TEX0
;
4004 prog
->SamplersUsed
|= (1 << samplerIndex
); /* mark sampler as used */
4005 v
->samplers_used
|= (1 << samplerIndex
);
4007 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4008 src0
.negate
= NEGATE_XYZW
;
4009 if (st
->bitmap
.tex_format
== PIPE_FORMAT_L8_UNORM
)
4010 src0
.swizzle
= SWIZZLE_XXXX
;
4011 inst
= v
->emit(NULL
, TGSI_OPCODE_KIL
, undef_dst
, src0
);
4013 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4015 foreach_iter(exec_list_iterator
, iter
, original
->instructions
) {
4016 glsl_to_tgsi_instruction
*inst
= (glsl_to_tgsi_instruction
*)iter
.get();
4017 glsl_to_tgsi_instruction
*newinst
;
4018 st_src_reg src_regs
[3];
4020 if (inst
->dst
.file
== PROGRAM_OUTPUT
)
4021 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->dst
.index
);
4023 for (int i
=0; i
<3; i
++) {
4024 src_regs
[i
] = inst
->src
[i
];
4025 if (src_regs
[i
].file
== PROGRAM_INPUT
)
4026 prog
->InputsRead
|= BITFIELD64_BIT(src_regs
[i
].index
);
4029 newinst
= v
->emit(NULL
, inst
->op
, inst
->dst
, src_regs
[0], src_regs
[1], src_regs
[2]);
4030 newinst
->tex_target
= inst
->tex_target
;
4033 /* Make modifications to fragment program info. */
4034 prog
->Parameters
= _mesa_clone_parameter_list(original
->prog
->Parameters
);
4035 count_resources(v
, prog
);
4036 fp
->glsl_to_tgsi
= v
;
4039 /* ------------------------- TGSI conversion stuff -------------------------- */
4041 unsigned branch_target
;
4046 * Intermediate state used during shader translation.
4048 struct st_translate
{
4049 struct ureg_program
*ureg
;
4051 struct ureg_dst temps
[MAX_TEMPS
];
4052 struct ureg_dst arrays
[MAX_ARRAYS
];
4053 struct ureg_src
*constants
;
4054 struct ureg_src
*immediates
;
4055 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
4056 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
4057 struct ureg_dst address
[1];
4058 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
4059 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
4061 unsigned array_sizes
[MAX_ARRAYS
];
4063 const GLuint
*inputMapping
;
4064 const GLuint
*outputMapping
;
4066 /* For every instruction that contains a label (eg CALL), keep
4067 * details so that we can go back afterwards and emit the correct
4068 * tgsi instruction number for each label.
4070 struct label
*labels
;
4071 unsigned labels_size
;
4072 unsigned labels_count
;
4074 /* Keep a record of the tgsi instruction number that each mesa
4075 * instruction starts at, will be used to fix up labels after
4080 unsigned insn_count
;
4082 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4087 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4088 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
4090 TGSI_SEMANTIC_VERTEXID
,
4091 TGSI_SEMANTIC_INSTANCEID
4095 * Make note of a branch to a label in the TGSI code.
4096 * After we've emitted all instructions, we'll go over the list
4097 * of labels built here and patch the TGSI code with the actual
4098 * location of each label.
4100 static unsigned *get_label(struct st_translate
*t
, unsigned branch_target
)
4104 if (t
->labels_count
+ 1 >= t
->labels_size
) {
4105 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
4106 t
->labels
= (struct label
*)realloc(t
->labels
,
4107 t
->labels_size
* sizeof(struct label
));
4108 if (t
->labels
== NULL
) {
4109 static unsigned dummy
;
4115 i
= t
->labels_count
++;
4116 t
->labels
[i
].branch_target
= branch_target
;
4117 return &t
->labels
[i
].token
;
4121 * Called prior to emitting the TGSI code for each instruction.
4122 * Allocate additional space for instructions if needed.
4123 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4124 * the next TGSI instruction.
4126 static void set_insn_start(struct st_translate
*t
, unsigned start
)
4128 if (t
->insn_count
+ 1 >= t
->insn_size
) {
4129 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
4130 t
->insn
= (unsigned *)realloc(t
->insn
, t
->insn_size
* sizeof(t
->insn
[0]));
4131 if (t
->insn
== NULL
) {
4137 t
->insn
[t
->insn_count
++] = start
;
4141 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4143 static struct ureg_src
4144 emit_immediate(struct st_translate
*t
,
4145 gl_constant_value values
[4],
4148 struct ureg_program
*ureg
= t
->ureg
;
4153 return ureg_DECL_immediate(ureg
, &values
[0].f
, size
);
4155 return ureg_DECL_immediate_int(ureg
, &values
[0].i
, size
);
4156 case GL_UNSIGNED_INT
:
4158 return ureg_DECL_immediate_uint(ureg
, &values
[0].u
, size
);
4160 assert(!"should not get here - type must be float, int, uint, or bool");
4161 return ureg_src_undef();
4166 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4168 static struct ureg_dst
4169 dst_register(struct st_translate
*t
,
4170 gl_register_file file
,
4176 case PROGRAM_UNDEFINED
:
4177 return ureg_dst_undef();
4179 case PROGRAM_TEMPORARY
:
4181 assert(index
< (int) Elements(t
->temps
));
4183 if (ureg_dst_is_undef(t
->temps
[index
]))
4184 t
->temps
[index
] = ureg_DECL_local_temporary(t
->ureg
);
4186 return t
->temps
[index
];
4189 array
= index
>> 16;
4192 assert(array
< (int) Elements(t
->arrays
));
4194 if (ureg_dst_is_undef(t
->arrays
[array
]))
4195 t
->arrays
[array
] = ureg_DECL_array_temporary(
4196 t
->ureg
, t
->array_sizes
[array
], TRUE
);
4198 return ureg_dst_array_offset(t
->arrays
[array
],
4199 (int)(index
& 0xFFFF) - 0x8000);
4201 case PROGRAM_OUTPUT
:
4202 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
4203 assert(index
< VARYING_SLOT_MAX
);
4204 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
4205 assert(index
< FRAG_RESULT_MAX
);
4207 assert(index
< VARYING_SLOT_MAX
);
4209 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4211 return t
->outputs
[t
->outputMapping
[index
]];
4213 case PROGRAM_ADDRESS
:
4214 return t
->address
[index
];
4217 assert(!"unknown dst register file");
4218 return ureg_dst_undef();
4223 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4225 static struct ureg_src
4226 src_register(struct st_translate
*t
,
4227 gl_register_file file
,
4228 GLint index
, GLint index2D
)
4231 case PROGRAM_UNDEFINED
:
4232 return ureg_src_undef();
4234 case PROGRAM_TEMPORARY
:
4236 return ureg_src(dst_register(t
, file
, index
));
4238 case PROGRAM_ENV_PARAM
:
4239 case PROGRAM_LOCAL_PARAM
:
4240 case PROGRAM_UNIFORM
:
4242 return t
->constants
[index
];
4243 case PROGRAM_STATE_VAR
:
4244 case PROGRAM_CONSTANT
: /* ie, immediate */
4246 struct ureg_src src
;
4247 src
= ureg_src_register(TGSI_FILE_CONSTANT
, 0);
4249 src
.DimensionIndex
= index2D
;
4251 } else if (index
< 0)
4252 return ureg_DECL_constant(t
->ureg
, 0);
4254 return t
->constants
[index
];
4256 case PROGRAM_IMMEDIATE
:
4257 return t
->immediates
[index
];
4260 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
4261 return t
->inputs
[t
->inputMapping
[index
]];
4263 case PROGRAM_OUTPUT
:
4264 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
4265 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
4267 case PROGRAM_ADDRESS
:
4268 return ureg_src(t
->address
[index
]);
4270 case PROGRAM_SYSTEM_VALUE
:
4271 assert(index
< (int) Elements(t
->systemValues
));
4272 return t
->systemValues
[index
];
4275 assert(!"unknown src register file");
4276 return ureg_src_undef();
4281 * Create a TGSI ureg_dst register from an st_dst_reg.
4283 static struct ureg_dst
4284 translate_dst(struct st_translate
*t
,
4285 const st_dst_reg
*dst_reg
,
4286 bool saturate
, bool clamp_color
)
4288 struct ureg_dst dst
= dst_register(t
,
4292 dst
= ureg_writemask(dst
, dst_reg
->writemask
);
4295 dst
= ureg_saturate(dst
);
4296 else if (clamp_color
&& dst_reg
->file
== PROGRAM_OUTPUT
) {
4297 /* Clamp colors for ARB_color_buffer_float. */
4298 switch (t
->procType
) {
4299 case TGSI_PROCESSOR_VERTEX
:
4300 /* XXX if the geometry shader is present, this must be done there
4301 * instead of here. */
4302 if (dst_reg
->index
== VARYING_SLOT_COL0
||
4303 dst_reg
->index
== VARYING_SLOT_COL1
||
4304 dst_reg
->index
== VARYING_SLOT_BFC0
||
4305 dst_reg
->index
== VARYING_SLOT_BFC1
) {
4306 dst
= ureg_saturate(dst
);
4310 case TGSI_PROCESSOR_FRAGMENT
:
4311 if (dst_reg
->index
>= FRAG_RESULT_COLOR
) {
4312 dst
= ureg_saturate(dst
);
4318 if (dst_reg
->reladdr
!= NULL
) {
4319 assert(dst_reg
->file
!= PROGRAM_TEMPORARY
);
4320 dst
= ureg_dst_indirect(dst
, ureg_src(t
->address
[0]));
4327 * Create a TGSI ureg_src register from an st_src_reg.
4329 static struct ureg_src
4330 translate_src(struct st_translate
*t
, const st_src_reg
*src_reg
)
4332 struct ureg_src src
= src_register(t
, src_reg
->file
, src_reg
->index
, src_reg
->index2D
);
4334 src
= ureg_swizzle(src
,
4335 GET_SWZ(src_reg
->swizzle
, 0) & 0x3,
4336 GET_SWZ(src_reg
->swizzle
, 1) & 0x3,
4337 GET_SWZ(src_reg
->swizzle
, 2) & 0x3,
4338 GET_SWZ(src_reg
->swizzle
, 3) & 0x3);
4340 if ((src_reg
->negate
& 0xf) == NEGATE_XYZW
)
4341 src
= ureg_negate(src
);
4343 if (src_reg
->reladdr
!= NULL
) {
4344 assert(src_reg
->file
!= PROGRAM_TEMPORARY
);
4345 src
= ureg_src_indirect(src
, ureg_src(t
->address
[0]));
4351 static struct tgsi_texture_offset
4352 translate_tex_offset(struct st_translate
*t
,
4353 const struct tgsi_texture_offset
*in_offset
)
4355 struct tgsi_texture_offset offset
;
4356 struct ureg_src imm_src
;
4358 assert(in_offset
->File
== PROGRAM_IMMEDIATE
);
4359 imm_src
= t
->immediates
[in_offset
->Index
];
4361 offset
.File
= imm_src
.File
;
4362 offset
.Index
= imm_src
.Index
;
4363 offset
.SwizzleX
= imm_src
.SwizzleX
;
4364 offset
.SwizzleY
= imm_src
.SwizzleY
;
4365 offset
.SwizzleZ
= imm_src
.SwizzleZ
;
4366 offset
.File
= TGSI_FILE_IMMEDIATE
;
4373 compile_tgsi_instruction(struct st_translate
*t
,
4374 const glsl_to_tgsi_instruction
*inst
,
4375 bool clamp_dst_color_output
)
4377 struct ureg_program
*ureg
= t
->ureg
;
4379 struct ureg_dst dst
[1];
4380 struct ureg_src src
[4];
4381 struct tgsi_texture_offset texoffsets
[MAX_GLSL_TEXTURE_OFFSET
];
4385 unsigned tex_target
;
4387 num_dst
= num_inst_dst_regs(inst
->op
);
4388 num_src
= num_inst_src_regs(inst
->op
);
4391 dst
[0] = translate_dst(t
,
4394 clamp_dst_color_output
);
4396 for (i
= 0; i
< num_src
; i
++)
4397 src
[i
] = translate_src(t
, &inst
->src
[i
]);
4400 case TGSI_OPCODE_BGNLOOP
:
4401 case TGSI_OPCODE_CAL
:
4402 case TGSI_OPCODE_ELSE
:
4403 case TGSI_OPCODE_ENDLOOP
:
4404 case TGSI_OPCODE_IF
:
4405 case TGSI_OPCODE_UIF
:
4406 assert(num_dst
== 0);
4407 ureg_label_insn(ureg
,
4411 inst
->op
== TGSI_OPCODE_CAL
? inst
->function
->sig_id
: 0));
4414 case TGSI_OPCODE_TEX
:
4415 case TGSI_OPCODE_TXB
:
4416 case TGSI_OPCODE_TXD
:
4417 case TGSI_OPCODE_TXL
:
4418 case TGSI_OPCODE_TXP
:
4419 case TGSI_OPCODE_TXQ
:
4420 case TGSI_OPCODE_TXF
:
4421 case TGSI_OPCODE_TEX2
:
4422 case TGSI_OPCODE_TXB2
:
4423 case TGSI_OPCODE_TXL2
:
4424 src
[num_src
++] = t
->samplers
[inst
->sampler
];
4425 for (i
= 0; i
< inst
->tex_offset_num_offset
; i
++) {
4426 texoffsets
[i
] = translate_tex_offset(t
, &inst
->tex_offsets
[i
]);
4428 tex_target
= st_translate_texture_target(inst
->tex_target
, inst
->tex_shadow
);
4434 texoffsets
, inst
->tex_offset_num_offset
,
4438 case TGSI_OPCODE_SCS
:
4439 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
4440 ureg_insn(ureg
, inst
->op
, dst
, num_dst
, src
, num_src
);
4453 * Emit the TGSI instructions for inverting and adjusting WPOS.
4454 * This code is unavoidable because it also depends on whether
4455 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4458 emit_wpos_adjustment( struct st_translate
*t
,
4459 const struct gl_program
*program
,
4461 GLfloat adjX
, GLfloat adjY
[2])
4463 struct ureg_program
*ureg
= t
->ureg
;
4465 /* Fragment program uses fragment position input.
4466 * Need to replace instances of INPUT[WPOS] with temp T
4467 * where T = INPUT[WPOS] by y is inverted.
4469 static const gl_state_index wposTransformState
[STATE_LENGTH
]
4470 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
,
4471 (gl_state_index
)0, (gl_state_index
)0, (gl_state_index
)0 };
4473 /* XXX: note we are modifying the incoming shader here! Need to
4474 * do this before emitting the constant decls below, or this
4477 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
4478 wposTransformState
);
4480 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
4481 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
4482 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]];
4484 /* First, apply the coordinate shift: */
4485 if (adjX
|| adjY
[0] || adjY
[1]) {
4486 if (adjY
[0] != adjY
[1]) {
4487 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4488 * depending on whether inversion is actually going to be applied
4489 * or not, which is determined by testing against the inversion
4490 * state variable used below, which will be either +1 or -1.
4492 struct ureg_dst adj_temp
= ureg_DECL_local_temporary(ureg
);
4494 ureg_CMP(ureg
, adj_temp
,
4495 ureg_scalar(wpostrans
, invert
? 2 : 0),
4496 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
4497 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
4498 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
4500 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
4501 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
4503 wpos_input
= ureg_src(wpos_temp
);
4505 /* MOV wpos_temp, input[wpos]
4507 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
4510 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4511 * inversion/identity, or the other way around if we're drawing to an FBO.
4514 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4517 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4519 ureg_scalar(wpostrans
, 0),
4520 ureg_scalar(wpostrans
, 1));
4522 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4525 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
4527 ureg_scalar(wpostrans
, 2),
4528 ureg_scalar(wpostrans
, 3));
4531 /* Use wpos_temp as position input from here on:
4533 t
->inputs
[t
->inputMapping
[VARYING_SLOT_POS
]] = ureg_src(wpos_temp
);
4538 * Emit fragment position/ooordinate code.
4541 emit_wpos(struct st_context
*st
,
4542 struct st_translate
*t
,
4543 const struct gl_program
*program
,
4544 struct ureg_program
*ureg
)
4546 const struct gl_fragment_program
*fp
=
4547 (const struct gl_fragment_program
*) program
;
4548 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4549 GLfloat adjX
= 0.0f
;
4550 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
4551 boolean invert
= FALSE
;
4553 /* Query the pixel center conventions supported by the pipe driver and set
4554 * adjX, adjY to help out if it cannot handle the requested one internally.
4556 * The bias of the y-coordinate depends on whether y-inversion takes place
4557 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4558 * drawing to an FBO (causes additional inversion), and whether the the pipe
4559 * driver origin and the requested origin differ (the latter condition is
4560 * stored in the 'invert' variable).
4562 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4564 * center shift only:
4569 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4570 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4571 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4572 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4574 * inversion and center shift:
4575 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4576 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4577 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4578 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4580 if (fp
->OriginUpperLeft
) {
4581 /* Fragment shader wants origin in upper-left */
4582 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
4583 /* the driver supports upper-left origin */
4585 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
4586 /* the driver supports lower-left origin, need to invert Y */
4587 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4594 /* Fragment shader wants origin in lower-left */
4595 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
4596 /* the driver supports lower-left origin */
4597 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
4598 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
4599 /* the driver supports upper-left origin, need to invert Y */
4605 if (fp
->PixelCenterInteger
) {
4606 /* Fragment shader wants pixel center integer */
4607 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4608 /* the driver supports pixel center integer */
4610 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4612 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4613 /* the driver supports pixel center half integer, need to bias X,Y */
4622 /* Fragment shader wants pixel center half integer */
4623 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
4624 /* the driver supports pixel center half integer */
4626 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
4627 /* the driver supports pixel center integer, need to bias X,Y */
4628 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
4629 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
4635 /* we invert after adjustment so that we avoid the MOV to temporary,
4636 * and reuse the adjustment ADD instead */
4637 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
4641 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4642 * TGSI uses +1 for front, -1 for back.
4643 * This function converts the TGSI value to the GL value. Simply clamping/
4644 * saturating the value to [0,1] does the job.
4647 emit_face_var(struct st_translate
*t
)
4649 struct ureg_program
*ureg
= t
->ureg
;
4650 struct ureg_dst face_temp
= ureg_DECL_temporary(ureg
);
4651 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]];
4653 /* MOV_SAT face_temp, input[face] */
4654 face_temp
= ureg_saturate(face_temp
);
4655 ureg_MOV(ureg
, face_temp
, face_input
);
4657 /* Use face_temp as face input from here on: */
4658 t
->inputs
[t
->inputMapping
[VARYING_SLOT_FACE
]] = ureg_src(face_temp
);
4662 emit_edgeflags(struct st_translate
*t
)
4664 struct ureg_program
*ureg
= t
->ureg
;
4665 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VARYING_SLOT_EDGE
]];
4666 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
4668 ureg_MOV(ureg
, edge_dst
, edge_src
);
4672 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4673 * \param program the program to translate
4674 * \param numInputs number of input registers used
4675 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4677 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4678 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4680 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4681 * \param numOutputs number of output registers used
4682 * \param outputMapping maps Mesa fragment program outputs to TGSI
4684 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4685 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4688 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4690 extern "C" enum pipe_error
4691 st_translate_program(
4692 struct gl_context
*ctx
,
4694 struct ureg_program
*ureg
,
4695 glsl_to_tgsi_visitor
*program
,
4696 const struct gl_program
*proginfo
,
4698 const GLuint inputMapping
[],
4699 const ubyte inputSemanticName
[],
4700 const ubyte inputSemanticIndex
[],
4701 const GLuint interpMode
[],
4702 const GLboolean is_centroid
[],
4704 const GLuint outputMapping
[],
4705 const ubyte outputSemanticName
[],
4706 const ubyte outputSemanticIndex
[],
4707 boolean passthrough_edgeflags
,
4708 boolean clamp_color
)
4710 struct st_translate
*t
;
4712 enum pipe_error ret
= PIPE_OK
;
4714 assert(numInputs
<= Elements(t
->inputs
));
4715 assert(numOutputs
<= Elements(t
->outputs
));
4717 t
= CALLOC_STRUCT(st_translate
);
4719 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4723 memset(t
, 0, sizeof *t
);
4725 t
->procType
= procType
;
4726 t
->inputMapping
= inputMapping
;
4727 t
->outputMapping
= outputMapping
;
4730 if (program
->shader_program
) {
4731 for (i
= 0; i
< program
->shader_program
->NumUserUniformStorage
; i
++) {
4732 struct gl_uniform_storage
*const storage
=
4733 &program
->shader_program
->UniformStorage
[i
];
4735 _mesa_uniform_detach_all_driver_storage(storage
);
4740 * Declare input attributes.
4742 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
4743 for (i
= 0; i
< numInputs
; i
++) {
4744 t
->inputs
[i
] = ureg_DECL_fs_input_cyl_centroid(ureg
,
4745 inputSemanticName
[i
],
4746 inputSemanticIndex
[i
],
4751 if (proginfo
->InputsRead
& VARYING_BIT_POS
) {
4752 /* Must do this after setting up t->inputs, and before
4753 * emitting constant references, below:
4755 emit_wpos(st_context(ctx
), t
, proginfo
, ureg
);
4758 if (proginfo
->InputsRead
& VARYING_BIT_FACE
)
4762 * Declare output attributes.
4764 for (i
= 0; i
< numOutputs
; i
++) {
4765 switch (outputSemanticName
[i
]) {
4766 case TGSI_SEMANTIC_POSITION
:
4767 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4768 TGSI_SEMANTIC_POSITION
, /* Z/Depth */
4769 outputSemanticIndex
[i
]);
4770 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Z
);
4772 case TGSI_SEMANTIC_STENCIL
:
4773 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4774 TGSI_SEMANTIC_STENCIL
, /* Stencil */
4775 outputSemanticIndex
[i
]);
4776 t
->outputs
[i
] = ureg_writemask(t
->outputs
[i
], TGSI_WRITEMASK_Y
);
4778 case TGSI_SEMANTIC_COLOR
:
4779 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4780 TGSI_SEMANTIC_COLOR
,
4781 outputSemanticIndex
[i
]);
4784 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4785 ret
= PIPE_ERROR_BAD_INPUT
;
4790 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
4791 for (i
= 0; i
< numInputs
; i
++) {
4792 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
4794 inputSemanticName
[i
],
4795 inputSemanticIndex
[i
]);
4798 for (i
= 0; i
< numOutputs
; i
++) {
4799 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4800 outputSemanticName
[i
],
4801 outputSemanticIndex
[i
]);
4805 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4807 for (i
= 0; i
< numInputs
; i
++) {
4808 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
4811 for (i
= 0; i
< numOutputs
; i
++) {
4812 t
->outputs
[i
] = ureg_DECL_output(ureg
,
4813 outputSemanticName
[i
],
4814 outputSemanticIndex
[i
]);
4816 if (passthrough_edgeflags
)
4820 /* Declare address register.
4822 if (program
->num_address_regs
> 0) {
4823 assert(program
->num_address_regs
== 1);
4824 t
->address
[0] = ureg_DECL_address(ureg
);
4827 /* Declare misc input registers
4830 GLbitfield sysInputs
= proginfo
->SystemValuesRead
;
4831 unsigned numSys
= 0;
4832 for (i
= 0; sysInputs
; i
++) {
4833 if (sysInputs
& (1 << i
)) {
4834 unsigned semName
= mesa_sysval_to_semantic
[i
];
4835 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
4836 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
4837 semName
== TGSI_SEMANTIC_VERTEXID
) {
4838 /* From Gallium perspective, these system values are always
4839 * integer, and require native integer support. However, if
4840 * native integer is supported on the vertex stage but not the
4841 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4842 * assumes these system values are floats. To resolve the
4843 * inconsistency, we insert a U2F.
4845 struct st_context
*st
= st_context(ctx
);
4846 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
4847 assert(procType
== TGSI_PROCESSOR_VERTEX
);
4848 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
4849 if (!ctx
->Const
.NativeIntegers
) {
4850 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
4851 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
4852 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
4856 sysInputs
&= ~(1 << i
);
4861 /* Copy over array sizes
4863 memcpy(t
->array_sizes
, program
->array_sizes
, sizeof(unsigned) * program
->next_array
);
4865 /* Emit constants and uniforms. TGSI uses a single index space for these,
4866 * so we put all the translated regs in t->constants.
4868 if (proginfo
->Parameters
) {
4869 t
->constants
= (struct ureg_src
*)
4870 calloc(proginfo
->Parameters
->NumParameters
, sizeof(t
->constants
[0]));
4871 if (t
->constants
== NULL
) {
4872 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4876 for (i
= 0; i
< proginfo
->Parameters
->NumParameters
; i
++) {
4877 switch (proginfo
->Parameters
->Parameters
[i
].Type
) {
4878 case PROGRAM_ENV_PARAM
:
4879 case PROGRAM_LOCAL_PARAM
:
4880 case PROGRAM_STATE_VAR
:
4881 case PROGRAM_UNIFORM
:
4882 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4885 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4886 * addressing of the const buffer.
4887 * FIXME: Be smarter and recognize param arrays:
4888 * indirect addressing is only valid within the referenced
4891 case PROGRAM_CONSTANT
:
4892 if (program
->indirect_addr_consts
)
4893 t
->constants
[i
] = ureg_DECL_constant(ureg
, i
);
4895 t
->constants
[i
] = emit_immediate(t
,
4896 proginfo
->Parameters
->ParameterValues
[i
],
4897 proginfo
->Parameters
->Parameters
[i
].DataType
,
4906 if (program
->shader_program
) {
4907 unsigned num_ubos
= program
->shader_program
->NumUniformBlocks
;
4909 for (i
= 0; i
< num_ubos
; i
++) {
4910 ureg_DECL_constant2D(t
->ureg
, 0, program
->shader_program
->UniformBlocks
[i
].UniformBufferSize
/ 4, i
+ 1);
4914 /* Emit immediate values.
4916 t
->immediates
= (struct ureg_src
*)
4917 calloc(program
->num_immediates
, sizeof(struct ureg_src
));
4918 if (t
->immediates
== NULL
) {
4919 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
4923 foreach_iter(exec_list_iterator
, iter
, program
->immediates
) {
4924 immediate_storage
*imm
= (immediate_storage
*)iter
.get();
4925 assert(i
< program
->num_immediates
);
4926 t
->immediates
[i
++] = emit_immediate(t
, imm
->values
, imm
->type
, imm
->size
);
4928 assert(i
== program
->num_immediates
);
4930 /* texture samplers */
4931 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
4932 if (program
->samplers_used
& (1 << i
)) {
4933 t
->samplers
[i
] = ureg_DECL_sampler(ureg
, i
);
4937 /* Emit each instruction in turn:
4939 foreach_iter(exec_list_iterator
, iter
, program
->instructions
) {
4940 set_insn_start(t
, ureg_get_instruction_number(ureg
));
4941 compile_tgsi_instruction(t
, (glsl_to_tgsi_instruction
*)iter
.get(),
4945 /* Fix up all emitted labels:
4947 for (i
= 0; i
< t
->labels_count
; i
++) {
4948 ureg_fixup_label(ureg
, t
->labels
[i
].token
,
4949 t
->insn
[t
->labels
[i
].branch_target
]);
4952 if (program
->shader_program
) {
4953 /* This has to be done last. Any operation the can cause
4954 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4955 * program constant) has to happen before creating this linkage.
4957 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
4958 if (program
->shader_program
->_LinkedShaders
[i
] == NULL
)
4961 _mesa_associate_uniform_storage(ctx
, program
->shader_program
,
4962 program
->shader_program
->_LinkedShaders
[i
]->Program
->Parameters
);
4971 free(t
->immediates
);
4974 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
4982 /* ----------------------------- End TGSI code ------------------------------ */
4985 * Convert a shader's GLSL IR into a Mesa gl_program, although without
4986 * generating Mesa IR.
4988 static struct gl_program
*
4989 get_mesa_program(struct gl_context
*ctx
,
4990 struct gl_shader_program
*shader_program
,
4991 struct gl_shader
*shader
)
4993 glsl_to_tgsi_visitor
* v
;
4994 struct gl_program
*prog
;
4996 const char *target_string
;
4998 struct gl_shader_compiler_options
*options
=
4999 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
5000 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
5003 switch (shader
->Type
) {
5004 case GL_VERTEX_SHADER
:
5005 target
= GL_VERTEX_PROGRAM_ARB
;
5006 ptarget
= PIPE_SHADER_VERTEX
;
5007 target_string
= "vertex";
5009 case GL_FRAGMENT_SHADER
:
5010 target
= GL_FRAGMENT_PROGRAM_ARB
;
5011 ptarget
= PIPE_SHADER_FRAGMENT
;
5012 target_string
= "fragment";
5014 case GL_GEOMETRY_SHADER
:
5015 target
= GL_GEOMETRY_PROGRAM_NV
;
5016 ptarget
= PIPE_SHADER_GEOMETRY
;
5017 target_string
= "geometry";
5020 assert(!"should not be reached");
5024 validate_ir_tree(shader
->ir
);
5026 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
5029 prog
->Parameters
= _mesa_new_parameter_list();
5030 v
= new glsl_to_tgsi_visitor();
5033 v
->shader_program
= shader_program
;
5034 v
->options
= options
;
5035 v
->glsl_version
= ctx
->Const
.GLSLVersion
;
5036 v
->native_integers
= ctx
->Const
.NativeIntegers
;
5038 v
->have_sqrt
= pscreen
->get_shader_param(pscreen
, ptarget
,
5039 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
);
5041 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
5044 /* Remove reads from output registers. */
5045 lower_output_reads(shader
->ir
);
5047 /* Emit intermediate IR for main(). */
5048 visit_exec_list(shader
->ir
, v
);
5050 /* Now emit bodies for any functions that were used. */
5052 progress
= GL_FALSE
;
5054 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
5055 function_entry
*entry
= (function_entry
*)iter
.get();
5057 if (!entry
->bgn_inst
) {
5058 v
->current_function
= entry
;
5060 entry
->bgn_inst
= v
->emit(NULL
, TGSI_OPCODE_BGNSUB
);
5061 entry
->bgn_inst
->function
= entry
;
5063 visit_exec_list(&entry
->sig
->body
, v
);
5065 glsl_to_tgsi_instruction
*last
;
5066 last
= (glsl_to_tgsi_instruction
*)v
->instructions
.get_tail();
5067 if (last
->op
!= TGSI_OPCODE_RET
)
5068 v
->emit(NULL
, TGSI_OPCODE_RET
);
5070 glsl_to_tgsi_instruction
*end
;
5071 end
= v
->emit(NULL
, TGSI_OPCODE_ENDSUB
);
5072 end
->function
= entry
;
5080 /* Print out some information (for debugging purposes) used by the
5081 * optimization passes. */
5082 for (i
=0; i
< v
->next_temp
; i
++) {
5083 int fr
= v
->get_first_temp_read(i
);
5084 int fw
= v
->get_first_temp_write(i
);
5085 int lr
= v
->get_last_temp_read(i
);
5086 int lw
= v
->get_last_temp_write(i
);
5088 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i
, fr
, fw
, lr
, lw
);
5093 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5095 v
->copy_propagate();
5096 while (v
->eliminate_dead_code_advanced());
5098 v
->eliminate_dead_code();
5099 v
->merge_registers();
5100 v
->renumber_registers();
5102 /* Write the END instruction. */
5103 v
->emit(NULL
, TGSI_OPCODE_END
);
5105 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
5107 printf("GLSL IR for linked %s program %d:\n", target_string
,
5108 shader_program
->Name
);
5109 _mesa_print_ir(shader
->ir
, NULL
);
5115 prog
->Instructions
= NULL
;
5116 prog
->NumInstructions
= 0;
5118 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
5119 count_resources(v
, prog
);
5121 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
5123 /* This has to be done last. Any operation the can cause
5124 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5125 * program constant) has to happen before creating this linkage.
5127 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
5128 if (!shader_program
->LinkStatus
) {
5132 struct st_vertex_program
*stvp
;
5133 struct st_fragment_program
*stfp
;
5134 struct st_geometry_program
*stgp
;
5136 switch (shader
->Type
) {
5137 case GL_VERTEX_SHADER
:
5138 stvp
= (struct st_vertex_program
*)prog
;
5139 stvp
->glsl_to_tgsi
= v
;
5141 case GL_FRAGMENT_SHADER
:
5142 stfp
= (struct st_fragment_program
*)prog
;
5143 stfp
->glsl_to_tgsi
= v
;
5145 case GL_GEOMETRY_SHADER
:
5146 stgp
= (struct st_geometry_program
*)prog
;
5147 stgp
->glsl_to_tgsi
= v
;
5150 assert(!"should not be reached");
5160 st_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
5162 struct gl_shader
*shader
;
5163 assert(type
== GL_FRAGMENT_SHADER
|| type
== GL_VERTEX_SHADER
||
5164 type
== GL_GEOMETRY_SHADER_ARB
);
5165 shader
= rzalloc(NULL
, struct gl_shader
);
5167 shader
->Type
= type
;
5168 shader
->Name
= name
;
5169 _mesa_init_shader(ctx
, shader
);
5174 struct gl_shader_program
*
5175 st_new_shader_program(struct gl_context
*ctx
, GLuint name
)
5177 struct gl_shader_program
*shProg
;
5178 shProg
= rzalloc(NULL
, struct gl_shader_program
);
5180 shProg
->Name
= name
;
5181 _mesa_init_shader_program(ctx
, shProg
);
5188 * Called via ctx->Driver.LinkShader()
5189 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5190 * with code lowering and other optimizations.
5193 st_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
5195 assert(prog
->LinkStatus
);
5197 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5198 if (prog
->_LinkedShaders
[i
] == NULL
)
5202 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
5203 const struct gl_shader_compiler_options
*options
=
5204 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
5206 /* If there are forms of indirect addressing that the driver
5207 * cannot handle, perform the lowering pass.
5209 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
||
5210 options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
) {
5211 lower_variable_index_to_cond_assign(ir
,
5212 options
->EmitNoIndirectInput
,
5213 options
->EmitNoIndirectOutput
,
5214 options
->EmitNoIndirectTemp
,
5215 options
->EmitNoIndirectUniform
);
5218 if (ctx
->Extensions
.ARB_shading_language_packing
) {
5219 unsigned lower_inst
= LOWER_PACK_SNORM_2x16
|
5220 LOWER_UNPACK_SNORM_2x16
|
5221 LOWER_PACK_UNORM_2x16
|
5222 LOWER_UNPACK_UNORM_2x16
|
5223 LOWER_PACK_SNORM_4x8
|
5224 LOWER_UNPACK_SNORM_4x8
|
5225 LOWER_UNPACK_UNORM_4x8
|
5226 LOWER_PACK_UNORM_4x8
|
5227 LOWER_PACK_HALF_2x16
|
5228 LOWER_UNPACK_HALF_2x16
;
5230 lower_packing_builtins(ir
, lower_inst
);
5233 do_mat_op_to_vec(ir
);
5234 lower_instructions(ir
,
5239 (options
->EmitNoPow
? POW_TO_EXP2
: 0) |
5240 (!ctx
->Const
.NativeIntegers
? INT_DIV_TO_MUL_RCP
: 0));
5242 lower_ubo_reference(prog
->_LinkedShaders
[i
], ir
);
5243 do_vec_index_to_cond_assign(ir
);
5244 lower_quadop_vector(ir
, false);
5246 if (options
->MaxIfDepth
== 0) {
5253 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
5255 progress
= do_common_optimization(ir
, true, true,
5256 options
->MaxUnrollIterations
)
5259 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
5263 validate_ir_tree(ir
);
5266 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
5267 struct gl_program
*linked_prog
;
5269 if (prog
->_LinkedShaders
[i
] == NULL
)
5272 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
5275 static const GLenum targets
[] = {
5276 GL_VERTEX_PROGRAM_ARB
,
5277 GL_FRAGMENT_PROGRAM_ARB
,
5278 GL_GEOMETRY_PROGRAM_NV
5281 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5283 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
5284 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
5286 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5291 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
5298 st_translate_stream_output_info(glsl_to_tgsi_visitor
*glsl_to_tgsi
,
5299 const GLuint outputMapping
[],
5300 struct pipe_stream_output_info
*so
)
5303 struct gl_transform_feedback_info
*info
=
5304 &glsl_to_tgsi
->shader_program
->LinkedTransformFeedback
;
5306 for (i
= 0; i
< info
->NumOutputs
; i
++) {
5307 so
->output
[i
].register_index
=
5308 outputMapping
[info
->Outputs
[i
].OutputRegister
];
5309 so
->output
[i
].start_component
= info
->Outputs
[i
].ComponentOffset
;
5310 so
->output
[i
].num_components
= info
->Outputs
[i
].NumComponents
;
5311 so
->output
[i
].output_buffer
= info
->Outputs
[i
].OutputBuffer
;
5312 so
->output
[i
].dst_offset
= info
->Outputs
[i
].DstOffset
;
5315 for (i
= 0; i
< PIPE_MAX_SO_BUFFERS
; i
++) {
5316 so
->stride
[i
] = info
->BufferStride
[i
];
5318 so
->num_outputs
= info
->NumOutputs
;