glsl/loops: replace loop controls with a normative bound.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \
74 (1 << PROGRAM_CONSTANT) | \
75 (1 << PROGRAM_UNIFORM))
76
77 /**
78 * Maximum number of temporary registers.
79 *
80 * It is too big for stack allocated arrays -- it will cause stack overflow on
81 * Windows and likely Mac OS X.
82 */
83 #define MAX_TEMPS 4096
84
85 /**
86 * Maximum number of arrays
87 */
88 #define MAX_ARRAYS 256
89
90 /* will be 4 for GLSL 4.00 */
91 #define MAX_GLSL_TEXTURE_OFFSET 1
92
93 class st_src_reg;
94 class st_dst_reg;
95
96 static int swizzle_for_size(int size);
97
98 /**
99 * This struct is a corresponding struct to TGSI ureg_src.
100 */
101 class st_src_reg {
102 public:
103 st_src_reg(gl_register_file file, int index, const glsl_type *type)
104 {
105 this->file = file;
106 this->index = index;
107 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
108 this->swizzle = swizzle_for_size(type->vector_elements);
109 else
110 this->swizzle = SWIZZLE_XYZW;
111 this->negate = 0;
112 this->index2D = 0;
113 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
114 this->reladdr = NULL;
115 this->reladdr2 = NULL;
116 this->has_index2 = false;
117 }
118
119 st_src_reg(gl_register_file file, int index, int type)
120 {
121 this->type = type;
122 this->file = file;
123 this->index = index;
124 this->index2D = 0;
125 this->swizzle = SWIZZLE_XYZW;
126 this->negate = 0;
127 this->reladdr = NULL;
128 this->reladdr2 = NULL;
129 this->has_index2 = false;
130 }
131
132 st_src_reg(gl_register_file file, int index, int type, int index2D)
133 {
134 this->type = type;
135 this->file = file;
136 this->index = index;
137 this->index2D = index2D;
138 this->swizzle = SWIZZLE_XYZW;
139 this->negate = 0;
140 this->reladdr = NULL;
141 this->reladdr2 = NULL;
142 this->has_index2 = false;
143 }
144
145 st_src_reg()
146 {
147 this->type = GLSL_TYPE_ERROR;
148 this->file = PROGRAM_UNDEFINED;
149 this->index = 0;
150 this->index2D = 0;
151 this->swizzle = 0;
152 this->negate = 0;
153 this->reladdr = NULL;
154 this->reladdr2 = NULL;
155 this->has_index2 = false;
156 }
157
158 explicit st_src_reg(st_dst_reg reg);
159
160 gl_register_file file; /**< PROGRAM_* from Mesa */
161 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
162 int index2D;
163 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
164 int negate; /**< NEGATE_XYZW mask from mesa */
165 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
166 /** Register index should be offset by the integer in this reg. */
167 st_src_reg *reladdr;
168 st_src_reg *reladdr2;
169 bool has_index2;
170 };
171
172 class st_dst_reg {
173 public:
174 st_dst_reg(gl_register_file file, int writemask, int type, int index)
175 {
176 this->file = file;
177 this->index = index;
178 this->writemask = writemask;
179 this->cond_mask = COND_TR;
180 this->reladdr = NULL;
181 this->type = type;
182 }
183
184 st_dst_reg(gl_register_file file, int writemask, int type)
185 {
186 this->file = file;
187 this->index = 0;
188 this->writemask = writemask;
189 this->cond_mask = COND_TR;
190 this->reladdr = NULL;
191 this->type = type;
192 }
193
194 st_dst_reg()
195 {
196 this->type = GLSL_TYPE_ERROR;
197 this->file = PROGRAM_UNDEFINED;
198 this->index = 0;
199 this->writemask = 0;
200 this->cond_mask = COND_TR;
201 this->reladdr = NULL;
202 }
203
204 explicit st_dst_reg(st_src_reg reg);
205
206 gl_register_file file; /**< PROGRAM_* from Mesa */
207 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
208 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
209 GLuint cond_mask:4;
210 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
211 /** Register index should be offset by the integer in this reg. */
212 st_src_reg *reladdr;
213 };
214
215 st_src_reg::st_src_reg(st_dst_reg reg)
216 {
217 this->type = reg.type;
218 this->file = reg.file;
219 this->index = reg.index;
220 this->swizzle = SWIZZLE_XYZW;
221 this->negate = 0;
222 this->reladdr = reg.reladdr;
223 this->index2D = 0;
224 this->reladdr2 = NULL;
225 this->has_index2 = false;
226 }
227
228 st_dst_reg::st_dst_reg(st_src_reg reg)
229 {
230 this->type = reg.type;
231 this->file = reg.file;
232 this->index = reg.index;
233 this->writemask = WRITEMASK_XYZW;
234 this->cond_mask = COND_TR;
235 this->reladdr = reg.reladdr;
236 }
237
238 class glsl_to_tgsi_instruction : public exec_node {
239 public:
240 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
241
242 unsigned op;
243 st_dst_reg dst;
244 st_src_reg src[3];
245 /** Pointer to the ir source this tree came from for debugging */
246 ir_instruction *ir;
247 GLboolean cond_update;
248 bool saturate;
249 int sampler; /**< sampler index */
250 int tex_target; /**< One of TEXTURE_*_INDEX */
251 GLboolean tex_shadow;
252 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
253 unsigned tex_offset_num_offset;
254 int dead_mask; /**< Used in dead code elimination */
255
256 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
257 };
258
259 class variable_storage : public exec_node {
260 public:
261 variable_storage(ir_variable *var, gl_register_file file, int index)
262 : file(file), index(index), var(var)
263 {
264 /* empty */
265 }
266
267 gl_register_file file;
268 int index;
269 ir_variable *var; /* variable that maps to this, if any */
270 };
271
272 class immediate_storage : public exec_node {
273 public:
274 immediate_storage(gl_constant_value *values, int size, int type)
275 {
276 memcpy(this->values, values, size * sizeof(gl_constant_value));
277 this->size = size;
278 this->type = type;
279 }
280
281 gl_constant_value values[4];
282 int size; /**< Number of components (1-4) */
283 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
284 };
285
286 class function_entry : public exec_node {
287 public:
288 ir_function_signature *sig;
289
290 /**
291 * identifier of this function signature used by the program.
292 *
293 * At the point that TGSI instructions for function calls are
294 * generated, we don't know the address of the first instruction of
295 * the function body. So we make the BranchTarget that is called a
296 * small integer and rewrite them during set_branchtargets().
297 */
298 int sig_id;
299
300 /**
301 * Pointer to first instruction of the function body.
302 *
303 * Set during function body emits after main() is processed.
304 */
305 glsl_to_tgsi_instruction *bgn_inst;
306
307 /**
308 * Index of the first instruction of the function body in actual TGSI.
309 *
310 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
311 */
312 int inst;
313
314 /** Storage for the return value. */
315 st_src_reg return_reg;
316 };
317
318 struct glsl_to_tgsi_visitor : public ir_visitor {
319 public:
320 glsl_to_tgsi_visitor();
321 ~glsl_to_tgsi_visitor();
322
323 function_entry *current_function;
324
325 struct gl_context *ctx;
326 struct gl_program *prog;
327 struct gl_shader_program *shader_program;
328 struct gl_shader_compiler_options *options;
329
330 int next_temp;
331
332 unsigned array_sizes[MAX_ARRAYS];
333 unsigned next_array;
334
335 int num_address_regs;
336 int samplers_used;
337 bool indirect_addr_consts;
338
339 int glsl_version;
340 bool native_integers;
341 bool have_sqrt;
342
343 variable_storage *find_variable_storage(ir_variable *var);
344
345 int add_constant(gl_register_file file, gl_constant_value values[4],
346 int size, int datatype, GLuint *swizzle_out);
347
348 function_entry *get_function_signature(ir_function_signature *sig);
349
350 st_src_reg get_temp(const glsl_type *type);
351 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
352
353 st_src_reg st_src_reg_for_float(float val);
354 st_src_reg st_src_reg_for_int(int val);
355 st_src_reg st_src_reg_for_type(int type, int val);
356
357 /**
358 * \name Visit methods
359 *
360 * As typical for the visitor pattern, there must be one \c visit method for
361 * each concrete subclass of \c ir_instruction. Virtual base classes within
362 * the hierarchy should not have \c visit methods.
363 */
364 /*@{*/
365 virtual void visit(ir_variable *);
366 virtual void visit(ir_loop *);
367 virtual void visit(ir_loop_jump *);
368 virtual void visit(ir_function_signature *);
369 virtual void visit(ir_function *);
370 virtual void visit(ir_expression *);
371 virtual void visit(ir_swizzle *);
372 virtual void visit(ir_dereference_variable *);
373 virtual void visit(ir_dereference_array *);
374 virtual void visit(ir_dereference_record *);
375 virtual void visit(ir_assignment *);
376 virtual void visit(ir_constant *);
377 virtual void visit(ir_call *);
378 virtual void visit(ir_return *);
379 virtual void visit(ir_discard *);
380 virtual void visit(ir_texture *);
381 virtual void visit(ir_if *);
382 virtual void visit(ir_emit_vertex *);
383 virtual void visit(ir_end_primitive *);
384 /*@}*/
385
386 st_src_reg result;
387
388 /** List of variable_storage */
389 exec_list variables;
390
391 /** List of immediate_storage */
392 exec_list immediates;
393 unsigned num_immediates;
394
395 /** List of function_entry */
396 exec_list function_signatures;
397 int next_signature_id;
398
399 /** List of glsl_to_tgsi_instruction */
400 exec_list instructions;
401
402 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
403
404 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
405 st_dst_reg dst, st_src_reg src0);
406
407 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
408 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
409
410 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
411 st_dst_reg dst,
412 st_src_reg src0, st_src_reg src1, st_src_reg src2);
413
414 unsigned get_opcode(ir_instruction *ir, unsigned op,
415 st_dst_reg dst,
416 st_src_reg src0, st_src_reg src1);
417
418 /**
419 * Emit the correct dot-product instruction for the type of arguments
420 */
421 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
422 st_dst_reg dst,
423 st_src_reg src0,
424 st_src_reg src1,
425 unsigned elements);
426
427 void emit_scalar(ir_instruction *ir, unsigned op,
428 st_dst_reg dst, st_src_reg src0);
429
430 void emit_scalar(ir_instruction *ir, unsigned op,
431 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
432
433 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
434
435 void emit_scs(ir_instruction *ir, unsigned op,
436 st_dst_reg dst, const st_src_reg &src);
437
438 bool try_emit_mad(ir_expression *ir,
439 int mul_operand);
440 bool try_emit_mad_for_and_not(ir_expression *ir,
441 int mul_operand);
442 bool try_emit_sat(ir_expression *ir);
443
444 void emit_swz(ir_expression *ir);
445
446 bool process_move_condition(ir_rvalue *ir);
447
448 void simplify_cmp(void);
449
450 void rename_temp_register(int index, int new_index);
451 int get_first_temp_read(int index);
452 int get_first_temp_write(int index);
453 int get_last_temp_read(int index);
454 int get_last_temp_write(int index);
455
456 void copy_propagate(void);
457 void eliminate_dead_code(void);
458 int eliminate_dead_code_advanced(void);
459 void merge_registers(void);
460 void renumber_registers(void);
461
462 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
463 st_dst_reg *l, st_src_reg *r);
464
465 void *mem_ctx;
466 };
467
468 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
469
470 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
471
472 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
473 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
474
475 static void
476 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
477
478 static void
479 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
480 {
481 va_list args;
482 va_start(args, fmt);
483 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
484 va_end(args);
485
486 prog->LinkStatus = GL_FALSE;
487 }
488
489 static int
490 swizzle_for_size(int size)
491 {
492 int size_swizzles[4] = {
493 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
494 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
495 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
496 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
497 };
498
499 assert((size >= 1) && (size <= 4));
500 return size_swizzles[size - 1];
501 }
502
503 static bool
504 is_tex_instruction(unsigned opcode)
505 {
506 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
507 return info->is_tex;
508 }
509
510 static unsigned
511 num_inst_dst_regs(unsigned opcode)
512 {
513 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
514 return info->num_dst;
515 }
516
517 static unsigned
518 num_inst_src_regs(unsigned opcode)
519 {
520 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
521 return info->is_tex ? info->num_src - 1 : info->num_src;
522 }
523
524 glsl_to_tgsi_instruction *
525 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
526 st_dst_reg dst,
527 st_src_reg src0, st_src_reg src1, st_src_reg src2)
528 {
529 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
530 int num_reladdr = 0, i;
531
532 op = get_opcode(ir, op, dst, src0, src1);
533
534 /* If we have to do relative addressing, we want to load the ARL
535 * reg directly for one of the regs, and preload the other reladdr
536 * sources into temps.
537 */
538 num_reladdr += dst.reladdr != NULL;
539 num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL;
540 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
541 num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL;
542
543 reladdr_to_temp(ir, &src2, &num_reladdr);
544 reladdr_to_temp(ir, &src1, &num_reladdr);
545 reladdr_to_temp(ir, &src0, &num_reladdr);
546
547 if (dst.reladdr) {
548 emit_arl(ir, address_reg, *dst.reladdr);
549 num_reladdr--;
550 }
551 assert(num_reladdr == 0);
552
553 inst->op = op;
554 inst->dst = dst;
555 inst->src[0] = src0;
556 inst->src[1] = src1;
557 inst->src[2] = src2;
558 inst->ir = ir;
559 inst->dead_mask = 0;
560
561 inst->function = NULL;
562
563 /* Update indirect addressing status used by TGSI */
564 if (dst.reladdr) {
565 switch(dst.file) {
566 case PROGRAM_STATE_VAR:
567 case PROGRAM_CONSTANT:
568 case PROGRAM_UNIFORM:
569 this->indirect_addr_consts = true;
570 break;
571 case PROGRAM_IMMEDIATE:
572 assert(!"immediates should not have indirect addressing");
573 break;
574 default:
575 break;
576 }
577 }
578 else {
579 for (i=0; i<3; i++) {
580 if(inst->src[i].reladdr) {
581 switch(inst->src[i].file) {
582 case PROGRAM_STATE_VAR:
583 case PROGRAM_CONSTANT:
584 case PROGRAM_UNIFORM:
585 this->indirect_addr_consts = true;
586 break;
587 case PROGRAM_IMMEDIATE:
588 assert(!"immediates should not have indirect addressing");
589 break;
590 default:
591 break;
592 }
593 }
594 }
595 }
596
597 this->instructions.push_tail(inst);
598
599 return inst;
600 }
601
602
603 glsl_to_tgsi_instruction *
604 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
605 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
606 {
607 return emit(ir, op, dst, src0, src1, undef_src);
608 }
609
610 glsl_to_tgsi_instruction *
611 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
612 st_dst_reg dst, st_src_reg src0)
613 {
614 assert(dst.writemask != 0);
615 return emit(ir, op, dst, src0, undef_src, undef_src);
616 }
617
618 glsl_to_tgsi_instruction *
619 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
620 {
621 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
622 }
623
624 /**
625 * Determines whether to use an integer, unsigned integer, or float opcode
626 * based on the operands and input opcode, then emits the result.
627 */
628 unsigned
629 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
630 st_dst_reg dst,
631 st_src_reg src0, st_src_reg src1)
632 {
633 int type = GLSL_TYPE_FLOAT;
634
635 assert(src0.type != GLSL_TYPE_ARRAY);
636 assert(src0.type != GLSL_TYPE_STRUCT);
637 assert(src1.type != GLSL_TYPE_ARRAY);
638 assert(src1.type != GLSL_TYPE_STRUCT);
639
640 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
641 type = GLSL_TYPE_FLOAT;
642 else if (native_integers)
643 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
644
645 #define case4(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
651 else \
652 op = TGSI_OPCODE_##f; \
653 break;
654
655 #define case3(f, i, u) case4(f, f, i, u)
656 #define case2fi(f, i) case4(f, f, i, i)
657 #define case2iu(i, u) case4(i, LAST, i, u)
658
659 #define casecomp(c, f, i, u) \
660 case TGSI_OPCODE_##c: \
661 if (type == GLSL_TYPE_INT) \
662 op = TGSI_OPCODE_##i; \
663 else if (type == GLSL_TYPE_UINT) \
664 op = TGSI_OPCODE_##u; \
665 else if (native_integers) \
666 op = TGSI_OPCODE_##f; \
667 else \
668 op = TGSI_OPCODE_##c; \
669 break;
670
671 switch(op) {
672 case2fi(ADD, UADD);
673 case2fi(MUL, UMUL);
674 case2fi(MAD, UMAD);
675 case3(DIV, IDIV, UDIV);
676 case3(MAX, IMAX, UMAX);
677 case3(MIN, IMIN, UMIN);
678 case2iu(MOD, UMOD);
679
680 casecomp(SEQ, FSEQ, USEQ, USEQ);
681 casecomp(SNE, FSNE, USNE, USNE);
682 casecomp(SGE, FSGE, ISGE, USGE);
683 casecomp(SLT, FSLT, ISLT, USLT);
684
685 case2iu(ISHR, USHR);
686
687 case2fi(SSG, ISSG);
688 case3(ABS, IABS, IABS);
689
690 default: break;
691 }
692
693 assert(op != TGSI_OPCODE_LAST);
694 return op;
695 }
696
697 glsl_to_tgsi_instruction *
698 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
699 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
700 unsigned elements)
701 {
702 static const unsigned dot_opcodes[] = {
703 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
704 };
705
706 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
707 }
708
709 /**
710 * Emits TGSI scalar opcodes to produce unique answers across channels.
711 *
712 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
713 * channel determines the result across all channels. So to do a vec4
714 * of this operation, we want to emit a scalar per source channel used
715 * to produce dest channels.
716 */
717 void
718 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
719 st_dst_reg dst,
720 st_src_reg orig_src0, st_src_reg orig_src1)
721 {
722 int i, j;
723 int done_mask = ~dst.writemask;
724
725 /* TGSI RCP is a scalar operation splatting results to all channels,
726 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
727 * dst channels.
728 */
729 for (i = 0; i < 4; i++) {
730 GLuint this_mask = (1 << i);
731 glsl_to_tgsi_instruction *inst;
732 st_src_reg src0 = orig_src0;
733 st_src_reg src1 = orig_src1;
734
735 if (done_mask & this_mask)
736 continue;
737
738 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
739 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
740 for (j = i + 1; j < 4; j++) {
741 /* If there is another enabled component in the destination that is
742 * derived from the same inputs, generate its value on this pass as
743 * well.
744 */
745 if (!(done_mask & (1 << j)) &&
746 GET_SWZ(src0.swizzle, j) == src0_swiz &&
747 GET_SWZ(src1.swizzle, j) == src1_swiz) {
748 this_mask |= (1 << j);
749 }
750 }
751 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
752 src0_swiz, src0_swiz);
753 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
754 src1_swiz, src1_swiz);
755
756 inst = emit(ir, op, dst, src0, src1);
757 inst->dst.writemask = this_mask;
758 done_mask |= this_mask;
759 }
760 }
761
762 void
763 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
764 st_dst_reg dst, st_src_reg src0)
765 {
766 st_src_reg undef = undef_src;
767
768 undef.swizzle = SWIZZLE_XXXX;
769
770 emit_scalar(ir, op, dst, src0, undef);
771 }
772
773 void
774 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
775 st_dst_reg dst, st_src_reg src0)
776 {
777 int op = TGSI_OPCODE_ARL;
778
779 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
780 op = TGSI_OPCODE_UARL;
781
782 assert(dst.file == PROGRAM_ADDRESS);
783 if (dst.index >= this->num_address_regs)
784 this->num_address_regs = dst.index + 1;
785
786 emit(NULL, op, dst, src0);
787 }
788
789 /**
790 * Emit an TGSI_OPCODE_SCS instruction
791 *
792 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
793 * Instead of splatting its result across all four components of the
794 * destination, it writes one value to the \c x component and another value to
795 * the \c y component.
796 *
797 * \param ir IR instruction being processed
798 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
799 * on which value is desired.
800 * \param dst Destination register
801 * \param src Source register
802 */
803 void
804 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
805 st_dst_reg dst,
806 const st_src_reg &src)
807 {
808 /* Vertex programs cannot use the SCS opcode.
809 */
810 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
811 emit_scalar(ir, op, dst, src);
812 return;
813 }
814
815 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
816 const unsigned scs_mask = (1U << component);
817 int done_mask = ~dst.writemask;
818 st_src_reg tmp;
819
820 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
821
822 /* If there are compnents in the destination that differ from the component
823 * that will be written by the SCS instrution, we'll need a temporary.
824 */
825 if (scs_mask != unsigned(dst.writemask)) {
826 tmp = get_temp(glsl_type::vec4_type);
827 }
828
829 for (unsigned i = 0; i < 4; i++) {
830 unsigned this_mask = (1U << i);
831 st_src_reg src0 = src;
832
833 if ((done_mask & this_mask) != 0)
834 continue;
835
836 /* The source swizzle specified which component of the source generates
837 * sine / cosine for the current component in the destination. The SCS
838 * instruction requires that this value be swizzle to the X component.
839 * Replace the current swizzle with a swizzle that puts the source in
840 * the X component.
841 */
842 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
843
844 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
845 src0_swiz, src0_swiz);
846 for (unsigned j = i + 1; j < 4; j++) {
847 /* If there is another enabled component in the destination that is
848 * derived from the same inputs, generate its value on this pass as
849 * well.
850 */
851 if (!(done_mask & (1 << j)) &&
852 GET_SWZ(src0.swizzle, j) == src0_swiz) {
853 this_mask |= (1 << j);
854 }
855 }
856
857 if (this_mask != scs_mask) {
858 glsl_to_tgsi_instruction *inst;
859 st_dst_reg tmp_dst = st_dst_reg(tmp);
860
861 /* Emit the SCS instruction.
862 */
863 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
864 inst->dst.writemask = scs_mask;
865
866 /* Move the result of the SCS instruction to the desired location in
867 * the destination.
868 */
869 tmp.swizzle = MAKE_SWIZZLE4(component, component,
870 component, component);
871 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
872 inst->dst.writemask = this_mask;
873 } else {
874 /* Emit the SCS instruction to write directly to the destination.
875 */
876 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
877 inst->dst.writemask = scs_mask;
878 }
879
880 done_mask |= this_mask;
881 }
882 }
883
884 int
885 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
886 gl_constant_value values[4], int size, int datatype,
887 GLuint *swizzle_out)
888 {
889 if (file == PROGRAM_CONSTANT) {
890 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
891 size, datatype, swizzle_out);
892 } else {
893 int index = 0;
894 immediate_storage *entry;
895 assert(file == PROGRAM_IMMEDIATE);
896
897 /* Search immediate storage to see if we already have an identical
898 * immediate that we can use instead of adding a duplicate entry.
899 */
900 foreach_iter(exec_list_iterator, iter, this->immediates) {
901 entry = (immediate_storage *)iter.get();
902
903 if (entry->size == size &&
904 entry->type == datatype &&
905 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
906 return index;
907 }
908 index++;
909 }
910
911 /* Add this immediate to the list. */
912 entry = new(mem_ctx) immediate_storage(values, size, datatype);
913 this->immediates.push_tail(entry);
914 this->num_immediates++;
915 return index;
916 }
917 }
918
919 st_src_reg
920 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
921 {
922 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
923 union gl_constant_value uval;
924
925 uval.f = val;
926 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
927
928 return src;
929 }
930
931 st_src_reg
932 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
933 {
934 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
935 union gl_constant_value uval;
936
937 assert(native_integers);
938
939 uval.i = val;
940 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
941
942 return src;
943 }
944
945 st_src_reg
946 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
947 {
948 if (native_integers)
949 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
950 st_src_reg_for_int(val);
951 else
952 return st_src_reg_for_float(val);
953 }
954
955 static int
956 type_size(const struct glsl_type *type)
957 {
958 unsigned int i;
959 int size;
960
961 switch (type->base_type) {
962 case GLSL_TYPE_UINT:
963 case GLSL_TYPE_INT:
964 case GLSL_TYPE_FLOAT:
965 case GLSL_TYPE_BOOL:
966 if (type->is_matrix()) {
967 return type->matrix_columns;
968 } else {
969 /* Regardless of size of vector, it gets a vec4. This is bad
970 * packing for things like floats, but otherwise arrays become a
971 * mess. Hopefully a later pass over the code can pack scalars
972 * down if appropriate.
973 */
974 return 1;
975 }
976 case GLSL_TYPE_ARRAY:
977 assert(type->length > 0);
978 return type_size(type->fields.array) * type->length;
979 case GLSL_TYPE_STRUCT:
980 size = 0;
981 for (i = 0; i < type->length; i++) {
982 size += type_size(type->fields.structure[i].type);
983 }
984 return size;
985 case GLSL_TYPE_SAMPLER:
986 /* Samplers take up one slot in UNIFORMS[], but they're baked in
987 * at link time.
988 */
989 return 1;
990 case GLSL_TYPE_ATOMIC_UINT:
991 case GLSL_TYPE_INTERFACE:
992 case GLSL_TYPE_VOID:
993 case GLSL_TYPE_ERROR:
994 assert(!"Invalid type in type_size");
995 break;
996 }
997 return 0;
998 }
999
1000 /**
1001 * In the initial pass of codegen, we assign temporary numbers to
1002 * intermediate results. (not SSA -- variable assignments will reuse
1003 * storage).
1004 */
1005 st_src_reg
1006 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
1007 {
1008 st_src_reg src;
1009
1010 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
1011 src.reladdr = NULL;
1012 src.negate = 0;
1013
1014 if (!options->EmitNoIndirectTemp &&
1015 (type->is_array() || type->is_matrix())) {
1016
1017 src.file = PROGRAM_ARRAY;
1018 src.index = next_array << 16 | 0x8000;
1019 array_sizes[next_array] = type_size(type);
1020 ++next_array;
1021
1022 } else {
1023 src.file = PROGRAM_TEMPORARY;
1024 src.index = next_temp;
1025 next_temp += type_size(type);
1026 }
1027
1028 if (type->is_array() || type->is_record()) {
1029 src.swizzle = SWIZZLE_NOOP;
1030 } else {
1031 src.swizzle = swizzle_for_size(type->vector_elements);
1032 }
1033
1034 return src;
1035 }
1036
1037 variable_storage *
1038 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1039 {
1040
1041 variable_storage *entry;
1042
1043 foreach_iter(exec_list_iterator, iter, this->variables) {
1044 entry = (variable_storage *)iter.get();
1045
1046 if (entry->var == var)
1047 return entry;
1048 }
1049
1050 return NULL;
1051 }
1052
1053 void
1054 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1055 {
1056 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1057 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1058
1059 fp->OriginUpperLeft = ir->origin_upper_left;
1060 fp->PixelCenterInteger = ir->pixel_center_integer;
1061 }
1062
1063 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1064 unsigned int i;
1065 const ir_state_slot *const slots = ir->state_slots;
1066 assert(ir->state_slots != NULL);
1067
1068 /* Check if this statevar's setup in the STATE file exactly
1069 * matches how we'll want to reference it as a
1070 * struct/array/whatever. If not, then we need to move it into
1071 * temporary storage and hope that it'll get copy-propagated
1072 * out.
1073 */
1074 for (i = 0; i < ir->num_state_slots; i++) {
1075 if (slots[i].swizzle != SWIZZLE_XYZW) {
1076 break;
1077 }
1078 }
1079
1080 variable_storage *storage;
1081 st_dst_reg dst;
1082 if (i == ir->num_state_slots) {
1083 /* We'll set the index later. */
1084 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1085 this->variables.push_tail(storage);
1086
1087 dst = undef_dst;
1088 } else {
1089 /* The variable_storage constructor allocates slots based on the size
1090 * of the type. However, this had better match the number of state
1091 * elements that we're going to copy into the new temporary.
1092 */
1093 assert((int) ir->num_state_slots == type_size(ir->type));
1094
1095 dst = st_dst_reg(get_temp(ir->type));
1096
1097 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1098
1099 this->variables.push_tail(storage);
1100 }
1101
1102
1103 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1104 int index = _mesa_add_state_reference(this->prog->Parameters,
1105 (gl_state_index *)slots[i].tokens);
1106
1107 if (storage->file == PROGRAM_STATE_VAR) {
1108 if (storage->index == -1) {
1109 storage->index = index;
1110 } else {
1111 assert(index == storage->index + (int)i);
1112 }
1113 } else {
1114 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1115 * the data being moved since MOV does not care about the type of
1116 * data it is moving, and we don't want to declare registers with
1117 * array or struct types.
1118 */
1119 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1120 src.swizzle = slots[i].swizzle;
1121 emit(ir, TGSI_OPCODE_MOV, dst, src);
1122 /* even a float takes up a whole vec4 reg in a struct/array. */
1123 dst.index++;
1124 }
1125 }
1126
1127 if (storage->file == PROGRAM_TEMPORARY &&
1128 dst.index != storage->index + (int) ir->num_state_slots) {
1129 fail_link(this->shader_program,
1130 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1131 ir->name, dst.index - storage->index,
1132 type_size(ir->type));
1133 }
1134 }
1135 }
1136
1137 void
1138 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1139 {
1140 /* Any normative loop bounds should have been lowered by
1141 * lower_bounded_loops().
1142 */
1143 assert(ir->normative_bound < 0);
1144
1145 emit(NULL, TGSI_OPCODE_BGNLOOP);
1146
1147 visit_exec_list(&ir->body_instructions, this);
1148
1149 emit(NULL, TGSI_OPCODE_ENDLOOP);
1150 }
1151
1152 void
1153 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1154 {
1155 switch (ir->mode) {
1156 case ir_loop_jump::jump_break:
1157 emit(NULL, TGSI_OPCODE_BRK);
1158 break;
1159 case ir_loop_jump::jump_continue:
1160 emit(NULL, TGSI_OPCODE_CONT);
1161 break;
1162 }
1163 }
1164
1165
1166 void
1167 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1168 {
1169 assert(0);
1170 (void)ir;
1171 }
1172
1173 void
1174 glsl_to_tgsi_visitor::visit(ir_function *ir)
1175 {
1176 /* Ignore function bodies other than main() -- we shouldn't see calls to
1177 * them since they should all be inlined before we get to glsl_to_tgsi.
1178 */
1179 if (strcmp(ir->name, "main") == 0) {
1180 const ir_function_signature *sig;
1181 exec_list empty;
1182
1183 sig = ir->matching_signature(NULL, &empty);
1184
1185 assert(sig);
1186
1187 foreach_iter(exec_list_iterator, iter, sig->body) {
1188 ir_instruction *ir = (ir_instruction *)iter.get();
1189
1190 ir->accept(this);
1191 }
1192 }
1193 }
1194
1195 bool
1196 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1197 {
1198 int nonmul_operand = 1 - mul_operand;
1199 st_src_reg a, b, c;
1200 st_dst_reg result_dst;
1201
1202 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1203 if (!expr || expr->operation != ir_binop_mul)
1204 return false;
1205
1206 expr->operands[0]->accept(this);
1207 a = this->result;
1208 expr->operands[1]->accept(this);
1209 b = this->result;
1210 ir->operands[nonmul_operand]->accept(this);
1211 c = this->result;
1212
1213 this->result = get_temp(ir->type);
1214 result_dst = st_dst_reg(this->result);
1215 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1216 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1217
1218 return true;
1219 }
1220
1221 /**
1222 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1223 *
1224 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1225 * implemented using multiplication, and logical-or is implemented using
1226 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1227 * As result, the logical expression (a & !b) can be rewritten as:
1228 *
1229 * - a * !b
1230 * - a * (1 - b)
1231 * - (a * 1) - (a * b)
1232 * - a + -(a * b)
1233 * - a + (a * -b)
1234 *
1235 * This final expression can be implemented as a single MAD(a, -b, a)
1236 * instruction.
1237 */
1238 bool
1239 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1240 {
1241 const int other_operand = 1 - try_operand;
1242 st_src_reg a, b;
1243
1244 ir_expression *expr = ir->operands[try_operand]->as_expression();
1245 if (!expr || expr->operation != ir_unop_logic_not)
1246 return false;
1247
1248 ir->operands[other_operand]->accept(this);
1249 a = this->result;
1250 expr->operands[0]->accept(this);
1251 b = this->result;
1252
1253 b.negate = ~b.negate;
1254
1255 this->result = get_temp(ir->type);
1256 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1257
1258 return true;
1259 }
1260
1261 bool
1262 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1263 {
1264 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1265 */
1266 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1267 !st_context(this->ctx)->has_shader_model3) {
1268 return false;
1269 }
1270
1271 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1272 if (!sat_src)
1273 return false;
1274
1275 sat_src->accept(this);
1276 st_src_reg src = this->result;
1277
1278 /* If we generated an expression instruction into a temporary in
1279 * processing the saturate's operand, apply the saturate to that
1280 * instruction. Otherwise, generate a MOV to do the saturate.
1281 *
1282 * Note that we have to be careful to only do this optimization if
1283 * the instruction in question was what generated src->result. For
1284 * example, ir_dereference_array might generate a MUL instruction
1285 * to create the reladdr, and return us a src reg using that
1286 * reladdr. That MUL result is not the value we're trying to
1287 * saturate.
1288 */
1289 ir_expression *sat_src_expr = sat_src->as_expression();
1290 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1291 sat_src_expr->operation == ir_binop_add ||
1292 sat_src_expr->operation == ir_binop_dot)) {
1293 glsl_to_tgsi_instruction *new_inst;
1294 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1295 new_inst->saturate = true;
1296 } else {
1297 this->result = get_temp(ir->type);
1298 st_dst_reg result_dst = st_dst_reg(this->result);
1299 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1300 glsl_to_tgsi_instruction *inst;
1301 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1302 inst->saturate = true;
1303 }
1304
1305 return true;
1306 }
1307
1308 void
1309 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1310 st_src_reg *reg, int *num_reladdr)
1311 {
1312 if (!reg->reladdr && !reg->reladdr2)
1313 return;
1314
1315 if (reg->reladdr) emit_arl(ir, address_reg, *reg->reladdr);
1316 if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2);
1317
1318 if (*num_reladdr != 1) {
1319 st_src_reg temp = get_temp(glsl_type::vec4_type);
1320
1321 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1322 *reg = temp;
1323 }
1324
1325 (*num_reladdr)--;
1326 }
1327
1328 void
1329 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1330 {
1331 unsigned int operand;
1332 st_src_reg op[Elements(ir->operands)];
1333 st_src_reg result_src;
1334 st_dst_reg result_dst;
1335
1336 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1337 */
1338 if (ir->operation == ir_binop_add) {
1339 if (try_emit_mad(ir, 1))
1340 return;
1341 if (try_emit_mad(ir, 0))
1342 return;
1343 }
1344
1345 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1346 */
1347 if (ir->operation == ir_binop_logic_and) {
1348 if (try_emit_mad_for_and_not(ir, 1))
1349 return;
1350 if (try_emit_mad_for_and_not(ir, 0))
1351 return;
1352 }
1353
1354 if (try_emit_sat(ir))
1355 return;
1356
1357 if (ir->operation == ir_quadop_vector)
1358 assert(!"ir_quadop_vector should have been lowered");
1359
1360 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1361 this->result.file = PROGRAM_UNDEFINED;
1362 ir->operands[operand]->accept(this);
1363 if (this->result.file == PROGRAM_UNDEFINED) {
1364 printf("Failed to get tree for expression operand:\n");
1365 ir->operands[operand]->print();
1366 printf("\n");
1367 exit(1);
1368 }
1369 op[operand] = this->result;
1370
1371 /* Matrix expression operands should have been broken down to vector
1372 * operations already.
1373 */
1374 assert(!ir->operands[operand]->type->is_matrix());
1375 }
1376
1377 int vector_elements = ir->operands[0]->type->vector_elements;
1378 if (ir->operands[1]) {
1379 vector_elements = MAX2(vector_elements,
1380 ir->operands[1]->type->vector_elements);
1381 }
1382
1383 this->result.file = PROGRAM_UNDEFINED;
1384
1385 /* Storage for our result. Ideally for an assignment we'd be using
1386 * the actual storage for the result here, instead.
1387 */
1388 result_src = get_temp(ir->type);
1389 /* convenience for the emit functions below. */
1390 result_dst = st_dst_reg(result_src);
1391 /* Limit writes to the channels that will be used by result_src later.
1392 * This does limit this temp's use as a temporary for multi-instruction
1393 * sequences.
1394 */
1395 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1396
1397 switch (ir->operation) {
1398 case ir_unop_logic_not:
1399 if (result_dst.type != GLSL_TYPE_FLOAT)
1400 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1401 else {
1402 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1403 * older GPUs implement SEQ using multiple instructions (i915 uses two
1404 * SGE instructions and a MUL instruction). Since our logic values are
1405 * 0.0 and 1.0, 1-x also implements !x.
1406 */
1407 op[0].negate = ~op[0].negate;
1408 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1409 }
1410 break;
1411 case ir_unop_neg:
1412 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1413 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1414 else {
1415 op[0].negate = ~op[0].negate;
1416 result_src = op[0];
1417 }
1418 break;
1419 case ir_unop_abs:
1420 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1421 break;
1422 case ir_unop_sign:
1423 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1424 break;
1425 case ir_unop_rcp:
1426 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1427 break;
1428
1429 case ir_unop_exp2:
1430 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1431 break;
1432 case ir_unop_exp:
1433 case ir_unop_log:
1434 assert(!"not reached: should be handled by ir_explog_to_explog2");
1435 break;
1436 case ir_unop_log2:
1437 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1438 break;
1439 case ir_unop_sin:
1440 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1441 break;
1442 case ir_unop_cos:
1443 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1444 break;
1445 case ir_unop_sin_reduced:
1446 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1447 break;
1448 case ir_unop_cos_reduced:
1449 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1450 break;
1451
1452 case ir_unop_dFdx:
1453 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1454 break;
1455 case ir_unop_dFdy:
1456 {
1457 /* The X component contains 1 or -1 depending on whether the framebuffer
1458 * is a FBO or the window system buffer, respectively.
1459 * It is then multiplied with the source operand of DDY.
1460 */
1461 static const gl_state_index transform_y_state[STATE_LENGTH]
1462 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1463
1464 unsigned transform_y_index =
1465 _mesa_add_state_reference(this->prog->Parameters,
1466 transform_y_state);
1467
1468 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1469 transform_y_index,
1470 glsl_type::vec4_type);
1471 transform_y.swizzle = SWIZZLE_XXXX;
1472
1473 st_src_reg temp = get_temp(glsl_type::vec4_type);
1474
1475 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1476 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1477 break;
1478 }
1479
1480 case ir_unop_noise: {
1481 /* At some point, a motivated person could add a better
1482 * implementation of noise. Currently not even the nvidia
1483 * binary drivers do anything more than this. In any case, the
1484 * place to do this is in the GL state tracker, not the poor
1485 * driver.
1486 */
1487 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1488 break;
1489 }
1490
1491 case ir_binop_add:
1492 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1493 break;
1494 case ir_binop_sub:
1495 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1496 break;
1497
1498 case ir_binop_mul:
1499 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1500 break;
1501 case ir_binop_div:
1502 if (result_dst.type == GLSL_TYPE_FLOAT)
1503 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1504 else
1505 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1506 break;
1507 case ir_binop_mod:
1508 if (result_dst.type == GLSL_TYPE_FLOAT)
1509 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1510 else
1511 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1512 break;
1513
1514 case ir_binop_less:
1515 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1516 break;
1517 case ir_binop_greater:
1518 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1519 break;
1520 case ir_binop_lequal:
1521 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1522 break;
1523 case ir_binop_gequal:
1524 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1525 break;
1526 case ir_binop_equal:
1527 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1528 break;
1529 case ir_binop_nequal:
1530 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1531 break;
1532 case ir_binop_all_equal:
1533 /* "==" operator producing a scalar boolean. */
1534 if (ir->operands[0]->type->is_vector() ||
1535 ir->operands[1]->type->is_vector()) {
1536 st_src_reg temp = get_temp(native_integers ?
1537 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1538 glsl_type::vec4_type);
1539
1540 if (native_integers) {
1541 st_dst_reg temp_dst = st_dst_reg(temp);
1542 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1543
1544 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1545
1546 /* Emit 1-3 AND operations to combine the SEQ results. */
1547 switch (ir->operands[0]->type->vector_elements) {
1548 case 2:
1549 break;
1550 case 3:
1551 temp_dst.writemask = WRITEMASK_Y;
1552 temp1.swizzle = SWIZZLE_YYYY;
1553 temp2.swizzle = SWIZZLE_ZZZZ;
1554 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1555 break;
1556 case 4:
1557 temp_dst.writemask = WRITEMASK_X;
1558 temp1.swizzle = SWIZZLE_XXXX;
1559 temp2.swizzle = SWIZZLE_YYYY;
1560 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1561 temp_dst.writemask = WRITEMASK_Y;
1562 temp1.swizzle = SWIZZLE_ZZZZ;
1563 temp2.swizzle = SWIZZLE_WWWW;
1564 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1565 }
1566
1567 temp1.swizzle = SWIZZLE_XXXX;
1568 temp2.swizzle = SWIZZLE_YYYY;
1569 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1570 } else {
1571 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1572
1573 /* After the dot-product, the value will be an integer on the
1574 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1575 */
1576 emit_dp(ir, result_dst, temp, temp, vector_elements);
1577
1578 /* Negating the result of the dot-product gives values on the range
1579 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1580 * This is achieved using SGE.
1581 */
1582 st_src_reg sge_src = result_src;
1583 sge_src.negate = ~sge_src.negate;
1584 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1585 }
1586 } else {
1587 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1588 }
1589 break;
1590 case ir_binop_any_nequal:
1591 /* "!=" operator producing a scalar boolean. */
1592 if (ir->operands[0]->type->is_vector() ||
1593 ir->operands[1]->type->is_vector()) {
1594 st_src_reg temp = get_temp(native_integers ?
1595 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1596 glsl_type::vec4_type);
1597 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1598
1599 if (native_integers) {
1600 st_dst_reg temp_dst = st_dst_reg(temp);
1601 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1602
1603 /* Emit 1-3 OR operations to combine the SNE results. */
1604 switch (ir->operands[0]->type->vector_elements) {
1605 case 2:
1606 break;
1607 case 3:
1608 temp_dst.writemask = WRITEMASK_Y;
1609 temp1.swizzle = SWIZZLE_YYYY;
1610 temp2.swizzle = SWIZZLE_ZZZZ;
1611 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1612 break;
1613 case 4:
1614 temp_dst.writemask = WRITEMASK_X;
1615 temp1.swizzle = SWIZZLE_XXXX;
1616 temp2.swizzle = SWIZZLE_YYYY;
1617 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1618 temp_dst.writemask = WRITEMASK_Y;
1619 temp1.swizzle = SWIZZLE_ZZZZ;
1620 temp2.swizzle = SWIZZLE_WWWW;
1621 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1622 }
1623
1624 temp1.swizzle = SWIZZLE_XXXX;
1625 temp2.swizzle = SWIZZLE_YYYY;
1626 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1627 } else {
1628 /* After the dot-product, the value will be an integer on the
1629 * range [0,4]. Zero stays zero, and positive values become 1.0.
1630 */
1631 glsl_to_tgsi_instruction *const dp =
1632 emit_dp(ir, result_dst, temp, temp, vector_elements);
1633 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1634 /* The clamping to [0,1] can be done for free in the fragment
1635 * shader with a saturate.
1636 */
1637 dp->saturate = true;
1638 } else {
1639 /* Negating the result of the dot-product gives values on the range
1640 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1641 * achieved using SLT.
1642 */
1643 st_src_reg slt_src = result_src;
1644 slt_src.negate = ~slt_src.negate;
1645 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1646 }
1647 }
1648 } else {
1649 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1650 }
1651 break;
1652
1653 case ir_unop_any: {
1654 assert(ir->operands[0]->type->is_vector());
1655
1656 /* After the dot-product, the value will be an integer on the
1657 * range [0,4]. Zero stays zero, and positive values become 1.0.
1658 */
1659 glsl_to_tgsi_instruction *const dp =
1660 emit_dp(ir, result_dst, op[0], op[0],
1661 ir->operands[0]->type->vector_elements);
1662 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1663 result_dst.type == GLSL_TYPE_FLOAT) {
1664 /* The clamping to [0,1] can be done for free in the fragment
1665 * shader with a saturate.
1666 */
1667 dp->saturate = true;
1668 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1669 /* Negating the result of the dot-product gives values on the range
1670 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1671 * is achieved using SLT.
1672 */
1673 st_src_reg slt_src = result_src;
1674 slt_src.negate = ~slt_src.negate;
1675 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1676 }
1677 else {
1678 /* Use SNE 0 if integers are being used as boolean values. */
1679 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1680 }
1681 break;
1682 }
1683
1684 case ir_binop_logic_xor:
1685 if (native_integers)
1686 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1687 else
1688 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1689 break;
1690
1691 case ir_binop_logic_or: {
1692 if (native_integers) {
1693 /* If integers are used as booleans, we can use an actual "or"
1694 * instruction.
1695 */
1696 assert(native_integers);
1697 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1698 } else {
1699 /* After the addition, the value will be an integer on the
1700 * range [0,2]. Zero stays zero, and positive values become 1.0.
1701 */
1702 glsl_to_tgsi_instruction *add =
1703 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1704 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1705 /* The clamping to [0,1] can be done for free in the fragment
1706 * shader with a saturate if floats are being used as boolean values.
1707 */
1708 add->saturate = true;
1709 } else {
1710 /* Negating the result of the addition gives values on the range
1711 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1712 * is achieved using SLT.
1713 */
1714 st_src_reg slt_src = result_src;
1715 slt_src.negate = ~slt_src.negate;
1716 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1717 }
1718 }
1719 break;
1720 }
1721
1722 case ir_binop_logic_and:
1723 /* If native integers are disabled, the bool args are stored as float 0.0
1724 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1725 * actual AND opcode.
1726 */
1727 if (native_integers)
1728 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1729 else
1730 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1731 break;
1732
1733 case ir_binop_dot:
1734 assert(ir->operands[0]->type->is_vector());
1735 assert(ir->operands[0]->type == ir->operands[1]->type);
1736 emit_dp(ir, result_dst, op[0], op[1],
1737 ir->operands[0]->type->vector_elements);
1738 break;
1739
1740 case ir_unop_sqrt:
1741 if (have_sqrt) {
1742 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1743 }
1744 else {
1745 /* sqrt(x) = x * rsq(x). */
1746 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1747 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1748 /* For incoming channels <= 0, set the result to 0. */
1749 op[0].negate = ~op[0].negate;
1750 emit(ir, TGSI_OPCODE_CMP, result_dst,
1751 op[0], result_src, st_src_reg_for_float(0.0));
1752 }
1753 break;
1754 case ir_unop_rsq:
1755 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1756 break;
1757 case ir_unop_i2f:
1758 if (native_integers) {
1759 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1760 break;
1761 }
1762 /* fallthrough to next case otherwise */
1763 case ir_unop_b2f:
1764 if (native_integers) {
1765 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1766 break;
1767 }
1768 /* fallthrough to next case otherwise */
1769 case ir_unop_i2u:
1770 case ir_unop_u2i:
1771 /* Converting between signed and unsigned integers is a no-op. */
1772 result_src = op[0];
1773 break;
1774 case ir_unop_b2i:
1775 if (native_integers) {
1776 /* Booleans are stored as integers using ~0 for true and 0 for false.
1777 * GLSL requires that int(bool) return 1 for true and 0 for false.
1778 * This conversion is done with AND, but it could be done with NEG.
1779 */
1780 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1781 } else {
1782 /* Booleans and integers are both stored as floats when native
1783 * integers are disabled.
1784 */
1785 result_src = op[0];
1786 }
1787 break;
1788 case ir_unop_f2i:
1789 if (native_integers)
1790 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1791 else
1792 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1793 break;
1794 case ir_unop_f2u:
1795 if (native_integers)
1796 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1797 else
1798 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1799 break;
1800 case ir_unop_bitcast_f2i:
1801 result_src = op[0];
1802 result_src.type = GLSL_TYPE_INT;
1803 break;
1804 case ir_unop_bitcast_f2u:
1805 result_src = op[0];
1806 result_src.type = GLSL_TYPE_UINT;
1807 break;
1808 case ir_unop_bitcast_i2f:
1809 case ir_unop_bitcast_u2f:
1810 result_src = op[0];
1811 result_src.type = GLSL_TYPE_FLOAT;
1812 break;
1813 case ir_unop_f2b:
1814 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1815 break;
1816 case ir_unop_i2b:
1817 if (native_integers)
1818 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1819 else
1820 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1821 break;
1822 case ir_unop_trunc:
1823 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1824 break;
1825 case ir_unop_ceil:
1826 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1827 break;
1828 case ir_unop_floor:
1829 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1830 break;
1831 case ir_unop_round_even:
1832 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1833 break;
1834 case ir_unop_fract:
1835 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1836 break;
1837
1838 case ir_binop_min:
1839 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1840 break;
1841 case ir_binop_max:
1842 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1843 break;
1844 case ir_binop_pow:
1845 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1846 break;
1847
1848 case ir_unop_bit_not:
1849 if (native_integers) {
1850 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1851 break;
1852 }
1853 case ir_unop_u2f:
1854 if (native_integers) {
1855 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1856 break;
1857 }
1858 case ir_binop_lshift:
1859 if (native_integers) {
1860 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1861 break;
1862 }
1863 case ir_binop_rshift:
1864 if (native_integers) {
1865 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1866 break;
1867 }
1868 case ir_binop_bit_and:
1869 if (native_integers) {
1870 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1871 break;
1872 }
1873 case ir_binop_bit_xor:
1874 if (native_integers) {
1875 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1876 break;
1877 }
1878 case ir_binop_bit_or:
1879 if (native_integers) {
1880 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1881 break;
1882 }
1883
1884 assert(!"GLSL 1.30 features unsupported");
1885 break;
1886
1887 case ir_binop_ubo_load: {
1888 ir_constant *uniform_block = ir->operands[0]->as_constant();
1889 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1890 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1891 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1892 st_src_reg cbuf;
1893
1894 cbuf.type = glsl_type::vec4_type->base_type;
1895 cbuf.file = PROGRAM_CONSTANT;
1896 cbuf.index = 0;
1897 cbuf.index2D = uniform_block->value.u[0] + 1;
1898 cbuf.reladdr = NULL;
1899 cbuf.negate = 0;
1900
1901 assert(ir->type->is_vector() || ir->type->is_scalar());
1902
1903 if (const_offset_ir) {
1904 index_reg = st_src_reg_for_int(const_offset / 16);
1905 } else {
1906 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1907 }
1908
1909 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1910 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1911 const_offset % 16 / 4,
1912 const_offset % 16 / 4,
1913 const_offset % 16 / 4);
1914
1915 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1916 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1917
1918 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1919 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1920 } else {
1921 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1922 }
1923 break;
1924 }
1925 case ir_triop_lrp:
1926 /* note: we have to reorder the three args here */
1927 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1928 break;
1929 case ir_triop_csel:
1930 if (this->ctx->Const.NativeIntegers)
1931 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1932 else {
1933 op[0].negate = ~op[0].negate;
1934 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1935 }
1936 break;
1937 case ir_unop_pack_snorm_2x16:
1938 case ir_unop_pack_unorm_2x16:
1939 case ir_unop_pack_half_2x16:
1940 case ir_unop_pack_snorm_4x8:
1941 case ir_unop_pack_unorm_4x8:
1942 case ir_unop_unpack_snorm_2x16:
1943 case ir_unop_unpack_unorm_2x16:
1944 case ir_unop_unpack_half_2x16:
1945 case ir_unop_unpack_half_2x16_split_x:
1946 case ir_unop_unpack_half_2x16_split_y:
1947 case ir_unop_unpack_snorm_4x8:
1948 case ir_unop_unpack_unorm_4x8:
1949 case ir_binop_pack_half_2x16_split:
1950 case ir_unop_bitfield_reverse:
1951 case ir_unop_bit_count:
1952 case ir_unop_find_msb:
1953 case ir_unop_find_lsb:
1954 case ir_binop_bfm:
1955 case ir_triop_fma:
1956 case ir_triop_bfi:
1957 case ir_triop_bitfield_extract:
1958 case ir_quadop_bitfield_insert:
1959 case ir_quadop_vector:
1960 case ir_binop_vector_extract:
1961 case ir_triop_vector_insert:
1962 case ir_binop_ldexp:
1963 case ir_binop_carry:
1964 case ir_binop_borrow:
1965 case ir_binop_imul_high:
1966 /* This operation is not supported, or should have already been handled.
1967 */
1968 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1969 break;
1970 }
1971
1972 this->result = result_src;
1973 }
1974
1975
1976 void
1977 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1978 {
1979 st_src_reg src;
1980 int i;
1981 int swizzle[4];
1982
1983 /* Note that this is only swizzles in expressions, not those on the left
1984 * hand side of an assignment, which do write masking. See ir_assignment
1985 * for that.
1986 */
1987
1988 ir->val->accept(this);
1989 src = this->result;
1990 assert(src.file != PROGRAM_UNDEFINED);
1991
1992 for (i = 0; i < 4; i++) {
1993 if (i < ir->type->vector_elements) {
1994 switch (i) {
1995 case 0:
1996 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1997 break;
1998 case 1:
1999 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2000 break;
2001 case 2:
2002 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2003 break;
2004 case 3:
2005 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2006 break;
2007 }
2008 } else {
2009 /* If the type is smaller than a vec4, replicate the last
2010 * channel out.
2011 */
2012 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2013 }
2014 }
2015
2016 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2017
2018 this->result = src;
2019 }
2020
2021 void
2022 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2023 {
2024 variable_storage *entry = find_variable_storage(ir->var);
2025 ir_variable *var = ir->var;
2026
2027 if (!entry) {
2028 switch (var->mode) {
2029 case ir_var_uniform:
2030 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2031 var->location);
2032 this->variables.push_tail(entry);
2033 break;
2034 case ir_var_shader_in:
2035 /* The linker assigns locations for varyings and attributes,
2036 * including deprecated builtins (like gl_Color), user-assign
2037 * generic attributes (glBindVertexLocation), and
2038 * user-defined varyings.
2039 */
2040 assert(var->location != -1);
2041 entry = new(mem_ctx) variable_storage(var,
2042 PROGRAM_INPUT,
2043 var->location);
2044 break;
2045 case ir_var_shader_out:
2046 assert(var->location != -1);
2047 entry = new(mem_ctx) variable_storage(var,
2048 PROGRAM_OUTPUT,
2049 var->location + var->index);
2050 break;
2051 case ir_var_system_value:
2052 entry = new(mem_ctx) variable_storage(var,
2053 PROGRAM_SYSTEM_VALUE,
2054 var->location);
2055 break;
2056 case ir_var_auto:
2057 case ir_var_temporary:
2058 st_src_reg src = get_temp(var->type);
2059
2060 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2061 this->variables.push_tail(entry);
2062
2063 break;
2064 }
2065
2066 if (!entry) {
2067 printf("Failed to make storage for %s\n", var->name);
2068 exit(1);
2069 }
2070 }
2071
2072 this->result = st_src_reg(entry->file, entry->index, var->type);
2073 if (!native_integers)
2074 this->result.type = GLSL_TYPE_FLOAT;
2075 }
2076
2077 void
2078 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2079 {
2080 ir_constant *index;
2081 st_src_reg src;
2082 int element_size = type_size(ir->type);
2083 bool is_2D_input;
2084
2085 index = ir->array_index->constant_expression_value();
2086
2087 ir->array->accept(this);
2088 src = this->result;
2089
2090 is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV &&
2091 src.file == PROGRAM_INPUT &&
2092 ir->array->ir_type != ir_type_dereference_array;
2093
2094 if (is_2D_input)
2095 element_size = 1;
2096
2097 if (index) {
2098 if (is_2D_input) {
2099 src.index2D = index->value.i[0];
2100 src.has_index2 = true;
2101 } else
2102 src.index += index->value.i[0] * element_size;
2103 } else {
2104 /* Variable index array dereference. It eats the "vec4" of the
2105 * base of the array and an index that offsets the TGSI register
2106 * index.
2107 */
2108 ir->array_index->accept(this);
2109
2110 st_src_reg index_reg;
2111
2112 if (element_size == 1) {
2113 index_reg = this->result;
2114 } else {
2115 index_reg = get_temp(native_integers ?
2116 glsl_type::int_type : glsl_type::float_type);
2117
2118 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2119 this->result, st_src_reg_for_type(index_reg.type, element_size));
2120 }
2121
2122 /* If there was already a relative address register involved, add the
2123 * new and the old together to get the new offset.
2124 */
2125 if (!is_2D_input && src.reladdr != NULL) {
2126 st_src_reg accum_reg = get_temp(native_integers ?
2127 glsl_type::int_type : glsl_type::float_type);
2128
2129 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2130 index_reg, *src.reladdr);
2131
2132 index_reg = accum_reg;
2133 }
2134
2135 if (is_2D_input) {
2136 src.reladdr2 = ralloc(mem_ctx, st_src_reg);
2137 memcpy(src.reladdr2, &index_reg, sizeof(index_reg));
2138 src.index2D = 0;
2139 src.has_index2 = true;
2140 } else {
2141 src.reladdr = ralloc(mem_ctx, st_src_reg);
2142 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2143 }
2144 }
2145
2146 /* If the type is smaller than a vec4, replicate the last channel out. */
2147 if (ir->type->is_scalar() || ir->type->is_vector())
2148 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2149 else
2150 src.swizzle = SWIZZLE_NOOP;
2151
2152 /* Change the register type to the element type of the array. */
2153 src.type = ir->type->base_type;
2154
2155 this->result = src;
2156 }
2157
2158 void
2159 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2160 {
2161 unsigned int i;
2162 const glsl_type *struct_type = ir->record->type;
2163 int offset = 0;
2164
2165 ir->record->accept(this);
2166
2167 for (i = 0; i < struct_type->length; i++) {
2168 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2169 break;
2170 offset += type_size(struct_type->fields.structure[i].type);
2171 }
2172
2173 /* If the type is smaller than a vec4, replicate the last channel out. */
2174 if (ir->type->is_scalar() || ir->type->is_vector())
2175 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2176 else
2177 this->result.swizzle = SWIZZLE_NOOP;
2178
2179 this->result.index += offset;
2180 this->result.type = ir->type->base_type;
2181 }
2182
2183 /**
2184 * We want to be careful in assignment setup to hit the actual storage
2185 * instead of potentially using a temporary like we might with the
2186 * ir_dereference handler.
2187 */
2188 static st_dst_reg
2189 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2190 {
2191 /* The LHS must be a dereference. If the LHS is a variable indexed array
2192 * access of a vector, it must be separated into a series conditional moves
2193 * before reaching this point (see ir_vec_index_to_cond_assign).
2194 */
2195 assert(ir->as_dereference());
2196 ir_dereference_array *deref_array = ir->as_dereference_array();
2197 if (deref_array) {
2198 assert(!deref_array->array->type->is_vector());
2199 }
2200
2201 /* Use the rvalue deref handler for the most part. We'll ignore
2202 * swizzles in it and write swizzles using writemask, though.
2203 */
2204 ir->accept(v);
2205 return st_dst_reg(v->result);
2206 }
2207
2208 /**
2209 * Process the condition of a conditional assignment
2210 *
2211 * Examines the condition of a conditional assignment to generate the optimal
2212 * first operand of a \c CMP instruction. If the condition is a relational
2213 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2214 * used as the source for the \c CMP instruction. Otherwise the comparison
2215 * is processed to a boolean result, and the boolean result is used as the
2216 * operand to the CMP instruction.
2217 */
2218 bool
2219 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2220 {
2221 ir_rvalue *src_ir = ir;
2222 bool negate = true;
2223 bool switch_order = false;
2224
2225 ir_expression *const expr = ir->as_expression();
2226 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2227 bool zero_on_left = false;
2228
2229 if (expr->operands[0]->is_zero()) {
2230 src_ir = expr->operands[1];
2231 zero_on_left = true;
2232 } else if (expr->operands[1]->is_zero()) {
2233 src_ir = expr->operands[0];
2234 zero_on_left = false;
2235 }
2236
2237 /* a is - 0 + - 0 +
2238 * (a < 0) T F F ( a < 0) T F F
2239 * (0 < a) F F T (-a < 0) F F T
2240 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2241 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2242 * (a > 0) F F T (-a < 0) F F T
2243 * (0 > a) T F F ( a < 0) T F F
2244 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2245 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2246 *
2247 * Note that exchanging the order of 0 and 'a' in the comparison simply
2248 * means that the value of 'a' should be negated.
2249 */
2250 if (src_ir != ir) {
2251 switch (expr->operation) {
2252 case ir_binop_less:
2253 switch_order = false;
2254 negate = zero_on_left;
2255 break;
2256
2257 case ir_binop_greater:
2258 switch_order = false;
2259 negate = !zero_on_left;
2260 break;
2261
2262 case ir_binop_lequal:
2263 switch_order = true;
2264 negate = !zero_on_left;
2265 break;
2266
2267 case ir_binop_gequal:
2268 switch_order = true;
2269 negate = zero_on_left;
2270 break;
2271
2272 default:
2273 /* This isn't the right kind of comparison afterall, so make sure
2274 * the whole condition is visited.
2275 */
2276 src_ir = ir;
2277 break;
2278 }
2279 }
2280 }
2281
2282 src_ir->accept(this);
2283
2284 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2285 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2286 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2287 * computing the condition.
2288 */
2289 if (negate)
2290 this->result.negate = ~this->result.negate;
2291
2292 return switch_order;
2293 }
2294
2295 void
2296 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2297 st_dst_reg *l, st_src_reg *r)
2298 {
2299 if (type->base_type == GLSL_TYPE_STRUCT) {
2300 for (unsigned int i = 0; i < type->length; i++) {
2301 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2302 }
2303 return;
2304 }
2305
2306 if (type->is_array()) {
2307 for (unsigned int i = 0; i < type->length; i++) {
2308 emit_block_mov(ir, type->fields.array, l, r);
2309 }
2310 return;
2311 }
2312
2313 if (type->is_matrix()) {
2314 const struct glsl_type *vec_type;
2315
2316 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2317 type->vector_elements, 1);
2318
2319 for (int i = 0; i < type->matrix_columns; i++) {
2320 emit_block_mov(ir, vec_type, l, r);
2321 }
2322 return;
2323 }
2324
2325 assert(type->is_scalar() || type->is_vector());
2326
2327 r->type = type->base_type;
2328 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2329 l->index++;
2330 r->index++;
2331 }
2332
2333 void
2334 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2335 {
2336 st_dst_reg l;
2337 st_src_reg r;
2338 int i;
2339
2340 ir->rhs->accept(this);
2341 r = this->result;
2342
2343 l = get_assignment_lhs(ir->lhs, this);
2344
2345 /* FINISHME: This should really set to the correct maximal writemask for each
2346 * FINISHME: component written (in the loops below). This case can only
2347 * FINISHME: occur for matrices, arrays, and structures.
2348 */
2349 if (ir->write_mask == 0) {
2350 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2351 l.writemask = WRITEMASK_XYZW;
2352 } else if (ir->lhs->type->is_scalar() &&
2353 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2354 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2355 * FINISHME: W component of fragment shader output zero, work correctly.
2356 */
2357 l.writemask = WRITEMASK_XYZW;
2358 } else {
2359 int swizzles[4];
2360 int first_enabled_chan = 0;
2361 int rhs_chan = 0;
2362
2363 l.writemask = ir->write_mask;
2364
2365 for (int i = 0; i < 4; i++) {
2366 if (l.writemask & (1 << i)) {
2367 first_enabled_chan = GET_SWZ(r.swizzle, i);
2368 break;
2369 }
2370 }
2371
2372 /* Swizzle a small RHS vector into the channels being written.
2373 *
2374 * glsl ir treats write_mask as dictating how many channels are
2375 * present on the RHS while TGSI treats write_mask as just
2376 * showing which channels of the vec4 RHS get written.
2377 */
2378 for (int i = 0; i < 4; i++) {
2379 if (l.writemask & (1 << i))
2380 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2381 else
2382 swizzles[i] = first_enabled_chan;
2383 }
2384 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2385 swizzles[2], swizzles[3]);
2386 }
2387
2388 assert(l.file != PROGRAM_UNDEFINED);
2389 assert(r.file != PROGRAM_UNDEFINED);
2390
2391 if (ir->condition) {
2392 const bool switch_order = this->process_move_condition(ir->condition);
2393 st_src_reg condition = this->result;
2394
2395 for (i = 0; i < type_size(ir->lhs->type); i++) {
2396 st_src_reg l_src = st_src_reg(l);
2397 st_src_reg condition_temp = condition;
2398 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2399
2400 if (native_integers) {
2401 /* This is necessary because TGSI's CMP instruction expects the
2402 * condition to be a float, and we store booleans as integers.
2403 * TODO: really want to avoid i2f path and use UCMP. Requires
2404 * changes to process_move_condition though too.
2405 */
2406 condition_temp = get_temp(glsl_type::vec4_type);
2407 condition.negate = 0;
2408 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2409 condition_temp.swizzle = condition.swizzle;
2410 }
2411
2412 if (switch_order) {
2413 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2414 } else {
2415 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2416 }
2417
2418 l.index++;
2419 r.index++;
2420 }
2421 } else if (ir->rhs->as_expression() &&
2422 this->instructions.get_tail() &&
2423 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2424 type_size(ir->lhs->type) == 1 &&
2425 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2426 /* To avoid emitting an extra MOV when assigning an expression to a
2427 * variable, emit the last instruction of the expression again, but
2428 * replace the destination register with the target of the assignment.
2429 * Dead code elimination will remove the original instruction.
2430 */
2431 glsl_to_tgsi_instruction *inst, *new_inst;
2432 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2433 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2434 new_inst->saturate = inst->saturate;
2435 inst->dead_mask = inst->dst.writemask;
2436 } else {
2437 emit_block_mov(ir, ir->rhs->type, &l, &r);
2438 }
2439 }
2440
2441
2442 void
2443 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2444 {
2445 st_src_reg src;
2446 GLfloat stack_vals[4] = { 0 };
2447 gl_constant_value *values = (gl_constant_value *) stack_vals;
2448 GLenum gl_type = GL_NONE;
2449 unsigned int i;
2450 static int in_array = 0;
2451 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2452
2453 /* Unfortunately, 4 floats is all we can get into
2454 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2455 * aggregate constant and move each constant value into it. If we
2456 * get lucky, copy propagation will eliminate the extra moves.
2457 */
2458 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2459 st_src_reg temp_base = get_temp(ir->type);
2460 st_dst_reg temp = st_dst_reg(temp_base);
2461
2462 foreach_iter(exec_list_iterator, iter, ir->components) {
2463 ir_constant *field_value = (ir_constant *)iter.get();
2464 int size = type_size(field_value->type);
2465
2466 assert(size > 0);
2467
2468 field_value->accept(this);
2469 src = this->result;
2470
2471 for (i = 0; i < (unsigned int)size; i++) {
2472 emit(ir, TGSI_OPCODE_MOV, temp, src);
2473
2474 src.index++;
2475 temp.index++;
2476 }
2477 }
2478 this->result = temp_base;
2479 return;
2480 }
2481
2482 if (ir->type->is_array()) {
2483 st_src_reg temp_base = get_temp(ir->type);
2484 st_dst_reg temp = st_dst_reg(temp_base);
2485 int size = type_size(ir->type->fields.array);
2486
2487 assert(size > 0);
2488 in_array++;
2489
2490 for (i = 0; i < ir->type->length; i++) {
2491 ir->array_elements[i]->accept(this);
2492 src = this->result;
2493 for (int j = 0; j < size; j++) {
2494 emit(ir, TGSI_OPCODE_MOV, temp, src);
2495
2496 src.index++;
2497 temp.index++;
2498 }
2499 }
2500 this->result = temp_base;
2501 in_array--;
2502 return;
2503 }
2504
2505 if (ir->type->is_matrix()) {
2506 st_src_reg mat = get_temp(ir->type);
2507 st_dst_reg mat_column = st_dst_reg(mat);
2508
2509 for (i = 0; i < ir->type->matrix_columns; i++) {
2510 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2511 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2512
2513 src = st_src_reg(file, -1, ir->type->base_type);
2514 src.index = add_constant(file,
2515 values,
2516 ir->type->vector_elements,
2517 GL_FLOAT,
2518 &src.swizzle);
2519 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2520
2521 mat_column.index++;
2522 }
2523
2524 this->result = mat;
2525 return;
2526 }
2527
2528 switch (ir->type->base_type) {
2529 case GLSL_TYPE_FLOAT:
2530 gl_type = GL_FLOAT;
2531 for (i = 0; i < ir->type->vector_elements; i++) {
2532 values[i].f = ir->value.f[i];
2533 }
2534 break;
2535 case GLSL_TYPE_UINT:
2536 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2537 for (i = 0; i < ir->type->vector_elements; i++) {
2538 if (native_integers)
2539 values[i].u = ir->value.u[i];
2540 else
2541 values[i].f = ir->value.u[i];
2542 }
2543 break;
2544 case GLSL_TYPE_INT:
2545 gl_type = native_integers ? GL_INT : GL_FLOAT;
2546 for (i = 0; i < ir->type->vector_elements; i++) {
2547 if (native_integers)
2548 values[i].i = ir->value.i[i];
2549 else
2550 values[i].f = ir->value.i[i];
2551 }
2552 break;
2553 case GLSL_TYPE_BOOL:
2554 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2555 for (i = 0; i < ir->type->vector_elements; i++) {
2556 if (native_integers)
2557 values[i].u = ir->value.b[i] ? ~0 : 0;
2558 else
2559 values[i].f = ir->value.b[i];
2560 }
2561 break;
2562 default:
2563 assert(!"Non-float/uint/int/bool constant");
2564 }
2565
2566 this->result = st_src_reg(file, -1, ir->type);
2567 this->result.index = add_constant(file,
2568 values,
2569 ir->type->vector_elements,
2570 gl_type,
2571 &this->result.swizzle);
2572 }
2573
2574 function_entry *
2575 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2576 {
2577 function_entry *entry;
2578
2579 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2580 entry = (function_entry *)iter.get();
2581
2582 if (entry->sig == sig)
2583 return entry;
2584 }
2585
2586 entry = ralloc(mem_ctx, function_entry);
2587 entry->sig = sig;
2588 entry->sig_id = this->next_signature_id++;
2589 entry->bgn_inst = NULL;
2590
2591 /* Allocate storage for all the parameters. */
2592 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2593 ir_variable *param = (ir_variable *)iter.get();
2594 variable_storage *storage;
2595
2596 storage = find_variable_storage(param);
2597 assert(!storage);
2598
2599 st_src_reg src = get_temp(param->type);
2600
2601 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2602 this->variables.push_tail(storage);
2603 }
2604
2605 if (!sig->return_type->is_void()) {
2606 entry->return_reg = get_temp(sig->return_type);
2607 } else {
2608 entry->return_reg = undef_src;
2609 }
2610
2611 this->function_signatures.push_tail(entry);
2612 return entry;
2613 }
2614
2615 void
2616 glsl_to_tgsi_visitor::visit(ir_call *ir)
2617 {
2618 glsl_to_tgsi_instruction *call_inst;
2619 ir_function_signature *sig = ir->callee;
2620 function_entry *entry = get_function_signature(sig);
2621 int i;
2622
2623 /* Process in parameters. */
2624 exec_list_iterator sig_iter = sig->parameters.iterator();
2625 foreach_iter(exec_list_iterator, iter, *ir) {
2626 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2627 ir_variable *param = (ir_variable *)sig_iter.get();
2628
2629 if (param->mode == ir_var_function_in ||
2630 param->mode == ir_var_function_inout) {
2631 variable_storage *storage = find_variable_storage(param);
2632 assert(storage);
2633
2634 param_rval->accept(this);
2635 st_src_reg r = this->result;
2636
2637 st_dst_reg l;
2638 l.file = storage->file;
2639 l.index = storage->index;
2640 l.reladdr = NULL;
2641 l.writemask = WRITEMASK_XYZW;
2642 l.cond_mask = COND_TR;
2643
2644 for (i = 0; i < type_size(param->type); i++) {
2645 emit(ir, TGSI_OPCODE_MOV, l, r);
2646 l.index++;
2647 r.index++;
2648 }
2649 }
2650
2651 sig_iter.next();
2652 }
2653 assert(!sig_iter.has_next());
2654
2655 /* Emit call instruction */
2656 call_inst = emit(ir, TGSI_OPCODE_CAL);
2657 call_inst->function = entry;
2658
2659 /* Process out parameters. */
2660 sig_iter = sig->parameters.iterator();
2661 foreach_iter(exec_list_iterator, iter, *ir) {
2662 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2663 ir_variable *param = (ir_variable *)sig_iter.get();
2664
2665 if (param->mode == ir_var_function_out ||
2666 param->mode == ir_var_function_inout) {
2667 variable_storage *storage = find_variable_storage(param);
2668 assert(storage);
2669
2670 st_src_reg r;
2671 r.file = storage->file;
2672 r.index = storage->index;
2673 r.reladdr = NULL;
2674 r.swizzle = SWIZZLE_NOOP;
2675 r.negate = 0;
2676
2677 param_rval->accept(this);
2678 st_dst_reg l = st_dst_reg(this->result);
2679
2680 for (i = 0; i < type_size(param->type); i++) {
2681 emit(ir, TGSI_OPCODE_MOV, l, r);
2682 l.index++;
2683 r.index++;
2684 }
2685 }
2686
2687 sig_iter.next();
2688 }
2689 assert(!sig_iter.has_next());
2690
2691 /* Process return value. */
2692 this->result = entry->return_reg;
2693 }
2694
2695 void
2696 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2697 {
2698 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset, sample_index;
2699 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2700 glsl_to_tgsi_instruction *inst = NULL;
2701 unsigned opcode = TGSI_OPCODE_NOP;
2702 const glsl_type *sampler_type = ir->sampler->type;
2703 bool is_cube_array = false;
2704
2705 /* if we are a cube array sampler */
2706 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2707 sampler_type->sampler_array)) {
2708 is_cube_array = true;
2709 }
2710
2711 if (ir->coordinate) {
2712 ir->coordinate->accept(this);
2713
2714 /* Put our coords in a temp. We'll need to modify them for shadow,
2715 * projection, or LOD, so the only case we'd use it as is is if
2716 * we're doing plain old texturing. The optimization passes on
2717 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2718 */
2719 coord = get_temp(glsl_type::vec4_type);
2720 coord_dst = st_dst_reg(coord);
2721 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2722 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2723 }
2724
2725 if (ir->projector) {
2726 ir->projector->accept(this);
2727 projector = this->result;
2728 }
2729
2730 /* Storage for our result. Ideally for an assignment we'd be using
2731 * the actual storage for the result here, instead.
2732 */
2733 result_src = get_temp(ir->type);
2734 result_dst = st_dst_reg(result_src);
2735
2736 switch (ir->op) {
2737 case ir_tex:
2738 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2739 if (ir->offset) {
2740 ir->offset->accept(this);
2741 offset = this->result;
2742 }
2743 break;
2744 case ir_txb:
2745 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2746 ir->lod_info.bias->accept(this);
2747 lod_info = this->result;
2748 if (ir->offset) {
2749 ir->offset->accept(this);
2750 offset = this->result;
2751 }
2752 break;
2753 case ir_txl:
2754 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2755 ir->lod_info.lod->accept(this);
2756 lod_info = this->result;
2757 if (ir->offset) {
2758 ir->offset->accept(this);
2759 offset = this->result;
2760 }
2761 break;
2762 case ir_txd:
2763 opcode = TGSI_OPCODE_TXD;
2764 ir->lod_info.grad.dPdx->accept(this);
2765 dx = this->result;
2766 ir->lod_info.grad.dPdy->accept(this);
2767 dy = this->result;
2768 if (ir->offset) {
2769 ir->offset->accept(this);
2770 offset = this->result;
2771 }
2772 break;
2773 case ir_txs:
2774 opcode = TGSI_OPCODE_TXQ;
2775 ir->lod_info.lod->accept(this);
2776 lod_info = this->result;
2777 break;
2778 case ir_txf:
2779 opcode = TGSI_OPCODE_TXF;
2780 ir->lod_info.lod->accept(this);
2781 lod_info = this->result;
2782 if (ir->offset) {
2783 ir->offset->accept(this);
2784 offset = this->result;
2785 }
2786 break;
2787 case ir_txf_ms:
2788 opcode = TGSI_OPCODE_TXF;
2789 ir->lod_info.sample_index->accept(this);
2790 sample_index = this->result;
2791 break;
2792 case ir_lod:
2793 assert(!"Unexpected ir_lod opcode");
2794 break;
2795 case ir_tg4:
2796 assert(!"Unexpected ir_tg4 opcode");
2797 break;
2798 case ir_query_levels:
2799 assert(!"Unexpected ir_query_levels opcode");
2800 break;
2801 }
2802
2803 if (ir->projector) {
2804 if (opcode == TGSI_OPCODE_TEX) {
2805 /* Slot the projector in as the last component of the coord. */
2806 coord_dst.writemask = WRITEMASK_W;
2807 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2808 coord_dst.writemask = WRITEMASK_XYZW;
2809 opcode = TGSI_OPCODE_TXP;
2810 } else {
2811 st_src_reg coord_w = coord;
2812 coord_w.swizzle = SWIZZLE_WWWW;
2813
2814 /* For the other TEX opcodes there's no projective version
2815 * since the last slot is taken up by LOD info. Do the
2816 * projective divide now.
2817 */
2818 coord_dst.writemask = WRITEMASK_W;
2819 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2820
2821 /* In the case where we have to project the coordinates "by hand,"
2822 * the shadow comparator value must also be projected.
2823 */
2824 st_src_reg tmp_src = coord;
2825 if (ir->shadow_comparitor) {
2826 /* Slot the shadow value in as the second to last component of the
2827 * coord.
2828 */
2829 ir->shadow_comparitor->accept(this);
2830
2831 tmp_src = get_temp(glsl_type::vec4_type);
2832 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2833
2834 /* Projective division not allowed for array samplers. */
2835 assert(!sampler_type->sampler_array);
2836
2837 tmp_dst.writemask = WRITEMASK_Z;
2838 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2839
2840 tmp_dst.writemask = WRITEMASK_XY;
2841 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2842 }
2843
2844 coord_dst.writemask = WRITEMASK_XYZ;
2845 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2846
2847 coord_dst.writemask = WRITEMASK_XYZW;
2848 coord.swizzle = SWIZZLE_XYZW;
2849 }
2850 }
2851
2852 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2853 * comparator was put in the correct place (and projected) by the code,
2854 * above, that handles by-hand projection.
2855 */
2856 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2857 /* Slot the shadow value in as the second to last component of the
2858 * coord.
2859 */
2860 ir->shadow_comparitor->accept(this);
2861
2862 if (is_cube_array) {
2863 cube_sc = get_temp(glsl_type::float_type);
2864 cube_sc_dst = st_dst_reg(cube_sc);
2865 cube_sc_dst.writemask = WRITEMASK_X;
2866 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2867 cube_sc_dst.writemask = WRITEMASK_X;
2868 }
2869 else {
2870 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2871 sampler_type->sampler_array) ||
2872 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2873 coord_dst.writemask = WRITEMASK_W;
2874 } else {
2875 coord_dst.writemask = WRITEMASK_Z;
2876 }
2877
2878 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2879 coord_dst.writemask = WRITEMASK_XYZW;
2880 }
2881 }
2882
2883 if (ir->op == ir_txf_ms) {
2884 coord_dst.writemask = WRITEMASK_W;
2885 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2886 coord_dst.writemask = WRITEMASK_XYZW;
2887 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2888 opcode == TGSI_OPCODE_TXF) {
2889 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2890 coord_dst.writemask = WRITEMASK_W;
2891 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2892 coord_dst.writemask = WRITEMASK_XYZW;
2893 }
2894
2895 if (opcode == TGSI_OPCODE_TXD)
2896 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2897 else if (opcode == TGSI_OPCODE_TXQ)
2898 inst = emit(ir, opcode, result_dst, lod_info);
2899 else if (opcode == TGSI_OPCODE_TXF) {
2900 inst = emit(ir, opcode, result_dst, coord);
2901 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2902 inst = emit(ir, opcode, result_dst, coord, lod_info);
2903 } else if (opcode == TGSI_OPCODE_TEX2) {
2904 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2905 } else
2906 inst = emit(ir, opcode, result_dst, coord);
2907
2908 if (ir->shadow_comparitor)
2909 inst->tex_shadow = GL_TRUE;
2910
2911 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2912 this->shader_program,
2913 this->prog);
2914
2915 if (ir->offset) {
2916 inst->tex_offset_num_offset = 1;
2917 inst->tex_offsets[0].Index = offset.index;
2918 inst->tex_offsets[0].File = offset.file;
2919 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2920 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2921 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2922 }
2923
2924 switch (sampler_type->sampler_dimensionality) {
2925 case GLSL_SAMPLER_DIM_1D:
2926 inst->tex_target = (sampler_type->sampler_array)
2927 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2928 break;
2929 case GLSL_SAMPLER_DIM_2D:
2930 inst->tex_target = (sampler_type->sampler_array)
2931 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2932 break;
2933 case GLSL_SAMPLER_DIM_3D:
2934 inst->tex_target = TEXTURE_3D_INDEX;
2935 break;
2936 case GLSL_SAMPLER_DIM_CUBE:
2937 inst->tex_target = (sampler_type->sampler_array)
2938 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2939 break;
2940 case GLSL_SAMPLER_DIM_RECT:
2941 inst->tex_target = TEXTURE_RECT_INDEX;
2942 break;
2943 case GLSL_SAMPLER_DIM_BUF:
2944 inst->tex_target = TEXTURE_BUFFER_INDEX;
2945 break;
2946 case GLSL_SAMPLER_DIM_EXTERNAL:
2947 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2948 break;
2949 case GLSL_SAMPLER_DIM_MS:
2950 inst->tex_target = (sampler_type->sampler_array)
2951 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
2952 break;
2953 default:
2954 assert(!"Should not get here.");
2955 }
2956
2957 this->result = result_src;
2958 }
2959
2960 void
2961 glsl_to_tgsi_visitor::visit(ir_return *ir)
2962 {
2963 if (ir->get_value()) {
2964 st_dst_reg l;
2965 int i;
2966
2967 assert(current_function);
2968
2969 ir->get_value()->accept(this);
2970 st_src_reg r = this->result;
2971
2972 l = st_dst_reg(current_function->return_reg);
2973
2974 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2975 emit(ir, TGSI_OPCODE_MOV, l, r);
2976 l.index++;
2977 r.index++;
2978 }
2979 }
2980
2981 emit(ir, TGSI_OPCODE_RET);
2982 }
2983
2984 void
2985 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2986 {
2987 if (ir->condition) {
2988 ir->condition->accept(this);
2989 this->result.negate = ~this->result.negate;
2990 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
2991 } else {
2992 /* unconditional kil */
2993 emit(ir, TGSI_OPCODE_KILL);
2994 }
2995 }
2996
2997 void
2998 glsl_to_tgsi_visitor::visit(ir_if *ir)
2999 {
3000 unsigned if_opcode;
3001 glsl_to_tgsi_instruction *if_inst;
3002
3003 ir->condition->accept(this);
3004 assert(this->result.file != PROGRAM_UNDEFINED);
3005
3006 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3007
3008 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3009
3010 this->instructions.push_tail(if_inst);
3011
3012 visit_exec_list(&ir->then_instructions, this);
3013
3014 if (!ir->else_instructions.is_empty()) {
3015 emit(ir->condition, TGSI_OPCODE_ELSE);
3016 visit_exec_list(&ir->else_instructions, this);
3017 }
3018
3019 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3020 }
3021
3022
3023 void
3024 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3025 {
3026 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3027 emit(ir, TGSI_OPCODE_EMIT);
3028 }
3029
3030 void
3031 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3032 {
3033 assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV);
3034 emit(ir, TGSI_OPCODE_ENDPRIM);
3035 }
3036
3037 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3038 {
3039 result.file = PROGRAM_UNDEFINED;
3040 next_temp = 1;
3041 next_array = 0;
3042 next_signature_id = 1;
3043 num_immediates = 0;
3044 current_function = NULL;
3045 num_address_regs = 0;
3046 samplers_used = 0;
3047 indirect_addr_consts = false;
3048 glsl_version = 0;
3049 native_integers = false;
3050 mem_ctx = ralloc_context(NULL);
3051 ctx = NULL;
3052 prog = NULL;
3053 shader_program = NULL;
3054 options = NULL;
3055 }
3056
3057 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3058 {
3059 ralloc_free(mem_ctx);
3060 }
3061
3062 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3063 {
3064 delete v;
3065 }
3066
3067
3068 /**
3069 * Count resources used by the given gpu program (number of texture
3070 * samplers, etc).
3071 */
3072 static void
3073 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3074 {
3075 v->samplers_used = 0;
3076
3077 foreach_iter(exec_list_iterator, iter, v->instructions) {
3078 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3079
3080 if (is_tex_instruction(inst->op)) {
3081 v->samplers_used |= 1 << inst->sampler;
3082
3083 if (inst->tex_shadow) {
3084 prog->ShadowSamplers |= 1 << inst->sampler;
3085 }
3086 }
3087 }
3088
3089 prog->SamplersUsed = v->samplers_used;
3090
3091 if (v->shader_program != NULL)
3092 _mesa_update_shader_textures_used(v->shader_program, prog);
3093 }
3094
3095 static void
3096 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3097 struct gl_shader_program *shader_program,
3098 const char *name, const glsl_type *type,
3099 ir_constant *val)
3100 {
3101 if (type->is_record()) {
3102 ir_constant *field_constant;
3103
3104 field_constant = (ir_constant *)val->components.get_head();
3105
3106 for (unsigned int i = 0; i < type->length; i++) {
3107 const glsl_type *field_type = type->fields.structure[i].type;
3108 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3109 type->fields.structure[i].name);
3110 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3111 field_type, field_constant);
3112 field_constant = (ir_constant *)field_constant->next;
3113 }
3114 return;
3115 }
3116
3117 unsigned offset;
3118 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3119 &offset);
3120 if (offset == GL_INVALID_INDEX) {
3121 fail_link(shader_program,
3122 "Couldn't find uniform for initializer %s\n", name);
3123 return;
3124 }
3125 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3126
3127 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3128 ir_constant *element;
3129 const glsl_type *element_type;
3130 if (type->is_array()) {
3131 element = val->array_elements[i];
3132 element_type = type->fields.array;
3133 } else {
3134 element = val;
3135 element_type = type;
3136 }
3137
3138 void *values;
3139
3140 if (element_type->base_type == GLSL_TYPE_BOOL) {
3141 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3142 for (unsigned int j = 0; j < element_type->components(); j++) {
3143 conv[j] = element->value.b[j];
3144 }
3145 values = (void *)conv;
3146 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3147 element_type->vector_elements,
3148 1);
3149 } else {
3150 values = &element->value;
3151 }
3152
3153 if (element_type->is_matrix()) {
3154 _mesa_uniform_matrix(ctx, shader_program,
3155 element_type->matrix_columns,
3156 element_type->vector_elements,
3157 loc, 1, GL_FALSE, (GLfloat *)values);
3158 } else {
3159 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3160 values, element_type->gl_type);
3161 }
3162
3163 loc++;
3164 }
3165 }
3166
3167 /**
3168 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3169 * are read from the given src in this instruction
3170 */
3171 static int
3172 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3173 {
3174 int read_mask = 0, comp;
3175
3176 /* Now, given the src swizzle and the written channels, find which
3177 * components are actually read
3178 */
3179 for (comp = 0; comp < 4; ++comp) {
3180 const unsigned coord = GET_SWZ(src.swizzle, comp);
3181 ASSERT(coord < 4);
3182 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3183 read_mask |= 1 << coord;
3184 }
3185
3186 return read_mask;
3187 }
3188
3189 /**
3190 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3191 * instruction is the first instruction to write to register T0. There are
3192 * several lowering passes done in GLSL IR (e.g. branches and
3193 * relative addressing) that create a large number of conditional assignments
3194 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3195 *
3196 * Here is why this conversion is safe:
3197 * CMP T0, T1 T2 T0 can be expanded to:
3198 * if (T1 < 0.0)
3199 * MOV T0, T2;
3200 * else
3201 * MOV T0, T0;
3202 *
3203 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3204 * as the original program. If (T1 < 0.0) evaluates to false, executing
3205 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3206 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3207 * because any instruction that was going to read from T0 after this was going
3208 * to read a garbage value anyway.
3209 */
3210 void
3211 glsl_to_tgsi_visitor::simplify_cmp(void)
3212 {
3213 unsigned *tempWrites;
3214 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3215
3216 tempWrites = new unsigned[MAX_TEMPS];
3217 if (!tempWrites) {
3218 return;
3219 }
3220 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3221 memset(outputWrites, 0, sizeof(outputWrites));
3222
3223 foreach_iter(exec_list_iterator, iter, this->instructions) {
3224 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3225 unsigned prevWriteMask = 0;
3226
3227 /* Give up if we encounter relative addressing or flow control. */
3228 if (inst->dst.reladdr ||
3229 tgsi_get_opcode_info(inst->op)->is_branch ||
3230 inst->op == TGSI_OPCODE_BGNSUB ||
3231 inst->op == TGSI_OPCODE_CONT ||
3232 inst->op == TGSI_OPCODE_END ||
3233 inst->op == TGSI_OPCODE_ENDSUB ||
3234 inst->op == TGSI_OPCODE_RET) {
3235 break;
3236 }
3237
3238 if (inst->dst.file == PROGRAM_OUTPUT) {
3239 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3240 prevWriteMask = outputWrites[inst->dst.index];
3241 outputWrites[inst->dst.index] |= inst->dst.writemask;
3242 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3243 assert(inst->dst.index < MAX_TEMPS);
3244 prevWriteMask = tempWrites[inst->dst.index];
3245 tempWrites[inst->dst.index] |= inst->dst.writemask;
3246 } else
3247 continue;
3248
3249 /* For a CMP to be considered a conditional write, the destination
3250 * register and source register two must be the same. */
3251 if (inst->op == TGSI_OPCODE_CMP
3252 && !(inst->dst.writemask & prevWriteMask)
3253 && inst->src[2].file == inst->dst.file
3254 && inst->src[2].index == inst->dst.index
3255 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3256
3257 inst->op = TGSI_OPCODE_MOV;
3258 inst->src[0] = inst->src[1];
3259 }
3260 }
3261
3262 delete [] tempWrites;
3263 }
3264
3265 /* Replaces all references to a temporary register index with another index. */
3266 void
3267 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3268 {
3269 foreach_iter(exec_list_iterator, iter, this->instructions) {
3270 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3271 unsigned j;
3272
3273 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3274 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3275 inst->src[j].index == index) {
3276 inst->src[j].index = new_index;
3277 }
3278 }
3279
3280 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3281 inst->dst.index = new_index;
3282 }
3283 }
3284 }
3285
3286 int
3287 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3288 {
3289 int depth = 0; /* loop depth */
3290 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3291 unsigned i = 0, j;
3292
3293 foreach_iter(exec_list_iterator, iter, this->instructions) {
3294 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3295
3296 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3297 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3298 inst->src[j].index == index) {
3299 return (depth == 0) ? i : loop_start;
3300 }
3301 }
3302
3303 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3304 if(depth++ == 0)
3305 loop_start = i;
3306 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3307 if (--depth == 0)
3308 loop_start = -1;
3309 }
3310 assert(depth >= 0);
3311
3312 i++;
3313 }
3314
3315 return -1;
3316 }
3317
3318 int
3319 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3320 {
3321 int depth = 0; /* loop depth */
3322 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3323 int i = 0;
3324
3325 foreach_iter(exec_list_iterator, iter, this->instructions) {
3326 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3327
3328 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3329 return (depth == 0) ? i : loop_start;
3330 }
3331
3332 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3333 if(depth++ == 0)
3334 loop_start = i;
3335 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3336 if (--depth == 0)
3337 loop_start = -1;
3338 }
3339 assert(depth >= 0);
3340
3341 i++;
3342 }
3343
3344 return -1;
3345 }
3346
3347 int
3348 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3349 {
3350 int depth = 0; /* loop depth */
3351 int last = -1; /* index of last instruction that reads the temporary */
3352 unsigned i = 0, j;
3353
3354 foreach_iter(exec_list_iterator, iter, this->instructions) {
3355 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3356
3357 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3358 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3359 inst->src[j].index == index) {
3360 last = (depth == 0) ? i : -2;
3361 }
3362 }
3363
3364 if (inst->op == TGSI_OPCODE_BGNLOOP)
3365 depth++;
3366 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3367 if (--depth == 0 && last == -2)
3368 last = i;
3369 assert(depth >= 0);
3370
3371 i++;
3372 }
3373
3374 assert(last >= -1);
3375 return last;
3376 }
3377
3378 int
3379 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3380 {
3381 int depth = 0; /* loop depth */
3382 int last = -1; /* index of last instruction that writes to the temporary */
3383 int i = 0;
3384
3385 foreach_iter(exec_list_iterator, iter, this->instructions) {
3386 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3387
3388 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3389 last = (depth == 0) ? i : -2;
3390
3391 if (inst->op == TGSI_OPCODE_BGNLOOP)
3392 depth++;
3393 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3394 if (--depth == 0 && last == -2)
3395 last = i;
3396 assert(depth >= 0);
3397
3398 i++;
3399 }
3400
3401 assert(last >= -1);
3402 return last;
3403 }
3404
3405 /*
3406 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3407 * channels for copy propagation and updates following instructions to
3408 * use the original versions.
3409 *
3410 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3411 * will occur. As an example, a TXP production before this pass:
3412 *
3413 * 0: MOV TEMP[1], INPUT[4].xyyy;
3414 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3415 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3416 *
3417 * and after:
3418 *
3419 * 0: MOV TEMP[1], INPUT[4].xyyy;
3420 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3421 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3422 *
3423 * which allows for dead code elimination on TEMP[1]'s writes.
3424 */
3425 void
3426 glsl_to_tgsi_visitor::copy_propagate(void)
3427 {
3428 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3429 glsl_to_tgsi_instruction *,
3430 this->next_temp * 4);
3431 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3432 int level = 0;
3433
3434 foreach_iter(exec_list_iterator, iter, this->instructions) {
3435 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3436
3437 assert(inst->dst.file != PROGRAM_TEMPORARY
3438 || inst->dst.index < this->next_temp);
3439
3440 /* First, do any copy propagation possible into the src regs. */
3441 for (int r = 0; r < 3; r++) {
3442 glsl_to_tgsi_instruction *first = NULL;
3443 bool good = true;
3444 int acp_base = inst->src[r].index * 4;
3445
3446 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3447 inst->src[r].reladdr ||
3448 inst->src[r].reladdr2)
3449 continue;
3450
3451 /* See if we can find entries in the ACP consisting of MOVs
3452 * from the same src register for all the swizzled channels
3453 * of this src register reference.
3454 */
3455 for (int i = 0; i < 4; i++) {
3456 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3457 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3458
3459 if (!copy_chan) {
3460 good = false;
3461 break;
3462 }
3463
3464 assert(acp_level[acp_base + src_chan] <= level);
3465
3466 if (!first) {
3467 first = copy_chan;
3468 } else {
3469 if (first->src[0].file != copy_chan->src[0].file ||
3470 first->src[0].index != copy_chan->src[0].index) {
3471 good = false;
3472 break;
3473 }
3474 }
3475 }
3476
3477 if (good) {
3478 /* We've now validated that we can copy-propagate to
3479 * replace this src register reference. Do it.
3480 */
3481 inst->src[r].file = first->src[0].file;
3482 inst->src[r].index = first->src[0].index;
3483 inst->src[r].index2D = first->src[0].index2D;
3484 inst->src[r].has_index2 = first->src[0].has_index2;
3485
3486 int swizzle = 0;
3487 for (int i = 0; i < 4; i++) {
3488 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3489 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3490 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3491 (3 * i));
3492 }
3493 inst->src[r].swizzle = swizzle;
3494 }
3495 }
3496
3497 switch (inst->op) {
3498 case TGSI_OPCODE_BGNLOOP:
3499 case TGSI_OPCODE_ENDLOOP:
3500 /* End of a basic block, clear the ACP entirely. */
3501 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3502 break;
3503
3504 case TGSI_OPCODE_IF:
3505 case TGSI_OPCODE_UIF:
3506 ++level;
3507 break;
3508
3509 case TGSI_OPCODE_ENDIF:
3510 case TGSI_OPCODE_ELSE:
3511 /* Clear all channels written inside the block from the ACP, but
3512 * leaving those that were not touched.
3513 */
3514 for (int r = 0; r < this->next_temp; r++) {
3515 for (int c = 0; c < 4; c++) {
3516 if (!acp[4 * r + c])
3517 continue;
3518
3519 if (acp_level[4 * r + c] >= level)
3520 acp[4 * r + c] = NULL;
3521 }
3522 }
3523 if (inst->op == TGSI_OPCODE_ENDIF)
3524 --level;
3525 break;
3526
3527 default:
3528 /* Continuing the block, clear any written channels from
3529 * the ACP.
3530 */
3531 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3532 /* Any temporary might be written, so no copy propagation
3533 * across this instruction.
3534 */
3535 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3536 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3537 inst->dst.reladdr) {
3538 /* Any output might be written, so no copy propagation
3539 * from outputs across this instruction.
3540 */
3541 for (int r = 0; r < this->next_temp; r++) {
3542 for (int c = 0; c < 4; c++) {
3543 if (!acp[4 * r + c])
3544 continue;
3545
3546 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3547 acp[4 * r + c] = NULL;
3548 }
3549 }
3550 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3551 inst->dst.file == PROGRAM_OUTPUT) {
3552 /* Clear where it's used as dst. */
3553 if (inst->dst.file == PROGRAM_TEMPORARY) {
3554 for (int c = 0; c < 4; c++) {
3555 if (inst->dst.writemask & (1 << c)) {
3556 acp[4 * inst->dst.index + c] = NULL;
3557 }
3558 }
3559 }
3560
3561 /* Clear where it's used as src. */
3562 for (int r = 0; r < this->next_temp; r++) {
3563 for (int c = 0; c < 4; c++) {
3564 if (!acp[4 * r + c])
3565 continue;
3566
3567 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3568
3569 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3570 acp[4 * r + c]->src[0].index == inst->dst.index &&
3571 inst->dst.writemask & (1 << src_chan))
3572 {
3573 acp[4 * r + c] = NULL;
3574 }
3575 }
3576 }
3577 }
3578 break;
3579 }
3580
3581 /* If this is a copy, add it to the ACP. */
3582 if (inst->op == TGSI_OPCODE_MOV &&
3583 inst->dst.file == PROGRAM_TEMPORARY &&
3584 !(inst->dst.file == inst->src[0].file &&
3585 inst->dst.index == inst->src[0].index) &&
3586 !inst->dst.reladdr &&
3587 !inst->saturate &&
3588 !inst->src[0].reladdr &&
3589 !inst->src[0].reladdr2 &&
3590 !inst->src[0].negate) {
3591 for (int i = 0; i < 4; i++) {
3592 if (inst->dst.writemask & (1 << i)) {
3593 acp[4 * inst->dst.index + i] = inst;
3594 acp_level[4 * inst->dst.index + i] = level;
3595 }
3596 }
3597 }
3598 }
3599
3600 ralloc_free(acp_level);
3601 ralloc_free(acp);
3602 }
3603
3604 /*
3605 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3606 *
3607 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3608 * will occur. As an example, a TXP production after copy propagation but
3609 * before this pass:
3610 *
3611 * 0: MOV TEMP[1], INPUT[4].xyyy;
3612 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3613 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3614 *
3615 * and after this pass:
3616 *
3617 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3618 *
3619 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3620 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3621 */
3622 void
3623 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3624 {
3625 int i;
3626
3627 for (i=0; i < this->next_temp; i++) {
3628 int last_read = get_last_temp_read(i);
3629 int j = 0;
3630
3631 foreach_iter(exec_list_iterator, iter, this->instructions) {
3632 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3633
3634 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3635 j > last_read)
3636 {
3637 iter.remove();
3638 delete inst;
3639 }
3640
3641 j++;
3642 }
3643 }
3644 }
3645
3646 /*
3647 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3648 * code elimination. This is less primitive than eliminate_dead_code(), as it
3649 * is per-channel and can detect consecutive writes without a read between them
3650 * as dead code. However, there is some dead code that can be eliminated by
3651 * eliminate_dead_code() but not this function - for example, this function
3652 * cannot eliminate an instruction writing to a register that is never read and
3653 * is the only instruction writing to that register.
3654 *
3655 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3656 * will occur.
3657 */
3658 int
3659 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3660 {
3661 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3662 glsl_to_tgsi_instruction *,
3663 this->next_temp * 4);
3664 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3665 int level = 0;
3666 int removed = 0;
3667
3668 foreach_iter(exec_list_iterator, iter, this->instructions) {
3669 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3670
3671 assert(inst->dst.file != PROGRAM_TEMPORARY
3672 || inst->dst.index < this->next_temp);
3673
3674 switch (inst->op) {
3675 case TGSI_OPCODE_BGNLOOP:
3676 case TGSI_OPCODE_ENDLOOP:
3677 case TGSI_OPCODE_CONT:
3678 case TGSI_OPCODE_BRK:
3679 /* End of a basic block, clear the write array entirely.
3680 *
3681 * This keeps us from killing dead code when the writes are
3682 * on either side of a loop, even when the register isn't touched
3683 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3684 * dead code of this type, so it shouldn't make a difference as long as
3685 * the dead code elimination pass in the GLSL compiler does its job.
3686 */
3687 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3688 break;
3689
3690 case TGSI_OPCODE_ENDIF:
3691 case TGSI_OPCODE_ELSE:
3692 /* Promote the recorded level of all channels written inside the
3693 * preceding if or else block to the level above the if/else block.
3694 */
3695 for (int r = 0; r < this->next_temp; r++) {
3696 for (int c = 0; c < 4; c++) {
3697 if (!writes[4 * r + c])
3698 continue;
3699
3700 if (write_level[4 * r + c] == level)
3701 write_level[4 * r + c] = level-1;
3702 }
3703 }
3704
3705 if(inst->op == TGSI_OPCODE_ENDIF)
3706 --level;
3707
3708 break;
3709
3710 case TGSI_OPCODE_IF:
3711 case TGSI_OPCODE_UIF:
3712 ++level;
3713 /* fallthrough to default case to mark the condition as read */
3714
3715 default:
3716 /* Continuing the block, clear any channels from the write array that
3717 * are read by this instruction.
3718 */
3719 for (unsigned i = 0; i < Elements(inst->src); i++) {
3720 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3721 /* Any temporary might be read, so no dead code elimination
3722 * across this instruction.
3723 */
3724 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3725 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3726 /* Clear where it's used as src. */
3727 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3728 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3729 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3730 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3731
3732 for (int c = 0; c < 4; c++) {
3733 if (src_chans & (1 << c)) {
3734 writes[4 * inst->src[i].index + c] = NULL;
3735 }
3736 }
3737 }
3738 }
3739 break;
3740 }
3741
3742 /* If this instruction writes to a temporary, add it to the write array.
3743 * If there is already an instruction in the write array for one or more
3744 * of the channels, flag that channel write as dead.
3745 */
3746 if (inst->dst.file == PROGRAM_TEMPORARY &&
3747 !inst->dst.reladdr &&
3748 !inst->saturate) {
3749 for (int c = 0; c < 4; c++) {
3750 if (inst->dst.writemask & (1 << c)) {
3751 if (writes[4 * inst->dst.index + c]) {
3752 if (write_level[4 * inst->dst.index + c] < level)
3753 continue;
3754 else
3755 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3756 }
3757 writes[4 * inst->dst.index + c] = inst;
3758 write_level[4 * inst->dst.index + c] = level;
3759 }
3760 }
3761 }
3762 }
3763
3764 /* Anything still in the write array at this point is dead code. */
3765 for (int r = 0; r < this->next_temp; r++) {
3766 for (int c = 0; c < 4; c++) {
3767 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3768 if (inst)
3769 inst->dead_mask |= (1 << c);
3770 }
3771 }
3772
3773 /* Now actually remove the instructions that are completely dead and update
3774 * the writemask of other instructions with dead channels.
3775 */
3776 foreach_iter(exec_list_iterator, iter, this->instructions) {
3777 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3778
3779 if (!inst->dead_mask || !inst->dst.writemask)
3780 continue;
3781 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3782 iter.remove();
3783 delete inst;
3784 removed++;
3785 } else
3786 inst->dst.writemask &= ~(inst->dead_mask);
3787 }
3788
3789 ralloc_free(write_level);
3790 ralloc_free(writes);
3791
3792 return removed;
3793 }
3794
3795 /* Merges temporary registers together where possible to reduce the number of
3796 * registers needed to run a program.
3797 *
3798 * Produces optimal code only after copy propagation and dead code elimination
3799 * have been run. */
3800 void
3801 glsl_to_tgsi_visitor::merge_registers(void)
3802 {
3803 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3804 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3805 int i, j;
3806
3807 /* Read the indices of the last read and first write to each temp register
3808 * into an array so that we don't have to traverse the instruction list as
3809 * much. */
3810 for (i=0; i < this->next_temp; i++) {
3811 last_reads[i] = get_last_temp_read(i);
3812 first_writes[i] = get_first_temp_write(i);
3813 }
3814
3815 /* Start looking for registers with non-overlapping usages that can be
3816 * merged together. */
3817 for (i=0; i < this->next_temp; i++) {
3818 /* Don't touch unused registers. */
3819 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3820
3821 for (j=0; j < this->next_temp; j++) {
3822 /* Don't touch unused registers. */
3823 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3824
3825 /* We can merge the two registers if the first write to j is after or
3826 * in the same instruction as the last read from i. Note that the
3827 * register at index i will always be used earlier or at the same time
3828 * as the register at index j. */
3829 if (first_writes[i] <= first_writes[j] &&
3830 last_reads[i] <= first_writes[j])
3831 {
3832 rename_temp_register(j, i); /* Replace all references to j with i.*/
3833
3834 /* Update the first_writes and last_reads arrays with the new
3835 * values for the merged register index, and mark the newly unused
3836 * register index as such. */
3837 last_reads[i] = last_reads[j];
3838 first_writes[j] = -1;
3839 last_reads[j] = -1;
3840 }
3841 }
3842 }
3843
3844 ralloc_free(last_reads);
3845 ralloc_free(first_writes);
3846 }
3847
3848 /* Reassign indices to temporary registers by reusing unused indices created
3849 * by optimization passes. */
3850 void
3851 glsl_to_tgsi_visitor::renumber_registers(void)
3852 {
3853 int i = 0;
3854 int new_index = 0;
3855
3856 for (i=0; i < this->next_temp; i++) {
3857 if (get_first_temp_read(i) < 0) continue;
3858 if (i != new_index)
3859 rename_temp_register(i, new_index);
3860 new_index++;
3861 }
3862
3863 this->next_temp = new_index;
3864 }
3865
3866 /**
3867 * Returns a fragment program which implements the current pixel transfer ops.
3868 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3869 */
3870 extern "C" void
3871 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3872 glsl_to_tgsi_visitor *original,
3873 int scale_and_bias, int pixel_maps)
3874 {
3875 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3876 struct st_context *st = st_context(original->ctx);
3877 struct gl_program *prog = &fp->Base.Base;
3878 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3879 st_src_reg coord, src0;
3880 st_dst_reg dst0;
3881 glsl_to_tgsi_instruction *inst;
3882
3883 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3884 v->ctx = original->ctx;
3885 v->prog = prog;
3886 v->shader_program = NULL;
3887 v->glsl_version = original->glsl_version;
3888 v->native_integers = original->native_integers;
3889 v->options = original->options;
3890 v->next_temp = original->next_temp;
3891 v->num_address_regs = original->num_address_regs;
3892 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3893 v->indirect_addr_consts = original->indirect_addr_consts;
3894 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3895 v->num_immediates = original->num_immediates;
3896
3897 /*
3898 * Get initial pixel color from the texture.
3899 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3900 */
3901 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3902 src0 = v->get_temp(glsl_type::vec4_type);
3903 dst0 = st_dst_reg(src0);
3904 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3905 inst->sampler = 0;
3906 inst->tex_target = TEXTURE_2D_INDEX;
3907
3908 prog->InputsRead |= VARYING_BIT_TEX0;
3909 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3910 v->samplers_used |= (1 << 0);
3911
3912 if (scale_and_bias) {
3913 static const gl_state_index scale_state[STATE_LENGTH] =
3914 { STATE_INTERNAL, STATE_PT_SCALE,
3915 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3916 static const gl_state_index bias_state[STATE_LENGTH] =
3917 { STATE_INTERNAL, STATE_PT_BIAS,
3918 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3919 GLint scale_p, bias_p;
3920 st_src_reg scale, bias;
3921
3922 scale_p = _mesa_add_state_reference(params, scale_state);
3923 bias_p = _mesa_add_state_reference(params, bias_state);
3924
3925 /* MAD colorTemp, colorTemp, scale, bias; */
3926 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3927 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3928 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3929 }
3930
3931 if (pixel_maps) {
3932 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3933 st_dst_reg temp_dst = st_dst_reg(temp);
3934
3935 assert(st->pixel_xfer.pixelmap_texture);
3936
3937 /* With a little effort, we can do four pixel map look-ups with
3938 * two TEX instructions:
3939 */
3940
3941 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3942 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3943 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3944 inst->sampler = 1;
3945 inst->tex_target = TEXTURE_2D_INDEX;
3946
3947 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3948 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3949 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3950 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3951 inst->sampler = 1;
3952 inst->tex_target = TEXTURE_2D_INDEX;
3953
3954 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3955 v->samplers_used |= (1 << 1);
3956
3957 /* MOV colorTemp, temp; */
3958 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3959 }
3960
3961 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3962 * new visitor. */
3963 foreach_iter(exec_list_iterator, iter, original->instructions) {
3964 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3965 glsl_to_tgsi_instruction *newinst;
3966 st_src_reg src_regs[3];
3967
3968 if (inst->dst.file == PROGRAM_OUTPUT)
3969 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3970
3971 for (int i=0; i<3; i++) {
3972 src_regs[i] = inst->src[i];
3973 if (src_regs[i].file == PROGRAM_INPUT &&
3974 src_regs[i].index == VARYING_SLOT_COL0)
3975 {
3976 src_regs[i].file = PROGRAM_TEMPORARY;
3977 src_regs[i].index = src0.index;
3978 }
3979 else if (src_regs[i].file == PROGRAM_INPUT)
3980 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3981 }
3982
3983 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3984 newinst->tex_target = inst->tex_target;
3985 }
3986
3987 /* Make modifications to fragment program info. */
3988 prog->Parameters = _mesa_combine_parameter_lists(params,
3989 original->prog->Parameters);
3990 _mesa_free_parameter_list(params);
3991 count_resources(v, prog);
3992 fp->glsl_to_tgsi = v;
3993 }
3994
3995 /**
3996 * Make fragment program for glBitmap:
3997 * Sample the texture and kill the fragment if the bit is 0.
3998 * This program will be combined with the user's fragment program.
3999 *
4000 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
4001 */
4002 extern "C" void
4003 get_bitmap_visitor(struct st_fragment_program *fp,
4004 glsl_to_tgsi_visitor *original, int samplerIndex)
4005 {
4006 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
4007 struct st_context *st = st_context(original->ctx);
4008 struct gl_program *prog = &fp->Base.Base;
4009 st_src_reg coord, src0;
4010 st_dst_reg dst0;
4011 glsl_to_tgsi_instruction *inst;
4012
4013 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4014 v->ctx = original->ctx;
4015 v->prog = prog;
4016 v->shader_program = NULL;
4017 v->glsl_version = original->glsl_version;
4018 v->native_integers = original->native_integers;
4019 v->options = original->options;
4020 v->next_temp = original->next_temp;
4021 v->num_address_regs = original->num_address_regs;
4022 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4023 v->indirect_addr_consts = original->indirect_addr_consts;
4024 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4025 v->num_immediates = original->num_immediates;
4026
4027 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4028 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4029 src0 = v->get_temp(glsl_type::vec4_type);
4030 dst0 = st_dst_reg(src0);
4031 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4032 inst->sampler = samplerIndex;
4033 inst->tex_target = TEXTURE_2D_INDEX;
4034
4035 prog->InputsRead |= VARYING_BIT_TEX0;
4036 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4037 v->samplers_used |= (1 << samplerIndex);
4038
4039 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4040 src0.negate = NEGATE_XYZW;
4041 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4042 src0.swizzle = SWIZZLE_XXXX;
4043 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4044
4045 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4046 * new visitor. */
4047 foreach_iter(exec_list_iterator, iter, original->instructions) {
4048 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
4049 glsl_to_tgsi_instruction *newinst;
4050 st_src_reg src_regs[3];
4051
4052 if (inst->dst.file == PROGRAM_OUTPUT)
4053 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4054
4055 for (int i=0; i<3; i++) {
4056 src_regs[i] = inst->src[i];
4057 if (src_regs[i].file == PROGRAM_INPUT)
4058 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4059 }
4060
4061 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4062 newinst->tex_target = inst->tex_target;
4063 }
4064
4065 /* Make modifications to fragment program info. */
4066 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4067 count_resources(v, prog);
4068 fp->glsl_to_tgsi = v;
4069 }
4070
4071 /* ------------------------- TGSI conversion stuff -------------------------- */
4072 struct label {
4073 unsigned branch_target;
4074 unsigned token;
4075 };
4076
4077 /**
4078 * Intermediate state used during shader translation.
4079 */
4080 struct st_translate {
4081 struct ureg_program *ureg;
4082
4083 struct ureg_dst temps[MAX_TEMPS];
4084 struct ureg_dst arrays[MAX_ARRAYS];
4085 struct ureg_src *constants;
4086 struct ureg_src *immediates;
4087 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4088 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4089 struct ureg_dst address[2];
4090 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4091 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4092
4093 unsigned array_sizes[MAX_ARRAYS];
4094
4095 const GLuint *inputMapping;
4096 const GLuint *outputMapping;
4097
4098 /* For every instruction that contains a label (eg CALL), keep
4099 * details so that we can go back afterwards and emit the correct
4100 * tgsi instruction number for each label.
4101 */
4102 struct label *labels;
4103 unsigned labels_size;
4104 unsigned labels_count;
4105
4106 /* Keep a record of the tgsi instruction number that each mesa
4107 * instruction starts at, will be used to fix up labels after
4108 * translation.
4109 */
4110 unsigned *insn;
4111 unsigned insn_size;
4112 unsigned insn_count;
4113
4114 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4115
4116 boolean error;
4117 };
4118
4119 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4120 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4121 TGSI_SEMANTIC_FACE,
4122 TGSI_SEMANTIC_VERTEXID,
4123 TGSI_SEMANTIC_INSTANCEID
4124 };
4125
4126 /**
4127 * Make note of a branch to a label in the TGSI code.
4128 * After we've emitted all instructions, we'll go over the list
4129 * of labels built here and patch the TGSI code with the actual
4130 * location of each label.
4131 */
4132 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4133 {
4134 unsigned i;
4135
4136 if (t->labels_count + 1 >= t->labels_size) {
4137 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4138 t->labels = (struct label *)realloc(t->labels,
4139 t->labels_size * sizeof(struct label));
4140 if (t->labels == NULL) {
4141 static unsigned dummy;
4142 t->error = TRUE;
4143 return &dummy;
4144 }
4145 }
4146
4147 i = t->labels_count++;
4148 t->labels[i].branch_target = branch_target;
4149 return &t->labels[i].token;
4150 }
4151
4152 /**
4153 * Called prior to emitting the TGSI code for each instruction.
4154 * Allocate additional space for instructions if needed.
4155 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4156 * the next TGSI instruction.
4157 */
4158 static void set_insn_start(struct st_translate *t, unsigned start)
4159 {
4160 if (t->insn_count + 1 >= t->insn_size) {
4161 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4162 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4163 if (t->insn == NULL) {
4164 t->error = TRUE;
4165 return;
4166 }
4167 }
4168
4169 t->insn[t->insn_count++] = start;
4170 }
4171
4172 /**
4173 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4174 */
4175 static struct ureg_src
4176 emit_immediate(struct st_translate *t,
4177 gl_constant_value values[4],
4178 int type, int size)
4179 {
4180 struct ureg_program *ureg = t->ureg;
4181
4182 switch(type)
4183 {
4184 case GL_FLOAT:
4185 return ureg_DECL_immediate(ureg, &values[0].f, size);
4186 case GL_INT:
4187 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4188 case GL_UNSIGNED_INT:
4189 case GL_BOOL:
4190 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4191 default:
4192 assert(!"should not get here - type must be float, int, uint, or bool");
4193 return ureg_src_undef();
4194 }
4195 }
4196
4197 /**
4198 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4199 */
4200 static struct ureg_dst
4201 dst_register(struct st_translate *t,
4202 gl_register_file file,
4203 GLuint index)
4204 {
4205 unsigned array;
4206
4207 switch(file) {
4208 case PROGRAM_UNDEFINED:
4209 return ureg_dst_undef();
4210
4211 case PROGRAM_TEMPORARY:
4212 assert(index >= 0);
4213 assert(index < (int) Elements(t->temps));
4214
4215 if (ureg_dst_is_undef(t->temps[index]))
4216 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4217
4218 return t->temps[index];
4219
4220 case PROGRAM_ARRAY:
4221 array = index >> 16;
4222
4223 assert(array >= 0);
4224 assert(array < (int) Elements(t->arrays));
4225
4226 if (ureg_dst_is_undef(t->arrays[array]))
4227 t->arrays[array] = ureg_DECL_array_temporary(
4228 t->ureg, t->array_sizes[array], TRUE);
4229
4230 return ureg_dst_array_offset(t->arrays[array],
4231 (int)(index & 0xFFFF) - 0x8000);
4232
4233 case PROGRAM_OUTPUT:
4234 if (t->procType == TGSI_PROCESSOR_VERTEX)
4235 assert(index < VARYING_SLOT_MAX);
4236 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4237 assert(index < FRAG_RESULT_MAX);
4238 else
4239 assert(index < VARYING_SLOT_MAX);
4240
4241 assert(t->outputMapping[index] < Elements(t->outputs));
4242
4243 return t->outputs[t->outputMapping[index]];
4244
4245 case PROGRAM_ADDRESS:
4246 return t->address[index];
4247
4248 default:
4249 assert(!"unknown dst register file");
4250 return ureg_dst_undef();
4251 }
4252 }
4253
4254 /**
4255 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4256 */
4257 static struct ureg_src
4258 src_register(struct st_translate *t,
4259 gl_register_file file,
4260 GLint index, GLint index2D)
4261 {
4262 switch(file) {
4263 case PROGRAM_UNDEFINED:
4264 return ureg_src_undef();
4265
4266 case PROGRAM_TEMPORARY:
4267 case PROGRAM_ARRAY:
4268 return ureg_src(dst_register(t, file, index));
4269
4270 case PROGRAM_UNIFORM:
4271 assert(index >= 0);
4272 return t->constants[index];
4273 case PROGRAM_STATE_VAR:
4274 case PROGRAM_CONSTANT: /* ie, immediate */
4275 if (index2D) {
4276 struct ureg_src src;
4277 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4278 src.Dimension = 1;
4279 src.DimensionIndex = index2D;
4280 return src;
4281 } else if (index < 0)
4282 return ureg_DECL_constant(t->ureg, 0);
4283 else
4284 return t->constants[index];
4285
4286 case PROGRAM_IMMEDIATE:
4287 return t->immediates[index];
4288
4289 case PROGRAM_INPUT:
4290 assert(t->inputMapping[index] < Elements(t->inputs));
4291 return t->inputs[t->inputMapping[index]];
4292
4293 case PROGRAM_OUTPUT:
4294 assert(t->outputMapping[index] < Elements(t->outputs));
4295 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4296
4297 case PROGRAM_ADDRESS:
4298 return ureg_src(t->address[index]);
4299
4300 case PROGRAM_SYSTEM_VALUE:
4301 assert(index < (int) Elements(t->systemValues));
4302 return t->systemValues[index];
4303
4304 default:
4305 assert(!"unknown src register file");
4306 return ureg_src_undef();
4307 }
4308 }
4309
4310 /**
4311 * Create a TGSI ureg_dst register from an st_dst_reg.
4312 */
4313 static struct ureg_dst
4314 translate_dst(struct st_translate *t,
4315 const st_dst_reg *dst_reg,
4316 bool saturate, bool clamp_color)
4317 {
4318 struct ureg_dst dst = dst_register(t,
4319 dst_reg->file,
4320 dst_reg->index);
4321
4322 dst = ureg_writemask(dst, dst_reg->writemask);
4323
4324 if (saturate)
4325 dst = ureg_saturate(dst);
4326 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4327 /* Clamp colors for ARB_color_buffer_float. */
4328 switch (t->procType) {
4329 case TGSI_PROCESSOR_VERTEX:
4330 /* XXX if the geometry shader is present, this must be done there
4331 * instead of here. */
4332 if (dst_reg->index == VARYING_SLOT_COL0 ||
4333 dst_reg->index == VARYING_SLOT_COL1 ||
4334 dst_reg->index == VARYING_SLOT_BFC0 ||
4335 dst_reg->index == VARYING_SLOT_BFC1) {
4336 dst = ureg_saturate(dst);
4337 }
4338 break;
4339
4340 case TGSI_PROCESSOR_FRAGMENT:
4341 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4342 dst = ureg_saturate(dst);
4343 }
4344 break;
4345 }
4346 }
4347
4348 if (dst_reg->reladdr != NULL) {
4349 assert(dst_reg->file != PROGRAM_TEMPORARY);
4350 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4351 }
4352
4353 return dst;
4354 }
4355
4356 /**
4357 * Create a TGSI ureg_src register from an st_src_reg.
4358 */
4359 static struct ureg_src
4360 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4361 {
4362 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4363
4364 if (t->procType == TGSI_PROCESSOR_GEOMETRY && src_reg->has_index2) {
4365 src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4366 if (src_reg->reladdr2)
4367 src = ureg_src_dimension_indirect(src, ureg_src(t->address[1]),
4368 src_reg->index2D);
4369 else
4370 src = ureg_src_dimension(src, src_reg->index2D);
4371 }
4372
4373 src = ureg_swizzle(src,
4374 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4375 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4376 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4377 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4378
4379 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4380 src = ureg_negate(src);
4381
4382 if (src_reg->reladdr != NULL) {
4383 assert(src_reg->file != PROGRAM_TEMPORARY);
4384 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4385 }
4386
4387 return src;
4388 }
4389
4390 static struct tgsi_texture_offset
4391 translate_tex_offset(struct st_translate *t,
4392 const struct tgsi_texture_offset *in_offset)
4393 {
4394 struct tgsi_texture_offset offset;
4395 struct ureg_src imm_src;
4396
4397 assert(in_offset->File == PROGRAM_IMMEDIATE);
4398 imm_src = t->immediates[in_offset->Index];
4399
4400 offset.File = imm_src.File;
4401 offset.Index = imm_src.Index;
4402 offset.SwizzleX = imm_src.SwizzleX;
4403 offset.SwizzleY = imm_src.SwizzleY;
4404 offset.SwizzleZ = imm_src.SwizzleZ;
4405 offset.File = TGSI_FILE_IMMEDIATE;
4406 offset.Padding = 0;
4407
4408 return offset;
4409 }
4410
4411 static void
4412 compile_tgsi_instruction(struct st_translate *t,
4413 const glsl_to_tgsi_instruction *inst,
4414 bool clamp_dst_color_output)
4415 {
4416 struct ureg_program *ureg = t->ureg;
4417 GLuint i;
4418 struct ureg_dst dst[1];
4419 struct ureg_src src[4];
4420 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4421
4422 unsigned num_dst;
4423 unsigned num_src;
4424 unsigned tex_target;
4425
4426 num_dst = num_inst_dst_regs(inst->op);
4427 num_src = num_inst_src_regs(inst->op);
4428
4429 if (num_dst)
4430 dst[0] = translate_dst(t,
4431 &inst->dst,
4432 inst->saturate,
4433 clamp_dst_color_output);
4434
4435 for (i = 0; i < num_src; i++)
4436 src[i] = translate_src(t, &inst->src[i]);
4437
4438 switch(inst->op) {
4439 case TGSI_OPCODE_BGNLOOP:
4440 case TGSI_OPCODE_CAL:
4441 case TGSI_OPCODE_ELSE:
4442 case TGSI_OPCODE_ENDLOOP:
4443 case TGSI_OPCODE_IF:
4444 case TGSI_OPCODE_UIF:
4445 assert(num_dst == 0);
4446 ureg_label_insn(ureg,
4447 inst->op,
4448 src, num_src,
4449 get_label(t,
4450 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4451 return;
4452
4453 case TGSI_OPCODE_TEX:
4454 case TGSI_OPCODE_TXB:
4455 case TGSI_OPCODE_TXD:
4456 case TGSI_OPCODE_TXL:
4457 case TGSI_OPCODE_TXP:
4458 case TGSI_OPCODE_TXQ:
4459 case TGSI_OPCODE_TXF:
4460 case TGSI_OPCODE_TEX2:
4461 case TGSI_OPCODE_TXB2:
4462 case TGSI_OPCODE_TXL2:
4463 src[num_src++] = t->samplers[inst->sampler];
4464 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4465 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4466 }
4467 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4468
4469 ureg_tex_insn(ureg,
4470 inst->op,
4471 dst, num_dst,
4472 tex_target,
4473 texoffsets, inst->tex_offset_num_offset,
4474 src, num_src);
4475 return;
4476
4477 case TGSI_OPCODE_SCS:
4478 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4479 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4480 break;
4481
4482 default:
4483 ureg_insn(ureg,
4484 inst->op,
4485 dst, num_dst,
4486 src, num_src);
4487 break;
4488 }
4489 }
4490
4491 /**
4492 * Emit the TGSI instructions for inverting and adjusting WPOS.
4493 * This code is unavoidable because it also depends on whether
4494 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4495 */
4496 static void
4497 emit_wpos_adjustment( struct st_translate *t,
4498 const struct gl_program *program,
4499 boolean invert,
4500 GLfloat adjX, GLfloat adjY[2])
4501 {
4502 struct ureg_program *ureg = t->ureg;
4503
4504 /* Fragment program uses fragment position input.
4505 * Need to replace instances of INPUT[WPOS] with temp T
4506 * where T = INPUT[WPOS] by y is inverted.
4507 */
4508 static const gl_state_index wposTransformState[STATE_LENGTH]
4509 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4510 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4511
4512 /* XXX: note we are modifying the incoming shader here! Need to
4513 * do this before emitting the constant decls below, or this
4514 * will be missed:
4515 */
4516 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4517 wposTransformState);
4518
4519 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4520 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4521 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4522
4523 /* First, apply the coordinate shift: */
4524 if (adjX || adjY[0] || adjY[1]) {
4525 if (adjY[0] != adjY[1]) {
4526 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4527 * depending on whether inversion is actually going to be applied
4528 * or not, which is determined by testing against the inversion
4529 * state variable used below, which will be either +1 or -1.
4530 */
4531 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4532
4533 ureg_CMP(ureg, adj_temp,
4534 ureg_scalar(wpostrans, invert ? 2 : 0),
4535 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4536 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4537 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4538 } else {
4539 ureg_ADD(ureg, wpos_temp, wpos_input,
4540 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4541 }
4542 wpos_input = ureg_src(wpos_temp);
4543 } else {
4544 /* MOV wpos_temp, input[wpos]
4545 */
4546 ureg_MOV( ureg, wpos_temp, wpos_input );
4547 }
4548
4549 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4550 * inversion/identity, or the other way around if we're drawing to an FBO.
4551 */
4552 if (invert) {
4553 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4554 */
4555 ureg_MAD( ureg,
4556 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4557 wpos_input,
4558 ureg_scalar(wpostrans, 0),
4559 ureg_scalar(wpostrans, 1));
4560 } else {
4561 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4562 */
4563 ureg_MAD( ureg,
4564 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4565 wpos_input,
4566 ureg_scalar(wpostrans, 2),
4567 ureg_scalar(wpostrans, 3));
4568 }
4569
4570 /* Use wpos_temp as position input from here on:
4571 */
4572 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4573 }
4574
4575
4576 /**
4577 * Emit fragment position/ooordinate code.
4578 */
4579 static void
4580 emit_wpos(struct st_context *st,
4581 struct st_translate *t,
4582 const struct gl_program *program,
4583 struct ureg_program *ureg)
4584 {
4585 const struct gl_fragment_program *fp =
4586 (const struct gl_fragment_program *) program;
4587 struct pipe_screen *pscreen = st->pipe->screen;
4588 GLfloat adjX = 0.0f;
4589 GLfloat adjY[2] = { 0.0f, 0.0f };
4590 boolean invert = FALSE;
4591
4592 /* Query the pixel center conventions supported by the pipe driver and set
4593 * adjX, adjY to help out if it cannot handle the requested one internally.
4594 *
4595 * The bias of the y-coordinate depends on whether y-inversion takes place
4596 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4597 * drawing to an FBO (causes additional inversion), and whether the the pipe
4598 * driver origin and the requested origin differ (the latter condition is
4599 * stored in the 'invert' variable).
4600 *
4601 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4602 *
4603 * center shift only:
4604 * i -> h: +0.5
4605 * h -> i: -0.5
4606 *
4607 * inversion only:
4608 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4609 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4610 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4611 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4612 *
4613 * inversion and center shift:
4614 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4615 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4616 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4617 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4618 */
4619 if (fp->OriginUpperLeft) {
4620 /* Fragment shader wants origin in upper-left */
4621 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4622 /* the driver supports upper-left origin */
4623 }
4624 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4625 /* the driver supports lower-left origin, need to invert Y */
4626 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4627 invert = TRUE;
4628 }
4629 else
4630 assert(0);
4631 }
4632 else {
4633 /* Fragment shader wants origin in lower-left */
4634 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4635 /* the driver supports lower-left origin */
4636 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4637 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4638 /* the driver supports upper-left origin, need to invert Y */
4639 invert = TRUE;
4640 else
4641 assert(0);
4642 }
4643
4644 if (fp->PixelCenterInteger) {
4645 /* Fragment shader wants pixel center integer */
4646 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4647 /* the driver supports pixel center integer */
4648 adjY[1] = 1.0f;
4649 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4650 }
4651 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4652 /* the driver supports pixel center half integer, need to bias X,Y */
4653 adjX = -0.5f;
4654 adjY[0] = -0.5f;
4655 adjY[1] = 0.5f;
4656 }
4657 else
4658 assert(0);
4659 }
4660 else {
4661 /* Fragment shader wants pixel center half integer */
4662 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4663 /* the driver supports pixel center half integer */
4664 }
4665 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4666 /* the driver supports pixel center integer, need to bias X,Y */
4667 adjX = adjY[0] = adjY[1] = 0.5f;
4668 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4669 }
4670 else
4671 assert(0);
4672 }
4673
4674 /* we invert after adjustment so that we avoid the MOV to temporary,
4675 * and reuse the adjustment ADD instead */
4676 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4677 }
4678
4679 /**
4680 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4681 * TGSI uses +1 for front, -1 for back.
4682 * This function converts the TGSI value to the GL value. Simply clamping/
4683 * saturating the value to [0,1] does the job.
4684 */
4685 static void
4686 emit_face_var(struct st_translate *t)
4687 {
4688 struct ureg_program *ureg = t->ureg;
4689 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4690 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4691
4692 /* MOV_SAT face_temp, input[face] */
4693 face_temp = ureg_saturate(face_temp);
4694 ureg_MOV(ureg, face_temp, face_input);
4695
4696 /* Use face_temp as face input from here on: */
4697 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4698 }
4699
4700 static void
4701 emit_edgeflags(struct st_translate *t)
4702 {
4703 struct ureg_program *ureg = t->ureg;
4704 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4705 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4706
4707 ureg_MOV(ureg, edge_dst, edge_src);
4708 }
4709
4710 /**
4711 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4712 * \param program the program to translate
4713 * \param numInputs number of input registers used
4714 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4715 * input indexes
4716 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4717 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4718 * each input
4719 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4720 * \param numOutputs number of output registers used
4721 * \param outputMapping maps Mesa fragment program outputs to TGSI
4722 * generic outputs
4723 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4724 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4725 * each output
4726 *
4727 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4728 */
4729 extern "C" enum pipe_error
4730 st_translate_program(
4731 struct gl_context *ctx,
4732 uint procType,
4733 struct ureg_program *ureg,
4734 glsl_to_tgsi_visitor *program,
4735 const struct gl_program *proginfo,
4736 GLuint numInputs,
4737 const GLuint inputMapping[],
4738 const ubyte inputSemanticName[],
4739 const ubyte inputSemanticIndex[],
4740 const GLuint interpMode[],
4741 const GLboolean is_centroid[],
4742 GLuint numOutputs,
4743 const GLuint outputMapping[],
4744 const ubyte outputSemanticName[],
4745 const ubyte outputSemanticIndex[],
4746 boolean passthrough_edgeflags,
4747 boolean clamp_color)
4748 {
4749 struct st_translate *t;
4750 unsigned i;
4751 enum pipe_error ret = PIPE_OK;
4752
4753 assert(numInputs <= Elements(t->inputs));
4754 assert(numOutputs <= Elements(t->outputs));
4755
4756 t = CALLOC_STRUCT(st_translate);
4757 if (!t) {
4758 ret = PIPE_ERROR_OUT_OF_MEMORY;
4759 goto out;
4760 }
4761
4762 memset(t, 0, sizeof *t);
4763
4764 t->procType = procType;
4765 t->inputMapping = inputMapping;
4766 t->outputMapping = outputMapping;
4767 t->ureg = ureg;
4768
4769 if (program->shader_program) {
4770 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4771 struct gl_uniform_storage *const storage =
4772 &program->shader_program->UniformStorage[i];
4773
4774 _mesa_uniform_detach_all_driver_storage(storage);
4775 }
4776 }
4777
4778 /*
4779 * Declare input attributes.
4780 */
4781 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4782 for (i = 0; i < numInputs; i++) {
4783 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4784 inputSemanticName[i],
4785 inputSemanticIndex[i],
4786 interpMode[i], 0,
4787 is_centroid[i]);
4788 }
4789
4790 if (proginfo->InputsRead & VARYING_BIT_POS) {
4791 /* Must do this after setting up t->inputs, and before
4792 * emitting constant references, below:
4793 */
4794 emit_wpos(st_context(ctx), t, proginfo, ureg);
4795 }
4796
4797 if (proginfo->InputsRead & VARYING_BIT_FACE)
4798 emit_face_var(t);
4799
4800 /*
4801 * Declare output attributes.
4802 */
4803 for (i = 0; i < numOutputs; i++) {
4804 switch (outputSemanticName[i]) {
4805 case TGSI_SEMANTIC_POSITION:
4806 t->outputs[i] = ureg_DECL_output(ureg,
4807 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4808 outputSemanticIndex[i]);
4809 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4810 break;
4811 case TGSI_SEMANTIC_STENCIL:
4812 t->outputs[i] = ureg_DECL_output(ureg,
4813 TGSI_SEMANTIC_STENCIL, /* Stencil */
4814 outputSemanticIndex[i]);
4815 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4816 break;
4817 case TGSI_SEMANTIC_COLOR:
4818 t->outputs[i] = ureg_DECL_output(ureg,
4819 TGSI_SEMANTIC_COLOR,
4820 outputSemanticIndex[i]);
4821 break;
4822 default:
4823 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4824 ret = PIPE_ERROR_BAD_INPUT;
4825 goto out;
4826 }
4827 }
4828 }
4829 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4830 for (i = 0; i < numInputs; i++) {
4831 t->inputs[i] = ureg_DECL_gs_input(ureg,
4832 i,
4833 inputSemanticName[i],
4834 inputSemanticIndex[i]);
4835 }
4836
4837 for (i = 0; i < numOutputs; i++) {
4838 t->outputs[i] = ureg_DECL_output(ureg,
4839 outputSemanticName[i],
4840 outputSemanticIndex[i]);
4841 }
4842 }
4843 else {
4844 assert(procType == TGSI_PROCESSOR_VERTEX);
4845
4846 for (i = 0; i < numInputs; i++) {
4847 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4848 }
4849
4850 for (i = 0; i < numOutputs; i++) {
4851 t->outputs[i] = ureg_DECL_output(ureg,
4852 outputSemanticName[i],
4853 outputSemanticIndex[i]);
4854 if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
4855 /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
4856 ureg_MOV(ureg,
4857 ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
4858 ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
4859 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
4860 }
4861 }
4862 if (passthrough_edgeflags)
4863 emit_edgeflags(t);
4864 }
4865
4866 /* Declare address register.
4867 */
4868 if (program->num_address_regs > 0) {
4869 assert(program->num_address_regs <= 2);
4870 t->address[0] = ureg_DECL_address(ureg);
4871 if (program->num_address_regs == 2)
4872 t->address[1] = ureg_DECL_address(ureg);
4873 }
4874
4875 /* Declare misc input registers
4876 */
4877 {
4878 GLbitfield sysInputs = proginfo->SystemValuesRead;
4879 unsigned numSys = 0;
4880 for (i = 0; sysInputs; i++) {
4881 if (sysInputs & (1 << i)) {
4882 unsigned semName = mesa_sysval_to_semantic[i];
4883 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4884 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4885 semName == TGSI_SEMANTIC_VERTEXID) {
4886 /* From Gallium perspective, these system values are always
4887 * integer, and require native integer support. However, if
4888 * native integer is supported on the vertex stage but not the
4889 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4890 * assumes these system values are floats. To resolve the
4891 * inconsistency, we insert a U2F.
4892 */
4893 struct st_context *st = st_context(ctx);
4894 struct pipe_screen *pscreen = st->pipe->screen;
4895 assert(procType == TGSI_PROCESSOR_VERTEX);
4896 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4897 if (!ctx->Const.NativeIntegers) {
4898 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4899 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4900 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4901 }
4902 }
4903 numSys++;
4904 sysInputs &= ~(1 << i);
4905 }
4906 }
4907 }
4908
4909 /* Copy over array sizes
4910 */
4911 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4912
4913 /* Emit constants and uniforms. TGSI uses a single index space for these,
4914 * so we put all the translated regs in t->constants.
4915 */
4916 if (proginfo->Parameters) {
4917 t->constants = (struct ureg_src *)
4918 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4919 if (t->constants == NULL) {
4920 ret = PIPE_ERROR_OUT_OF_MEMORY;
4921 goto out;
4922 }
4923
4924 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4925 switch (proginfo->Parameters->Parameters[i].Type) {
4926 case PROGRAM_STATE_VAR:
4927 case PROGRAM_UNIFORM:
4928 t->constants[i] = ureg_DECL_constant(ureg, i);
4929 break;
4930
4931 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4932 * addressing of the const buffer.
4933 * FIXME: Be smarter and recognize param arrays:
4934 * indirect addressing is only valid within the referenced
4935 * array.
4936 */
4937 case PROGRAM_CONSTANT:
4938 if (program->indirect_addr_consts)
4939 t->constants[i] = ureg_DECL_constant(ureg, i);
4940 else
4941 t->constants[i] = emit_immediate(t,
4942 proginfo->Parameters->ParameterValues[i],
4943 proginfo->Parameters->Parameters[i].DataType,
4944 4);
4945 break;
4946 default:
4947 break;
4948 }
4949 }
4950 }
4951
4952 if (program->shader_program) {
4953 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4954
4955 for (i = 0; i < num_ubos; i++) {
4956 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4957 }
4958 }
4959
4960 /* Emit immediate values.
4961 */
4962 t->immediates = (struct ureg_src *)
4963 calloc(program->num_immediates, sizeof(struct ureg_src));
4964 if (t->immediates == NULL) {
4965 ret = PIPE_ERROR_OUT_OF_MEMORY;
4966 goto out;
4967 }
4968 i = 0;
4969 foreach_iter(exec_list_iterator, iter, program->immediates) {
4970 immediate_storage *imm = (immediate_storage *)iter.get();
4971 assert(i < program->num_immediates);
4972 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4973 }
4974 assert(i == program->num_immediates);
4975
4976 /* texture samplers */
4977 for (i = 0; i < ctx->Const.FragmentProgram.MaxTextureImageUnits; i++) {
4978 if (program->samplers_used & (1 << i)) {
4979 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4980 }
4981 }
4982
4983 /* Emit each instruction in turn:
4984 */
4985 foreach_iter(exec_list_iterator, iter, program->instructions) {
4986 set_insn_start(t, ureg_get_instruction_number(ureg));
4987 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4988 clamp_color);
4989 }
4990
4991 /* Fix up all emitted labels:
4992 */
4993 for (i = 0; i < t->labels_count; i++) {
4994 ureg_fixup_label(ureg, t->labels[i].token,
4995 t->insn[t->labels[i].branch_target]);
4996 }
4997
4998 if (program->shader_program) {
4999 /* This has to be done last. Any operation the can cause
5000 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5001 * program constant) has to happen before creating this linkage.
5002 */
5003 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5004 if (program->shader_program->_LinkedShaders[i] == NULL)
5005 continue;
5006
5007 _mesa_associate_uniform_storage(ctx, program->shader_program,
5008 program->shader_program->_LinkedShaders[i]->Program->Parameters);
5009 }
5010 }
5011
5012 out:
5013 if (t) {
5014 free(t->insn);
5015 free(t->labels);
5016 free(t->constants);
5017 free(t->immediates);
5018
5019 if (t->error) {
5020 debug_printf("%s: translate error flag set\n", __FUNCTION__);
5021 }
5022
5023 free(t);
5024 }
5025
5026 return ret;
5027 }
5028 /* ----------------------------- End TGSI code ------------------------------ */
5029
5030 /**
5031 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5032 * generating Mesa IR.
5033 */
5034 static struct gl_program *
5035 get_mesa_program(struct gl_context *ctx,
5036 struct gl_shader_program *shader_program,
5037 struct gl_shader *shader)
5038 {
5039 glsl_to_tgsi_visitor* v;
5040 struct gl_program *prog;
5041 GLenum target;
5042 bool progress;
5043 struct gl_shader_compiler_options *options =
5044 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
5045 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5046 unsigned ptarget;
5047
5048 switch (shader->Type) {
5049 case GL_VERTEX_SHADER:
5050 target = GL_VERTEX_PROGRAM_ARB;
5051 ptarget = PIPE_SHADER_VERTEX;
5052 break;
5053 case GL_FRAGMENT_SHADER:
5054 target = GL_FRAGMENT_PROGRAM_ARB;
5055 ptarget = PIPE_SHADER_FRAGMENT;
5056 break;
5057 case GL_GEOMETRY_SHADER:
5058 target = GL_GEOMETRY_PROGRAM_NV;
5059 ptarget = PIPE_SHADER_GEOMETRY;
5060 break;
5061 default:
5062 assert(!"should not be reached");
5063 return NULL;
5064 }
5065
5066 validate_ir_tree(shader->ir);
5067
5068 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5069 if (!prog)
5070 return NULL;
5071 prog->Parameters = _mesa_new_parameter_list();
5072 v = new glsl_to_tgsi_visitor();
5073 v->ctx = ctx;
5074 v->prog = prog;
5075 v->shader_program = shader_program;
5076 v->options = options;
5077 v->glsl_version = ctx->Const.GLSLVersion;
5078 v->native_integers = ctx->Const.NativeIntegers;
5079
5080 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5081 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5082
5083 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5084 prog->Parameters);
5085
5086 /* Remove reads from output registers. */
5087 lower_output_reads(shader->ir);
5088
5089 /* Emit intermediate IR for main(). */
5090 visit_exec_list(shader->ir, v);
5091
5092 /* Now emit bodies for any functions that were used. */
5093 do {
5094 progress = GL_FALSE;
5095
5096 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5097 function_entry *entry = (function_entry *)iter.get();
5098
5099 if (!entry->bgn_inst) {
5100 v->current_function = entry;
5101
5102 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5103 entry->bgn_inst->function = entry;
5104
5105 visit_exec_list(&entry->sig->body, v);
5106
5107 glsl_to_tgsi_instruction *last;
5108 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5109 if (last->op != TGSI_OPCODE_RET)
5110 v->emit(NULL, TGSI_OPCODE_RET);
5111
5112 glsl_to_tgsi_instruction *end;
5113 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5114 end->function = entry;
5115
5116 progress = GL_TRUE;
5117 }
5118 }
5119 } while (progress);
5120
5121 #if 0
5122 /* Print out some information (for debugging purposes) used by the
5123 * optimization passes. */
5124 for (i=0; i < v->next_temp; i++) {
5125 int fr = v->get_first_temp_read(i);
5126 int fw = v->get_first_temp_write(i);
5127 int lr = v->get_last_temp_read(i);
5128 int lw = v->get_last_temp_write(i);
5129
5130 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5131 assert(fw <= fr);
5132 }
5133 #endif
5134
5135 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5136 v->simplify_cmp();
5137 v->copy_propagate();
5138 while (v->eliminate_dead_code_advanced());
5139
5140 v->eliminate_dead_code();
5141 v->merge_registers();
5142 v->renumber_registers();
5143
5144 /* Write the END instruction. */
5145 v->emit(NULL, TGSI_OPCODE_END);
5146
5147 if (ctx->Shader.Flags & GLSL_DUMP) {
5148 printf("\n");
5149 printf("GLSL IR for linked %s program %d:\n",
5150 _mesa_glsl_shader_target_name(shader->Type),
5151 shader_program->Name);
5152 _mesa_print_ir(shader->ir, NULL);
5153 printf("\n");
5154 printf("\n");
5155 fflush(stdout);
5156 }
5157
5158 prog->Instructions = NULL;
5159 prog->NumInstructions = 0;
5160
5161 do_set_program_inouts(shader->ir, prog, shader->Type);
5162 count_resources(v, prog);
5163
5164 _mesa_reference_program(ctx, &shader->Program, prog);
5165
5166 /* This has to be done last. Any operation the can cause
5167 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5168 * program constant) has to happen before creating this linkage.
5169 */
5170 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5171 if (!shader_program->LinkStatus) {
5172 return NULL;
5173 }
5174
5175 struct st_vertex_program *stvp;
5176 struct st_fragment_program *stfp;
5177 struct st_geometry_program *stgp;
5178
5179 switch (shader->Type) {
5180 case GL_VERTEX_SHADER:
5181 stvp = (struct st_vertex_program *)prog;
5182 stvp->glsl_to_tgsi = v;
5183 break;
5184 case GL_FRAGMENT_SHADER:
5185 stfp = (struct st_fragment_program *)prog;
5186 stfp->glsl_to_tgsi = v;
5187 break;
5188 case GL_GEOMETRY_SHADER:
5189 stgp = (struct st_geometry_program *)prog;
5190 stgp->glsl_to_tgsi = v;
5191 stgp->Base.InputType = shader_program->Geom.InputType;
5192 stgp->Base.OutputType = shader_program->Geom.OutputType;
5193 stgp->Base.VerticesOut = shader_program->Geom.VerticesOut;
5194 break;
5195 default:
5196 assert(!"should not be reached");
5197 return NULL;
5198 }
5199
5200 return prog;
5201 }
5202
5203 extern "C" {
5204
5205 struct gl_shader *
5206 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5207 {
5208 struct gl_shader *shader;
5209 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5210 type == GL_GEOMETRY_SHADER_ARB);
5211 shader = rzalloc(NULL, struct gl_shader);
5212 if (shader) {
5213 shader->Type = type;
5214 shader->Name = name;
5215 _mesa_init_shader(ctx, shader);
5216 }
5217 return shader;
5218 }
5219
5220 struct gl_shader_program *
5221 st_new_shader_program(struct gl_context *ctx, GLuint name)
5222 {
5223 struct gl_shader_program *shProg;
5224 shProg = rzalloc(NULL, struct gl_shader_program);
5225 if (shProg) {
5226 shProg->Name = name;
5227 _mesa_init_shader_program(ctx, shProg);
5228 }
5229 return shProg;
5230 }
5231
5232 /**
5233 * Link a shader.
5234 * Called via ctx->Driver.LinkShader()
5235 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5236 * with code lowering and other optimizations.
5237 */
5238 GLboolean
5239 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5240 {
5241 assert(prog->LinkStatus);
5242
5243 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5244 if (prog->_LinkedShaders[i] == NULL)
5245 continue;
5246
5247 bool progress;
5248 exec_list *ir = prog->_LinkedShaders[i]->ir;
5249 const struct gl_shader_compiler_options *options =
5250 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5251
5252 /* If there are forms of indirect addressing that the driver
5253 * cannot handle, perform the lowering pass.
5254 */
5255 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5256 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5257 lower_variable_index_to_cond_assign(ir,
5258 options->EmitNoIndirectInput,
5259 options->EmitNoIndirectOutput,
5260 options->EmitNoIndirectTemp,
5261 options->EmitNoIndirectUniform);
5262 }
5263
5264 if (ctx->Extensions.ARB_shading_language_packing) {
5265 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5266 LOWER_UNPACK_SNORM_2x16 |
5267 LOWER_PACK_UNORM_2x16 |
5268 LOWER_UNPACK_UNORM_2x16 |
5269 LOWER_PACK_SNORM_4x8 |
5270 LOWER_UNPACK_SNORM_4x8 |
5271 LOWER_UNPACK_UNORM_4x8 |
5272 LOWER_PACK_UNORM_4x8 |
5273 LOWER_PACK_HALF_2x16 |
5274 LOWER_UNPACK_HALF_2x16;
5275
5276 lower_packing_builtins(ir, lower_inst);
5277 }
5278
5279 do_mat_op_to_vec(ir);
5280 lower_instructions(ir,
5281 MOD_TO_FRACT |
5282 DIV_TO_MUL_RCP |
5283 EXP_TO_EXP2 |
5284 LOG_TO_LOG2 |
5285 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5286 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5287
5288 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5289 do_vec_index_to_cond_assign(ir);
5290 lower_vector_insert(ir, true);
5291 lower_quadop_vector(ir, false);
5292 lower_noise(ir);
5293 if (options->MaxIfDepth == 0) {
5294 lower_discard(ir);
5295 }
5296
5297 do {
5298 progress = false;
5299
5300 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5301
5302 progress = do_common_optimization(ir, true, true,
5303 options->MaxUnrollIterations, options)
5304 || progress;
5305
5306 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5307
5308 } while (progress);
5309
5310 lower_bounded_loops(ir);
5311
5312 validate_ir_tree(ir);
5313 }
5314
5315 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5316 struct gl_program *linked_prog;
5317
5318 if (prog->_LinkedShaders[i] == NULL)
5319 continue;
5320
5321 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5322
5323 if (linked_prog) {
5324 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5325 linked_prog);
5326 if (!ctx->Driver.ProgramStringNotify(ctx,
5327 _mesa_program_index_to_target(i),
5328 linked_prog)) {
5329 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5330 NULL);
5331 _mesa_reference_program(ctx, &linked_prog, NULL);
5332 return GL_FALSE;
5333 }
5334 }
5335
5336 _mesa_reference_program(ctx, &linked_prog, NULL);
5337 }
5338
5339 return GL_TRUE;
5340 }
5341
5342 void
5343 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5344 const GLuint outputMapping[],
5345 struct pipe_stream_output_info *so)
5346 {
5347 unsigned i;
5348 struct gl_transform_feedback_info *info =
5349 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5350
5351 for (i = 0; i < info->NumOutputs; i++) {
5352 so->output[i].register_index =
5353 outputMapping[info->Outputs[i].OutputRegister];
5354 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5355 so->output[i].num_components = info->Outputs[i].NumComponents;
5356 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5357 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5358 }
5359
5360 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5361 so->stride[i] = info->BufferStride[i];
5362 }
5363 so->num_outputs = info->NumOutputs;
5364 }
5365
5366 } /* extern "C" */