st/mesa: silence warning about unhandled ir_query_levels in switch
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "main/uniforms.h"
47 #include "program/hash_table.h"
48
49 extern "C" {
50 #include "main/shaderapi.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57
58 #include "pipe/p_compiler.h"
59 #include "pipe/p_context.h"
60 #include "pipe/p_screen.h"
61 #include "pipe/p_shader_tokens.h"
62 #include "pipe/p_state.h"
63 #include "util/u_math.h"
64 #include "tgsi/tgsi_ureg.h"
65 #include "tgsi/tgsi_info.h"
66 #include "st_context.h"
67 #include "st_program.h"
68 #include "st_glsl_to_tgsi.h"
69 #include "st_mesa_to_tgsi.h"
70 }
71
72 #define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX
73 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
74 (1 << PROGRAM_ENV_PARAM) | \
75 (1 << PROGRAM_STATE_VAR) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
78
79 /**
80 * Maximum number of temporary registers.
81 *
82 * It is too big for stack allocated arrays -- it will cause stack overflow on
83 * Windows and likely Mac OS X.
84 */
85 #define MAX_TEMPS 4096
86
87 /**
88 * Maximum number of arrays
89 */
90 #define MAX_ARRAYS 256
91
92 /* will be 4 for GLSL 4.00 */
93 #define MAX_GLSL_TEXTURE_OFFSET 1
94
95 class st_src_reg;
96 class st_dst_reg;
97
98 static int swizzle_for_size(int size);
99
100 /**
101 * This struct is a corresponding struct to TGSI ureg_src.
102 */
103 class st_src_reg {
104 public:
105 st_src_reg(gl_register_file file, int index, const glsl_type *type)
106 {
107 this->file = file;
108 this->index = index;
109 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
110 this->swizzle = swizzle_for_size(type->vector_elements);
111 else
112 this->swizzle = SWIZZLE_XYZW;
113 this->negate = 0;
114 this->index2D = 0;
115 this->type = type ? type->base_type : GLSL_TYPE_ERROR;
116 this->reladdr = NULL;
117 }
118
119 st_src_reg(gl_register_file file, int index, int type)
120 {
121 this->type = type;
122 this->file = file;
123 this->index = index;
124 this->index2D = 0;
125 this->swizzle = SWIZZLE_XYZW;
126 this->negate = 0;
127 this->reladdr = NULL;
128 }
129
130 st_src_reg(gl_register_file file, int index, int type, int index2D)
131 {
132 this->type = type;
133 this->file = file;
134 this->index = index;
135 this->index2D = index2D;
136 this->swizzle = SWIZZLE_XYZW;
137 this->negate = 0;
138 this->reladdr = NULL;
139 }
140
141 st_src_reg()
142 {
143 this->type = GLSL_TYPE_ERROR;
144 this->file = PROGRAM_UNDEFINED;
145 this->index = 0;
146 this->index2D = 0;
147 this->swizzle = 0;
148 this->negate = 0;
149 this->reladdr = NULL;
150 }
151
152 explicit st_src_reg(st_dst_reg reg);
153
154 gl_register_file file; /**< PROGRAM_* from Mesa */
155 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
156 int index2D;
157 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
158 int negate; /**< NEGATE_XYZW mask from mesa */
159 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
160 /** Register index should be offset by the integer in this reg. */
161 st_src_reg *reladdr;
162 };
163
164 class st_dst_reg {
165 public:
166 st_dst_reg(gl_register_file file, int writemask, int type)
167 {
168 this->file = file;
169 this->index = 0;
170 this->writemask = writemask;
171 this->cond_mask = COND_TR;
172 this->reladdr = NULL;
173 this->type = type;
174 }
175
176 st_dst_reg()
177 {
178 this->type = GLSL_TYPE_ERROR;
179 this->file = PROGRAM_UNDEFINED;
180 this->index = 0;
181 this->writemask = 0;
182 this->cond_mask = COND_TR;
183 this->reladdr = NULL;
184 }
185
186 explicit st_dst_reg(st_src_reg reg);
187
188 gl_register_file file; /**< PROGRAM_* from Mesa */
189 int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
190 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
191 GLuint cond_mask:4;
192 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
193 /** Register index should be offset by the integer in this reg. */
194 st_src_reg *reladdr;
195 };
196
197 st_src_reg::st_src_reg(st_dst_reg reg)
198 {
199 this->type = reg.type;
200 this->file = reg.file;
201 this->index = reg.index;
202 this->swizzle = SWIZZLE_XYZW;
203 this->negate = 0;
204 this->reladdr = reg.reladdr;
205 this->index2D = 0;
206 }
207
208 st_dst_reg::st_dst_reg(st_src_reg reg)
209 {
210 this->type = reg.type;
211 this->file = reg.file;
212 this->index = reg.index;
213 this->writemask = WRITEMASK_XYZW;
214 this->cond_mask = COND_TR;
215 this->reladdr = reg.reladdr;
216 }
217
218 class glsl_to_tgsi_instruction : public exec_node {
219 public:
220 DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
221
222 unsigned op;
223 st_dst_reg dst;
224 st_src_reg src[3];
225 /** Pointer to the ir source this tree came from for debugging */
226 ir_instruction *ir;
227 GLboolean cond_update;
228 bool saturate;
229 int sampler; /**< sampler index */
230 int tex_target; /**< One of TEXTURE_*_INDEX */
231 GLboolean tex_shadow;
232 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET];
233 unsigned tex_offset_num_offset;
234 int dead_mask; /**< Used in dead code elimination */
235
236 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */
237 };
238
239 class variable_storage : public exec_node {
240 public:
241 variable_storage(ir_variable *var, gl_register_file file, int index)
242 : file(file), index(index), var(var)
243 {
244 /* empty */
245 }
246
247 gl_register_file file;
248 int index;
249 ir_variable *var; /* variable that maps to this, if any */
250 };
251
252 class immediate_storage : public exec_node {
253 public:
254 immediate_storage(gl_constant_value *values, int size, int type)
255 {
256 memcpy(this->values, values, size * sizeof(gl_constant_value));
257 this->size = size;
258 this->type = type;
259 }
260
261 gl_constant_value values[4];
262 int size; /**< Number of components (1-4) */
263 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */
264 };
265
266 class function_entry : public exec_node {
267 public:
268 ir_function_signature *sig;
269
270 /**
271 * identifier of this function signature used by the program.
272 *
273 * At the point that TGSI instructions for function calls are
274 * generated, we don't know the address of the first instruction of
275 * the function body. So we make the BranchTarget that is called a
276 * small integer and rewrite them during set_branchtargets().
277 */
278 int sig_id;
279
280 /**
281 * Pointer to first instruction of the function body.
282 *
283 * Set during function body emits after main() is processed.
284 */
285 glsl_to_tgsi_instruction *bgn_inst;
286
287 /**
288 * Index of the first instruction of the function body in actual TGSI.
289 *
290 * Set after conversion from glsl_to_tgsi_instruction to TGSI.
291 */
292 int inst;
293
294 /** Storage for the return value. */
295 st_src_reg return_reg;
296 };
297
298 struct glsl_to_tgsi_visitor : public ir_visitor {
299 public:
300 glsl_to_tgsi_visitor();
301 ~glsl_to_tgsi_visitor();
302
303 function_entry *current_function;
304
305 struct gl_context *ctx;
306 struct gl_program *prog;
307 struct gl_shader_program *shader_program;
308 struct gl_shader_compiler_options *options;
309
310 int next_temp;
311
312 unsigned array_sizes[MAX_ARRAYS];
313 unsigned next_array;
314
315 int num_address_regs;
316 int samplers_used;
317 bool indirect_addr_consts;
318
319 int glsl_version;
320 bool native_integers;
321 bool have_sqrt;
322
323 variable_storage *find_variable_storage(ir_variable *var);
324
325 int add_constant(gl_register_file file, gl_constant_value values[4],
326 int size, int datatype, GLuint *swizzle_out);
327
328 function_entry *get_function_signature(ir_function_signature *sig);
329
330 st_src_reg get_temp(const glsl_type *type);
331 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
332
333 st_src_reg st_src_reg_for_float(float val);
334 st_src_reg st_src_reg_for_int(int val);
335 st_src_reg st_src_reg_for_type(int type, int val);
336
337 /**
338 * \name Visit methods
339 *
340 * As typical for the visitor pattern, there must be one \c visit method for
341 * each concrete subclass of \c ir_instruction. Virtual base classes within
342 * the hierarchy should not have \c visit methods.
343 */
344 /*@{*/
345 virtual void visit(ir_variable *);
346 virtual void visit(ir_loop *);
347 virtual void visit(ir_loop_jump *);
348 virtual void visit(ir_function_signature *);
349 virtual void visit(ir_function *);
350 virtual void visit(ir_expression *);
351 virtual void visit(ir_swizzle *);
352 virtual void visit(ir_dereference_variable *);
353 virtual void visit(ir_dereference_array *);
354 virtual void visit(ir_dereference_record *);
355 virtual void visit(ir_assignment *);
356 virtual void visit(ir_constant *);
357 virtual void visit(ir_call *);
358 virtual void visit(ir_return *);
359 virtual void visit(ir_discard *);
360 virtual void visit(ir_texture *);
361 virtual void visit(ir_if *);
362 virtual void visit(ir_emit_vertex *);
363 virtual void visit(ir_end_primitive *);
364 /*@}*/
365
366 st_src_reg result;
367
368 /** List of variable_storage */
369 exec_list variables;
370
371 /** List of immediate_storage */
372 exec_list immediates;
373 unsigned num_immediates;
374
375 /** List of function_entry */
376 exec_list function_signatures;
377 int next_signature_id;
378
379 /** List of glsl_to_tgsi_instruction */
380 exec_list instructions;
381
382 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op);
383
384 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
385 st_dst_reg dst, st_src_reg src0);
386
387 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
388 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
389
390 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op,
391 st_dst_reg dst,
392 st_src_reg src0, st_src_reg src1, st_src_reg src2);
393
394 unsigned get_opcode(ir_instruction *ir, unsigned op,
395 st_dst_reg dst,
396 st_src_reg src0, st_src_reg src1);
397
398 /**
399 * Emit the correct dot-product instruction for the type of arguments
400 */
401 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir,
402 st_dst_reg dst,
403 st_src_reg src0,
404 st_src_reg src1,
405 unsigned elements);
406
407 void emit_scalar(ir_instruction *ir, unsigned op,
408 st_dst_reg dst, st_src_reg src0);
409
410 void emit_scalar(ir_instruction *ir, unsigned op,
411 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
412
413 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0);
414
415 void emit_scs(ir_instruction *ir, unsigned op,
416 st_dst_reg dst, const st_src_reg &src);
417
418 bool try_emit_mad(ir_expression *ir,
419 int mul_operand);
420 bool try_emit_mad_for_and_not(ir_expression *ir,
421 int mul_operand);
422 bool try_emit_sat(ir_expression *ir);
423
424 void emit_swz(ir_expression *ir);
425
426 bool process_move_condition(ir_rvalue *ir);
427
428 void simplify_cmp(void);
429
430 void rename_temp_register(int index, int new_index);
431 int get_first_temp_read(int index);
432 int get_first_temp_write(int index);
433 int get_last_temp_read(int index);
434 int get_last_temp_write(int index);
435
436 void copy_propagate(void);
437 void eliminate_dead_code(void);
438 int eliminate_dead_code_advanced(void);
439 void merge_registers(void);
440 void renumber_registers(void);
441
442 void emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
443 st_dst_reg *l, st_src_reg *r);
444
445 void *mem_ctx;
446 };
447
448 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR);
449
450 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR);
451
452 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT);
453
454 static void
455 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
456
457 static void
458 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
459 {
460 va_list args;
461 va_start(args, fmt);
462 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
463 va_end(args);
464
465 prog->LinkStatus = GL_FALSE;
466 }
467
468 static int
469 swizzle_for_size(int size)
470 {
471 int size_swizzles[4] = {
472 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
473 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
474 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
475 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
476 };
477
478 assert((size >= 1) && (size <= 4));
479 return size_swizzles[size - 1];
480 }
481
482 static bool
483 is_tex_instruction(unsigned opcode)
484 {
485 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
486 return info->is_tex;
487 }
488
489 static unsigned
490 num_inst_dst_regs(unsigned opcode)
491 {
492 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
493 return info->num_dst;
494 }
495
496 static unsigned
497 num_inst_src_regs(unsigned opcode)
498 {
499 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode);
500 return info->is_tex ? info->num_src - 1 : info->num_src;
501 }
502
503 glsl_to_tgsi_instruction *
504 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
505 st_dst_reg dst,
506 st_src_reg src0, st_src_reg src1, st_src_reg src2)
507 {
508 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
509 int num_reladdr = 0, i;
510
511 op = get_opcode(ir, op, dst, src0, src1);
512
513 /* If we have to do relative addressing, we want to load the ARL
514 * reg directly for one of the regs, and preload the other reladdr
515 * sources into temps.
516 */
517 num_reladdr += dst.reladdr != NULL;
518 num_reladdr += src0.reladdr != NULL;
519 num_reladdr += src1.reladdr != NULL;
520 num_reladdr += src2.reladdr != NULL;
521
522 reladdr_to_temp(ir, &src2, &num_reladdr);
523 reladdr_to_temp(ir, &src1, &num_reladdr);
524 reladdr_to_temp(ir, &src0, &num_reladdr);
525
526 if (dst.reladdr) {
527 emit_arl(ir, address_reg, *dst.reladdr);
528 num_reladdr--;
529 }
530 assert(num_reladdr == 0);
531
532 inst->op = op;
533 inst->dst = dst;
534 inst->src[0] = src0;
535 inst->src[1] = src1;
536 inst->src[2] = src2;
537 inst->ir = ir;
538 inst->dead_mask = 0;
539
540 inst->function = NULL;
541
542 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL)
543 this->num_address_regs = 1;
544
545 /* Update indirect addressing status used by TGSI */
546 if (dst.reladdr) {
547 switch(dst.file) {
548 case PROGRAM_LOCAL_PARAM:
549 case PROGRAM_ENV_PARAM:
550 case PROGRAM_STATE_VAR:
551 case PROGRAM_CONSTANT:
552 case PROGRAM_UNIFORM:
553 this->indirect_addr_consts = true;
554 break;
555 case PROGRAM_IMMEDIATE:
556 assert(!"immediates should not have indirect addressing");
557 break;
558 default:
559 break;
560 }
561 }
562 else {
563 for (i=0; i<3; i++) {
564 if(inst->src[i].reladdr) {
565 switch(inst->src[i].file) {
566 case PROGRAM_LOCAL_PARAM:
567 case PROGRAM_ENV_PARAM:
568 case PROGRAM_STATE_VAR:
569 case PROGRAM_CONSTANT:
570 case PROGRAM_UNIFORM:
571 this->indirect_addr_consts = true;
572 break;
573 case PROGRAM_IMMEDIATE:
574 assert(!"immediates should not have indirect addressing");
575 break;
576 default:
577 break;
578 }
579 }
580 }
581 }
582
583 this->instructions.push_tail(inst);
584
585 return inst;
586 }
587
588
589 glsl_to_tgsi_instruction *
590 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
591 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
592 {
593 return emit(ir, op, dst, src0, src1, undef_src);
594 }
595
596 glsl_to_tgsi_instruction *
597 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op,
598 st_dst_reg dst, st_src_reg src0)
599 {
600 assert(dst.writemask != 0);
601 return emit(ir, op, dst, src0, undef_src, undef_src);
602 }
603
604 glsl_to_tgsi_instruction *
605 glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op)
606 {
607 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
608 }
609
610 /**
611 * Determines whether to use an integer, unsigned integer, or float opcode
612 * based on the operands and input opcode, then emits the result.
613 */
614 unsigned
615 glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op,
616 st_dst_reg dst,
617 st_src_reg src0, st_src_reg src1)
618 {
619 int type = GLSL_TYPE_FLOAT;
620
621 assert(src0.type != GLSL_TYPE_ARRAY);
622 assert(src0.type != GLSL_TYPE_STRUCT);
623 assert(src1.type != GLSL_TYPE_ARRAY);
624 assert(src1.type != GLSL_TYPE_STRUCT);
625
626 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT)
627 type = GLSL_TYPE_FLOAT;
628 else if (native_integers)
629 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type;
630
631 #define case4(c, f, i, u) \
632 case TGSI_OPCODE_##c: \
633 if (type == GLSL_TYPE_INT) \
634 op = TGSI_OPCODE_##i; \
635 else if (type == GLSL_TYPE_UINT) \
636 op = TGSI_OPCODE_##u; \
637 else \
638 op = TGSI_OPCODE_##f; \
639 break;
640
641 #define case3(f, i, u) case4(f, f, i, u)
642 #define case2fi(f, i) case4(f, f, i, i)
643 #define case2iu(i, u) case4(i, LAST, i, u)
644
645 #define casecomp(c, f, i, u) \
646 case TGSI_OPCODE_##c: \
647 if (type == GLSL_TYPE_INT) \
648 op = TGSI_OPCODE_##i; \
649 else if (type == GLSL_TYPE_UINT) \
650 op = TGSI_OPCODE_##u; \
651 else if (native_integers) \
652 op = TGSI_OPCODE_##f; \
653 else \
654 op = TGSI_OPCODE_##c; \
655 break;
656
657 switch(op) {
658 case2fi(ADD, UADD);
659 case2fi(MUL, UMUL);
660 case2fi(MAD, UMAD);
661 case3(DIV, IDIV, UDIV);
662 case3(MAX, IMAX, UMAX);
663 case3(MIN, IMIN, UMIN);
664 case2iu(MOD, UMOD);
665
666 casecomp(SEQ, FSEQ, USEQ, USEQ);
667 casecomp(SNE, FSNE, USNE, USNE);
668 casecomp(SGE, FSGE, ISGE, USGE);
669 casecomp(SLT, FSLT, ISLT, USLT);
670
671 case2iu(ISHR, USHR);
672
673 case2fi(SSG, ISSG);
674 case3(ABS, IABS, IABS);
675
676 default: break;
677 }
678
679 assert(op != TGSI_OPCODE_LAST);
680 return op;
681 }
682
683 glsl_to_tgsi_instruction *
684 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
685 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
686 unsigned elements)
687 {
688 static const unsigned dot_opcodes[] = {
689 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4
690 };
691
692 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
693 }
694
695 /**
696 * Emits TGSI scalar opcodes to produce unique answers across channels.
697 *
698 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X
699 * channel determines the result across all channels. So to do a vec4
700 * of this operation, we want to emit a scalar per source channel used
701 * to produce dest channels.
702 */
703 void
704 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
705 st_dst_reg dst,
706 st_src_reg orig_src0, st_src_reg orig_src1)
707 {
708 int i, j;
709 int done_mask = ~dst.writemask;
710
711 /* TGSI RCP is a scalar operation splatting results to all channels,
712 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
713 * dst channels.
714 */
715 for (i = 0; i < 4; i++) {
716 GLuint this_mask = (1 << i);
717 glsl_to_tgsi_instruction *inst;
718 st_src_reg src0 = orig_src0;
719 st_src_reg src1 = orig_src1;
720
721 if (done_mask & this_mask)
722 continue;
723
724 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
725 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
726 for (j = i + 1; j < 4; j++) {
727 /* If there is another enabled component in the destination that is
728 * derived from the same inputs, generate its value on this pass as
729 * well.
730 */
731 if (!(done_mask & (1 << j)) &&
732 GET_SWZ(src0.swizzle, j) == src0_swiz &&
733 GET_SWZ(src1.swizzle, j) == src1_swiz) {
734 this_mask |= (1 << j);
735 }
736 }
737 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
738 src0_swiz, src0_swiz);
739 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
740 src1_swiz, src1_swiz);
741
742 inst = emit(ir, op, dst, src0, src1);
743 inst->dst.writemask = this_mask;
744 done_mask |= this_mask;
745 }
746 }
747
748 void
749 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op,
750 st_dst_reg dst, st_src_reg src0)
751 {
752 st_src_reg undef = undef_src;
753
754 undef.swizzle = SWIZZLE_XXXX;
755
756 emit_scalar(ir, op, dst, src0, undef);
757 }
758
759 void
760 glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir,
761 st_dst_reg dst, st_src_reg src0)
762 {
763 int op = TGSI_OPCODE_ARL;
764
765 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT)
766 op = TGSI_OPCODE_UARL;
767
768 emit(NULL, op, dst, src0);
769 }
770
771 /**
772 * Emit an TGSI_OPCODE_SCS instruction
773 *
774 * The \c SCS opcode functions a bit differently than the other TGSI opcodes.
775 * Instead of splatting its result across all four components of the
776 * destination, it writes one value to the \c x component and another value to
777 * the \c y component.
778 *
779 * \param ir IR instruction being processed
780 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending
781 * on which value is desired.
782 * \param dst Destination register
783 * \param src Source register
784 */
785 void
786 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op,
787 st_dst_reg dst,
788 const st_src_reg &src)
789 {
790 /* Vertex programs cannot use the SCS opcode.
791 */
792 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
793 emit_scalar(ir, op, dst, src);
794 return;
795 }
796
797 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1;
798 const unsigned scs_mask = (1U << component);
799 int done_mask = ~dst.writemask;
800 st_src_reg tmp;
801
802 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS);
803
804 /* If there are compnents in the destination that differ from the component
805 * that will be written by the SCS instrution, we'll need a temporary.
806 */
807 if (scs_mask != unsigned(dst.writemask)) {
808 tmp = get_temp(glsl_type::vec4_type);
809 }
810
811 for (unsigned i = 0; i < 4; i++) {
812 unsigned this_mask = (1U << i);
813 st_src_reg src0 = src;
814
815 if ((done_mask & this_mask) != 0)
816 continue;
817
818 /* The source swizzle specified which component of the source generates
819 * sine / cosine for the current component in the destination. The SCS
820 * instruction requires that this value be swizzle to the X component.
821 * Replace the current swizzle with a swizzle that puts the source in
822 * the X component.
823 */
824 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
825
826 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
827 src0_swiz, src0_swiz);
828 for (unsigned j = i + 1; j < 4; j++) {
829 /* If there is another enabled component in the destination that is
830 * derived from the same inputs, generate its value on this pass as
831 * well.
832 */
833 if (!(done_mask & (1 << j)) &&
834 GET_SWZ(src0.swizzle, j) == src0_swiz) {
835 this_mask |= (1 << j);
836 }
837 }
838
839 if (this_mask != scs_mask) {
840 glsl_to_tgsi_instruction *inst;
841 st_dst_reg tmp_dst = st_dst_reg(tmp);
842
843 /* Emit the SCS instruction.
844 */
845 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0);
846 inst->dst.writemask = scs_mask;
847
848 /* Move the result of the SCS instruction to the desired location in
849 * the destination.
850 */
851 tmp.swizzle = MAKE_SWIZZLE4(component, component,
852 component, component);
853 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp);
854 inst->dst.writemask = this_mask;
855 } else {
856 /* Emit the SCS instruction to write directly to the destination.
857 */
858 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0);
859 inst->dst.writemask = scs_mask;
860 }
861
862 done_mask |= this_mask;
863 }
864 }
865
866 int
867 glsl_to_tgsi_visitor::add_constant(gl_register_file file,
868 gl_constant_value values[4], int size, int datatype,
869 GLuint *swizzle_out)
870 {
871 if (file == PROGRAM_CONSTANT) {
872 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values,
873 size, datatype, swizzle_out);
874 } else {
875 int index = 0;
876 immediate_storage *entry;
877 assert(file == PROGRAM_IMMEDIATE);
878
879 /* Search immediate storage to see if we already have an identical
880 * immediate that we can use instead of adding a duplicate entry.
881 */
882 foreach_iter(exec_list_iterator, iter, this->immediates) {
883 entry = (immediate_storage *)iter.get();
884
885 if (entry->size == size &&
886 entry->type == datatype &&
887 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) {
888 return index;
889 }
890 index++;
891 }
892
893 /* Add this immediate to the list. */
894 entry = new(mem_ctx) immediate_storage(values, size, datatype);
895 this->immediates.push_tail(entry);
896 this->num_immediates++;
897 return index;
898 }
899 }
900
901 st_src_reg
902 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
903 {
904 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT);
905 union gl_constant_value uval;
906
907 uval.f = val;
908 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle);
909
910 return src;
911 }
912
913 st_src_reg
914 glsl_to_tgsi_visitor::st_src_reg_for_int(int val)
915 {
916 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT);
917 union gl_constant_value uval;
918
919 assert(native_integers);
920
921 uval.i = val;
922 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle);
923
924 return src;
925 }
926
927 st_src_reg
928 glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val)
929 {
930 if (native_integers)
931 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) :
932 st_src_reg_for_int(val);
933 else
934 return st_src_reg_for_float(val);
935 }
936
937 static int
938 type_size(const struct glsl_type *type)
939 {
940 unsigned int i;
941 int size;
942
943 switch (type->base_type) {
944 case GLSL_TYPE_UINT:
945 case GLSL_TYPE_INT:
946 case GLSL_TYPE_FLOAT:
947 case GLSL_TYPE_BOOL:
948 if (type->is_matrix()) {
949 return type->matrix_columns;
950 } else {
951 /* Regardless of size of vector, it gets a vec4. This is bad
952 * packing for things like floats, but otherwise arrays become a
953 * mess. Hopefully a later pass over the code can pack scalars
954 * down if appropriate.
955 */
956 return 1;
957 }
958 case GLSL_TYPE_ARRAY:
959 assert(type->length > 0);
960 return type_size(type->fields.array) * type->length;
961 case GLSL_TYPE_STRUCT:
962 size = 0;
963 for (i = 0; i < type->length; i++) {
964 size += type_size(type->fields.structure[i].type);
965 }
966 return size;
967 case GLSL_TYPE_SAMPLER:
968 /* Samplers take up one slot in UNIFORMS[], but they're baked in
969 * at link time.
970 */
971 return 1;
972 case GLSL_TYPE_INTERFACE:
973 case GLSL_TYPE_VOID:
974 case GLSL_TYPE_ERROR:
975 assert(!"Invalid type in type_size");
976 break;
977 }
978 return 0;
979 }
980
981 /**
982 * In the initial pass of codegen, we assign temporary numbers to
983 * intermediate results. (not SSA -- variable assignments will reuse
984 * storage).
985 */
986 st_src_reg
987 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
988 {
989 st_src_reg src;
990
991 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT;
992 src.reladdr = NULL;
993 src.negate = 0;
994
995 if (!options->EmitNoIndirectTemp &&
996 (type->is_array() || type->is_matrix())) {
997
998 src.file = PROGRAM_ARRAY;
999 src.index = next_array << 16 | 0x8000;
1000 array_sizes[next_array] = type_size(type);
1001 ++next_array;
1002
1003 } else {
1004 src.file = PROGRAM_TEMPORARY;
1005 src.index = next_temp;
1006 next_temp += type_size(type);
1007 }
1008
1009 if (type->is_array() || type->is_record()) {
1010 src.swizzle = SWIZZLE_NOOP;
1011 } else {
1012 src.swizzle = swizzle_for_size(type->vector_elements);
1013 }
1014
1015 return src;
1016 }
1017
1018 variable_storage *
1019 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
1020 {
1021
1022 variable_storage *entry;
1023
1024 foreach_iter(exec_list_iterator, iter, this->variables) {
1025 entry = (variable_storage *)iter.get();
1026
1027 if (entry->var == var)
1028 return entry;
1029 }
1030
1031 return NULL;
1032 }
1033
1034 void
1035 glsl_to_tgsi_visitor::visit(ir_variable *ir)
1036 {
1037 if (strcmp(ir->name, "gl_FragCoord") == 0) {
1038 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
1039
1040 fp->OriginUpperLeft = ir->origin_upper_left;
1041 fp->PixelCenterInteger = ir->pixel_center_integer;
1042 }
1043
1044 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
1045 unsigned int i;
1046 const ir_state_slot *const slots = ir->state_slots;
1047 assert(ir->state_slots != NULL);
1048
1049 /* Check if this statevar's setup in the STATE file exactly
1050 * matches how we'll want to reference it as a
1051 * struct/array/whatever. If not, then we need to move it into
1052 * temporary storage and hope that it'll get copy-propagated
1053 * out.
1054 */
1055 for (i = 0; i < ir->num_state_slots; i++) {
1056 if (slots[i].swizzle != SWIZZLE_XYZW) {
1057 break;
1058 }
1059 }
1060
1061 variable_storage *storage;
1062 st_dst_reg dst;
1063 if (i == ir->num_state_slots) {
1064 /* We'll set the index later. */
1065 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
1066 this->variables.push_tail(storage);
1067
1068 dst = undef_dst;
1069 } else {
1070 /* The variable_storage constructor allocates slots based on the size
1071 * of the type. However, this had better match the number of state
1072 * elements that we're going to copy into the new temporary.
1073 */
1074 assert((int) ir->num_state_slots == type_size(ir->type));
1075
1076 dst = st_dst_reg(get_temp(ir->type));
1077
1078 storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index);
1079
1080 this->variables.push_tail(storage);
1081 }
1082
1083
1084 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
1085 int index = _mesa_add_state_reference(this->prog->Parameters,
1086 (gl_state_index *)slots[i].tokens);
1087
1088 if (storage->file == PROGRAM_STATE_VAR) {
1089 if (storage->index == -1) {
1090 storage->index = index;
1091 } else {
1092 assert(index == storage->index + (int)i);
1093 }
1094 } else {
1095 /* We use GLSL_TYPE_FLOAT here regardless of the actual type of
1096 * the data being moved since MOV does not care about the type of
1097 * data it is moving, and we don't want to declare registers with
1098 * array or struct types.
1099 */
1100 st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT);
1101 src.swizzle = slots[i].swizzle;
1102 emit(ir, TGSI_OPCODE_MOV, dst, src);
1103 /* even a float takes up a whole vec4 reg in a struct/array. */
1104 dst.index++;
1105 }
1106 }
1107
1108 if (storage->file == PROGRAM_TEMPORARY &&
1109 dst.index != storage->index + (int) ir->num_state_slots) {
1110 fail_link(this->shader_program,
1111 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
1112 ir->name, dst.index - storage->index,
1113 type_size(ir->type));
1114 }
1115 }
1116 }
1117
1118 void
1119 glsl_to_tgsi_visitor::visit(ir_loop *ir)
1120 {
1121 ir_dereference_variable *counter = NULL;
1122
1123 if (ir->counter != NULL)
1124 counter = new(ir) ir_dereference_variable(ir->counter);
1125
1126 if (ir->from != NULL) {
1127 assert(ir->counter != NULL);
1128
1129 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
1130
1131 a->accept(this);
1132 delete a;
1133 }
1134
1135 emit(NULL, TGSI_OPCODE_BGNLOOP);
1136
1137 if (ir->to) {
1138 ir_expression *e =
1139 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
1140 counter, ir->to);
1141 ir_if *if_stmt = new(ir) ir_if(e);
1142
1143 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
1144
1145 if_stmt->then_instructions.push_tail(brk);
1146
1147 if_stmt->accept(this);
1148
1149 delete if_stmt;
1150 delete e;
1151 delete brk;
1152 }
1153
1154 visit_exec_list(&ir->body_instructions, this);
1155
1156 if (ir->increment) {
1157 ir_expression *e =
1158 new(ir) ir_expression(ir_binop_add, counter->type,
1159 counter, ir->increment);
1160
1161 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
1162
1163 a->accept(this);
1164 delete a;
1165 delete e;
1166 }
1167
1168 emit(NULL, TGSI_OPCODE_ENDLOOP);
1169 }
1170
1171 void
1172 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
1173 {
1174 switch (ir->mode) {
1175 case ir_loop_jump::jump_break:
1176 emit(NULL, TGSI_OPCODE_BRK);
1177 break;
1178 case ir_loop_jump::jump_continue:
1179 emit(NULL, TGSI_OPCODE_CONT);
1180 break;
1181 }
1182 }
1183
1184
1185 void
1186 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
1187 {
1188 assert(0);
1189 (void)ir;
1190 }
1191
1192 void
1193 glsl_to_tgsi_visitor::visit(ir_function *ir)
1194 {
1195 /* Ignore function bodies other than main() -- we shouldn't see calls to
1196 * them since they should all be inlined before we get to glsl_to_tgsi.
1197 */
1198 if (strcmp(ir->name, "main") == 0) {
1199 const ir_function_signature *sig;
1200 exec_list empty;
1201
1202 sig = ir->matching_signature(NULL, &empty);
1203
1204 assert(sig);
1205
1206 foreach_iter(exec_list_iterator, iter, sig->body) {
1207 ir_instruction *ir = (ir_instruction *)iter.get();
1208
1209 ir->accept(this);
1210 }
1211 }
1212 }
1213
1214 bool
1215 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
1216 {
1217 int nonmul_operand = 1 - mul_operand;
1218 st_src_reg a, b, c;
1219 st_dst_reg result_dst;
1220
1221 ir_expression *expr = ir->operands[mul_operand]->as_expression();
1222 if (!expr || expr->operation != ir_binop_mul)
1223 return false;
1224
1225 expr->operands[0]->accept(this);
1226 a = this->result;
1227 expr->operands[1]->accept(this);
1228 b = this->result;
1229 ir->operands[nonmul_operand]->accept(this);
1230 c = this->result;
1231
1232 this->result = get_temp(ir->type);
1233 result_dst = st_dst_reg(this->result);
1234 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1235 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c);
1236
1237 return true;
1238 }
1239
1240 /**
1241 * Emit MAD(a, -b, a) instead of AND(a, NOT(b))
1242 *
1243 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
1244 * implemented using multiplication, and logical-or is implemented using
1245 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
1246 * As result, the logical expression (a & !b) can be rewritten as:
1247 *
1248 * - a * !b
1249 * - a * (1 - b)
1250 * - (a * 1) - (a * b)
1251 * - a + -(a * b)
1252 * - a + (a * -b)
1253 *
1254 * This final expression can be implemented as a single MAD(a, -b, a)
1255 * instruction.
1256 */
1257 bool
1258 glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
1259 {
1260 const int other_operand = 1 - try_operand;
1261 st_src_reg a, b;
1262
1263 ir_expression *expr = ir->operands[try_operand]->as_expression();
1264 if (!expr || expr->operation != ir_unop_logic_not)
1265 return false;
1266
1267 ir->operands[other_operand]->accept(this);
1268 a = this->result;
1269 expr->operands[0]->accept(this);
1270 b = this->result;
1271
1272 b.negate = ~b.negate;
1273
1274 this->result = get_temp(ir->type);
1275 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a);
1276
1277 return true;
1278 }
1279
1280 bool
1281 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
1282 {
1283 /* Emit saturates in the vertex shader only if SM 3.0 is supported.
1284 */
1285 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1286 !st_context(this->ctx)->has_shader_model3) {
1287 return false;
1288 }
1289
1290 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1291 if (!sat_src)
1292 return false;
1293
1294 sat_src->accept(this);
1295 st_src_reg src = this->result;
1296
1297 /* If we generated an expression instruction into a temporary in
1298 * processing the saturate's operand, apply the saturate to that
1299 * instruction. Otherwise, generate a MOV to do the saturate.
1300 *
1301 * Note that we have to be careful to only do this optimization if
1302 * the instruction in question was what generated src->result. For
1303 * example, ir_dereference_array might generate a MUL instruction
1304 * to create the reladdr, and return us a src reg using that
1305 * reladdr. That MUL result is not the value we're trying to
1306 * saturate.
1307 */
1308 ir_expression *sat_src_expr = sat_src->as_expression();
1309 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
1310 sat_src_expr->operation == ir_binop_add ||
1311 sat_src_expr->operation == ir_binop_dot)) {
1312 glsl_to_tgsi_instruction *new_inst;
1313 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
1314 new_inst->saturate = true;
1315 } else {
1316 this->result = get_temp(ir->type);
1317 st_dst_reg result_dst = st_dst_reg(this->result);
1318 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1319 glsl_to_tgsi_instruction *inst;
1320 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src);
1321 inst->saturate = true;
1322 }
1323
1324 return true;
1325 }
1326
1327 void
1328 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1329 st_src_reg *reg, int *num_reladdr)
1330 {
1331 if (!reg->reladdr)
1332 return;
1333
1334 emit_arl(ir, address_reg, *reg->reladdr);
1335
1336 if (*num_reladdr != 1) {
1337 st_src_reg temp = get_temp(glsl_type::vec4_type);
1338
1339 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg);
1340 *reg = temp;
1341 }
1342
1343 (*num_reladdr)--;
1344 }
1345
1346 void
1347 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1348 {
1349 unsigned int operand;
1350 st_src_reg op[Elements(ir->operands)];
1351 st_src_reg result_src;
1352 st_dst_reg result_dst;
1353
1354 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c)
1355 */
1356 if (ir->operation == ir_binop_add) {
1357 if (try_emit_mad(ir, 1))
1358 return;
1359 if (try_emit_mad(ir, 0))
1360 return;
1361 }
1362
1363 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1364 */
1365 if (ir->operation == ir_binop_logic_and) {
1366 if (try_emit_mad_for_and_not(ir, 1))
1367 return;
1368 if (try_emit_mad_for_and_not(ir, 0))
1369 return;
1370 }
1371
1372 if (try_emit_sat(ir))
1373 return;
1374
1375 if (ir->operation == ir_quadop_vector)
1376 assert(!"ir_quadop_vector should have been lowered");
1377
1378 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1379 this->result.file = PROGRAM_UNDEFINED;
1380 ir->operands[operand]->accept(this);
1381 if (this->result.file == PROGRAM_UNDEFINED) {
1382 printf("Failed to get tree for expression operand:\n");
1383 ir->operands[operand]->print();
1384 printf("\n");
1385 exit(1);
1386 }
1387 op[operand] = this->result;
1388
1389 /* Matrix expression operands should have been broken down to vector
1390 * operations already.
1391 */
1392 assert(!ir->operands[operand]->type->is_matrix());
1393 }
1394
1395 int vector_elements = ir->operands[0]->type->vector_elements;
1396 if (ir->operands[1]) {
1397 vector_elements = MAX2(vector_elements,
1398 ir->operands[1]->type->vector_elements);
1399 }
1400
1401 this->result.file = PROGRAM_UNDEFINED;
1402
1403 /* Storage for our result. Ideally for an assignment we'd be using
1404 * the actual storage for the result here, instead.
1405 */
1406 result_src = get_temp(ir->type);
1407 /* convenience for the emit functions below. */
1408 result_dst = st_dst_reg(result_src);
1409 /* Limit writes to the channels that will be used by result_src later.
1410 * This does limit this temp's use as a temporary for multi-instruction
1411 * sequences.
1412 */
1413 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1414
1415 switch (ir->operation) {
1416 case ir_unop_logic_not:
1417 if (result_dst.type != GLSL_TYPE_FLOAT)
1418 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1419 else {
1420 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1421 * older GPUs implement SEQ using multiple instructions (i915 uses two
1422 * SGE instructions and a MUL instruction). Since our logic values are
1423 * 0.0 and 1.0, 1-x also implements !x.
1424 */
1425 op[0].negate = ~op[0].negate;
1426 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0));
1427 }
1428 break;
1429 case ir_unop_neg:
1430 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT)
1431 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1432 else {
1433 op[0].negate = ~op[0].negate;
1434 result_src = op[0];
1435 }
1436 break;
1437 case ir_unop_abs:
1438 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]);
1439 break;
1440 case ir_unop_sign:
1441 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]);
1442 break;
1443 case ir_unop_rcp:
1444 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]);
1445 break;
1446
1447 case ir_unop_exp2:
1448 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]);
1449 break;
1450 case ir_unop_exp:
1451 case ir_unop_log:
1452 assert(!"not reached: should be handled by ir_explog_to_explog2");
1453 break;
1454 case ir_unop_log2:
1455 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]);
1456 break;
1457 case ir_unop_sin:
1458 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1459 break;
1460 case ir_unop_cos:
1461 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1462 break;
1463 case ir_unop_sin_reduced:
1464 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]);
1465 break;
1466 case ir_unop_cos_reduced:
1467 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]);
1468 break;
1469
1470 case ir_unop_dFdx:
1471 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]);
1472 break;
1473 case ir_unop_dFdy:
1474 {
1475 /* The X component contains 1 or -1 depending on whether the framebuffer
1476 * is a FBO or the window system buffer, respectively.
1477 * It is then multiplied with the source operand of DDY.
1478 */
1479 static const gl_state_index transform_y_state[STATE_LENGTH]
1480 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM };
1481
1482 unsigned transform_y_index =
1483 _mesa_add_state_reference(this->prog->Parameters,
1484 transform_y_state);
1485
1486 st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR,
1487 transform_y_index,
1488 glsl_type::vec4_type);
1489 transform_y.swizzle = SWIZZLE_XXXX;
1490
1491 st_src_reg temp = get_temp(glsl_type::vec4_type);
1492
1493 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]);
1494 emit(ir, TGSI_OPCODE_DDY, result_dst, temp);
1495 break;
1496 }
1497
1498 case ir_unop_noise: {
1499 /* At some point, a motivated person could add a better
1500 * implementation of noise. Currently not even the nvidia
1501 * binary drivers do anything more than this. In any case, the
1502 * place to do this is in the GL state tracker, not the poor
1503 * driver.
1504 */
1505 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5));
1506 break;
1507 }
1508
1509 case ir_binop_add:
1510 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1511 break;
1512 case ir_binop_sub:
1513 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
1514 break;
1515
1516 case ir_binop_mul:
1517 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1518 break;
1519 case ir_binop_div:
1520 if (result_dst.type == GLSL_TYPE_FLOAT)
1521 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1522 else
1523 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]);
1524 break;
1525 case ir_binop_mod:
1526 if (result_dst.type == GLSL_TYPE_FLOAT)
1527 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1528 else
1529 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]);
1530 break;
1531
1532 case ir_binop_less:
1533 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]);
1534 break;
1535 case ir_binop_greater:
1536 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]);
1537 break;
1538 case ir_binop_lequal:
1539 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]);
1540 break;
1541 case ir_binop_gequal:
1542 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]);
1543 break;
1544 case ir_binop_equal:
1545 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1546 break;
1547 case ir_binop_nequal:
1548 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1549 break;
1550 case ir_binop_all_equal:
1551 /* "==" operator producing a scalar boolean. */
1552 if (ir->operands[0]->type->is_vector() ||
1553 ir->operands[1]->type->is_vector()) {
1554 st_src_reg temp = get_temp(native_integers ?
1555 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1556 glsl_type::vec4_type);
1557
1558 if (native_integers) {
1559 st_dst_reg temp_dst = st_dst_reg(temp);
1560 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1561
1562 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]);
1563
1564 /* Emit 1-3 AND operations to combine the SEQ results. */
1565 switch (ir->operands[0]->type->vector_elements) {
1566 case 2:
1567 break;
1568 case 3:
1569 temp_dst.writemask = WRITEMASK_Y;
1570 temp1.swizzle = SWIZZLE_YYYY;
1571 temp2.swizzle = SWIZZLE_ZZZZ;
1572 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1573 break;
1574 case 4:
1575 temp_dst.writemask = WRITEMASK_X;
1576 temp1.swizzle = SWIZZLE_XXXX;
1577 temp2.swizzle = SWIZZLE_YYYY;
1578 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1579 temp_dst.writemask = WRITEMASK_Y;
1580 temp1.swizzle = SWIZZLE_ZZZZ;
1581 temp2.swizzle = SWIZZLE_WWWW;
1582 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2);
1583 }
1584
1585 temp1.swizzle = SWIZZLE_XXXX;
1586 temp2.swizzle = SWIZZLE_YYYY;
1587 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2);
1588 } else {
1589 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1590
1591 /* After the dot-product, the value will be an integer on the
1592 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1593 */
1594 emit_dp(ir, result_dst, temp, temp, vector_elements);
1595
1596 /* Negating the result of the dot-product gives values on the range
1597 * [-4, 0]. Zero becomes 1.0, and negative values become zero.
1598 * This is achieved using SGE.
1599 */
1600 st_src_reg sge_src = result_src;
1601 sge_src.negate = ~sge_src.negate;
1602 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0));
1603 }
1604 } else {
1605 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]);
1606 }
1607 break;
1608 case ir_binop_any_nequal:
1609 /* "!=" operator producing a scalar boolean. */
1610 if (ir->operands[0]->type->is_vector() ||
1611 ir->operands[1]->type->is_vector()) {
1612 st_src_reg temp = get_temp(native_integers ?
1613 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) :
1614 glsl_type::vec4_type);
1615 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1616
1617 if (native_integers) {
1618 st_dst_reg temp_dst = st_dst_reg(temp);
1619 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp);
1620
1621 /* Emit 1-3 OR operations to combine the SNE results. */
1622 switch (ir->operands[0]->type->vector_elements) {
1623 case 2:
1624 break;
1625 case 3:
1626 temp_dst.writemask = WRITEMASK_Y;
1627 temp1.swizzle = SWIZZLE_YYYY;
1628 temp2.swizzle = SWIZZLE_ZZZZ;
1629 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1630 break;
1631 case 4:
1632 temp_dst.writemask = WRITEMASK_X;
1633 temp1.swizzle = SWIZZLE_XXXX;
1634 temp2.swizzle = SWIZZLE_YYYY;
1635 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1636 temp_dst.writemask = WRITEMASK_Y;
1637 temp1.swizzle = SWIZZLE_ZZZZ;
1638 temp2.swizzle = SWIZZLE_WWWW;
1639 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2);
1640 }
1641
1642 temp1.swizzle = SWIZZLE_XXXX;
1643 temp2.swizzle = SWIZZLE_YYYY;
1644 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2);
1645 } else {
1646 /* After the dot-product, the value will be an integer on the
1647 * range [0,4]. Zero stays zero, and positive values become 1.0.
1648 */
1649 glsl_to_tgsi_instruction *const dp =
1650 emit_dp(ir, result_dst, temp, temp, vector_elements);
1651 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1652 /* The clamping to [0,1] can be done for free in the fragment
1653 * shader with a saturate.
1654 */
1655 dp->saturate = true;
1656 } else {
1657 /* Negating the result of the dot-product gives values on the range
1658 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1659 * achieved using SLT.
1660 */
1661 st_src_reg slt_src = result_src;
1662 slt_src.negate = ~slt_src.negate;
1663 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1664 }
1665 }
1666 } else {
1667 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1668 }
1669 break;
1670
1671 case ir_unop_any: {
1672 assert(ir->operands[0]->type->is_vector());
1673
1674 /* After the dot-product, the value will be an integer on the
1675 * range [0,4]. Zero stays zero, and positive values become 1.0.
1676 */
1677 glsl_to_tgsi_instruction *const dp =
1678 emit_dp(ir, result_dst, op[0], op[0],
1679 ir->operands[0]->type->vector_elements);
1680 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
1681 result_dst.type == GLSL_TYPE_FLOAT) {
1682 /* The clamping to [0,1] can be done for free in the fragment
1683 * shader with a saturate.
1684 */
1685 dp->saturate = true;
1686 } else if (result_dst.type == GLSL_TYPE_FLOAT) {
1687 /* Negating the result of the dot-product gives values on the range
1688 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1689 * is achieved using SLT.
1690 */
1691 st_src_reg slt_src = result_src;
1692 slt_src.negate = ~slt_src.negate;
1693 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1694 }
1695 else {
1696 /* Use SNE 0 if integers are being used as boolean values. */
1697 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0));
1698 }
1699 break;
1700 }
1701
1702 case ir_binop_logic_xor:
1703 if (native_integers)
1704 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1705 else
1706 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]);
1707 break;
1708
1709 case ir_binop_logic_or: {
1710 if (native_integers) {
1711 /* If integers are used as booleans, we can use an actual "or"
1712 * instruction.
1713 */
1714 assert(native_integers);
1715 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1716 } else {
1717 /* After the addition, the value will be an integer on the
1718 * range [0,2]. Zero stays zero, and positive values become 1.0.
1719 */
1720 glsl_to_tgsi_instruction *add =
1721 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
1722 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1723 /* The clamping to [0,1] can be done for free in the fragment
1724 * shader with a saturate if floats are being used as boolean values.
1725 */
1726 add->saturate = true;
1727 } else {
1728 /* Negating the result of the addition gives values on the range
1729 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1730 * is achieved using SLT.
1731 */
1732 st_src_reg slt_src = result_src;
1733 slt_src.negate = ~slt_src.negate;
1734 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0));
1735 }
1736 }
1737 break;
1738 }
1739
1740 case ir_binop_logic_and:
1741 /* If native integers are disabled, the bool args are stored as float 0.0
1742 * or 1.0, so "mul" gives us "and". If they're enabled, just use the
1743 * actual AND opcode.
1744 */
1745 if (native_integers)
1746 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1747 else
1748 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]);
1749 break;
1750
1751 case ir_binop_dot:
1752 assert(ir->operands[0]->type->is_vector());
1753 assert(ir->operands[0]->type == ir->operands[1]->type);
1754 emit_dp(ir, result_dst, op[0], op[1],
1755 ir->operands[0]->type->vector_elements);
1756 break;
1757
1758 case ir_unop_sqrt:
1759 if (have_sqrt) {
1760 emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]);
1761 }
1762 else {
1763 /* sqrt(x) = x * rsq(x). */
1764 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1765 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]);
1766 /* For incoming channels <= 0, set the result to 0. */
1767 op[0].negate = ~op[0].negate;
1768 emit(ir, TGSI_OPCODE_CMP, result_dst,
1769 op[0], result_src, st_src_reg_for_float(0.0));
1770 }
1771 break;
1772 case ir_unop_rsq:
1773 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]);
1774 break;
1775 case ir_unop_i2f:
1776 if (native_integers) {
1777 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]);
1778 break;
1779 }
1780 /* fallthrough to next case otherwise */
1781 case ir_unop_b2f:
1782 if (native_integers) {
1783 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0));
1784 break;
1785 }
1786 /* fallthrough to next case otherwise */
1787 case ir_unop_i2u:
1788 case ir_unop_u2i:
1789 /* Converting between signed and unsigned integers is a no-op. */
1790 result_src = op[0];
1791 break;
1792 case ir_unop_b2i:
1793 if (native_integers) {
1794 /* Booleans are stored as integers using ~0 for true and 0 for false.
1795 * GLSL requires that int(bool) return 1 for true and 0 for false.
1796 * This conversion is done with AND, but it could be done with NEG.
1797 */
1798 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1));
1799 } else {
1800 /* Booleans and integers are both stored as floats when native
1801 * integers are disabled.
1802 */
1803 result_src = op[0];
1804 }
1805 break;
1806 case ir_unop_f2i:
1807 if (native_integers)
1808 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]);
1809 else
1810 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1811 break;
1812 case ir_unop_f2u:
1813 if (native_integers)
1814 emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]);
1815 else
1816 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1817 break;
1818 case ir_unop_bitcast_f2i:
1819 result_src = op[0];
1820 result_src.type = GLSL_TYPE_INT;
1821 break;
1822 case ir_unop_bitcast_f2u:
1823 result_src = op[0];
1824 result_src.type = GLSL_TYPE_UINT;
1825 break;
1826 case ir_unop_bitcast_i2f:
1827 case ir_unop_bitcast_u2f:
1828 result_src = op[0];
1829 result_src.type = GLSL_TYPE_FLOAT;
1830 break;
1831 case ir_unop_f2b:
1832 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1833 break;
1834 case ir_unop_i2b:
1835 if (native_integers)
1836 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]);
1837 else
1838 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0));
1839 break;
1840 case ir_unop_trunc:
1841 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]);
1842 break;
1843 case ir_unop_ceil:
1844 emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]);
1845 break;
1846 case ir_unop_floor:
1847 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]);
1848 break;
1849 case ir_unop_round_even:
1850 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]);
1851 break;
1852 case ir_unop_fract:
1853 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]);
1854 break;
1855
1856 case ir_binop_min:
1857 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]);
1858 break;
1859 case ir_binop_max:
1860 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]);
1861 break;
1862 case ir_binop_pow:
1863 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]);
1864 break;
1865
1866 case ir_unop_bit_not:
1867 if (native_integers) {
1868 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]);
1869 break;
1870 }
1871 case ir_unop_u2f:
1872 if (native_integers) {
1873 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]);
1874 break;
1875 }
1876 case ir_binop_lshift:
1877 if (native_integers) {
1878 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]);
1879 break;
1880 }
1881 case ir_binop_rshift:
1882 if (native_integers) {
1883 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]);
1884 break;
1885 }
1886 case ir_binop_bit_and:
1887 if (native_integers) {
1888 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]);
1889 break;
1890 }
1891 case ir_binop_bit_xor:
1892 if (native_integers) {
1893 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]);
1894 break;
1895 }
1896 case ir_binop_bit_or:
1897 if (native_integers) {
1898 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]);
1899 break;
1900 }
1901
1902 assert(!"GLSL 1.30 features unsupported");
1903 break;
1904
1905 case ir_binop_ubo_load: {
1906 ir_constant *uniform_block = ir->operands[0]->as_constant();
1907 ir_constant *const_offset_ir = ir->operands[1]->as_constant();
1908 unsigned const_offset = const_offset_ir ? const_offset_ir->value.u[0] : 0;
1909 st_src_reg index_reg = get_temp(glsl_type::uint_type);
1910 st_src_reg cbuf;
1911
1912 cbuf.type = glsl_type::vec4_type->base_type;
1913 cbuf.file = PROGRAM_CONSTANT;
1914 cbuf.index = 0;
1915 cbuf.index2D = uniform_block->value.u[0] + 1;
1916 cbuf.reladdr = NULL;
1917 cbuf.negate = 0;
1918
1919 assert(ir->type->is_vector() || ir->type->is_scalar());
1920
1921 if (const_offset_ir) {
1922 index_reg = st_src_reg_for_int(const_offset / 16);
1923 } else {
1924 emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4));
1925 }
1926
1927 cbuf.swizzle = swizzle_for_size(ir->type->vector_elements);
1928 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4,
1929 const_offset % 16 / 4,
1930 const_offset % 16 / 4,
1931 const_offset % 16 / 4);
1932
1933 cbuf.reladdr = ralloc(mem_ctx, st_src_reg);
1934 memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg));
1935
1936 if (ir->type->base_type == GLSL_TYPE_BOOL) {
1937 emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0));
1938 } else {
1939 emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf);
1940 }
1941 break;
1942 }
1943 case ir_triop_lrp:
1944 /* note: we have to reorder the three args here */
1945 emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]);
1946 break;
1947 case ir_triop_csel:
1948 if (this->ctx->Const.NativeIntegers)
1949 emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]);
1950 else {
1951 op[0].negate = ~op[0].negate;
1952 emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]);
1953 }
1954 break;
1955 case ir_unop_pack_snorm_2x16:
1956 case ir_unop_pack_unorm_2x16:
1957 case ir_unop_pack_half_2x16:
1958 case ir_unop_pack_snorm_4x8:
1959 case ir_unop_pack_unorm_4x8:
1960 case ir_unop_unpack_snorm_2x16:
1961 case ir_unop_unpack_unorm_2x16:
1962 case ir_unop_unpack_half_2x16:
1963 case ir_unop_unpack_half_2x16_split_x:
1964 case ir_unop_unpack_half_2x16_split_y:
1965 case ir_unop_unpack_snorm_4x8:
1966 case ir_unop_unpack_unorm_4x8:
1967 case ir_binop_pack_half_2x16_split:
1968 case ir_unop_bitfield_reverse:
1969 case ir_unop_bit_count:
1970 case ir_unop_find_msb:
1971 case ir_unop_find_lsb:
1972 case ir_binop_bfm:
1973 case ir_triop_fma:
1974 case ir_triop_bfi:
1975 case ir_triop_bitfield_extract:
1976 case ir_quadop_bitfield_insert:
1977 case ir_quadop_vector:
1978 case ir_binop_vector_extract:
1979 case ir_triop_vector_insert:
1980 case ir_binop_ldexp:
1981 /* This operation is not supported, or should have already been handled.
1982 */
1983 assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()");
1984 break;
1985 }
1986
1987 this->result = result_src;
1988 }
1989
1990
1991 void
1992 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1993 {
1994 st_src_reg src;
1995 int i;
1996 int swizzle[4];
1997
1998 /* Note that this is only swizzles in expressions, not those on the left
1999 * hand side of an assignment, which do write masking. See ir_assignment
2000 * for that.
2001 */
2002
2003 ir->val->accept(this);
2004 src = this->result;
2005 assert(src.file != PROGRAM_UNDEFINED);
2006
2007 for (i = 0; i < 4; i++) {
2008 if (i < ir->type->vector_elements) {
2009 switch (i) {
2010 case 0:
2011 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
2012 break;
2013 case 1:
2014 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
2015 break;
2016 case 2:
2017 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
2018 break;
2019 case 3:
2020 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
2021 break;
2022 }
2023 } else {
2024 /* If the type is smaller than a vec4, replicate the last
2025 * channel out.
2026 */
2027 swizzle[i] = swizzle[ir->type->vector_elements - 1];
2028 }
2029 }
2030
2031 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
2032
2033 this->result = src;
2034 }
2035
2036 void
2037 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
2038 {
2039 variable_storage *entry = find_variable_storage(ir->var);
2040 ir_variable *var = ir->var;
2041
2042 if (!entry) {
2043 switch (var->mode) {
2044 case ir_var_uniform:
2045 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
2046 var->location);
2047 this->variables.push_tail(entry);
2048 break;
2049 case ir_var_shader_in:
2050 /* The linker assigns locations for varyings and attributes,
2051 * including deprecated builtins (like gl_Color), user-assign
2052 * generic attributes (glBindVertexLocation), and
2053 * user-defined varyings.
2054 */
2055 assert(var->location != -1);
2056 entry = new(mem_ctx) variable_storage(var,
2057 PROGRAM_INPUT,
2058 var->location);
2059 break;
2060 case ir_var_shader_out:
2061 assert(var->location != -1);
2062 entry = new(mem_ctx) variable_storage(var,
2063 PROGRAM_OUTPUT,
2064 var->location + var->index);
2065 break;
2066 case ir_var_system_value:
2067 entry = new(mem_ctx) variable_storage(var,
2068 PROGRAM_SYSTEM_VALUE,
2069 var->location);
2070 break;
2071 case ir_var_auto:
2072 case ir_var_temporary:
2073 st_src_reg src = get_temp(var->type);
2074
2075 entry = new(mem_ctx) variable_storage(var, src.file, src.index);
2076 this->variables.push_tail(entry);
2077
2078 break;
2079 }
2080
2081 if (!entry) {
2082 printf("Failed to make storage for %s\n", var->name);
2083 exit(1);
2084 }
2085 }
2086
2087 this->result = st_src_reg(entry->file, entry->index, var->type);
2088 if (!native_integers)
2089 this->result.type = GLSL_TYPE_FLOAT;
2090 }
2091
2092 void
2093 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
2094 {
2095 ir_constant *index;
2096 st_src_reg src;
2097 int element_size = type_size(ir->type);
2098
2099 index = ir->array_index->constant_expression_value();
2100
2101 ir->array->accept(this);
2102 src = this->result;
2103
2104 if (index) {
2105 src.index += index->value.i[0] * element_size;
2106 } else {
2107 /* Variable index array dereference. It eats the "vec4" of the
2108 * base of the array and an index that offsets the TGSI register
2109 * index.
2110 */
2111 ir->array_index->accept(this);
2112
2113 st_src_reg index_reg;
2114
2115 if (element_size == 1) {
2116 index_reg = this->result;
2117 } else {
2118 index_reg = get_temp(native_integers ?
2119 glsl_type::int_type : glsl_type::float_type);
2120
2121 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2122 this->result, st_src_reg_for_type(index_reg.type, element_size));
2123 }
2124
2125 /* If there was already a relative address register involved, add the
2126 * new and the old together to get the new offset.
2127 */
2128 if (src.reladdr != NULL) {
2129 st_src_reg accum_reg = get_temp(native_integers ?
2130 glsl_type::int_type : glsl_type::float_type);
2131
2132 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg),
2133 index_reg, *src.reladdr);
2134
2135 index_reg = accum_reg;
2136 }
2137
2138 src.reladdr = ralloc(mem_ctx, st_src_reg);
2139 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
2140 }
2141
2142 /* If the type is smaller than a vec4, replicate the last channel out. */
2143 if (ir->type->is_scalar() || ir->type->is_vector())
2144 src.swizzle = swizzle_for_size(ir->type->vector_elements);
2145 else
2146 src.swizzle = SWIZZLE_NOOP;
2147
2148 /* Change the register type to the element type of the array. */
2149 src.type = ir->type->base_type;
2150
2151 this->result = src;
2152 }
2153
2154 void
2155 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
2156 {
2157 unsigned int i;
2158 const glsl_type *struct_type = ir->record->type;
2159 int offset = 0;
2160
2161 ir->record->accept(this);
2162
2163 for (i = 0; i < struct_type->length; i++) {
2164 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
2165 break;
2166 offset += type_size(struct_type->fields.structure[i].type);
2167 }
2168
2169 /* If the type is smaller than a vec4, replicate the last channel out. */
2170 if (ir->type->is_scalar() || ir->type->is_vector())
2171 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
2172 else
2173 this->result.swizzle = SWIZZLE_NOOP;
2174
2175 this->result.index += offset;
2176 this->result.type = ir->type->base_type;
2177 }
2178
2179 /**
2180 * We want to be careful in assignment setup to hit the actual storage
2181 * instead of potentially using a temporary like we might with the
2182 * ir_dereference handler.
2183 */
2184 static st_dst_reg
2185 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
2186 {
2187 /* The LHS must be a dereference. If the LHS is a variable indexed array
2188 * access of a vector, it must be separated into a series conditional moves
2189 * before reaching this point (see ir_vec_index_to_cond_assign).
2190 */
2191 assert(ir->as_dereference());
2192 ir_dereference_array *deref_array = ir->as_dereference_array();
2193 if (deref_array) {
2194 assert(!deref_array->array->type->is_vector());
2195 }
2196
2197 /* Use the rvalue deref handler for the most part. We'll ignore
2198 * swizzles in it and write swizzles using writemask, though.
2199 */
2200 ir->accept(v);
2201 return st_dst_reg(v->result);
2202 }
2203
2204 /**
2205 * Process the condition of a conditional assignment
2206 *
2207 * Examines the condition of a conditional assignment to generate the optimal
2208 * first operand of a \c CMP instruction. If the condition is a relational
2209 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
2210 * used as the source for the \c CMP instruction. Otherwise the comparison
2211 * is processed to a boolean result, and the boolean result is used as the
2212 * operand to the CMP instruction.
2213 */
2214 bool
2215 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
2216 {
2217 ir_rvalue *src_ir = ir;
2218 bool negate = true;
2219 bool switch_order = false;
2220
2221 ir_expression *const expr = ir->as_expression();
2222 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
2223 bool zero_on_left = false;
2224
2225 if (expr->operands[0]->is_zero()) {
2226 src_ir = expr->operands[1];
2227 zero_on_left = true;
2228 } else if (expr->operands[1]->is_zero()) {
2229 src_ir = expr->operands[0];
2230 zero_on_left = false;
2231 }
2232
2233 /* a is - 0 + - 0 +
2234 * (a < 0) T F F ( a < 0) T F F
2235 * (0 < a) F F T (-a < 0) F F T
2236 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
2237 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
2238 * (a > 0) F F T (-a < 0) F F T
2239 * (0 > a) T F F ( a < 0) T F F
2240 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
2241 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
2242 *
2243 * Note that exchanging the order of 0 and 'a' in the comparison simply
2244 * means that the value of 'a' should be negated.
2245 */
2246 if (src_ir != ir) {
2247 switch (expr->operation) {
2248 case ir_binop_less:
2249 switch_order = false;
2250 negate = zero_on_left;
2251 break;
2252
2253 case ir_binop_greater:
2254 switch_order = false;
2255 negate = !zero_on_left;
2256 break;
2257
2258 case ir_binop_lequal:
2259 switch_order = true;
2260 negate = !zero_on_left;
2261 break;
2262
2263 case ir_binop_gequal:
2264 switch_order = true;
2265 negate = zero_on_left;
2266 break;
2267
2268 default:
2269 /* This isn't the right kind of comparison afterall, so make sure
2270 * the whole condition is visited.
2271 */
2272 src_ir = ir;
2273 break;
2274 }
2275 }
2276 }
2277
2278 src_ir->accept(this);
2279
2280 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
2281 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
2282 * choose which value TGSI_OPCODE_CMP produces without an extra instruction
2283 * computing the condition.
2284 */
2285 if (negate)
2286 this->result.negate = ~this->result.negate;
2287
2288 return switch_order;
2289 }
2290
2291 void
2292 glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type,
2293 st_dst_reg *l, st_src_reg *r)
2294 {
2295 if (type->base_type == GLSL_TYPE_STRUCT) {
2296 for (unsigned int i = 0; i < type->length; i++) {
2297 emit_block_mov(ir, type->fields.structure[i].type, l, r);
2298 }
2299 return;
2300 }
2301
2302 if (type->is_array()) {
2303 for (unsigned int i = 0; i < type->length; i++) {
2304 emit_block_mov(ir, type->fields.array, l, r);
2305 }
2306 return;
2307 }
2308
2309 if (type->is_matrix()) {
2310 const struct glsl_type *vec_type;
2311
2312 vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT,
2313 type->vector_elements, 1);
2314
2315 for (int i = 0; i < type->matrix_columns; i++) {
2316 emit_block_mov(ir, vec_type, l, r);
2317 }
2318 return;
2319 }
2320
2321 assert(type->is_scalar() || type->is_vector());
2322
2323 r->type = type->base_type;
2324 emit(ir, TGSI_OPCODE_MOV, *l, *r);
2325 l->index++;
2326 r->index++;
2327 }
2328
2329 void
2330 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
2331 {
2332 st_dst_reg l;
2333 st_src_reg r;
2334 int i;
2335
2336 ir->rhs->accept(this);
2337 r = this->result;
2338
2339 l = get_assignment_lhs(ir->lhs, this);
2340
2341 /* FINISHME: This should really set to the correct maximal writemask for each
2342 * FINISHME: component written (in the loops below). This case can only
2343 * FINISHME: occur for matrices, arrays, and structures.
2344 */
2345 if (ir->write_mask == 0) {
2346 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
2347 l.writemask = WRITEMASK_XYZW;
2348 } else if (ir->lhs->type->is_scalar() &&
2349 ir->lhs->variable_referenced()->mode == ir_var_shader_out) {
2350 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
2351 * FINISHME: W component of fragment shader output zero, work correctly.
2352 */
2353 l.writemask = WRITEMASK_XYZW;
2354 } else {
2355 int swizzles[4];
2356 int first_enabled_chan = 0;
2357 int rhs_chan = 0;
2358
2359 l.writemask = ir->write_mask;
2360
2361 for (int i = 0; i < 4; i++) {
2362 if (l.writemask & (1 << i)) {
2363 first_enabled_chan = GET_SWZ(r.swizzle, i);
2364 break;
2365 }
2366 }
2367
2368 /* Swizzle a small RHS vector into the channels being written.
2369 *
2370 * glsl ir treats write_mask as dictating how many channels are
2371 * present on the RHS while TGSI treats write_mask as just
2372 * showing which channels of the vec4 RHS get written.
2373 */
2374 for (int i = 0; i < 4; i++) {
2375 if (l.writemask & (1 << i))
2376 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
2377 else
2378 swizzles[i] = first_enabled_chan;
2379 }
2380 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
2381 swizzles[2], swizzles[3]);
2382 }
2383
2384 assert(l.file != PROGRAM_UNDEFINED);
2385 assert(r.file != PROGRAM_UNDEFINED);
2386
2387 if (ir->condition) {
2388 const bool switch_order = this->process_move_condition(ir->condition);
2389 st_src_reg condition = this->result;
2390
2391 for (i = 0; i < type_size(ir->lhs->type); i++) {
2392 st_src_reg l_src = st_src_reg(l);
2393 st_src_reg condition_temp = condition;
2394 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements);
2395
2396 if (native_integers) {
2397 /* This is necessary because TGSI's CMP instruction expects the
2398 * condition to be a float, and we store booleans as integers.
2399 * TODO: really want to avoid i2f path and use UCMP. Requires
2400 * changes to process_move_condition though too.
2401 */
2402 condition_temp = get_temp(glsl_type::vec4_type);
2403 condition.negate = 0;
2404 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition);
2405 condition_temp.swizzle = condition.swizzle;
2406 }
2407
2408 if (switch_order) {
2409 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r);
2410 } else {
2411 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src);
2412 }
2413
2414 l.index++;
2415 r.index++;
2416 }
2417 } else if (ir->rhs->as_expression() &&
2418 this->instructions.get_tail() &&
2419 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir &&
2420 type_size(ir->lhs->type) == 1 &&
2421 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) {
2422 /* To avoid emitting an extra MOV when assigning an expression to a
2423 * variable, emit the last instruction of the expression again, but
2424 * replace the destination register with the target of the assignment.
2425 * Dead code elimination will remove the original instruction.
2426 */
2427 glsl_to_tgsi_instruction *inst, *new_inst;
2428 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2429 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]);
2430 new_inst->saturate = inst->saturate;
2431 inst->dead_mask = inst->dst.writemask;
2432 } else {
2433 emit_block_mov(ir, ir->rhs->type, &l, &r);
2434 }
2435 }
2436
2437
2438 void
2439 glsl_to_tgsi_visitor::visit(ir_constant *ir)
2440 {
2441 st_src_reg src;
2442 GLfloat stack_vals[4] = { 0 };
2443 gl_constant_value *values = (gl_constant_value *) stack_vals;
2444 GLenum gl_type = GL_NONE;
2445 unsigned int i;
2446 static int in_array = 0;
2447 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE;
2448
2449 /* Unfortunately, 4 floats is all we can get into
2450 * _mesa_add_typed_unnamed_constant. So, make a temp to store an
2451 * aggregate constant and move each constant value into it. If we
2452 * get lucky, copy propagation will eliminate the extra moves.
2453 */
2454 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
2455 st_src_reg temp_base = get_temp(ir->type);
2456 st_dst_reg temp = st_dst_reg(temp_base);
2457
2458 foreach_iter(exec_list_iterator, iter, ir->components) {
2459 ir_constant *field_value = (ir_constant *)iter.get();
2460 int size = type_size(field_value->type);
2461
2462 assert(size > 0);
2463
2464 field_value->accept(this);
2465 src = this->result;
2466
2467 for (i = 0; i < (unsigned int)size; i++) {
2468 emit(ir, TGSI_OPCODE_MOV, temp, src);
2469
2470 src.index++;
2471 temp.index++;
2472 }
2473 }
2474 this->result = temp_base;
2475 return;
2476 }
2477
2478 if (ir->type->is_array()) {
2479 st_src_reg temp_base = get_temp(ir->type);
2480 st_dst_reg temp = st_dst_reg(temp_base);
2481 int size = type_size(ir->type->fields.array);
2482
2483 assert(size > 0);
2484 in_array++;
2485
2486 for (i = 0; i < ir->type->length; i++) {
2487 ir->array_elements[i]->accept(this);
2488 src = this->result;
2489 for (int j = 0; j < size; j++) {
2490 emit(ir, TGSI_OPCODE_MOV, temp, src);
2491
2492 src.index++;
2493 temp.index++;
2494 }
2495 }
2496 this->result = temp_base;
2497 in_array--;
2498 return;
2499 }
2500
2501 if (ir->type->is_matrix()) {
2502 st_src_reg mat = get_temp(ir->type);
2503 st_dst_reg mat_column = st_dst_reg(mat);
2504
2505 for (i = 0; i < ir->type->matrix_columns; i++) {
2506 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
2507 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements];
2508
2509 src = st_src_reg(file, -1, ir->type->base_type);
2510 src.index = add_constant(file,
2511 values,
2512 ir->type->vector_elements,
2513 GL_FLOAT,
2514 &src.swizzle);
2515 emit(ir, TGSI_OPCODE_MOV, mat_column, src);
2516
2517 mat_column.index++;
2518 }
2519
2520 this->result = mat;
2521 return;
2522 }
2523
2524 switch (ir->type->base_type) {
2525 case GLSL_TYPE_FLOAT:
2526 gl_type = GL_FLOAT;
2527 for (i = 0; i < ir->type->vector_elements; i++) {
2528 values[i].f = ir->value.f[i];
2529 }
2530 break;
2531 case GLSL_TYPE_UINT:
2532 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT;
2533 for (i = 0; i < ir->type->vector_elements; i++) {
2534 if (native_integers)
2535 values[i].u = ir->value.u[i];
2536 else
2537 values[i].f = ir->value.u[i];
2538 }
2539 break;
2540 case GLSL_TYPE_INT:
2541 gl_type = native_integers ? GL_INT : GL_FLOAT;
2542 for (i = 0; i < ir->type->vector_elements; i++) {
2543 if (native_integers)
2544 values[i].i = ir->value.i[i];
2545 else
2546 values[i].f = ir->value.i[i];
2547 }
2548 break;
2549 case GLSL_TYPE_BOOL:
2550 gl_type = native_integers ? GL_BOOL : GL_FLOAT;
2551 for (i = 0; i < ir->type->vector_elements; i++) {
2552 if (native_integers)
2553 values[i].u = ir->value.b[i] ? ~0 : 0;
2554 else
2555 values[i].f = ir->value.b[i];
2556 }
2557 break;
2558 default:
2559 assert(!"Non-float/uint/int/bool constant");
2560 }
2561
2562 this->result = st_src_reg(file, -1, ir->type);
2563 this->result.index = add_constant(file,
2564 values,
2565 ir->type->vector_elements,
2566 gl_type,
2567 &this->result.swizzle);
2568 }
2569
2570 function_entry *
2571 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
2572 {
2573 function_entry *entry;
2574
2575 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
2576 entry = (function_entry *)iter.get();
2577
2578 if (entry->sig == sig)
2579 return entry;
2580 }
2581
2582 entry = ralloc(mem_ctx, function_entry);
2583 entry->sig = sig;
2584 entry->sig_id = this->next_signature_id++;
2585 entry->bgn_inst = NULL;
2586
2587 /* Allocate storage for all the parameters. */
2588 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2589 ir_variable *param = (ir_variable *)iter.get();
2590 variable_storage *storage;
2591
2592 storage = find_variable_storage(param);
2593 assert(!storage);
2594
2595 st_src_reg src = get_temp(param->type);
2596
2597 storage = new(mem_ctx) variable_storage(param, src.file, src.index);
2598 this->variables.push_tail(storage);
2599 }
2600
2601 if (!sig->return_type->is_void()) {
2602 entry->return_reg = get_temp(sig->return_type);
2603 } else {
2604 entry->return_reg = undef_src;
2605 }
2606
2607 this->function_signatures.push_tail(entry);
2608 return entry;
2609 }
2610
2611 void
2612 glsl_to_tgsi_visitor::visit(ir_call *ir)
2613 {
2614 glsl_to_tgsi_instruction *call_inst;
2615 ir_function_signature *sig = ir->callee;
2616 function_entry *entry = get_function_signature(sig);
2617 int i;
2618
2619 /* Process in parameters. */
2620 exec_list_iterator sig_iter = sig->parameters.iterator();
2621 foreach_iter(exec_list_iterator, iter, *ir) {
2622 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2623 ir_variable *param = (ir_variable *)sig_iter.get();
2624
2625 if (param->mode == ir_var_function_in ||
2626 param->mode == ir_var_function_inout) {
2627 variable_storage *storage = find_variable_storage(param);
2628 assert(storage);
2629
2630 param_rval->accept(this);
2631 st_src_reg r = this->result;
2632
2633 st_dst_reg l;
2634 l.file = storage->file;
2635 l.index = storage->index;
2636 l.reladdr = NULL;
2637 l.writemask = WRITEMASK_XYZW;
2638 l.cond_mask = COND_TR;
2639
2640 for (i = 0; i < type_size(param->type); i++) {
2641 emit(ir, TGSI_OPCODE_MOV, l, r);
2642 l.index++;
2643 r.index++;
2644 }
2645 }
2646
2647 sig_iter.next();
2648 }
2649 assert(!sig_iter.has_next());
2650
2651 /* Emit call instruction */
2652 call_inst = emit(ir, TGSI_OPCODE_CAL);
2653 call_inst->function = entry;
2654
2655 /* Process out parameters. */
2656 sig_iter = sig->parameters.iterator();
2657 foreach_iter(exec_list_iterator, iter, *ir) {
2658 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2659 ir_variable *param = (ir_variable *)sig_iter.get();
2660
2661 if (param->mode == ir_var_function_out ||
2662 param->mode == ir_var_function_inout) {
2663 variable_storage *storage = find_variable_storage(param);
2664 assert(storage);
2665
2666 st_src_reg r;
2667 r.file = storage->file;
2668 r.index = storage->index;
2669 r.reladdr = NULL;
2670 r.swizzle = SWIZZLE_NOOP;
2671 r.negate = 0;
2672
2673 param_rval->accept(this);
2674 st_dst_reg l = st_dst_reg(this->result);
2675
2676 for (i = 0; i < type_size(param->type); i++) {
2677 emit(ir, TGSI_OPCODE_MOV, l, r);
2678 l.index++;
2679 r.index++;
2680 }
2681 }
2682
2683 sig_iter.next();
2684 }
2685 assert(!sig_iter.has_next());
2686
2687 /* Process return value. */
2688 this->result = entry->return_reg;
2689 }
2690
2691 void
2692 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2693 {
2694 st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy, offset, sample_index;
2695 st_dst_reg result_dst, coord_dst, cube_sc_dst;
2696 glsl_to_tgsi_instruction *inst = NULL;
2697 unsigned opcode = TGSI_OPCODE_NOP;
2698 const glsl_type *sampler_type = ir->sampler->type;
2699 bool is_cube_array = false;
2700
2701 /* if we are a cube array sampler */
2702 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
2703 sampler_type->sampler_array)) {
2704 is_cube_array = true;
2705 }
2706
2707 if (ir->coordinate) {
2708 ir->coordinate->accept(this);
2709
2710 /* Put our coords in a temp. We'll need to modify them for shadow,
2711 * projection, or LOD, so the only case we'd use it as is is if
2712 * we're doing plain old texturing. The optimization passes on
2713 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
2714 */
2715 coord = get_temp(glsl_type::vec4_type);
2716 coord_dst = st_dst_reg(coord);
2717 coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1;
2718 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2719 }
2720
2721 if (ir->projector) {
2722 ir->projector->accept(this);
2723 projector = this->result;
2724 }
2725
2726 /* Storage for our result. Ideally for an assignment we'd be using
2727 * the actual storage for the result here, instead.
2728 */
2729 result_src = get_temp(ir->type);
2730 result_dst = st_dst_reg(result_src);
2731
2732 switch (ir->op) {
2733 case ir_tex:
2734 opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX;
2735 if (ir->offset) {
2736 ir->offset->accept(this);
2737 offset = this->result;
2738 }
2739 break;
2740 case ir_txb:
2741 opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
2742 ir->lod_info.bias->accept(this);
2743 lod_info = this->result;
2744 if (ir->offset) {
2745 ir->offset->accept(this);
2746 offset = this->result;
2747 }
2748 break;
2749 case ir_txl:
2750 opcode = is_cube_array ? TGSI_OPCODE_TXL2 : TGSI_OPCODE_TXL;
2751 ir->lod_info.lod->accept(this);
2752 lod_info = this->result;
2753 if (ir->offset) {
2754 ir->offset->accept(this);
2755 offset = this->result;
2756 }
2757 break;
2758 case ir_txd:
2759 opcode = TGSI_OPCODE_TXD;
2760 ir->lod_info.grad.dPdx->accept(this);
2761 dx = this->result;
2762 ir->lod_info.grad.dPdy->accept(this);
2763 dy = this->result;
2764 if (ir->offset) {
2765 ir->offset->accept(this);
2766 offset = this->result;
2767 }
2768 break;
2769 case ir_txs:
2770 opcode = TGSI_OPCODE_TXQ;
2771 ir->lod_info.lod->accept(this);
2772 lod_info = this->result;
2773 break;
2774 case ir_txf:
2775 opcode = TGSI_OPCODE_TXF;
2776 ir->lod_info.lod->accept(this);
2777 lod_info = this->result;
2778 if (ir->offset) {
2779 ir->offset->accept(this);
2780 offset = this->result;
2781 }
2782 break;
2783 case ir_txf_ms:
2784 opcode = TGSI_OPCODE_TXF;
2785 ir->lod_info.sample_index->accept(this);
2786 sample_index = this->result;
2787 break;
2788 case ir_lod:
2789 assert(!"Unexpected ir_lod opcode");
2790 break;
2791 case ir_tg4:
2792 assert(!"Unexpected ir_tg4 opcode");
2793 break;
2794 case ir_query_levels:
2795 assert(!"Unexpected ir_query_levels opcode");
2796 break;
2797 }
2798
2799 if (ir->projector) {
2800 if (opcode == TGSI_OPCODE_TEX) {
2801 /* Slot the projector in as the last component of the coord. */
2802 coord_dst.writemask = WRITEMASK_W;
2803 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector);
2804 coord_dst.writemask = WRITEMASK_XYZW;
2805 opcode = TGSI_OPCODE_TXP;
2806 } else {
2807 st_src_reg coord_w = coord;
2808 coord_w.swizzle = SWIZZLE_WWWW;
2809
2810 /* For the other TEX opcodes there's no projective version
2811 * since the last slot is taken up by LOD info. Do the
2812 * projective divide now.
2813 */
2814 coord_dst.writemask = WRITEMASK_W;
2815 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector);
2816
2817 /* In the case where we have to project the coordinates "by hand,"
2818 * the shadow comparator value must also be projected.
2819 */
2820 st_src_reg tmp_src = coord;
2821 if (ir->shadow_comparitor) {
2822 /* Slot the shadow value in as the second to last component of the
2823 * coord.
2824 */
2825 ir->shadow_comparitor->accept(this);
2826
2827 tmp_src = get_temp(glsl_type::vec4_type);
2828 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2829
2830 /* Projective division not allowed for array samplers. */
2831 assert(!sampler_type->sampler_array);
2832
2833 tmp_dst.writemask = WRITEMASK_Z;
2834 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result);
2835
2836 tmp_dst.writemask = WRITEMASK_XY;
2837 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord);
2838 }
2839
2840 coord_dst.writemask = WRITEMASK_XYZ;
2841 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w);
2842
2843 coord_dst.writemask = WRITEMASK_XYZW;
2844 coord.swizzle = SWIZZLE_XYZW;
2845 }
2846 }
2847
2848 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow
2849 * comparator was put in the correct place (and projected) by the code,
2850 * above, that handles by-hand projection.
2851 */
2852 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) {
2853 /* Slot the shadow value in as the second to last component of the
2854 * coord.
2855 */
2856 ir->shadow_comparitor->accept(this);
2857
2858 if (is_cube_array) {
2859 cube_sc = get_temp(glsl_type::float_type);
2860 cube_sc_dst = st_dst_reg(cube_sc);
2861 cube_sc_dst.writemask = WRITEMASK_X;
2862 emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result);
2863 cube_sc_dst.writemask = WRITEMASK_X;
2864 }
2865 else {
2866 if ((sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2867 sampler_type->sampler_array) ||
2868 sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
2869 coord_dst.writemask = WRITEMASK_W;
2870 } else {
2871 coord_dst.writemask = WRITEMASK_Z;
2872 }
2873
2874 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result);
2875 coord_dst.writemask = WRITEMASK_XYZW;
2876 }
2877 }
2878
2879 if (ir->op == ir_txf_ms) {
2880 coord_dst.writemask = WRITEMASK_W;
2881 emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index);
2882 coord_dst.writemask = WRITEMASK_XYZW;
2883 } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB ||
2884 opcode == TGSI_OPCODE_TXF) {
2885 /* TGSI stores LOD or LOD bias in the last channel of the coords. */
2886 coord_dst.writemask = WRITEMASK_W;
2887 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info);
2888 coord_dst.writemask = WRITEMASK_XYZW;
2889 }
2890
2891 if (opcode == TGSI_OPCODE_TXD)
2892 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2893 else if (opcode == TGSI_OPCODE_TXQ)
2894 inst = emit(ir, opcode, result_dst, lod_info);
2895 else if (opcode == TGSI_OPCODE_TXF) {
2896 inst = emit(ir, opcode, result_dst, coord);
2897 } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
2898 inst = emit(ir, opcode, result_dst, coord, lod_info);
2899 } else if (opcode == TGSI_OPCODE_TEX2) {
2900 inst = emit(ir, opcode, result_dst, coord, cube_sc);
2901 } else
2902 inst = emit(ir, opcode, result_dst, coord);
2903
2904 if (ir->shadow_comparitor)
2905 inst->tex_shadow = GL_TRUE;
2906
2907 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2908 this->shader_program,
2909 this->prog);
2910
2911 if (ir->offset) {
2912 inst->tex_offset_num_offset = 1;
2913 inst->tex_offsets[0].Index = offset.index;
2914 inst->tex_offsets[0].File = offset.file;
2915 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0);
2916 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1);
2917 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2);
2918 }
2919
2920 switch (sampler_type->sampler_dimensionality) {
2921 case GLSL_SAMPLER_DIM_1D:
2922 inst->tex_target = (sampler_type->sampler_array)
2923 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2924 break;
2925 case GLSL_SAMPLER_DIM_2D:
2926 inst->tex_target = (sampler_type->sampler_array)
2927 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2928 break;
2929 case GLSL_SAMPLER_DIM_3D:
2930 inst->tex_target = TEXTURE_3D_INDEX;
2931 break;
2932 case GLSL_SAMPLER_DIM_CUBE:
2933 inst->tex_target = (sampler_type->sampler_array)
2934 ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX;
2935 break;
2936 case GLSL_SAMPLER_DIM_RECT:
2937 inst->tex_target = TEXTURE_RECT_INDEX;
2938 break;
2939 case GLSL_SAMPLER_DIM_BUF:
2940 inst->tex_target = TEXTURE_BUFFER_INDEX;
2941 break;
2942 case GLSL_SAMPLER_DIM_EXTERNAL:
2943 inst->tex_target = TEXTURE_EXTERNAL_INDEX;
2944 break;
2945 case GLSL_SAMPLER_DIM_MS:
2946 inst->tex_target = (sampler_type->sampler_array)
2947 ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX;
2948 break;
2949 default:
2950 assert(!"Should not get here.");
2951 }
2952
2953 this->result = result_src;
2954 }
2955
2956 void
2957 glsl_to_tgsi_visitor::visit(ir_return *ir)
2958 {
2959 if (ir->get_value()) {
2960 st_dst_reg l;
2961 int i;
2962
2963 assert(current_function);
2964
2965 ir->get_value()->accept(this);
2966 st_src_reg r = this->result;
2967
2968 l = st_dst_reg(current_function->return_reg);
2969
2970 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2971 emit(ir, TGSI_OPCODE_MOV, l, r);
2972 l.index++;
2973 r.index++;
2974 }
2975 }
2976
2977 emit(ir, TGSI_OPCODE_RET);
2978 }
2979
2980 void
2981 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2982 {
2983 if (ir->condition) {
2984 ir->condition->accept(this);
2985 this->result.negate = ~this->result.negate;
2986 emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, this->result);
2987 } else {
2988 /* unconditional kil */
2989 emit(ir, TGSI_OPCODE_KILL);
2990 }
2991 }
2992
2993 void
2994 glsl_to_tgsi_visitor::visit(ir_if *ir)
2995 {
2996 unsigned if_opcode;
2997 glsl_to_tgsi_instruction *if_inst;
2998
2999 ir->condition->accept(this);
3000 assert(this->result.file != PROGRAM_UNDEFINED);
3001
3002 if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF;
3003
3004 if_inst = emit(ir->condition, if_opcode, undef_dst, this->result);
3005
3006 this->instructions.push_tail(if_inst);
3007
3008 visit_exec_list(&ir->then_instructions, this);
3009
3010 if (!ir->else_instructions.is_empty()) {
3011 emit(ir->condition, TGSI_OPCODE_ELSE);
3012 visit_exec_list(&ir->else_instructions, this);
3013 }
3014
3015 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF);
3016 }
3017
3018 void
3019 glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir)
3020 {
3021 assert(!"Geometry shaders not supported.");
3022 }
3023
3024 void
3025 glsl_to_tgsi_visitor::visit(ir_end_primitive *ir)
3026 {
3027 assert(!"Geometry shaders not supported.");
3028 }
3029
3030 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
3031 {
3032 result.file = PROGRAM_UNDEFINED;
3033 next_temp = 1;
3034 next_array = 0;
3035 next_signature_id = 1;
3036 num_immediates = 0;
3037 current_function = NULL;
3038 num_address_regs = 0;
3039 samplers_used = 0;
3040 indirect_addr_consts = false;
3041 glsl_version = 0;
3042 native_integers = false;
3043 mem_ctx = ralloc_context(NULL);
3044 ctx = NULL;
3045 prog = NULL;
3046 shader_program = NULL;
3047 options = NULL;
3048 }
3049
3050 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
3051 {
3052 ralloc_free(mem_ctx);
3053 }
3054
3055 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
3056 {
3057 delete v;
3058 }
3059
3060
3061 /**
3062 * Count resources used by the given gpu program (number of texture
3063 * samplers, etc).
3064 */
3065 static void
3066 count_resources(glsl_to_tgsi_visitor *v, gl_program *prog)
3067 {
3068 v->samplers_used = 0;
3069
3070 foreach_iter(exec_list_iterator, iter, v->instructions) {
3071 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3072
3073 if (is_tex_instruction(inst->op)) {
3074 v->samplers_used |= 1 << inst->sampler;
3075
3076 if (inst->tex_shadow) {
3077 prog->ShadowSamplers |= 1 << inst->sampler;
3078 }
3079 }
3080 }
3081
3082 prog->SamplersUsed = v->samplers_used;
3083
3084 if (v->shader_program != NULL)
3085 _mesa_update_shader_textures_used(v->shader_program, prog);
3086 }
3087
3088 static void
3089 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
3090 struct gl_shader_program *shader_program,
3091 const char *name, const glsl_type *type,
3092 ir_constant *val)
3093 {
3094 if (type->is_record()) {
3095 ir_constant *field_constant;
3096
3097 field_constant = (ir_constant *)val->components.get_head();
3098
3099 for (unsigned int i = 0; i < type->length; i++) {
3100 const glsl_type *field_type = type->fields.structure[i].type;
3101 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
3102 type->fields.structure[i].name);
3103 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
3104 field_type, field_constant);
3105 field_constant = (ir_constant *)field_constant->next;
3106 }
3107 return;
3108 }
3109
3110 unsigned offset;
3111 unsigned index = _mesa_get_uniform_location(ctx, shader_program, name,
3112 &offset);
3113 if (offset == GL_INVALID_INDEX) {
3114 fail_link(shader_program,
3115 "Couldn't find uniform for initializer %s\n", name);
3116 return;
3117 }
3118 int loc = _mesa_uniform_merge_location_offset(shader_program, index, offset);
3119
3120 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
3121 ir_constant *element;
3122 const glsl_type *element_type;
3123 if (type->is_array()) {
3124 element = val->array_elements[i];
3125 element_type = type->fields.array;
3126 } else {
3127 element = val;
3128 element_type = type;
3129 }
3130
3131 void *values;
3132
3133 if (element_type->base_type == GLSL_TYPE_BOOL) {
3134 int *conv = ralloc_array(mem_ctx, int, element_type->components());
3135 for (unsigned int j = 0; j < element_type->components(); j++) {
3136 conv[j] = element->value.b[j];
3137 }
3138 values = (void *)conv;
3139 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
3140 element_type->vector_elements,
3141 1);
3142 } else {
3143 values = &element->value;
3144 }
3145
3146 if (element_type->is_matrix()) {
3147 _mesa_uniform_matrix(ctx, shader_program,
3148 element_type->matrix_columns,
3149 element_type->vector_elements,
3150 loc, 1, GL_FALSE, (GLfloat *)values);
3151 } else {
3152 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
3153 values, element_type->gl_type);
3154 }
3155
3156 loc++;
3157 }
3158 }
3159
3160 /**
3161 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
3162 * are read from the given src in this instruction
3163 */
3164 static int
3165 get_src_arg_mask(st_dst_reg dst, st_src_reg src)
3166 {
3167 int read_mask = 0, comp;
3168
3169 /* Now, given the src swizzle and the written channels, find which
3170 * components are actually read
3171 */
3172 for (comp = 0; comp < 4; ++comp) {
3173 const unsigned coord = GET_SWZ(src.swizzle, comp);
3174 ASSERT(coord < 4);
3175 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W)
3176 read_mask |= 1 << coord;
3177 }
3178
3179 return read_mask;
3180 }
3181
3182 /**
3183 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
3184 * instruction is the first instruction to write to register T0. There are
3185 * several lowering passes done in GLSL IR (e.g. branches and
3186 * relative addressing) that create a large number of conditional assignments
3187 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
3188 *
3189 * Here is why this conversion is safe:
3190 * CMP T0, T1 T2 T0 can be expanded to:
3191 * if (T1 < 0.0)
3192 * MOV T0, T2;
3193 * else
3194 * MOV T0, T0;
3195 *
3196 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
3197 * as the original program. If (T1 < 0.0) evaluates to false, executing
3198 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
3199 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
3200 * because any instruction that was going to read from T0 after this was going
3201 * to read a garbage value anyway.
3202 */
3203 void
3204 glsl_to_tgsi_visitor::simplify_cmp(void)
3205 {
3206 unsigned *tempWrites;
3207 unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
3208
3209 tempWrites = new unsigned[MAX_TEMPS];
3210 if (!tempWrites) {
3211 return;
3212 }
3213 memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
3214 memset(outputWrites, 0, sizeof(outputWrites));
3215
3216 foreach_iter(exec_list_iterator, iter, this->instructions) {
3217 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3218 unsigned prevWriteMask = 0;
3219
3220 /* Give up if we encounter relative addressing or flow control. */
3221 if (inst->dst.reladdr ||
3222 tgsi_get_opcode_info(inst->op)->is_branch ||
3223 inst->op == TGSI_OPCODE_BGNSUB ||
3224 inst->op == TGSI_OPCODE_CONT ||
3225 inst->op == TGSI_OPCODE_END ||
3226 inst->op == TGSI_OPCODE_ENDSUB ||
3227 inst->op == TGSI_OPCODE_RET) {
3228 break;
3229 }
3230
3231 if (inst->dst.file == PROGRAM_OUTPUT) {
3232 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS);
3233 prevWriteMask = outputWrites[inst->dst.index];
3234 outputWrites[inst->dst.index] |= inst->dst.writemask;
3235 } else if (inst->dst.file == PROGRAM_TEMPORARY) {
3236 assert(inst->dst.index < MAX_TEMPS);
3237 prevWriteMask = tempWrites[inst->dst.index];
3238 tempWrites[inst->dst.index] |= inst->dst.writemask;
3239 } else
3240 continue;
3241
3242 /* For a CMP to be considered a conditional write, the destination
3243 * register and source register two must be the same. */
3244 if (inst->op == TGSI_OPCODE_CMP
3245 && !(inst->dst.writemask & prevWriteMask)
3246 && inst->src[2].file == inst->dst.file
3247 && inst->src[2].index == inst->dst.index
3248 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) {
3249
3250 inst->op = TGSI_OPCODE_MOV;
3251 inst->src[0] = inst->src[1];
3252 }
3253 }
3254
3255 delete [] tempWrites;
3256 }
3257
3258 /* Replaces all references to a temporary register index with another index. */
3259 void
3260 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
3261 {
3262 foreach_iter(exec_list_iterator, iter, this->instructions) {
3263 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3264 unsigned j;
3265
3266 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3267 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3268 inst->src[j].index == index) {
3269 inst->src[j].index = new_index;
3270 }
3271 }
3272
3273 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3274 inst->dst.index = new_index;
3275 }
3276 }
3277 }
3278
3279 int
3280 glsl_to_tgsi_visitor::get_first_temp_read(int index)
3281 {
3282 int depth = 0; /* loop depth */
3283 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3284 unsigned i = 0, j;
3285
3286 foreach_iter(exec_list_iterator, iter, this->instructions) {
3287 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3288
3289 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3290 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3291 inst->src[j].index == index) {
3292 return (depth == 0) ? i : loop_start;
3293 }
3294 }
3295
3296 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3297 if(depth++ == 0)
3298 loop_start = i;
3299 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3300 if (--depth == 0)
3301 loop_start = -1;
3302 }
3303 assert(depth >= 0);
3304
3305 i++;
3306 }
3307
3308 return -1;
3309 }
3310
3311 int
3312 glsl_to_tgsi_visitor::get_first_temp_write(int index)
3313 {
3314 int depth = 0; /* loop depth */
3315 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
3316 int i = 0;
3317
3318 foreach_iter(exec_list_iterator, iter, this->instructions) {
3319 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3320
3321 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
3322 return (depth == 0) ? i : loop_start;
3323 }
3324
3325 if (inst->op == TGSI_OPCODE_BGNLOOP) {
3326 if(depth++ == 0)
3327 loop_start = i;
3328 } else if (inst->op == TGSI_OPCODE_ENDLOOP) {
3329 if (--depth == 0)
3330 loop_start = -1;
3331 }
3332 assert(depth >= 0);
3333
3334 i++;
3335 }
3336
3337 return -1;
3338 }
3339
3340 int
3341 glsl_to_tgsi_visitor::get_last_temp_read(int index)
3342 {
3343 int depth = 0; /* loop depth */
3344 int last = -1; /* index of last instruction that reads the temporary */
3345 unsigned i = 0, j;
3346
3347 foreach_iter(exec_list_iterator, iter, this->instructions) {
3348 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3349
3350 for (j=0; j < num_inst_src_regs(inst->op); j++) {
3351 if (inst->src[j].file == PROGRAM_TEMPORARY &&
3352 inst->src[j].index == index) {
3353 last = (depth == 0) ? i : -2;
3354 }
3355 }
3356
3357 if (inst->op == TGSI_OPCODE_BGNLOOP)
3358 depth++;
3359 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3360 if (--depth == 0 && last == -2)
3361 last = i;
3362 assert(depth >= 0);
3363
3364 i++;
3365 }
3366
3367 assert(last >= -1);
3368 return last;
3369 }
3370
3371 int
3372 glsl_to_tgsi_visitor::get_last_temp_write(int index)
3373 {
3374 int depth = 0; /* loop depth */
3375 int last = -1; /* index of last instruction that writes to the temporary */
3376 int i = 0;
3377
3378 foreach_iter(exec_list_iterator, iter, this->instructions) {
3379 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3380
3381 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
3382 last = (depth == 0) ? i : -2;
3383
3384 if (inst->op == TGSI_OPCODE_BGNLOOP)
3385 depth++;
3386 else if (inst->op == TGSI_OPCODE_ENDLOOP)
3387 if (--depth == 0 && last == -2)
3388 last = i;
3389 assert(depth >= 0);
3390
3391 i++;
3392 }
3393
3394 assert(last >= -1);
3395 return last;
3396 }
3397
3398 /*
3399 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
3400 * channels for copy propagation and updates following instructions to
3401 * use the original versions.
3402 *
3403 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3404 * will occur. As an example, a TXP production before this pass:
3405 *
3406 * 0: MOV TEMP[1], INPUT[4].xyyy;
3407 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3408 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
3409 *
3410 * and after:
3411 *
3412 * 0: MOV TEMP[1], INPUT[4].xyyy;
3413 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3414 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3415 *
3416 * which allows for dead code elimination on TEMP[1]'s writes.
3417 */
3418 void
3419 glsl_to_tgsi_visitor::copy_propagate(void)
3420 {
3421 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
3422 glsl_to_tgsi_instruction *,
3423 this->next_temp * 4);
3424 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3425 int level = 0;
3426
3427 foreach_iter(exec_list_iterator, iter, this->instructions) {
3428 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3429
3430 assert(inst->dst.file != PROGRAM_TEMPORARY
3431 || inst->dst.index < this->next_temp);
3432
3433 /* First, do any copy propagation possible into the src regs. */
3434 for (int r = 0; r < 3; r++) {
3435 glsl_to_tgsi_instruction *first = NULL;
3436 bool good = true;
3437 int acp_base = inst->src[r].index * 4;
3438
3439 if (inst->src[r].file != PROGRAM_TEMPORARY ||
3440 inst->src[r].reladdr)
3441 continue;
3442
3443 /* See if we can find entries in the ACP consisting of MOVs
3444 * from the same src register for all the swizzled channels
3445 * of this src register reference.
3446 */
3447 for (int i = 0; i < 4; i++) {
3448 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3449 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
3450
3451 if (!copy_chan) {
3452 good = false;
3453 break;
3454 }
3455
3456 assert(acp_level[acp_base + src_chan] <= level);
3457
3458 if (!first) {
3459 first = copy_chan;
3460 } else {
3461 if (first->src[0].file != copy_chan->src[0].file ||
3462 first->src[0].index != copy_chan->src[0].index) {
3463 good = false;
3464 break;
3465 }
3466 }
3467 }
3468
3469 if (good) {
3470 /* We've now validated that we can copy-propagate to
3471 * replace this src register reference. Do it.
3472 */
3473 inst->src[r].file = first->src[0].file;
3474 inst->src[r].index = first->src[0].index;
3475
3476 int swizzle = 0;
3477 for (int i = 0; i < 4; i++) {
3478 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
3479 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
3480 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
3481 (3 * i));
3482 }
3483 inst->src[r].swizzle = swizzle;
3484 }
3485 }
3486
3487 switch (inst->op) {
3488 case TGSI_OPCODE_BGNLOOP:
3489 case TGSI_OPCODE_ENDLOOP:
3490 /* End of a basic block, clear the ACP entirely. */
3491 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3492 break;
3493
3494 case TGSI_OPCODE_IF:
3495 case TGSI_OPCODE_UIF:
3496 ++level;
3497 break;
3498
3499 case TGSI_OPCODE_ENDIF:
3500 case TGSI_OPCODE_ELSE:
3501 /* Clear all channels written inside the block from the ACP, but
3502 * leaving those that were not touched.
3503 */
3504 for (int r = 0; r < this->next_temp; r++) {
3505 for (int c = 0; c < 4; c++) {
3506 if (!acp[4 * r + c])
3507 continue;
3508
3509 if (acp_level[4 * r + c] >= level)
3510 acp[4 * r + c] = NULL;
3511 }
3512 }
3513 if (inst->op == TGSI_OPCODE_ENDIF)
3514 --level;
3515 break;
3516
3517 default:
3518 /* Continuing the block, clear any written channels from
3519 * the ACP.
3520 */
3521 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3522 /* Any temporary might be written, so no copy propagation
3523 * across this instruction.
3524 */
3525 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3526 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3527 inst->dst.reladdr) {
3528 /* Any output might be written, so no copy propagation
3529 * from outputs across this instruction.
3530 */
3531 for (int r = 0; r < this->next_temp; r++) {
3532 for (int c = 0; c < 4; c++) {
3533 if (!acp[4 * r + c])
3534 continue;
3535
3536 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3537 acp[4 * r + c] = NULL;
3538 }
3539 }
3540 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3541 inst->dst.file == PROGRAM_OUTPUT) {
3542 /* Clear where it's used as dst. */
3543 if (inst->dst.file == PROGRAM_TEMPORARY) {
3544 for (int c = 0; c < 4; c++) {
3545 if (inst->dst.writemask & (1 << c)) {
3546 acp[4 * inst->dst.index + c] = NULL;
3547 }
3548 }
3549 }
3550
3551 /* Clear where it's used as src. */
3552 for (int r = 0; r < this->next_temp; r++) {
3553 for (int c = 0; c < 4; c++) {
3554 if (!acp[4 * r + c])
3555 continue;
3556
3557 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3558
3559 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3560 acp[4 * r + c]->src[0].index == inst->dst.index &&
3561 inst->dst.writemask & (1 << src_chan))
3562 {
3563 acp[4 * r + c] = NULL;
3564 }
3565 }
3566 }
3567 }
3568 break;
3569 }
3570
3571 /* If this is a copy, add it to the ACP. */
3572 if (inst->op == TGSI_OPCODE_MOV &&
3573 inst->dst.file == PROGRAM_TEMPORARY &&
3574 !(inst->dst.file == inst->src[0].file &&
3575 inst->dst.index == inst->src[0].index) &&
3576 !inst->dst.reladdr &&
3577 !inst->saturate &&
3578 !inst->src[0].reladdr &&
3579 !inst->src[0].negate) {
3580 for (int i = 0; i < 4; i++) {
3581 if (inst->dst.writemask & (1 << i)) {
3582 acp[4 * inst->dst.index + i] = inst;
3583 acp_level[4 * inst->dst.index + i] = level;
3584 }
3585 }
3586 }
3587 }
3588
3589 ralloc_free(acp_level);
3590 ralloc_free(acp);
3591 }
3592
3593 /*
3594 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3595 *
3596 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3597 * will occur. As an example, a TXP production after copy propagation but
3598 * before this pass:
3599 *
3600 * 0: MOV TEMP[1], INPUT[4].xyyy;
3601 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3602 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3603 *
3604 * and after this pass:
3605 *
3606 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3607 *
3608 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3609 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3610 */
3611 void
3612 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3613 {
3614 int i;
3615
3616 for (i=0; i < this->next_temp; i++) {
3617 int last_read = get_last_temp_read(i);
3618 int j = 0;
3619
3620 foreach_iter(exec_list_iterator, iter, this->instructions) {
3621 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3622
3623 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3624 j > last_read)
3625 {
3626 iter.remove();
3627 delete inst;
3628 }
3629
3630 j++;
3631 }
3632 }
3633 }
3634
3635 /*
3636 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead
3637 * code elimination. This is less primitive than eliminate_dead_code(), as it
3638 * is per-channel and can detect consecutive writes without a read between them
3639 * as dead code. However, there is some dead code that can be eliminated by
3640 * eliminate_dead_code() but not this function - for example, this function
3641 * cannot eliminate an instruction writing to a register that is never read and
3642 * is the only instruction writing to that register.
3643 *
3644 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3645 * will occur.
3646 */
3647 int
3648 glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void)
3649 {
3650 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx,
3651 glsl_to_tgsi_instruction *,
3652 this->next_temp * 4);
3653 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
3654 int level = 0;
3655 int removed = 0;
3656
3657 foreach_iter(exec_list_iterator, iter, this->instructions) {
3658 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3659
3660 assert(inst->dst.file != PROGRAM_TEMPORARY
3661 || inst->dst.index < this->next_temp);
3662
3663 switch (inst->op) {
3664 case TGSI_OPCODE_BGNLOOP:
3665 case TGSI_OPCODE_ENDLOOP:
3666 case TGSI_OPCODE_CONT:
3667 case TGSI_OPCODE_BRK:
3668 /* End of a basic block, clear the write array entirely.
3669 *
3670 * This keeps us from killing dead code when the writes are
3671 * on either side of a loop, even when the register isn't touched
3672 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit
3673 * dead code of this type, so it shouldn't make a difference as long as
3674 * the dead code elimination pass in the GLSL compiler does its job.
3675 */
3676 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3677 break;
3678
3679 case TGSI_OPCODE_ENDIF:
3680 case TGSI_OPCODE_ELSE:
3681 /* Promote the recorded level of all channels written inside the
3682 * preceding if or else block to the level above the if/else block.
3683 */
3684 for (int r = 0; r < this->next_temp; r++) {
3685 for (int c = 0; c < 4; c++) {
3686 if (!writes[4 * r + c])
3687 continue;
3688
3689 if (write_level[4 * r + c] == level)
3690 write_level[4 * r + c] = level-1;
3691 }
3692 }
3693
3694 if(inst->op == TGSI_OPCODE_ENDIF)
3695 --level;
3696
3697 break;
3698
3699 case TGSI_OPCODE_IF:
3700 case TGSI_OPCODE_UIF:
3701 ++level;
3702 /* fallthrough to default case to mark the condition as read */
3703
3704 default:
3705 /* Continuing the block, clear any channels from the write array that
3706 * are read by this instruction.
3707 */
3708 for (unsigned i = 0; i < Elements(inst->src); i++) {
3709 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){
3710 /* Any temporary might be read, so no dead code elimination
3711 * across this instruction.
3712 */
3713 memset(writes, 0, sizeof(*writes) * this->next_temp * 4);
3714 } else if (inst->src[i].file == PROGRAM_TEMPORARY) {
3715 /* Clear where it's used as src. */
3716 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0);
3717 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1);
3718 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2);
3719 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
3720
3721 for (int c = 0; c < 4; c++) {
3722 if (src_chans & (1 << c)) {
3723 writes[4 * inst->src[i].index + c] = NULL;
3724 }
3725 }
3726 }
3727 }
3728 break;
3729 }
3730
3731 /* If this instruction writes to a temporary, add it to the write array.
3732 * If there is already an instruction in the write array for one or more
3733 * of the channels, flag that channel write as dead.
3734 */
3735 if (inst->dst.file == PROGRAM_TEMPORARY &&
3736 !inst->dst.reladdr &&
3737 !inst->saturate) {
3738 for (int c = 0; c < 4; c++) {
3739 if (inst->dst.writemask & (1 << c)) {
3740 if (writes[4 * inst->dst.index + c]) {
3741 if (write_level[4 * inst->dst.index + c] < level)
3742 continue;
3743 else
3744 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c);
3745 }
3746 writes[4 * inst->dst.index + c] = inst;
3747 write_level[4 * inst->dst.index + c] = level;
3748 }
3749 }
3750 }
3751 }
3752
3753 /* Anything still in the write array at this point is dead code. */
3754 for (int r = 0; r < this->next_temp; r++) {
3755 for (int c = 0; c < 4; c++) {
3756 glsl_to_tgsi_instruction *inst = writes[4 * r + c];
3757 if (inst)
3758 inst->dead_mask |= (1 << c);
3759 }
3760 }
3761
3762 /* Now actually remove the instructions that are completely dead and update
3763 * the writemask of other instructions with dead channels.
3764 */
3765 foreach_iter(exec_list_iterator, iter, this->instructions) {
3766 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3767
3768 if (!inst->dead_mask || !inst->dst.writemask)
3769 continue;
3770 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) {
3771 iter.remove();
3772 delete inst;
3773 removed++;
3774 } else
3775 inst->dst.writemask &= ~(inst->dead_mask);
3776 }
3777
3778 ralloc_free(write_level);
3779 ralloc_free(writes);
3780
3781 return removed;
3782 }
3783
3784 /* Merges temporary registers together where possible to reduce the number of
3785 * registers needed to run a program.
3786 *
3787 * Produces optimal code only after copy propagation and dead code elimination
3788 * have been run. */
3789 void
3790 glsl_to_tgsi_visitor::merge_registers(void)
3791 {
3792 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3793 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3794 int i, j;
3795
3796 /* Read the indices of the last read and first write to each temp register
3797 * into an array so that we don't have to traverse the instruction list as
3798 * much. */
3799 for (i=0; i < this->next_temp; i++) {
3800 last_reads[i] = get_last_temp_read(i);
3801 first_writes[i] = get_first_temp_write(i);
3802 }
3803
3804 /* Start looking for registers with non-overlapping usages that can be
3805 * merged together. */
3806 for (i=0; i < this->next_temp; i++) {
3807 /* Don't touch unused registers. */
3808 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3809
3810 for (j=0; j < this->next_temp; j++) {
3811 /* Don't touch unused registers. */
3812 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3813
3814 /* We can merge the two registers if the first write to j is after or
3815 * in the same instruction as the last read from i. Note that the
3816 * register at index i will always be used earlier or at the same time
3817 * as the register at index j. */
3818 if (first_writes[i] <= first_writes[j] &&
3819 last_reads[i] <= first_writes[j])
3820 {
3821 rename_temp_register(j, i); /* Replace all references to j with i.*/
3822
3823 /* Update the first_writes and last_reads arrays with the new
3824 * values for the merged register index, and mark the newly unused
3825 * register index as such. */
3826 last_reads[i] = last_reads[j];
3827 first_writes[j] = -1;
3828 last_reads[j] = -1;
3829 }
3830 }
3831 }
3832
3833 ralloc_free(last_reads);
3834 ralloc_free(first_writes);
3835 }
3836
3837 /* Reassign indices to temporary registers by reusing unused indices created
3838 * by optimization passes. */
3839 void
3840 glsl_to_tgsi_visitor::renumber_registers(void)
3841 {
3842 int i = 0;
3843 int new_index = 0;
3844
3845 for (i=0; i < this->next_temp; i++) {
3846 if (get_first_temp_read(i) < 0) continue;
3847 if (i != new_index)
3848 rename_temp_register(i, new_index);
3849 new_index++;
3850 }
3851
3852 this->next_temp = new_index;
3853 }
3854
3855 /**
3856 * Returns a fragment program which implements the current pixel transfer ops.
3857 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c.
3858 */
3859 extern "C" void
3860 get_pixel_transfer_visitor(struct st_fragment_program *fp,
3861 glsl_to_tgsi_visitor *original,
3862 int scale_and_bias, int pixel_maps)
3863 {
3864 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3865 struct st_context *st = st_context(original->ctx);
3866 struct gl_program *prog = &fp->Base.Base;
3867 struct gl_program_parameter_list *params = _mesa_new_parameter_list();
3868 st_src_reg coord, src0;
3869 st_dst_reg dst0;
3870 glsl_to_tgsi_instruction *inst;
3871
3872 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
3873 v->ctx = original->ctx;
3874 v->prog = prog;
3875 v->shader_program = NULL;
3876 v->glsl_version = original->glsl_version;
3877 v->native_integers = original->native_integers;
3878 v->options = original->options;
3879 v->next_temp = original->next_temp;
3880 v->num_address_regs = original->num_address_regs;
3881 v->samplers_used = prog->SamplersUsed = original->samplers_used;
3882 v->indirect_addr_consts = original->indirect_addr_consts;
3883 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
3884 v->num_immediates = original->num_immediates;
3885
3886 /*
3887 * Get initial pixel color from the texture.
3888 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D;
3889 */
3890 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
3891 src0 = v->get_temp(glsl_type::vec4_type);
3892 dst0 = st_dst_reg(src0);
3893 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
3894 inst->sampler = 0;
3895 inst->tex_target = TEXTURE_2D_INDEX;
3896
3897 prog->InputsRead |= VARYING_BIT_TEX0;
3898 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */
3899 v->samplers_used |= (1 << 0);
3900
3901 if (scale_and_bias) {
3902 static const gl_state_index scale_state[STATE_LENGTH] =
3903 { STATE_INTERNAL, STATE_PT_SCALE,
3904 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3905 static const gl_state_index bias_state[STATE_LENGTH] =
3906 { STATE_INTERNAL, STATE_PT_BIAS,
3907 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 };
3908 GLint scale_p, bias_p;
3909 st_src_reg scale, bias;
3910
3911 scale_p = _mesa_add_state_reference(params, scale_state);
3912 bias_p = _mesa_add_state_reference(params, bias_state);
3913
3914 /* MAD colorTemp, colorTemp, scale, bias; */
3915 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT);
3916 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT);
3917 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias);
3918 }
3919
3920 if (pixel_maps) {
3921 st_src_reg temp = v->get_temp(glsl_type::vec4_type);
3922 st_dst_reg temp_dst = st_dst_reg(temp);
3923
3924 assert(st->pixel_xfer.pixelmap_texture);
3925
3926 /* With a little effort, we can do four pixel map look-ups with
3927 * two TEX instructions:
3928 */
3929
3930 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */
3931 temp_dst.writemask = WRITEMASK_XY; /* write R,G */
3932 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3933 inst->sampler = 1;
3934 inst->tex_target = TEXTURE_2D_INDEX;
3935
3936 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */
3937 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W);
3938 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */
3939 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0);
3940 inst->sampler = 1;
3941 inst->tex_target = TEXTURE_2D_INDEX;
3942
3943 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */
3944 v->samplers_used |= (1 << 1);
3945
3946 /* MOV colorTemp, temp; */
3947 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp);
3948 }
3949
3950 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
3951 * new visitor. */
3952 foreach_iter(exec_list_iterator, iter, original->instructions) {
3953 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3954 glsl_to_tgsi_instruction *newinst;
3955 st_src_reg src_regs[3];
3956
3957 if (inst->dst.file == PROGRAM_OUTPUT)
3958 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
3959
3960 for (int i=0; i<3; i++) {
3961 src_regs[i] = inst->src[i];
3962 if (src_regs[i].file == PROGRAM_INPUT &&
3963 src_regs[i].index == VARYING_SLOT_COL0)
3964 {
3965 src_regs[i].file = PROGRAM_TEMPORARY;
3966 src_regs[i].index = src0.index;
3967 }
3968 else if (src_regs[i].file == PROGRAM_INPUT)
3969 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
3970 }
3971
3972 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
3973 newinst->tex_target = inst->tex_target;
3974 }
3975
3976 /* Make modifications to fragment program info. */
3977 prog->Parameters = _mesa_combine_parameter_lists(params,
3978 original->prog->Parameters);
3979 _mesa_free_parameter_list(params);
3980 count_resources(v, prog);
3981 fp->glsl_to_tgsi = v;
3982 }
3983
3984 /**
3985 * Make fragment program for glBitmap:
3986 * Sample the texture and kill the fragment if the bit is 0.
3987 * This program will be combined with the user's fragment program.
3988 *
3989 * Based on make_bitmap_fragment_program in st_cb_bitmap.c.
3990 */
3991 extern "C" void
3992 get_bitmap_visitor(struct st_fragment_program *fp,
3993 glsl_to_tgsi_visitor *original, int samplerIndex)
3994 {
3995 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor();
3996 struct st_context *st = st_context(original->ctx);
3997 struct gl_program *prog = &fp->Base.Base;
3998 st_src_reg coord, src0;
3999 st_dst_reg dst0;
4000 glsl_to_tgsi_instruction *inst;
4001
4002 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */
4003 v->ctx = original->ctx;
4004 v->prog = prog;
4005 v->shader_program = NULL;
4006 v->glsl_version = original->glsl_version;
4007 v->native_integers = original->native_integers;
4008 v->options = original->options;
4009 v->next_temp = original->next_temp;
4010 v->num_address_regs = original->num_address_regs;
4011 v->samplers_used = prog->SamplersUsed = original->samplers_used;
4012 v->indirect_addr_consts = original->indirect_addr_consts;
4013 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates));
4014 v->num_immediates = original->num_immediates;
4015
4016 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */
4017 coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type);
4018 src0 = v->get_temp(glsl_type::vec4_type);
4019 dst0 = st_dst_reg(src0);
4020 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord);
4021 inst->sampler = samplerIndex;
4022 inst->tex_target = TEXTURE_2D_INDEX;
4023
4024 prog->InputsRead |= VARYING_BIT_TEX0;
4025 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
4026 v->samplers_used |= (1 << samplerIndex);
4027
4028 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */
4029 src0.negate = NEGATE_XYZW;
4030 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM)
4031 src0.swizzle = SWIZZLE_XXXX;
4032 inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0);
4033
4034 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the
4035 * new visitor. */
4036 foreach_iter(exec_list_iterator, iter, original->instructions) {
4037 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
4038 glsl_to_tgsi_instruction *newinst;
4039 st_src_reg src_regs[3];
4040
4041 if (inst->dst.file == PROGRAM_OUTPUT)
4042 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index);
4043
4044 for (int i=0; i<3; i++) {
4045 src_regs[i] = inst->src[i];
4046 if (src_regs[i].file == PROGRAM_INPUT)
4047 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index);
4048 }
4049
4050 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]);
4051 newinst->tex_target = inst->tex_target;
4052 }
4053
4054 /* Make modifications to fragment program info. */
4055 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters);
4056 count_resources(v, prog);
4057 fp->glsl_to_tgsi = v;
4058 }
4059
4060 /* ------------------------- TGSI conversion stuff -------------------------- */
4061 struct label {
4062 unsigned branch_target;
4063 unsigned token;
4064 };
4065
4066 /**
4067 * Intermediate state used during shader translation.
4068 */
4069 struct st_translate {
4070 struct ureg_program *ureg;
4071
4072 struct ureg_dst temps[MAX_TEMPS];
4073 struct ureg_dst arrays[MAX_ARRAYS];
4074 struct ureg_src *constants;
4075 struct ureg_src *immediates;
4076 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
4077 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
4078 struct ureg_dst address[1];
4079 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
4080 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
4081
4082 unsigned array_sizes[MAX_ARRAYS];
4083
4084 const GLuint *inputMapping;
4085 const GLuint *outputMapping;
4086
4087 /* For every instruction that contains a label (eg CALL), keep
4088 * details so that we can go back afterwards and emit the correct
4089 * tgsi instruction number for each label.
4090 */
4091 struct label *labels;
4092 unsigned labels_size;
4093 unsigned labels_count;
4094
4095 /* Keep a record of the tgsi instruction number that each mesa
4096 * instruction starts at, will be used to fix up labels after
4097 * translation.
4098 */
4099 unsigned *insn;
4100 unsigned insn_size;
4101 unsigned insn_count;
4102
4103 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
4104
4105 boolean error;
4106 };
4107
4108 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
4109 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
4110 TGSI_SEMANTIC_FACE,
4111 TGSI_SEMANTIC_VERTEXID,
4112 TGSI_SEMANTIC_INSTANCEID
4113 };
4114
4115 /**
4116 * Make note of a branch to a label in the TGSI code.
4117 * After we've emitted all instructions, we'll go over the list
4118 * of labels built here and patch the TGSI code with the actual
4119 * location of each label.
4120 */
4121 static unsigned *get_label(struct st_translate *t, unsigned branch_target)
4122 {
4123 unsigned i;
4124
4125 if (t->labels_count + 1 >= t->labels_size) {
4126 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
4127 t->labels = (struct label *)realloc(t->labels,
4128 t->labels_size * sizeof(struct label));
4129 if (t->labels == NULL) {
4130 static unsigned dummy;
4131 t->error = TRUE;
4132 return &dummy;
4133 }
4134 }
4135
4136 i = t->labels_count++;
4137 t->labels[i].branch_target = branch_target;
4138 return &t->labels[i].token;
4139 }
4140
4141 /**
4142 * Called prior to emitting the TGSI code for each instruction.
4143 * Allocate additional space for instructions if needed.
4144 * Update the insn[] array so the next glsl_to_tgsi_instruction points to
4145 * the next TGSI instruction.
4146 */
4147 static void set_insn_start(struct st_translate *t, unsigned start)
4148 {
4149 if (t->insn_count + 1 >= t->insn_size) {
4150 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
4151 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0]));
4152 if (t->insn == NULL) {
4153 t->error = TRUE;
4154 return;
4155 }
4156 }
4157
4158 t->insn[t->insn_count++] = start;
4159 }
4160
4161 /**
4162 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate.
4163 */
4164 static struct ureg_src
4165 emit_immediate(struct st_translate *t,
4166 gl_constant_value values[4],
4167 int type, int size)
4168 {
4169 struct ureg_program *ureg = t->ureg;
4170
4171 switch(type)
4172 {
4173 case GL_FLOAT:
4174 return ureg_DECL_immediate(ureg, &values[0].f, size);
4175 case GL_INT:
4176 return ureg_DECL_immediate_int(ureg, &values[0].i, size);
4177 case GL_UNSIGNED_INT:
4178 case GL_BOOL:
4179 return ureg_DECL_immediate_uint(ureg, &values[0].u, size);
4180 default:
4181 assert(!"should not get here - type must be float, int, uint, or bool");
4182 return ureg_src_undef();
4183 }
4184 }
4185
4186 /**
4187 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register.
4188 */
4189 static struct ureg_dst
4190 dst_register(struct st_translate *t,
4191 gl_register_file file,
4192 GLuint index)
4193 {
4194 unsigned array;
4195
4196 switch(file) {
4197 case PROGRAM_UNDEFINED:
4198 return ureg_dst_undef();
4199
4200 case PROGRAM_TEMPORARY:
4201 assert(index >= 0);
4202 assert(index < (int) Elements(t->temps));
4203
4204 if (ureg_dst_is_undef(t->temps[index]))
4205 t->temps[index] = ureg_DECL_local_temporary(t->ureg);
4206
4207 return t->temps[index];
4208
4209 case PROGRAM_ARRAY:
4210 array = index >> 16;
4211
4212 assert(array >= 0);
4213 assert(array < (int) Elements(t->arrays));
4214
4215 if (ureg_dst_is_undef(t->arrays[array]))
4216 t->arrays[array] = ureg_DECL_array_temporary(
4217 t->ureg, t->array_sizes[array], TRUE);
4218
4219 return ureg_dst_array_offset(t->arrays[array],
4220 (int)(index & 0xFFFF) - 0x8000);
4221
4222 case PROGRAM_OUTPUT:
4223 if (t->procType == TGSI_PROCESSOR_VERTEX)
4224 assert(index < VARYING_SLOT_MAX);
4225 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
4226 assert(index < FRAG_RESULT_MAX);
4227 else
4228 assert(index < VARYING_SLOT_MAX);
4229
4230 assert(t->outputMapping[index] < Elements(t->outputs));
4231
4232 return t->outputs[t->outputMapping[index]];
4233
4234 case PROGRAM_ADDRESS:
4235 return t->address[index];
4236
4237 default:
4238 assert(!"unknown dst register file");
4239 return ureg_dst_undef();
4240 }
4241 }
4242
4243 /**
4244 * Map a glsl_to_tgsi src register to a TGSI ureg_src register.
4245 */
4246 static struct ureg_src
4247 src_register(struct st_translate *t,
4248 gl_register_file file,
4249 GLint index, GLint index2D)
4250 {
4251 switch(file) {
4252 case PROGRAM_UNDEFINED:
4253 return ureg_src_undef();
4254
4255 case PROGRAM_TEMPORARY:
4256 case PROGRAM_ARRAY:
4257 return ureg_src(dst_register(t, file, index));
4258
4259 case PROGRAM_ENV_PARAM:
4260 case PROGRAM_LOCAL_PARAM:
4261 case PROGRAM_UNIFORM:
4262 assert(index >= 0);
4263 return t->constants[index];
4264 case PROGRAM_STATE_VAR:
4265 case PROGRAM_CONSTANT: /* ie, immediate */
4266 if (index2D) {
4267 struct ureg_src src;
4268 src = ureg_src_register(TGSI_FILE_CONSTANT, 0);
4269 src.Dimension = 1;
4270 src.DimensionIndex = index2D;
4271 return src;
4272 } else if (index < 0)
4273 return ureg_DECL_constant(t->ureg, 0);
4274 else
4275 return t->constants[index];
4276
4277 case PROGRAM_IMMEDIATE:
4278 return t->immediates[index];
4279
4280 case PROGRAM_INPUT:
4281 assert(t->inputMapping[index] < Elements(t->inputs));
4282 return t->inputs[t->inputMapping[index]];
4283
4284 case PROGRAM_OUTPUT:
4285 assert(t->outputMapping[index] < Elements(t->outputs));
4286 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
4287
4288 case PROGRAM_ADDRESS:
4289 return ureg_src(t->address[index]);
4290
4291 case PROGRAM_SYSTEM_VALUE:
4292 assert(index < (int) Elements(t->systemValues));
4293 return t->systemValues[index];
4294
4295 default:
4296 assert(!"unknown src register file");
4297 return ureg_src_undef();
4298 }
4299 }
4300
4301 /**
4302 * Create a TGSI ureg_dst register from an st_dst_reg.
4303 */
4304 static struct ureg_dst
4305 translate_dst(struct st_translate *t,
4306 const st_dst_reg *dst_reg,
4307 bool saturate, bool clamp_color)
4308 {
4309 struct ureg_dst dst = dst_register(t,
4310 dst_reg->file,
4311 dst_reg->index);
4312
4313 dst = ureg_writemask(dst, dst_reg->writemask);
4314
4315 if (saturate)
4316 dst = ureg_saturate(dst);
4317 else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) {
4318 /* Clamp colors for ARB_color_buffer_float. */
4319 switch (t->procType) {
4320 case TGSI_PROCESSOR_VERTEX:
4321 /* XXX if the geometry shader is present, this must be done there
4322 * instead of here. */
4323 if (dst_reg->index == VARYING_SLOT_COL0 ||
4324 dst_reg->index == VARYING_SLOT_COL1 ||
4325 dst_reg->index == VARYING_SLOT_BFC0 ||
4326 dst_reg->index == VARYING_SLOT_BFC1) {
4327 dst = ureg_saturate(dst);
4328 }
4329 break;
4330
4331 case TGSI_PROCESSOR_FRAGMENT:
4332 if (dst_reg->index >= FRAG_RESULT_COLOR) {
4333 dst = ureg_saturate(dst);
4334 }
4335 break;
4336 }
4337 }
4338
4339 if (dst_reg->reladdr != NULL) {
4340 assert(dst_reg->file != PROGRAM_TEMPORARY);
4341 dst = ureg_dst_indirect(dst, ureg_src(t->address[0]));
4342 }
4343
4344 return dst;
4345 }
4346
4347 /**
4348 * Create a TGSI ureg_src register from an st_src_reg.
4349 */
4350 static struct ureg_src
4351 translate_src(struct st_translate *t, const st_src_reg *src_reg)
4352 {
4353 struct ureg_src src = src_register(t, src_reg->file, src_reg->index, src_reg->index2D);
4354
4355 src = ureg_swizzle(src,
4356 GET_SWZ(src_reg->swizzle, 0) & 0x3,
4357 GET_SWZ(src_reg->swizzle, 1) & 0x3,
4358 GET_SWZ(src_reg->swizzle, 2) & 0x3,
4359 GET_SWZ(src_reg->swizzle, 3) & 0x3);
4360
4361 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
4362 src = ureg_negate(src);
4363
4364 if (src_reg->reladdr != NULL) {
4365 assert(src_reg->file != PROGRAM_TEMPORARY);
4366 src = ureg_src_indirect(src, ureg_src(t->address[0]));
4367 }
4368
4369 return src;
4370 }
4371
4372 static struct tgsi_texture_offset
4373 translate_tex_offset(struct st_translate *t,
4374 const struct tgsi_texture_offset *in_offset)
4375 {
4376 struct tgsi_texture_offset offset;
4377 struct ureg_src imm_src;
4378
4379 assert(in_offset->File == PROGRAM_IMMEDIATE);
4380 imm_src = t->immediates[in_offset->Index];
4381
4382 offset.File = imm_src.File;
4383 offset.Index = imm_src.Index;
4384 offset.SwizzleX = imm_src.SwizzleX;
4385 offset.SwizzleY = imm_src.SwizzleY;
4386 offset.SwizzleZ = imm_src.SwizzleZ;
4387 offset.File = TGSI_FILE_IMMEDIATE;
4388 offset.Padding = 0;
4389
4390 return offset;
4391 }
4392
4393 static void
4394 compile_tgsi_instruction(struct st_translate *t,
4395 const glsl_to_tgsi_instruction *inst,
4396 bool clamp_dst_color_output)
4397 {
4398 struct ureg_program *ureg = t->ureg;
4399 GLuint i;
4400 struct ureg_dst dst[1];
4401 struct ureg_src src[4];
4402 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET];
4403
4404 unsigned num_dst;
4405 unsigned num_src;
4406 unsigned tex_target;
4407
4408 num_dst = num_inst_dst_regs(inst->op);
4409 num_src = num_inst_src_regs(inst->op);
4410
4411 if (num_dst)
4412 dst[0] = translate_dst(t,
4413 &inst->dst,
4414 inst->saturate,
4415 clamp_dst_color_output);
4416
4417 for (i = 0; i < num_src; i++)
4418 src[i] = translate_src(t, &inst->src[i]);
4419
4420 switch(inst->op) {
4421 case TGSI_OPCODE_BGNLOOP:
4422 case TGSI_OPCODE_CAL:
4423 case TGSI_OPCODE_ELSE:
4424 case TGSI_OPCODE_ENDLOOP:
4425 case TGSI_OPCODE_IF:
4426 case TGSI_OPCODE_UIF:
4427 assert(num_dst == 0);
4428 ureg_label_insn(ureg,
4429 inst->op,
4430 src, num_src,
4431 get_label(t,
4432 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0));
4433 return;
4434
4435 case TGSI_OPCODE_TEX:
4436 case TGSI_OPCODE_TXB:
4437 case TGSI_OPCODE_TXD:
4438 case TGSI_OPCODE_TXL:
4439 case TGSI_OPCODE_TXP:
4440 case TGSI_OPCODE_TXQ:
4441 case TGSI_OPCODE_TXF:
4442 case TGSI_OPCODE_TEX2:
4443 case TGSI_OPCODE_TXB2:
4444 case TGSI_OPCODE_TXL2:
4445 src[num_src++] = t->samplers[inst->sampler];
4446 for (i = 0; i < inst->tex_offset_num_offset; i++) {
4447 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]);
4448 }
4449 tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow);
4450
4451 ureg_tex_insn(ureg,
4452 inst->op,
4453 dst, num_dst,
4454 tex_target,
4455 texoffsets, inst->tex_offset_num_offset,
4456 src, num_src);
4457 return;
4458
4459 case TGSI_OPCODE_SCS:
4460 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
4461 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
4462 break;
4463
4464 default:
4465 ureg_insn(ureg,
4466 inst->op,
4467 dst, num_dst,
4468 src, num_src);
4469 break;
4470 }
4471 }
4472
4473 /**
4474 * Emit the TGSI instructions for inverting and adjusting WPOS.
4475 * This code is unavoidable because it also depends on whether
4476 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
4477 */
4478 static void
4479 emit_wpos_adjustment( struct st_translate *t,
4480 const struct gl_program *program,
4481 boolean invert,
4482 GLfloat adjX, GLfloat adjY[2])
4483 {
4484 struct ureg_program *ureg = t->ureg;
4485
4486 /* Fragment program uses fragment position input.
4487 * Need to replace instances of INPUT[WPOS] with temp T
4488 * where T = INPUT[WPOS] by y is inverted.
4489 */
4490 static const gl_state_index wposTransformState[STATE_LENGTH]
4491 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
4492 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
4493
4494 /* XXX: note we are modifying the incoming shader here! Need to
4495 * do this before emitting the constant decls below, or this
4496 * will be missed:
4497 */
4498 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
4499 wposTransformState);
4500
4501 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
4502 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
4503 struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]];
4504
4505 /* First, apply the coordinate shift: */
4506 if (adjX || adjY[0] || adjY[1]) {
4507 if (adjY[0] != adjY[1]) {
4508 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
4509 * depending on whether inversion is actually going to be applied
4510 * or not, which is determined by testing against the inversion
4511 * state variable used below, which will be either +1 or -1.
4512 */
4513 struct ureg_dst adj_temp = ureg_DECL_local_temporary(ureg);
4514
4515 ureg_CMP(ureg, adj_temp,
4516 ureg_scalar(wpostrans, invert ? 2 : 0),
4517 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
4518 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
4519 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
4520 } else {
4521 ureg_ADD(ureg, wpos_temp, wpos_input,
4522 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
4523 }
4524 wpos_input = ureg_src(wpos_temp);
4525 } else {
4526 /* MOV wpos_temp, input[wpos]
4527 */
4528 ureg_MOV( ureg, wpos_temp, wpos_input );
4529 }
4530
4531 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
4532 * inversion/identity, or the other way around if we're drawing to an FBO.
4533 */
4534 if (invert) {
4535 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
4536 */
4537 ureg_MAD( ureg,
4538 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4539 wpos_input,
4540 ureg_scalar(wpostrans, 0),
4541 ureg_scalar(wpostrans, 1));
4542 } else {
4543 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
4544 */
4545 ureg_MAD( ureg,
4546 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
4547 wpos_input,
4548 ureg_scalar(wpostrans, 2),
4549 ureg_scalar(wpostrans, 3));
4550 }
4551
4552 /* Use wpos_temp as position input from here on:
4553 */
4554 t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp);
4555 }
4556
4557
4558 /**
4559 * Emit fragment position/ooordinate code.
4560 */
4561 static void
4562 emit_wpos(struct st_context *st,
4563 struct st_translate *t,
4564 const struct gl_program *program,
4565 struct ureg_program *ureg)
4566 {
4567 const struct gl_fragment_program *fp =
4568 (const struct gl_fragment_program *) program;
4569 struct pipe_screen *pscreen = st->pipe->screen;
4570 GLfloat adjX = 0.0f;
4571 GLfloat adjY[2] = { 0.0f, 0.0f };
4572 boolean invert = FALSE;
4573
4574 /* Query the pixel center conventions supported by the pipe driver and set
4575 * adjX, adjY to help out if it cannot handle the requested one internally.
4576 *
4577 * The bias of the y-coordinate depends on whether y-inversion takes place
4578 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
4579 * drawing to an FBO (causes additional inversion), and whether the the pipe
4580 * driver origin and the requested origin differ (the latter condition is
4581 * stored in the 'invert' variable).
4582 *
4583 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
4584 *
4585 * center shift only:
4586 * i -> h: +0.5
4587 * h -> i: -0.5
4588 *
4589 * inversion only:
4590 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
4591 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
4592 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
4593 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
4594 *
4595 * inversion and center shift:
4596 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
4597 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
4598 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
4599 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
4600 */
4601 if (fp->OriginUpperLeft) {
4602 /* Fragment shader wants origin in upper-left */
4603 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
4604 /* the driver supports upper-left origin */
4605 }
4606 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
4607 /* the driver supports lower-left origin, need to invert Y */
4608 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4609 invert = TRUE;
4610 }
4611 else
4612 assert(0);
4613 }
4614 else {
4615 /* Fragment shader wants origin in lower-left */
4616 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
4617 /* the driver supports lower-left origin */
4618 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
4619 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
4620 /* the driver supports upper-left origin, need to invert Y */
4621 invert = TRUE;
4622 else
4623 assert(0);
4624 }
4625
4626 if (fp->PixelCenterInteger) {
4627 /* Fragment shader wants pixel center integer */
4628 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4629 /* the driver supports pixel center integer */
4630 adjY[1] = 1.0f;
4631 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4632 }
4633 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4634 /* the driver supports pixel center half integer, need to bias X,Y */
4635 adjX = -0.5f;
4636 adjY[0] = -0.5f;
4637 adjY[1] = 0.5f;
4638 }
4639 else
4640 assert(0);
4641 }
4642 else {
4643 /* Fragment shader wants pixel center half integer */
4644 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
4645 /* the driver supports pixel center half integer */
4646 }
4647 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
4648 /* the driver supports pixel center integer, need to bias X,Y */
4649 adjX = adjY[0] = adjY[1] = 0.5f;
4650 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
4651 }
4652 else
4653 assert(0);
4654 }
4655
4656 /* we invert after adjustment so that we avoid the MOV to temporary,
4657 * and reuse the adjustment ADD instead */
4658 emit_wpos_adjustment(t, program, invert, adjX, adjY);
4659 }
4660
4661 /**
4662 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
4663 * TGSI uses +1 for front, -1 for back.
4664 * This function converts the TGSI value to the GL value. Simply clamping/
4665 * saturating the value to [0,1] does the job.
4666 */
4667 static void
4668 emit_face_var(struct st_translate *t)
4669 {
4670 struct ureg_program *ureg = t->ureg;
4671 struct ureg_dst face_temp = ureg_DECL_temporary(ureg);
4672 struct ureg_src face_input = t->inputs[t->inputMapping[VARYING_SLOT_FACE]];
4673
4674 /* MOV_SAT face_temp, input[face] */
4675 face_temp = ureg_saturate(face_temp);
4676 ureg_MOV(ureg, face_temp, face_input);
4677
4678 /* Use face_temp as face input from here on: */
4679 t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp);
4680 }
4681
4682 static void
4683 emit_edgeflags(struct st_translate *t)
4684 {
4685 struct ureg_program *ureg = t->ureg;
4686 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]];
4687 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
4688
4689 ureg_MOV(ureg, edge_dst, edge_src);
4690 }
4691
4692 /**
4693 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
4694 * \param program the program to translate
4695 * \param numInputs number of input registers used
4696 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
4697 * input indexes
4698 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
4699 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
4700 * each input
4701 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
4702 * \param numOutputs number of output registers used
4703 * \param outputMapping maps Mesa fragment program outputs to TGSI
4704 * generic outputs
4705 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
4706 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
4707 * each output
4708 *
4709 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
4710 */
4711 extern "C" enum pipe_error
4712 st_translate_program(
4713 struct gl_context *ctx,
4714 uint procType,
4715 struct ureg_program *ureg,
4716 glsl_to_tgsi_visitor *program,
4717 const struct gl_program *proginfo,
4718 GLuint numInputs,
4719 const GLuint inputMapping[],
4720 const ubyte inputSemanticName[],
4721 const ubyte inputSemanticIndex[],
4722 const GLuint interpMode[],
4723 const GLboolean is_centroid[],
4724 GLuint numOutputs,
4725 const GLuint outputMapping[],
4726 const ubyte outputSemanticName[],
4727 const ubyte outputSemanticIndex[],
4728 boolean passthrough_edgeflags,
4729 boolean clamp_color)
4730 {
4731 struct st_translate *t;
4732 unsigned i;
4733 enum pipe_error ret = PIPE_OK;
4734
4735 assert(numInputs <= Elements(t->inputs));
4736 assert(numOutputs <= Elements(t->outputs));
4737
4738 t = CALLOC_STRUCT(st_translate);
4739 if (!t) {
4740 ret = PIPE_ERROR_OUT_OF_MEMORY;
4741 goto out;
4742 }
4743
4744 memset(t, 0, sizeof *t);
4745
4746 t->procType = procType;
4747 t->inputMapping = inputMapping;
4748 t->outputMapping = outputMapping;
4749 t->ureg = ureg;
4750
4751 if (program->shader_program) {
4752 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) {
4753 struct gl_uniform_storage *const storage =
4754 &program->shader_program->UniformStorage[i];
4755
4756 _mesa_uniform_detach_all_driver_storage(storage);
4757 }
4758 }
4759
4760 /*
4761 * Declare input attributes.
4762 */
4763 if (procType == TGSI_PROCESSOR_FRAGMENT) {
4764 for (i = 0; i < numInputs; i++) {
4765 t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg,
4766 inputSemanticName[i],
4767 inputSemanticIndex[i],
4768 interpMode[i], 0,
4769 is_centroid[i]);
4770 }
4771
4772 if (proginfo->InputsRead & VARYING_BIT_POS) {
4773 /* Must do this after setting up t->inputs, and before
4774 * emitting constant references, below:
4775 */
4776 emit_wpos(st_context(ctx), t, proginfo, ureg);
4777 }
4778
4779 if (proginfo->InputsRead & VARYING_BIT_FACE)
4780 emit_face_var(t);
4781
4782 /*
4783 * Declare output attributes.
4784 */
4785 for (i = 0; i < numOutputs; i++) {
4786 switch (outputSemanticName[i]) {
4787 case TGSI_SEMANTIC_POSITION:
4788 t->outputs[i] = ureg_DECL_output(ureg,
4789 TGSI_SEMANTIC_POSITION, /* Z/Depth */
4790 outputSemanticIndex[i]);
4791 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z);
4792 break;
4793 case TGSI_SEMANTIC_STENCIL:
4794 t->outputs[i] = ureg_DECL_output(ureg,
4795 TGSI_SEMANTIC_STENCIL, /* Stencil */
4796 outputSemanticIndex[i]);
4797 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y);
4798 break;
4799 case TGSI_SEMANTIC_COLOR:
4800 t->outputs[i] = ureg_DECL_output(ureg,
4801 TGSI_SEMANTIC_COLOR,
4802 outputSemanticIndex[i]);
4803 break;
4804 default:
4805 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR");
4806 ret = PIPE_ERROR_BAD_INPUT;
4807 goto out;
4808 }
4809 }
4810 }
4811 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
4812 for (i = 0; i < numInputs; i++) {
4813 t->inputs[i] = ureg_DECL_gs_input(ureg,
4814 i,
4815 inputSemanticName[i],
4816 inputSemanticIndex[i]);
4817 }
4818
4819 for (i = 0; i < numOutputs; i++) {
4820 t->outputs[i] = ureg_DECL_output(ureg,
4821 outputSemanticName[i],
4822 outputSemanticIndex[i]);
4823 }
4824 }
4825 else {
4826 assert(procType == TGSI_PROCESSOR_VERTEX);
4827
4828 for (i = 0; i < numInputs; i++) {
4829 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
4830 }
4831
4832 for (i = 0; i < numOutputs; i++) {
4833 t->outputs[i] = ureg_DECL_output(ureg,
4834 outputSemanticName[i],
4835 outputSemanticIndex[i]);
4836 }
4837 if (passthrough_edgeflags)
4838 emit_edgeflags(t);
4839 }
4840
4841 /* Declare address register.
4842 */
4843 if (program->num_address_regs > 0) {
4844 assert(program->num_address_regs == 1);
4845 t->address[0] = ureg_DECL_address(ureg);
4846 }
4847
4848 /* Declare misc input registers
4849 */
4850 {
4851 GLbitfield sysInputs = proginfo->SystemValuesRead;
4852 unsigned numSys = 0;
4853 for (i = 0; sysInputs; i++) {
4854 if (sysInputs & (1 << i)) {
4855 unsigned semName = mesa_sysval_to_semantic[i];
4856 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
4857 if (semName == TGSI_SEMANTIC_INSTANCEID ||
4858 semName == TGSI_SEMANTIC_VERTEXID) {
4859 /* From Gallium perspective, these system values are always
4860 * integer, and require native integer support. However, if
4861 * native integer is supported on the vertex stage but not the
4862 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
4863 * assumes these system values are floats. To resolve the
4864 * inconsistency, we insert a U2F.
4865 */
4866 struct st_context *st = st_context(ctx);
4867 struct pipe_screen *pscreen = st->pipe->screen;
4868 assert(procType == TGSI_PROCESSOR_VERTEX);
4869 assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
4870 if (!ctx->Const.NativeIntegers) {
4871 struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
4872 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
4873 t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
4874 }
4875 }
4876 numSys++;
4877 sysInputs &= ~(1 << i);
4878 }
4879 }
4880 }
4881
4882 /* Copy over array sizes
4883 */
4884 memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array);
4885
4886 /* Emit constants and uniforms. TGSI uses a single index space for these,
4887 * so we put all the translated regs in t->constants.
4888 */
4889 if (proginfo->Parameters) {
4890 t->constants = (struct ureg_src *)
4891 calloc(proginfo->Parameters->NumParameters, sizeof(t->constants[0]));
4892 if (t->constants == NULL) {
4893 ret = PIPE_ERROR_OUT_OF_MEMORY;
4894 goto out;
4895 }
4896
4897 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
4898 switch (proginfo->Parameters->Parameters[i].Type) {
4899 case PROGRAM_ENV_PARAM:
4900 case PROGRAM_LOCAL_PARAM:
4901 case PROGRAM_STATE_VAR:
4902 case PROGRAM_UNIFORM:
4903 t->constants[i] = ureg_DECL_constant(ureg, i);
4904 break;
4905
4906 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect
4907 * addressing of the const buffer.
4908 * FIXME: Be smarter and recognize param arrays:
4909 * indirect addressing is only valid within the referenced
4910 * array.
4911 */
4912 case PROGRAM_CONSTANT:
4913 if (program->indirect_addr_consts)
4914 t->constants[i] = ureg_DECL_constant(ureg, i);
4915 else
4916 t->constants[i] = emit_immediate(t,
4917 proginfo->Parameters->ParameterValues[i],
4918 proginfo->Parameters->Parameters[i].DataType,
4919 4);
4920 break;
4921 default:
4922 break;
4923 }
4924 }
4925 }
4926
4927 if (program->shader_program) {
4928 unsigned num_ubos = program->shader_program->NumUniformBlocks;
4929
4930 for (i = 0; i < num_ubos; i++) {
4931 ureg_DECL_constant2D(t->ureg, 0, program->shader_program->UniformBlocks[i].UniformBufferSize / 4, i + 1);
4932 }
4933 }
4934
4935 /* Emit immediate values.
4936 */
4937 t->immediates = (struct ureg_src *)
4938 calloc(program->num_immediates, sizeof(struct ureg_src));
4939 if (t->immediates == NULL) {
4940 ret = PIPE_ERROR_OUT_OF_MEMORY;
4941 goto out;
4942 }
4943 i = 0;
4944 foreach_iter(exec_list_iterator, iter, program->immediates) {
4945 immediate_storage *imm = (immediate_storage *)iter.get();
4946 assert(i < program->num_immediates);
4947 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size);
4948 }
4949 assert(i == program->num_immediates);
4950
4951 /* texture samplers */
4952 for (i = 0; i < ctx->Const.FragmentProgram.MaxTextureImageUnits; i++) {
4953 if (program->samplers_used & (1 << i)) {
4954 t->samplers[i] = ureg_DECL_sampler(ureg, i);
4955 }
4956 }
4957
4958 /* Emit each instruction in turn:
4959 */
4960 foreach_iter(exec_list_iterator, iter, program->instructions) {
4961 set_insn_start(t, ureg_get_instruction_number(ureg));
4962 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get(),
4963 clamp_color);
4964 }
4965
4966 /* Fix up all emitted labels:
4967 */
4968 for (i = 0; i < t->labels_count; i++) {
4969 ureg_fixup_label(ureg, t->labels[i].token,
4970 t->insn[t->labels[i].branch_target]);
4971 }
4972
4973 if (program->shader_program) {
4974 /* This has to be done last. Any operation the can cause
4975 * prog->ParameterValues to get reallocated (e.g., anything that adds a
4976 * program constant) has to happen before creating this linkage.
4977 */
4978 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4979 if (program->shader_program->_LinkedShaders[i] == NULL)
4980 continue;
4981
4982 _mesa_associate_uniform_storage(ctx, program->shader_program,
4983 program->shader_program->_LinkedShaders[i]->Program->Parameters);
4984 }
4985 }
4986
4987 out:
4988 if (t) {
4989 free(t->insn);
4990 free(t->labels);
4991 free(t->constants);
4992 free(t->immediates);
4993
4994 if (t->error) {
4995 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4996 }
4997
4998 free(t);
4999 }
5000
5001 return ret;
5002 }
5003 /* ----------------------------- End TGSI code ------------------------------ */
5004
5005 /**
5006 * Convert a shader's GLSL IR into a Mesa gl_program, although without
5007 * generating Mesa IR.
5008 */
5009 static struct gl_program *
5010 get_mesa_program(struct gl_context *ctx,
5011 struct gl_shader_program *shader_program,
5012 struct gl_shader *shader)
5013 {
5014 glsl_to_tgsi_visitor* v;
5015 struct gl_program *prog;
5016 GLenum target;
5017 bool progress;
5018 struct gl_shader_compiler_options *options =
5019 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
5020 struct pipe_screen *pscreen = ctx->st->pipe->screen;
5021 unsigned ptarget;
5022
5023 switch (shader->Type) {
5024 case GL_VERTEX_SHADER:
5025 target = GL_VERTEX_PROGRAM_ARB;
5026 ptarget = PIPE_SHADER_VERTEX;
5027 break;
5028 case GL_FRAGMENT_SHADER:
5029 target = GL_FRAGMENT_PROGRAM_ARB;
5030 ptarget = PIPE_SHADER_FRAGMENT;
5031 break;
5032 case GL_GEOMETRY_SHADER:
5033 target = GL_GEOMETRY_PROGRAM_NV;
5034 ptarget = PIPE_SHADER_GEOMETRY;
5035 break;
5036 default:
5037 assert(!"should not be reached");
5038 return NULL;
5039 }
5040
5041 validate_ir_tree(shader->ir);
5042
5043 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
5044 if (!prog)
5045 return NULL;
5046 prog->Parameters = _mesa_new_parameter_list();
5047 v = new glsl_to_tgsi_visitor();
5048 v->ctx = ctx;
5049 v->prog = prog;
5050 v->shader_program = shader_program;
5051 v->options = options;
5052 v->glsl_version = ctx->Const.GLSLVersion;
5053 v->native_integers = ctx->Const.NativeIntegers;
5054
5055 v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget,
5056 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
5057
5058 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
5059 prog->Parameters);
5060
5061 /* Remove reads from output registers. */
5062 lower_output_reads(shader->ir);
5063
5064 /* Emit intermediate IR for main(). */
5065 visit_exec_list(shader->ir, v);
5066
5067 /* Now emit bodies for any functions that were used. */
5068 do {
5069 progress = GL_FALSE;
5070
5071 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
5072 function_entry *entry = (function_entry *)iter.get();
5073
5074 if (!entry->bgn_inst) {
5075 v->current_function = entry;
5076
5077 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB);
5078 entry->bgn_inst->function = entry;
5079
5080 visit_exec_list(&entry->sig->body, v);
5081
5082 glsl_to_tgsi_instruction *last;
5083 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
5084 if (last->op != TGSI_OPCODE_RET)
5085 v->emit(NULL, TGSI_OPCODE_RET);
5086
5087 glsl_to_tgsi_instruction *end;
5088 end = v->emit(NULL, TGSI_OPCODE_ENDSUB);
5089 end->function = entry;
5090
5091 progress = GL_TRUE;
5092 }
5093 }
5094 } while (progress);
5095
5096 #if 0
5097 /* Print out some information (for debugging purposes) used by the
5098 * optimization passes. */
5099 for (i=0; i < v->next_temp; i++) {
5100 int fr = v->get_first_temp_read(i);
5101 int fw = v->get_first_temp_write(i);
5102 int lr = v->get_last_temp_read(i);
5103 int lw = v->get_last_temp_write(i);
5104
5105 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
5106 assert(fw <= fr);
5107 }
5108 #endif
5109
5110 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
5111 v->simplify_cmp();
5112 v->copy_propagate();
5113 while (v->eliminate_dead_code_advanced());
5114
5115 v->eliminate_dead_code();
5116 v->merge_registers();
5117 v->renumber_registers();
5118
5119 /* Write the END instruction. */
5120 v->emit(NULL, TGSI_OPCODE_END);
5121
5122 if (ctx->Shader.Flags & GLSL_DUMP) {
5123 printf("\n");
5124 printf("GLSL IR for linked %s program %d:\n",
5125 _mesa_glsl_shader_target_name(shader->Type),
5126 shader_program->Name);
5127 _mesa_print_ir(shader->ir, NULL);
5128 printf("\n");
5129 printf("\n");
5130 fflush(stdout);
5131 }
5132
5133 prog->Instructions = NULL;
5134 prog->NumInstructions = 0;
5135
5136 do_set_program_inouts(shader->ir, prog, shader->Type);
5137 count_resources(v, prog);
5138
5139 _mesa_reference_program(ctx, &shader->Program, prog);
5140
5141 /* This has to be done last. Any operation the can cause
5142 * prog->ParameterValues to get reallocated (e.g., anything that adds a
5143 * program constant) has to happen before creating this linkage.
5144 */
5145 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
5146 if (!shader_program->LinkStatus) {
5147 return NULL;
5148 }
5149
5150 struct st_vertex_program *stvp;
5151 struct st_fragment_program *stfp;
5152 struct st_geometry_program *stgp;
5153
5154 switch (shader->Type) {
5155 case GL_VERTEX_SHADER:
5156 stvp = (struct st_vertex_program *)prog;
5157 stvp->glsl_to_tgsi = v;
5158 break;
5159 case GL_FRAGMENT_SHADER:
5160 stfp = (struct st_fragment_program *)prog;
5161 stfp->glsl_to_tgsi = v;
5162 break;
5163 case GL_GEOMETRY_SHADER:
5164 stgp = (struct st_geometry_program *)prog;
5165 stgp->glsl_to_tgsi = v;
5166 break;
5167 default:
5168 assert(!"should not be reached");
5169 return NULL;
5170 }
5171
5172 return prog;
5173 }
5174
5175 extern "C" {
5176
5177 struct gl_shader *
5178 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
5179 {
5180 struct gl_shader *shader;
5181 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
5182 type == GL_GEOMETRY_SHADER_ARB);
5183 shader = rzalloc(NULL, struct gl_shader);
5184 if (shader) {
5185 shader->Type = type;
5186 shader->Name = name;
5187 _mesa_init_shader(ctx, shader);
5188 }
5189 return shader;
5190 }
5191
5192 struct gl_shader_program *
5193 st_new_shader_program(struct gl_context *ctx, GLuint name)
5194 {
5195 struct gl_shader_program *shProg;
5196 shProg = rzalloc(NULL, struct gl_shader_program);
5197 if (shProg) {
5198 shProg->Name = name;
5199 _mesa_init_shader_program(ctx, shProg);
5200 }
5201 return shProg;
5202 }
5203
5204 /**
5205 * Link a shader.
5206 * Called via ctx->Driver.LinkShader()
5207 * This actually involves converting GLSL IR into an intermediate TGSI-like IR
5208 * with code lowering and other optimizations.
5209 */
5210 GLboolean
5211 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
5212 {
5213 assert(prog->LinkStatus);
5214
5215 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5216 if (prog->_LinkedShaders[i] == NULL)
5217 continue;
5218
5219 bool progress;
5220 exec_list *ir = prog->_LinkedShaders[i]->ir;
5221 const struct gl_shader_compiler_options *options =
5222 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
5223
5224 /* If there are forms of indirect addressing that the driver
5225 * cannot handle, perform the lowering pass.
5226 */
5227 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput ||
5228 options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) {
5229 lower_variable_index_to_cond_assign(ir,
5230 options->EmitNoIndirectInput,
5231 options->EmitNoIndirectOutput,
5232 options->EmitNoIndirectTemp,
5233 options->EmitNoIndirectUniform);
5234 }
5235
5236 if (ctx->Extensions.ARB_shading_language_packing) {
5237 unsigned lower_inst = LOWER_PACK_SNORM_2x16 |
5238 LOWER_UNPACK_SNORM_2x16 |
5239 LOWER_PACK_UNORM_2x16 |
5240 LOWER_UNPACK_UNORM_2x16 |
5241 LOWER_PACK_SNORM_4x8 |
5242 LOWER_UNPACK_SNORM_4x8 |
5243 LOWER_UNPACK_UNORM_4x8 |
5244 LOWER_PACK_UNORM_4x8 |
5245 LOWER_PACK_HALF_2x16 |
5246 LOWER_UNPACK_HALF_2x16;
5247
5248 lower_packing_builtins(ir, lower_inst);
5249 }
5250
5251 do_mat_op_to_vec(ir);
5252 lower_instructions(ir,
5253 MOD_TO_FRACT |
5254 DIV_TO_MUL_RCP |
5255 EXP_TO_EXP2 |
5256 LOG_TO_LOG2 |
5257 (options->EmitNoPow ? POW_TO_EXP2 : 0) |
5258 (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0));
5259
5260 lower_ubo_reference(prog->_LinkedShaders[i], ir);
5261 do_vec_index_to_cond_assign(ir);
5262 lower_vector_insert(ir, true);
5263 lower_quadop_vector(ir, false);
5264 lower_noise(ir);
5265 if (options->MaxIfDepth == 0) {
5266 lower_discard(ir);
5267 }
5268
5269 do {
5270 progress = false;
5271
5272 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
5273
5274 progress = do_common_optimization(ir, true, true,
5275 options->MaxUnrollIterations, options)
5276 || progress;
5277
5278 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
5279
5280 } while (progress);
5281
5282 validate_ir_tree(ir);
5283 }
5284
5285 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
5286 struct gl_program *linked_prog;
5287
5288 if (prog->_LinkedShaders[i] == NULL)
5289 continue;
5290
5291 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
5292
5293 if (linked_prog) {
5294 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5295 linked_prog);
5296 if (!ctx->Driver.ProgramStringNotify(ctx,
5297 _mesa_program_index_to_target(i),
5298 linked_prog)) {
5299 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
5300 NULL);
5301 _mesa_reference_program(ctx, &linked_prog, NULL);
5302 return GL_FALSE;
5303 }
5304 }
5305
5306 _mesa_reference_program(ctx, &linked_prog, NULL);
5307 }
5308
5309 return GL_TRUE;
5310 }
5311
5312 void
5313 st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi,
5314 const GLuint outputMapping[],
5315 struct pipe_stream_output_info *so)
5316 {
5317 unsigned i;
5318 struct gl_transform_feedback_info *info =
5319 &glsl_to_tgsi->shader_program->LinkedTransformFeedback;
5320
5321 for (i = 0; i < info->NumOutputs; i++) {
5322 so->output[i].register_index =
5323 outputMapping[info->Outputs[i].OutputRegister];
5324 so->output[i].start_component = info->Outputs[i].ComponentOffset;
5325 so->output[i].num_components = info->Outputs[i].NumComponents;
5326 so->output[i].output_buffer = info->Outputs[i].OutputBuffer;
5327 so->output[i].dst_offset = info->Outputs[i].DstOffset;
5328 }
5329
5330 for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
5331 so->stride[i] = info->BufferStride[i];
5332 }
5333 so->num_outputs = info->NumOutputs;
5334 }
5335
5336 } /* extern "C" */