st/mesa: Add a GLSL IR to TGSI translator.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_tgsi.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 * Copyright © 2011 Bryan Cain
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
25 */
26
27 /**
28 * \file glsl_to_tgsi.cpp
29 *
30 * Translate GLSL IR to Mesa's gl_program representation and to TGSI.
31 */
32
33 #include <stdio.h>
34 #include "main/compiler.h"
35 #include "ir.h"
36 #include "ir_visitor.h"
37 #include "ir_print_visitor.h"
38 #include "ir_expression_flattening.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44
45 extern "C" {
46 #include "main/mtypes.h"
47 #include "main/shaderapi.h"
48 #include "main/shaderobj.h"
49 #include "main/uniforms.h"
50 #include "program/hash_table.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_uniform.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
58
59 #include "pipe/p_compiler.h"
60 #include "pipe/p_context.h"
61 #include "pipe/p_screen.h"
62 #include "pipe/p_shader_tokens.h"
63 #include "pipe/p_state.h"
64 #include "util/u_math.h"
65 #include "tgsi/tgsi_ureg.h"
66 #include "tgsi/tgsi_dump.h"
67 #include "st_context.h"
68 #include "st_program.h"
69 #include "st_glsl_to_tgsi.h"
70 #include "st_mesa_to_tgsi.h"
71
72 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
73 (1 << PROGRAM_ENV_PARAM) | \
74 (1 << PROGRAM_STATE_VAR) | \
75 (1 << PROGRAM_NAMED_PARAM) | \
76 (1 << PROGRAM_CONSTANT) | \
77 (1 << PROGRAM_UNIFORM))
78 }
79
80 class st_src_reg;
81 class st_dst_reg;
82
83 static int swizzle_for_size(int size);
84
85 /**
86 * This struct is a corresponding struct to Mesa prog_src_register, with
87 * wider fields.
88 */
89 class st_src_reg {
90 public:
91 st_src_reg(gl_register_file file, int index, const glsl_type *type)
92 {
93 this->file = file;
94 this->index = index;
95 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
96 this->swizzle = swizzle_for_size(type->vector_elements);
97 else
98 this->swizzle = SWIZZLE_XYZW;
99 this->negate = 0;
100 this->reladdr = NULL;
101 }
102
103 st_src_reg()
104 {
105 this->file = PROGRAM_UNDEFINED;
106 this->index = 0;
107 this->swizzle = 0;
108 this->negate = 0;
109 this->reladdr = NULL;
110 }
111
112 explicit st_src_reg(st_dst_reg reg);
113
114 gl_register_file file; /**< PROGRAM_* from Mesa */
115 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
116 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
117 int negate; /**< NEGATE_XYZW mask from mesa */
118 /** Register index should be offset by the integer in this reg. */
119 st_src_reg *reladdr;
120 };
121
122 class st_dst_reg {
123 public:
124 st_dst_reg(gl_register_file file, int writemask)
125 {
126 this->file = file;
127 this->index = 0;
128 this->writemask = writemask;
129 this->cond_mask = COND_TR;
130 this->reladdr = NULL;
131 }
132
133 st_dst_reg()
134 {
135 this->file = PROGRAM_UNDEFINED;
136 this->index = 0;
137 this->writemask = 0;
138 this->cond_mask = COND_TR;
139 this->reladdr = NULL;
140 }
141
142 explicit st_dst_reg(st_src_reg reg);
143
144 gl_register_file file; /**< PROGRAM_* from Mesa */
145 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
146 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
147 GLuint cond_mask:4;
148 /** Register index should be offset by the integer in this reg. */
149 st_src_reg *reladdr;
150 };
151
152 st_src_reg::st_src_reg(st_dst_reg reg)
153 {
154 this->file = reg.file;
155 this->index = reg.index;
156 this->swizzle = SWIZZLE_XYZW;
157 this->negate = 0;
158 this->reladdr = NULL;
159 }
160
161 st_dst_reg::st_dst_reg(st_src_reg reg)
162 {
163 this->file = reg.file;
164 this->index = reg.index;
165 this->writemask = WRITEMASK_XYZW;
166 this->cond_mask = COND_TR;
167 this->reladdr = reg.reladdr;
168 }
169
170 class glsl_to_tgsi_instruction : public exec_node {
171 public:
172 /* Callers of this ralloc-based new need not call delete. It's
173 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
174 static void* operator new(size_t size, void *ctx)
175 {
176 void *node;
177
178 node = rzalloc_size(ctx, size);
179 assert(node != NULL);
180
181 return node;
182 }
183
184 enum prog_opcode op;
185 st_dst_reg dst;
186 st_src_reg src[3];
187 /** Pointer to the ir source this tree came from for debugging */
188 ir_instruction *ir;
189 GLboolean cond_update;
190 bool saturate;
191 int sampler; /**< sampler index */
192 int tex_target; /**< One of TEXTURE_*_INDEX */
193 GLboolean tex_shadow;
194
195 class function_entry *function; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
196 };
197
198 class variable_storage : public exec_node {
199 public:
200 variable_storage(ir_variable *var, gl_register_file file, int index)
201 : file(file), index(index), var(var)
202 {
203 /* empty */
204 }
205
206 gl_register_file file;
207 int index;
208 ir_variable *var; /* variable that maps to this, if any */
209 };
210
211 class function_entry : public exec_node {
212 public:
213 ir_function_signature *sig;
214
215 /**
216 * identifier of this function signature used by the program.
217 *
218 * At the point that Mesa instructions for function calls are
219 * generated, we don't know the address of the first instruction of
220 * the function body. So we make the BranchTarget that is called a
221 * small integer and rewrite them during set_branchtargets().
222 */
223 int sig_id;
224
225 /**
226 * Pointer to first instruction of the function body.
227 *
228 * Set during function body emits after main() is processed.
229 */
230 glsl_to_tgsi_instruction *bgn_inst;
231
232 /**
233 * Index of the first instruction of the function body in actual
234 * Mesa IR.
235 *
236 * Set after convertion from glsl_to_tgsi_instruction to prog_instruction.
237 */
238 int inst;
239
240 /** Storage for the return value. */
241 st_src_reg return_reg;
242 };
243
244 class glsl_to_tgsi_visitor : public ir_visitor {
245 public:
246 glsl_to_tgsi_visitor();
247 ~glsl_to_tgsi_visitor();
248
249 function_entry *current_function;
250
251 struct gl_context *ctx;
252 struct gl_program *prog;
253 struct gl_shader_program *shader_program;
254 struct gl_shader_compiler_options *options;
255
256 int next_temp;
257
258 int num_address_regs;
259 bool indirect_addr_temps;
260 bool indirect_addr_consts;
261
262 variable_storage *find_variable_storage(ir_variable *var);
263
264 function_entry *get_function_signature(ir_function_signature *sig);
265
266 st_src_reg get_temp(const glsl_type *type);
267 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr);
268
269 st_src_reg st_src_reg_for_float(float val);
270
271 /**
272 * \name Visit methods
273 *
274 * As typical for the visitor pattern, there must be one \c visit method for
275 * each concrete subclass of \c ir_instruction. Virtual base classes within
276 * the hierarchy should not have \c visit methods.
277 */
278 /*@{*/
279 virtual void visit(ir_variable *);
280 virtual void visit(ir_loop *);
281 virtual void visit(ir_loop_jump *);
282 virtual void visit(ir_function_signature *);
283 virtual void visit(ir_function *);
284 virtual void visit(ir_expression *);
285 virtual void visit(ir_swizzle *);
286 virtual void visit(ir_dereference_variable *);
287 virtual void visit(ir_dereference_array *);
288 virtual void visit(ir_dereference_record *);
289 virtual void visit(ir_assignment *);
290 virtual void visit(ir_constant *);
291 virtual void visit(ir_call *);
292 virtual void visit(ir_return *);
293 virtual void visit(ir_discard *);
294 virtual void visit(ir_texture *);
295 virtual void visit(ir_if *);
296 /*@}*/
297
298 st_src_reg result;
299
300 /** List of variable_storage */
301 exec_list variables;
302
303 /** List of function_entry */
304 exec_list function_signatures;
305 int next_signature_id;
306
307 /** List of glsl_to_tgsi_instruction */
308 exec_list instructions;
309
310 glsl_to_tgsi_instruction *emit(ir_instruction *ir, enum prog_opcode op);
311
312 glsl_to_tgsi_instruction *emit(ir_instruction *ir, enum prog_opcode op,
313 st_dst_reg dst, st_src_reg src0);
314
315 glsl_to_tgsi_instruction *emit(ir_instruction *ir, enum prog_opcode op,
316 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
317
318 glsl_to_tgsi_instruction *emit(ir_instruction *ir, enum prog_opcode op,
319 st_dst_reg dst,
320 st_src_reg src0, st_src_reg src1, st_src_reg src2);
321
322 /**
323 * Emit the correct dot-product instruction for the type of arguments
324 */
325 void emit_dp(ir_instruction *ir,
326 st_dst_reg dst,
327 st_src_reg src0,
328 st_src_reg src1,
329 unsigned elements);
330
331 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
332 st_dst_reg dst, st_src_reg src0);
333
334 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
335 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
336
337 void emit_scs(ir_instruction *ir, enum prog_opcode op,
338 st_dst_reg dst, const st_src_reg &src);
339
340 GLboolean try_emit_mad(ir_expression *ir,
341 int mul_operand);
342 GLboolean try_emit_sat(ir_expression *ir);
343
344 void emit_swz(ir_expression *ir);
345
346 bool process_move_condition(ir_rvalue *ir);
347
348 void rename_temp_register(int index, int new_index);
349 int get_first_temp_read(int index);
350 int get_first_temp_write(int index);
351 int get_last_temp_read(int index);
352 int get_last_temp_write(int index);
353
354 void copy_propagate(void);
355 void eliminate_dead_code(void);
356 void merge_registers(void);
357 void renumber_registers(void);
358
359 void *mem_ctx;
360 };
361
362 static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, NULL);
363
364 static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP);
365
366 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X);
367
368 static void
369 fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3);
370
371 static void
372 fail_link(struct gl_shader_program *prog, const char *fmt, ...)
373 {
374 va_list args;
375 va_start(args, fmt);
376 ralloc_vasprintf_append(&prog->InfoLog, fmt, args);
377 va_end(args);
378
379 prog->LinkStatus = GL_FALSE;
380 }
381
382 static int
383 swizzle_for_size(int size)
384 {
385 int size_swizzles[4] = {
386 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
387 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
388 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
389 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
390 };
391
392 assert((size >= 1) && (size <= 4));
393 return size_swizzles[size - 1];
394 }
395
396 glsl_to_tgsi_instruction *
397 glsl_to_tgsi_visitor::emit(ir_instruction *ir, enum prog_opcode op,
398 st_dst_reg dst,
399 st_src_reg src0, st_src_reg src1, st_src_reg src2)
400 {
401 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction();
402 int num_reladdr = 0, i;
403
404 /* If we have to do relative addressing, we want to load the ARL
405 * reg directly for one of the regs, and preload the other reladdr
406 * sources into temps.
407 */
408 num_reladdr += dst.reladdr != NULL;
409 num_reladdr += src0.reladdr != NULL;
410 num_reladdr += src1.reladdr != NULL;
411 num_reladdr += src2.reladdr != NULL;
412
413 reladdr_to_temp(ir, &src2, &num_reladdr);
414 reladdr_to_temp(ir, &src1, &num_reladdr);
415 reladdr_to_temp(ir, &src0, &num_reladdr);
416
417 if (dst.reladdr) {
418 emit(ir, OPCODE_ARL, address_reg, *dst.reladdr);
419 num_reladdr--;
420 }
421 assert(num_reladdr == 0);
422
423 inst->op = op;
424 inst->dst = dst;
425 inst->src[0] = src0;
426 inst->src[1] = src1;
427 inst->src[2] = src2;
428 inst->ir = ir;
429
430 inst->function = NULL;
431
432 if (op == OPCODE_ARL)
433 this->num_address_regs = 1;
434
435 /* Update indirect addressing status used by TGSI */
436 if (dst.reladdr) {
437 switch(dst.file) {
438 case PROGRAM_TEMPORARY:
439 this->indirect_addr_temps = true;
440 break;
441 case PROGRAM_LOCAL_PARAM:
442 case PROGRAM_ENV_PARAM:
443 case PROGRAM_STATE_VAR:
444 case PROGRAM_NAMED_PARAM:
445 case PROGRAM_CONSTANT:
446 case PROGRAM_UNIFORM:
447 this->indirect_addr_consts = true;
448 break;
449 default:
450 break;
451 }
452 }
453 else {
454 for (i=0; i<3; i++) {
455 if(inst->src[i].reladdr) {
456 switch(dst.file) {
457 case PROGRAM_TEMPORARY:
458 this->indirect_addr_temps = true;
459 break;
460 case PROGRAM_LOCAL_PARAM:
461 case PROGRAM_ENV_PARAM:
462 case PROGRAM_STATE_VAR:
463 case PROGRAM_NAMED_PARAM:
464 case PROGRAM_CONSTANT:
465 case PROGRAM_UNIFORM:
466 this->indirect_addr_consts = true;
467 break;
468 default:
469 break;
470 }
471 }
472 }
473 }
474
475 this->instructions.push_tail(inst);
476
477 return inst;
478 }
479
480
481 glsl_to_tgsi_instruction *
482 glsl_to_tgsi_visitor::emit(ir_instruction *ir, enum prog_opcode op,
483 st_dst_reg dst, st_src_reg src0, st_src_reg src1)
484 {
485 return emit(ir, op, dst, src0, src1, undef_src);
486 }
487
488 glsl_to_tgsi_instruction *
489 glsl_to_tgsi_visitor::emit(ir_instruction *ir, enum prog_opcode op,
490 st_dst_reg dst, st_src_reg src0)
491 {
492 assert(dst.writemask != 0);
493 return emit(ir, op, dst, src0, undef_src, undef_src);
494 }
495
496 glsl_to_tgsi_instruction *
497 glsl_to_tgsi_visitor::emit(ir_instruction *ir, enum prog_opcode op)
498 {
499 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
500 }
501
502 void
503 glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir,
504 st_dst_reg dst, st_src_reg src0, st_src_reg src1,
505 unsigned elements)
506 {
507 static const gl_inst_opcode dot_opcodes[] = {
508 OPCODE_DP2, OPCODE_DP3, OPCODE_DP4
509 };
510
511 emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
512 }
513
514 /**
515 * Emits Mesa scalar opcodes to produce unique answers across channels.
516 *
517 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
518 * channel determines the result across all channels. So to do a vec4
519 * of this operation, we want to emit a scalar per source channel used
520 * to produce dest channels.
521 */
522 void
523 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
524 st_dst_reg dst,
525 st_src_reg orig_src0, st_src_reg orig_src1)
526 {
527 int i, j;
528 int done_mask = ~dst.writemask;
529
530 /* Mesa RCP is a scalar operation splatting results to all channels,
531 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
532 * dst channels.
533 */
534 for (i = 0; i < 4; i++) {
535 GLuint this_mask = (1 << i);
536 glsl_to_tgsi_instruction *inst;
537 st_src_reg src0 = orig_src0;
538 st_src_reg src1 = orig_src1;
539
540 if (done_mask & this_mask)
541 continue;
542
543 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
544 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
545 for (j = i + 1; j < 4; j++) {
546 /* If there is another enabled component in the destination that is
547 * derived from the same inputs, generate its value on this pass as
548 * well.
549 */
550 if (!(done_mask & (1 << j)) &&
551 GET_SWZ(src0.swizzle, j) == src0_swiz &&
552 GET_SWZ(src1.swizzle, j) == src1_swiz) {
553 this_mask |= (1 << j);
554 }
555 }
556 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
557 src0_swiz, src0_swiz);
558 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
559 src1_swiz, src1_swiz);
560
561 inst = emit(ir, op, dst, src0, src1);
562 inst->dst.writemask = this_mask;
563 done_mask |= this_mask;
564 }
565 }
566
567 void
568 glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
569 st_dst_reg dst, st_src_reg src0)
570 {
571 st_src_reg undef = undef_src;
572
573 undef.swizzle = SWIZZLE_XXXX;
574
575 emit_scalar(ir, op, dst, src0, undef);
576 }
577
578 /**
579 * Emit an OPCODE_SCS instruction
580 *
581 * The \c SCS opcode functions a bit differently than the other Mesa (or
582 * ARB_fragment_program) opcodes. Instead of splatting its result across all
583 * four components of the destination, it writes one value to the \c x
584 * component and another value to the \c y component.
585 *
586 * \param ir IR instruction being processed
587 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
588 * value is desired.
589 * \param dst Destination register
590 * \param src Source register
591 */
592 void
593 glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, enum prog_opcode op,
594 st_dst_reg dst,
595 const st_src_reg &src)
596 {
597 /* Vertex programs cannot use the SCS opcode.
598 */
599 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
600 emit_scalar(ir, op, dst, src);
601 return;
602 }
603
604 const unsigned component = (op == OPCODE_SIN) ? 0 : 1;
605 const unsigned scs_mask = (1U << component);
606 int done_mask = ~dst.writemask;
607 st_src_reg tmp;
608
609 assert(op == OPCODE_SIN || op == OPCODE_COS);
610
611 /* If there are compnents in the destination that differ from the component
612 * that will be written by the SCS instrution, we'll need a temporary.
613 */
614 if (scs_mask != unsigned(dst.writemask)) {
615 tmp = get_temp(glsl_type::vec4_type);
616 }
617
618 for (unsigned i = 0; i < 4; i++) {
619 unsigned this_mask = (1U << i);
620 st_src_reg src0 = src;
621
622 if ((done_mask & this_mask) != 0)
623 continue;
624
625 /* The source swizzle specified which component of the source generates
626 * sine / cosine for the current component in the destination. The SCS
627 * instruction requires that this value be swizzle to the X component.
628 * Replace the current swizzle with a swizzle that puts the source in
629 * the X component.
630 */
631 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
632
633 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
634 src0_swiz, src0_swiz);
635 for (unsigned j = i + 1; j < 4; j++) {
636 /* If there is another enabled component in the destination that is
637 * derived from the same inputs, generate its value on this pass as
638 * well.
639 */
640 if (!(done_mask & (1 << j)) &&
641 GET_SWZ(src0.swizzle, j) == src0_swiz) {
642 this_mask |= (1 << j);
643 }
644 }
645
646 if (this_mask != scs_mask) {
647 glsl_to_tgsi_instruction *inst;
648 st_dst_reg tmp_dst = st_dst_reg(tmp);
649
650 /* Emit the SCS instruction.
651 */
652 inst = emit(ir, OPCODE_SCS, tmp_dst, src0);
653 inst->dst.writemask = scs_mask;
654
655 /* Move the result of the SCS instruction to the desired location in
656 * the destination.
657 */
658 tmp.swizzle = MAKE_SWIZZLE4(component, component,
659 component, component);
660 inst = emit(ir, OPCODE_SCS, dst, tmp);
661 inst->dst.writemask = this_mask;
662 } else {
663 /* Emit the SCS instruction to write directly to the destination.
664 */
665 glsl_to_tgsi_instruction *inst = emit(ir, OPCODE_SCS, dst, src0);
666 inst->dst.writemask = scs_mask;
667 }
668
669 done_mask |= this_mask;
670 }
671 }
672
673 struct st_src_reg
674 glsl_to_tgsi_visitor::st_src_reg_for_float(float val)
675 {
676 st_src_reg src(PROGRAM_CONSTANT, -1, NULL);
677
678 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
679 &val, 1, &src.swizzle);
680
681 return src;
682 }
683
684 static int
685 type_size(const struct glsl_type *type)
686 {
687 unsigned int i;
688 int size;
689
690 switch (type->base_type) {
691 case GLSL_TYPE_UINT:
692 case GLSL_TYPE_INT:
693 case GLSL_TYPE_FLOAT:
694 case GLSL_TYPE_BOOL:
695 if (type->is_matrix()) {
696 return type->matrix_columns;
697 } else {
698 /* Regardless of size of vector, it gets a vec4. This is bad
699 * packing for things like floats, but otherwise arrays become a
700 * mess. Hopefully a later pass over the code can pack scalars
701 * down if appropriate.
702 */
703 return 1;
704 }
705 case GLSL_TYPE_ARRAY:
706 assert(type->length > 0);
707 return type_size(type->fields.array) * type->length;
708 case GLSL_TYPE_STRUCT:
709 size = 0;
710 for (i = 0; i < type->length; i++) {
711 size += type_size(type->fields.structure[i].type);
712 }
713 return size;
714 case GLSL_TYPE_SAMPLER:
715 /* Samplers take up one slot in UNIFORMS[], but they're baked in
716 * at link time.
717 */
718 return 1;
719 default:
720 assert(0);
721 return 0;
722 }
723 }
724
725 /**
726 * In the initial pass of codegen, we assign temporary numbers to
727 * intermediate results. (not SSA -- variable assignments will reuse
728 * storage). Actual register allocation for the Mesa VM occurs in a
729 * pass over the Mesa IR later.
730 */
731 st_src_reg
732 glsl_to_tgsi_visitor::get_temp(const glsl_type *type)
733 {
734 st_src_reg src;
735 int swizzle[4];
736 int i;
737
738 src.file = PROGRAM_TEMPORARY;
739 src.index = next_temp;
740 src.reladdr = NULL;
741 next_temp += type_size(type);
742
743 if (type->is_array() || type->is_record()) {
744 src.swizzle = SWIZZLE_NOOP;
745 } else {
746 for (i = 0; i < type->vector_elements; i++)
747 swizzle[i] = i;
748 for (; i < 4; i++)
749 swizzle[i] = type->vector_elements - 1;
750 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1],
751 swizzle[2], swizzle[3]);
752 }
753 src.negate = 0;
754
755 return src;
756 }
757
758 variable_storage *
759 glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var)
760 {
761
762 variable_storage *entry;
763
764 foreach_iter(exec_list_iterator, iter, this->variables) {
765 entry = (variable_storage *)iter.get();
766
767 if (entry->var == var)
768 return entry;
769 }
770
771 return NULL;
772 }
773
774 void
775 glsl_to_tgsi_visitor::visit(ir_variable *ir)
776 {
777 if (strcmp(ir->name, "gl_FragCoord") == 0) {
778 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
779
780 fp->OriginUpperLeft = ir->origin_upper_left;
781 fp->PixelCenterInteger = ir->pixel_center_integer;
782
783 } else if (strcmp(ir->name, "gl_FragDepth") == 0) {
784 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
785 switch (ir->depth_layout) {
786 case ir_depth_layout_none:
787 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_NONE;
788 break;
789 case ir_depth_layout_any:
790 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_ANY;
791 break;
792 case ir_depth_layout_greater:
793 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_GREATER;
794 break;
795 case ir_depth_layout_less:
796 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_LESS;
797 break;
798 case ir_depth_layout_unchanged:
799 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_UNCHANGED;
800 break;
801 default:
802 assert(0);
803 break;
804 }
805 }
806
807 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
808 unsigned int i;
809 const ir_state_slot *const slots = ir->state_slots;
810 assert(ir->state_slots != NULL);
811
812 /* Check if this statevar's setup in the STATE file exactly
813 * matches how we'll want to reference it as a
814 * struct/array/whatever. If not, then we need to move it into
815 * temporary storage and hope that it'll get copy-propagated
816 * out.
817 */
818 for (i = 0; i < ir->num_state_slots; i++) {
819 if (slots[i].swizzle != SWIZZLE_XYZW) {
820 break;
821 }
822 }
823
824 struct variable_storage *storage;
825 st_dst_reg dst;
826 if (i == ir->num_state_slots) {
827 /* We'll set the index later. */
828 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
829 this->variables.push_tail(storage);
830
831 dst = undef_dst;
832 } else {
833 /* The variable_storage constructor allocates slots based on the size
834 * of the type. However, this had better match the number of state
835 * elements that we're going to copy into the new temporary.
836 */
837 assert((int) ir->num_state_slots == type_size(ir->type));
838
839 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
840 this->next_temp);
841 this->variables.push_tail(storage);
842 this->next_temp += type_size(ir->type);
843
844 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index, NULL));
845 }
846
847
848 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
849 int index = _mesa_add_state_reference(this->prog->Parameters,
850 (gl_state_index *)slots[i].tokens);
851
852 if (storage->file == PROGRAM_STATE_VAR) {
853 if (storage->index == -1) {
854 storage->index = index;
855 } else {
856 assert(index == storage->index + (int)i);
857 }
858 } else {
859 st_src_reg src(PROGRAM_STATE_VAR, index, NULL);
860 src.swizzle = slots[i].swizzle;
861 emit(ir, OPCODE_MOV, dst, src);
862 /* even a float takes up a whole vec4 reg in a struct/array. */
863 dst.index++;
864 }
865 }
866
867 if (storage->file == PROGRAM_TEMPORARY &&
868 dst.index != storage->index + (int) ir->num_state_slots) {
869 fail_link(this->shader_program,
870 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n",
871 ir->name, dst.index - storage->index,
872 type_size(ir->type));
873 }
874 }
875 }
876
877 void
878 glsl_to_tgsi_visitor::visit(ir_loop *ir)
879 {
880 ir_dereference_variable *counter = NULL;
881
882 if (ir->counter != NULL)
883 counter = new(ir) ir_dereference_variable(ir->counter);
884
885 if (ir->from != NULL) {
886 assert(ir->counter != NULL);
887
888 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL);
889
890 a->accept(this);
891 delete a;
892 }
893
894 emit(NULL, OPCODE_BGNLOOP);
895
896 if (ir->to) {
897 ir_expression *e =
898 new(ir) ir_expression(ir->cmp, glsl_type::bool_type,
899 counter, ir->to);
900 ir_if *if_stmt = new(ir) ir_if(e);
901
902 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break);
903
904 if_stmt->then_instructions.push_tail(brk);
905
906 if_stmt->accept(this);
907
908 delete if_stmt;
909 delete e;
910 delete brk;
911 }
912
913 visit_exec_list(&ir->body_instructions, this);
914
915 if (ir->increment) {
916 ir_expression *e =
917 new(ir) ir_expression(ir_binop_add, counter->type,
918 counter, ir->increment);
919
920 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL);
921
922 a->accept(this);
923 delete a;
924 delete e;
925 }
926
927 emit(NULL, OPCODE_ENDLOOP);
928 }
929
930 void
931 glsl_to_tgsi_visitor::visit(ir_loop_jump *ir)
932 {
933 switch (ir->mode) {
934 case ir_loop_jump::jump_break:
935 emit(NULL, OPCODE_BRK);
936 break;
937 case ir_loop_jump::jump_continue:
938 emit(NULL, OPCODE_CONT);
939 break;
940 }
941 }
942
943
944 void
945 glsl_to_tgsi_visitor::visit(ir_function_signature *ir)
946 {
947 assert(0);
948 (void)ir;
949 }
950
951 void
952 glsl_to_tgsi_visitor::visit(ir_function *ir)
953 {
954 /* Ignore function bodies other than main() -- we shouldn't see calls to
955 * them since they should all be inlined before we get to glsl_to_tgsi.
956 */
957 if (strcmp(ir->name, "main") == 0) {
958 const ir_function_signature *sig;
959 exec_list empty;
960
961 sig = ir->matching_signature(&empty);
962
963 assert(sig);
964
965 foreach_iter(exec_list_iterator, iter, sig->body) {
966 ir_instruction *ir = (ir_instruction *)iter.get();
967
968 ir->accept(this);
969 }
970 }
971 }
972
973 GLboolean
974 glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
975 {
976 int nonmul_operand = 1 - mul_operand;
977 st_src_reg a, b, c;
978
979 ir_expression *expr = ir->operands[mul_operand]->as_expression();
980 if (!expr || expr->operation != ir_binop_mul)
981 return false;
982
983 expr->operands[0]->accept(this);
984 a = this->result;
985 expr->operands[1]->accept(this);
986 b = this->result;
987 ir->operands[nonmul_operand]->accept(this);
988 c = this->result;
989
990 this->result = get_temp(ir->type);
991 emit(ir, OPCODE_MAD, st_dst_reg(this->result), a, b, c);
992
993 return true;
994 }
995
996 GLboolean
997 glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir)
998 {
999 /* Saturates were only introduced to vertex programs in
1000 * NV_vertex_program3, so don't give them to drivers in the VP.
1001 */
1002 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
1003 return false;
1004
1005 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
1006 if (!sat_src)
1007 return false;
1008
1009 sat_src->accept(this);
1010 st_src_reg src = this->result;
1011
1012 this->result = get_temp(ir->type);
1013 glsl_to_tgsi_instruction *inst;
1014 inst = emit(ir, OPCODE_MOV, st_dst_reg(this->result), src);
1015 inst->saturate = true;
1016
1017 return true;
1018 }
1019
1020 void
1021 glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir,
1022 st_src_reg *reg, int *num_reladdr)
1023 {
1024 if (!reg->reladdr)
1025 return;
1026
1027 emit(ir, OPCODE_ARL, address_reg, *reg->reladdr);
1028
1029 if (*num_reladdr != 1) {
1030 st_src_reg temp = get_temp(glsl_type::vec4_type);
1031
1032 emit(ir, OPCODE_MOV, st_dst_reg(temp), *reg);
1033 *reg = temp;
1034 }
1035
1036 (*num_reladdr)--;
1037 }
1038
1039 void
1040 glsl_to_tgsi_visitor::emit_swz(ir_expression *ir)
1041 {
1042 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
1043 * This means that each of the operands is either an immediate value of -1,
1044 * 0, or 1, or is a component from one source register (possibly with
1045 * negation).
1046 */
1047 uint8_t components[4] = { 0 };
1048 bool negate[4] = { false };
1049 ir_variable *var = NULL;
1050
1051 for (unsigned i = 0; i < ir->type->vector_elements; i++) {
1052 ir_rvalue *op = ir->operands[i];
1053
1054 assert(op->type->is_scalar());
1055
1056 while (op != NULL) {
1057 switch (op->ir_type) {
1058 case ir_type_constant: {
1059
1060 assert(op->type->is_scalar());
1061
1062 const ir_constant *const c = op->as_constant();
1063 if (c->is_one()) {
1064 components[i] = SWIZZLE_ONE;
1065 } else if (c->is_zero()) {
1066 components[i] = SWIZZLE_ZERO;
1067 } else if (c->is_negative_one()) {
1068 components[i] = SWIZZLE_ONE;
1069 negate[i] = true;
1070 } else {
1071 assert(!"SWZ constant must be 0.0 or 1.0.");
1072 }
1073
1074 op = NULL;
1075 break;
1076 }
1077
1078 case ir_type_dereference_variable: {
1079 ir_dereference_variable *const deref =
1080 (ir_dereference_variable *) op;
1081
1082 assert((var == NULL) || (deref->var == var));
1083 components[i] = SWIZZLE_X;
1084 var = deref->var;
1085 op = NULL;
1086 break;
1087 }
1088
1089 case ir_type_expression: {
1090 ir_expression *const expr = (ir_expression *) op;
1091
1092 assert(expr->operation == ir_unop_neg);
1093 negate[i] = true;
1094
1095 op = expr->operands[0];
1096 break;
1097 }
1098
1099 case ir_type_swizzle: {
1100 ir_swizzle *const swiz = (ir_swizzle *) op;
1101
1102 components[i] = swiz->mask.x;
1103 op = swiz->val;
1104 break;
1105 }
1106
1107 default:
1108 assert(!"Should not get here.");
1109 return;
1110 }
1111 }
1112 }
1113
1114 assert(var != NULL);
1115
1116 ir_dereference_variable *const deref =
1117 new(mem_ctx) ir_dereference_variable(var);
1118
1119 this->result.file = PROGRAM_UNDEFINED;
1120 deref->accept(this);
1121 if (this->result.file == PROGRAM_UNDEFINED) {
1122 ir_print_visitor v;
1123 printf("Failed to get tree for expression operand:\n");
1124 deref->accept(&v);
1125 exit(1);
1126 }
1127
1128 st_src_reg src;
1129
1130 src = this->result;
1131 src.swizzle = MAKE_SWIZZLE4(components[0],
1132 components[1],
1133 components[2],
1134 components[3]);
1135 src.negate = ((unsigned(negate[0]) << 0)
1136 | (unsigned(negate[1]) << 1)
1137 | (unsigned(negate[2]) << 2)
1138 | (unsigned(negate[3]) << 3));
1139
1140 /* Storage for our result. Ideally for an assignment we'd be using the
1141 * actual storage for the result here, instead.
1142 */
1143 const st_src_reg result_src = get_temp(ir->type);
1144 st_dst_reg result_dst = st_dst_reg(result_src);
1145
1146 /* Limit writes to the channels that will be used by result_src later.
1147 * This does limit this temp's use as a temporary for multi-instruction
1148 * sequences.
1149 */
1150 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1151
1152 emit(ir, OPCODE_SWZ, result_dst, src);
1153 this->result = result_src;
1154 }
1155
1156 void
1157 glsl_to_tgsi_visitor::visit(ir_expression *ir)
1158 {
1159 unsigned int operand;
1160 st_src_reg op[Elements(ir->operands)];
1161 st_src_reg result_src;
1162 st_dst_reg result_dst;
1163
1164 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1165 */
1166 if (ir->operation == ir_binop_add) {
1167 if (try_emit_mad(ir, 1))
1168 return;
1169 if (try_emit_mad(ir, 0))
1170 return;
1171 }
1172 if (try_emit_sat(ir))
1173 return;
1174
1175 if (ir->operation == ir_quadop_vector) {
1176 this->emit_swz(ir);
1177 return;
1178 }
1179
1180 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1181 this->result.file = PROGRAM_UNDEFINED;
1182 ir->operands[operand]->accept(this);
1183 if (this->result.file == PROGRAM_UNDEFINED) {
1184 ir_print_visitor v;
1185 printf("Failed to get tree for expression operand:\n");
1186 ir->operands[operand]->accept(&v);
1187 exit(1);
1188 }
1189 op[operand] = this->result;
1190
1191 /* Matrix expression operands should have been broken down to vector
1192 * operations already.
1193 */
1194 assert(!ir->operands[operand]->type->is_matrix());
1195 }
1196
1197 int vector_elements = ir->operands[0]->type->vector_elements;
1198 if (ir->operands[1]) {
1199 vector_elements = MAX2(vector_elements,
1200 ir->operands[1]->type->vector_elements);
1201 }
1202
1203 this->result.file = PROGRAM_UNDEFINED;
1204
1205 /* Storage for our result. Ideally for an assignment we'd be using
1206 * the actual storage for the result here, instead.
1207 */
1208 result_src = get_temp(ir->type);
1209 /* convenience for the emit functions below. */
1210 result_dst = st_dst_reg(result_src);
1211 /* Limit writes to the channels that will be used by result_src later.
1212 * This does limit this temp's use as a temporary for multi-instruction
1213 * sequences.
1214 */
1215 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1216
1217 switch (ir->operation) {
1218 case ir_unop_logic_not:
1219 emit(ir, OPCODE_SEQ, result_dst, op[0], st_src_reg_for_float(0.0));
1220 break;
1221 case ir_unop_neg:
1222 op[0].negate = ~op[0].negate;
1223 result_src = op[0];
1224 break;
1225 case ir_unop_abs:
1226 emit(ir, OPCODE_ABS, result_dst, op[0]);
1227 break;
1228 case ir_unop_sign:
1229 emit(ir, OPCODE_SSG, result_dst, op[0]);
1230 break;
1231 case ir_unop_rcp:
1232 emit_scalar(ir, OPCODE_RCP, result_dst, op[0]);
1233 break;
1234
1235 case ir_unop_exp2:
1236 emit_scalar(ir, OPCODE_EX2, result_dst, op[0]);
1237 break;
1238 case ir_unop_exp:
1239 case ir_unop_log:
1240 assert(!"not reached: should be handled by ir_explog_to_explog2");
1241 break;
1242 case ir_unop_log2:
1243 emit_scalar(ir, OPCODE_LG2, result_dst, op[0]);
1244 break;
1245 case ir_unop_sin:
1246 emit_scalar(ir, OPCODE_SIN, result_dst, op[0]);
1247 break;
1248 case ir_unop_cos:
1249 emit_scalar(ir, OPCODE_COS, result_dst, op[0]);
1250 break;
1251 case ir_unop_sin_reduced:
1252 emit_scs(ir, OPCODE_SIN, result_dst, op[0]);
1253 break;
1254 case ir_unop_cos_reduced:
1255 emit_scs(ir, OPCODE_COS, result_dst, op[0]);
1256 break;
1257
1258 case ir_unop_dFdx:
1259 emit(ir, OPCODE_DDX, result_dst, op[0]);
1260 break;
1261 case ir_unop_dFdy:
1262 emit(ir, OPCODE_DDY, result_dst, op[0]);
1263 break;
1264
1265 case ir_unop_noise: {
1266 const enum prog_opcode opcode =
1267 prog_opcode(OPCODE_NOISE1
1268 + (ir->operands[0]->type->vector_elements) - 1);
1269 assert((opcode >= OPCODE_NOISE1) && (opcode <= OPCODE_NOISE4));
1270
1271 emit(ir, opcode, result_dst, op[0]);
1272 break;
1273 }
1274
1275 case ir_binop_add:
1276 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1277 break;
1278 case ir_binop_sub:
1279 emit(ir, OPCODE_SUB, result_dst, op[0], op[1]);
1280 break;
1281
1282 case ir_binop_mul:
1283 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1284 break;
1285 case ir_binop_div:
1286 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1287 case ir_binop_mod:
1288 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1289 break;
1290
1291 case ir_binop_less:
1292 emit(ir, OPCODE_SLT, result_dst, op[0], op[1]);
1293 break;
1294 case ir_binop_greater:
1295 emit(ir, OPCODE_SGT, result_dst, op[0], op[1]);
1296 break;
1297 case ir_binop_lequal:
1298 emit(ir, OPCODE_SLE, result_dst, op[0], op[1]);
1299 break;
1300 case ir_binop_gequal:
1301 emit(ir, OPCODE_SGE, result_dst, op[0], op[1]);
1302 break;
1303 case ir_binop_equal:
1304 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1305 break;
1306 case ir_binop_nequal:
1307 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1308 break;
1309 case ir_binop_all_equal:
1310 /* "==" operator producing a scalar boolean. */
1311 if (ir->operands[0]->type->is_vector() ||
1312 ir->operands[1]->type->is_vector()) {
1313 st_src_reg temp = get_temp(glsl_type::vec4_type);
1314 emit(ir, OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1315 emit_dp(ir, result_dst, temp, temp, vector_elements);
1316 emit(ir, OPCODE_SEQ, result_dst, result_src, st_src_reg_for_float(0.0));
1317 } else {
1318 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1319 }
1320 break;
1321 case ir_binop_any_nequal:
1322 /* "!=" operator producing a scalar boolean. */
1323 if (ir->operands[0]->type->is_vector() ||
1324 ir->operands[1]->type->is_vector()) {
1325 st_src_reg temp = get_temp(glsl_type::vec4_type);
1326 emit(ir, OPCODE_SNE, st_dst_reg(temp), op[0], op[1]);
1327 emit_dp(ir, result_dst, temp, temp, vector_elements);
1328 emit(ir, OPCODE_SNE, result_dst, result_src, st_src_reg_for_float(0.0));
1329 } else {
1330 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1331 }
1332 break;
1333
1334 case ir_unop_any:
1335 assert(ir->operands[0]->type->is_vector());
1336 emit_dp(ir, result_dst, op[0], op[0],
1337 ir->operands[0]->type->vector_elements);
1338 emit(ir, OPCODE_SNE, result_dst, result_src, st_src_reg_for_float(0.0));
1339 break;
1340
1341 case ir_binop_logic_xor:
1342 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1343 break;
1344
1345 case ir_binop_logic_or:
1346 /* This could be a saturated add and skip the SNE. */
1347 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1348 emit(ir, OPCODE_SNE, result_dst, result_src, st_src_reg_for_float(0.0));
1349 break;
1350
1351 case ir_binop_logic_and:
1352 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1353 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1354 break;
1355
1356 case ir_binop_dot:
1357 assert(ir->operands[0]->type->is_vector());
1358 assert(ir->operands[0]->type == ir->operands[1]->type);
1359 emit_dp(ir, result_dst, op[0], op[1],
1360 ir->operands[0]->type->vector_elements);
1361 break;
1362
1363 case ir_unop_sqrt:
1364 /* sqrt(x) = x * rsq(x). */
1365 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1366 emit(ir, OPCODE_MUL, result_dst, result_src, op[0]);
1367 /* For incoming channels <= 0, set the result to 0. */
1368 op[0].negate = ~op[0].negate;
1369 emit(ir, OPCODE_CMP, result_dst,
1370 op[0], result_src, st_src_reg_for_float(0.0));
1371 break;
1372 case ir_unop_rsq:
1373 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1374 break;
1375 case ir_unop_i2f:
1376 case ir_unop_b2f:
1377 case ir_unop_b2i:
1378 /* Mesa IR lacks types, ints are stored as truncated floats. */
1379 result_src = op[0];
1380 break;
1381 case ir_unop_f2i:
1382 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1383 break;
1384 case ir_unop_f2b:
1385 case ir_unop_i2b:
1386 emit(ir, OPCODE_SNE, result_dst,
1387 op[0], st_src_reg_for_float(0.0));
1388 break;
1389 case ir_unop_trunc:
1390 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1391 break;
1392 case ir_unop_ceil:
1393 op[0].negate = ~op[0].negate;
1394 emit(ir, OPCODE_FLR, result_dst, op[0]);
1395 result_src.negate = ~result_src.negate;
1396 break;
1397 case ir_unop_floor:
1398 emit(ir, OPCODE_FLR, result_dst, op[0]);
1399 break;
1400 case ir_unop_fract:
1401 emit(ir, OPCODE_FRC, result_dst, op[0]);
1402 break;
1403
1404 case ir_binop_min:
1405 emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
1406 break;
1407 case ir_binop_max:
1408 emit(ir, OPCODE_MAX, result_dst, op[0], op[1]);
1409 break;
1410 case ir_binop_pow:
1411 emit_scalar(ir, OPCODE_POW, result_dst, op[0], op[1]);
1412 break;
1413
1414 case ir_unop_bit_not:
1415 case ir_unop_u2f:
1416 case ir_binop_lshift:
1417 case ir_binop_rshift:
1418 case ir_binop_bit_and:
1419 case ir_binop_bit_xor:
1420 case ir_binop_bit_or:
1421 case ir_unop_round_even:
1422 assert(!"GLSL 1.30 features unsupported");
1423 break;
1424
1425 case ir_quadop_vector:
1426 /* This operation should have already been handled.
1427 */
1428 assert(!"Should not get here.");
1429 break;
1430 }
1431
1432 this->result = result_src;
1433 }
1434
1435
1436 void
1437 glsl_to_tgsi_visitor::visit(ir_swizzle *ir)
1438 {
1439 st_src_reg src;
1440 int i;
1441 int swizzle[4];
1442
1443 /* Note that this is only swizzles in expressions, not those on the left
1444 * hand side of an assignment, which do write masking. See ir_assignment
1445 * for that.
1446 */
1447
1448 ir->val->accept(this);
1449 src = this->result;
1450 assert(src.file != PROGRAM_UNDEFINED);
1451
1452 for (i = 0; i < 4; i++) {
1453 if (i < ir->type->vector_elements) {
1454 switch (i) {
1455 case 0:
1456 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1457 break;
1458 case 1:
1459 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1460 break;
1461 case 2:
1462 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1463 break;
1464 case 3:
1465 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1466 break;
1467 }
1468 } else {
1469 /* If the type is smaller than a vec4, replicate the last
1470 * channel out.
1471 */
1472 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1473 }
1474 }
1475
1476 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1477
1478 this->result = src;
1479 }
1480
1481 void
1482 glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir)
1483 {
1484 variable_storage *entry = find_variable_storage(ir->var);
1485 ir_variable *var = ir->var;
1486
1487 if (!entry) {
1488 switch (var->mode) {
1489 case ir_var_uniform:
1490 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1491 var->location);
1492 this->variables.push_tail(entry);
1493 break;
1494 case ir_var_in:
1495 case ir_var_inout:
1496 /* The linker assigns locations for varyings and attributes,
1497 * including deprecated builtins (like gl_Color), user-assign
1498 * generic attributes (glBindVertexLocation), and
1499 * user-defined varyings.
1500 *
1501 * FINISHME: We would hit this path for function arguments. Fix!
1502 */
1503 assert(var->location != -1);
1504 entry = new(mem_ctx) variable_storage(var,
1505 PROGRAM_INPUT,
1506 var->location);
1507 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1508 var->location >= VERT_ATTRIB_GENERIC0) {
1509 _mesa_add_attribute(this->prog->Attributes,
1510 var->name,
1511 _mesa_sizeof_glsl_type(var->type->gl_type),
1512 var->type->gl_type,
1513 var->location - VERT_ATTRIB_GENERIC0);
1514 }
1515 break;
1516 case ir_var_out:
1517 assert(var->location != -1);
1518 entry = new(mem_ctx) variable_storage(var,
1519 PROGRAM_OUTPUT,
1520 var->location);
1521 break;
1522 case ir_var_system_value:
1523 entry = new(mem_ctx) variable_storage(var,
1524 PROGRAM_SYSTEM_VALUE,
1525 var->location);
1526 break;
1527 case ir_var_auto:
1528 case ir_var_temporary:
1529 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1530 this->next_temp);
1531 this->variables.push_tail(entry);
1532
1533 next_temp += type_size(var->type);
1534 break;
1535 }
1536
1537 if (!entry) {
1538 printf("Failed to make storage for %s\n", var->name);
1539 exit(1);
1540 }
1541 }
1542
1543 this->result = st_src_reg(entry->file, entry->index, var->type);
1544 }
1545
1546 void
1547 glsl_to_tgsi_visitor::visit(ir_dereference_array *ir)
1548 {
1549 ir_constant *index;
1550 st_src_reg src;
1551 int element_size = type_size(ir->type);
1552
1553 index = ir->array_index->constant_expression_value();
1554
1555 ir->array->accept(this);
1556 src = this->result;
1557
1558 if (index) {
1559 src.index += index->value.i[0] * element_size;
1560 } else {
1561 st_src_reg array_base = this->result;
1562 /* Variable index array dereference. It eats the "vec4" of the
1563 * base of the array and an index that offsets the Mesa register
1564 * index.
1565 */
1566 ir->array_index->accept(this);
1567
1568 st_src_reg index_reg;
1569
1570 if (element_size == 1) {
1571 index_reg = this->result;
1572 } else {
1573 index_reg = get_temp(glsl_type::float_type);
1574
1575 emit(ir, OPCODE_MUL, st_dst_reg(index_reg),
1576 this->result, st_src_reg_for_float(element_size));
1577 }
1578
1579 src.reladdr = ralloc(mem_ctx, st_src_reg);
1580 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
1581 }
1582
1583 /* If the type is smaller than a vec4, replicate the last channel out. */
1584 if (ir->type->is_scalar() || ir->type->is_vector())
1585 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1586 else
1587 src.swizzle = SWIZZLE_NOOP;
1588
1589 this->result = src;
1590 }
1591
1592 void
1593 glsl_to_tgsi_visitor::visit(ir_dereference_record *ir)
1594 {
1595 unsigned int i;
1596 const glsl_type *struct_type = ir->record->type;
1597 int offset = 0;
1598
1599 ir->record->accept(this);
1600
1601 for (i = 0; i < struct_type->length; i++) {
1602 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1603 break;
1604 offset += type_size(struct_type->fields.structure[i].type);
1605 }
1606
1607 /* If the type is smaller than a vec4, replicate the last channel out. */
1608 if (ir->type->is_scalar() || ir->type->is_vector())
1609 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1610 else
1611 this->result.swizzle = SWIZZLE_NOOP;
1612
1613 this->result.index += offset;
1614 }
1615
1616 /**
1617 * We want to be careful in assignment setup to hit the actual storage
1618 * instead of potentially using a temporary like we might with the
1619 * ir_dereference handler.
1620 */
1621 static st_dst_reg
1622 get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v)
1623 {
1624 /* The LHS must be a dereference. If the LHS is a variable indexed array
1625 * access of a vector, it must be separated into a series conditional moves
1626 * before reaching this point (see ir_vec_index_to_cond_assign).
1627 */
1628 assert(ir->as_dereference());
1629 ir_dereference_array *deref_array = ir->as_dereference_array();
1630 if (deref_array) {
1631 assert(!deref_array->array->type->is_vector());
1632 }
1633
1634 /* Use the rvalue deref handler for the most part. We'll ignore
1635 * swizzles in it and write swizzles using writemask, though.
1636 */
1637 ir->accept(v);
1638 return st_dst_reg(v->result);
1639 }
1640
1641 /**
1642 * Process the condition of a conditional assignment
1643 *
1644 * Examines the condition of a conditional assignment to generate the optimal
1645 * first operand of a \c CMP instruction. If the condition is a relational
1646 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1647 * used as the source for the \c CMP instruction. Otherwise the comparison
1648 * is processed to a boolean result, and the boolean result is used as the
1649 * operand to the CMP instruction.
1650 */
1651 bool
1652 glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir)
1653 {
1654 ir_rvalue *src_ir = ir;
1655 bool negate = true;
1656 bool switch_order = false;
1657
1658 ir_expression *const expr = ir->as_expression();
1659 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
1660 bool zero_on_left = false;
1661
1662 if (expr->operands[0]->is_zero()) {
1663 src_ir = expr->operands[1];
1664 zero_on_left = true;
1665 } else if (expr->operands[1]->is_zero()) {
1666 src_ir = expr->operands[0];
1667 zero_on_left = false;
1668 }
1669
1670 /* a is - 0 + - 0 +
1671 * (a < 0) T F F ( a < 0) T F F
1672 * (0 < a) F F T (-a < 0) F F T
1673 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1674 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1675 * (a > 0) F F T (-a < 0) F F T
1676 * (0 > a) T F F ( a < 0) T F F
1677 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1678 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1679 *
1680 * Note that exchanging the order of 0 and 'a' in the comparison simply
1681 * means that the value of 'a' should be negated.
1682 */
1683 if (src_ir != ir) {
1684 switch (expr->operation) {
1685 case ir_binop_less:
1686 switch_order = false;
1687 negate = zero_on_left;
1688 break;
1689
1690 case ir_binop_greater:
1691 switch_order = false;
1692 negate = !zero_on_left;
1693 break;
1694
1695 case ir_binop_lequal:
1696 switch_order = true;
1697 negate = !zero_on_left;
1698 break;
1699
1700 case ir_binop_gequal:
1701 switch_order = true;
1702 negate = zero_on_left;
1703 break;
1704
1705 default:
1706 /* This isn't the right kind of comparison afterall, so make sure
1707 * the whole condition is visited.
1708 */
1709 src_ir = ir;
1710 break;
1711 }
1712 }
1713 }
1714
1715 src_ir->accept(this);
1716
1717 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1718 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1719 * choose which value OPCODE_CMP produces without an extra instruction
1720 * computing the condition.
1721 */
1722 if (negate)
1723 this->result.negate = ~this->result.negate;
1724
1725 return switch_order;
1726 }
1727
1728 void
1729 glsl_to_tgsi_visitor::visit(ir_assignment *ir)
1730 {
1731 st_dst_reg l;
1732 st_src_reg r;
1733 int i;
1734
1735 ir->rhs->accept(this);
1736 r = this->result;
1737
1738 l = get_assignment_lhs(ir->lhs, this);
1739
1740 /* FINISHME: This should really set to the correct maximal writemask for each
1741 * FINISHME: component written (in the loops below). This case can only
1742 * FINISHME: occur for matrices, arrays, and structures.
1743 */
1744 if (ir->write_mask == 0) {
1745 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
1746 l.writemask = WRITEMASK_XYZW;
1747 } else if (ir->lhs->type->is_scalar()) {
1748 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1749 * FINISHME: W component of fragment shader output zero, work correctly.
1750 */
1751 l.writemask = WRITEMASK_XYZW;
1752 } else {
1753 int swizzles[4];
1754 int first_enabled_chan = 0;
1755 int rhs_chan = 0;
1756
1757 assert(ir->lhs->type->is_vector());
1758 l.writemask = ir->write_mask;
1759
1760 for (int i = 0; i < 4; i++) {
1761 if (l.writemask & (1 << i)) {
1762 first_enabled_chan = GET_SWZ(r.swizzle, i);
1763 break;
1764 }
1765 }
1766
1767 /* Swizzle a small RHS vector into the channels being written.
1768 *
1769 * glsl ir treats write_mask as dictating how many channels are
1770 * present on the RHS while Mesa IR treats write_mask as just
1771 * showing which channels of the vec4 RHS get written.
1772 */
1773 for (int i = 0; i < 4; i++) {
1774 if (l.writemask & (1 << i))
1775 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
1776 else
1777 swizzles[i] = first_enabled_chan;
1778 }
1779 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
1780 swizzles[2], swizzles[3]);
1781 }
1782
1783 assert(l.file != PROGRAM_UNDEFINED);
1784 assert(r.file != PROGRAM_UNDEFINED);
1785
1786 if (ir->condition) {
1787 const bool switch_order = this->process_move_condition(ir->condition);
1788 st_src_reg condition = this->result;
1789
1790 for (i = 0; i < type_size(ir->lhs->type); i++) {
1791 if (switch_order) {
1792 emit(ir, OPCODE_CMP, l, condition, st_src_reg(l), r);
1793 } else {
1794 emit(ir, OPCODE_CMP, l, condition, r, st_src_reg(l));
1795 }
1796
1797 l.index++;
1798 r.index++;
1799 }
1800 } else {
1801 for (i = 0; i < type_size(ir->lhs->type); i++) {
1802 emit(ir, OPCODE_MOV, l, r);
1803 l.index++;
1804 r.index++;
1805 }
1806 }
1807 }
1808
1809
1810 void
1811 glsl_to_tgsi_visitor::visit(ir_constant *ir)
1812 {
1813 st_src_reg src;
1814 GLfloat stack_vals[4] = { 0 };
1815 GLfloat *values = stack_vals;
1816 unsigned int i;
1817
1818 /* Unfortunately, 4 floats is all we can get into
1819 * _mesa_add_unnamed_constant. So, make a temp to store an
1820 * aggregate constant and move each constant value into it. If we
1821 * get lucky, copy propagation will eliminate the extra moves.
1822 */
1823
1824 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1825 st_src_reg temp_base = get_temp(ir->type);
1826 st_dst_reg temp = st_dst_reg(temp_base);
1827
1828 foreach_iter(exec_list_iterator, iter, ir->components) {
1829 ir_constant *field_value = (ir_constant *)iter.get();
1830 int size = type_size(field_value->type);
1831
1832 assert(size > 0);
1833
1834 field_value->accept(this);
1835 src = this->result;
1836
1837 for (i = 0; i < (unsigned int)size; i++) {
1838 emit(ir, OPCODE_MOV, temp, src);
1839
1840 src.index++;
1841 temp.index++;
1842 }
1843 }
1844 this->result = temp_base;
1845 return;
1846 }
1847
1848 if (ir->type->is_array()) {
1849 st_src_reg temp_base = get_temp(ir->type);
1850 st_dst_reg temp = st_dst_reg(temp_base);
1851 int size = type_size(ir->type->fields.array);
1852
1853 assert(size > 0);
1854
1855 for (i = 0; i < ir->type->length; i++) {
1856 ir->array_elements[i]->accept(this);
1857 src = this->result;
1858 for (int j = 0; j < size; j++) {
1859 emit(ir, OPCODE_MOV, temp, src);
1860
1861 src.index++;
1862 temp.index++;
1863 }
1864 }
1865 this->result = temp_base;
1866 return;
1867 }
1868
1869 if (ir->type->is_matrix()) {
1870 st_src_reg mat = get_temp(ir->type);
1871 st_dst_reg mat_column = st_dst_reg(mat);
1872
1873 for (i = 0; i < ir->type->matrix_columns; i++) {
1874 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
1875 values = &ir->value.f[i * ir->type->vector_elements];
1876
1877 src = st_src_reg(PROGRAM_CONSTANT, -1, NULL);
1878 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1879 values,
1880 ir->type->vector_elements,
1881 &src.swizzle);
1882 emit(ir, OPCODE_MOV, mat_column, src);
1883
1884 mat_column.index++;
1885 }
1886
1887 this->result = mat;
1888 return;
1889 }
1890
1891 src.file = PROGRAM_CONSTANT;
1892 switch (ir->type->base_type) {
1893 case GLSL_TYPE_FLOAT:
1894 values = &ir->value.f[0];
1895 break;
1896 case GLSL_TYPE_UINT:
1897 for (i = 0; i < ir->type->vector_elements; i++) {
1898 values[i] = ir->value.u[i];
1899 }
1900 break;
1901 case GLSL_TYPE_INT:
1902 for (i = 0; i < ir->type->vector_elements; i++) {
1903 values[i] = ir->value.i[i];
1904 }
1905 break;
1906 case GLSL_TYPE_BOOL:
1907 for (i = 0; i < ir->type->vector_elements; i++) {
1908 values[i] = ir->value.b[i];
1909 }
1910 break;
1911 default:
1912 assert(!"Non-float/uint/int/bool constant");
1913 }
1914
1915 this->result = st_src_reg(PROGRAM_CONSTANT, -1, ir->type);
1916 this->result.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1917 values,
1918 ir->type->vector_elements,
1919 &this->result.swizzle);
1920 }
1921
1922 function_entry *
1923 glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig)
1924 {
1925 function_entry *entry;
1926
1927 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
1928 entry = (function_entry *)iter.get();
1929
1930 if (entry->sig == sig)
1931 return entry;
1932 }
1933
1934 entry = ralloc(mem_ctx, function_entry);
1935 entry->sig = sig;
1936 entry->sig_id = this->next_signature_id++;
1937 entry->bgn_inst = NULL;
1938
1939 /* Allocate storage for all the parameters. */
1940 foreach_iter(exec_list_iterator, iter, sig->parameters) {
1941 ir_variable *param = (ir_variable *)iter.get();
1942 variable_storage *storage;
1943
1944 storage = find_variable_storage(param);
1945 assert(!storage);
1946
1947 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
1948 this->next_temp);
1949 this->variables.push_tail(storage);
1950
1951 this->next_temp += type_size(param->type);
1952 }
1953
1954 if (!sig->return_type->is_void()) {
1955 entry->return_reg = get_temp(sig->return_type);
1956 } else {
1957 entry->return_reg = undef_src;
1958 }
1959
1960 this->function_signatures.push_tail(entry);
1961 return entry;
1962 }
1963
1964 void
1965 glsl_to_tgsi_visitor::visit(ir_call *ir)
1966 {
1967 glsl_to_tgsi_instruction *call_inst;
1968 ir_function_signature *sig = ir->get_callee();
1969 function_entry *entry = get_function_signature(sig);
1970 int i;
1971
1972 /* Process in parameters. */
1973 exec_list_iterator sig_iter = sig->parameters.iterator();
1974 foreach_iter(exec_list_iterator, iter, *ir) {
1975 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
1976 ir_variable *param = (ir_variable *)sig_iter.get();
1977
1978 if (param->mode == ir_var_in ||
1979 param->mode == ir_var_inout) {
1980 variable_storage *storage = find_variable_storage(param);
1981 assert(storage);
1982
1983 param_rval->accept(this);
1984 st_src_reg r = this->result;
1985
1986 st_dst_reg l;
1987 l.file = storage->file;
1988 l.index = storage->index;
1989 l.reladdr = NULL;
1990 l.writemask = WRITEMASK_XYZW;
1991 l.cond_mask = COND_TR;
1992
1993 for (i = 0; i < type_size(param->type); i++) {
1994 emit(ir, OPCODE_MOV, l, r);
1995 l.index++;
1996 r.index++;
1997 }
1998 }
1999
2000 sig_iter.next();
2001 }
2002 assert(!sig_iter.has_next());
2003
2004 /* Emit call instruction */
2005 call_inst = emit(ir, OPCODE_CAL);
2006 call_inst->function = entry;
2007
2008 /* Process out parameters. */
2009 sig_iter = sig->parameters.iterator();
2010 foreach_iter(exec_list_iterator, iter, *ir) {
2011 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2012 ir_variable *param = (ir_variable *)sig_iter.get();
2013
2014 if (param->mode == ir_var_out ||
2015 param->mode == ir_var_inout) {
2016 variable_storage *storage = find_variable_storage(param);
2017 assert(storage);
2018
2019 st_src_reg r;
2020 r.file = storage->file;
2021 r.index = storage->index;
2022 r.reladdr = NULL;
2023 r.swizzle = SWIZZLE_NOOP;
2024 r.negate = 0;
2025
2026 param_rval->accept(this);
2027 st_dst_reg l = st_dst_reg(this->result);
2028
2029 for (i = 0; i < type_size(param->type); i++) {
2030 emit(ir, OPCODE_MOV, l, r);
2031 l.index++;
2032 r.index++;
2033 }
2034 }
2035
2036 sig_iter.next();
2037 }
2038 assert(!sig_iter.has_next());
2039
2040 /* Process return value. */
2041 this->result = entry->return_reg;
2042 }
2043
2044 void
2045 glsl_to_tgsi_visitor::visit(ir_texture *ir)
2046 {
2047 st_src_reg result_src, coord, lod_info, projector, dx, dy;
2048 st_dst_reg result_dst, coord_dst;
2049 glsl_to_tgsi_instruction *inst = NULL;
2050 prog_opcode opcode = OPCODE_NOP;
2051
2052 ir->coordinate->accept(this);
2053
2054 /* Put our coords in a temp. We'll need to modify them for shadow,
2055 * projection, or LOD, so the only case we'd use it as is is if
2056 * we're doing plain old texturing. Mesa IR optimization should
2057 * handle cleaning up our mess in that case.
2058 */
2059 coord = get_temp(glsl_type::vec4_type);
2060 coord_dst = st_dst_reg(coord);
2061 emit(ir, OPCODE_MOV, coord_dst, this->result);
2062
2063 if (ir->projector) {
2064 ir->projector->accept(this);
2065 projector = this->result;
2066 }
2067
2068 /* Storage for our result. Ideally for an assignment we'd be using
2069 * the actual storage for the result here, instead.
2070 */
2071 result_src = get_temp(glsl_type::vec4_type);
2072 result_dst = st_dst_reg(result_src);
2073
2074 switch (ir->op) {
2075 case ir_tex:
2076 opcode = OPCODE_TEX;
2077 break;
2078 case ir_txb:
2079 opcode = OPCODE_TXB;
2080 ir->lod_info.bias->accept(this);
2081 lod_info = this->result;
2082 break;
2083 case ir_txl:
2084 opcode = OPCODE_TXL;
2085 ir->lod_info.lod->accept(this);
2086 lod_info = this->result;
2087 break;
2088 case ir_txd:
2089 opcode = OPCODE_TXD;
2090 ir->lod_info.grad.dPdx->accept(this);
2091 dx = this->result;
2092 ir->lod_info.grad.dPdy->accept(this);
2093 dy = this->result;
2094 break;
2095 case ir_txf: // TODO: use TGSI_OPCODE_TXF here
2096 assert(!"GLSL 1.30 features unsupported");
2097 break;
2098 }
2099
2100 if (ir->projector) {
2101 if (opcode == OPCODE_TEX) {
2102 /* Slot the projector in as the last component of the coord. */
2103 coord_dst.writemask = WRITEMASK_W;
2104 emit(ir, OPCODE_MOV, coord_dst, projector);
2105 coord_dst.writemask = WRITEMASK_XYZW;
2106 opcode = OPCODE_TXP;
2107 } else {
2108 st_src_reg coord_w = coord;
2109 coord_w.swizzle = SWIZZLE_WWWW;
2110
2111 /* For the other TEX opcodes there's no projective version
2112 * since the last slot is taken up by lod info. Do the
2113 * projective divide now.
2114 */
2115 coord_dst.writemask = WRITEMASK_W;
2116 emit(ir, OPCODE_RCP, coord_dst, projector);
2117
2118 /* In the case where we have to project the coordinates "by hand,"
2119 * the shadow comparitor value must also be projected.
2120 */
2121 st_src_reg tmp_src = coord;
2122 if (ir->shadow_comparitor) {
2123 /* Slot the shadow value in as the second to last component of the
2124 * coord.
2125 */
2126 ir->shadow_comparitor->accept(this);
2127
2128 tmp_src = get_temp(glsl_type::vec4_type);
2129 st_dst_reg tmp_dst = st_dst_reg(tmp_src);
2130
2131 tmp_dst.writemask = WRITEMASK_Z;
2132 emit(ir, OPCODE_MOV, tmp_dst, this->result);
2133
2134 tmp_dst.writemask = WRITEMASK_XY;
2135 emit(ir, OPCODE_MOV, tmp_dst, coord);
2136 }
2137
2138 coord_dst.writemask = WRITEMASK_XYZ;
2139 emit(ir, OPCODE_MUL, coord_dst, tmp_src, coord_w);
2140
2141 coord_dst.writemask = WRITEMASK_XYZW;
2142 coord.swizzle = SWIZZLE_XYZW;
2143 }
2144 }
2145
2146 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2147 * comparitor was put in the correct place (and projected) by the code,
2148 * above, that handles by-hand projection.
2149 */
2150 if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) {
2151 /* Slot the shadow value in as the second to last component of the
2152 * coord.
2153 */
2154 ir->shadow_comparitor->accept(this);
2155 coord_dst.writemask = WRITEMASK_Z;
2156 emit(ir, OPCODE_MOV, coord_dst, this->result);
2157 coord_dst.writemask = WRITEMASK_XYZW;
2158 }
2159
2160 if (opcode == OPCODE_TXL || opcode == OPCODE_TXB) {
2161 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2162 coord_dst.writemask = WRITEMASK_W;
2163 emit(ir, OPCODE_MOV, coord_dst, lod_info);
2164 coord_dst.writemask = WRITEMASK_XYZW;
2165 }
2166
2167 if (opcode == OPCODE_TXD)
2168 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2169 else
2170 inst = emit(ir, opcode, result_dst, coord);
2171
2172 if (ir->shadow_comparitor)
2173 inst->tex_shadow = GL_TRUE;
2174
2175 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2176 this->shader_program,
2177 this->prog);
2178
2179 const glsl_type *sampler_type = ir->sampler->type;
2180
2181 switch (sampler_type->sampler_dimensionality) {
2182 case GLSL_SAMPLER_DIM_1D:
2183 inst->tex_target = (sampler_type->sampler_array)
2184 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2185 break;
2186 case GLSL_SAMPLER_DIM_2D:
2187 inst->tex_target = (sampler_type->sampler_array)
2188 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2189 break;
2190 case GLSL_SAMPLER_DIM_3D:
2191 inst->tex_target = TEXTURE_3D_INDEX;
2192 break;
2193 case GLSL_SAMPLER_DIM_CUBE:
2194 inst->tex_target = TEXTURE_CUBE_INDEX;
2195 break;
2196 case GLSL_SAMPLER_DIM_RECT:
2197 inst->tex_target = TEXTURE_RECT_INDEX;
2198 break;
2199 case GLSL_SAMPLER_DIM_BUF:
2200 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2201 break;
2202 default:
2203 assert(!"Should not get here.");
2204 }
2205
2206 this->result = result_src;
2207 }
2208
2209 void
2210 glsl_to_tgsi_visitor::visit(ir_return *ir)
2211 {
2212 if (ir->get_value()) {
2213 st_dst_reg l;
2214 int i;
2215
2216 assert(current_function);
2217
2218 ir->get_value()->accept(this);
2219 st_src_reg r = this->result;
2220
2221 l = st_dst_reg(current_function->return_reg);
2222
2223 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2224 emit(ir, OPCODE_MOV, l, r);
2225 l.index++;
2226 r.index++;
2227 }
2228 }
2229
2230 emit(ir, OPCODE_RET);
2231 }
2232
2233 void
2234 glsl_to_tgsi_visitor::visit(ir_discard *ir)
2235 {
2236 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2237
2238 if (ir->condition) {
2239 ir->condition->accept(this);
2240 this->result.negate = ~this->result.negate;
2241 emit(ir, OPCODE_KIL, undef_dst, this->result);
2242 } else {
2243 emit(ir, OPCODE_KIL_NV);
2244 }
2245
2246 fp->UsesKill = GL_TRUE;
2247 }
2248
2249 void
2250 glsl_to_tgsi_visitor::visit(ir_if *ir)
2251 {
2252 glsl_to_tgsi_instruction *cond_inst, *if_inst, *else_inst = NULL;
2253 glsl_to_tgsi_instruction *prev_inst;
2254
2255 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2256
2257 ir->condition->accept(this);
2258 assert(this->result.file != PROGRAM_UNDEFINED);
2259
2260 if (this->options->EmitCondCodes) {
2261 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail();
2262
2263 /* See if we actually generated any instruction for generating
2264 * the condition. If not, then cook up a move to a temp so we
2265 * have something to set cond_update on.
2266 */
2267 if (cond_inst == prev_inst) {
2268 st_src_reg temp = get_temp(glsl_type::bool_type);
2269 cond_inst = emit(ir->condition, OPCODE_MOV, st_dst_reg(temp), result);
2270 }
2271 cond_inst->cond_update = GL_TRUE;
2272
2273 if_inst = emit(ir->condition, OPCODE_IF);
2274 if_inst->dst.cond_mask = COND_NE;
2275 } else {
2276 if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
2277 }
2278
2279 this->instructions.push_tail(if_inst);
2280
2281 visit_exec_list(&ir->then_instructions, this);
2282
2283 if (!ir->else_instructions.is_empty()) {
2284 else_inst = emit(ir->condition, OPCODE_ELSE);
2285 visit_exec_list(&ir->else_instructions, this);
2286 }
2287
2288 if_inst = emit(ir->condition, OPCODE_ENDIF);
2289 }
2290
2291 glsl_to_tgsi_visitor::glsl_to_tgsi_visitor()
2292 {
2293 result.file = PROGRAM_UNDEFINED;
2294 next_temp = 1;
2295 next_signature_id = 1;
2296 current_function = NULL;
2297 num_address_regs = 0;
2298 indirect_addr_temps = false;
2299 indirect_addr_consts = false;
2300 mem_ctx = ralloc_context(NULL);
2301 }
2302
2303 glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor()
2304 {
2305 ralloc_free(mem_ctx);
2306 }
2307
2308 extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v)
2309 {
2310 delete v;
2311 }
2312
2313 static struct prog_src_register
2314 mesa_st_src_reg_from_ir_st_src_reg(st_src_reg reg)
2315 {
2316 struct prog_src_register mesa_reg;
2317
2318 mesa_reg.File = reg.file;
2319 assert(reg.index < (1 << INST_INDEX_BITS));
2320 mesa_reg.Index = reg.index;
2321 mesa_reg.Swizzle = reg.swizzle;
2322 mesa_reg.RelAddr = reg.reladdr != NULL;
2323 mesa_reg.Negate = reg.negate;
2324 mesa_reg.Abs = 0;
2325 mesa_reg.HasIndex2 = GL_FALSE;
2326 mesa_reg.RelAddr2 = 0;
2327 mesa_reg.Index2 = 0;
2328
2329 return mesa_reg;
2330 }
2331
2332 static void
2333 set_branchtargets(glsl_to_tgsi_visitor *v,
2334 struct prog_instruction *mesa_instructions,
2335 int num_instructions)
2336 {
2337 int if_count = 0, loop_count = 0;
2338 int *if_stack, *loop_stack;
2339 int if_stack_pos = 0, loop_stack_pos = 0;
2340 int i, j;
2341
2342 for (i = 0; i < num_instructions; i++) {
2343 switch (mesa_instructions[i].Opcode) {
2344 case OPCODE_IF:
2345 if_count++;
2346 break;
2347 case OPCODE_BGNLOOP:
2348 loop_count++;
2349 break;
2350 case OPCODE_BRK:
2351 case OPCODE_CONT:
2352 mesa_instructions[i].BranchTarget = -1;
2353 break;
2354 default:
2355 break;
2356 }
2357 }
2358
2359 if_stack = rzalloc_array(v->mem_ctx, int, if_count);
2360 loop_stack = rzalloc_array(v->mem_ctx, int, loop_count);
2361
2362 for (i = 0; i < num_instructions; i++) {
2363 switch (mesa_instructions[i].Opcode) {
2364 case OPCODE_IF:
2365 if_stack[if_stack_pos] = i;
2366 if_stack_pos++;
2367 break;
2368 case OPCODE_ELSE:
2369 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2370 if_stack[if_stack_pos - 1] = i;
2371 break;
2372 case OPCODE_ENDIF:
2373 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2374 if_stack_pos--;
2375 break;
2376 case OPCODE_BGNLOOP:
2377 loop_stack[loop_stack_pos] = i;
2378 loop_stack_pos++;
2379 break;
2380 case OPCODE_ENDLOOP:
2381 loop_stack_pos--;
2382 /* Rewrite any breaks/conts at this nesting level (haven't
2383 * already had a BranchTarget assigned) to point to the end
2384 * of the loop.
2385 */
2386 for (j = loop_stack[loop_stack_pos]; j < i; j++) {
2387 if (mesa_instructions[j].Opcode == OPCODE_BRK ||
2388 mesa_instructions[j].Opcode == OPCODE_CONT) {
2389 if (mesa_instructions[j].BranchTarget == -1) {
2390 mesa_instructions[j].BranchTarget = i;
2391 }
2392 }
2393 }
2394 /* The loop ends point at each other. */
2395 mesa_instructions[i].BranchTarget = loop_stack[loop_stack_pos];
2396 mesa_instructions[loop_stack[loop_stack_pos]].BranchTarget = i;
2397 break;
2398 case OPCODE_CAL:
2399 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
2400 function_entry *entry = (function_entry *)iter.get();
2401
2402 if (entry->sig_id == mesa_instructions[i].BranchTarget) {
2403 mesa_instructions[i].BranchTarget = entry->inst;
2404 break;
2405 }
2406 }
2407 break;
2408 default:
2409 break;
2410 }
2411 }
2412 }
2413
2414 static void
2415 print_program(struct prog_instruction *mesa_instructions,
2416 ir_instruction **mesa_instruction_annotation,
2417 int num_instructions)
2418 {
2419 /*ir_instruction *last_ir = NULL;*/
2420 int i;
2421 int indent = 0;
2422
2423 for (i = 0; i < num_instructions; i++) {
2424 struct prog_instruction *mesa_inst = mesa_instructions + i;
2425
2426 fprintf(stdout, "%3d: ", i);
2427
2428 #if 0
2429 /* Disable this for now, since printing GLSL IR along with its corresponding
2430 * Mesa IR makes the Mesa IR unreadable. */
2431 ir_instruction *ir = mesa_instruction_annotation[i];
2432 if (last_ir != ir && ir) {
2433 int j;
2434
2435 for (j = 0; j < indent; j++) {
2436 fprintf(stdout, " ");
2437 }
2438 ir->print();
2439 printf("\n");
2440 last_ir = ir;
2441
2442 fprintf(stdout, " "); /* line number spacing. */
2443 }
2444 #endif
2445
2446 indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
2447 PROG_PRINT_DEBUG, NULL);
2448 }
2449 }
2450
2451
2452 /**
2453 * Count resources used by the given gpu program (number of texture
2454 * samplers, etc).
2455 */
2456 static void
2457 count_resources(struct gl_program *prog)
2458 {
2459 unsigned int i;
2460
2461 prog->SamplersUsed = 0;
2462
2463 for (i = 0; i < prog->NumInstructions; i++) {
2464 struct prog_instruction *inst = &prog->Instructions[i];
2465
2466 if (_mesa_is_tex_instruction(inst->Opcode)) {
2467 prog->SamplerTargets[inst->TexSrcUnit] =
2468 (gl_texture_index)inst->TexSrcTarget;
2469 prog->SamplersUsed |= 1 << inst->TexSrcUnit;
2470 if (inst->TexShadow) {
2471 prog->ShadowSamplers |= 1 << inst->TexSrcUnit;
2472 }
2473 }
2474 }
2475
2476 _mesa_update_shader_textures_used(prog);
2477 }
2478
2479
2480 /**
2481 * Check if the given vertex/fragment/shader program is within the
2482 * resource limits of the context (number of texture units, etc).
2483 * If any of those checks fail, record a linker error.
2484 *
2485 * XXX more checks are needed...
2486 */
2487 static void
2488 check_resources(const struct gl_context *ctx,
2489 struct gl_shader_program *shader_program,
2490 struct gl_program *prog)
2491 {
2492 switch (prog->Target) {
2493 case GL_VERTEX_PROGRAM_ARB:
2494 if (_mesa_bitcount(prog->SamplersUsed) >
2495 ctx->Const.MaxVertexTextureImageUnits) {
2496 fail_link(shader_program, "Too many vertex shader texture samplers");
2497 }
2498 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2499 fail_link(shader_program, "Too many vertex shader constants");
2500 }
2501 break;
2502 case MESA_GEOMETRY_PROGRAM:
2503 if (_mesa_bitcount(prog->SamplersUsed) >
2504 ctx->Const.MaxGeometryTextureImageUnits) {
2505 fail_link(shader_program, "Too many geometry shader texture samplers");
2506 }
2507 if (prog->Parameters->NumParameters >
2508 MAX_GEOMETRY_UNIFORM_COMPONENTS / 4) {
2509 fail_link(shader_program, "Too many geometry shader constants");
2510 }
2511 break;
2512 case GL_FRAGMENT_PROGRAM_ARB:
2513 if (_mesa_bitcount(prog->SamplersUsed) >
2514 ctx->Const.MaxTextureImageUnits) {
2515 fail_link(shader_program, "Too many fragment shader texture samplers");
2516 }
2517 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2518 fail_link(shader_program, "Too many fragment shader constants");
2519 }
2520 break;
2521 default:
2522 _mesa_problem(ctx, "unexpected program type in check_resources()");
2523 }
2524 }
2525
2526
2527
2528 struct uniform_sort {
2529 struct gl_uniform *u;
2530 int pos;
2531 };
2532
2533 /* The shader_program->Uniforms list is almost sorted in increasing
2534 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2535 * uniforms shared between targets. We need to add parameters in
2536 * increasing order for the targets.
2537 */
2538 static int
2539 sort_uniforms(const void *a, const void *b)
2540 {
2541 struct uniform_sort *u1 = (struct uniform_sort *)a;
2542 struct uniform_sort *u2 = (struct uniform_sort *)b;
2543
2544 return u1->pos - u2->pos;
2545 }
2546
2547 /* Add the uniforms to the parameters. The linker chose locations
2548 * in our parameters lists (which weren't created yet), which the
2549 * uniforms code will use to poke values into our parameters list
2550 * when uniforms are updated.
2551 */
2552 static void
2553 add_uniforms_to_parameters_list(struct gl_shader_program *shader_program,
2554 struct gl_shader *shader,
2555 struct gl_program *prog)
2556 {
2557 unsigned int i;
2558 unsigned int next_sampler = 0, num_uniforms = 0;
2559 struct uniform_sort *sorted_uniforms;
2560
2561 sorted_uniforms = ralloc_array(NULL, struct uniform_sort,
2562 shader_program->Uniforms->NumUniforms);
2563
2564 for (i = 0; i < shader_program->Uniforms->NumUniforms; i++) {
2565 struct gl_uniform *uniform = shader_program->Uniforms->Uniforms + i;
2566 int parameter_index = -1;
2567
2568 switch (shader->Type) {
2569 case GL_VERTEX_SHADER:
2570 parameter_index = uniform->VertPos;
2571 break;
2572 case GL_FRAGMENT_SHADER:
2573 parameter_index = uniform->FragPos;
2574 break;
2575 case GL_GEOMETRY_SHADER:
2576 parameter_index = uniform->GeomPos;
2577 break;
2578 }
2579
2580 /* Only add uniforms used in our target. */
2581 if (parameter_index != -1) {
2582 sorted_uniforms[num_uniforms].pos = parameter_index;
2583 sorted_uniforms[num_uniforms].u = uniform;
2584 num_uniforms++;
2585 }
2586 }
2587
2588 qsort(sorted_uniforms, num_uniforms, sizeof(struct uniform_sort),
2589 sort_uniforms);
2590
2591 for (i = 0; i < num_uniforms; i++) {
2592 struct gl_uniform *uniform = sorted_uniforms[i].u;
2593 int parameter_index = sorted_uniforms[i].pos;
2594 const glsl_type *type = uniform->Type;
2595 unsigned int size;
2596
2597 if (type->is_vector() ||
2598 type->is_scalar()) {
2599 size = type->vector_elements;
2600 } else {
2601 size = type_size(type) * 4;
2602 }
2603
2604 gl_register_file file;
2605 if (type->is_sampler() ||
2606 (type->is_array() && type->fields.array->is_sampler())) {
2607 file = PROGRAM_SAMPLER;
2608 } else {
2609 file = PROGRAM_UNIFORM;
2610 }
2611
2612 GLint index = _mesa_lookup_parameter_index(prog->Parameters, -1,
2613 uniform->Name);
2614
2615 if (index < 0) {
2616 index = _mesa_add_parameter(prog->Parameters, file,
2617 uniform->Name, size, type->gl_type,
2618 NULL, NULL, 0x0);
2619
2620 /* Sampler uniform values are stored in prog->SamplerUnits,
2621 * and the entry in that array is selected by this index we
2622 * store in ParameterValues[].
2623 */
2624 if (file == PROGRAM_SAMPLER) {
2625 for (unsigned int j = 0; j < size / 4; j++)
2626 prog->Parameters->ParameterValues[index + j][0] = next_sampler++;
2627 }
2628
2629 /* The location chosen in the Parameters list here (returned
2630 * from _mesa_add_uniform) has to match what the linker chose.
2631 */
2632 if (index != parameter_index) {
2633 fail_link(shader_program, "Allocation of uniform `%s' to target "
2634 "failed (%d vs %d)\n",
2635 uniform->Name, index, parameter_index);
2636 }
2637 }
2638 }
2639
2640 ralloc_free(sorted_uniforms);
2641 }
2642
2643 static void
2644 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2645 struct gl_shader_program *shader_program,
2646 const char *name, const glsl_type *type,
2647 ir_constant *val)
2648 {
2649 if (type->is_record()) {
2650 ir_constant *field_constant;
2651
2652 field_constant = (ir_constant *)val->components.get_head();
2653
2654 for (unsigned int i = 0; i < type->length; i++) {
2655 const glsl_type *field_type = type->fields.structure[i].type;
2656 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2657 type->fields.structure[i].name);
2658 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2659 field_type, field_constant);
2660 field_constant = (ir_constant *)field_constant->next;
2661 }
2662 return;
2663 }
2664
2665 int loc = _mesa_get_uniform_location(ctx, shader_program, name);
2666
2667 if (loc == -1) {
2668 fail_link(shader_program,
2669 "Couldn't find uniform for initializer %s\n", name);
2670 return;
2671 }
2672
2673 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2674 ir_constant *element;
2675 const glsl_type *element_type;
2676 if (type->is_array()) {
2677 element = val->array_elements[i];
2678 element_type = type->fields.array;
2679 } else {
2680 element = val;
2681 element_type = type;
2682 }
2683
2684 void *values;
2685
2686 if (element_type->base_type == GLSL_TYPE_BOOL) {
2687 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2688 for (unsigned int j = 0; j < element_type->components(); j++) {
2689 conv[j] = element->value.b[j];
2690 }
2691 values = (void *)conv;
2692 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2693 element_type->vector_elements,
2694 1);
2695 } else {
2696 values = &element->value;
2697 }
2698
2699 if (element_type->is_matrix()) {
2700 _mesa_uniform_matrix(ctx, shader_program,
2701 element_type->matrix_columns,
2702 element_type->vector_elements,
2703 loc, 1, GL_FALSE, (GLfloat *)values);
2704 loc += element_type->matrix_columns;
2705 } else {
2706 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2707 values, element_type->gl_type);
2708 loc += type_size(element_type);
2709 }
2710 }
2711 }
2712
2713 static void
2714 set_uniform_initializers(struct gl_context *ctx,
2715 struct gl_shader_program *shader_program)
2716 {
2717 void *mem_ctx = NULL;
2718
2719 for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
2720 struct gl_shader *shader = shader_program->_LinkedShaders[i];
2721
2722 if (shader == NULL)
2723 continue;
2724
2725 foreach_iter(exec_list_iterator, iter, *shader->ir) {
2726 ir_instruction *ir = (ir_instruction *)iter.get();
2727 ir_variable *var = ir->as_variable();
2728
2729 if (!var || var->mode != ir_var_uniform || !var->constant_value)
2730 continue;
2731
2732 if (!mem_ctx)
2733 mem_ctx = ralloc_context(NULL);
2734
2735 set_uniform_initializer(ctx, mem_ctx, shader_program, var->name,
2736 var->type, var->constant_value);
2737 }
2738 }
2739
2740 ralloc_free(mem_ctx);
2741 }
2742
2743 /* Replaces all references to a temporary register index with another index. */
2744 void
2745 glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index)
2746 {
2747 foreach_iter(exec_list_iterator, iter, this->instructions) {
2748 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2749 unsigned j;
2750
2751 for (j=0; j < _mesa_num_inst_src_regs(inst->op); j++) {
2752 if (inst->src[j].file == PROGRAM_TEMPORARY &&
2753 inst->src[j].index == index) {
2754 inst->src[j].index = new_index;
2755 }
2756 }
2757
2758 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
2759 inst->dst.index = new_index;
2760 }
2761 }
2762 }
2763
2764 int
2765 glsl_to_tgsi_visitor::get_first_temp_read(int index)
2766 {
2767 int depth = 0; /* loop depth */
2768 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
2769 unsigned i = 0, j;
2770
2771 foreach_iter(exec_list_iterator, iter, this->instructions) {
2772 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2773
2774 for (j=0; j < _mesa_num_inst_src_regs(inst->op); j++) {
2775 if (inst->src[j].file == PROGRAM_TEMPORARY &&
2776 inst->src[j].index == index) {
2777 return (depth == 0) ? i : loop_start;
2778 }
2779 }
2780
2781 if (inst->op == OPCODE_BGNLOOP) {
2782 if(depth++ == 0)
2783 loop_start = i;
2784 } else if (inst->op == OPCODE_ENDLOOP) {
2785 if (--depth == 0)
2786 loop_start = -1;
2787 }
2788 assert(depth >= 0);
2789
2790 i++;
2791 }
2792
2793 return -1;
2794 }
2795
2796 int
2797 glsl_to_tgsi_visitor::get_first_temp_write(int index)
2798 {
2799 int depth = 0; /* loop depth */
2800 int loop_start = -1; /* index of the first active BGNLOOP (if any) */
2801 int i = 0;
2802
2803 foreach_iter(exec_list_iterator, iter, this->instructions) {
2804 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2805
2806 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) {
2807 return (depth == 0) ? i : loop_start;
2808 }
2809
2810 if (inst->op == OPCODE_BGNLOOP) {
2811 if(depth++ == 0)
2812 loop_start = i;
2813 } else if (inst->op == OPCODE_ENDLOOP) {
2814 if (--depth == 0)
2815 loop_start = -1;
2816 }
2817 assert(depth >= 0);
2818
2819 i++;
2820 }
2821
2822 return -1;
2823 }
2824
2825 int
2826 glsl_to_tgsi_visitor::get_last_temp_read(int index)
2827 {
2828 int depth = 0; /* loop depth */
2829 int last = -1; /* index of last instruction that reads the temporary */
2830 unsigned i = 0, j;
2831
2832 foreach_iter(exec_list_iterator, iter, this->instructions) {
2833 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2834
2835 for (j=0; j < _mesa_num_inst_src_regs(inst->op); j++) {
2836 if (inst->src[j].file == PROGRAM_TEMPORARY &&
2837 inst->src[j].index == index) {
2838 last = (depth == 0) ? i : -2;
2839 }
2840 }
2841
2842 if (inst->op == OPCODE_BGNLOOP)
2843 depth++;
2844 else if (inst->op == OPCODE_ENDLOOP)
2845 if (--depth == 0 && last == -2)
2846 last = i;
2847 assert(depth >= 0);
2848
2849 i++;
2850 }
2851
2852 assert(last >= -1);
2853 return last;
2854 }
2855
2856 int
2857 glsl_to_tgsi_visitor::get_last_temp_write(int index)
2858 {
2859 int depth = 0; /* loop depth */
2860 int last = -1; /* index of last instruction that writes to the temporary */
2861 int i = 0;
2862
2863 foreach_iter(exec_list_iterator, iter, this->instructions) {
2864 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2865
2866 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index)
2867 last = (depth == 0) ? i : -2;
2868
2869 if (inst->op == OPCODE_BGNLOOP)
2870 depth++;
2871 else if (inst->op == OPCODE_ENDLOOP)
2872 if (--depth == 0 && last == -2)
2873 last = i;
2874 assert(depth >= 0);
2875
2876 i++;
2877 }
2878
2879 assert(last >= -1);
2880 return last;
2881 }
2882
2883 /*
2884 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2885 * channels for copy propagation and updates following instructions to
2886 * use the original versions.
2887 *
2888 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
2889 * will occur. As an example, a TXP production before this pass:
2890 *
2891 * 0: MOV TEMP[1], INPUT[4].xyyy;
2892 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2893 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2894 *
2895 * and after:
2896 *
2897 * 0: MOV TEMP[1], INPUT[4].xyyy;
2898 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2899 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2900 *
2901 * which allows for dead code elimination on TEMP[1]'s writes.
2902 */
2903 void
2904 glsl_to_tgsi_visitor::copy_propagate(void)
2905 {
2906 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx,
2907 glsl_to_tgsi_instruction *,
2908 this->next_temp * 4);
2909 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
2910 int level = 0;
2911
2912 foreach_iter(exec_list_iterator, iter, this->instructions) {
2913 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
2914
2915 assert(inst->dst.file != PROGRAM_TEMPORARY
2916 || inst->dst.index < this->next_temp);
2917
2918 /* First, do any copy propagation possible into the src regs. */
2919 for (int r = 0; r < 3; r++) {
2920 glsl_to_tgsi_instruction *first = NULL;
2921 bool good = true;
2922 int acp_base = inst->src[r].index * 4;
2923
2924 if (inst->src[r].file != PROGRAM_TEMPORARY ||
2925 inst->src[r].reladdr)
2926 continue;
2927
2928 /* See if we can find entries in the ACP consisting of MOVs
2929 * from the same src register for all the swizzled channels
2930 * of this src register reference.
2931 */
2932 for (int i = 0; i < 4; i++) {
2933 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2934 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan];
2935
2936 if (!copy_chan) {
2937 good = false;
2938 break;
2939 }
2940
2941 assert(acp_level[acp_base + src_chan] <= level);
2942
2943 if (!first) {
2944 first = copy_chan;
2945 } else {
2946 if (first->src[0].file != copy_chan->src[0].file ||
2947 first->src[0].index != copy_chan->src[0].index) {
2948 good = false;
2949 break;
2950 }
2951 }
2952 }
2953
2954 if (good) {
2955 /* We've now validated that we can copy-propagate to
2956 * replace this src register reference. Do it.
2957 */
2958 inst->src[r].file = first->src[0].file;
2959 inst->src[r].index = first->src[0].index;
2960
2961 int swizzle = 0;
2962 for (int i = 0; i < 4; i++) {
2963 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2964 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan];
2965 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
2966 (3 * i));
2967 }
2968 inst->src[r].swizzle = swizzle;
2969 }
2970 }
2971
2972 switch (inst->op) {
2973 case OPCODE_BGNLOOP:
2974 case OPCODE_ENDLOOP:
2975 /* End of a basic block, clear the ACP entirely. */
2976 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2977 break;
2978
2979 case OPCODE_IF:
2980 ++level;
2981 break;
2982
2983 case OPCODE_ENDIF:
2984 case OPCODE_ELSE:
2985 /* Clear all channels written inside the block from the ACP, but
2986 * leaving those that were not touched.
2987 */
2988 for (int r = 0; r < this->next_temp; r++) {
2989 for (int c = 0; c < 4; c++) {
2990 if (!acp[4 * r + c])
2991 continue;
2992
2993 if (acp_level[4 * r + c] >= level)
2994 acp[4 * r + c] = NULL;
2995 }
2996 }
2997 if (inst->op == OPCODE_ENDIF)
2998 --level;
2999 break;
3000
3001 default:
3002 /* Continuing the block, clear any written channels from
3003 * the ACP.
3004 */
3005 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
3006 /* Any temporary might be written, so no copy propagation
3007 * across this instruction.
3008 */
3009 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
3010 } else if (inst->dst.file == PROGRAM_OUTPUT &&
3011 inst->dst.reladdr) {
3012 /* Any output might be written, so no copy propagation
3013 * from outputs across this instruction.
3014 */
3015 for (int r = 0; r < this->next_temp; r++) {
3016 for (int c = 0; c < 4; c++) {
3017 if (!acp[4 * r + c])
3018 continue;
3019
3020 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
3021 acp[4 * r + c] = NULL;
3022 }
3023 }
3024 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
3025 inst->dst.file == PROGRAM_OUTPUT) {
3026 /* Clear where it's used as dst. */
3027 if (inst->dst.file == PROGRAM_TEMPORARY) {
3028 for (int c = 0; c < 4; c++) {
3029 if (inst->dst.writemask & (1 << c)) {
3030 acp[4 * inst->dst.index + c] = NULL;
3031 }
3032 }
3033 }
3034
3035 /* Clear where it's used as src. */
3036 for (int r = 0; r < this->next_temp; r++) {
3037 for (int c = 0; c < 4; c++) {
3038 if (!acp[4 * r + c])
3039 continue;
3040
3041 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
3042
3043 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
3044 acp[4 * r + c]->src[0].index == inst->dst.index &&
3045 inst->dst.writemask & (1 << src_chan))
3046 {
3047 acp[4 * r + c] = NULL;
3048 }
3049 }
3050 }
3051 }
3052 break;
3053 }
3054
3055 /* If this is a copy, add it to the ACP. */
3056 if (inst->op == OPCODE_MOV &&
3057 inst->dst.file == PROGRAM_TEMPORARY &&
3058 !inst->dst.reladdr &&
3059 !inst->saturate &&
3060 !inst->src[0].reladdr &&
3061 !inst->src[0].negate) {
3062 for (int i = 0; i < 4; i++) {
3063 if (inst->dst.writemask & (1 << i)) {
3064 acp[4 * inst->dst.index + i] = inst;
3065 acp_level[4 * inst->dst.index + i] = level;
3066 }
3067 }
3068 }
3069 }
3070
3071 ralloc_free(acp_level);
3072 ralloc_free(acp);
3073 }
3074
3075 /*
3076 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination.
3077 *
3078 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass
3079 * will occur. As an example, a TXP production after copy propagation but
3080 * before this pass:
3081 *
3082 * 0: MOV TEMP[1], INPUT[4].xyyy;
3083 * 1: MOV TEMP[1].w, INPUT[4].wwww;
3084 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3085 *
3086 * and after this pass:
3087 *
3088 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
3089 *
3090 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB)
3091 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them
3092 */
3093 void
3094 glsl_to_tgsi_visitor::eliminate_dead_code(void)
3095 {
3096 int i;
3097
3098 for (i=0; i < this->next_temp; i++) {
3099 int last_read = get_last_temp_read(i);
3100 int j = 0;
3101
3102 foreach_iter(exec_list_iterator, iter, this->instructions) {
3103 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
3104
3105 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i &&
3106 j > last_read)
3107 {
3108 iter.remove();
3109 delete inst;
3110 }
3111
3112 j++;
3113 }
3114 }
3115 }
3116
3117 /* Merges temporary registers together where possible to reduce the number of
3118 * registers needed to run a program.
3119 *
3120 * Produces optimal code only after copy propagation and dead code elimination
3121 * have been run. */
3122 void
3123 glsl_to_tgsi_visitor::merge_registers(void)
3124 {
3125 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp);
3126 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp);
3127 int i, j;
3128
3129 /* Read the indices of the last read and first write to each temp register
3130 * into an array so that we don't have to traverse the instruction list as
3131 * much. */
3132 for (i=0; i < this->next_temp; i++) {
3133 last_reads[i] = get_last_temp_read(i);
3134 first_writes[i] = get_first_temp_write(i);
3135 }
3136
3137 /* Start looking for registers with non-overlapping usages that can be
3138 * merged together. */
3139 for (i=0; i < this->next_temp - 1; i++) {
3140 /* Don't touch unused registers. */
3141 if (last_reads[i] < 0 || first_writes[i] < 0) continue;
3142
3143 for (j=i+1; j < this->next_temp; j++) {
3144 /* Don't touch unused registers. */
3145 if (last_reads[j] < 0 || first_writes[j] < 0) continue;
3146
3147 /* We can merge the two registers if the first write to j is after or
3148 * in the same instruction as the last read from i. Note that the
3149 * register at index i will always be used earlier or at the same time
3150 * as the register at index j. */
3151 assert(first_writes[i] <= first_writes[j]);
3152 if (last_reads[i] <= first_writes[j]) {
3153 rename_temp_register(j, i); /* Replace all references to j with i.*/
3154
3155 /* Update the first_writes and last_reads arrays with the new
3156 * values for the merged register index, and mark the newly unused
3157 * register index as such. */
3158 last_reads[i] = last_reads[j];
3159 first_writes[j] = -1;
3160 last_reads[j] = -1;
3161 }
3162 }
3163 }
3164
3165 ralloc_free(last_reads);
3166 ralloc_free(first_writes);
3167 }
3168
3169 /* Reassign indices to temporary registers by reusing unused indices created
3170 * by optimization passes. */
3171 void
3172 glsl_to_tgsi_visitor::renumber_registers(void)
3173 {
3174 int i = 0;
3175 int new_index = 0;
3176
3177 for (i=0; i < this->next_temp; i++) {
3178 if (get_first_temp_read(i) < 0) continue;
3179 if (i != new_index)
3180 rename_temp_register(i, new_index);
3181 new_index++;
3182 }
3183
3184 this->next_temp = new_index;
3185 }
3186
3187 /* ------------------------- TGSI conversion stuff -------------------------- */
3188 struct label {
3189 unsigned branch_target;
3190 unsigned token;
3191 };
3192
3193 /**
3194 * Intermediate state used during shader translation.
3195 */
3196 struct st_translate {
3197 struct ureg_program *ureg;
3198
3199 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
3200 struct ureg_src *constants;
3201 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
3202 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
3203 struct ureg_dst address[1];
3204 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
3205 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
3206
3207 /* Extra info for handling point size clamping in vertex shader */
3208 struct ureg_dst pointSizeResult; /**< Actual point size output register */
3209 struct ureg_src pointSizeConst; /**< Point size range constant register */
3210 GLint pointSizeOutIndex; /**< Temp point size output register */
3211 GLboolean prevInstWrotePointSize;
3212
3213 const GLuint *inputMapping;
3214 const GLuint *outputMapping;
3215
3216 /* For every instruction that contains a label (eg CALL), keep
3217 * details so that we can go back afterwards and emit the correct
3218 * tgsi instruction number for each label.
3219 */
3220 struct label *labels;
3221 unsigned labels_size;
3222 unsigned labels_count;
3223
3224 /* Keep a record of the tgsi instruction number that each mesa
3225 * instruction starts at, will be used to fix up labels after
3226 * translation.
3227 */
3228 unsigned *insn;
3229 unsigned insn_size;
3230 unsigned insn_count;
3231
3232 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
3233
3234 boolean error;
3235 };
3236
3237 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
3238 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
3239 TGSI_SEMANTIC_FACE,
3240 TGSI_SEMANTIC_INSTANCEID
3241 };
3242
3243 /**
3244 * Make note of a branch to a label in the TGSI code.
3245 * After we've emitted all instructions, we'll go over the list
3246 * of labels built here and patch the TGSI code with the actual
3247 * location of each label.
3248 */
3249 static unsigned *get_label( struct st_translate *t,
3250 unsigned branch_target )
3251 {
3252 unsigned i;
3253
3254 if (t->labels_count + 1 >= t->labels_size) {
3255 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
3256 t->labels = (struct label *)realloc(t->labels,
3257 t->labels_size * sizeof t->labels[0]);
3258 if (t->labels == NULL) {
3259 static unsigned dummy;
3260 t->error = TRUE;
3261 return &dummy;
3262 }
3263 }
3264
3265 i = t->labels_count++;
3266 t->labels[i].branch_target = branch_target;
3267 return &t->labels[i].token;
3268 }
3269
3270 /**
3271 * Called prior to emitting the TGSI code for each Mesa instruction.
3272 * Allocate additional space for instructions if needed.
3273 * Update the insn[] array so the next Mesa instruction points to
3274 * the next TGSI instruction.
3275 */
3276 static void set_insn_start( struct st_translate *t,
3277 unsigned start )
3278 {
3279 if (t->insn_count + 1 >= t->insn_size) {
3280 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
3281 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof t->insn[0]);
3282 if (t->insn == NULL) {
3283 t->error = TRUE;
3284 return;
3285 }
3286 }
3287
3288 t->insn[t->insn_count++] = start;
3289 }
3290
3291 /**
3292 * Map a Mesa dst register to a TGSI ureg_dst register.
3293 */
3294 static struct ureg_dst
3295 dst_register( struct st_translate *t,
3296 gl_register_file file,
3297 GLuint index )
3298 {
3299 switch( file ) {
3300 case PROGRAM_UNDEFINED:
3301 return ureg_dst_undef();
3302
3303 case PROGRAM_TEMPORARY:
3304 if (ureg_dst_is_undef(t->temps[index]))
3305 t->temps[index] = ureg_DECL_temporary( t->ureg );
3306
3307 return t->temps[index];
3308
3309 case PROGRAM_OUTPUT:
3310 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
3311 t->prevInstWrotePointSize = GL_TRUE;
3312
3313 if (t->procType == TGSI_PROCESSOR_VERTEX)
3314 assert(index < VERT_RESULT_MAX);
3315 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
3316 assert(index < FRAG_RESULT_MAX);
3317 else
3318 assert(index < GEOM_RESULT_MAX);
3319
3320 assert(t->outputMapping[index] < Elements(t->outputs));
3321
3322 return t->outputs[t->outputMapping[index]];
3323
3324 case PROGRAM_ADDRESS:
3325 return t->address[index];
3326
3327 default:
3328 debug_assert( 0 );
3329 return ureg_dst_undef();
3330 }
3331 }
3332
3333 /**
3334 * Map a Mesa src register to a TGSI ureg_src register.
3335 */
3336 static struct ureg_src
3337 src_register( struct st_translate *t,
3338 gl_register_file file,
3339 GLuint index )
3340 {
3341 switch( file ) {
3342 case PROGRAM_UNDEFINED:
3343 return ureg_src_undef();
3344
3345 case PROGRAM_TEMPORARY:
3346 assert(index >= 0);
3347 assert(index < Elements(t->temps));
3348 if (ureg_dst_is_undef(t->temps[index]))
3349 t->temps[index] = ureg_DECL_temporary( t->ureg );
3350 return ureg_src(t->temps[index]);
3351
3352 case PROGRAM_NAMED_PARAM:
3353 case PROGRAM_ENV_PARAM:
3354 case PROGRAM_LOCAL_PARAM:
3355 case PROGRAM_UNIFORM:
3356 assert(index >= 0);
3357 return t->constants[index];
3358 case PROGRAM_STATE_VAR:
3359 case PROGRAM_CONSTANT: /* ie, immediate */
3360 if (index < 0)
3361 return ureg_DECL_constant( t->ureg, 0 );
3362 else
3363 return t->constants[index];
3364
3365 case PROGRAM_INPUT:
3366 assert(t->inputMapping[index] < Elements(t->inputs));
3367 return t->inputs[t->inputMapping[index]];
3368
3369 case PROGRAM_OUTPUT:
3370 assert(t->outputMapping[index] < Elements(t->outputs));
3371 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
3372
3373 case PROGRAM_ADDRESS:
3374 return ureg_src(t->address[index]);
3375
3376 case PROGRAM_SYSTEM_VALUE:
3377 assert(index < Elements(t->systemValues));
3378 return t->systemValues[index];
3379
3380 default:
3381 debug_assert( 0 );
3382 return ureg_src_undef();
3383 }
3384 }
3385
3386 /**
3387 * Create a TGSI ureg_dst register from a Mesa dest register.
3388 */
3389 static struct ureg_dst
3390 translate_dst( struct st_translate *t,
3391 const st_dst_reg *dst_reg, //const struct prog_dst_register *DstReg,
3392 boolean saturate )
3393 {
3394 struct ureg_dst dst = dst_register( t,
3395 dst_reg->file,
3396 dst_reg->index );
3397
3398 dst = ureg_writemask( dst,
3399 dst_reg->writemask );
3400
3401 if (saturate)
3402 dst = ureg_saturate( dst );
3403
3404 if (dst_reg->reladdr != NULL)
3405 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
3406
3407 return dst;
3408 }
3409
3410 /**
3411 * Create a TGSI ureg_src register from a Mesa src register.
3412 */
3413 static struct ureg_src
3414 translate_src( struct st_translate *t,
3415 const st_src_reg *src_reg )
3416 {
3417 struct ureg_src src = src_register( t, src_reg->file, src_reg->index );
3418
3419 src = ureg_swizzle( src,
3420 GET_SWZ( src_reg->swizzle, 0 ) & 0x3,
3421 GET_SWZ( src_reg->swizzle, 1 ) & 0x3,
3422 GET_SWZ( src_reg->swizzle, 2 ) & 0x3,
3423 GET_SWZ( src_reg->swizzle, 3 ) & 0x3);
3424
3425 if ((src_reg->negate & 0xf) == NEGATE_XYZW)
3426 src = ureg_negate(src);
3427
3428 #if 0
3429 // src_reg currently does not have an equivalent to SrcReg->Abs in Mesa IR
3430 if (src_reg->abs)
3431 src = ureg_abs(src);
3432 #endif
3433
3434 if (src_reg->reladdr != NULL) {
3435 /* Normally ureg_src_indirect() would be used here, but a stupid compiler
3436 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously
3437 * set the bit for src.Negate. So we have to do the operation manually
3438 * here to work around the compiler's problems. */
3439 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/
3440 struct ureg_src addr = ureg_src(t->address[0]);
3441 src.Indirect = 1;
3442 src.IndirectFile = addr.File;
3443 src.IndirectIndex = addr.Index;
3444 src.IndirectSwizzle = addr.SwizzleX;
3445
3446 if (src_reg->file != PROGRAM_INPUT &&
3447 src_reg->file != PROGRAM_OUTPUT) {
3448 /* If src_reg->index was negative, it was set to zero in
3449 * src_register(). Reassign it now. But don't do this
3450 * for input/output regs since they get remapped while
3451 * const buffers don't.
3452 */
3453 src.Index = src_reg->index;
3454 }
3455 }
3456
3457 return src;
3458 }
3459
3460 static void
3461 compile_tgsi_instruction(struct st_translate *t,
3462 const struct glsl_to_tgsi_instruction *inst)
3463 {
3464 struct ureg_program *ureg = t->ureg;
3465 GLuint i;
3466 struct ureg_dst dst[1];
3467 struct ureg_src src[4];
3468 unsigned num_dst;
3469 unsigned num_src;
3470
3471 num_dst = _mesa_num_inst_dst_regs( inst->op );
3472 num_src = _mesa_num_inst_src_regs( inst->op );
3473
3474 if (num_dst)
3475 dst[0] = translate_dst( t,
3476 &inst->dst,
3477 inst->saturate); // inst->SaturateMode
3478
3479 for (i = 0; i < num_src; i++)
3480 src[i] = translate_src( t, &inst->src[i] );
3481
3482 switch( inst->op ) {
3483 case OPCODE_SWZ:
3484 // TODO: copy emit_swz function from st_mesa_to_tgsi.c
3485 //emit_swz( t, dst[0], &inst->src[0] );
3486 assert(!"OPCODE_SWZ");
3487 return;
3488
3489 case OPCODE_BGNLOOP:
3490 case OPCODE_CAL:
3491 case OPCODE_ELSE:
3492 case OPCODE_ENDLOOP:
3493 case OPCODE_IF:
3494 debug_assert(num_dst == 0);
3495 ureg_label_insn( ureg,
3496 translate_opcode( inst->op ),
3497 src, num_src,
3498 get_label( t,
3499 inst->op == OPCODE_CAL ? inst->function->sig_id : 0 ));
3500 return;
3501
3502 case OPCODE_TEX:
3503 case OPCODE_TXB:
3504 case OPCODE_TXD:
3505 case OPCODE_TXL:
3506 case OPCODE_TXP:
3507 src[num_src++] = t->samplers[inst->sampler];
3508 ureg_tex_insn( ureg,
3509 translate_opcode( inst->op ),
3510 dst, num_dst,
3511 translate_texture_target( inst->tex_target,
3512 inst->tex_shadow ),
3513 src, num_src );
3514 return;
3515
3516 case OPCODE_SCS:
3517 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
3518 ureg_insn( ureg,
3519 translate_opcode( inst->op ),
3520 dst, num_dst,
3521 src, num_src );
3522 break;
3523
3524 case OPCODE_XPD:
3525 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
3526 ureg_insn( ureg,
3527 translate_opcode( inst->op ),
3528 dst, num_dst,
3529 src, num_src );
3530 break;
3531
3532 case OPCODE_NOISE1:
3533 case OPCODE_NOISE2:
3534 case OPCODE_NOISE3:
3535 case OPCODE_NOISE4:
3536 /* At some point, a motivated person could add a better
3537 * implementation of noise. Currently not even the nvidia
3538 * binary drivers do anything more than this. In any case, the
3539 * place to do this is in the GL state tracker, not the poor
3540 * driver.
3541 */
3542 ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
3543 break;
3544
3545 case OPCODE_DDY:
3546 // TODO: copy emit_ddy() function from st_mesa_to_tgsi.c
3547 assert(!"OPCODE_DDY");
3548 //emit_ddy( t, dst[0], &inst->src[0] );
3549 break;
3550
3551 default:
3552 ureg_insn( ureg,
3553 translate_opcode( inst->op ),
3554 dst, num_dst,
3555 src, num_src );
3556 break;
3557 }
3558 }
3559
3560 /**
3561 * Emit the TGSI instructions to adjust the WPOS pixel center convention
3562 * Basically, add (adjX, adjY) to the fragment position.
3563 */
3564 static void
3565 emit_adjusted_wpos( struct st_translate *t,
3566 const struct gl_program *program,
3567 GLfloat adjX, GLfloat adjY)
3568 {
3569 struct ureg_program *ureg = t->ureg;
3570 struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
3571 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
3572
3573 /* Note that we bias X and Y and pass Z and W through unchanged.
3574 * The shader might also use gl_FragCoord.w and .z.
3575 */
3576 ureg_ADD(ureg, wpos_temp, wpos_input,
3577 ureg_imm4f(ureg, adjX, adjY, 0.0f, 0.0f));
3578
3579 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
3580 }
3581
3582
3583 /**
3584 * Emit the TGSI instructions for inverting the WPOS y coordinate.
3585 * This code is unavoidable because it also depends on whether
3586 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
3587 */
3588 static void
3589 emit_wpos_inversion( struct st_translate *t,
3590 const struct gl_program *program,
3591 boolean invert)
3592 {
3593 struct ureg_program *ureg = t->ureg;
3594
3595 /* Fragment program uses fragment position input.
3596 * Need to replace instances of INPUT[WPOS] with temp T
3597 * where T = INPUT[WPOS] by y is inverted.
3598 */
3599 static const gl_state_index wposTransformState[STATE_LENGTH]
3600 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM,
3601 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
3602
3603 /* XXX: note we are modifying the incoming shader here! Need to
3604 * do this before emitting the constant decls below, or this
3605 * will be missed:
3606 */
3607 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
3608 wposTransformState);
3609
3610 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
3611 struct ureg_dst wpos_temp;
3612 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
3613
3614 /* MOV wpos_temp, input[wpos]
3615 */
3616 if (wpos_input.File == TGSI_FILE_TEMPORARY)
3617 wpos_temp = ureg_dst(wpos_input);
3618 else {
3619 wpos_temp = ureg_DECL_temporary( ureg );
3620 ureg_MOV( ureg, wpos_temp, wpos_input );
3621 }
3622
3623 if (invert) {
3624 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
3625 */
3626 ureg_MAD( ureg,
3627 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
3628 wpos_input,
3629 ureg_scalar(wpostrans, 0),
3630 ureg_scalar(wpostrans, 1));
3631 } else {
3632 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
3633 */
3634 ureg_MAD( ureg,
3635 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
3636 wpos_input,
3637 ureg_scalar(wpostrans, 2),
3638 ureg_scalar(wpostrans, 3));
3639 }
3640
3641 /* Use wpos_temp as position input from here on:
3642 */
3643 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
3644 }
3645
3646
3647 /**
3648 * Emit fragment position/ooordinate code.
3649 */
3650 static void
3651 emit_wpos(struct st_context *st,
3652 struct st_translate *t,
3653 const struct gl_program *program,
3654 struct ureg_program *ureg)
3655 {
3656 const struct gl_fragment_program *fp =
3657 (const struct gl_fragment_program *) program;
3658 struct pipe_screen *pscreen = st->pipe->screen;
3659 boolean invert = FALSE;
3660
3661 if (fp->OriginUpperLeft) {
3662 /* Fragment shader wants origin in upper-left */
3663 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
3664 /* the driver supports upper-left origin */
3665 }
3666 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
3667 /* the driver supports lower-left origin, need to invert Y */
3668 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
3669 invert = TRUE;
3670 }
3671 else
3672 assert(0);
3673 }
3674 else {
3675 /* Fragment shader wants origin in lower-left */
3676 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
3677 /* the driver supports lower-left origin */
3678 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
3679 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
3680 /* the driver supports upper-left origin, need to invert Y */
3681 invert = TRUE;
3682 else
3683 assert(0);
3684 }
3685
3686 if (fp->PixelCenterInteger) {
3687 /* Fragment shader wants pixel center integer */
3688 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER))
3689 /* the driver supports pixel center integer */
3690 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
3691 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER))
3692 /* the driver supports pixel center half integer, need to bias X,Y */
3693 emit_adjusted_wpos(t, program, 0.5f, invert ? 0.5f : -0.5f);
3694 else
3695 assert(0);
3696 }
3697 else {
3698 /* Fragment shader wants pixel center half integer */
3699 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
3700 /* the driver supports pixel center half integer */
3701 }
3702 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
3703 /* the driver supports pixel center integer, need to bias X,Y */
3704 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
3705 emit_adjusted_wpos(t, program, 0.5f, invert ? -0.5f : 0.5f);
3706 }
3707 else
3708 assert(0);
3709 }
3710
3711 /* we invert after adjustment so that we avoid the MOV to temporary,
3712 * and reuse the adjustment ADD instead */
3713 emit_wpos_inversion(t, program, invert);
3714 }
3715
3716 /**
3717 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
3718 * \param program the program to translate
3719 * \param numInputs number of input registers used
3720 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
3721 * input indexes
3722 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
3723 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
3724 * each input
3725 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
3726 * \param numOutputs number of output registers used
3727 * \param outputMapping maps Mesa fragment program outputs to TGSI
3728 * generic outputs
3729 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
3730 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
3731 * each output
3732 *
3733 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
3734 */
3735 extern "C" enum pipe_error
3736 st_translate_program(
3737 struct gl_context *ctx,
3738 uint procType,
3739 struct ureg_program *ureg,
3740 glsl_to_tgsi_visitor *program,
3741 const struct gl_program *proginfo,
3742 GLuint numInputs,
3743 const GLuint inputMapping[],
3744 const ubyte inputSemanticName[],
3745 const ubyte inputSemanticIndex[],
3746 const GLuint interpMode[],
3747 GLuint numOutputs,
3748 const GLuint outputMapping[],
3749 const ubyte outputSemanticName[],
3750 const ubyte outputSemanticIndex[],
3751 boolean passthrough_edgeflags )
3752 {
3753 struct st_translate translate, *t;
3754 unsigned i;
3755 enum pipe_error ret = PIPE_OK;
3756
3757 assert(numInputs <= Elements(t->inputs));
3758 assert(numOutputs <= Elements(t->outputs));
3759
3760 t = &translate;
3761 memset(t, 0, sizeof *t);
3762
3763 t->procType = procType;
3764 t->inputMapping = inputMapping;
3765 t->outputMapping = outputMapping;
3766 t->ureg = ureg;
3767 t->pointSizeOutIndex = -1;
3768 t->prevInstWrotePointSize = GL_FALSE;
3769
3770 /*_mesa_print_program(program);*/
3771
3772 /*
3773 * Declare input attributes.
3774 */
3775 if (procType == TGSI_PROCESSOR_FRAGMENT) {
3776 for (i = 0; i < numInputs; i++) {
3777 t->inputs[i] = ureg_DECL_fs_input(ureg,
3778 inputSemanticName[i],
3779 inputSemanticIndex[i],
3780 interpMode[i]);
3781 }
3782
3783 if (proginfo->InputsRead & FRAG_BIT_WPOS) {
3784 /* Must do this after setting up t->inputs, and before
3785 * emitting constant references, below:
3786 */
3787 printf("FRAG_BIT_WPOS\n");
3788 emit_wpos(st_context(ctx), t, proginfo, ureg);
3789 }
3790
3791 if (proginfo->InputsRead & FRAG_BIT_FACE) {
3792 // TODO: uncomment
3793 printf("FRAG_BIT_FACE\n");
3794 //emit_face_var( t, program );
3795 }
3796
3797 /*
3798 * Declare output attributes.
3799 */
3800 for (i = 0; i < numOutputs; i++) {
3801 switch (outputSemanticName[i]) {
3802 case TGSI_SEMANTIC_POSITION:
3803 t->outputs[i] = ureg_DECL_output( ureg,
3804 TGSI_SEMANTIC_POSITION, /* Z / Depth */
3805 outputSemanticIndex[i] );
3806
3807 t->outputs[i] = ureg_writemask( t->outputs[i],
3808 TGSI_WRITEMASK_Z );
3809 break;
3810 case TGSI_SEMANTIC_STENCIL:
3811 t->outputs[i] = ureg_DECL_output( ureg,
3812 TGSI_SEMANTIC_STENCIL, /* Stencil */
3813 outputSemanticIndex[i] );
3814 t->outputs[i] = ureg_writemask( t->outputs[i],
3815 TGSI_WRITEMASK_Y );
3816 break;
3817 case TGSI_SEMANTIC_COLOR:
3818 t->outputs[i] = ureg_DECL_output( ureg,
3819 TGSI_SEMANTIC_COLOR,
3820 outputSemanticIndex[i] );
3821 break;
3822 default:
3823 debug_assert(0);
3824 return PIPE_ERROR_BAD_INPUT;
3825 }
3826 }
3827 }
3828 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
3829 for (i = 0; i < numInputs; i++) {
3830 t->inputs[i] = ureg_DECL_gs_input(ureg,
3831 i,
3832 inputSemanticName[i],
3833 inputSemanticIndex[i]);
3834 }
3835
3836 for (i = 0; i < numOutputs; i++) {
3837 t->outputs[i] = ureg_DECL_output( ureg,
3838 outputSemanticName[i],
3839 outputSemanticIndex[i] );
3840 }
3841 }
3842 else {
3843 assert(procType == TGSI_PROCESSOR_VERTEX);
3844
3845 for (i = 0; i < numInputs; i++) {
3846 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
3847 }
3848
3849 for (i = 0; i < numOutputs; i++) {
3850 t->outputs[i] = ureg_DECL_output( ureg,
3851 outputSemanticName[i],
3852 outputSemanticIndex[i] );
3853 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && proginfo->Id) {
3854 /* Writing to the point size result register requires special
3855 * handling to implement clamping.
3856 */
3857 static const gl_state_index pointSizeClampState[STATE_LENGTH]
3858 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 };
3859 /* XXX: note we are modifying the incoming shader here! Need to
3860 * do this before emitting the constant decls below, or this
3861 * will be missed.
3862 * XXX: depends on "Parameters" field specific to Mesa IR
3863 */
3864 unsigned pointSizeClampConst =
3865 _mesa_add_state_reference(proginfo->Parameters,
3866 pointSizeClampState);
3867 struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
3868 t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
3869 t->pointSizeResult = t->outputs[i];
3870 t->pointSizeOutIndex = i;
3871 t->outputs[i] = psizregtemp;
3872 }
3873 }
3874 /*if (passthrough_edgeflags)
3875 emit_edgeflags( t, program ); */ // TODO: uncomment
3876 }
3877
3878 /* Declare address register.
3879 */
3880 if (program->num_address_regs > 0) {
3881 debug_assert( program->num_address_regs == 1 );
3882 t->address[0] = ureg_DECL_address( ureg );
3883 }
3884
3885 /* Declare misc input registers
3886 */
3887 {
3888 GLbitfield sysInputs = proginfo->SystemValuesRead;
3889 unsigned numSys = 0;
3890 for (i = 0; sysInputs; i++) {
3891 if (sysInputs & (1 << i)) {
3892 unsigned semName = mesa_sysval_to_semantic[i];
3893 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
3894 numSys++;
3895 sysInputs &= ~(1 << i);
3896 }
3897 }
3898 }
3899
3900 if (program->indirect_addr_temps) {
3901 /* If temps are accessed with indirect addressing, declare temporaries
3902 * in sequential order. Else, we declare them on demand elsewhere.
3903 * (Note: the number of temporaries is equal to program->next_temp)
3904 */
3905 for (i = 0; i < (unsigned)program->next_temp; i++) {
3906 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
3907 t->temps[i] = ureg_DECL_temporary( t->ureg );
3908 }
3909 }
3910
3911 /* Emit constants and immediates. Mesa uses a single index space
3912 * for these, so we put all the translated regs in t->constants.
3913 * XXX: this entire if block depends on proginfo->Parameters from Mesa IR
3914 */
3915 if (proginfo->Parameters) {
3916 t->constants = (struct ureg_src *)CALLOC( proginfo->Parameters->NumParameters * sizeof t->constants[0] );
3917 if (t->constants == NULL) {
3918 ret = PIPE_ERROR_OUT_OF_MEMORY;
3919 goto out;
3920 }
3921
3922 for (i = 0; i < proginfo->Parameters->NumParameters; i++) {
3923 switch (proginfo->Parameters->Parameters[i].Type) {
3924 case PROGRAM_ENV_PARAM:
3925 case PROGRAM_LOCAL_PARAM:
3926 case PROGRAM_STATE_VAR:
3927 case PROGRAM_NAMED_PARAM:
3928 case PROGRAM_UNIFORM:
3929 t->constants[i] = ureg_DECL_constant( ureg, i );
3930 break;
3931
3932 /* Emit immediates only when there's no indirect addressing of
3933 * the const buffer.
3934 * FIXME: Be smarter and recognize param arrays:
3935 * indirect addressing is only valid within the referenced
3936 * array.
3937 */
3938 case PROGRAM_CONSTANT:
3939 if (program->indirect_addr_consts)
3940 t->constants[i] = ureg_DECL_constant( ureg, i );
3941 else
3942 t->constants[i] =
3943 ureg_DECL_immediate( ureg,
3944 proginfo->Parameters->ParameterValues[i],
3945 4 );
3946 break;
3947 default:
3948 break;
3949 }
3950 }
3951 }
3952
3953 /* texture samplers */
3954 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
3955 // XXX: depends on SamplersUsed property generated by conversion to Mesa IR
3956 if (proginfo->SamplersUsed & (1 << i)) {
3957 t->samplers[i] = ureg_DECL_sampler( ureg, i );
3958 }
3959 }
3960
3961 /* Emit each instruction in turn:
3962 */
3963 foreach_iter(exec_list_iterator, iter, program->instructions) {
3964 set_insn_start( t, ureg_get_instruction_number( ureg ));
3965 compile_tgsi_instruction( t, (glsl_to_tgsi_instruction *)iter.get() );
3966
3967 if (t->prevInstWrotePointSize && proginfo->Id) {
3968 /* The previous instruction wrote to the (fake) vertex point size
3969 * result register. Now we need to clamp that value to the min/max
3970 * point size range, putting the result into the real point size
3971 * register.
3972 * Note that we can't do this easily at the end of program due to
3973 * possible early return.
3974 */
3975 set_insn_start( t, ureg_get_instruction_number( ureg ));
3976 ureg_MAX( t->ureg,
3977 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
3978 ureg_src(t->outputs[t->pointSizeOutIndex]),
3979 ureg_swizzle(t->pointSizeConst, 1,1,1,1));
3980 ureg_MIN( t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
3981 ureg_src(t->outputs[t->pointSizeOutIndex]),
3982 ureg_swizzle(t->pointSizeConst, 2,2,2,2));
3983 }
3984 t->prevInstWrotePointSize = GL_FALSE;
3985 }
3986
3987 /* Fix up all emitted labels:
3988 */
3989 for (i = 0; i < t->labels_count; i++) {
3990 ureg_fixup_label( ureg,
3991 t->labels[i].token,
3992 t->insn[t->labels[i].branch_target] );
3993 }
3994
3995 out:
3996 FREE(t->insn);
3997 FREE(t->labels);
3998 FREE(t->constants);
3999
4000 if (t->error) {
4001 debug_printf("%s: translate error flag set\n", __FUNCTION__);
4002 }
4003
4004 return ret;
4005 }
4006 /* ----------------------------- End TGSI code ------------------------------ */
4007
4008 /**
4009 * Convert a shader's GLSL IR into both a Mesa gl_program and a TGSI shader.
4010 */
4011 static struct gl_program *
4012 get_mesa_program(struct gl_context *ctx,
4013 struct gl_shader_program *shader_program,
4014 struct gl_shader *shader)
4015 {
4016 glsl_to_tgsi_visitor* v = new glsl_to_tgsi_visitor();
4017 struct prog_instruction *mesa_instructions, *mesa_inst;
4018 ir_instruction **mesa_instruction_annotation;
4019 int i;
4020 struct gl_program *prog;
4021 GLenum target;
4022 const char *target_string;
4023 GLboolean progress;
4024 struct gl_shader_compiler_options *options =
4025 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
4026
4027 switch (shader->Type) {
4028 case GL_VERTEX_SHADER:
4029 target = GL_VERTEX_PROGRAM_ARB;
4030 target_string = "vertex";
4031 break;
4032 case GL_FRAGMENT_SHADER:
4033 target = GL_FRAGMENT_PROGRAM_ARB;
4034 target_string = "fragment";
4035 break;
4036 case GL_GEOMETRY_SHADER:
4037 target = GL_GEOMETRY_PROGRAM_NV;
4038 target_string = "geometry";
4039 break;
4040 default:
4041 assert(!"should not be reached");
4042 return NULL;
4043 }
4044
4045 validate_ir_tree(shader->ir);
4046
4047 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
4048 if (!prog)
4049 return NULL;
4050 prog->Parameters = _mesa_new_parameter_list();
4051 prog->Varying = _mesa_new_parameter_list();
4052 prog->Attributes = _mesa_new_parameter_list();
4053 v->ctx = ctx;
4054 v->prog = prog;
4055 v->shader_program = shader_program;
4056 v->options = options;
4057
4058 add_uniforms_to_parameters_list(shader_program, shader, prog);
4059
4060 /* Emit Mesa IR for main(). */
4061 visit_exec_list(shader->ir, v);
4062 v->emit(NULL, OPCODE_END);
4063
4064 /* Now emit bodies for any functions that were used. */
4065 do {
4066 progress = GL_FALSE;
4067
4068 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
4069 function_entry *entry = (function_entry *)iter.get();
4070
4071 if (!entry->bgn_inst) {
4072 v->current_function = entry;
4073
4074 entry->bgn_inst = v->emit(NULL, OPCODE_BGNSUB);
4075 entry->bgn_inst->function = entry;
4076
4077 visit_exec_list(&entry->sig->body, v);
4078
4079 glsl_to_tgsi_instruction *last;
4080 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail();
4081 if (last->op != OPCODE_RET)
4082 v->emit(NULL, OPCODE_RET);
4083
4084 glsl_to_tgsi_instruction *end;
4085 end = v->emit(NULL, OPCODE_ENDSUB);
4086 end->function = entry;
4087
4088 progress = GL_TRUE;
4089 }
4090 }
4091 } while (progress);
4092
4093 #if 0
4094 /* Print out some information (for debugging purposes) used by the
4095 * optimization passes. */
4096 for (i=0; i < v->next_temp; i++) {
4097 int fr = v->get_first_temp_read(i);
4098 int fw = v->get_first_temp_write(i);
4099 int lr = v->get_last_temp_read(i);
4100 int lw = v->get_last_temp_write(i);
4101
4102 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw);
4103 assert(fw <= fr);
4104 }
4105 #endif
4106
4107 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */
4108 v->copy_propagate();
4109 v->eliminate_dead_code();
4110 v->merge_registers();
4111 v->renumber_registers();
4112
4113 prog->NumTemporaries = v->next_temp;
4114
4115 int num_instructions = 0;
4116 foreach_iter(exec_list_iterator, iter, v->instructions) {
4117 num_instructions++;
4118 }
4119
4120 mesa_instructions =
4121 (struct prog_instruction *)calloc(num_instructions,
4122 sizeof(*mesa_instructions));
4123 mesa_instruction_annotation = ralloc_array(v->mem_ctx, ir_instruction *,
4124 num_instructions);
4125
4126 /* Convert glsl_to_tgsi_instructions into Mesa IR prog_instructions.
4127 * TODO: remove
4128 */
4129 mesa_inst = mesa_instructions;
4130 i = 0;
4131 foreach_iter(exec_list_iterator, iter, v->instructions) {
4132 const glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get();
4133
4134 mesa_inst->Opcode = inst->op;
4135 mesa_inst->CondUpdate = inst->cond_update;
4136 if (inst->saturate)
4137 mesa_inst->SaturateMode = SATURATE_ZERO_ONE;
4138 mesa_inst->DstReg.File = inst->dst.file;
4139 mesa_inst->DstReg.Index = inst->dst.index;
4140 mesa_inst->DstReg.CondMask = inst->dst.cond_mask;
4141 mesa_inst->DstReg.WriteMask = inst->dst.writemask;
4142 mesa_inst->DstReg.RelAddr = inst->dst.reladdr != NULL;
4143 mesa_inst->SrcReg[0] = mesa_st_src_reg_from_ir_st_src_reg(inst->src[0]);
4144 mesa_inst->SrcReg[1] = mesa_st_src_reg_from_ir_st_src_reg(inst->src[1]);
4145 mesa_inst->SrcReg[2] = mesa_st_src_reg_from_ir_st_src_reg(inst->src[2]);
4146 mesa_inst->TexSrcUnit = inst->sampler;
4147 mesa_inst->TexSrcTarget = inst->tex_target;
4148 mesa_inst->TexShadow = inst->tex_shadow;
4149 mesa_instruction_annotation[i] = inst->ir;
4150
4151 /* Set IndirectRegisterFiles. */
4152 if (mesa_inst->DstReg.RelAddr)
4153 prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File;
4154
4155 /* Update program's bitmask of indirectly accessed register files */
4156 for (unsigned src = 0; src < 3; src++)
4157 if (mesa_inst->SrcReg[src].RelAddr)
4158 prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File;
4159
4160 if (options->EmitNoIfs && mesa_inst->Opcode == OPCODE_IF) {
4161 fail_link(shader_program, "Couldn't flatten if statement\n");
4162 }
4163
4164 switch (mesa_inst->Opcode) {
4165 case OPCODE_BGNSUB:
4166 inst->function->inst = i;
4167 mesa_inst->Comment = strdup(inst->function->sig->function_name());
4168 break;
4169 case OPCODE_ENDSUB:
4170 mesa_inst->Comment = strdup(inst->function->sig->function_name());
4171 break;
4172 case OPCODE_CAL:
4173 mesa_inst->BranchTarget = inst->function->sig_id; /* rewritten later */
4174 break;
4175 case OPCODE_ARL:
4176 prog->NumAddressRegs = 1;
4177 break;
4178 default:
4179 break;
4180 }
4181
4182 mesa_inst++;
4183 i++;
4184
4185 if (!shader_program->LinkStatus)
4186 break;
4187 }
4188
4189 if (!shader_program->LinkStatus) {
4190 free(mesa_instructions);
4191 _mesa_reference_program(ctx, &shader->Program, NULL);
4192 return NULL;
4193 }
4194
4195 set_branchtargets(v, mesa_instructions, num_instructions);
4196
4197 if (ctx->Shader.Flags & GLSL_DUMP) {
4198 printf("\n");
4199 printf("GLSL IR for linked %s program %d:\n", target_string,
4200 shader_program->Name);
4201 _mesa_print_ir(shader->ir, NULL);
4202 printf("\n");
4203 printf("\n");
4204 printf("Mesa IR for linked %s program %d:\n", target_string,
4205 shader_program->Name);
4206 print_program(mesa_instructions, mesa_instruction_annotation,
4207 num_instructions);
4208 }
4209
4210 prog->Instructions = mesa_instructions;
4211 prog->NumInstructions = num_instructions;
4212
4213 do_set_program_inouts(shader->ir, prog);
4214 count_resources(prog);
4215
4216 check_resources(ctx, shader_program, prog);
4217
4218 _mesa_reference_program(ctx, &shader->Program, prog);
4219
4220 if ((ctx->Shader.Flags & GLSL_NO_OPT) == 0) {
4221 _mesa_optimize_program(ctx, prog);
4222 }
4223
4224 struct st_vertex_program *stvp;
4225 struct st_fragment_program *stfp;
4226 struct st_geometry_program *stgp;
4227
4228 switch (shader->Type) {
4229 case GL_VERTEX_SHADER:
4230 stvp = (struct st_vertex_program *)prog;
4231 stvp->glsl_to_tgsi = v;
4232 break;
4233 case GL_FRAGMENT_SHADER:
4234 stfp = (struct st_fragment_program *)prog;
4235 stfp->glsl_to_tgsi = v;
4236 break;
4237 case GL_GEOMETRY_SHADER:
4238 stgp = (struct st_geometry_program *)prog;
4239 stgp->glsl_to_tgsi = v;
4240 break;
4241 default:
4242 assert(!"should not be reached");
4243 return NULL;
4244 }
4245
4246 return prog;
4247 }
4248
4249 extern "C" {
4250
4251 struct gl_shader *
4252 st_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
4253 {
4254 struct gl_shader *shader;
4255 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER ||
4256 type == GL_GEOMETRY_SHADER_ARB);
4257 shader = rzalloc(NULL, struct gl_shader);
4258 if (shader) {
4259 shader->Type = type;
4260 shader->Name = name;
4261 _mesa_init_shader(ctx, shader);
4262 }
4263 return shader;
4264 }
4265
4266 struct gl_shader_program *
4267 st_new_shader_program(struct gl_context *ctx, GLuint name)
4268 {
4269 struct gl_shader_program *shProg;
4270 shProg = rzalloc(NULL, struct gl_shader_program);
4271 if (shProg) {
4272 shProg->Name = name;
4273 _mesa_init_shader_program(ctx, shProg);
4274 }
4275 return shProg;
4276 }
4277
4278 /**
4279 * Link a shader.
4280 * Called via ctx->Driver.LinkShader()
4281 * This actually involves converting GLSL IR into Mesa gl_programs with
4282 * code lowering and other optimizations.
4283 */
4284 GLboolean
4285 st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
4286 {
4287 assert(prog->LinkStatus);
4288
4289 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4290 if (prog->_LinkedShaders[i] == NULL)
4291 continue;
4292
4293 bool progress;
4294 exec_list *ir = prog->_LinkedShaders[i]->ir;
4295 const struct gl_shader_compiler_options *options =
4296 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
4297
4298 do {
4299 progress = false;
4300
4301 /* Lowering */
4302 do_mat_op_to_vec(ir);
4303 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
4304 | LOG_TO_LOG2
4305 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
4306
4307 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
4308
4309 progress = do_common_optimization(ir, true, options->MaxUnrollIterations) || progress;
4310
4311 progress = lower_quadop_vector(ir, true) || progress;
4312
4313 if (options->EmitNoIfs) {
4314 progress = lower_discard(ir) || progress;
4315 progress = lower_if_to_cond_assign(ir) || progress;
4316 }
4317
4318 if (options->EmitNoNoise)
4319 progress = lower_noise(ir) || progress;
4320
4321 /* If there are forms of indirect addressing that the driver
4322 * cannot handle, perform the lowering pass.
4323 */
4324 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
4325 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
4326 progress =
4327 lower_variable_index_to_cond_assign(ir,
4328 options->EmitNoIndirectInput,
4329 options->EmitNoIndirectOutput,
4330 options->EmitNoIndirectTemp,
4331 options->EmitNoIndirectUniform)
4332 || progress;
4333
4334 progress = do_vec_index_to_cond_assign(ir) || progress;
4335 } while (progress);
4336
4337 validate_ir_tree(ir);
4338 }
4339
4340 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
4341 struct gl_program *linked_prog;
4342
4343 if (prog->_LinkedShaders[i] == NULL)
4344 continue;
4345
4346 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
4347
4348 if (linked_prog) {
4349 bool ok = true;
4350
4351 switch (prog->_LinkedShaders[i]->Type) {
4352 case GL_VERTEX_SHADER:
4353 _mesa_reference_vertprog(ctx, &prog->VertexProgram,
4354 (struct gl_vertex_program *)linked_prog);
4355 ok = ctx->Driver.ProgramStringNotify(ctx, GL_VERTEX_PROGRAM_ARB,
4356 linked_prog);
4357 break;
4358 case GL_FRAGMENT_SHADER:
4359 _mesa_reference_fragprog(ctx, &prog->FragmentProgram,
4360 (struct gl_fragment_program *)linked_prog);
4361 ok = ctx->Driver.ProgramStringNotify(ctx, GL_FRAGMENT_PROGRAM_ARB,
4362 linked_prog);
4363 break;
4364 case GL_GEOMETRY_SHADER:
4365 _mesa_reference_geomprog(ctx, &prog->GeometryProgram,
4366 (struct gl_geometry_program *)linked_prog);
4367 ok = ctx->Driver.ProgramStringNotify(ctx, GL_GEOMETRY_PROGRAM_NV,
4368 linked_prog);
4369 break;
4370 }
4371 if (!ok) {
4372 return GL_FALSE;
4373 }
4374 }
4375
4376 _mesa_reference_program(ctx, &linked_prog, NULL);
4377 }
4378
4379 return GL_TRUE;
4380 }
4381
4382
4383 /**
4384 * Link a GLSL shader program. Called via glLinkProgram().
4385 */
4386 void
4387 st_glsl_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
4388 {
4389 unsigned int i;
4390
4391 _mesa_clear_shader_program_data(ctx, prog);
4392
4393 prog->LinkStatus = GL_TRUE;
4394
4395 for (i = 0; i < prog->NumShaders; i++) {
4396 if (!prog->Shaders[i]->CompileStatus) {
4397 fail_link(prog, "linking with uncompiled shader");
4398 prog->LinkStatus = GL_FALSE;
4399 }
4400 }
4401
4402 prog->Varying = _mesa_new_parameter_list();
4403 _mesa_reference_vertprog(ctx, &prog->VertexProgram, NULL);
4404 _mesa_reference_fragprog(ctx, &prog->FragmentProgram, NULL);
4405 _mesa_reference_geomprog(ctx, &prog->GeometryProgram, NULL);
4406
4407 if (prog->LinkStatus) {
4408 link_shaders(ctx, prog);
4409 }
4410
4411 if (prog->LinkStatus) {
4412 if (!ctx->Driver.LinkShader(ctx, prog)) {
4413 prog->LinkStatus = GL_FALSE;
4414 }
4415 }
4416
4417 set_uniform_initializers(ctx, prog);
4418
4419 if (ctx->Shader.Flags & GLSL_DUMP) {
4420 if (!prog->LinkStatus) {
4421 printf("GLSL shader program %d failed to link\n", prog->Name);
4422 }
4423
4424 if (prog->InfoLog && prog->InfoLog[0] != 0) {
4425 printf("GLSL shader program %d info log:\n", prog->Name);
4426 printf("%s\n", prog->InfoLog);
4427 }
4428 }
4429 }
4430
4431 } /* extern "C" */