src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "tgsi/tgsi_ureg.h"
  38 #include "st_mesa_to_tgsi.h"
  39 #include "shader/prog_instruction.h"
  40 #include "shader/prog_parameter.h"
  41 #include "shader/prog_print.h"
  42 #include "util/u_debug.h"
  43 #include "util/u_math.h"
  44 #include "util/u_memory.h"
  45
  46 struct label {
  47    unsigned branch_target;
  48    unsigned token;
  49 };
  50
  51 struct st_translate {
  52    struct ureg_program *ureg;
  53
  54    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  55    struct ureg_src *constants;
  56    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  57    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  58    struct ureg_dst address[1];
  59    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  60
  61    const GLuint *inputMapping;
  62    const GLuint *outputMapping;
  63
  64    /* For every instruction that contains a label (eg CALL), keep
  65     * details so that we can go back afterwards and emit the correct
  66     * tgsi instruction number for each label.
  67     */
  68    struct label *labels;
  69    unsigned labels_size;
  70    unsigned labels_count;
  71
  72    /* Keep a record of the tgsi instruction number that each mesa
  73     * instruction starts at, will be used to fix up labels after
  74     * translation.
  75     */
  76    unsigned *insn;
  77    unsigned insn_size;
  78    unsigned insn_count;
  79
  80    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  81
  82    boolean error;
  83 };
  84
  85
  86 static unsigned *get_label( struct st_translate *t,
  87                             unsigned branch_target )
  88 {
  89    unsigned i;
  90
  91    if (t->labels_count + 1 >= t->labels_size) {
  92       unsigned old_size = t->labels_size;
  93       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
  94       t->labels = REALLOC( t->labels,
  95                            old_size * sizeof t->labels[0],
  96                            t->labels_size * sizeof t->labels[0] );
  97       if (t->labels == NULL) {
  98          static unsigned dummy;
  99          t->error = TRUE;
 100          return &dummy;
 101       }
 102    }
 103
 104    i = t->labels_count++;
 105    t->labels[i].branch_target = branch_target;
 106    return &t->labels[i].token;
 107 }
 108
 109
 110 static void set_insn_start( struct st_translate *t,
 111                             unsigned start )
 112 {
 113    if (t->insn_count + 1 >= t->insn_size) {
 114       unsigned old_size = t->insn_size;
 115       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 116       t->insn = REALLOC( t->insn,
 117                          old_size * sizeof t->insn[0],
 118                          t->insn_size * sizeof t->insn[0] );
 119       if (t->insn == NULL) {
 120          t->error = TRUE;
 121          return;
 122       }
 123    }
 124
 125    t->insn[t->insn_count++] = start;
 126 }
 127
 128
 129 /*
 130  * Map mesa register file to TGSI register file.
 131  */
 132 static struct ureg_dst
 133 dst_register( struct st_translate *t,
 134               gl_register_file file,
 135               GLuint index )
 136 {
 137    switch( file ) {
 138    case PROGRAM_UNDEFINED:
 139       return ureg_dst_undef();
 140
 141    case PROGRAM_TEMPORARY:
 142       if (ureg_dst_is_undef(t->temps[index]))
 143          t->temps[index] = ureg_DECL_temporary( t->ureg );
 144
 145       return t->temps[index];
 146
 147    case PROGRAM_OUTPUT:
 148       return t->outputs[t->outputMapping[index]];
 149
 150    case PROGRAM_ADDRESS:
 151       return t->address[index];
 152
 153    default:
 154       debug_assert( 0 );
 155       return ureg_dst_undef();
 156    }
 157 }
 158
 159
 160 static struct ureg_src
 161 src_register( struct st_translate *t,
 162               gl_register_file file,
 163               GLuint index )
 164 {
 165    switch( file ) {
 166    case PROGRAM_UNDEFINED:
 167       return ureg_src_undef();
 168
 169    case PROGRAM_TEMPORARY:
 170       if (ureg_dst_is_undef(t->temps[index]))
 171          t->temps[index] = ureg_DECL_temporary( t->ureg );
 172       return ureg_src(t->temps[index]);
 173
 174    case PROGRAM_STATE_VAR:
 175    case PROGRAM_NAMED_PARAM:
 176    case PROGRAM_ENV_PARAM:
 177    case PROGRAM_UNIFORM:
 178    case PROGRAM_CONSTANT:       /* ie, immediate */
 179       return t->constants[index];
 180
 181    case PROGRAM_INPUT:
 182       return t->inputs[t->inputMapping[index]];
 183
 184    case PROGRAM_OUTPUT:
 185       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 186
 187    case PROGRAM_ADDRESS:
 188       return ureg_src(t->address[index]);
 189
 190    default:
 191       debug_assert( 0 );
 192       return ureg_src_undef();
 193    }
 194 }
 195
 196
 197 /**
 198  * Map mesa texture target to TGSI texture target.
 199  */
 200 static unsigned
 201 translate_texture_target( GLuint textarget,
 202                           GLboolean shadow )
 203 {
 204    if (shadow) {
 205       switch( textarget ) {
 206       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 207       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 208       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 209       default: break;
 210       }
 211    }
 212
 213    switch( textarget ) {
 214    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 215    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 216    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 217    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 218    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 219    default:
 220       debug_assert( 0 );
 221       return TGSI_TEXTURE_1D;
 222    }
 223 }
 224
 225
 226 static struct ureg_dst
 227 translate_dst( struct st_translate *t,
 228                const struct prog_dst_register *DstReg,
 229                boolean saturate )
 230 {
 231    struct ureg_dst dst = dst_register( t,
 232                                        DstReg->File,
 233                                        DstReg->Index );
 234
 235    dst = ureg_writemask( dst,
 236                          DstReg->WriteMask );
 237
 238    if (saturate)
 239       dst = ureg_saturate( dst );
 240
 241    if (DstReg->RelAddr)
 242       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 243
 244    return dst;
 245 }
 246
 247
 248 static struct ureg_src
 249 translate_src( struct st_translate *t,
 250                const struct prog_src_register *SrcReg )
 251 {
 252    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 253
 254    src = ureg_swizzle( src,
 255                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 256                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 257                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 258                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 259
 260    if (SrcReg->Negate == NEGATE_XYZW)
 261       src = ureg_negate(src);
 262
 263    if (SrcReg->Abs)
 264       src = ureg_abs(src);
 265
 266    if (SrcReg->RelAddr)
 267       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 268
 269    return src;
 270 }
 271
 272
 273 static struct ureg_src swizzle_4v( struct ureg_src src,
 274                                    const unsigned *swz )
 275 {
 276    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 277 }
 278
 279
 280 /**
 281  * Translate SWZ instructions into a single MAD.  EG:
 282  *
 283  *   SWZ dst, src.x-y10
 284  *
 285  * becomes:
 286  *
 287  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 288  */
 289 static void emit_swz( struct st_translate *t,
 290                       struct ureg_dst dst,
 291                       const struct prog_src_register *SrcReg )
 292 {
 293    struct ureg_program *ureg = t->ureg;
 294    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 295
 296    unsigned negate_mask =  SrcReg->Negate;
 297
 298    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 299                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 300                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 301                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 302
 303    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 304                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 305                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 306                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 307
 308    unsigned negative_one_mask = one_mask & negate_mask;
 309    unsigned positive_one_mask = one_mask & ~negate_mask;
 310
 311    struct ureg_src imm;
 312    unsigned i;
 313    unsigned mul_swizzle[4] = {0,0,0,0};
 314    unsigned add_swizzle[4] = {0,0,0,0};
 315    unsigned src_swizzle[4] = {0,0,0,0};
 316    boolean need_add = FALSE;
 317    boolean need_mul = FALSE;
 318
 319    if (dst.WriteMask == 0)
 320       return;
 321
 322    /* Is this just a MOV?
 323     */
 324    if (zero_mask == 0 &&
 325        one_mask == 0 &&
 326        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 327    {
 328       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 329       return;
 330    }
 331
 332 #define IMM_ZERO    0
 333 #define IMM_ONE     1
 334 #define IMM_NEG_ONE 2
 335
 336    imm = ureg_imm3f( ureg, 0, 1, -1 );
 337
 338    for (i = 0; i < 4; i++) {
 339       unsigned bit = 1 << i;
 340
 341       if (dst.WriteMask & bit) {
 342          if (positive_one_mask & bit) {
 343             mul_swizzle[i] = IMM_ZERO;
 344             add_swizzle[i] = IMM_ONE;
 345             need_add = TRUE;
 346          }
 347          else if (negative_one_mask & bit) {
 348             mul_swizzle[i] = IMM_ZERO;
 349             add_swizzle[i] = IMM_NEG_ONE;
 350             need_add = TRUE;
 351          }
 352          else if (zero_mask & bit) {
 353             mul_swizzle[i] = IMM_ZERO;
 354             add_swizzle[i] = IMM_ZERO;
 355             need_add = TRUE;
 356          }
 357          else {
 358             add_swizzle[i] = IMM_ZERO;
 359             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 360             need_mul = TRUE;
 361             if (negate_mask & bit) {
 362                mul_swizzle[i] = IMM_NEG_ONE;
 363             }
 364             else {
 365                mul_swizzle[i] = IMM_ONE;
 366             }
 367          }
 368       }
 369    }
 370
 371    if (need_mul && need_add) {
 372       ureg_MAD( ureg,
 373                 dst,
 374                 swizzle_4v( src, src_swizzle ),
 375                 swizzle_4v( imm, mul_swizzle ),
 376                 swizzle_4v( imm, add_swizzle ) );
 377    }
 378    else if (need_mul) {
 379       ureg_MUL( ureg,
 380                 dst,
 381                 swizzle_4v( src, src_swizzle ),
 382                 swizzle_4v( imm, mul_swizzle ) );
 383    }
 384    else if (need_add) {
 385       ureg_MOV( ureg,
 386                 dst,
 387                 swizzle_4v( imm, add_swizzle ) );
 388    }
 389    else {
 390       debug_assert(0);
 391    }
 392
 393 #undef IMM_ZERO
 394 #undef IMM_ONE
 395 #undef IMM_NEG_ONE
 396 }
 397
 398
 399
 400 static unsigned
 401 translate_opcode( unsigned op )
 402 {
 403    switch( op ) {
 404    case OPCODE_ARL:
 405       return TGSI_OPCODE_ARL;
 406    case OPCODE_ABS:
 407       return TGSI_OPCODE_ABS;
 408    case OPCODE_ADD:
 409       return TGSI_OPCODE_ADD;
 410    case OPCODE_BGNLOOP:
 411       return TGSI_OPCODE_BGNLOOP;
 412    case OPCODE_BGNSUB:
 413       return TGSI_OPCODE_BGNSUB;
 414    case OPCODE_BRA:
 415       return TGSI_OPCODE_BRA;
 416    case OPCODE_BRK:
 417       return TGSI_OPCODE_BRK;
 418    case OPCODE_CAL:
 419       return TGSI_OPCODE_CAL;
 420    case OPCODE_CMP:
 421       return TGSI_OPCODE_CMP;
 422    case OPCODE_CONT:
 423       return TGSI_OPCODE_CONT;
 424    case OPCODE_COS:
 425       return TGSI_OPCODE_COS;
 426    case OPCODE_DDX:
 427       return TGSI_OPCODE_DDX;
 428    case OPCODE_DDY:
 429       return TGSI_OPCODE_DDY;
 430    case OPCODE_DP2:
 431       return TGSI_OPCODE_DP2;
 432    case OPCODE_DP2A:
 433       return TGSI_OPCODE_DP2A;
 434    case OPCODE_DP3:
 435       return TGSI_OPCODE_DP3;
 436    case OPCODE_DP4:
 437       return TGSI_OPCODE_DP4;
 438    case OPCODE_DPH:
 439       return TGSI_OPCODE_DPH;
 440    case OPCODE_DST:
 441       return TGSI_OPCODE_DST;
 442    case OPCODE_ELSE:
 443       return TGSI_OPCODE_ELSE;
 444    case OPCODE_ENDIF:
 445       return TGSI_OPCODE_ENDIF;
 446    case OPCODE_ENDLOOP:
 447       return TGSI_OPCODE_ENDLOOP;
 448    case OPCODE_ENDSUB:
 449       return TGSI_OPCODE_ENDSUB;
 450    case OPCODE_EX2:
 451       return TGSI_OPCODE_EX2;
 452    case OPCODE_EXP:
 453       return TGSI_OPCODE_EXP;
 454    case OPCODE_FLR:
 455       return TGSI_OPCODE_FLR;
 456    case OPCODE_FRC:
 457       return TGSI_OPCODE_FRC;
 458    case OPCODE_IF:
 459       return TGSI_OPCODE_IF;
 460    case OPCODE_TRUNC:
 461       return TGSI_OPCODE_TRUNC;
 462    case OPCODE_KIL:
 463       return TGSI_OPCODE_KIL;
 464    case OPCODE_KIL_NV:
 465       return TGSI_OPCODE_KILP;
 466    case OPCODE_LG2:
 467       return TGSI_OPCODE_LG2;
 468    case OPCODE_LOG:
 469       return TGSI_OPCODE_LOG;
 470    case OPCODE_LIT:
 471       return TGSI_OPCODE_LIT;
 472    case OPCODE_LRP:
 473       return TGSI_OPCODE_LRP;
 474    case OPCODE_MAD:
 475       return TGSI_OPCODE_MAD;
 476    case OPCODE_MAX:
 477       return TGSI_OPCODE_MAX;
 478    case OPCODE_MIN:
 479       return TGSI_OPCODE_MIN;
 480    case OPCODE_MOV:
 481       return TGSI_OPCODE_MOV;
 482    case OPCODE_MUL:
 483       return TGSI_OPCODE_MUL;
 484    case OPCODE_NOP:
 485       return TGSI_OPCODE_NOP;
 486    case OPCODE_NRM3:
 487       return TGSI_OPCODE_NRM;
 488    case OPCODE_NRM4:
 489       return TGSI_OPCODE_NRM4;
 490    case OPCODE_POW:
 491       return TGSI_OPCODE_POW;
 492    case OPCODE_RCP:
 493       return TGSI_OPCODE_RCP;
 494    case OPCODE_RET:
 495       return TGSI_OPCODE_RET;
 496    case OPCODE_RSQ:
 497       return TGSI_OPCODE_RSQ;
 498    case OPCODE_SCS:
 499       return TGSI_OPCODE_SCS;
 500    case OPCODE_SEQ:
 501       return TGSI_OPCODE_SEQ;
 502    case OPCODE_SGE:
 503       return TGSI_OPCODE_SGE;
 504    case OPCODE_SGT:
 505       return TGSI_OPCODE_SGT;
 506    case OPCODE_SIN:
 507       return TGSI_OPCODE_SIN;
 508    case OPCODE_SLE:
 509       return TGSI_OPCODE_SLE;
 510    case OPCODE_SLT:
 511       return TGSI_OPCODE_SLT;
 512    case OPCODE_SNE:
 513       return TGSI_OPCODE_SNE;
 514    case OPCODE_SSG:
 515       return TGSI_OPCODE_SSG;
 516    case OPCODE_SUB:
 517       return TGSI_OPCODE_SUB;
 518    case OPCODE_SWZ:
 519       return TGSI_OPCODE_SWZ;
 520    case OPCODE_TEX:
 521       return TGSI_OPCODE_TEX;
 522    case OPCODE_TXB:
 523       return TGSI_OPCODE_TXB;
 524    case OPCODE_TXD:
 525       return TGSI_OPCODE_TXD;
 526    case OPCODE_TXL:
 527       return TGSI_OPCODE_TXL;
 528    case OPCODE_TXP:
 529       return TGSI_OPCODE_TXP;
 530    case OPCODE_XPD:
 531       return TGSI_OPCODE_XPD;
 532    case OPCODE_END:
 533       return TGSI_OPCODE_END;
 534    default:
 535       debug_assert( 0 );
 536       return TGSI_OPCODE_NOP;
 537    }
 538 }
 539
 540
 541 static void
 542 compile_instruction(
 543    struct st_translate *t,
 544    const struct prog_instruction *inst )
 545 {
 546    struct ureg_program *ureg = t->ureg;
 547    GLuint i;
 548    struct ureg_dst dst[1];
 549    struct ureg_src src[4];
 550    unsigned num_dst;
 551    unsigned num_src;
 552
 553    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 554    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 555
 556    if (num_dst)
 557       dst[0] = translate_dst( t,
 558                               &inst->DstReg,
 559                               inst->SaturateMode );
 560
 561    for (i = 0; i < num_src; i++)
 562       src[i] = translate_src( t, &inst->SrcReg[i] );
 563
 564    switch( inst->Opcode ) {
 565    case OPCODE_SWZ:
 566       emit_swz( t, dst[0], &inst->SrcReg[0] );
 567       return;
 568
 569    case OPCODE_BGNLOOP:
 570    case OPCODE_CAL:
 571    case OPCODE_ELSE:
 572    case OPCODE_ENDLOOP:
 573    case OPCODE_IF:
 574       debug_assert(num_dst == 0);
 575       ureg_label_insn( ureg,
 576                        translate_opcode( inst->Opcode ),
 577                        src, num_src,
 578                        get_label( t, inst->BranchTarget ));
 579       return;
 580
 581    case OPCODE_TEX:
 582    case OPCODE_TXB:
 583    case OPCODE_TXD:
 584    case OPCODE_TXL:
 585    case OPCODE_TXP:
 586       src[num_src++] = t->samplers[inst->TexSrcUnit];
 587       ureg_tex_insn( ureg,
 588                      translate_opcode( inst->Opcode ),
 589                      dst, num_dst,
 590                      translate_texture_target( inst->TexSrcTarget,
 591                                                inst->TexShadow ),
 592                      src, num_src );
 593       return;
 594
 595    case OPCODE_SCS:
 596       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 597       ureg_insn( ureg,
 598                  translate_opcode( inst->Opcode ),
 599                  dst, num_dst,
 600                  src, num_src );
 601       break;
 602
 603    case OPCODE_XPD:
 604       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 605       ureg_insn( ureg,
 606                  translate_opcode( inst->Opcode ),
 607                  dst, num_dst,
 608                  src, num_src );
 609       break;
 610
 611    case OPCODE_NOISE1:
 612    case OPCODE_NOISE2:
 613    case OPCODE_NOISE3:
 614    case OPCODE_NOISE4:
 615       /* At some point, a motivated person could add a better
 616        * implementation of noise.  Currently not even the nvidia
 617        * binary drivers do anything more than this.  In any case, the
 618        * place to do this is in the GL state tracker, not the poor
 619        * driver.
 620        */
 621       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 622       break;
 623
 624
 625
 626    default:
 627       ureg_insn( ureg,
 628                  translate_opcode( inst->Opcode ),
 629                  dst, num_dst,
 630                  src, num_src );
 631       break;
 632    }
 633 }
 634
 635
 636 /**
 637  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 638  */
 639 static void
 640 emit_inverted_wpos( struct st_translate *t,
 641                     const struct gl_program *program )
 642 {
 643    struct ureg_program *ureg = t->ureg;
 644
 645    /* Fragment program uses fragment position input.
 646     * Need to replace instances of INPUT[WPOS] with temp T
 647     * where T = INPUT[WPOS] by y is inverted.
 648     */
 649    static const gl_state_index winSizeState[STATE_LENGTH]
 650       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 651
 652    /* XXX: note we are modifying the incoming shader here!  Need to
 653     * do this before emitting the constant decls below, or this
 654     * will be missed:
 655     */
 656    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 657                                                        winSizeState);
 658
 659    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 660    struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
 661    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 662
 663    /* MOV wpos_temp, input[wpos]
 664     */
 665    ureg_MOV( ureg, wpos_temp, wpos_input );
 666
 667    /* SUB wpos_temp.y, winsize_const, wpos_input
 668     */
 669    ureg_SUB( ureg,
 670              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 671              winsize,
 672              wpos_input);
 673
 674    /* Use wpos_temp as position input from here on:
 675     */
 676    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 677 }
 678
 679
 680 /**
 681  * Translate Mesa program to TGSI format.
 682  * \param program  the program to translate
 683  * \param numInputs  number of input registers used
 684  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 685  *                      input indexes
 686  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 687  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 688  *                            each input
 689  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 690  * \param numOutputs  number of output registers used
 691  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 692  *                       generic outputs
 693  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 694  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 695  *                             each output
 696  *
 697  * \return  array of translated tokens, caller's responsibility to free
 698  */
 699 const struct tgsi_token *
 700 st_translate_mesa_program(
 701    GLcontext *ctx,
 702    uint procType,
 703    const struct gl_program *program,
 704    GLuint numInputs,
 705    const GLuint inputMapping[],
 706    const ubyte inputSemanticName[],
 707    const ubyte inputSemanticIndex[],
 708    const GLuint interpMode[],
 709    const GLbitfield inputFlags[],
 710    GLuint numOutputs,
 711    const GLuint outputMapping[],
 712    const ubyte outputSemanticName[],
 713    const ubyte outputSemanticIndex[],
 714    const GLbitfield outputFlags[] )
 715 {
 716    struct st_translate translate, *t;
 717    struct ureg_program *ureg;
 718    const struct tgsi_token *tokens = NULL;
 719    unsigned i;
 720
 721    t = &translate;
 722    memset(t, 0, sizeof *t);
 723
 724    t->procType = procType;
 725    t->inputMapping = inputMapping;
 726    t->outputMapping = outputMapping;
 727    t->ureg = ureg_create( procType );
 728    if (t->ureg == NULL)
 729       return NULL;
 730
 731    ureg = t->ureg;
 732
 733    /*_mesa_print_program(program);*/
 734
 735    /*
 736     * Declare input attributes.
 737     */
 738    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 739       for (i = 0; i < numInputs; i++) {
 740          t->inputs[i] = ureg_DECL_fs_input(ureg,
 741                                            inputSemanticName[i],
 742                                            inputSemanticIndex[i],
 743                                            interpMode[i]);
 744       }
 745
 746       if (program->InputsRead & FRAG_BIT_WPOS) {
 747          /* Must do this after setting up t->inputs, and before
 748           * emitting constant references, below:
 749           */
 750          emit_inverted_wpos( t, program );
 751       }
 752
 753       /*
 754        * Declare output attributes.
 755        */
 756       for (i = 0; i < numOutputs; i++) {
 757          switch (outputSemanticName[i]) {
 758          case TGSI_SEMANTIC_POSITION:
 759             t->outputs[i] = ureg_DECL_output( ureg,
 760                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 761                                               outputSemanticIndex[i] );
 762
 763             t->outputs[i] = ureg_writemask( t->outputs[i],
 764                                             TGSI_WRITEMASK_Z );
 765             break;
 766          case TGSI_SEMANTIC_COLOR:
 767             t->outputs[i] = ureg_DECL_output( ureg,
 768                                               TGSI_SEMANTIC_COLOR,
 769                                               outputSemanticIndex[i] );
 770             break;
 771          default:
 772             debug_assert(0);
 773             return 0;
 774          }
 775       }
 776    }
 777    else {
 778       for (i = 0; i < numInputs; i++) {
 779          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 780       }
 781
 782       for (i = 0; i < numOutputs; i++) {
 783          t->outputs[i] = ureg_DECL_output( ureg,
 784                                            outputSemanticName[i],
 785                                            outputSemanticIndex[i] );
 786       }
 787    }
 788
 789    /* Declare address register.
 790     */
 791    if (program->NumAddressRegs > 0) {
 792       debug_assert( program->NumAddressRegs == 1 );
 793       t->address[0] = ureg_DECL_address( ureg );
 794    }
 795
 796
 797    /* Emit constants and immediates.  Mesa uses a single index space
 798     * for these, so we put all the translated regs in t->constants.
 799     */
 800    if (program->Parameters) {
 801
 802       t->constants = CALLOC( program->Parameters->NumParameters,
 803                              sizeof t->constants[0] );
 804       if (t->constants == NULL)
 805          goto out;
 806
 807       for (i = 0; i < program->Parameters->NumParameters; i++) {
 808          switch (program->Parameters->Parameters[i].Type) {
 809          case PROGRAM_ENV_PARAM:
 810          case PROGRAM_STATE_VAR:
 811          case PROGRAM_NAMED_PARAM:
 812          case PROGRAM_UNIFORM:
 813             t->constants[i] = ureg_DECL_constant( ureg, i );
 814             break;
 815
 816             /* Emit immediates only when there is no address register
 817              * in use.  FIXME: Be smarter and recognize param arrays:
 818              * indirect addressing is only valid within the referenced
 819              * array.
 820              */
 821          case PROGRAM_CONSTANT:
 822             if (program->NumAddressRegs > 0)
 823                t->constants[i] = ureg_DECL_constant( ureg, i );
 824             else
 825                t->constants[i] =
 826                   ureg_DECL_immediate( ureg,
 827                                        program->Parameters->ParameterValues[i],
 828                                        4 );
 829             break;
 830          default:
 831             break;
 832          }
 833       }
 834    }
 835
 836    /* texture samplers */
 837    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
 838       if (program->SamplersUsed & (1 << i)) {
 839          t->samplers[i] = ureg_DECL_sampler( ureg, i );
 840       }
 841    }
 842
 843    /* Emit each instruction in turn:
 844     */
 845    for (i = 0; i < program->NumInstructions; i++) {
 846       set_insn_start( t, ureg_get_instruction_number( ureg ));
 847       compile_instruction( t, &program->Instructions[i] );
 848    }
 849
 850    /* Fix up all emitted labels:
 851     */
 852    for (i = 0; i < t->labels_count; i++) {
 853       ureg_fixup_label( ureg,
 854                         t->labels[i].token,
 855                         t->insn[t->labels[i].branch_target] );
 856    }
 857
 858    tokens = ureg_get_tokens( ureg, NULL );
 859    ureg_destroy( ureg );
 860
 861 out:
 862    FREE(t->insn);
 863    FREE(t->labels);
 864    FREE(t->constants);
 865
 866    if (t->error) {
 867       debug_printf("%s: translate error flag set\n", __FUNCTION__);
 868       FREE((void *)tokens);
 869       tokens = NULL;
 870    }
 871
 872    if (!tokens) {
 873       debug_printf("%s: failed to translate Mesa program:\n", __FUNCTION__);
 874       _mesa_print_program(program);
 875       debug_assert(0);
 876    }
 877
 878    return tokens;
 879 }
 880
 881
 882 /**
 883  * Tokens cannot be free with _mesa_free otherwise the builtin gallium
 884  * malloc debugging will get confused.
 885  */
 886 void
 887 st_free_tokens(const struct tgsi_token *tokens)
 888 {
 889    FREE((void *)tokens);
 890 }