1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_NAMED_PARAM) | \
53 (1 << PROGRAM_CONSTANT) | \
54 (1 << PROGRAM_UNIFORM))
58 unsigned branch_target
;
64 * Intermediate state used during shader translation.
67 struct ureg_program
*ureg
;
69 struct ureg_dst temps
[MAX_PROGRAM_TEMPS
];
70 struct ureg_src
*constants
;
71 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
72 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
73 struct ureg_dst address
[1];
74 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
75 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
77 const GLuint
*inputMapping
;
78 const GLuint
*outputMapping
;
80 /* For every instruction that contains a label (eg CALL), keep
81 * details so that we can go back afterwards and emit the correct
82 * tgsi instruction number for each label.
86 unsigned labels_count
;
88 /* Keep a record of the tgsi instruction number that each mesa
89 * instruction starts at, will be used to fix up labels after
96 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
102 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
103 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
105 TGSI_SEMANTIC_VERTEXID
,
106 TGSI_SEMANTIC_INSTANCEID
111 * Make note of a branch to a label in the TGSI code.
112 * After we've emitted all instructions, we'll go over the list
113 * of labels built here and patch the TGSI code with the actual
114 * location of each label.
116 static unsigned *get_label( struct st_translate
*t
,
117 unsigned branch_target
)
121 if (t
->labels_count
+ 1 >= t
->labels_size
) {
122 unsigned old_size
= t
->labels_size
;
123 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
124 t
->labels
= REALLOC( t
->labels
,
125 old_size
* sizeof t
->labels
[0],
126 t
->labels_size
* sizeof t
->labels
[0] );
127 if (t
->labels
== NULL
) {
128 static unsigned dummy
;
134 i
= t
->labels_count
++;
135 t
->labels
[i
].branch_target
= branch_target
;
136 return &t
->labels
[i
].token
;
141 * Called prior to emitting the TGSI code for each Mesa instruction.
142 * Allocate additional space for instructions if needed.
143 * Update the insn[] array so the next Mesa instruction points to
144 * the next TGSI instruction.
146 static void set_insn_start( struct st_translate
*t
,
149 if (t
->insn_count
+ 1 >= t
->insn_size
) {
150 unsigned old_size
= t
->insn_size
;
151 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
152 t
->insn
= REALLOC( t
->insn
,
153 old_size
* sizeof t
->insn
[0],
154 t
->insn_size
* sizeof t
->insn
[0] );
155 if (t
->insn
== NULL
) {
161 t
->insn
[t
->insn_count
++] = start
;
166 * Map a Mesa dst register to a TGSI ureg_dst register.
168 static struct ureg_dst
169 dst_register( struct st_translate
*t
,
170 gl_register_file file
,
174 case PROGRAM_UNDEFINED
:
175 return ureg_dst_undef();
177 case PROGRAM_TEMPORARY
:
178 if (ureg_dst_is_undef(t
->temps
[index
]))
179 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
181 return t
->temps
[index
];
184 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
185 assert(index
< VERT_RESULT_MAX
);
186 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
187 assert(index
< FRAG_RESULT_MAX
);
189 assert(index
< GEOM_RESULT_MAX
);
191 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
193 return t
->outputs
[t
->outputMapping
[index
]];
195 case PROGRAM_ADDRESS
:
196 return t
->address
[index
];
200 return ureg_dst_undef();
206 * Map a Mesa src register to a TGSI ureg_src register.
208 static struct ureg_src
209 src_register( struct st_translate
*t
,
210 gl_register_file file
,
214 case PROGRAM_UNDEFINED
:
215 return ureg_src_undef();
217 case PROGRAM_TEMPORARY
:
219 assert(index
< Elements(t
->temps
));
220 if (ureg_dst_is_undef(t
->temps
[index
]))
221 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
222 return ureg_src(t
->temps
[index
]);
224 case PROGRAM_NAMED_PARAM
:
225 case PROGRAM_ENV_PARAM
:
226 case PROGRAM_LOCAL_PARAM
:
227 case PROGRAM_UNIFORM
:
229 return t
->constants
[index
];
230 case PROGRAM_STATE_VAR
:
231 case PROGRAM_CONSTANT
: /* ie, immediate */
233 return ureg_DECL_constant( t
->ureg
, 0 );
235 return t
->constants
[index
];
238 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
239 return t
->inputs
[t
->inputMapping
[index
]];
242 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
243 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
245 case PROGRAM_ADDRESS
:
246 return ureg_src(t
->address
[index
]);
248 case PROGRAM_SYSTEM_VALUE
:
249 assert(index
< Elements(t
->systemValues
));
250 return t
->systemValues
[index
];
254 return ureg_src_undef();
260 * Map mesa texture target to TGSI texture target.
263 st_translate_texture_target( GLuint textarget
,
267 switch( textarget
) {
268 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_SHADOW1D
;
269 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_SHADOW2D
;
270 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_SHADOWRECT
;
271 case TEXTURE_1D_ARRAY_INDEX
: return TGSI_TEXTURE_SHADOW1D_ARRAY
;
272 case TEXTURE_2D_ARRAY_INDEX
: return TGSI_TEXTURE_SHADOW2D_ARRAY
;
273 case TEXTURE_CUBE_INDEX
: return TGSI_TEXTURE_SHADOWCUBE
;
278 switch( textarget
) {
279 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_1D
;
280 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_2D
;
281 case TEXTURE_3D_INDEX
: return TGSI_TEXTURE_3D
;
282 case TEXTURE_CUBE_INDEX
: return TGSI_TEXTURE_CUBE
;
283 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_RECT
;
284 case TEXTURE_1D_ARRAY_INDEX
: return TGSI_TEXTURE_1D_ARRAY
;
285 case TEXTURE_2D_ARRAY_INDEX
: return TGSI_TEXTURE_2D_ARRAY
;
286 case TEXTURE_EXTERNAL_INDEX
: return TGSI_TEXTURE_2D
;
289 return TGSI_TEXTURE_1D
;
295 * Create a TGSI ureg_dst register from a Mesa dest register.
297 static struct ureg_dst
298 translate_dst( struct st_translate
*t
,
299 const struct prog_dst_register
*DstReg
,
303 struct ureg_dst dst
= dst_register( t
,
307 dst
= ureg_writemask( dst
,
311 dst
= ureg_saturate( dst
);
312 else if (clamp_color
&& DstReg
->File
== PROGRAM_OUTPUT
) {
313 /* Clamp colors for ARB_color_buffer_float. */
314 switch (t
->procType
) {
315 case TGSI_PROCESSOR_VERTEX
:
316 /* XXX if the geometry shader is present, this must be done there
317 * instead of here. */
318 if (DstReg
->Index
== VERT_RESULT_COL0
||
319 DstReg
->Index
== VERT_RESULT_COL1
||
320 DstReg
->Index
== VERT_RESULT_BFC0
||
321 DstReg
->Index
== VERT_RESULT_BFC1
) {
322 dst
= ureg_saturate(dst
);
326 case TGSI_PROCESSOR_FRAGMENT
:
327 if (DstReg
->Index
>= FRAG_RESULT_COLOR
) {
328 dst
= ureg_saturate(dst
);
335 dst
= ureg_dst_indirect( dst
, ureg_src(t
->address
[0]) );
342 * Create a TGSI ureg_src register from a Mesa src register.
344 static struct ureg_src
345 translate_src( struct st_translate
*t
,
346 const struct prog_src_register
*SrcReg
)
348 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
350 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& SrcReg
->HasIndex2
) {
351 src
= src_register( t
, SrcReg
->File
, SrcReg
->Index2
);
352 if (SrcReg
->RelAddr2
)
353 src
= ureg_src_dimension_indirect( src
, ureg_src(t
->address
[0]),
356 src
= ureg_src_dimension( src
, SrcReg
->Index
);
359 src
= ureg_swizzle( src
,
360 GET_SWZ( SrcReg
->Swizzle
, 0 ) & 0x3,
361 GET_SWZ( SrcReg
->Swizzle
, 1 ) & 0x3,
362 GET_SWZ( SrcReg
->Swizzle
, 2 ) & 0x3,
363 GET_SWZ( SrcReg
->Swizzle
, 3 ) & 0x3);
365 if (SrcReg
->Negate
== NEGATE_XYZW
)
366 src
= ureg_negate(src
);
371 if (SrcReg
->RelAddr
) {
372 src
= ureg_src_indirect( src
, ureg_src(t
->address
[0]));
373 if (SrcReg
->File
!= PROGRAM_INPUT
&&
374 SrcReg
->File
!= PROGRAM_OUTPUT
) {
375 /* If SrcReg->Index was negative, it was set to zero in
376 * src_register(). Reassign it now. But don't do this
377 * for input/output regs since they get remapped while
378 * const buffers don't.
380 src
.Index
= SrcReg
->Index
;
388 static struct ureg_src
swizzle_4v( struct ureg_src src
,
389 const unsigned *swz
)
391 return ureg_swizzle( src
, swz
[0], swz
[1], swz
[2], swz
[3] );
396 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
402 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
404 static void emit_swz( struct st_translate
*t
,
406 const struct prog_src_register
*SrcReg
)
408 struct ureg_program
*ureg
= t
->ureg
;
409 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
411 unsigned negate_mask
= SrcReg
->Negate
;
413 unsigned one_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ONE
) << 0 |
414 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ONE
) << 1 |
415 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ONE
) << 2 |
416 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ONE
) << 3);
418 unsigned zero_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ZERO
) << 0 |
419 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ZERO
) << 1 |
420 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ZERO
) << 2 |
421 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ZERO
) << 3);
423 unsigned negative_one_mask
= one_mask
& negate_mask
;
424 unsigned positive_one_mask
= one_mask
& ~negate_mask
;
428 unsigned mul_swizzle
[4] = {0,0,0,0};
429 unsigned add_swizzle
[4] = {0,0,0,0};
430 unsigned src_swizzle
[4] = {0,0,0,0};
431 boolean need_add
= FALSE
;
432 boolean need_mul
= FALSE
;
434 if (dst
.WriteMask
== 0)
437 /* Is this just a MOV?
439 if (zero_mask
== 0 &&
441 (negate_mask
== 0 || negate_mask
== TGSI_WRITEMASK_XYZW
))
443 ureg_MOV( ureg
, dst
, translate_src( t
, SrcReg
));
449 #define IMM_NEG_ONE 2
451 imm
= ureg_imm3f( ureg
, 0, 1, -1 );
453 for (i
= 0; i
< 4; i
++) {
454 unsigned bit
= 1 << i
;
456 if (dst
.WriteMask
& bit
) {
457 if (positive_one_mask
& bit
) {
458 mul_swizzle
[i
] = IMM_ZERO
;
459 add_swizzle
[i
] = IMM_ONE
;
462 else if (negative_one_mask
& bit
) {
463 mul_swizzle
[i
] = IMM_ZERO
;
464 add_swizzle
[i
] = IMM_NEG_ONE
;
467 else if (zero_mask
& bit
) {
468 mul_swizzle
[i
] = IMM_ZERO
;
469 add_swizzle
[i
] = IMM_ZERO
;
473 add_swizzle
[i
] = IMM_ZERO
;
474 src_swizzle
[i
] = GET_SWZ(SrcReg
->Swizzle
, i
);
476 if (negate_mask
& bit
) {
477 mul_swizzle
[i
] = IMM_NEG_ONE
;
480 mul_swizzle
[i
] = IMM_ONE
;
486 if (need_mul
&& need_add
) {
489 swizzle_4v( src
, src_swizzle
),
490 swizzle_4v( imm
, mul_swizzle
),
491 swizzle_4v( imm
, add_swizzle
) );
496 swizzle_4v( src
, src_swizzle
),
497 swizzle_4v( imm
, mul_swizzle
) );
502 swizzle_4v( imm
, add_swizzle
) );
515 * Negate the value of DDY to match GL semantics where (0,0) is the
516 * lower-left corner of the window.
517 * Note that the GL_ARB_fragment_coord_conventions extension will
518 * effect this someday.
520 static void emit_ddy( struct st_translate
*t
,
522 const struct prog_src_register
*SrcReg
)
524 struct ureg_program
*ureg
= t
->ureg
;
525 struct ureg_src src
= translate_src( t
, SrcReg
);
526 src
= ureg_negate( src
);
527 ureg_DDY( ureg
, dst
, src
);
533 translate_opcode( unsigned op
)
537 return TGSI_OPCODE_ARL
;
539 return TGSI_OPCODE_ABS
;
541 return TGSI_OPCODE_ADD
;
543 return TGSI_OPCODE_BGNLOOP
;
545 return TGSI_OPCODE_BGNSUB
;
547 return TGSI_OPCODE_BRA
;
549 return TGSI_OPCODE_BRK
;
551 return TGSI_OPCODE_CAL
;
553 return TGSI_OPCODE_CMP
;
555 return TGSI_OPCODE_CONT
;
557 return TGSI_OPCODE_COS
;
559 return TGSI_OPCODE_DDX
;
561 return TGSI_OPCODE_DDY
;
563 return TGSI_OPCODE_DP2
;
565 return TGSI_OPCODE_DP2A
;
567 return TGSI_OPCODE_DP3
;
569 return TGSI_OPCODE_DP4
;
571 return TGSI_OPCODE_DPH
;
573 return TGSI_OPCODE_DST
;
575 return TGSI_OPCODE_ELSE
;
576 case OPCODE_EMIT_VERTEX
:
577 return TGSI_OPCODE_EMIT
;
578 case OPCODE_END_PRIMITIVE
:
579 return TGSI_OPCODE_ENDPRIM
;
581 return TGSI_OPCODE_ENDIF
;
583 return TGSI_OPCODE_ENDLOOP
;
585 return TGSI_OPCODE_ENDSUB
;
587 return TGSI_OPCODE_EX2
;
589 return TGSI_OPCODE_EXP
;
591 return TGSI_OPCODE_FLR
;
593 return TGSI_OPCODE_FRC
;
595 return TGSI_OPCODE_IF
;
597 return TGSI_OPCODE_TRUNC
;
599 return TGSI_OPCODE_KIL
;
601 return TGSI_OPCODE_KILP
;
603 return TGSI_OPCODE_LG2
;
605 return TGSI_OPCODE_LOG
;
607 return TGSI_OPCODE_LIT
;
609 return TGSI_OPCODE_LRP
;
611 return TGSI_OPCODE_MAD
;
613 return TGSI_OPCODE_MAX
;
615 return TGSI_OPCODE_MIN
;
617 return TGSI_OPCODE_MOV
;
619 return TGSI_OPCODE_MUL
;
621 return TGSI_OPCODE_NOP
;
623 return TGSI_OPCODE_NRM
;
625 return TGSI_OPCODE_NRM4
;
627 return TGSI_OPCODE_POW
;
629 return TGSI_OPCODE_RCP
;
631 return TGSI_OPCODE_RET
;
633 return TGSI_OPCODE_RSQ
;
635 return TGSI_OPCODE_SCS
;
637 return TGSI_OPCODE_SEQ
;
639 return TGSI_OPCODE_SGE
;
641 return TGSI_OPCODE_SGT
;
643 return TGSI_OPCODE_SIN
;
645 return TGSI_OPCODE_SLE
;
647 return TGSI_OPCODE_SLT
;
649 return TGSI_OPCODE_SNE
;
651 return TGSI_OPCODE_SSG
;
653 return TGSI_OPCODE_SUB
;
655 return TGSI_OPCODE_TEX
;
657 return TGSI_OPCODE_TXB
;
659 return TGSI_OPCODE_TXD
;
661 return TGSI_OPCODE_TXL
;
663 return TGSI_OPCODE_TXP
;
665 return TGSI_OPCODE_XPD
;
667 return TGSI_OPCODE_END
;
670 return TGSI_OPCODE_NOP
;
677 struct st_translate
*t
,
678 const struct prog_instruction
*inst
,
679 boolean clamp_dst_color_output
)
681 struct ureg_program
*ureg
= t
->ureg
;
683 struct ureg_dst dst
[1];
684 struct ureg_src src
[4];
688 num_dst
= _mesa_num_inst_dst_regs( inst
->Opcode
);
689 num_src
= _mesa_num_inst_src_regs( inst
->Opcode
);
692 dst
[0] = translate_dst( t
,
695 clamp_dst_color_output
);
697 for (i
= 0; i
< num_src
; i
++)
698 src
[i
] = translate_src( t
, &inst
->SrcReg
[i
] );
700 switch( inst
->Opcode
) {
702 emit_swz( t
, dst
[0], &inst
->SrcReg
[0] );
710 debug_assert(num_dst
== 0);
711 ureg_label_insn( ureg
,
712 translate_opcode( inst
->Opcode
),
714 get_label( t
, inst
->BranchTarget
));
722 src
[num_src
++] = t
->samplers
[inst
->TexSrcUnit
];
724 translate_opcode( inst
->Opcode
),
726 st_translate_texture_target( inst
->TexSrcTarget
,
733 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
735 translate_opcode( inst
->Opcode
),
741 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XYZ
);
743 translate_opcode( inst
->Opcode
),
752 /* At some point, a motivated person could add a better
753 * implementation of noise. Currently not even the nvidia
754 * binary drivers do anything more than this. In any case, the
755 * place to do this is in the GL state tracker, not the poor
758 ureg_MOV( ureg
, dst
[0], ureg_imm1f(ureg
, 0.5) );
762 emit_ddy( t
, dst
[0], &inst
->SrcReg
[0] );
767 translate_opcode( inst
->Opcode
),
776 * Emit the TGSI instructions for inverting and adjusting WPOS.
777 * This code is unavoidable because it also depends on whether
778 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
781 emit_wpos_adjustment( struct st_translate
*t
,
782 const struct gl_program
*program
,
784 GLfloat adjX
, GLfloat adjY
[2])
786 struct ureg_program
*ureg
= t
->ureg
;
788 /* Fragment program uses fragment position input.
789 * Need to replace instances of INPUT[WPOS] with temp T
790 * where T = INPUT[WPOS] by y is inverted.
792 static const gl_state_index wposTransformState
[STATE_LENGTH
]
793 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
, 0, 0, 0 };
795 /* XXX: note we are modifying the incoming shader here! Need to
796 * do this before emitting the constant decls below, or this
799 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
802 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
803 struct ureg_dst wpos_temp
= ureg_DECL_temporary( ureg
);
804 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
806 /* First, apply the coordinate shift: */
807 if (adjX
|| adjY
[0] || adjY
[1]) {
808 if (adjY
[0] != adjY
[1]) {
809 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
810 * depending on whether inversion is actually going to be applied
811 * or not, which is determined by testing against the inversion
812 * state variable used below, which will be either +1 or -1.
814 struct ureg_dst adj_temp
= ureg_DECL_temporary(ureg
);
816 ureg_CMP(ureg
, adj_temp
,
817 ureg_scalar(wpostrans
, invert
? 2 : 0),
818 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
),
819 ureg_imm4f(ureg
, adjX
, adjY
[1], 0.0f
, 0.0f
));
820 ureg_ADD(ureg
, wpos_temp
, wpos_input
, ureg_src(adj_temp
));
822 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
823 ureg_imm4f(ureg
, adjX
, adjY
[0], 0.0f
, 0.0f
));
825 wpos_input
= ureg_src(wpos_temp
);
827 /* MOV wpos_temp, input[wpos]
829 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
832 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
833 * inversion/identity, or the other way around if we're drawing to an FBO.
836 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
839 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
841 ureg_scalar(wpostrans
, 0),
842 ureg_scalar(wpostrans
, 1));
844 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
847 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
849 ureg_scalar(wpostrans
, 2),
850 ureg_scalar(wpostrans
, 3));
853 /* Use wpos_temp as position input from here on:
855 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
860 * Emit fragment position/ooordinate code.
863 emit_wpos(struct st_context
*st
,
864 struct st_translate
*t
,
865 const struct gl_program
*program
,
866 struct ureg_program
*ureg
)
868 const struct gl_fragment_program
*fp
=
869 (const struct gl_fragment_program
*) program
;
870 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
872 GLfloat adjY
[2] = { 0.0f
, 0.0f
};
873 boolean invert
= FALSE
;
875 /* Query the pixel center conventions supported by the pipe driver and set
876 * adjX, adjY to help out if it cannot handle the requested one internally.
878 * The bias of the y-coordinate depends on whether y-inversion takes place
879 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
880 * drawing to an FBO (causes additional inversion), and whether the the pipe
881 * driver origin and the requested origin differ (the latter condition is
882 * stored in the 'invert' variable).
884 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
891 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
892 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
893 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
894 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
896 * inversion and center shift:
897 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
898 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
899 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
900 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
902 if (fp
->OriginUpperLeft
) {
903 /* Fragment shader wants origin in upper-left */
904 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
905 /* the driver supports upper-left origin */
907 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
908 /* the driver supports lower-left origin, need to invert Y */
909 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
916 /* Fragment shader wants origin in lower-left */
917 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
918 /* the driver supports lower-left origin */
919 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
920 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
921 /* the driver supports upper-left origin, need to invert Y */
927 if (fp
->PixelCenterInteger
) {
928 /* Fragment shader wants pixel center integer */
929 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
930 /* the driver supports pixel center integer */
932 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
934 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
935 /* the driver supports pixel center half integer, need to bias X,Y */
944 /* Fragment shader wants pixel center half integer */
945 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
946 /* the driver supports pixel center half integer */
948 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
949 /* the driver supports pixel center integer, need to bias X,Y */
950 adjX
= adjY
[0] = adjY
[1] = 0.5f
;
951 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
957 /* we invert after adjustment so that we avoid the MOV to temporary,
958 * and reuse the adjustment ADD instead */
959 emit_wpos_adjustment(t
, program
, invert
, adjX
, adjY
);
964 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
965 * TGSI uses +1 for front, -1 for back.
966 * This function converts the TGSI value to the GL value. Simply clamping/
967 * saturating the value to [0,1] does the job.
970 emit_face_var( struct st_translate
*t
,
971 const struct gl_program
*program
)
973 struct ureg_program
*ureg
= t
->ureg
;
974 struct ureg_dst face_temp
= ureg_DECL_temporary( ureg
);
975 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
977 /* MOV_SAT face_temp, input[face]
979 face_temp
= ureg_saturate( face_temp
);
980 ureg_MOV( ureg
, face_temp
, face_input
);
982 /* Use face_temp as face input from here on:
984 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
989 emit_edgeflags( struct st_translate
*t
,
990 const struct gl_program
*program
)
992 struct ureg_program
*ureg
= t
->ureg
;
993 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
994 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
996 ureg_MOV( ureg
, edge_dst
, edge_src
);
1001 * Translate Mesa program to TGSI format.
1002 * \param program the program to translate
1003 * \param numInputs number of input registers used
1004 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
1006 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
1007 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
1009 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
1010 * \param numOutputs number of output registers used
1011 * \param outputMapping maps Mesa fragment program outputs to TGSI
1013 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
1014 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
1017 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
1020 st_translate_mesa_program(
1021 struct gl_context
*ctx
,
1023 struct ureg_program
*ureg
,
1024 const struct gl_program
*program
,
1026 const GLuint inputMapping
[],
1027 const ubyte inputSemanticName
[],
1028 const ubyte inputSemanticIndex
[],
1029 const GLuint interpMode
[],
1031 const GLuint outputMapping
[],
1032 const ubyte outputSemanticName
[],
1033 const ubyte outputSemanticIndex
[],
1034 boolean passthrough_edgeflags
,
1035 boolean clamp_color
)
1037 struct st_translate translate
, *t
;
1039 enum pipe_error ret
= PIPE_OK
;
1041 assert(numInputs
<= Elements(t
->inputs
));
1042 assert(numOutputs
<= Elements(t
->outputs
));
1045 memset(t
, 0, sizeof *t
);
1047 t
->procType
= procType
;
1048 t
->inputMapping
= inputMapping
;
1049 t
->outputMapping
= outputMapping
;
1052 /*_mesa_print_program(program);*/
1055 * Declare input attributes.
1057 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
1058 for (i
= 0; i
< numInputs
; i
++) {
1059 if (program
->InputFlags
[0] & PROG_PARAM_BIT_CYL_WRAP
) {
1060 t
->inputs
[i
] = ureg_DECL_fs_input_cyl(ureg
,
1061 inputSemanticName
[i
],
1062 inputSemanticIndex
[i
],
1064 TGSI_CYLINDRICAL_WRAP_X
);
1067 t
->inputs
[i
] = ureg_DECL_fs_input(ureg
,
1068 inputSemanticName
[i
],
1069 inputSemanticIndex
[i
],
1074 if (program
->InputsRead
& FRAG_BIT_WPOS
) {
1075 /* Must do this after setting up t->inputs, and before
1076 * emitting constant references, below:
1078 emit_wpos(st_context(ctx
), t
, program
, ureg
);
1081 if (program
->InputsRead
& FRAG_BIT_FACE
) {
1082 emit_face_var( t
, program
);
1086 * Declare output attributes.
1088 for (i
= 0; i
< numOutputs
; i
++) {
1089 switch (outputSemanticName
[i
]) {
1090 case TGSI_SEMANTIC_POSITION
:
1091 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1092 TGSI_SEMANTIC_POSITION
, /* Z / Depth */
1093 outputSemanticIndex
[i
] );
1095 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
1098 case TGSI_SEMANTIC_STENCIL
:
1099 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1100 TGSI_SEMANTIC_STENCIL
, /* Stencil */
1101 outputSemanticIndex
[i
] );
1102 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
1105 case TGSI_SEMANTIC_COLOR
:
1106 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1107 TGSI_SEMANTIC_COLOR
,
1108 outputSemanticIndex
[i
] );
1116 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
1117 for (i
= 0; i
< numInputs
; i
++) {
1118 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
1120 inputSemanticName
[i
],
1121 inputSemanticIndex
[i
]);
1124 for (i
= 0; i
< numOutputs
; i
++) {
1125 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1126 outputSemanticName
[i
],
1127 outputSemanticIndex
[i
] );
1131 assert(procType
== TGSI_PROCESSOR_VERTEX
);
1133 for (i
= 0; i
< numInputs
; i
++) {
1134 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
1137 for (i
= 0; i
< numOutputs
; i
++) {
1138 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1139 outputSemanticName
[i
],
1140 outputSemanticIndex
[i
] );
1142 if (passthrough_edgeflags
)
1143 emit_edgeflags( t
, program
);
1146 /* Declare address register.
1148 if (program
->NumAddressRegs
> 0) {
1149 debug_assert( program
->NumAddressRegs
== 1 );
1150 t
->address
[0] = ureg_DECL_address( ureg
);
1153 /* Declare misc input registers
1156 GLbitfield sysInputs
= program
->SystemValuesRead
;
1157 unsigned numSys
= 0;
1158 for (i
= 0; sysInputs
; i
++) {
1159 if (sysInputs
& (1 << i
)) {
1160 unsigned semName
= mesa_sysval_to_semantic
[i
];
1161 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
1162 if (semName
== TGSI_SEMANTIC_INSTANCEID
||
1163 semName
== TGSI_SEMANTIC_VERTEXID
) {
1164 /* From Gallium perspective, these system values are always
1165 * integer, and require native integer support. However, if
1166 * native integer is supported on the vertex stage but not the
1167 * pixel stage (e.g, i915g + draw), Mesa will generate IR that
1168 * assumes these system values are floats. To resolve the
1169 * inconsistency, we insert a U2F.
1171 struct st_context
*st
= st_context(ctx
);
1172 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
1173 assert(procType
== TGSI_PROCESSOR_VERTEX
);
1174 assert(pscreen
->get_shader_param(pscreen
, PIPE_SHADER_VERTEX
, PIPE_SHADER_CAP_INTEGERS
));
1175 if (!ctx
->Const
.NativeIntegers
) {
1176 struct ureg_dst temp
= ureg_DECL_local_temporary(t
->ureg
);
1177 ureg_U2F( t
->ureg
, ureg_writemask(temp
, TGSI_WRITEMASK_X
), t
->systemValues
[i
]);
1178 t
->systemValues
[i
] = ureg_scalar(ureg_src(temp
), 0);
1182 sysInputs
&= ~(1 << i
);
1187 if (program
->IndirectRegisterFiles
& (1 << PROGRAM_TEMPORARY
)) {
1188 /* If temps are accessed with indirect addressing, declare temporaries
1189 * in sequential order. Else, we declare them on demand elsewhere.
1191 for (i
= 0; i
< program
->NumTemporaries
; i
++) {
1192 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1193 t
->temps
[i
] = ureg_DECL_temporary( t
->ureg
);
1197 /* Emit constants and immediates. Mesa uses a single index space
1198 * for these, so we put all the translated regs in t->constants.
1200 if (program
->Parameters
) {
1201 t
->constants
= CALLOC( program
->Parameters
->NumParameters
,
1202 sizeof t
->constants
[0] );
1203 if (t
->constants
== NULL
) {
1204 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
1208 for (i
= 0; i
< program
->Parameters
->NumParameters
; i
++) {
1209 switch (program
->Parameters
->Parameters
[i
].Type
) {
1210 case PROGRAM_ENV_PARAM
:
1211 case PROGRAM_LOCAL_PARAM
:
1212 case PROGRAM_STATE_VAR
:
1213 case PROGRAM_NAMED_PARAM
:
1214 case PROGRAM_UNIFORM
:
1215 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1218 /* Emit immediates only when there's no indirect addressing of
1220 * FIXME: Be smarter and recognize param arrays:
1221 * indirect addressing is only valid within the referenced
1224 case PROGRAM_CONSTANT
:
1225 if (program
->IndirectRegisterFiles
& PROGRAM_ANY_CONST
)
1226 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1229 ureg_DECL_immediate( ureg
,
1230 (const float*) program
->Parameters
->ParameterValues
[i
],
1239 /* texture samplers */
1240 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
1241 if (program
->SamplersUsed
& (1 << i
)) {
1242 t
->samplers
[i
] = ureg_DECL_sampler( ureg
, i
);
1246 /* Emit each instruction in turn:
1248 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1249 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1250 compile_instruction( t
, &program
->Instructions
[i
], clamp_color
);
1253 /* Fix up all emitted labels:
1255 for (i
= 0; i
< t
->labels_count
; i
++) {
1256 ureg_fixup_label( ureg
,
1258 t
->insn
[t
->labels
[i
].branch_target
] );
1267 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
1275 * Tokens cannot be free with free otherwise the builtin gallium
1276 * malloc debugging will get confused.
1279 st_free_tokens(const struct tgsi_token
*tokens
)
1281 FREE((void *)tokens
);