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[mesa.git] / src / mesa / state_tracker / st_mesa_to_tgsi.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * \author
30 * Michal Krol,
31 * Keith Whitwell
32 */
33
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
47
48
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_NAMED_PARAM) | \
53 (1 << PROGRAM_CONSTANT) | \
54 (1 << PROGRAM_UNIFORM))
55
56
57 struct label {
58 unsigned branch_target;
59 unsigned token;
60 };
61
62
63 /**
64 * Intermediate state used during shader translation.
65 */
66 struct st_translate {
67 struct ureg_program *ureg;
68
69 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
70 struct ureg_src *constants;
71 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
72 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
73 struct ureg_dst address[1];
74 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
75 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
76
77 /* Extra info for handling point size clamping in vertex shader */
78 struct ureg_dst pointSizeResult; /**< Actual point size output register */
79 struct ureg_src pointSizeConst; /**< Point size range constant register */
80 GLint pointSizeOutIndex; /**< Temp point size output register */
81 GLboolean prevInstWrotePointSize;
82
83 const GLuint *inputMapping;
84 const GLuint *outputMapping;
85
86 /* For every instruction that contains a label (eg CALL), keep
87 * details so that we can go back afterwards and emit the correct
88 * tgsi instruction number for each label.
89 */
90 struct label *labels;
91 unsigned labels_size;
92 unsigned labels_count;
93
94 /* Keep a record of the tgsi instruction number that each mesa
95 * instruction starts at, will be used to fix up labels after
96 * translation.
97 */
98 unsigned *insn;
99 unsigned insn_size;
100 unsigned insn_count;
101
102 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
103
104 boolean error;
105 };
106
107
108 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
109 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
110 TGSI_SEMANTIC_FACE,
111 TGSI_SEMANTIC_VERTEXID,
112 TGSI_SEMANTIC_INSTANCEID
113 };
114
115
116 /**
117 * Make note of a branch to a label in the TGSI code.
118 * After we've emitted all instructions, we'll go over the list
119 * of labels built here and patch the TGSI code with the actual
120 * location of each label.
121 */
122 static unsigned *get_label( struct st_translate *t,
123 unsigned branch_target )
124 {
125 unsigned i;
126
127 if (t->labels_count + 1 >= t->labels_size) {
128 unsigned old_size = t->labels_size;
129 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
130 t->labels = REALLOC( t->labels,
131 old_size * sizeof t->labels[0],
132 t->labels_size * sizeof t->labels[0] );
133 if (t->labels == NULL) {
134 static unsigned dummy;
135 t->error = TRUE;
136 return &dummy;
137 }
138 }
139
140 i = t->labels_count++;
141 t->labels[i].branch_target = branch_target;
142 return &t->labels[i].token;
143 }
144
145
146 /**
147 * Called prior to emitting the TGSI code for each Mesa instruction.
148 * Allocate additional space for instructions if needed.
149 * Update the insn[] array so the next Mesa instruction points to
150 * the next TGSI instruction.
151 */
152 static void set_insn_start( struct st_translate *t,
153 unsigned start )
154 {
155 if (t->insn_count + 1 >= t->insn_size) {
156 unsigned old_size = t->insn_size;
157 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
158 t->insn = REALLOC( t->insn,
159 old_size * sizeof t->insn[0],
160 t->insn_size * sizeof t->insn[0] );
161 if (t->insn == NULL) {
162 t->error = TRUE;
163 return;
164 }
165 }
166
167 t->insn[t->insn_count++] = start;
168 }
169
170
171 /**
172 * Map a Mesa dst register to a TGSI ureg_dst register.
173 */
174 static struct ureg_dst
175 dst_register( struct st_translate *t,
176 gl_register_file file,
177 GLuint index )
178 {
179 switch( file ) {
180 case PROGRAM_UNDEFINED:
181 return ureg_dst_undef();
182
183 case PROGRAM_TEMPORARY:
184 if (ureg_dst_is_undef(t->temps[index]))
185 t->temps[index] = ureg_DECL_temporary( t->ureg );
186
187 return t->temps[index];
188
189 case PROGRAM_OUTPUT:
190 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
191 t->prevInstWrotePointSize = GL_TRUE;
192
193 if (t->procType == TGSI_PROCESSOR_VERTEX)
194 assert(index < VERT_RESULT_MAX);
195 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
196 assert(index < FRAG_RESULT_MAX);
197 else
198 assert(index < GEOM_RESULT_MAX);
199
200 assert(t->outputMapping[index] < Elements(t->outputs));
201
202 return t->outputs[t->outputMapping[index]];
203
204 case PROGRAM_ADDRESS:
205 return t->address[index];
206
207 default:
208 debug_assert( 0 );
209 return ureg_dst_undef();
210 }
211 }
212
213
214 /**
215 * Map a Mesa src register to a TGSI ureg_src register.
216 */
217 static struct ureg_src
218 src_register( struct st_translate *t,
219 gl_register_file file,
220 GLint index )
221 {
222 switch( file ) {
223 case PROGRAM_UNDEFINED:
224 return ureg_src_undef();
225
226 case PROGRAM_TEMPORARY:
227 assert(index >= 0);
228 assert(index < Elements(t->temps));
229 if (ureg_dst_is_undef(t->temps[index]))
230 t->temps[index] = ureg_DECL_temporary( t->ureg );
231 return ureg_src(t->temps[index]);
232
233 case PROGRAM_NAMED_PARAM:
234 case PROGRAM_ENV_PARAM:
235 case PROGRAM_LOCAL_PARAM:
236 case PROGRAM_UNIFORM:
237 assert(index >= 0);
238 return t->constants[index];
239 case PROGRAM_STATE_VAR:
240 case PROGRAM_CONSTANT: /* ie, immediate */
241 if (index < 0)
242 return ureg_DECL_constant( t->ureg, 0 );
243 else
244 return t->constants[index];
245
246 case PROGRAM_INPUT:
247 assert(t->inputMapping[index] < Elements(t->inputs));
248 return t->inputs[t->inputMapping[index]];
249
250 case PROGRAM_OUTPUT:
251 assert(t->outputMapping[index] < Elements(t->outputs));
252 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
253
254 case PROGRAM_ADDRESS:
255 return ureg_src(t->address[index]);
256
257 case PROGRAM_SYSTEM_VALUE:
258 assert(index < Elements(t->systemValues));
259 return t->systemValues[index];
260
261 default:
262 debug_assert( 0 );
263 return ureg_src_undef();
264 }
265 }
266
267
268 /**
269 * Map mesa texture target to TGSI texture target.
270 */
271 unsigned
272 st_translate_texture_target( GLuint textarget,
273 GLboolean shadow )
274 {
275 if (shadow) {
276 switch( textarget ) {
277 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_SHADOW1D;
278 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_SHADOW2D;
279 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
280 case TEXTURE_1D_ARRAY_INDEX: return TGSI_TEXTURE_SHADOW1D_ARRAY;
281 case TEXTURE_2D_ARRAY_INDEX: return TGSI_TEXTURE_SHADOW2D_ARRAY;
282 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_SHADOWCUBE;
283 default: break;
284 }
285 }
286
287 switch( textarget ) {
288 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_1D;
289 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_2D;
290 case TEXTURE_3D_INDEX: return TGSI_TEXTURE_3D;
291 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
292 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
293 case TEXTURE_1D_ARRAY_INDEX: return TGSI_TEXTURE_1D_ARRAY;
294 case TEXTURE_2D_ARRAY_INDEX: return TGSI_TEXTURE_2D_ARRAY;
295 case TEXTURE_EXTERNAL_INDEX: return TGSI_TEXTURE_2D;
296 default:
297 debug_assert( 0 );
298 return TGSI_TEXTURE_1D;
299 }
300 }
301
302
303 /**
304 * Create a TGSI ureg_dst register from a Mesa dest register.
305 */
306 static struct ureg_dst
307 translate_dst( struct st_translate *t,
308 const struct prog_dst_register *DstReg,
309 boolean saturate,
310 boolean clamp_color)
311 {
312 struct ureg_dst dst = dst_register( t,
313 DstReg->File,
314 DstReg->Index );
315
316 dst = ureg_writemask( dst,
317 DstReg->WriteMask );
318
319 if (saturate)
320 dst = ureg_saturate( dst );
321 else if (clamp_color && DstReg->File == PROGRAM_OUTPUT) {
322 /* Clamp colors for ARB_color_buffer_float. */
323 switch (t->procType) {
324 case TGSI_PROCESSOR_VERTEX:
325 /* XXX if the geometry shader is present, this must be done there
326 * instead of here. */
327 if (DstReg->Index == VERT_RESULT_COL0 ||
328 DstReg->Index == VERT_RESULT_COL1 ||
329 DstReg->Index == VERT_RESULT_BFC0 ||
330 DstReg->Index == VERT_RESULT_BFC1) {
331 dst = ureg_saturate(dst);
332 }
333 break;
334
335 case TGSI_PROCESSOR_FRAGMENT:
336 if (DstReg->Index >= FRAG_RESULT_COLOR) {
337 dst = ureg_saturate(dst);
338 }
339 break;
340 }
341 }
342
343 if (DstReg->RelAddr)
344 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
345
346 return dst;
347 }
348
349
350 /**
351 * Create a TGSI ureg_src register from a Mesa src register.
352 */
353 static struct ureg_src
354 translate_src( struct st_translate *t,
355 const struct prog_src_register *SrcReg )
356 {
357 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
358
359 if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
360 src = src_register( t, SrcReg->File, SrcReg->Index2 );
361 if (SrcReg->RelAddr2)
362 src = ureg_src_dimension_indirect( src, ureg_src(t->address[0]),
363 SrcReg->Index);
364 else
365 src = ureg_src_dimension( src, SrcReg->Index);
366 }
367
368 src = ureg_swizzle( src,
369 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
370 GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
371 GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
372 GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
373
374 if (SrcReg->Negate == NEGATE_XYZW)
375 src = ureg_negate(src);
376
377 if (SrcReg->Abs)
378 src = ureg_abs(src);
379
380 if (SrcReg->RelAddr) {
381 src = ureg_src_indirect( src, ureg_src(t->address[0]));
382 if (SrcReg->File != PROGRAM_INPUT &&
383 SrcReg->File != PROGRAM_OUTPUT) {
384 /* If SrcReg->Index was negative, it was set to zero in
385 * src_register(). Reassign it now. But don't do this
386 * for input/output regs since they get remapped while
387 * const buffers don't.
388 */
389 src.Index = SrcReg->Index;
390 }
391 }
392
393 return src;
394 }
395
396
397 static struct ureg_src swizzle_4v( struct ureg_src src,
398 const unsigned *swz )
399 {
400 return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
401 }
402
403
404 /**
405 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
406 *
407 * SWZ dst, src.x-y10
408 *
409 * becomes:
410 *
411 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
412 */
413 static void emit_swz( struct st_translate *t,
414 struct ureg_dst dst,
415 const struct prog_src_register *SrcReg )
416 {
417 struct ureg_program *ureg = t->ureg;
418 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
419
420 unsigned negate_mask = SrcReg->Negate;
421
422 unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
423 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
424 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
425 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
426
427 unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
428 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
429 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
430 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
431
432 unsigned negative_one_mask = one_mask & negate_mask;
433 unsigned positive_one_mask = one_mask & ~negate_mask;
434
435 struct ureg_src imm;
436 unsigned i;
437 unsigned mul_swizzle[4] = {0,0,0,0};
438 unsigned add_swizzle[4] = {0,0,0,0};
439 unsigned src_swizzle[4] = {0,0,0,0};
440 boolean need_add = FALSE;
441 boolean need_mul = FALSE;
442
443 if (dst.WriteMask == 0)
444 return;
445
446 /* Is this just a MOV?
447 */
448 if (zero_mask == 0 &&
449 one_mask == 0 &&
450 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
451 {
452 ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
453 return;
454 }
455
456 #define IMM_ZERO 0
457 #define IMM_ONE 1
458 #define IMM_NEG_ONE 2
459
460 imm = ureg_imm3f( ureg, 0, 1, -1 );
461
462 for (i = 0; i < 4; i++) {
463 unsigned bit = 1 << i;
464
465 if (dst.WriteMask & bit) {
466 if (positive_one_mask & bit) {
467 mul_swizzle[i] = IMM_ZERO;
468 add_swizzle[i] = IMM_ONE;
469 need_add = TRUE;
470 }
471 else if (negative_one_mask & bit) {
472 mul_swizzle[i] = IMM_ZERO;
473 add_swizzle[i] = IMM_NEG_ONE;
474 need_add = TRUE;
475 }
476 else if (zero_mask & bit) {
477 mul_swizzle[i] = IMM_ZERO;
478 add_swizzle[i] = IMM_ZERO;
479 need_add = TRUE;
480 }
481 else {
482 add_swizzle[i] = IMM_ZERO;
483 src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
484 need_mul = TRUE;
485 if (negate_mask & bit) {
486 mul_swizzle[i] = IMM_NEG_ONE;
487 }
488 else {
489 mul_swizzle[i] = IMM_ONE;
490 }
491 }
492 }
493 }
494
495 if (need_mul && need_add) {
496 ureg_MAD( ureg,
497 dst,
498 swizzle_4v( src, src_swizzle ),
499 swizzle_4v( imm, mul_swizzle ),
500 swizzle_4v( imm, add_swizzle ) );
501 }
502 else if (need_mul) {
503 ureg_MUL( ureg,
504 dst,
505 swizzle_4v( src, src_swizzle ),
506 swizzle_4v( imm, mul_swizzle ) );
507 }
508 else if (need_add) {
509 ureg_MOV( ureg,
510 dst,
511 swizzle_4v( imm, add_swizzle ) );
512 }
513 else {
514 debug_assert(0);
515 }
516
517 #undef IMM_ZERO
518 #undef IMM_ONE
519 #undef IMM_NEG_ONE
520 }
521
522
523 /**
524 * Negate the value of DDY to match GL semantics where (0,0) is the
525 * lower-left corner of the window.
526 * Note that the GL_ARB_fragment_coord_conventions extension will
527 * effect this someday.
528 */
529 static void emit_ddy( struct st_translate *t,
530 struct ureg_dst dst,
531 const struct prog_src_register *SrcReg )
532 {
533 struct ureg_program *ureg = t->ureg;
534 struct ureg_src src = translate_src( t, SrcReg );
535 src = ureg_negate( src );
536 ureg_DDY( ureg, dst, src );
537 }
538
539
540
541 static unsigned
542 translate_opcode( unsigned op )
543 {
544 switch( op ) {
545 case OPCODE_ARL:
546 return TGSI_OPCODE_ARL;
547 case OPCODE_ABS:
548 return TGSI_OPCODE_ABS;
549 case OPCODE_ADD:
550 return TGSI_OPCODE_ADD;
551 case OPCODE_BGNLOOP:
552 return TGSI_OPCODE_BGNLOOP;
553 case OPCODE_BGNSUB:
554 return TGSI_OPCODE_BGNSUB;
555 case OPCODE_BRA:
556 return TGSI_OPCODE_BRA;
557 case OPCODE_BRK:
558 return TGSI_OPCODE_BRK;
559 case OPCODE_CAL:
560 return TGSI_OPCODE_CAL;
561 case OPCODE_CMP:
562 return TGSI_OPCODE_CMP;
563 case OPCODE_CONT:
564 return TGSI_OPCODE_CONT;
565 case OPCODE_COS:
566 return TGSI_OPCODE_COS;
567 case OPCODE_DDX:
568 return TGSI_OPCODE_DDX;
569 case OPCODE_DDY:
570 return TGSI_OPCODE_DDY;
571 case OPCODE_DP2:
572 return TGSI_OPCODE_DP2;
573 case OPCODE_DP2A:
574 return TGSI_OPCODE_DP2A;
575 case OPCODE_DP3:
576 return TGSI_OPCODE_DP3;
577 case OPCODE_DP4:
578 return TGSI_OPCODE_DP4;
579 case OPCODE_DPH:
580 return TGSI_OPCODE_DPH;
581 case OPCODE_DST:
582 return TGSI_OPCODE_DST;
583 case OPCODE_ELSE:
584 return TGSI_OPCODE_ELSE;
585 case OPCODE_EMIT_VERTEX:
586 return TGSI_OPCODE_EMIT;
587 case OPCODE_END_PRIMITIVE:
588 return TGSI_OPCODE_ENDPRIM;
589 case OPCODE_ENDIF:
590 return TGSI_OPCODE_ENDIF;
591 case OPCODE_ENDLOOP:
592 return TGSI_OPCODE_ENDLOOP;
593 case OPCODE_ENDSUB:
594 return TGSI_OPCODE_ENDSUB;
595 case OPCODE_EX2:
596 return TGSI_OPCODE_EX2;
597 case OPCODE_EXP:
598 return TGSI_OPCODE_EXP;
599 case OPCODE_FLR:
600 return TGSI_OPCODE_FLR;
601 case OPCODE_FRC:
602 return TGSI_OPCODE_FRC;
603 case OPCODE_IF:
604 return TGSI_OPCODE_IF;
605 case OPCODE_TRUNC:
606 return TGSI_OPCODE_TRUNC;
607 case OPCODE_KIL:
608 return TGSI_OPCODE_KIL;
609 case OPCODE_KIL_NV:
610 return TGSI_OPCODE_KILP;
611 case OPCODE_LG2:
612 return TGSI_OPCODE_LG2;
613 case OPCODE_LOG:
614 return TGSI_OPCODE_LOG;
615 case OPCODE_LIT:
616 return TGSI_OPCODE_LIT;
617 case OPCODE_LRP:
618 return TGSI_OPCODE_LRP;
619 case OPCODE_MAD:
620 return TGSI_OPCODE_MAD;
621 case OPCODE_MAX:
622 return TGSI_OPCODE_MAX;
623 case OPCODE_MIN:
624 return TGSI_OPCODE_MIN;
625 case OPCODE_MOV:
626 return TGSI_OPCODE_MOV;
627 case OPCODE_MUL:
628 return TGSI_OPCODE_MUL;
629 case OPCODE_NOP:
630 return TGSI_OPCODE_NOP;
631 case OPCODE_NRM3:
632 return TGSI_OPCODE_NRM;
633 case OPCODE_NRM4:
634 return TGSI_OPCODE_NRM4;
635 case OPCODE_POW:
636 return TGSI_OPCODE_POW;
637 case OPCODE_RCP:
638 return TGSI_OPCODE_RCP;
639 case OPCODE_RET:
640 return TGSI_OPCODE_RET;
641 case OPCODE_RSQ:
642 return TGSI_OPCODE_RSQ;
643 case OPCODE_SCS:
644 return TGSI_OPCODE_SCS;
645 case OPCODE_SEQ:
646 return TGSI_OPCODE_SEQ;
647 case OPCODE_SGE:
648 return TGSI_OPCODE_SGE;
649 case OPCODE_SGT:
650 return TGSI_OPCODE_SGT;
651 case OPCODE_SIN:
652 return TGSI_OPCODE_SIN;
653 case OPCODE_SLE:
654 return TGSI_OPCODE_SLE;
655 case OPCODE_SLT:
656 return TGSI_OPCODE_SLT;
657 case OPCODE_SNE:
658 return TGSI_OPCODE_SNE;
659 case OPCODE_SSG:
660 return TGSI_OPCODE_SSG;
661 case OPCODE_SUB:
662 return TGSI_OPCODE_SUB;
663 case OPCODE_TEX:
664 return TGSI_OPCODE_TEX;
665 case OPCODE_TXB:
666 return TGSI_OPCODE_TXB;
667 case OPCODE_TXD:
668 return TGSI_OPCODE_TXD;
669 case OPCODE_TXL:
670 return TGSI_OPCODE_TXL;
671 case OPCODE_TXP:
672 return TGSI_OPCODE_TXP;
673 case OPCODE_XPD:
674 return TGSI_OPCODE_XPD;
675 case OPCODE_END:
676 return TGSI_OPCODE_END;
677 default:
678 debug_assert( 0 );
679 return TGSI_OPCODE_NOP;
680 }
681 }
682
683
684 static void
685 compile_instruction(
686 struct st_translate *t,
687 const struct prog_instruction *inst,
688 boolean clamp_dst_color_output)
689 {
690 struct ureg_program *ureg = t->ureg;
691 GLuint i;
692 struct ureg_dst dst[1];
693 struct ureg_src src[4];
694 unsigned num_dst;
695 unsigned num_src;
696
697 num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
698 num_src = _mesa_num_inst_src_regs( inst->Opcode );
699
700 if (num_dst)
701 dst[0] = translate_dst( t,
702 &inst->DstReg,
703 inst->SaturateMode,
704 clamp_dst_color_output);
705
706 for (i = 0; i < num_src; i++)
707 src[i] = translate_src( t, &inst->SrcReg[i] );
708
709 switch( inst->Opcode ) {
710 case OPCODE_SWZ:
711 emit_swz( t, dst[0], &inst->SrcReg[0] );
712 return;
713
714 case OPCODE_BGNLOOP:
715 case OPCODE_CAL:
716 case OPCODE_ELSE:
717 case OPCODE_ENDLOOP:
718 case OPCODE_IF:
719 debug_assert(num_dst == 0);
720 ureg_label_insn( ureg,
721 translate_opcode( inst->Opcode ),
722 src, num_src,
723 get_label( t, inst->BranchTarget ));
724 return;
725
726 case OPCODE_TEX:
727 case OPCODE_TXB:
728 case OPCODE_TXD:
729 case OPCODE_TXL:
730 case OPCODE_TXP:
731 src[num_src++] = t->samplers[inst->TexSrcUnit];
732 ureg_tex_insn( ureg,
733 translate_opcode( inst->Opcode ),
734 dst, num_dst,
735 st_translate_texture_target( inst->TexSrcTarget,
736 inst->TexShadow ),
737 NULL, 0,
738 src, num_src );
739 return;
740
741 case OPCODE_SCS:
742 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
743 ureg_insn( ureg,
744 translate_opcode( inst->Opcode ),
745 dst, num_dst,
746 src, num_src );
747 break;
748
749 case OPCODE_XPD:
750 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
751 ureg_insn( ureg,
752 translate_opcode( inst->Opcode ),
753 dst, num_dst,
754 src, num_src );
755 break;
756
757 case OPCODE_NOISE1:
758 case OPCODE_NOISE2:
759 case OPCODE_NOISE3:
760 case OPCODE_NOISE4:
761 /* At some point, a motivated person could add a better
762 * implementation of noise. Currently not even the nvidia
763 * binary drivers do anything more than this. In any case, the
764 * place to do this is in the GL state tracker, not the poor
765 * driver.
766 */
767 ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
768 break;
769
770 case OPCODE_DDY:
771 emit_ddy( t, dst[0], &inst->SrcReg[0] );
772 break;
773
774 default:
775 ureg_insn( ureg,
776 translate_opcode( inst->Opcode ),
777 dst, num_dst,
778 src, num_src );
779 break;
780 }
781 }
782
783
784 /**
785 * Emit the TGSI instructions for inverting and adjusting WPOS.
786 * This code is unavoidable because it also depends on whether
787 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
788 */
789 static void
790 emit_wpos_adjustment( struct st_translate *t,
791 const struct gl_program *program,
792 boolean invert,
793 GLfloat adjX, GLfloat adjY[2])
794 {
795 struct ureg_program *ureg = t->ureg;
796
797 /* Fragment program uses fragment position input.
798 * Need to replace instances of INPUT[WPOS] with temp T
799 * where T = INPUT[WPOS] by y is inverted.
800 */
801 static const gl_state_index wposTransformState[STATE_LENGTH]
802 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0 };
803
804 /* XXX: note we are modifying the incoming shader here! Need to
805 * do this before emitting the constant decls below, or this
806 * will be missed:
807 */
808 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
809 wposTransformState);
810
811 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
812 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
813 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
814
815 /* First, apply the coordinate shift: */
816 if (adjX || adjY[0] || adjY[1]) {
817 if (adjY[0] != adjY[1]) {
818 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively
819 * depending on whether inversion is actually going to be applied
820 * or not, which is determined by testing against the inversion
821 * state variable used below, which will be either +1 or -1.
822 */
823 struct ureg_dst adj_temp = ureg_DECL_temporary(ureg);
824
825 ureg_CMP(ureg, adj_temp,
826 ureg_scalar(wpostrans, invert ? 2 : 0),
827 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f),
828 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f));
829 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp));
830 } else {
831 ureg_ADD(ureg, wpos_temp, wpos_input,
832 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f));
833 }
834 wpos_input = ureg_src(wpos_temp);
835 } else {
836 /* MOV wpos_temp, input[wpos]
837 */
838 ureg_MOV( ureg, wpos_temp, wpos_input );
839 }
840
841 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
842 * inversion/identity, or the other way around if we're drawing to an FBO.
843 */
844 if (invert) {
845 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
846 */
847 ureg_MAD( ureg,
848 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
849 wpos_input,
850 ureg_scalar(wpostrans, 0),
851 ureg_scalar(wpostrans, 1));
852 } else {
853 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
854 */
855 ureg_MAD( ureg,
856 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
857 wpos_input,
858 ureg_scalar(wpostrans, 2),
859 ureg_scalar(wpostrans, 3));
860 }
861
862 /* Use wpos_temp as position input from here on:
863 */
864 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
865 }
866
867
868 /**
869 * Emit fragment position/ooordinate code.
870 */
871 static void
872 emit_wpos(struct st_context *st,
873 struct st_translate *t,
874 const struct gl_program *program,
875 struct ureg_program *ureg)
876 {
877 const struct gl_fragment_program *fp =
878 (const struct gl_fragment_program *) program;
879 struct pipe_screen *pscreen = st->pipe->screen;
880 GLfloat adjX = 0.0f;
881 GLfloat adjY[2] = { 0.0f, 0.0f };
882 boolean invert = FALSE;
883
884 /* Query the pixel center conventions supported by the pipe driver and set
885 * adjX, adjY to help out if it cannot handle the requested one internally.
886 *
887 * The bias of the y-coordinate depends on whether y-inversion takes place
888 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
889 * drawing to an FBO (causes additional inversion), and whether the the pipe
890 * driver origin and the requested origin differ (the latter condition is
891 * stored in the 'invert' variable).
892 *
893 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper):
894 *
895 * center shift only:
896 * i -> h: +0.5
897 * h -> i: -0.5
898 *
899 * inversion only:
900 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99
901 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5
902 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0
903 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5
904 *
905 * inversion and center shift:
906 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5
907 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99
908 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5
909 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0
910 */
911 if (fp->OriginUpperLeft) {
912 /* Fragment shader wants origin in upper-left */
913 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
914 /* the driver supports upper-left origin */
915 }
916 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
917 /* the driver supports lower-left origin, need to invert Y */
918 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
919 invert = TRUE;
920 }
921 else
922 assert(0);
923 }
924 else {
925 /* Fragment shader wants origin in lower-left */
926 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
927 /* the driver supports lower-left origin */
928 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
929 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
930 /* the driver supports upper-left origin, need to invert Y */
931 invert = TRUE;
932 else
933 assert(0);
934 }
935
936 if (fp->PixelCenterInteger) {
937 /* Fragment shader wants pixel center integer */
938 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
939 /* the driver supports pixel center integer */
940 adjY[1] = 1.0f;
941 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
942 }
943 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
944 /* the driver supports pixel center half integer, need to bias X,Y */
945 adjX = -0.5f;
946 adjY[0] = -0.5f;
947 adjY[1] = 0.5f;
948 }
949 else
950 assert(0);
951 }
952 else {
953 /* Fragment shader wants pixel center half integer */
954 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
955 /* the driver supports pixel center half integer */
956 }
957 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
958 /* the driver supports pixel center integer, need to bias X,Y */
959 adjX = adjY[0] = adjY[1] = 0.5f;
960 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
961 }
962 else
963 assert(0);
964 }
965
966 /* we invert after adjustment so that we avoid the MOV to temporary,
967 * and reuse the adjustment ADD instead */
968 emit_wpos_adjustment(t, program, invert, adjX, adjY);
969 }
970
971
972 /**
973 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
974 * TGSI uses +1 for front, -1 for back.
975 * This function converts the TGSI value to the GL value. Simply clamping/
976 * saturating the value to [0,1] does the job.
977 */
978 static void
979 emit_face_var( struct st_translate *t,
980 const struct gl_program *program )
981 {
982 struct ureg_program *ureg = t->ureg;
983 struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
984 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
985
986 /* MOV_SAT face_temp, input[face]
987 */
988 face_temp = ureg_saturate( face_temp );
989 ureg_MOV( ureg, face_temp, face_input );
990
991 /* Use face_temp as face input from here on:
992 */
993 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
994 }
995
996
997 static void
998 emit_edgeflags( struct st_translate *t,
999 const struct gl_program *program )
1000 {
1001 struct ureg_program *ureg = t->ureg;
1002 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
1003 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
1004
1005 ureg_MOV( ureg, edge_dst, edge_src );
1006 }
1007
1008
1009 /**
1010 * Translate Mesa program to TGSI format.
1011 * \param program the program to translate
1012 * \param numInputs number of input registers used
1013 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
1014 * input indexes
1015 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
1016 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
1017 * each input
1018 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
1019 * \param numOutputs number of output registers used
1020 * \param outputMapping maps Mesa fragment program outputs to TGSI
1021 * generic outputs
1022 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
1023 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
1024 * each output
1025 *
1026 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
1027 */
1028 enum pipe_error
1029 st_translate_mesa_program(
1030 struct gl_context *ctx,
1031 uint procType,
1032 struct ureg_program *ureg,
1033 const struct gl_program *program,
1034 GLuint numInputs,
1035 const GLuint inputMapping[],
1036 const ubyte inputSemanticName[],
1037 const ubyte inputSemanticIndex[],
1038 const GLuint interpMode[],
1039 GLuint numOutputs,
1040 const GLuint outputMapping[],
1041 const ubyte outputSemanticName[],
1042 const ubyte outputSemanticIndex[],
1043 boolean passthrough_edgeflags,
1044 boolean clamp_color)
1045 {
1046 struct st_translate translate, *t;
1047 unsigned i;
1048 enum pipe_error ret = PIPE_OK;
1049
1050 assert(numInputs <= Elements(t->inputs));
1051 assert(numOutputs <= Elements(t->outputs));
1052
1053 t = &translate;
1054 memset(t, 0, sizeof *t);
1055
1056 t->procType = procType;
1057 t->inputMapping = inputMapping;
1058 t->outputMapping = outputMapping;
1059 t->ureg = ureg;
1060 t->pointSizeOutIndex = -1;
1061 t->prevInstWrotePointSize = GL_FALSE;
1062
1063 /*_mesa_print_program(program);*/
1064
1065 /*
1066 * Declare input attributes.
1067 */
1068 if (procType == TGSI_PROCESSOR_FRAGMENT) {
1069 for (i = 0; i < numInputs; i++) {
1070 if (program->InputFlags[0] & PROG_PARAM_BIT_CYL_WRAP) {
1071 t->inputs[i] = ureg_DECL_fs_input_cyl(ureg,
1072 inputSemanticName[i],
1073 inputSemanticIndex[i],
1074 interpMode[i],
1075 TGSI_CYLINDRICAL_WRAP_X);
1076 }
1077 else {
1078 t->inputs[i] = ureg_DECL_fs_input(ureg,
1079 inputSemanticName[i],
1080 inputSemanticIndex[i],
1081 interpMode[i]);
1082 }
1083 }
1084
1085 if (program->InputsRead & FRAG_BIT_WPOS) {
1086 /* Must do this after setting up t->inputs, and before
1087 * emitting constant references, below:
1088 */
1089 emit_wpos(st_context(ctx), t, program, ureg);
1090 }
1091
1092 if (program->InputsRead & FRAG_BIT_FACE) {
1093 emit_face_var( t, program );
1094 }
1095
1096 /*
1097 * Declare output attributes.
1098 */
1099 for (i = 0; i < numOutputs; i++) {
1100 switch (outputSemanticName[i]) {
1101 case TGSI_SEMANTIC_POSITION:
1102 t->outputs[i] = ureg_DECL_output( ureg,
1103 TGSI_SEMANTIC_POSITION, /* Z / Depth */
1104 outputSemanticIndex[i] );
1105
1106 t->outputs[i] = ureg_writemask( t->outputs[i],
1107 TGSI_WRITEMASK_Z );
1108 break;
1109 case TGSI_SEMANTIC_STENCIL:
1110 t->outputs[i] = ureg_DECL_output( ureg,
1111 TGSI_SEMANTIC_STENCIL, /* Stencil */
1112 outputSemanticIndex[i] );
1113 t->outputs[i] = ureg_writemask( t->outputs[i],
1114 TGSI_WRITEMASK_Y );
1115 break;
1116 case TGSI_SEMANTIC_COLOR:
1117 t->outputs[i] = ureg_DECL_output( ureg,
1118 TGSI_SEMANTIC_COLOR,
1119 outputSemanticIndex[i] );
1120 break;
1121 default:
1122 debug_assert(0);
1123 return 0;
1124 }
1125 }
1126 }
1127 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
1128 for (i = 0; i < numInputs; i++) {
1129 t->inputs[i] = ureg_DECL_gs_input(ureg,
1130 i,
1131 inputSemanticName[i],
1132 inputSemanticIndex[i]);
1133 }
1134
1135 for (i = 0; i < numOutputs; i++) {
1136 t->outputs[i] = ureg_DECL_output( ureg,
1137 outputSemanticName[i],
1138 outputSemanticIndex[i] );
1139 }
1140 }
1141 else {
1142 assert(procType == TGSI_PROCESSOR_VERTEX);
1143
1144 for (i = 0; i < numInputs; i++) {
1145 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
1146 }
1147
1148 for (i = 0; i < numOutputs; i++) {
1149 t->outputs[i] = ureg_DECL_output( ureg,
1150 outputSemanticName[i],
1151 outputSemanticIndex[i] );
1152 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && program->Id) {
1153 /* Writing to the point size result register requires special
1154 * handling to implement clamping.
1155 */
1156 static const gl_state_index pointSizeClampState[STATE_LENGTH]
1157 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, 0, 0, 0 };
1158 /* XXX: note we are modifying the incoming shader here! Need to
1159 * do this before emitting the constant decls below, or this
1160 * will be missed:
1161 */
1162 unsigned pointSizeClampConst =
1163 _mesa_add_state_reference(program->Parameters,
1164 pointSizeClampState);
1165 struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
1166 t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
1167 t->pointSizeResult = t->outputs[i];
1168 t->pointSizeOutIndex = i;
1169 t->outputs[i] = psizregtemp;
1170 }
1171 }
1172 if (passthrough_edgeflags)
1173 emit_edgeflags( t, program );
1174 }
1175
1176 /* Declare address register.
1177 */
1178 if (program->NumAddressRegs > 0) {
1179 debug_assert( program->NumAddressRegs == 1 );
1180 t->address[0] = ureg_DECL_address( ureg );
1181 }
1182
1183 /* Declare misc input registers
1184 */
1185 {
1186 GLbitfield sysInputs = program->SystemValuesRead;
1187 unsigned numSys = 0;
1188 for (i = 0; sysInputs; i++) {
1189 if (sysInputs & (1 << i)) {
1190 unsigned semName = mesa_sysval_to_semantic[i];
1191 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
1192 numSys++;
1193 sysInputs &= ~(1 << i);
1194 }
1195 }
1196 }
1197
1198 if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) {
1199 /* If temps are accessed with indirect addressing, declare temporaries
1200 * in sequential order. Else, we declare them on demand elsewhere.
1201 */
1202 for (i = 0; i < program->NumTemporaries; i++) {
1203 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1204 t->temps[i] = ureg_DECL_temporary( t->ureg );
1205 }
1206 }
1207
1208 /* Emit constants and immediates. Mesa uses a single index space
1209 * for these, so we put all the translated regs in t->constants.
1210 */
1211 if (program->Parameters) {
1212 t->constants = CALLOC( program->Parameters->NumParameters,
1213 sizeof t->constants[0] );
1214 if (t->constants == NULL) {
1215 ret = PIPE_ERROR_OUT_OF_MEMORY;
1216 goto out;
1217 }
1218
1219 for (i = 0; i < program->Parameters->NumParameters; i++) {
1220 switch (program->Parameters->Parameters[i].Type) {
1221 case PROGRAM_ENV_PARAM:
1222 case PROGRAM_LOCAL_PARAM:
1223 case PROGRAM_STATE_VAR:
1224 case PROGRAM_NAMED_PARAM:
1225 case PROGRAM_UNIFORM:
1226 t->constants[i] = ureg_DECL_constant( ureg, i );
1227 break;
1228
1229 /* Emit immediates only when there's no indirect addressing of
1230 * the const buffer.
1231 * FIXME: Be smarter and recognize param arrays:
1232 * indirect addressing is only valid within the referenced
1233 * array.
1234 */
1235 case PROGRAM_CONSTANT:
1236 if (program->IndirectRegisterFiles & PROGRAM_ANY_CONST)
1237 t->constants[i] = ureg_DECL_constant( ureg, i );
1238 else
1239 t->constants[i] =
1240 ureg_DECL_immediate( ureg,
1241 (const float*) program->Parameters->ParameterValues[i],
1242 4 );
1243 break;
1244 default:
1245 break;
1246 }
1247 }
1248 }
1249
1250 /* texture samplers */
1251 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1252 if (program->SamplersUsed & (1 << i)) {
1253 t->samplers[i] = ureg_DECL_sampler( ureg, i );
1254 }
1255 }
1256
1257 /* Emit each instruction in turn:
1258 */
1259 for (i = 0; i < program->NumInstructions; i++) {
1260 set_insn_start( t, ureg_get_instruction_number( ureg ));
1261 compile_instruction( t, &program->Instructions[i], clamp_color );
1262
1263 if (t->prevInstWrotePointSize && program->Id) {
1264 /* The previous instruction wrote to the (fake) vertex point size
1265 * result register. Now we need to clamp that value to the min/max
1266 * point size range, putting the result into the real point size
1267 * register.
1268 * Note that we can't do this easily at the end of program due to
1269 * possible early return.
1270 */
1271 set_insn_start( t, ureg_get_instruction_number( ureg ));
1272 ureg_MAX( t->ureg,
1273 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
1274 ureg_src(t->outputs[t->pointSizeOutIndex]),
1275 ureg_swizzle(t->pointSizeConst, 1,1,1,1));
1276 ureg_MIN( t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
1277 ureg_src(t->outputs[t->pointSizeOutIndex]),
1278 ureg_swizzle(t->pointSizeConst, 2,2,2,2));
1279 }
1280 t->prevInstWrotePointSize = GL_FALSE;
1281 }
1282
1283 /* Fix up all emitted labels:
1284 */
1285 for (i = 0; i < t->labels_count; i++) {
1286 ureg_fixup_label( ureg,
1287 t->labels[i].token,
1288 t->insn[t->labels[i].branch_target] );
1289 }
1290
1291 out:
1292 FREE(t->insn);
1293 FREE(t->labels);
1294 FREE(t->constants);
1295
1296 if (t->error) {
1297 debug_printf("%s: translate error flag set\n", __FUNCTION__);
1298 }
1299
1300 return ret;
1301 }
1302
1303
1304 /**
1305 * Tokens cannot be free with free otherwise the builtin gallium
1306 * malloc debugging will get confused.
1307 */
1308 void
1309 st_free_tokens(const struct tgsi_token *tokens)
1310 {
1311 FREE((void *)tokens);
1312 }