1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_NAMED_PARAM) | \
53 (1 << PROGRAM_CONSTANT) | \
54 (1 << PROGRAM_UNIFORM))
58 unsigned branch_target
;
64 * Intermediate state used during shader translation.
67 struct ureg_program
*ureg
;
69 struct ureg_dst temps
[MAX_PROGRAM_TEMPS
];
70 struct ureg_src
*constants
;
71 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
72 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
73 struct ureg_dst address
[1];
74 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
76 /* Extra info for handling point size clamping in vertex shader */
77 struct ureg_dst pointSizeResult
; /**< Actual point size output register */
78 struct ureg_src pointSizeConst
; /**< Point size range constant register */
79 GLint pointSizeOutIndex
; /**< Temp point size output register */
80 GLboolean prevInstWrotePointSize
;
82 const GLuint
*inputMapping
;
83 const GLuint
*outputMapping
;
85 /* For every instruction that contains a label (eg CALL), keep
86 * details so that we can go back afterwards and emit the correct
87 * tgsi instruction number for each label.
91 unsigned labels_count
;
93 /* Keep a record of the tgsi instruction number that each mesa
94 * instruction starts at, will be used to fix up labels after
101 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
108 * Make note of a branch to a label in the TGSI code.
109 * After we've emitted all instructions, we'll go over the list
110 * of labels built here and patch the TGSI code with the actual
111 * location of each label.
113 static unsigned *get_label( struct st_translate
*t
,
114 unsigned branch_target
)
118 if (t
->labels_count
+ 1 >= t
->labels_size
) {
119 unsigned old_size
= t
->labels_size
;
120 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
121 t
->labels
= REALLOC( t
->labels
,
122 old_size
* sizeof t
->labels
[0],
123 t
->labels_size
* sizeof t
->labels
[0] );
124 if (t
->labels
== NULL
) {
125 static unsigned dummy
;
131 i
= t
->labels_count
++;
132 t
->labels
[i
].branch_target
= branch_target
;
133 return &t
->labels
[i
].token
;
138 * Called prior to emitting the TGSI code for each Mesa instruction.
139 * Allocate additional space for instructions if needed.
140 * Update the insn[] array so the next Mesa instruction points to
141 * the next TGSI instruction.
143 static void set_insn_start( struct st_translate
*t
,
146 if (t
->insn_count
+ 1 >= t
->insn_size
) {
147 unsigned old_size
= t
->insn_size
;
148 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
149 t
->insn
= REALLOC( t
->insn
,
150 old_size
* sizeof t
->insn
[0],
151 t
->insn_size
* sizeof t
->insn
[0] );
152 if (t
->insn
== NULL
) {
158 t
->insn
[t
->insn_count
++] = start
;
163 * Map a Mesa dst register to a TGSI ureg_dst register.
165 static struct ureg_dst
166 dst_register( struct st_translate
*t
,
167 gl_register_file file
,
171 case PROGRAM_UNDEFINED
:
172 return ureg_dst_undef();
174 case PROGRAM_TEMPORARY
:
175 if (ureg_dst_is_undef(t
->temps
[index
]))
176 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
178 return t
->temps
[index
];
181 if (t
->procType
== TGSI_PROCESSOR_VERTEX
&& index
== VERT_RESULT_PSIZ
)
182 t
->prevInstWrotePointSize
= GL_TRUE
;
184 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
185 assert(index
< VERT_RESULT_MAX
);
186 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
187 assert(index
< FRAG_RESULT_MAX
);
189 assert(index
< GEOM_RESULT_MAX
);
191 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
193 return t
->outputs
[t
->outputMapping
[index
]];
195 case PROGRAM_ADDRESS
:
196 return t
->address
[index
];
200 return ureg_dst_undef();
206 * Map a Mesa src register to a TGSI ureg_src register.
208 static struct ureg_src
209 src_register( struct st_translate
*t
,
210 gl_register_file file
,
214 case PROGRAM_UNDEFINED
:
215 return ureg_src_undef();
217 case PROGRAM_TEMPORARY
:
219 if (ureg_dst_is_undef(t
->temps
[index
]))
220 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
221 assert(index
< Elements(t
->temps
));
222 return ureg_src(t
->temps
[index
]);
224 case PROGRAM_NAMED_PARAM
:
225 case PROGRAM_ENV_PARAM
:
226 case PROGRAM_LOCAL_PARAM
:
227 case PROGRAM_UNIFORM
:
229 return t
->constants
[index
];
230 case PROGRAM_STATE_VAR
:
231 case PROGRAM_CONSTANT
: /* ie, immediate */
233 return ureg_DECL_constant( t
->ureg
, 0 );
235 return t
->constants
[index
];
238 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
239 return t
->inputs
[t
->inputMapping
[index
]];
242 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
243 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
245 case PROGRAM_ADDRESS
:
246 return ureg_src(t
->address
[index
]);
250 return ureg_src_undef();
256 * Map mesa texture target to TGSI texture target.
259 translate_texture_target( GLuint textarget
,
263 switch( textarget
) {
264 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_SHADOW1D
;
265 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_SHADOW2D
;
266 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_SHADOWRECT
;
271 switch( textarget
) {
272 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_1D
;
273 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_2D
;
274 case TEXTURE_3D_INDEX
: return TGSI_TEXTURE_3D
;
275 case TEXTURE_CUBE_INDEX
: return TGSI_TEXTURE_CUBE
;
276 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_RECT
;
279 return TGSI_TEXTURE_1D
;
285 * Create a TGSI ureg_dst register from a Mesa dest register.
287 static struct ureg_dst
288 translate_dst( struct st_translate
*t
,
289 const struct prog_dst_register
*DstReg
,
292 struct ureg_dst dst
= dst_register( t
,
296 dst
= ureg_writemask( dst
,
300 dst
= ureg_saturate( dst
);
303 dst
= ureg_dst_indirect( dst
, ureg_src(t
->address
[0]) );
310 * Create a TGSI ureg_src register from a Mesa src register.
312 static struct ureg_src
313 translate_src( struct st_translate
*t
,
314 const struct prog_src_register
*SrcReg
)
316 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
318 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& SrcReg
->HasIndex2
) {
319 src
= src_register( t
, SrcReg
->File
, SrcReg
->Index2
);
320 if (SrcReg
->RelAddr2
)
321 src
= ureg_src_dimension_indirect( src
, ureg_src(t
->address
[0]),
324 src
= ureg_src_dimension( src
, SrcReg
->Index
);
327 src
= ureg_swizzle( src
,
328 GET_SWZ( SrcReg
->Swizzle
, 0 ) & 0x3,
329 GET_SWZ( SrcReg
->Swizzle
, 1 ) & 0x3,
330 GET_SWZ( SrcReg
->Swizzle
, 2 ) & 0x3,
331 GET_SWZ( SrcReg
->Swizzle
, 3 ) & 0x3);
333 if (SrcReg
->Negate
== NEGATE_XYZW
)
334 src
= ureg_negate(src
);
339 if (SrcReg
->RelAddr
) {
340 src
= ureg_src_indirect( src
, ureg_src(t
->address
[0]));
341 if (SrcReg
->File
!= PROGRAM_INPUT
&&
342 SrcReg
->File
!= PROGRAM_OUTPUT
) {
343 /* If SrcReg->Index was negative, it was set to zero in
344 * src_register(). Reassign it now. But don't do this
345 * for input/output regs since they get remapped while
346 * const buffers don't.
348 src
.Index
= SrcReg
->Index
;
356 static struct ureg_src
swizzle_4v( struct ureg_src src
,
357 const unsigned *swz
)
359 return ureg_swizzle( src
, swz
[0], swz
[1], swz
[2], swz
[3] );
364 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
370 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
372 static void emit_swz( struct st_translate
*t
,
374 const struct prog_src_register
*SrcReg
)
376 struct ureg_program
*ureg
= t
->ureg
;
377 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
379 unsigned negate_mask
= SrcReg
->Negate
;
381 unsigned one_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ONE
) << 0 |
382 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ONE
) << 1 |
383 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ONE
) << 2 |
384 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ONE
) << 3);
386 unsigned zero_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ZERO
) << 0 |
387 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ZERO
) << 1 |
388 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ZERO
) << 2 |
389 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ZERO
) << 3);
391 unsigned negative_one_mask
= one_mask
& negate_mask
;
392 unsigned positive_one_mask
= one_mask
& ~negate_mask
;
396 unsigned mul_swizzle
[4] = {0,0,0,0};
397 unsigned add_swizzle
[4] = {0,0,0,0};
398 unsigned src_swizzle
[4] = {0,0,0,0};
399 boolean need_add
= FALSE
;
400 boolean need_mul
= FALSE
;
402 if (dst
.WriteMask
== 0)
405 /* Is this just a MOV?
407 if (zero_mask
== 0 &&
409 (negate_mask
== 0 || negate_mask
== TGSI_WRITEMASK_XYZW
))
411 ureg_MOV( ureg
, dst
, translate_src( t
, SrcReg
));
417 #define IMM_NEG_ONE 2
419 imm
= ureg_imm3f( ureg
, 0, 1, -1 );
421 for (i
= 0; i
< 4; i
++) {
422 unsigned bit
= 1 << i
;
424 if (dst
.WriteMask
& bit
) {
425 if (positive_one_mask
& bit
) {
426 mul_swizzle
[i
] = IMM_ZERO
;
427 add_swizzle
[i
] = IMM_ONE
;
430 else if (negative_one_mask
& bit
) {
431 mul_swizzle
[i
] = IMM_ZERO
;
432 add_swizzle
[i
] = IMM_NEG_ONE
;
435 else if (zero_mask
& bit
) {
436 mul_swizzle
[i
] = IMM_ZERO
;
437 add_swizzle
[i
] = IMM_ZERO
;
441 add_swizzle
[i
] = IMM_ZERO
;
442 src_swizzle
[i
] = GET_SWZ(SrcReg
->Swizzle
, i
);
444 if (negate_mask
& bit
) {
445 mul_swizzle
[i
] = IMM_NEG_ONE
;
448 mul_swizzle
[i
] = IMM_ONE
;
454 if (need_mul
&& need_add
) {
457 swizzle_4v( src
, src_swizzle
),
458 swizzle_4v( imm
, mul_swizzle
),
459 swizzle_4v( imm
, add_swizzle
) );
464 swizzle_4v( src
, src_swizzle
),
465 swizzle_4v( imm
, mul_swizzle
) );
470 swizzle_4v( imm
, add_swizzle
) );
483 * Negate the value of DDY to match GL semantics where (0,0) is the
484 * lower-left corner of the window.
485 * Note that the GL_ARB_fragment_coord_conventions extension will
486 * effect this someday.
488 static void emit_ddy( struct st_translate
*t
,
490 const struct prog_src_register
*SrcReg
)
492 struct ureg_program
*ureg
= t
->ureg
;
493 struct ureg_src src
= translate_src( t
, SrcReg
);
494 src
= ureg_negate( src
);
495 ureg_DDY( ureg
, dst
, src
);
501 translate_opcode( unsigned op
)
505 return TGSI_OPCODE_ARL
;
507 return TGSI_OPCODE_ABS
;
509 return TGSI_OPCODE_ADD
;
511 return TGSI_OPCODE_BGNLOOP
;
513 return TGSI_OPCODE_BGNSUB
;
515 return TGSI_OPCODE_BRA
;
517 return TGSI_OPCODE_BRK
;
519 return TGSI_OPCODE_CAL
;
521 return TGSI_OPCODE_CMP
;
523 return TGSI_OPCODE_CONT
;
525 return TGSI_OPCODE_COS
;
527 return TGSI_OPCODE_DDX
;
529 return TGSI_OPCODE_DDY
;
531 return TGSI_OPCODE_DP2
;
533 return TGSI_OPCODE_DP2A
;
535 return TGSI_OPCODE_DP3
;
537 return TGSI_OPCODE_DP4
;
539 return TGSI_OPCODE_DPH
;
541 return TGSI_OPCODE_DST
;
543 return TGSI_OPCODE_ELSE
;
544 case OPCODE_EMIT_VERTEX
:
545 return TGSI_OPCODE_EMIT
;
546 case OPCODE_END_PRIMITIVE
:
547 return TGSI_OPCODE_ENDPRIM
;
549 return TGSI_OPCODE_ENDIF
;
551 return TGSI_OPCODE_ENDLOOP
;
553 return TGSI_OPCODE_ENDSUB
;
555 return TGSI_OPCODE_EX2
;
557 return TGSI_OPCODE_EXP
;
559 return TGSI_OPCODE_FLR
;
561 return TGSI_OPCODE_FRC
;
563 return TGSI_OPCODE_IF
;
565 return TGSI_OPCODE_TRUNC
;
567 return TGSI_OPCODE_KIL
;
569 return TGSI_OPCODE_KILP
;
571 return TGSI_OPCODE_LG2
;
573 return TGSI_OPCODE_LOG
;
575 return TGSI_OPCODE_LIT
;
577 return TGSI_OPCODE_LRP
;
579 return TGSI_OPCODE_MAD
;
581 return TGSI_OPCODE_MAX
;
583 return TGSI_OPCODE_MIN
;
585 return TGSI_OPCODE_MOV
;
587 return TGSI_OPCODE_MUL
;
589 return TGSI_OPCODE_NOP
;
591 return TGSI_OPCODE_NRM
;
593 return TGSI_OPCODE_NRM4
;
595 return TGSI_OPCODE_POW
;
597 return TGSI_OPCODE_RCP
;
599 return TGSI_OPCODE_RET
;
601 return TGSI_OPCODE_RSQ
;
603 return TGSI_OPCODE_SCS
;
605 return TGSI_OPCODE_SEQ
;
607 return TGSI_OPCODE_SGE
;
609 return TGSI_OPCODE_SGT
;
611 return TGSI_OPCODE_SIN
;
613 return TGSI_OPCODE_SLE
;
615 return TGSI_OPCODE_SLT
;
617 return TGSI_OPCODE_SNE
;
619 return TGSI_OPCODE_SSG
;
621 return TGSI_OPCODE_SUB
;
623 return TGSI_OPCODE_TEX
;
625 return TGSI_OPCODE_TXB
;
627 return TGSI_OPCODE_TXD
;
629 return TGSI_OPCODE_TXL
;
631 return TGSI_OPCODE_TXP
;
633 return TGSI_OPCODE_XPD
;
635 return TGSI_OPCODE_END
;
638 return TGSI_OPCODE_NOP
;
645 struct st_translate
*t
,
646 const struct prog_instruction
*inst
)
648 struct ureg_program
*ureg
= t
->ureg
;
650 struct ureg_dst dst
[1];
651 struct ureg_src src
[4];
655 num_dst
= _mesa_num_inst_dst_regs( inst
->Opcode
);
656 num_src
= _mesa_num_inst_src_regs( inst
->Opcode
);
659 dst
[0] = translate_dst( t
,
661 inst
->SaturateMode
);
663 for (i
= 0; i
< num_src
; i
++)
664 src
[i
] = translate_src( t
, &inst
->SrcReg
[i
] );
666 switch( inst
->Opcode
) {
668 emit_swz( t
, dst
[0], &inst
->SrcReg
[0] );
676 debug_assert(num_dst
== 0);
677 ureg_label_insn( ureg
,
678 translate_opcode( inst
->Opcode
),
680 get_label( t
, inst
->BranchTarget
));
688 src
[num_src
++] = t
->samplers
[inst
->TexSrcUnit
];
690 translate_opcode( inst
->Opcode
),
692 translate_texture_target( inst
->TexSrcTarget
,
698 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
700 translate_opcode( inst
->Opcode
),
706 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XYZ
);
708 translate_opcode( inst
->Opcode
),
717 /* At some point, a motivated person could add a better
718 * implementation of noise. Currently not even the nvidia
719 * binary drivers do anything more than this. In any case, the
720 * place to do this is in the GL state tracker, not the poor
723 ureg_MOV( ureg
, dst
[0], ureg_imm1f(ureg
, 0.5) );
727 emit_ddy( t
, dst
[0], &inst
->SrcReg
[0] );
732 translate_opcode( inst
->Opcode
),
741 * Emit the TGSI instructions to adjust the WPOS pixel center convention
744 emit_adjusted_wpos( struct st_translate
*t
,
745 const struct gl_program
*program
, GLfloat value
)
747 struct ureg_program
*ureg
= t
->ureg
;
748 struct ureg_dst wpos_temp
= ureg_DECL_temporary(ureg
);
749 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
751 /* Note that we bias X and Y and pass Z and W through unchanged.
752 * The shader might also use gl_FragCoord.w and .z.
754 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
755 ureg_imm4f(ureg
, value
, value
, 0.0f
, 0.0f
));
757 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
762 * Emit the TGSI instructions for inverting the WPOS y coordinate.
765 emit_inverted_wpos( struct st_translate
*t
,
766 const struct gl_program
*program
)
768 struct ureg_program
*ureg
= t
->ureg
;
770 /* Fragment program uses fragment position input.
771 * Need to replace instances of INPUT[WPOS] with temp T
772 * where T = INPUT[WPOS] by y is inverted.
774 static const gl_state_index winSizeState
[STATE_LENGTH
]
775 = { STATE_INTERNAL
, STATE_FB_SIZE
, 0, 0, 0 };
777 /* XXX: note we are modifying the incoming shader here! Need to
778 * do this before emitting the constant decls below, or this
781 unsigned winHeightConst
= _mesa_add_state_reference(program
->Parameters
,
784 struct ureg_src winsize
= ureg_DECL_constant( ureg
, winHeightConst
);
785 struct ureg_dst wpos_temp
;
786 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
788 /* MOV wpos_temp, input[wpos]
790 if (wpos_input
.File
== TGSI_FILE_TEMPORARY
)
791 wpos_temp
= ureg_dst(wpos_input
);
793 wpos_temp
= ureg_DECL_temporary( ureg
);
794 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
797 /* SUB wpos_temp.y, winsize_const, wpos_input
800 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
804 /* Use wpos_temp as position input from here on:
806 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
811 * Emit fragment position/ooordinate code.
814 emit_wpos(struct st_context
*st
,
815 struct st_translate
*t
,
816 const struct gl_program
*program
,
817 struct ureg_program
*ureg
)
819 const struct gl_fragment_program
*fp
=
820 (const struct gl_fragment_program
*) program
;
821 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
822 boolean invert
= FALSE
;
824 if (fp
->OriginUpperLeft
) {
825 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
827 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
828 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
835 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
836 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
837 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
843 if (fp
->PixelCenterInteger
) {
844 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
))
845 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
846 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
))
847 emit_adjusted_wpos(t
, program
, invert
? 0.5f
: -0.5f
);
852 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
854 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
855 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
856 emit_adjusted_wpos(t
, program
, invert
? -0.5f
: 0.5f
);
862 /* we invert after adjustment so that we avoid the MOV to temporary,
863 * and reuse the adjustment ADD instead */
865 emit_inverted_wpos(t
, program
);
870 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
871 * TGSI uses +1 for front, -1 for back.
872 * This function converts the TGSI value to the GL value. Simply clamping/
873 * saturating the value to [0,1] does the job.
876 emit_face_var( struct st_translate
*t
,
877 const struct gl_program
*program
)
879 struct ureg_program
*ureg
= t
->ureg
;
880 struct ureg_dst face_temp
= ureg_DECL_temporary( ureg
);
881 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
883 /* MOV_SAT face_temp, input[face]
885 face_temp
= ureg_saturate( face_temp
);
886 ureg_MOV( ureg
, face_temp
, face_input
);
888 /* Use face_temp as face input from here on:
890 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
895 emit_edgeflags( struct st_translate
*t
,
896 const struct gl_program
*program
)
898 struct ureg_program
*ureg
= t
->ureg
;
899 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
900 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
902 ureg_MOV( ureg
, edge_dst
, edge_src
);
907 * Translate Mesa program to TGSI format.
908 * \param program the program to translate
909 * \param numInputs number of input registers used
910 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
912 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
913 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
915 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
916 * \param numOutputs number of output registers used
917 * \param outputMapping maps Mesa fragment program outputs to TGSI
919 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
920 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
923 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
926 st_translate_mesa_program(
929 struct ureg_program
*ureg
,
930 const struct gl_program
*program
,
932 const GLuint inputMapping
[],
933 const ubyte inputSemanticName
[],
934 const ubyte inputSemanticIndex
[],
935 const GLuint interpMode
[],
937 const GLuint outputMapping
[],
938 const ubyte outputSemanticName
[],
939 const ubyte outputSemanticIndex
[],
940 boolean passthrough_edgeflags
)
942 struct st_translate translate
, *t
;
944 enum pipe_error ret
= PIPE_OK
;
946 assert(numInputs
<= Elements(t
->inputs
));
947 assert(numOutputs
<= Elements(t
->outputs
));
950 memset(t
, 0, sizeof *t
);
952 t
->procType
= procType
;
953 t
->inputMapping
= inputMapping
;
954 t
->outputMapping
= outputMapping
;
956 t
->pointSizeOutIndex
= -1;
957 t
->prevInstWrotePointSize
= GL_FALSE
;
959 /*_mesa_print_program(program);*/
962 * Declare input attributes.
964 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
965 for (i
= 0; i
< numInputs
; i
++) {
966 if (program
->InputFlags
[0] & PROG_PARAM_BIT_CYL_WRAP
) {
967 t
->inputs
[i
] = ureg_DECL_fs_input_cyl(ureg
,
968 inputSemanticName
[i
],
969 inputSemanticIndex
[i
],
971 TGSI_CYLINDRICAL_WRAP_X
);
974 t
->inputs
[i
] = ureg_DECL_fs_input(ureg
,
975 inputSemanticName
[i
],
976 inputSemanticIndex
[i
],
981 if (program
->InputsRead
& FRAG_BIT_WPOS
) {
982 /* Must do this after setting up t->inputs, and before
983 * emitting constant references, below:
985 emit_wpos(st_context(ctx
), t
, program
, ureg
);
988 if (program
->InputsRead
& FRAG_BIT_FACE
) {
989 emit_face_var( t
, program
);
993 * Declare output attributes.
995 for (i
= 0; i
< numOutputs
; i
++) {
996 switch (outputSemanticName
[i
]) {
997 case TGSI_SEMANTIC_POSITION
:
998 t
->outputs
[i
] = ureg_DECL_output( ureg
,
999 TGSI_SEMANTIC_POSITION
, /* Z / Depth */
1000 outputSemanticIndex
[i
] );
1002 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
1005 case TGSI_SEMANTIC_COLOR
:
1006 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1007 TGSI_SEMANTIC_COLOR
,
1008 outputSemanticIndex
[i
] );
1016 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
1017 for (i
= 0; i
< numInputs
; i
++) {
1018 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
1020 inputSemanticName
[i
],
1021 inputSemanticIndex
[i
]);
1024 for (i
= 0; i
< numOutputs
; i
++) {
1025 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1026 outputSemanticName
[i
],
1027 outputSemanticIndex
[i
] );
1031 assert(procType
== TGSI_PROCESSOR_VERTEX
);
1033 for (i
= 0; i
< numInputs
; i
++) {
1034 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
1037 for (i
= 0; i
< numOutputs
; i
++) {
1038 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1039 outputSemanticName
[i
],
1040 outputSemanticIndex
[i
] );
1041 if ((outputSemanticName
[i
] == TGSI_SEMANTIC_PSIZE
) && program
->Id
) {
1042 /* Writing to the point size result register requires special
1043 * handling to implement clamping.
1045 static const gl_state_index pointSizeClampState
[STATE_LENGTH
]
1046 = { STATE_INTERNAL
, STATE_POINT_SIZE_IMPL_CLAMP
, 0, 0, 0 };
1047 /* XXX: note we are modifying the incoming shader here! Need to
1048 * do this before emitting the constant decls below, or this
1051 unsigned pointSizeClampConst
=
1052 _mesa_add_state_reference(program
->Parameters
,
1053 pointSizeClampState
);
1054 struct ureg_dst psizregtemp
= ureg_DECL_temporary( ureg
);
1055 t
->pointSizeConst
= ureg_DECL_constant( ureg
, pointSizeClampConst
);
1056 t
->pointSizeResult
= t
->outputs
[i
];
1057 t
->pointSizeOutIndex
= i
;
1058 t
->outputs
[i
] = psizregtemp
;
1061 if (passthrough_edgeflags
)
1062 emit_edgeflags( t
, program
);
1065 /* Declare address register.
1067 if (program
->NumAddressRegs
> 0) {
1068 debug_assert( program
->NumAddressRegs
== 1 );
1069 t
->address
[0] = ureg_DECL_address( ureg
);
1072 if (program
->IndirectRegisterFiles
& (1 << PROGRAM_TEMPORARY
)) {
1073 /* If temps are accessed with indirect addressing, declare temporaries
1074 * in sequential order. Else, we declare them on demand elsewhere.
1076 for (i
= 0; i
< program
->NumTemporaries
; i
++) {
1077 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1078 t
->temps
[i
] = ureg_DECL_temporary( t
->ureg
);
1082 /* Emit constants and immediates. Mesa uses a single index space
1083 * for these, so we put all the translated regs in t->constants.
1085 if (program
->Parameters
) {
1086 t
->constants
= CALLOC( program
->Parameters
->NumParameters
,
1087 sizeof t
->constants
[0] );
1088 if (t
->constants
== NULL
) {
1089 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
1093 for (i
= 0; i
< program
->Parameters
->NumParameters
; i
++) {
1094 switch (program
->Parameters
->Parameters
[i
].Type
) {
1095 case PROGRAM_ENV_PARAM
:
1096 case PROGRAM_LOCAL_PARAM
:
1097 case PROGRAM_STATE_VAR
:
1098 case PROGRAM_NAMED_PARAM
:
1099 case PROGRAM_UNIFORM
:
1100 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1103 /* Emit immediates only when there's no indirect addressing of
1105 * FIXME: Be smarter and recognize param arrays:
1106 * indirect addressing is only valid within the referenced
1109 case PROGRAM_CONSTANT
:
1110 if (program
->IndirectRegisterFiles
& PROGRAM_ANY_CONST
)
1111 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1114 ureg_DECL_immediate( ureg
,
1115 program
->Parameters
->ParameterValues
[i
],
1124 /* texture samplers */
1125 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
1126 if (program
->SamplersUsed
& (1 << i
)) {
1127 t
->samplers
[i
] = ureg_DECL_sampler( ureg
, i
);
1131 /* Emit each instruction in turn:
1133 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1134 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1135 compile_instruction( t
, &program
->Instructions
[i
] );
1137 if (t
->prevInstWrotePointSize
&& program
->Id
) {
1138 /* The previous instruction wrote to the (fake) vertex point size
1139 * result register. Now we need to clamp that value to the min/max
1140 * point size range, putting the result into the real point size
1142 * Note that we can't do this easily at the end of program due to
1143 * possible early return.
1145 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1147 ureg_writemask(t
->outputs
[t
->pointSizeOutIndex
], WRITEMASK_X
),
1148 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1149 ureg_swizzle(t
->pointSizeConst
, 1,1,1,1));
1150 ureg_MIN( t
->ureg
, ureg_writemask(t
->pointSizeResult
, WRITEMASK_X
),
1151 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1152 ureg_swizzle(t
->pointSizeConst
, 2,2,2,2));
1154 t
->prevInstWrotePointSize
= GL_FALSE
;
1157 /* Fix up all emitted labels:
1159 for (i
= 0; i
< t
->labels_count
; i
++) {
1160 ureg_fixup_label( ureg
,
1162 t
->insn
[t
->labels
[i
].branch_target
] );
1171 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
1179 * Tokens cannot be free with free otherwise the builtin gallium
1180 * malloc debugging will get confused.
1183 st_free_tokens(const struct tgsi_token
*tokens
)
1185 FREE((void *)tokens
);