1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_NAMED_PARAM) | \
53 (1 << PROGRAM_CONSTANT) | \
54 (1 << PROGRAM_UNIFORM))
58 unsigned branch_target
;
64 * Intermediate state used during shader translation.
67 struct ureg_program
*ureg
;
69 struct ureg_dst temps
[MAX_PROGRAM_TEMPS
];
70 struct ureg_src
*constants
;
71 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
72 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
73 struct ureg_dst address
[1];
74 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
75 struct ureg_src systemValues
[SYSTEM_VALUE_MAX
];
77 /* Extra info for handling point size clamping in vertex shader */
78 struct ureg_dst pointSizeResult
; /**< Actual point size output register */
79 struct ureg_src pointSizeConst
; /**< Point size range constant register */
80 GLint pointSizeOutIndex
; /**< Temp point size output register */
81 GLboolean prevInstWrotePointSize
;
83 const GLuint
*inputMapping
;
84 const GLuint
*outputMapping
;
86 /* For every instruction that contains a label (eg CALL), keep
87 * details so that we can go back afterwards and emit the correct
88 * tgsi instruction number for each label.
92 unsigned labels_count
;
94 /* Keep a record of the tgsi instruction number that each mesa
95 * instruction starts at, will be used to fix up labels after
102 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
108 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
109 static unsigned mesa_sysval_to_semantic
[SYSTEM_VALUE_MAX
] = {
111 TGSI_SEMANTIC_INSTANCEID
116 * Make note of a branch to a label in the TGSI code.
117 * After we've emitted all instructions, we'll go over the list
118 * of labels built here and patch the TGSI code with the actual
119 * location of each label.
121 static unsigned *get_label( struct st_translate
*t
,
122 unsigned branch_target
)
126 if (t
->labels_count
+ 1 >= t
->labels_size
) {
127 unsigned old_size
= t
->labels_size
;
128 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
129 t
->labels
= REALLOC( t
->labels
,
130 old_size
* sizeof t
->labels
[0],
131 t
->labels_size
* sizeof t
->labels
[0] );
132 if (t
->labels
== NULL
) {
133 static unsigned dummy
;
139 i
= t
->labels_count
++;
140 t
->labels
[i
].branch_target
= branch_target
;
141 return &t
->labels
[i
].token
;
146 * Called prior to emitting the TGSI code for each Mesa instruction.
147 * Allocate additional space for instructions if needed.
148 * Update the insn[] array so the next Mesa instruction points to
149 * the next TGSI instruction.
151 static void set_insn_start( struct st_translate
*t
,
154 if (t
->insn_count
+ 1 >= t
->insn_size
) {
155 unsigned old_size
= t
->insn_size
;
156 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
157 t
->insn
= REALLOC( t
->insn
,
158 old_size
* sizeof t
->insn
[0],
159 t
->insn_size
* sizeof t
->insn
[0] );
160 if (t
->insn
== NULL
) {
166 t
->insn
[t
->insn_count
++] = start
;
171 * Map a Mesa dst register to a TGSI ureg_dst register.
173 static struct ureg_dst
174 dst_register( struct st_translate
*t
,
175 gl_register_file file
,
179 case PROGRAM_UNDEFINED
:
180 return ureg_dst_undef();
182 case PROGRAM_TEMPORARY
:
183 if (ureg_dst_is_undef(t
->temps
[index
]))
184 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
186 return t
->temps
[index
];
189 if (t
->procType
== TGSI_PROCESSOR_VERTEX
&& index
== VERT_RESULT_PSIZ
)
190 t
->prevInstWrotePointSize
= GL_TRUE
;
192 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
193 assert(index
< VERT_RESULT_MAX
);
194 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
195 assert(index
< FRAG_RESULT_MAX
);
197 assert(index
< GEOM_RESULT_MAX
);
199 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
201 return t
->outputs
[t
->outputMapping
[index
]];
203 case PROGRAM_ADDRESS
:
204 return t
->address
[index
];
208 return ureg_dst_undef();
214 * Map a Mesa src register to a TGSI ureg_src register.
216 static struct ureg_src
217 src_register( struct st_translate
*t
,
218 gl_register_file file
,
222 case PROGRAM_UNDEFINED
:
223 return ureg_src_undef();
225 case PROGRAM_TEMPORARY
:
227 assert(index
< Elements(t
->temps
));
228 if (ureg_dst_is_undef(t
->temps
[index
]))
229 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
230 return ureg_src(t
->temps
[index
]);
232 case PROGRAM_NAMED_PARAM
:
233 case PROGRAM_ENV_PARAM
:
234 case PROGRAM_LOCAL_PARAM
:
235 case PROGRAM_UNIFORM
:
237 return t
->constants
[index
];
238 case PROGRAM_STATE_VAR
:
239 case PROGRAM_CONSTANT
: /* ie, immediate */
241 return ureg_DECL_constant( t
->ureg
, 0 );
243 return t
->constants
[index
];
246 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
247 return t
->inputs
[t
->inputMapping
[index
]];
250 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
251 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
253 case PROGRAM_ADDRESS
:
254 return ureg_src(t
->address
[index
]);
256 case PROGRAM_SYSTEM_VALUE
:
257 assert(index
< Elements(t
->systemValues
));
258 return t
->systemValues
[index
];
262 return ureg_src_undef();
268 * Map mesa texture target to TGSI texture target.
271 translate_texture_target( GLuint textarget
,
275 switch( textarget
) {
276 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_SHADOW1D
;
277 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_SHADOW2D
;
278 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_SHADOWRECT
;
283 switch( textarget
) {
284 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_1D
;
285 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_2D
;
286 case TEXTURE_3D_INDEX
: return TGSI_TEXTURE_3D
;
287 case TEXTURE_CUBE_INDEX
: return TGSI_TEXTURE_CUBE
;
288 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_RECT
;
289 case TEXTURE_1D_ARRAY_INDEX
: return TGSI_TEXTURE_1D_ARRAY
;
290 case TEXTURE_2D_ARRAY_INDEX
: return TGSI_TEXTURE_2D_ARRAY
;
293 return TGSI_TEXTURE_1D
;
299 * Create a TGSI ureg_dst register from a Mesa dest register.
301 static struct ureg_dst
302 translate_dst( struct st_translate
*t
,
303 const struct prog_dst_register
*DstReg
,
306 struct ureg_dst dst
= dst_register( t
,
310 dst
= ureg_writemask( dst
,
314 dst
= ureg_saturate( dst
);
317 dst
= ureg_dst_indirect( dst
, ureg_src(t
->address
[0]) );
324 * Create a TGSI ureg_src register from a Mesa src register.
326 static struct ureg_src
327 translate_src( struct st_translate
*t
,
328 const struct prog_src_register
*SrcReg
)
330 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
332 if (t
->procType
== TGSI_PROCESSOR_GEOMETRY
&& SrcReg
->HasIndex2
) {
333 src
= src_register( t
, SrcReg
->File
, SrcReg
->Index2
);
334 if (SrcReg
->RelAddr2
)
335 src
= ureg_src_dimension_indirect( src
, ureg_src(t
->address
[0]),
338 src
= ureg_src_dimension( src
, SrcReg
->Index
);
341 src
= ureg_swizzle( src
,
342 GET_SWZ( SrcReg
->Swizzle
, 0 ) & 0x3,
343 GET_SWZ( SrcReg
->Swizzle
, 1 ) & 0x3,
344 GET_SWZ( SrcReg
->Swizzle
, 2 ) & 0x3,
345 GET_SWZ( SrcReg
->Swizzle
, 3 ) & 0x3);
347 if (SrcReg
->Negate
== NEGATE_XYZW
)
348 src
= ureg_negate(src
);
353 if (SrcReg
->RelAddr
) {
354 src
= ureg_src_indirect( src
, ureg_src(t
->address
[0]));
355 if (SrcReg
->File
!= PROGRAM_INPUT
&&
356 SrcReg
->File
!= PROGRAM_OUTPUT
) {
357 /* If SrcReg->Index was negative, it was set to zero in
358 * src_register(). Reassign it now. But don't do this
359 * for input/output regs since they get remapped while
360 * const buffers don't.
362 src
.Index
= SrcReg
->Index
;
370 static struct ureg_src
swizzle_4v( struct ureg_src src
,
371 const unsigned *swz
)
373 return ureg_swizzle( src
, swz
[0], swz
[1], swz
[2], swz
[3] );
378 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
384 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
386 static void emit_swz( struct st_translate
*t
,
388 const struct prog_src_register
*SrcReg
)
390 struct ureg_program
*ureg
= t
->ureg
;
391 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
393 unsigned negate_mask
= SrcReg
->Negate
;
395 unsigned one_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ONE
) << 0 |
396 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ONE
) << 1 |
397 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ONE
) << 2 |
398 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ONE
) << 3);
400 unsigned zero_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ZERO
) << 0 |
401 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ZERO
) << 1 |
402 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ZERO
) << 2 |
403 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ZERO
) << 3);
405 unsigned negative_one_mask
= one_mask
& negate_mask
;
406 unsigned positive_one_mask
= one_mask
& ~negate_mask
;
410 unsigned mul_swizzle
[4] = {0,0,0,0};
411 unsigned add_swizzle
[4] = {0,0,0,0};
412 unsigned src_swizzle
[4] = {0,0,0,0};
413 boolean need_add
= FALSE
;
414 boolean need_mul
= FALSE
;
416 if (dst
.WriteMask
== 0)
419 /* Is this just a MOV?
421 if (zero_mask
== 0 &&
423 (negate_mask
== 0 || negate_mask
== TGSI_WRITEMASK_XYZW
))
425 ureg_MOV( ureg
, dst
, translate_src( t
, SrcReg
));
431 #define IMM_NEG_ONE 2
433 imm
= ureg_imm3f( ureg
, 0, 1, -1 );
435 for (i
= 0; i
< 4; i
++) {
436 unsigned bit
= 1 << i
;
438 if (dst
.WriteMask
& bit
) {
439 if (positive_one_mask
& bit
) {
440 mul_swizzle
[i
] = IMM_ZERO
;
441 add_swizzle
[i
] = IMM_ONE
;
444 else if (negative_one_mask
& bit
) {
445 mul_swizzle
[i
] = IMM_ZERO
;
446 add_swizzle
[i
] = IMM_NEG_ONE
;
449 else if (zero_mask
& bit
) {
450 mul_swizzle
[i
] = IMM_ZERO
;
451 add_swizzle
[i
] = IMM_ZERO
;
455 add_swizzle
[i
] = IMM_ZERO
;
456 src_swizzle
[i
] = GET_SWZ(SrcReg
->Swizzle
, i
);
458 if (negate_mask
& bit
) {
459 mul_swizzle
[i
] = IMM_NEG_ONE
;
462 mul_swizzle
[i
] = IMM_ONE
;
468 if (need_mul
&& need_add
) {
471 swizzle_4v( src
, src_swizzle
),
472 swizzle_4v( imm
, mul_swizzle
),
473 swizzle_4v( imm
, add_swizzle
) );
478 swizzle_4v( src
, src_swizzle
),
479 swizzle_4v( imm
, mul_swizzle
) );
484 swizzle_4v( imm
, add_swizzle
) );
497 * Negate the value of DDY to match GL semantics where (0,0) is the
498 * lower-left corner of the window.
499 * Note that the GL_ARB_fragment_coord_conventions extension will
500 * effect this someday.
502 static void emit_ddy( struct st_translate
*t
,
504 const struct prog_src_register
*SrcReg
)
506 struct ureg_program
*ureg
= t
->ureg
;
507 struct ureg_src src
= translate_src( t
, SrcReg
);
508 src
= ureg_negate( src
);
509 ureg_DDY( ureg
, dst
, src
);
515 translate_opcode( unsigned op
)
519 return TGSI_OPCODE_ARL
;
521 return TGSI_OPCODE_ABS
;
523 return TGSI_OPCODE_ADD
;
525 return TGSI_OPCODE_BGNLOOP
;
527 return TGSI_OPCODE_BGNSUB
;
529 return TGSI_OPCODE_BRA
;
531 return TGSI_OPCODE_BRK
;
533 return TGSI_OPCODE_CAL
;
535 return TGSI_OPCODE_CMP
;
537 return TGSI_OPCODE_CONT
;
539 return TGSI_OPCODE_COS
;
541 return TGSI_OPCODE_DDX
;
543 return TGSI_OPCODE_DDY
;
545 return TGSI_OPCODE_DP2
;
547 return TGSI_OPCODE_DP2A
;
549 return TGSI_OPCODE_DP3
;
551 return TGSI_OPCODE_DP4
;
553 return TGSI_OPCODE_DPH
;
555 return TGSI_OPCODE_DST
;
557 return TGSI_OPCODE_ELSE
;
558 case OPCODE_EMIT_VERTEX
:
559 return TGSI_OPCODE_EMIT
;
560 case OPCODE_END_PRIMITIVE
:
561 return TGSI_OPCODE_ENDPRIM
;
563 return TGSI_OPCODE_ENDIF
;
565 return TGSI_OPCODE_ENDLOOP
;
567 return TGSI_OPCODE_ENDSUB
;
569 return TGSI_OPCODE_EX2
;
571 return TGSI_OPCODE_EXP
;
573 return TGSI_OPCODE_FLR
;
575 return TGSI_OPCODE_FRC
;
577 return TGSI_OPCODE_IF
;
579 return TGSI_OPCODE_TRUNC
;
581 return TGSI_OPCODE_KIL
;
583 return TGSI_OPCODE_KILP
;
585 return TGSI_OPCODE_LG2
;
587 return TGSI_OPCODE_LOG
;
589 return TGSI_OPCODE_LIT
;
591 return TGSI_OPCODE_LRP
;
593 return TGSI_OPCODE_MAD
;
595 return TGSI_OPCODE_MAX
;
597 return TGSI_OPCODE_MIN
;
599 return TGSI_OPCODE_MOV
;
601 return TGSI_OPCODE_MUL
;
603 return TGSI_OPCODE_NOP
;
605 return TGSI_OPCODE_NRM
;
607 return TGSI_OPCODE_NRM4
;
609 return TGSI_OPCODE_POW
;
611 return TGSI_OPCODE_RCP
;
613 return TGSI_OPCODE_RET
;
615 return TGSI_OPCODE_RSQ
;
617 return TGSI_OPCODE_SCS
;
619 return TGSI_OPCODE_SEQ
;
621 return TGSI_OPCODE_SGE
;
623 return TGSI_OPCODE_SGT
;
625 return TGSI_OPCODE_SIN
;
627 return TGSI_OPCODE_SLE
;
629 return TGSI_OPCODE_SLT
;
631 return TGSI_OPCODE_SNE
;
633 return TGSI_OPCODE_SSG
;
635 return TGSI_OPCODE_SUB
;
637 return TGSI_OPCODE_TEX
;
639 return TGSI_OPCODE_TXB
;
641 return TGSI_OPCODE_TXD
;
643 return TGSI_OPCODE_TXL
;
645 return TGSI_OPCODE_TXP
;
647 return TGSI_OPCODE_XPD
;
649 return TGSI_OPCODE_END
;
652 return TGSI_OPCODE_NOP
;
659 struct st_translate
*t
,
660 const struct prog_instruction
*inst
)
662 struct ureg_program
*ureg
= t
->ureg
;
664 struct ureg_dst dst
[1];
665 struct ureg_src src
[4];
669 num_dst
= _mesa_num_inst_dst_regs( inst
->Opcode
);
670 num_src
= _mesa_num_inst_src_regs( inst
->Opcode
);
673 dst
[0] = translate_dst( t
,
675 inst
->SaturateMode
);
677 for (i
= 0; i
< num_src
; i
++)
678 src
[i
] = translate_src( t
, &inst
->SrcReg
[i
] );
680 switch( inst
->Opcode
) {
682 emit_swz( t
, dst
[0], &inst
->SrcReg
[0] );
690 debug_assert(num_dst
== 0);
691 ureg_label_insn( ureg
,
692 translate_opcode( inst
->Opcode
),
694 get_label( t
, inst
->BranchTarget
));
702 src
[num_src
++] = t
->samplers
[inst
->TexSrcUnit
];
704 translate_opcode( inst
->Opcode
),
706 translate_texture_target( inst
->TexSrcTarget
,
712 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
714 translate_opcode( inst
->Opcode
),
720 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XYZ
);
722 translate_opcode( inst
->Opcode
),
731 /* At some point, a motivated person could add a better
732 * implementation of noise. Currently not even the nvidia
733 * binary drivers do anything more than this. In any case, the
734 * place to do this is in the GL state tracker, not the poor
737 ureg_MOV( ureg
, dst
[0], ureg_imm1f(ureg
, 0.5) );
741 emit_ddy( t
, dst
[0], &inst
->SrcReg
[0] );
746 translate_opcode( inst
->Opcode
),
755 * Emit the TGSI instructions to adjust the WPOS pixel center convention
756 * Basically, add (adjX, adjY) to the fragment position.
759 emit_adjusted_wpos( struct st_translate
*t
,
760 const struct gl_program
*program
,
761 GLfloat adjX
, GLfloat adjY
)
763 struct ureg_program
*ureg
= t
->ureg
;
764 struct ureg_dst wpos_temp
= ureg_DECL_temporary(ureg
);
765 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
767 /* Note that we bias X and Y and pass Z and W through unchanged.
768 * The shader might also use gl_FragCoord.w and .z.
770 ureg_ADD(ureg
, wpos_temp
, wpos_input
,
771 ureg_imm4f(ureg
, adjX
, adjY
, 0.0f
, 0.0f
));
773 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
778 * Emit the TGSI instructions for inverting the WPOS y coordinate.
779 * This code is unavoidable because it also depends on whether
780 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
783 emit_wpos_inversion( struct st_translate
*t
,
784 const struct gl_program
*program
,
787 struct ureg_program
*ureg
= t
->ureg
;
789 /* Fragment program uses fragment position input.
790 * Need to replace instances of INPUT[WPOS] with temp T
791 * where T = INPUT[WPOS] by y is inverted.
793 static const gl_state_index wposTransformState
[STATE_LENGTH
]
794 = { STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
, 0, 0, 0 };
796 /* XXX: note we are modifying the incoming shader here! Need to
797 * do this before emitting the constant decls below, or this
800 unsigned wposTransConst
= _mesa_add_state_reference(program
->Parameters
,
803 struct ureg_src wpostrans
= ureg_DECL_constant( ureg
, wposTransConst
);
804 struct ureg_dst wpos_temp
;
805 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
807 /* MOV wpos_temp, input[wpos]
809 if (wpos_input
.File
== TGSI_FILE_TEMPORARY
)
810 wpos_temp
= ureg_dst(wpos_input
);
812 wpos_temp
= ureg_DECL_temporary( ureg
);
813 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
817 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
820 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
822 ureg_scalar(wpostrans
, 0),
823 ureg_scalar(wpostrans
, 1));
825 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
828 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
830 ureg_scalar(wpostrans
, 2),
831 ureg_scalar(wpostrans
, 3));
834 /* Use wpos_temp as position input from here on:
836 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
841 * Emit fragment position/ooordinate code.
844 emit_wpos(struct st_context
*st
,
845 struct st_translate
*t
,
846 const struct gl_program
*program
,
847 struct ureg_program
*ureg
)
849 const struct gl_fragment_program
*fp
=
850 (const struct gl_fragment_program
*) program
;
851 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
852 boolean invert
= FALSE
;
854 if (fp
->OriginUpperLeft
) {
855 /* Fragment shader wants origin in upper-left */
856 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
857 /* the driver supports upper-left origin */
859 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
860 /* the driver supports lower-left origin, need to invert Y */
861 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
868 /* Fragment shader wants origin in lower-left */
869 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
870 /* the driver supports lower-left origin */
871 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
872 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
873 /* the driver supports upper-left origin, need to invert Y */
879 if (fp
->PixelCenterInteger
) {
880 /* Fragment shader wants pixel center integer */
881 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
))
882 /* the driver supports pixel center integer */
883 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
884 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
))
885 /* the driver supports pixel center half integer, need to bias X,Y */
886 emit_adjusted_wpos(t
, program
, 0.5f
, invert
? 0.5f
: -0.5f
);
891 /* Fragment shader wants pixel center half integer */
892 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
893 /* the driver supports pixel center half integer */
895 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
896 /* the driver supports pixel center integer, need to bias X,Y */
897 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
898 emit_adjusted_wpos(t
, program
, 0.5f
, invert
? -0.5f
: 0.5f
);
904 /* we invert after adjustment so that we avoid the MOV to temporary,
905 * and reuse the adjustment ADD instead */
906 emit_wpos_inversion(t
, program
, invert
);
911 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
912 * TGSI uses +1 for front, -1 for back.
913 * This function converts the TGSI value to the GL value. Simply clamping/
914 * saturating the value to [0,1] does the job.
917 emit_face_var( struct st_translate
*t
,
918 const struct gl_program
*program
)
920 struct ureg_program
*ureg
= t
->ureg
;
921 struct ureg_dst face_temp
= ureg_DECL_temporary( ureg
);
922 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
924 /* MOV_SAT face_temp, input[face]
926 face_temp
= ureg_saturate( face_temp
);
927 ureg_MOV( ureg
, face_temp
, face_input
);
929 /* Use face_temp as face input from here on:
931 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
936 emit_edgeflags( struct st_translate
*t
,
937 const struct gl_program
*program
)
939 struct ureg_program
*ureg
= t
->ureg
;
940 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
941 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
943 ureg_MOV( ureg
, edge_dst
, edge_src
);
948 * Translate Mesa program to TGSI format.
949 * \param program the program to translate
950 * \param numInputs number of input registers used
951 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
953 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
954 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
956 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
957 * \param numOutputs number of output registers used
958 * \param outputMapping maps Mesa fragment program outputs to TGSI
960 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
961 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
964 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
967 st_translate_mesa_program(
968 struct gl_context
*ctx
,
970 struct ureg_program
*ureg
,
971 const struct gl_program
*program
,
973 const GLuint inputMapping
[],
974 const ubyte inputSemanticName
[],
975 const ubyte inputSemanticIndex
[],
976 const GLuint interpMode
[],
978 const GLuint outputMapping
[],
979 const ubyte outputSemanticName
[],
980 const ubyte outputSemanticIndex
[],
981 boolean passthrough_edgeflags
)
983 struct st_translate translate
, *t
;
985 enum pipe_error ret
= PIPE_OK
;
987 assert(numInputs
<= Elements(t
->inputs
));
988 assert(numOutputs
<= Elements(t
->outputs
));
991 memset(t
, 0, sizeof *t
);
993 t
->procType
= procType
;
994 t
->inputMapping
= inputMapping
;
995 t
->outputMapping
= outputMapping
;
997 t
->pointSizeOutIndex
= -1;
998 t
->prevInstWrotePointSize
= GL_FALSE
;
1000 /*_mesa_print_program(program);*/
1003 * Declare input attributes.
1005 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
1006 for (i
= 0; i
< numInputs
; i
++) {
1007 if (program
->InputFlags
[0] & PROG_PARAM_BIT_CYL_WRAP
) {
1008 t
->inputs
[i
] = ureg_DECL_fs_input_cyl(ureg
,
1009 inputSemanticName
[i
],
1010 inputSemanticIndex
[i
],
1012 TGSI_CYLINDRICAL_WRAP_X
);
1015 t
->inputs
[i
] = ureg_DECL_fs_input(ureg
,
1016 inputSemanticName
[i
],
1017 inputSemanticIndex
[i
],
1022 if (program
->InputsRead
& FRAG_BIT_WPOS
) {
1023 /* Must do this after setting up t->inputs, and before
1024 * emitting constant references, below:
1026 emit_wpos(st_context(ctx
), t
, program
, ureg
);
1029 if (program
->InputsRead
& FRAG_BIT_FACE
) {
1030 emit_face_var( t
, program
);
1034 * Declare output attributes.
1036 for (i
= 0; i
< numOutputs
; i
++) {
1037 switch (outputSemanticName
[i
]) {
1038 case TGSI_SEMANTIC_POSITION
:
1039 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1040 TGSI_SEMANTIC_POSITION
, /* Z / Depth */
1041 outputSemanticIndex
[i
] );
1043 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
1046 case TGSI_SEMANTIC_STENCIL
:
1047 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1048 TGSI_SEMANTIC_STENCIL
, /* Stencil */
1049 outputSemanticIndex
[i
] );
1050 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
1053 case TGSI_SEMANTIC_COLOR
:
1054 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1055 TGSI_SEMANTIC_COLOR
,
1056 outputSemanticIndex
[i
] );
1064 else if (procType
== TGSI_PROCESSOR_GEOMETRY
) {
1065 for (i
= 0; i
< numInputs
; i
++) {
1066 t
->inputs
[i
] = ureg_DECL_gs_input(ureg
,
1068 inputSemanticName
[i
],
1069 inputSemanticIndex
[i
]);
1072 for (i
= 0; i
< numOutputs
; i
++) {
1073 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1074 outputSemanticName
[i
],
1075 outputSemanticIndex
[i
] );
1079 assert(procType
== TGSI_PROCESSOR_VERTEX
);
1081 for (i
= 0; i
< numInputs
; i
++) {
1082 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
1085 for (i
= 0; i
< numOutputs
; i
++) {
1086 t
->outputs
[i
] = ureg_DECL_output( ureg
,
1087 outputSemanticName
[i
],
1088 outputSemanticIndex
[i
] );
1089 if ((outputSemanticName
[i
] == TGSI_SEMANTIC_PSIZE
) && program
->Id
) {
1090 /* Writing to the point size result register requires special
1091 * handling to implement clamping.
1093 static const gl_state_index pointSizeClampState
[STATE_LENGTH
]
1094 = { STATE_INTERNAL
, STATE_POINT_SIZE_IMPL_CLAMP
, 0, 0, 0 };
1095 /* XXX: note we are modifying the incoming shader here! Need to
1096 * do this before emitting the constant decls below, or this
1099 unsigned pointSizeClampConst
=
1100 _mesa_add_state_reference(program
->Parameters
,
1101 pointSizeClampState
);
1102 struct ureg_dst psizregtemp
= ureg_DECL_temporary( ureg
);
1103 t
->pointSizeConst
= ureg_DECL_constant( ureg
, pointSizeClampConst
);
1104 t
->pointSizeResult
= t
->outputs
[i
];
1105 t
->pointSizeOutIndex
= i
;
1106 t
->outputs
[i
] = psizregtemp
;
1109 if (passthrough_edgeflags
)
1110 emit_edgeflags( t
, program
);
1113 /* Declare address register.
1115 if (program
->NumAddressRegs
> 0) {
1116 debug_assert( program
->NumAddressRegs
== 1 );
1117 t
->address
[0] = ureg_DECL_address( ureg
);
1120 /* Declare misc input registers
1123 GLbitfield sysInputs
= program
->SystemValuesRead
;
1124 unsigned numSys
= 0;
1125 for (i
= 0; sysInputs
; i
++) {
1126 if (sysInputs
& (1 << i
)) {
1127 unsigned semName
= mesa_sysval_to_semantic
[i
];
1128 t
->systemValues
[i
] = ureg_DECL_system_value(ureg
, numSys
, semName
, 0);
1130 sysInputs
&= ~(1 << i
);
1135 if (program
->IndirectRegisterFiles
& (1 << PROGRAM_TEMPORARY
)) {
1136 /* If temps are accessed with indirect addressing, declare temporaries
1137 * in sequential order. Else, we declare them on demand elsewhere.
1139 for (i
= 0; i
< program
->NumTemporaries
; i
++) {
1140 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1141 t
->temps
[i
] = ureg_DECL_temporary( t
->ureg
);
1145 /* Emit constants and immediates. Mesa uses a single index space
1146 * for these, so we put all the translated regs in t->constants.
1148 if (program
->Parameters
) {
1149 t
->constants
= CALLOC( program
->Parameters
->NumParameters
,
1150 sizeof t
->constants
[0] );
1151 if (t
->constants
== NULL
) {
1152 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
1156 for (i
= 0; i
< program
->Parameters
->NumParameters
; i
++) {
1157 switch (program
->Parameters
->Parameters
[i
].Type
) {
1158 case PROGRAM_ENV_PARAM
:
1159 case PROGRAM_LOCAL_PARAM
:
1160 case PROGRAM_STATE_VAR
:
1161 case PROGRAM_NAMED_PARAM
:
1162 case PROGRAM_UNIFORM
:
1163 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1166 /* Emit immediates only when there's no indirect addressing of
1168 * FIXME: Be smarter and recognize param arrays:
1169 * indirect addressing is only valid within the referenced
1172 case PROGRAM_CONSTANT
:
1173 if (program
->IndirectRegisterFiles
& PROGRAM_ANY_CONST
)
1174 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1177 ureg_DECL_immediate( ureg
,
1178 program
->Parameters
->ParameterValues
[i
],
1187 /* texture samplers */
1188 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
1189 if (program
->SamplersUsed
& (1 << i
)) {
1190 t
->samplers
[i
] = ureg_DECL_sampler( ureg
, i
);
1194 /* Emit each instruction in turn:
1196 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1197 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1198 compile_instruction( t
, &program
->Instructions
[i
] );
1200 if (t
->prevInstWrotePointSize
&& program
->Id
) {
1201 /* The previous instruction wrote to the (fake) vertex point size
1202 * result register. Now we need to clamp that value to the min/max
1203 * point size range, putting the result into the real point size
1205 * Note that we can't do this easily at the end of program due to
1206 * possible early return.
1208 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1210 ureg_writemask(t
->outputs
[t
->pointSizeOutIndex
], WRITEMASK_X
),
1211 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1212 ureg_swizzle(t
->pointSizeConst
, 1,1,1,1));
1213 ureg_MIN( t
->ureg
, ureg_writemask(t
->pointSizeResult
, WRITEMASK_X
),
1214 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1215 ureg_swizzle(t
->pointSizeConst
, 2,2,2,2));
1217 t
->prevInstWrotePointSize
= GL_FALSE
;
1220 /* Fix up all emitted labels:
1222 for (i
= 0; i
< t
->labels_count
; i
++) {
1223 ureg_fixup_label( ureg
,
1225 t
->insn
[t
->labels
[i
].branch_target
] );
1234 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
1242 * Tokens cannot be free with free otherwise the builtin gallium
1243 * malloc debugging will get confused.
1246 st_free_tokens(const struct tgsi_token
*tokens
)
1248 FREE((void *)tokens
);